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TARGET_NUCLEO_L152RE/TOOLCHAIN_GCC_ARM/stm32l1xx_hal_usart.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32l1xx_hal_usart.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief This file contains all the functions prototypes for the USART |
| AnnaBridge | 171:3a7713b1edbc | 6 | * firmware library. |
| AnnaBridge | 171:3a7713b1edbc | 7 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 8 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 9 | * |
| AnnaBridge | 171:3a7713b1edbc | 10 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 11 | * |
| AnnaBridge | 171:3a7713b1edbc | 12 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 13 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 14 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 15 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 16 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 17 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 18 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 19 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 20 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 21 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 22 | * |
| AnnaBridge | 171:3a7713b1edbc | 23 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 24 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 27 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 28 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 29 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 30 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 32 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 33 | * |
| AnnaBridge | 171:3a7713b1edbc | 34 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 35 | */ |
| AnnaBridge | 171:3a7713b1edbc | 36 | |
| AnnaBridge | 171:3a7713b1edbc | 37 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 38 | #ifndef __STM32L1xx_HAL_USART_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | #define __STM32L1xx_HAL_USART_H |
| AnnaBridge | 171:3a7713b1edbc | 40 | |
| AnnaBridge | 171:3a7713b1edbc | 41 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 42 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 43 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 44 | |
| AnnaBridge | 171:3a7713b1edbc | 45 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 46 | #include "stm32l1xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 47 | |
| AnnaBridge | 171:3a7713b1edbc | 48 | /** @addtogroup STM32L1xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 49 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 50 | */ |
| AnnaBridge | 171:3a7713b1edbc | 51 | |
| AnnaBridge | 171:3a7713b1edbc | 52 | /** @addtogroup USART |
| AnnaBridge | 171:3a7713b1edbc | 53 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 54 | */ |
| AnnaBridge | 171:3a7713b1edbc | 55 | |
| AnnaBridge | 171:3a7713b1edbc | 56 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 57 | /** @defgroup USART_Exported_Types USART Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 58 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 59 | */ |
| AnnaBridge | 171:3a7713b1edbc | 60 | |
| AnnaBridge | 171:3a7713b1edbc | 61 | |
| AnnaBridge | 171:3a7713b1edbc | 62 | /** |
| AnnaBridge | 171:3a7713b1edbc | 63 | * @brief USART Init Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 64 | */ |
| AnnaBridge | 171:3a7713b1edbc | 65 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 66 | { |
| AnnaBridge | 171:3a7713b1edbc | 67 | uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. |
| AnnaBridge | 171:3a7713b1edbc | 68 | The baud rate is computed using the following formula: |
| AnnaBridge | 171:3a7713b1edbc | 69 | - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate))) |
| AnnaBridge | 171:3a7713b1edbc | 70 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */ |
| AnnaBridge | 171:3a7713b1edbc | 71 | |
| AnnaBridge | 171:3a7713b1edbc | 72 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| AnnaBridge | 171:3a7713b1edbc | 73 | This parameter can be a value of @ref USART_Word_Length */ |
| AnnaBridge | 171:3a7713b1edbc | 74 | |
| AnnaBridge | 171:3a7713b1edbc | 75 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
| AnnaBridge | 171:3a7713b1edbc | 76 | This parameter can be a value of @ref USART_Stop_Bits */ |
| AnnaBridge | 171:3a7713b1edbc | 77 | |
| AnnaBridge | 171:3a7713b1edbc | 78 | uint32_t Parity; /*!< Specifies the parity mode. |
| AnnaBridge | 171:3a7713b1edbc | 79 | This parameter can be a value of @ref USART_Parity |
| AnnaBridge | 171:3a7713b1edbc | 80 | @note When parity is enabled, the computed parity is inserted |
| AnnaBridge | 171:3a7713b1edbc | 81 | at the MSB position of the transmitted data (9th bit when |
| AnnaBridge | 171:3a7713b1edbc | 82 | the word length is set to 9 data bits; 8th bit when the |
| AnnaBridge | 171:3a7713b1edbc | 83 | word length is set to 8 data bits). */ |
| AnnaBridge | 171:3a7713b1edbc | 84 | |
| AnnaBridge | 171:3a7713b1edbc | 85 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
| AnnaBridge | 171:3a7713b1edbc | 86 | This parameter can be a value of @ref USART_Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 87 | |
| AnnaBridge | 171:3a7713b1edbc | 88 | uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. |
| AnnaBridge | 171:3a7713b1edbc | 89 | This parameter can be a value of @ref USART_Clock_Polarity */ |
| AnnaBridge | 171:3a7713b1edbc | 90 | |
| AnnaBridge | 171:3a7713b1edbc | 91 | uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. |
| AnnaBridge | 171:3a7713b1edbc | 92 | This parameter can be a value of @ref USART_Clock_Phase */ |
| AnnaBridge | 171:3a7713b1edbc | 93 | |
| AnnaBridge | 171:3a7713b1edbc | 94 | uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
| AnnaBridge | 171:3a7713b1edbc | 95 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
| AnnaBridge | 171:3a7713b1edbc | 96 | This parameter can be a value of @ref USART_Last_Bit */ |
| AnnaBridge | 171:3a7713b1edbc | 97 | }USART_InitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 98 | |
| AnnaBridge | 171:3a7713b1edbc | 99 | /** |
| AnnaBridge | 171:3a7713b1edbc | 100 | * @brief HAL State structures definition |
| AnnaBridge | 171:3a7713b1edbc | 101 | */ |
| AnnaBridge | 171:3a7713b1edbc | 102 | typedef enum |
| AnnaBridge | 171:3a7713b1edbc | 103 | { |
| AnnaBridge | 171:3a7713b1edbc | 104 | HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */ |
| AnnaBridge | 171:3a7713b1edbc | 105 | HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
| AnnaBridge | 171:3a7713b1edbc | 106 | HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 107 | HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 108 | HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 109 | HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 110 | HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
| AnnaBridge | 171:3a7713b1edbc | 111 | HAL_USART_STATE_ERROR = 0x04 /*!< Error */ |
| AnnaBridge | 171:3a7713b1edbc | 112 | }HAL_USART_StateTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 113 | |
| AnnaBridge | 171:3a7713b1edbc | 114 | |
| AnnaBridge | 171:3a7713b1edbc | 115 | /** |
| AnnaBridge | 171:3a7713b1edbc | 116 | * @brief USART handle Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 117 | */ |
| AnnaBridge | 171:3a7713b1edbc | 118 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 119 | { |
| AnnaBridge | 171:3a7713b1edbc | 120 | USART_TypeDef *Instance; /*!< USART registers base address */ |
| AnnaBridge | 171:3a7713b1edbc | 121 | |
| AnnaBridge | 171:3a7713b1edbc | 122 | USART_InitTypeDef Init; /*!< Usart communication parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 123 | |
| AnnaBridge | 171:3a7713b1edbc | 124 | uint8_t *pTxBuffPtr; /*!< Pointer to Usart Tx transfer Buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 125 | |
| AnnaBridge | 171:3a7713b1edbc | 126 | uint16_t TxXferSize; /*!< Usart Tx Transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | |
| AnnaBridge | 171:3a7713b1edbc | 128 | __IO uint16_t TxXferCount; /*!< Usart Tx Transfer Counter */ |
| AnnaBridge | 171:3a7713b1edbc | 129 | |
| AnnaBridge | 171:3a7713b1edbc | 130 | uint8_t *pRxBuffPtr; /*!< Pointer to Usart Rx transfer Buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 131 | |
| AnnaBridge | 171:3a7713b1edbc | 132 | uint16_t RxXferSize; /*!< Usart Rx Transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 133 | |
| AnnaBridge | 171:3a7713b1edbc | 134 | __IO uint16_t RxXferCount; /*!< Usart Rx Transfer Counter */ |
| AnnaBridge | 171:3a7713b1edbc | 135 | |
| AnnaBridge | 171:3a7713b1edbc | 136 | DMA_HandleTypeDef *hdmatx; /*!< Usart Tx DMA Handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 137 | |
| AnnaBridge | 171:3a7713b1edbc | 138 | DMA_HandleTypeDef *hdmarx; /*!< Usart Rx DMA Handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 139 | |
| AnnaBridge | 171:3a7713b1edbc | 140 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| AnnaBridge | 171:3a7713b1edbc | 141 | |
| AnnaBridge | 171:3a7713b1edbc | 142 | __IO HAL_USART_StateTypeDef State; /*!< Usart communication state */ |
| AnnaBridge | 171:3a7713b1edbc | 143 | |
| AnnaBridge | 171:3a7713b1edbc | 144 | __IO uint32_t ErrorCode; /*!< USART Error code */ |
| AnnaBridge | 171:3a7713b1edbc | 145 | |
| AnnaBridge | 171:3a7713b1edbc | 146 | }USART_HandleTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 147 | |
| AnnaBridge | 171:3a7713b1edbc | 148 | /** |
| AnnaBridge | 171:3a7713b1edbc | 149 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 150 | */ |
| AnnaBridge | 171:3a7713b1edbc | 151 | |
| AnnaBridge | 171:3a7713b1edbc | 152 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 153 | /** @defgroup USART_Exported_Constants USART Exported constants |
| AnnaBridge | 171:3a7713b1edbc | 154 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 155 | */ |
| AnnaBridge | 171:3a7713b1edbc | 156 | |
| AnnaBridge | 171:3a7713b1edbc | 157 | /** @defgroup USART_Error_Codes USART Error Codes |
| AnnaBridge | 171:3a7713b1edbc | 158 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 159 | */ |
| AnnaBridge | 171:3a7713b1edbc | 160 | #define HAL_USART_ERROR_NONE (0x00U) /*!< No error */ |
| AnnaBridge | 171:3a7713b1edbc | 161 | #define HAL_USART_ERROR_PE (0x01U) /*!< Parity error */ |
| AnnaBridge | 171:3a7713b1edbc | 162 | #define HAL_USART_ERROR_NE (0x02U) /*!< Noise error */ |
| AnnaBridge | 171:3a7713b1edbc | 163 | #define HAL_USART_ERROR_FE (0x04U) /*!< frame error */ |
| AnnaBridge | 171:3a7713b1edbc | 164 | #define HAL_USART_ERROR_ORE (0x08U) /*!< Overrun error */ |
| AnnaBridge | 171:3a7713b1edbc | 165 | #define HAL_USART_ERROR_DMA (0x10U) /*!< DMA transfer error */ |
| AnnaBridge | 171:3a7713b1edbc | 166 | /** |
| AnnaBridge | 171:3a7713b1edbc | 167 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 168 | */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | |
| AnnaBridge | 171:3a7713b1edbc | 170 | /** @defgroup USART_Word_Length USART Word Length |
| AnnaBridge | 171:3a7713b1edbc | 171 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 172 | */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | #define USART_WORDLENGTH_8B (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 174 | #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
| AnnaBridge | 171:3a7713b1edbc | 175 | /** |
| AnnaBridge | 171:3a7713b1edbc | 176 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 177 | */ |
| AnnaBridge | 171:3a7713b1edbc | 178 | |
| AnnaBridge | 171:3a7713b1edbc | 179 | /** @defgroup USART_Stop_Bits USART Number of Stop Bits |
| AnnaBridge | 171:3a7713b1edbc | 180 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 181 | */ |
| AnnaBridge | 171:3a7713b1edbc | 182 | #define USART_STOPBITS_1 (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 183 | #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) |
| AnnaBridge | 171:3a7713b1edbc | 184 | #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| AnnaBridge | 171:3a7713b1edbc | 185 | #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) |
| AnnaBridge | 171:3a7713b1edbc | 186 | /** |
| AnnaBridge | 171:3a7713b1edbc | 187 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 188 | */ |
| AnnaBridge | 171:3a7713b1edbc | 189 | |
| AnnaBridge | 171:3a7713b1edbc | 190 | /** @defgroup USART_Parity USART Parity |
| AnnaBridge | 171:3a7713b1edbc | 191 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 192 | */ |
| AnnaBridge | 171:3a7713b1edbc | 193 | #define USART_PARITY_NONE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 194 | #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| AnnaBridge | 171:3a7713b1edbc | 195 | #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| AnnaBridge | 171:3a7713b1edbc | 196 | /** |
| AnnaBridge | 171:3a7713b1edbc | 197 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 198 | */ |
| AnnaBridge | 171:3a7713b1edbc | 199 | |
| AnnaBridge | 171:3a7713b1edbc | 200 | /** @defgroup USART_Mode USART Mode |
| AnnaBridge | 171:3a7713b1edbc | 201 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 202 | */ |
| AnnaBridge | 171:3a7713b1edbc | 203 | #define USART_MODE_RX ((uint32_t)USART_CR1_RE) |
| AnnaBridge | 171:3a7713b1edbc | 204 | #define USART_MODE_TX ((uint32_t)USART_CR1_TE) |
| AnnaBridge | 171:3a7713b1edbc | 205 | #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
| AnnaBridge | 171:3a7713b1edbc | 206 | |
| AnnaBridge | 171:3a7713b1edbc | 207 | /** |
| AnnaBridge | 171:3a7713b1edbc | 208 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 209 | */ |
| AnnaBridge | 171:3a7713b1edbc | 210 | |
| AnnaBridge | 171:3a7713b1edbc | 211 | /** @defgroup USART_Clock USART Clock |
| AnnaBridge | 171:3a7713b1edbc | 212 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 213 | */ |
| AnnaBridge | 171:3a7713b1edbc | 214 | #define USART_CLOCK_DISABLE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 215 | #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) |
| AnnaBridge | 171:3a7713b1edbc | 216 | /** |
| AnnaBridge | 171:3a7713b1edbc | 217 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 218 | */ |
| AnnaBridge | 171:3a7713b1edbc | 219 | |
| AnnaBridge | 171:3a7713b1edbc | 220 | /** @defgroup USART_Clock_Polarity USART Clock Polarity |
| AnnaBridge | 171:3a7713b1edbc | 221 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 222 | */ |
| AnnaBridge | 171:3a7713b1edbc | 223 | #define USART_POLARITY_LOW (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 224 | #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) |
| AnnaBridge | 171:3a7713b1edbc | 225 | /** |
| AnnaBridge | 171:3a7713b1edbc | 226 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 227 | */ |
| AnnaBridge | 171:3a7713b1edbc | 228 | |
| AnnaBridge | 171:3a7713b1edbc | 229 | /** @defgroup USART_Clock_Phase USART Clock Phase |
| AnnaBridge | 171:3a7713b1edbc | 230 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 231 | */ |
| AnnaBridge | 171:3a7713b1edbc | 232 | #define USART_PHASE_1EDGE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 233 | #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) |
| AnnaBridge | 171:3a7713b1edbc | 234 | /** |
| AnnaBridge | 171:3a7713b1edbc | 235 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 236 | */ |
| AnnaBridge | 171:3a7713b1edbc | 237 | |
| AnnaBridge | 171:3a7713b1edbc | 238 | /** @defgroup USART_Last_Bit USART Last Bit |
| AnnaBridge | 171:3a7713b1edbc | 239 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 240 | */ |
| AnnaBridge | 171:3a7713b1edbc | 241 | #define USART_LASTBIT_DISABLE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 242 | #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) |
| AnnaBridge | 171:3a7713b1edbc | 243 | /** |
| AnnaBridge | 171:3a7713b1edbc | 244 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 245 | */ |
| AnnaBridge | 171:3a7713b1edbc | 246 | |
| AnnaBridge | 171:3a7713b1edbc | 247 | /** @defgroup USART_NACK_State USART NACK State |
| AnnaBridge | 171:3a7713b1edbc | 248 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 249 | */ |
| AnnaBridge | 171:3a7713b1edbc | 250 | #define USART_NACK_ENABLE ((uint32_t)USART_CR3_NACK) |
| AnnaBridge | 171:3a7713b1edbc | 251 | #define USART_NACK_DISABLE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 252 | /** |
| AnnaBridge | 171:3a7713b1edbc | 253 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 254 | */ |
| AnnaBridge | 171:3a7713b1edbc | 255 | |
| AnnaBridge | 171:3a7713b1edbc | 256 | /** @defgroup USART_Flags USART Flags |
| AnnaBridge | 171:3a7713b1edbc | 257 | * Elements values convention: 0xXXXX |
| AnnaBridge | 171:3a7713b1edbc | 258 | * - 0xXXXX : Flag mask in the SR register |
| AnnaBridge | 171:3a7713b1edbc | 259 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 260 | */ |
| AnnaBridge | 171:3a7713b1edbc | 261 | |
| AnnaBridge | 171:3a7713b1edbc | 262 | #define USART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
| AnnaBridge | 171:3a7713b1edbc | 263 | #define USART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
| AnnaBridge | 171:3a7713b1edbc | 264 | #define USART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
| AnnaBridge | 171:3a7713b1edbc | 265 | #define USART_FLAG_TC ((uint32_t)USART_SR_TC) |
| AnnaBridge | 171:3a7713b1edbc | 266 | #define USART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
| AnnaBridge | 171:3a7713b1edbc | 267 | #define USART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
| AnnaBridge | 171:3a7713b1edbc | 268 | #define USART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
| AnnaBridge | 171:3a7713b1edbc | 269 | #define USART_FLAG_NE ((uint32_t)USART_SR_NE) |
| AnnaBridge | 171:3a7713b1edbc | 270 | #define USART_FLAG_FE ((uint32_t)USART_SR_FE) |
| AnnaBridge | 171:3a7713b1edbc | 271 | #define USART_FLAG_PE ((uint32_t)USART_SR_PE) |
| AnnaBridge | 171:3a7713b1edbc | 272 | /** |
| AnnaBridge | 171:3a7713b1edbc | 273 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 274 | */ |
| AnnaBridge | 171:3a7713b1edbc | 275 | |
| AnnaBridge | 171:3a7713b1edbc | 276 | /** @defgroup USART_Interrupt_definition USART Interrupts Definition |
| AnnaBridge | 171:3a7713b1edbc | 277 | * Elements values convention: 0xY000XXXX |
| AnnaBridge | 171:3a7713b1edbc | 278 | * - XXXX : Interrupt mask (16 bits) in the Y register |
| AnnaBridge | 171:3a7713b1edbc | 279 | * - Y : Interrupt source register (4bits) |
| AnnaBridge | 171:3a7713b1edbc | 280 | * - 0001: CR1 register |
| AnnaBridge | 171:3a7713b1edbc | 281 | * - 0010: CR2 register |
| AnnaBridge | 171:3a7713b1edbc | 282 | * - 0011: CR3 register |
| AnnaBridge | 171:3a7713b1edbc | 283 | * |
| AnnaBridge | 171:3a7713b1edbc | 284 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 285 | */ |
| AnnaBridge | 171:3a7713b1edbc | 286 | |
| AnnaBridge | 171:3a7713b1edbc | 287 | #define USART_IT_PE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_PEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 288 | #define USART_IT_TXE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 289 | #define USART_IT_TC ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_TCIE)) |
| AnnaBridge | 171:3a7713b1edbc | 290 | #define USART_IT_RXNE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 291 | #define USART_IT_IDLE ((uint32_t)(USART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 292 | |
| AnnaBridge | 171:3a7713b1edbc | 293 | #define USART_IT_LBD ((uint32_t)(USART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE)) |
| AnnaBridge | 171:3a7713b1edbc | 294 | |
| AnnaBridge | 171:3a7713b1edbc | 295 | #define USART_IT_CTS ((uint32_t)(USART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE)) |
| AnnaBridge | 171:3a7713b1edbc | 296 | #define USART_IT_ERR ((uint32_t)(USART_CR3_REG_INDEX << 28 | USART_CR3_EIE)) |
| AnnaBridge | 171:3a7713b1edbc | 297 | |
| AnnaBridge | 171:3a7713b1edbc | 298 | |
| AnnaBridge | 171:3a7713b1edbc | 299 | /** |
| AnnaBridge | 171:3a7713b1edbc | 300 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 301 | */ |
| AnnaBridge | 171:3a7713b1edbc | 302 | |
| AnnaBridge | 171:3a7713b1edbc | 303 | /** |
| AnnaBridge | 171:3a7713b1edbc | 304 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 305 | */ |
| AnnaBridge | 171:3a7713b1edbc | 306 | |
| AnnaBridge | 171:3a7713b1edbc | 307 | |
| AnnaBridge | 171:3a7713b1edbc | 308 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 309 | /** @defgroup USART_Exported_Macros USART Exported Macros |
| AnnaBridge | 171:3a7713b1edbc | 310 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 311 | */ |
| AnnaBridge | 171:3a7713b1edbc | 312 | |
| AnnaBridge | 171:3a7713b1edbc | 313 | |
| AnnaBridge | 171:3a7713b1edbc | 314 | /** @brief Reset USART handle state |
| AnnaBridge | 171:3a7713b1edbc | 315 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 316 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 317 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 318 | */ |
| AnnaBridge | 171:3a7713b1edbc | 319 | #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) |
| AnnaBridge | 171:3a7713b1edbc | 320 | |
| AnnaBridge | 171:3a7713b1edbc | 321 | /** @brief Check whether the specified USART flag is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 322 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 323 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 324 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 171:3a7713b1edbc | 325 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 326 | * @arg USART_FLAG_TXE: Transmit data register empty flag |
| AnnaBridge | 171:3a7713b1edbc | 327 | * @arg USART_FLAG_TC: Transmission Complete flag |
| AnnaBridge | 171:3a7713b1edbc | 328 | * @arg USART_FLAG_RXNE: Receive data register not empty flag |
| AnnaBridge | 171:3a7713b1edbc | 329 | * @arg USART_FLAG_IDLE: Idle Line detection flag |
| AnnaBridge | 171:3a7713b1edbc | 330 | * @arg USART_FLAG_ORE: OverRun Error flag |
| AnnaBridge | 171:3a7713b1edbc | 331 | * @arg USART_FLAG_NE: Noise Error flag |
| AnnaBridge | 171:3a7713b1edbc | 332 | * @arg USART_FLAG_FE: Framing Error flag |
| AnnaBridge | 171:3a7713b1edbc | 333 | * @arg USART_FLAG_PE: Parity Error flag |
| AnnaBridge | 171:3a7713b1edbc | 334 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 171:3a7713b1edbc | 335 | */ |
| AnnaBridge | 171:3a7713b1edbc | 336 | |
| AnnaBridge | 171:3a7713b1edbc | 337 | #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 338 | |
| AnnaBridge | 171:3a7713b1edbc | 339 | /** @brief Clear the specified USART pending flags. |
| AnnaBridge | 171:3a7713b1edbc | 340 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 341 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 342 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 171:3a7713b1edbc | 343 | * This parameter can be any combination of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 344 | * @arg USART_FLAG_TC: Transmission Complete flag. |
| AnnaBridge | 171:3a7713b1edbc | 345 | * @arg USART_FLAG_RXNE: Receive data register not empty flag. |
| AnnaBridge | 171:3a7713b1edbc | 346 | * |
| AnnaBridge | 171:3a7713b1edbc | 347 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun |
| AnnaBridge | 171:3a7713b1edbc | 348 | * error) and IDLE (Idle line detected) flags are cleared by software |
| AnnaBridge | 171:3a7713b1edbc | 349 | * sequence: a read operation to USART_SR register followed by a read |
| AnnaBridge | 171:3a7713b1edbc | 350 | * operation to USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 351 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 352 | * @note TC flag can be also cleared by software sequence: a read operation to |
| AnnaBridge | 171:3a7713b1edbc | 353 | * USART_SR register followed by a write operation to USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 354 | * @note TXE flag is cleared only by a write to the USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 355 | * |
| AnnaBridge | 171:3a7713b1edbc | 356 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 357 | */ |
| AnnaBridge | 171:3a7713b1edbc | 358 | #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 359 | |
| AnnaBridge | 171:3a7713b1edbc | 360 | /** @brief Clear the USART PE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 361 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 362 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 363 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 364 | */ |
| AnnaBridge | 171:3a7713b1edbc | 365 | #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 366 | do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 367 | __IO uint32_t tmpreg; \ |
| AnnaBridge | 171:3a7713b1edbc | 368 | tmpreg = (__HANDLE__)->Instance->SR; \ |
| AnnaBridge | 171:3a7713b1edbc | 369 | tmpreg = (__HANDLE__)->Instance->DR; \ |
| AnnaBridge | 171:3a7713b1edbc | 370 | UNUSED(tmpreg); \ |
| AnnaBridge | 171:3a7713b1edbc | 371 | }while(0) |
| AnnaBridge | 171:3a7713b1edbc | 372 | |
| AnnaBridge | 171:3a7713b1edbc | 373 | |
| AnnaBridge | 171:3a7713b1edbc | 374 | /** @brief Clear the USART FE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 375 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 376 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 377 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 378 | */ |
| AnnaBridge | 171:3a7713b1edbc | 379 | #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 380 | |
| AnnaBridge | 171:3a7713b1edbc | 381 | /** @brief Clear the USART NE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 382 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 383 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 384 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 385 | */ |
| AnnaBridge | 171:3a7713b1edbc | 386 | #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 387 | |
| AnnaBridge | 171:3a7713b1edbc | 388 | /** @brief Clear the USART ORE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 389 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 390 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 391 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 392 | */ |
| AnnaBridge | 171:3a7713b1edbc | 393 | #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 394 | |
| AnnaBridge | 171:3a7713b1edbc | 395 | /** @brief Clear the USART IDLE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 396 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 397 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 398 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 399 | */ |
| AnnaBridge | 171:3a7713b1edbc | 400 | #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 401 | |
| AnnaBridge | 171:3a7713b1edbc | 402 | /** @brief Enable the specified Usart interrupts. |
| AnnaBridge | 171:3a7713b1edbc | 403 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 404 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 405 | * @param __INTERRUPT__: specifies the USART interrupt source to enable. |
| AnnaBridge | 171:3a7713b1edbc | 406 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 407 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 408 | * @arg USART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 171:3a7713b1edbc | 409 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 410 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 411 | * @arg USART_IT_PE: Parity Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 412 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 171:3a7713b1edbc | 413 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 414 | */ |
| AnnaBridge | 171:3a7713b1edbc | 415 | #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 416 | (((__INTERRUPT__) >> 28) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 417 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK))) |
| AnnaBridge | 171:3a7713b1edbc | 418 | |
| AnnaBridge | 171:3a7713b1edbc | 419 | |
| AnnaBridge | 171:3a7713b1edbc | 420 | /** @brief Disable the specified Usart interrupts. |
| AnnaBridge | 171:3a7713b1edbc | 421 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 422 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 423 | * @param __INTERRUPT__: specifies the USART interrupt source to disable. |
| AnnaBridge | 171:3a7713b1edbc | 424 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 425 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 426 | * @arg USART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 171:3a7713b1edbc | 427 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 428 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 429 | * @arg USART_IT_PE: Parity Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 430 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 171:3a7713b1edbc | 431 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 432 | */ |
| AnnaBridge | 171:3a7713b1edbc | 433 | #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == USART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 434 | (((__INTERRUPT__) >> 28) == USART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 435 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) |
| AnnaBridge | 171:3a7713b1edbc | 436 | |
| AnnaBridge | 171:3a7713b1edbc | 437 | |
| AnnaBridge | 171:3a7713b1edbc | 438 | |
| AnnaBridge | 171:3a7713b1edbc | 439 | /** @brief Check whether the specified Usart interrupt has occurred or not. |
| AnnaBridge | 171:3a7713b1edbc | 440 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 441 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 442 | * @param __IT__: specifies the USART interrupt source to check. |
| AnnaBridge | 171:3a7713b1edbc | 443 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 444 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 445 | * @arg USART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 171:3a7713b1edbc | 446 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 447 | * @arg USART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 448 | * @arg USART_IT_ERR: Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 449 | * @arg USART_IT_PE: Parity Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 450 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 171:3a7713b1edbc | 451 | */ |
| AnnaBridge | 171:3a7713b1edbc | 452 | #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == USART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == USART_CR2_REG_INDEX)? \ |
| AnnaBridge | 171:3a7713b1edbc | 453 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) |
| AnnaBridge | 171:3a7713b1edbc | 454 | |
| AnnaBridge | 171:3a7713b1edbc | 455 | /** @brief Enables the USART one bit sample method |
| AnnaBridge | 171:3a7713b1edbc | 456 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 457 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 458 | */ |
| AnnaBridge | 171:3a7713b1edbc | 459 | #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR3, (USART_CR3_ONEBIT)) |
| AnnaBridge | 171:3a7713b1edbc | 460 | |
| AnnaBridge | 171:3a7713b1edbc | 461 | /** @brief Disables the UART one bit sample method |
| AnnaBridge | 171:3a7713b1edbc | 462 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 463 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 464 | */ |
| AnnaBridge | 171:3a7713b1edbc | 465 | #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR3,(USART_CR3_ONEBIT)) |
| AnnaBridge | 171:3a7713b1edbc | 466 | |
| AnnaBridge | 171:3a7713b1edbc | 467 | /** @brief Enable USART |
| AnnaBridge | 171:3a7713b1edbc | 468 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 469 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 470 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 471 | */ |
| AnnaBridge | 171:3a7713b1edbc | 472 | #define __HAL_USART_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE)) |
| AnnaBridge | 171:3a7713b1edbc | 473 | |
| AnnaBridge | 171:3a7713b1edbc | 474 | /** @brief Disable USART |
| AnnaBridge | 171:3a7713b1edbc | 475 | * @param __HANDLE__: specifies the USART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 476 | * USART Handle selects the USARTx peripheral (USART availability and x value depending on device). |
| AnnaBridge | 171:3a7713b1edbc | 477 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 478 | */ |
| AnnaBridge | 171:3a7713b1edbc | 479 | #define __HAL_USART_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1,(USART_CR1_UE)) |
| AnnaBridge | 171:3a7713b1edbc | 480 | |
| AnnaBridge | 171:3a7713b1edbc | 481 | |
| AnnaBridge | 171:3a7713b1edbc | 482 | /** |
| AnnaBridge | 171:3a7713b1edbc | 483 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 484 | */ |
| AnnaBridge | 171:3a7713b1edbc | 485 | |
| AnnaBridge | 171:3a7713b1edbc | 486 | |
| AnnaBridge | 171:3a7713b1edbc | 487 | /* Private macros --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 488 | /** @defgroup USART_Private_Macros USART Private Macros |
| AnnaBridge | 171:3a7713b1edbc | 489 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 490 | */ |
| AnnaBridge | 171:3a7713b1edbc | 491 | |
| AnnaBridge | 171:3a7713b1edbc | 492 | #define USART_CR1_REG_INDEX 1 |
| AnnaBridge | 171:3a7713b1edbc | 493 | #define USART_CR2_REG_INDEX 2 |
| AnnaBridge | 171:3a7713b1edbc | 494 | #define USART_CR3_REG_INDEX 3 |
| AnnaBridge | 171:3a7713b1edbc | 495 | |
| AnnaBridge | 171:3a7713b1edbc | 496 | #define USART_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25)/(2*(__BAUD__))) |
| AnnaBridge | 171:3a7713b1edbc | 497 | #define USART_DIVMANT(__PCLK__, __BAUD__) (USART_DIV((__PCLK__), (__BAUD__))/100) |
| AnnaBridge | 171:3a7713b1edbc | 498 | #define USART_DIVFRAQ(__PCLK__, __BAUD__) (((USART_DIV((__PCLK__), (__BAUD__)) - (USART_DIVMANT((__PCLK__), (__BAUD__)) * 100)) * 16 + 50) / 100) |
| AnnaBridge | 171:3a7713b1edbc | 499 | #define USART_BRR(__PCLK__, __BAUD__) ((USART_DIVMANT((__PCLK__), (__BAUD__)) << 4)|(USART_DIVFRAQ((__PCLK__), (__BAUD__)) & 0x07)) |
| AnnaBridge | 171:3a7713b1edbc | 500 | |
| AnnaBridge | 171:3a7713b1edbc | 501 | /** Check USART Baud rate |
| AnnaBridge | 171:3a7713b1edbc | 502 | * __BAUDRATE__: Baudrate specified by the user |
| AnnaBridge | 171:3a7713b1edbc | 503 | * The maximum Baud Rate is derived from the maximum clock on APB (i.e. 32 MHz) |
| AnnaBridge | 171:3a7713b1edbc | 504 | * divided by the smallest oversampling used on the USART (i.e. 8) |
| AnnaBridge | 171:3a7713b1edbc | 505 | * return : TRUE or FALSE |
| AnnaBridge | 171:3a7713b1edbc | 506 | */ |
| AnnaBridge | 171:3a7713b1edbc | 507 | #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001) |
| AnnaBridge | 171:3a7713b1edbc | 508 | |
| AnnaBridge | 171:3a7713b1edbc | 509 | #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \ |
| AnnaBridge | 171:3a7713b1edbc | 510 | ((LENGTH) == USART_WORDLENGTH_9B)) |
| AnnaBridge | 171:3a7713b1edbc | 511 | |
| AnnaBridge | 171:3a7713b1edbc | 512 | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 513 | ((STOPBITS) == USART_STOPBITS_0_5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 514 | ((STOPBITS) == USART_STOPBITS_1_5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 515 | ((STOPBITS) == USART_STOPBITS_2)) |
| AnnaBridge | 171:3a7713b1edbc | 516 | |
| AnnaBridge | 171:3a7713b1edbc | 517 | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 518 | ((PARITY) == USART_PARITY_EVEN) || \ |
| AnnaBridge | 171:3a7713b1edbc | 519 | ((PARITY) == USART_PARITY_ODD)) |
| AnnaBridge | 171:3a7713b1edbc | 520 | |
| AnnaBridge | 171:3a7713b1edbc | 521 | #define IS_USART_MODE(MODE) ((((MODE) & (~((uint32_t)USART_MODE_TX_RX))) == 0x00U) && ((MODE) != 0x00000000U)) |
| AnnaBridge | 171:3a7713b1edbc | 522 | |
| AnnaBridge | 171:3a7713b1edbc | 523 | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 524 | ((CLOCK) == USART_CLOCK_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 525 | |
| AnnaBridge | 171:3a7713b1edbc | 526 | #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH)) |
| AnnaBridge | 171:3a7713b1edbc | 527 | |
| AnnaBridge | 171:3a7713b1edbc | 528 | #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE)) |
| AnnaBridge | 171:3a7713b1edbc | 529 | |
| AnnaBridge | 171:3a7713b1edbc | 530 | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 531 | ((LASTBIT) == USART_LASTBIT_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 532 | |
| AnnaBridge | 171:3a7713b1edbc | 533 | #define IS_USART_NACK_STATE(NACK) (((NACK) == USART_NACK_ENABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 534 | ((NACK) == USART_NACK_DISABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 535 | |
| AnnaBridge | 171:3a7713b1edbc | 536 | /** USART interruptions flag mask |
| AnnaBridge | 171:3a7713b1edbc | 537 | * |
| AnnaBridge | 171:3a7713b1edbc | 538 | */ |
| AnnaBridge | 171:3a7713b1edbc | 539 | #define USART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \ |
| AnnaBridge | 171:3a7713b1edbc | 540 | USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE ) |
| AnnaBridge | 171:3a7713b1edbc | 541 | |
| AnnaBridge | 171:3a7713b1edbc | 542 | /** |
| AnnaBridge | 171:3a7713b1edbc | 543 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 544 | */ |
| AnnaBridge | 171:3a7713b1edbc | 545 | |
| AnnaBridge | 171:3a7713b1edbc | 546 | |
| AnnaBridge | 171:3a7713b1edbc | 547 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 548 | |
| AnnaBridge | 171:3a7713b1edbc | 549 | /** @addtogroup USART_Exported_Functions USART Exported Functions |
| AnnaBridge | 171:3a7713b1edbc | 550 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 551 | */ |
| AnnaBridge | 171:3a7713b1edbc | 552 | |
| AnnaBridge | 171:3a7713b1edbc | 553 | /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 171:3a7713b1edbc | 554 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 555 | */ |
| AnnaBridge | 171:3a7713b1edbc | 556 | |
| AnnaBridge | 171:3a7713b1edbc | 557 | /* Initialization and de-initialization functions ******************************/ |
| AnnaBridge | 171:3a7713b1edbc | 558 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 559 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 560 | void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 561 | void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 562 | |
| AnnaBridge | 171:3a7713b1edbc | 563 | /** |
| AnnaBridge | 171:3a7713b1edbc | 564 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 565 | */ |
| AnnaBridge | 171:3a7713b1edbc | 566 | |
| AnnaBridge | 171:3a7713b1edbc | 567 | /** @addtogroup USART_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 171:3a7713b1edbc | 568 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 569 | */ |
| AnnaBridge | 171:3a7713b1edbc | 570 | |
| AnnaBridge | 171:3a7713b1edbc | 571 | /* IO operation functions *******************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 572 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 573 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 574 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 575 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 576 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 577 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 578 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 579 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 580 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 581 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 582 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 583 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 584 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 585 | void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 586 | void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 587 | void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 588 | void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 589 | void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 590 | void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 591 | |
| AnnaBridge | 171:3a7713b1edbc | 592 | /** |
| AnnaBridge | 171:3a7713b1edbc | 593 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 594 | */ |
| AnnaBridge | 171:3a7713b1edbc | 595 | |
| AnnaBridge | 171:3a7713b1edbc | 596 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 597 | |
| AnnaBridge | 171:3a7713b1edbc | 598 | /** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Errors functions |
| AnnaBridge | 171:3a7713b1edbc | 599 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 600 | */ |
| AnnaBridge | 171:3a7713b1edbc | 601 | |
| AnnaBridge | 171:3a7713b1edbc | 602 | /* Peripheral State and Error functions ***************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 603 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 604 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
| AnnaBridge | 171:3a7713b1edbc | 605 | |
| AnnaBridge | 171:3a7713b1edbc | 606 | /** |
| AnnaBridge | 171:3a7713b1edbc | 607 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 608 | */ |
| AnnaBridge | 171:3a7713b1edbc | 609 | |
| AnnaBridge | 171:3a7713b1edbc | 610 | /** |
| AnnaBridge | 171:3a7713b1edbc | 611 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 612 | */ |
| AnnaBridge | 171:3a7713b1edbc | 613 | |
| AnnaBridge | 171:3a7713b1edbc | 614 | /** |
| AnnaBridge | 171:3a7713b1edbc | 615 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 616 | */ |
| AnnaBridge | 171:3a7713b1edbc | 617 | |
| AnnaBridge | 171:3a7713b1edbc | 618 | /** |
| AnnaBridge | 171:3a7713b1edbc | 619 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 620 | */ |
| AnnaBridge | 171:3a7713b1edbc | 621 | |
| AnnaBridge | 171:3a7713b1edbc | 622 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 623 | } |
| AnnaBridge | 171:3a7713b1edbc | 624 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 625 | |
| AnnaBridge | 171:3a7713b1edbc | 626 | #endif /* __STM32L1xx_HAL_USART_H */ |
| AnnaBridge | 171:3a7713b1edbc | 627 | |
| AnnaBridge | 171:3a7713b1edbc | 628 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
