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TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_STD/stm32l1xx_hal_uart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32l1xx_hal_uart.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief This file contains all the functions prototypes for the UART
AnnaBridge 171:3a7713b1edbc 6 * firmware library.
AnnaBridge 171:3a7713b1edbc 7 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 8 * @attention
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 13 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 14 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 15 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 17 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 18 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 20 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 21 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 22 *
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 *
AnnaBridge 171:3a7713b1edbc 34 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 35 */
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 38 #ifndef __STM32L1xx_HAL_UART_H
AnnaBridge 171:3a7713b1edbc 39 #define __STM32L1xx_HAL_UART_H
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 42 extern "C" {
AnnaBridge 171:3a7713b1edbc 43 #endif
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 46 #include "stm32l1xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 /** @addtogroup STM32L1xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 49 * @{
AnnaBridge 171:3a7713b1edbc 50 */
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /** @addtogroup UART
AnnaBridge 171:3a7713b1edbc 53 * @{
AnnaBridge 171:3a7713b1edbc 54 */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 57 /** @defgroup UART_Exported_Types UART Exported Types
AnnaBridge 171:3a7713b1edbc 58 * @{
AnnaBridge 171:3a7713b1edbc 59 */
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /**
AnnaBridge 171:3a7713b1edbc 63 * @brief UART Init Structure definition
AnnaBridge 171:3a7713b1edbc 64 */
AnnaBridge 171:3a7713b1edbc 65 typedef struct
AnnaBridge 171:3a7713b1edbc 66 {
AnnaBridge 171:3a7713b1edbc 67 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
AnnaBridge 171:3a7713b1edbc 68 The baud rate is computed using the following formula:
AnnaBridge 171:3a7713b1edbc 69 - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate)))
AnnaBridge 171:3a7713b1edbc 70 - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5
AnnaBridge 171:3a7713b1edbc 71 Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */
AnnaBridge 171:3a7713b1edbc 72
AnnaBridge 171:3a7713b1edbc 73 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 171:3a7713b1edbc 74 This parameter can be a value of @ref UART_Word_Length */
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 171:3a7713b1edbc 77 This parameter can be a value of @ref UART_Stop_Bits */
AnnaBridge 171:3a7713b1edbc 78
AnnaBridge 171:3a7713b1edbc 79 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 171:3a7713b1edbc 80 This parameter can be a value of @ref UART_Parity
AnnaBridge 171:3a7713b1edbc 81 @note When parity is enabled, the computed parity is inserted
AnnaBridge 171:3a7713b1edbc 82 at the MSB position of the transmitted data (9th bit when
AnnaBridge 171:3a7713b1edbc 83 the word length is set to 9 data bits; 8th bit when the
AnnaBridge 171:3a7713b1edbc 84 word length is set to 8 data bits). */
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 87 This parameter can be a value of @ref UART_Mode */
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 uint32_t HwFlowCtl; /*!< Specifies wether the hardware flow control mode is enabled
AnnaBridge 171:3a7713b1edbc 90 or disabled.
AnnaBridge 171:3a7713b1edbc 91 This parameter can be a value of @ref UART_Hardware_Flow_Control */
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 uint32_t OverSampling; /*!< Specifies wether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8).
AnnaBridge 171:3a7713b1edbc 94 This parameter can be a value of @ref UART_Over_Sampling */
AnnaBridge 171:3a7713b1edbc 95 }UART_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /**
AnnaBridge 171:3a7713b1edbc 98 * @brief HAL UART State structures definition
AnnaBridge 171:3a7713b1edbc 99 */
AnnaBridge 171:3a7713b1edbc 100 typedef enum
AnnaBridge 171:3a7713b1edbc 101 {
AnnaBridge 171:3a7713b1edbc 102 HAL_UART_STATE_RESET = 0x00, /*!< Peripheral is not initialized */
AnnaBridge 171:3a7713b1edbc 103 HAL_UART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 104 HAL_UART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
AnnaBridge 171:3a7713b1edbc 105 HAL_UART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
AnnaBridge 171:3a7713b1edbc 106 HAL_UART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
AnnaBridge 171:3a7713b1edbc 107 HAL_UART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
AnnaBridge 171:3a7713b1edbc 108 HAL_UART_STATE_TIMEOUT = 0x03, /*!< Timeout state */
AnnaBridge 171:3a7713b1edbc 109 HAL_UART_STATE_ERROR = 0x04 /*!< Error */
AnnaBridge 171:3a7713b1edbc 110 }HAL_UART_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 /**
AnnaBridge 171:3a7713b1edbc 113 * @brief UART handle Structure definition
AnnaBridge 171:3a7713b1edbc 114 */
AnnaBridge 171:3a7713b1edbc 115 typedef struct
AnnaBridge 171:3a7713b1edbc 116 {
AnnaBridge 171:3a7713b1edbc 117 USART_TypeDef *Instance; /*!< UART registers base address */
AnnaBridge 171:3a7713b1edbc 118
AnnaBridge 171:3a7713b1edbc 119 UART_InitTypeDef Init; /*!< UART communication parameters */
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 uint16_t TxXferSize; /*!< UART Tx Transfer size */
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 uint16_t RxXferSize; /*!< UART Rx Transfer size */
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
AnnaBridge 171:3a7713b1edbc 134
AnnaBridge 171:3a7713b1edbc 135 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 HAL_LockTypeDef Lock; /*!< Locking object */
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 __IO HAL_UART_StateTypeDef State; /*!< UART communication state */
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 __IO uint32_t ErrorCode; /*!< UART Error code */
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 }UART_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 144
AnnaBridge 171:3a7713b1edbc 145 /**
AnnaBridge 171:3a7713b1edbc 146 * @}
AnnaBridge 171:3a7713b1edbc 147 */
AnnaBridge 171:3a7713b1edbc 148
AnnaBridge 171:3a7713b1edbc 149 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 150 /** @defgroup UART_Exported_Constants UART Exported constants
AnnaBridge 171:3a7713b1edbc 151 * @{
AnnaBridge 171:3a7713b1edbc 152 */
AnnaBridge 171:3a7713b1edbc 153
AnnaBridge 171:3a7713b1edbc 154 /** @defgroup UART_Error_Codes UART Error Codes
AnnaBridge 171:3a7713b1edbc 155 * @{
AnnaBridge 171:3a7713b1edbc 156 */
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 #define HAL_UART_ERROR_NONE (0x00U) /*!< No error */
AnnaBridge 171:3a7713b1edbc 159 #define HAL_UART_ERROR_PE (0x01U) /*!< Parity error */
AnnaBridge 171:3a7713b1edbc 160 #define HAL_UART_ERROR_NE (0x02U) /*!< Noise error */
AnnaBridge 171:3a7713b1edbc 161 #define HAL_UART_ERROR_FE (0x04U) /*!< frame error */
AnnaBridge 171:3a7713b1edbc 162 #define HAL_UART_ERROR_ORE (0x08U) /*!< Overrun error */
AnnaBridge 171:3a7713b1edbc 163 #define HAL_UART_ERROR_DMA (0x10U) /*!< DMA transfer error */
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 /**
AnnaBridge 171:3a7713b1edbc 166 * @}
AnnaBridge 171:3a7713b1edbc 167 */
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 /** @defgroup UART_Word_Length UART Word Length
AnnaBridge 171:3a7713b1edbc 170 * @{
AnnaBridge 171:3a7713b1edbc 171 */
AnnaBridge 171:3a7713b1edbc 172 #define UART_WORDLENGTH_8B (0x00000000U)
AnnaBridge 171:3a7713b1edbc 173 #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
AnnaBridge 171:3a7713b1edbc 174 /**
AnnaBridge 171:3a7713b1edbc 175 * @}
AnnaBridge 171:3a7713b1edbc 176 */
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
AnnaBridge 171:3a7713b1edbc 179 * @{
AnnaBridge 171:3a7713b1edbc 180 */
AnnaBridge 171:3a7713b1edbc 181 #define UART_STOPBITS_1 (0x00000000U)
AnnaBridge 171:3a7713b1edbc 182 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1)
AnnaBridge 171:3a7713b1edbc 183 /**
AnnaBridge 171:3a7713b1edbc 184 * @}
AnnaBridge 171:3a7713b1edbc 185 */
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 /** @defgroup UART_Parity UART Parity
AnnaBridge 171:3a7713b1edbc 188 * @{
AnnaBridge 171:3a7713b1edbc 189 */
AnnaBridge 171:3a7713b1edbc 190 #define UART_PARITY_NONE (0x00000000U)
AnnaBridge 171:3a7713b1edbc 191 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
AnnaBridge 171:3a7713b1edbc 192 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
AnnaBridge 171:3a7713b1edbc 193 /**
AnnaBridge 171:3a7713b1edbc 194 * @}
AnnaBridge 171:3a7713b1edbc 195 */
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
AnnaBridge 171:3a7713b1edbc 198 * @{
AnnaBridge 171:3a7713b1edbc 199 */
AnnaBridge 171:3a7713b1edbc 200 #define UART_HWCONTROL_NONE (0x00000000U)
AnnaBridge 171:3a7713b1edbc 201 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE)
AnnaBridge 171:3a7713b1edbc 202 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE)
AnnaBridge 171:3a7713b1edbc 203 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE))
AnnaBridge 171:3a7713b1edbc 204 /**
AnnaBridge 171:3a7713b1edbc 205 * @}
AnnaBridge 171:3a7713b1edbc 206 */
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /** @defgroup UART_Mode UART Transfer Mode
AnnaBridge 171:3a7713b1edbc 209 * @{
AnnaBridge 171:3a7713b1edbc 210 */
AnnaBridge 171:3a7713b1edbc 211 #define UART_MODE_RX ((uint32_t)USART_CR1_RE)
AnnaBridge 171:3a7713b1edbc 212 #define UART_MODE_TX ((uint32_t)USART_CR1_TE)
AnnaBridge 171:3a7713b1edbc 213 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 /**
AnnaBridge 171:3a7713b1edbc 216 * @}
AnnaBridge 171:3a7713b1edbc 217 */
AnnaBridge 171:3a7713b1edbc 218
AnnaBridge 171:3a7713b1edbc 219 /** @defgroup UART_State UART State
AnnaBridge 171:3a7713b1edbc 220 * @{
AnnaBridge 171:3a7713b1edbc 221 */
AnnaBridge 171:3a7713b1edbc 222 #define UART_STATE_DISABLE (0x00000000U)
AnnaBridge 171:3a7713b1edbc 223 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE)
AnnaBridge 171:3a7713b1edbc 224 /**
AnnaBridge 171:3a7713b1edbc 225 * @}
AnnaBridge 171:3a7713b1edbc 226 */
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /** @defgroup UART_Over_Sampling UART Over Sampling
AnnaBridge 171:3a7713b1edbc 229 * @{
AnnaBridge 171:3a7713b1edbc 230 */
AnnaBridge 171:3a7713b1edbc 231 #define UART_OVERSAMPLING_16 (0x00000000U)
AnnaBridge 171:3a7713b1edbc 232 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8)
AnnaBridge 171:3a7713b1edbc 233 /**
AnnaBridge 171:3a7713b1edbc 234 * @}
AnnaBridge 171:3a7713b1edbc 235 */
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length
AnnaBridge 171:3a7713b1edbc 238 * @{
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240 #define UART_LINBREAKDETECTLENGTH_10B (0x00000000U)
AnnaBridge 171:3a7713b1edbc 241 #define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL)
AnnaBridge 171:3a7713b1edbc 242 /**
AnnaBridge 171:3a7713b1edbc 243 * @}
AnnaBridge 171:3a7713b1edbc 244 */
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 /** @defgroup UART_WakeUp_functions UART Wakeup Functions
AnnaBridge 171:3a7713b1edbc 247 * @{
AnnaBridge 171:3a7713b1edbc 248 */
AnnaBridge 171:3a7713b1edbc 249 #define UART_WAKEUPMETHOD_IDLELINE (0x00000000U)
AnnaBridge 171:3a7713b1edbc 250 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE)
AnnaBridge 171:3a7713b1edbc 251 /**
AnnaBridge 171:3a7713b1edbc 252 * @}
AnnaBridge 171:3a7713b1edbc 253 */
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 /** @defgroup UART_Flags UART FLags
AnnaBridge 171:3a7713b1edbc 256 * Elements values convention: 0xXXXX
AnnaBridge 171:3a7713b1edbc 257 * - 0xXXXX : Flag mask in the SR register
AnnaBridge 171:3a7713b1edbc 258 * @{
AnnaBridge 171:3a7713b1edbc 259 */
AnnaBridge 171:3a7713b1edbc 260 #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS)
AnnaBridge 171:3a7713b1edbc 261 #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD)
AnnaBridge 171:3a7713b1edbc 262 #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE)
AnnaBridge 171:3a7713b1edbc 263 #define UART_FLAG_TC ((uint32_t)USART_SR_TC)
AnnaBridge 171:3a7713b1edbc 264 #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE)
AnnaBridge 171:3a7713b1edbc 265 #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE)
AnnaBridge 171:3a7713b1edbc 266 #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE)
AnnaBridge 171:3a7713b1edbc 267 #define UART_FLAG_NE ((uint32_t)USART_SR_NE)
AnnaBridge 171:3a7713b1edbc 268 #define UART_FLAG_FE ((uint32_t)USART_SR_FE)
AnnaBridge 171:3a7713b1edbc 269 #define UART_FLAG_PE ((uint32_t)USART_SR_PE)
AnnaBridge 171:3a7713b1edbc 270 /**
AnnaBridge 171:3a7713b1edbc 271 * @}
AnnaBridge 171:3a7713b1edbc 272 */
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 /** @defgroup UART_Interrupt_definition UART Interrupt Definitions
AnnaBridge 171:3a7713b1edbc 275 * Elements values convention: 0xY000XXXX
AnnaBridge 171:3a7713b1edbc 276 * - XXXX : Interrupt mask (16 bits) in the Y register
AnnaBridge 171:3a7713b1edbc 277 * - Y : Interrupt source register (2bits)
AnnaBridge 171:3a7713b1edbc 278 * - 0001: CR1 register
AnnaBridge 171:3a7713b1edbc 279 * - 0010: CR2 register
AnnaBridge 171:3a7713b1edbc 280 * - 0011: CR3 register
AnnaBridge 171:3a7713b1edbc 281 *
AnnaBridge 171:3a7713b1edbc 282 * @{
AnnaBridge 171:3a7713b1edbc 283 */
AnnaBridge 171:3a7713b1edbc 284
AnnaBridge 171:3a7713b1edbc 285 #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_PEIE))
AnnaBridge 171:3a7713b1edbc 286 #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TXEIE))
AnnaBridge 171:3a7713b1edbc 287 #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_TCIE))
AnnaBridge 171:3a7713b1edbc 288 #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_RXNEIE))
AnnaBridge 171:3a7713b1edbc 289 #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28 | USART_CR1_IDLEIE))
AnnaBridge 171:3a7713b1edbc 290
AnnaBridge 171:3a7713b1edbc 291 #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28 | USART_CR2_LBDIE))
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_CTSIE))
AnnaBridge 171:3a7713b1edbc 294 #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28 | USART_CR3_EIE))
AnnaBridge 171:3a7713b1edbc 295
AnnaBridge 171:3a7713b1edbc 296 /**
AnnaBridge 171:3a7713b1edbc 297 * @}
AnnaBridge 171:3a7713b1edbc 298 */
AnnaBridge 171:3a7713b1edbc 299
AnnaBridge 171:3a7713b1edbc 300 /**
AnnaBridge 171:3a7713b1edbc 301 * @}
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 306 /** @defgroup UART_Exported_Macros UART Exported Macros
AnnaBridge 171:3a7713b1edbc 307 * @{
AnnaBridge 171:3a7713b1edbc 308 */
AnnaBridge 171:3a7713b1edbc 309
AnnaBridge 171:3a7713b1edbc 310
AnnaBridge 171:3a7713b1edbc 311 /** @brief Reset UART handle state
AnnaBridge 171:3a7713b1edbc 312 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 313 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 314 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 315 * @retval None
AnnaBridge 171:3a7713b1edbc 316 */
AnnaBridge 171:3a7713b1edbc 317 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_UART_STATE_RESET)
AnnaBridge 171:3a7713b1edbc 318
AnnaBridge 171:3a7713b1edbc 319 /** @brief Flush the UART DR register
AnnaBridge 171:3a7713b1edbc 320 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 321 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 322 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 323 */
AnnaBridge 171:3a7713b1edbc 324 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR)
AnnaBridge 171:3a7713b1edbc 325
AnnaBridge 171:3a7713b1edbc 326 /** @brief Check whether the specified UART flag is set or not.
AnnaBridge 171:3a7713b1edbc 327 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 328 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 329 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 330 * @param __FLAG__: specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 331 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 332 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5)
AnnaBridge 171:3a7713b1edbc 333 * @arg UART_FLAG_LBD: LIN Break detection flag
AnnaBridge 171:3a7713b1edbc 334 * @arg UART_FLAG_TXE: Transmit data register empty flag
AnnaBridge 171:3a7713b1edbc 335 * @arg UART_FLAG_TC: Transmission Complete flag
AnnaBridge 171:3a7713b1edbc 336 * @arg UART_FLAG_RXNE: Receive data register not empty flag
AnnaBridge 171:3a7713b1edbc 337 * @arg UART_FLAG_IDLE: Idle Line detection flag
AnnaBridge 171:3a7713b1edbc 338 * @arg UART_FLAG_ORE: OverRun Error flag
AnnaBridge 171:3a7713b1edbc 339 * @arg UART_FLAG_NE: Noise Error flag
AnnaBridge 171:3a7713b1edbc 340 * @arg UART_FLAG_FE: Framing Error flag
AnnaBridge 171:3a7713b1edbc 341 * @arg UART_FLAG_PE: Parity Error flag
AnnaBridge 171:3a7713b1edbc 342 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
AnnaBridge 171:3a7713b1edbc 345
AnnaBridge 171:3a7713b1edbc 346 /** @brief Clear the specified UART pending flag.
AnnaBridge 171:3a7713b1edbc 347 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 348 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 349 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 350 * @param __FLAG__: specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 351 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 352 * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5).
AnnaBridge 171:3a7713b1edbc 353 * @arg UART_FLAG_LBD: LIN Break detection flag.
AnnaBridge 171:3a7713b1edbc 354 * @arg UART_FLAG_TC: Transmission Complete flag.
AnnaBridge 171:3a7713b1edbc 355 * @arg UART_FLAG_RXNE: Receive data register not empty flag.
AnnaBridge 171:3a7713b1edbc 356 *
AnnaBridge 171:3a7713b1edbc 357 * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun
AnnaBridge 171:3a7713b1edbc 358 * error) and IDLE (Idle line detected) flags are cleared by software
AnnaBridge 171:3a7713b1edbc 359 * sequence: a read operation to USART_SR register followed by a read
AnnaBridge 171:3a7713b1edbc 360 * operation to USART_DR register.
AnnaBridge 171:3a7713b1edbc 361 * @note RXNE flag can be also cleared by a read to the USART_DR register.
AnnaBridge 171:3a7713b1edbc 362 * @note TC flag can be also cleared by software sequence: a read operation to
AnnaBridge 171:3a7713b1edbc 363 * USART_SR register followed by a write operation to USART_DR register.
AnnaBridge 171:3a7713b1edbc 364 * @note TXE flag is cleared only by a write to the USART_DR register.
AnnaBridge 171:3a7713b1edbc 365 *
AnnaBridge 171:3a7713b1edbc 366 * @retval None
AnnaBridge 171:3a7713b1edbc 367 */
AnnaBridge 171:3a7713b1edbc 368 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 /** @brief Clear the UART PE pending flag.
AnnaBridge 171:3a7713b1edbc 371 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 372 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 373 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 374 * @retval None
AnnaBridge 171:3a7713b1edbc 375 */
AnnaBridge 171:3a7713b1edbc 376 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 377 do{ \
AnnaBridge 171:3a7713b1edbc 378 __IO uint32_t tmpreg; \
AnnaBridge 171:3a7713b1edbc 379 tmpreg = (__HANDLE__)->Instance->SR; \
AnnaBridge 171:3a7713b1edbc 380 tmpreg = (__HANDLE__)->Instance->DR; \
AnnaBridge 171:3a7713b1edbc 381 UNUSED(tmpreg); \
AnnaBridge 171:3a7713b1edbc 382 }while(0)
AnnaBridge 171:3a7713b1edbc 383
AnnaBridge 171:3a7713b1edbc 384
AnnaBridge 171:3a7713b1edbc 385
AnnaBridge 171:3a7713b1edbc 386 /** @brief Clear the UART FE pending flag.
AnnaBridge 171:3a7713b1edbc 387 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 388 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 389 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 390 * @retval None
AnnaBridge 171:3a7713b1edbc 391 */
AnnaBridge 171:3a7713b1edbc 392 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
AnnaBridge 171:3a7713b1edbc 393
AnnaBridge 171:3a7713b1edbc 394 /** @brief Clear the UART NE pending flag.
AnnaBridge 171:3a7713b1edbc 395 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 396 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 397 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 398 * @retval None
AnnaBridge 171:3a7713b1edbc 399 */
AnnaBridge 171:3a7713b1edbc 400 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
AnnaBridge 171:3a7713b1edbc 401
AnnaBridge 171:3a7713b1edbc 402 /** @brief Clear the UART ORE pending flag.
AnnaBridge 171:3a7713b1edbc 403 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 404 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 405 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 406 * @retval None
AnnaBridge 171:3a7713b1edbc 407 */
AnnaBridge 171:3a7713b1edbc 408 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
AnnaBridge 171:3a7713b1edbc 409
AnnaBridge 171:3a7713b1edbc 410 /** @brief Clear the UART IDLE pending flag.
AnnaBridge 171:3a7713b1edbc 411 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 412 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 413 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 414 * @retval None
AnnaBridge 171:3a7713b1edbc 415 */
AnnaBridge 171:3a7713b1edbc 416 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__)
AnnaBridge 171:3a7713b1edbc 417
AnnaBridge 171:3a7713b1edbc 418 /** @brief Enable the specified UART interrupt.
AnnaBridge 171:3a7713b1edbc 419 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 420 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 421 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 422 * @param __INTERRUPT__: specifies the UART interrupt source to enable.
AnnaBridge 171:3a7713b1edbc 423 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 424 * @arg UART_IT_CTS: CTS change interrupt
AnnaBridge 171:3a7713b1edbc 425 * @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge 171:3a7713b1edbc 426 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 427 * @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 428 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 429 * @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 430 * @arg UART_IT_PE: Parity Error interrupt
AnnaBridge 171:3a7713b1edbc 431 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
AnnaBridge 171:3a7713b1edbc 432 * @retval None
AnnaBridge 171:3a7713b1edbc 433 */
AnnaBridge 171:3a7713b1edbc 434 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 171:3a7713b1edbc 435 (((__INTERRUPT__) >> 28) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 171:3a7713b1edbc 436 ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK)))
AnnaBridge 171:3a7713b1edbc 437
AnnaBridge 171:3a7713b1edbc 438
AnnaBridge 171:3a7713b1edbc 439 /** @brief Disable the specified UART interrupt.
AnnaBridge 171:3a7713b1edbc 440 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 441 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 442 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 443 * @param __INTERRUPT__: specifies the UART interrupt source to disable.
AnnaBridge 171:3a7713b1edbc 444 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 445 * @arg UART_IT_CTS: CTS change interrupt
AnnaBridge 171:3a7713b1edbc 446 * @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge 171:3a7713b1edbc 447 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 448 * @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 449 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 450 * @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 451 * @arg UART_IT_PE: Parity Error interrupt
AnnaBridge 171:3a7713b1edbc 452 * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
AnnaBridge 171:3a7713b1edbc 453 * @retval None
AnnaBridge 171:3a7713b1edbc 454 */
AnnaBridge 171:3a7713b1edbc 455 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == UART_CR1_REG_INDEX)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 171:3a7713b1edbc 456 (((__INTERRUPT__) >> 28) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \
AnnaBridge 171:3a7713b1edbc 457 ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK)))
AnnaBridge 171:3a7713b1edbc 458
AnnaBridge 171:3a7713b1edbc 459 /** @brief Check whether the specified UART interrupt has occurred or not.
AnnaBridge 171:3a7713b1edbc 460 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 461 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 462 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 463 * @param __IT__: specifies the UART interrupt source to check.
AnnaBridge 171:3a7713b1edbc 464 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 465 * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5)
AnnaBridge 171:3a7713b1edbc 466 * @arg UART_IT_LBD: LIN Break detection interrupt
AnnaBridge 171:3a7713b1edbc 467 * @arg UART_IT_TXE: Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 468 * @arg UART_IT_TC: Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 469 * @arg UART_IT_RXNE: Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 470 * @arg UART_IT_IDLE: Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 471 * @arg UART_IT_ERR: Error interrupt
AnnaBridge 171:3a7713b1edbc 472 * @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 473 */
AnnaBridge 171:3a7713b1edbc 474 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == UART_CR1_REG_INDEX)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == UART_CR2_REG_INDEX)? \
AnnaBridge 171:3a7713b1edbc 475 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK))
AnnaBridge 171:3a7713b1edbc 476
AnnaBridge 171:3a7713b1edbc 477 /** @brief macros to enables or disables the UART's one bit sampling method
AnnaBridge 171:3a7713b1edbc 478 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 479 * This parameter can be USARTx with x: 1, 2 or 3, or UARTy with y:4 or 5 to select the USART or
AnnaBridge 171:3a7713b1edbc 480 * UART peripheral (availability depending on device for UARTy).
AnnaBridge 171:3a7713b1edbc 481 * @retval None
AnnaBridge 171:3a7713b1edbc 482 */
AnnaBridge 171:3a7713b1edbc 483 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
AnnaBridge 171:3a7713b1edbc 484 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT))
AnnaBridge 171:3a7713b1edbc 485
AnnaBridge 171:3a7713b1edbc 486 /** @brief Enable CTS flow control
AnnaBridge 171:3a7713b1edbc 487 * This macro allows to enable CTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 488 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 489 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 490 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 491 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 492 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 493 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 494 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 495 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 496 * This parameter can be any USARTx (supporting the HW Flow control feature).
AnnaBridge 171:3a7713b1edbc 497 * It is used to select the USART peripheral (USART availability and x value depending on device).
AnnaBridge 171:3a7713b1edbc 498 * @retval None
AnnaBridge 171:3a7713b1edbc 499 */
AnnaBridge 171:3a7713b1edbc 500 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 501 do{ \
AnnaBridge 171:3a7713b1edbc 502 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge 171:3a7713b1edbc 503 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
AnnaBridge 171:3a7713b1edbc 504 } while(0)
AnnaBridge 171:3a7713b1edbc 505
AnnaBridge 171:3a7713b1edbc 506 /** @brief Disable CTS flow control
AnnaBridge 171:3a7713b1edbc 507 * This macro allows to disable CTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 508 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 509 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 510 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 511 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 512 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 513 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 514 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 515 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 516 * This parameter can be any USARTx (supporting the HW Flow control feature).
AnnaBridge 171:3a7713b1edbc 517 * It is used to select the USART peripheral (USART availability and x value depending on device).
AnnaBridge 171:3a7713b1edbc 518 * @retval None
AnnaBridge 171:3a7713b1edbc 519 */
AnnaBridge 171:3a7713b1edbc 520 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 521 do{ \
AnnaBridge 171:3a7713b1edbc 522 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge 171:3a7713b1edbc 523 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge 171:3a7713b1edbc 524 } while(0)
AnnaBridge 171:3a7713b1edbc 525
AnnaBridge 171:3a7713b1edbc 526 /** @brief Enable RTS flow control
AnnaBridge 171:3a7713b1edbc 527 * This macro allows to enable RTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 528 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 529 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 530 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 531 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 532 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 533 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 534 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 535 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 536 * This parameter can be any USARTx (supporting the HW Flow control feature).
AnnaBridge 171:3a7713b1edbc 537 * It is used to select the USART peripheral (USART availability and x value depending on device).
AnnaBridge 171:3a7713b1edbc 538 * @retval None
AnnaBridge 171:3a7713b1edbc 539 */
AnnaBridge 171:3a7713b1edbc 540 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 541 do{ \
AnnaBridge 171:3a7713b1edbc 542 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
AnnaBridge 171:3a7713b1edbc 543 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
AnnaBridge 171:3a7713b1edbc 544 } while(0)
AnnaBridge 171:3a7713b1edbc 545
AnnaBridge 171:3a7713b1edbc 546 /** @brief Disable RTS flow control
AnnaBridge 171:3a7713b1edbc 547 * This macro allows to disable RTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 548 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 549 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 550 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 551 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 552 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 553 * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 554 * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 555 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 556 * This parameter can be any USARTx (supporting the HW Flow control feature).
AnnaBridge 171:3a7713b1edbc 557 * It is used to select the USART peripheral (USART availability and x value depending on device).
AnnaBridge 171:3a7713b1edbc 558 * @retval None
AnnaBridge 171:3a7713b1edbc 559 */
AnnaBridge 171:3a7713b1edbc 560 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 561 do{ \
AnnaBridge 171:3a7713b1edbc 562 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
AnnaBridge 171:3a7713b1edbc 563 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge 171:3a7713b1edbc 564 } while(0)
AnnaBridge 171:3a7713b1edbc 565
AnnaBridge 171:3a7713b1edbc 566
AnnaBridge 171:3a7713b1edbc 567 /** @brief Enable UART
AnnaBridge 171:3a7713b1edbc 568 * @param __HANDLE__: specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 569 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 570 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 571 * @retval None
AnnaBridge 171:3a7713b1edbc 572 */
AnnaBridge 171:3a7713b1edbc 573 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
AnnaBridge 171:3a7713b1edbc 574
AnnaBridge 171:3a7713b1edbc 575 /** @brief Disable UART
AnnaBridge 171:3a7713b1edbc 576 * UART Handle selects the USARTx or UARTy peripheral
AnnaBridge 171:3a7713b1edbc 577 * (USART,UART availability and x,y values depending on device).
AnnaBridge 171:3a7713b1edbc 578 * @retval None
AnnaBridge 171:3a7713b1edbc 579 */
AnnaBridge 171:3a7713b1edbc 580 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
AnnaBridge 171:3a7713b1edbc 581
AnnaBridge 171:3a7713b1edbc 582 /**
AnnaBridge 171:3a7713b1edbc 583 * @}
AnnaBridge 171:3a7713b1edbc 584 */
AnnaBridge 171:3a7713b1edbc 585
AnnaBridge 171:3a7713b1edbc 586
AnnaBridge 171:3a7713b1edbc 587 /* Private macros --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 588 /** @defgroup UART_Private_Macros UART Private Macros
AnnaBridge 171:3a7713b1edbc 589 * @{
AnnaBridge 171:3a7713b1edbc 590 */
AnnaBridge 171:3a7713b1edbc 591
AnnaBridge 171:3a7713b1edbc 592 #define UART_CR1_REG_INDEX 1
AnnaBridge 171:3a7713b1edbc 593 #define UART_CR2_REG_INDEX 2
AnnaBridge 171:3a7713b1edbc 594 #define UART_CR3_REG_INDEX 3
AnnaBridge 171:3a7713b1edbc 595
AnnaBridge 171:3a7713b1edbc 596 #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_)))
AnnaBridge 171:3a7713b1edbc 597 #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100)
AnnaBridge 171:3a7713b1edbc 598 #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100)
AnnaBridge 171:3a7713b1edbc 599 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 171:3a7713b1edbc 600 = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0F) */
AnnaBridge 171:3a7713b1edbc 601 #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4) + \
AnnaBridge 171:3a7713b1edbc 602 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0)) + \
AnnaBridge 171:3a7713b1edbc 603 (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0F))
AnnaBridge 171:3a7713b1edbc 604 #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25)/(2*(_BAUD_)))
AnnaBridge 171:3a7713b1edbc 605 #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100)
AnnaBridge 171:3a7713b1edbc 606 #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100)) * 8 + 50) / 100)
AnnaBridge 171:3a7713b1edbc 607 /* UART BRR = mantissa + overflow + fraction
AnnaBridge 171:3a7713b1edbc 608 = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07) */
AnnaBridge 171:3a7713b1edbc 609 #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4) + \
AnnaBridge 171:3a7713b1edbc 610 ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8) << 1)) + \
AnnaBridge 171:3a7713b1edbc 611 (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07))
AnnaBridge 171:3a7713b1edbc 612 #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \
AnnaBridge 171:3a7713b1edbc 613 ((LENGTH) == UART_WORDLENGTH_9B))
AnnaBridge 171:3a7713b1edbc 614 #define IS_UART_LIN_WORD_LENGTH(LENGTH) ((LENGTH) == UART_WORDLENGTH_8B)
AnnaBridge 171:3a7713b1edbc 615
AnnaBridge 171:3a7713b1edbc 616 #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \
AnnaBridge 171:3a7713b1edbc 617 ((STOPBITS) == UART_STOPBITS_2))
AnnaBridge 171:3a7713b1edbc 618
AnnaBridge 171:3a7713b1edbc 619 #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \
AnnaBridge 171:3a7713b1edbc 620 ((PARITY) == UART_PARITY_EVEN) || \
AnnaBridge 171:3a7713b1edbc 621 ((PARITY) == UART_PARITY_ODD))
AnnaBridge 171:3a7713b1edbc 622
AnnaBridge 171:3a7713b1edbc 623 #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\
AnnaBridge 171:3a7713b1edbc 624 (((CONTROL) == UART_HWCONTROL_NONE) || \
AnnaBridge 171:3a7713b1edbc 625 ((CONTROL) == UART_HWCONTROL_RTS) || \
AnnaBridge 171:3a7713b1edbc 626 ((CONTROL) == UART_HWCONTROL_CTS) || \
AnnaBridge 171:3a7713b1edbc 627 ((CONTROL) == UART_HWCONTROL_RTS_CTS))
AnnaBridge 171:3a7713b1edbc 628
AnnaBridge 171:3a7713b1edbc 629 #define IS_UART_MODE(MODE) ((((MODE) & (~((uint32_t)UART_MODE_TX_RX))) == 0x00U) && \
AnnaBridge 171:3a7713b1edbc 630 ((MODE) != 0x00000000U))
AnnaBridge 171:3a7713b1edbc 631
AnnaBridge 171:3a7713b1edbc 632 #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 633 ((STATE) == UART_STATE_ENABLE))
AnnaBridge 171:3a7713b1edbc 634
AnnaBridge 171:3a7713b1edbc 635 #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \
AnnaBridge 171:3a7713b1edbc 636 ((SAMPLING) == UART_OVERSAMPLING_8))
AnnaBridge 171:3a7713b1edbc 637 #define IS_UART_LIN_OVERSAMPLING(SAMPLING) ((SAMPLING) == UART_OVERSAMPLING_16)
AnnaBridge 171:3a7713b1edbc 638
AnnaBridge 171:3a7713b1edbc 639 #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \
AnnaBridge 171:3a7713b1edbc 640 ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge 171:3a7713b1edbc 641
AnnaBridge 171:3a7713b1edbc 642 #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \
AnnaBridge 171:3a7713b1edbc 643 ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge 171:3a7713b1edbc 644
AnnaBridge 171:3a7713b1edbc 645
AnnaBridge 171:3a7713b1edbc 646 /** Check UART Baud rate
AnnaBridge 171:3a7713b1edbc 647 * __BAUDRATE__: Baudrate specified by the user
AnnaBridge 171:3a7713b1edbc 648 * The maximum Baud Rate is derived from the maximum clock on APB (i.e. 32 MHz)
AnnaBridge 171:3a7713b1edbc 649 * divided by the smallest oversampling used on the USART (i.e. 8)
AnnaBridge 171:3a7713b1edbc 650 * Return : TRUE or FALSE
AnnaBridge 171:3a7713b1edbc 651 */
AnnaBridge 171:3a7713b1edbc 652 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 4000001)
AnnaBridge 171:3a7713b1edbc 653
AnnaBridge 171:3a7713b1edbc 654 /** Check UART Node Address
AnnaBridge 171:3a7713b1edbc 655 * __ADDRESS__: UART Node address specified by the user
AnnaBridge 171:3a7713b1edbc 656 * UART Node address is used in Multi processor communication for wakeup
AnnaBridge 171:3a7713b1edbc 657 * with address mark detection.
AnnaBridge 171:3a7713b1edbc 658 * This parameter must be a number between Min_Data = 0 and Max_Data = 15
AnnaBridge 171:3a7713b1edbc 659 * Return : TRUE or FALSE
AnnaBridge 171:3a7713b1edbc 660 */
AnnaBridge 171:3a7713b1edbc 661 #define IS_UART_ADDRESS(__ADDRESS__) ((__ADDRESS__) <= 0xF)
AnnaBridge 171:3a7713b1edbc 662
AnnaBridge 171:3a7713b1edbc 663 /** UART interruptions flag mask
AnnaBridge 171:3a7713b1edbc 664 */
AnnaBridge 171:3a7713b1edbc 665 #define UART_IT_MASK ((uint32_t) USART_CR1_PEIE | USART_CR1_TXEIE | USART_CR1_TCIE | USART_CR1_RXNEIE | \
AnnaBridge 171:3a7713b1edbc 666 USART_CR1_IDLEIE | USART_CR2_LBDIE | USART_CR3_CTSIE | USART_CR3_EIE )
AnnaBridge 171:3a7713b1edbc 667
AnnaBridge 171:3a7713b1edbc 668 /**
AnnaBridge 171:3a7713b1edbc 669 * @}
AnnaBridge 171:3a7713b1edbc 670 */
AnnaBridge 171:3a7713b1edbc 671
AnnaBridge 171:3a7713b1edbc 672 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 673
AnnaBridge 171:3a7713b1edbc 674 /** @addtogroup UART_Exported_Functions UART Exported Functions
AnnaBridge 171:3a7713b1edbc 675 * @{
AnnaBridge 171:3a7713b1edbc 676 */
AnnaBridge 171:3a7713b1edbc 677
AnnaBridge 171:3a7713b1edbc 678 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 679 * @{
AnnaBridge 171:3a7713b1edbc 680 */
AnnaBridge 171:3a7713b1edbc 681
AnnaBridge 171:3a7713b1edbc 682 /* Initialization and de-initialization functions ****************************/
AnnaBridge 171:3a7713b1edbc 683 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 684 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 685 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
AnnaBridge 171:3a7713b1edbc 686 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
AnnaBridge 171:3a7713b1edbc 687 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 688 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 689 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 690
AnnaBridge 171:3a7713b1edbc 691 /**
AnnaBridge 171:3a7713b1edbc 692 * @}
AnnaBridge 171:3a7713b1edbc 693 */
AnnaBridge 171:3a7713b1edbc 694
AnnaBridge 171:3a7713b1edbc 695 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
AnnaBridge 171:3a7713b1edbc 696 * @{
AnnaBridge 171:3a7713b1edbc 697 */
AnnaBridge 171:3a7713b1edbc 698
AnnaBridge 171:3a7713b1edbc 699 /* IO operation functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 700 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 701 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 702 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 703 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 704 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 705 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 706 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 707 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 708 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 709 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 710 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 711 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 712 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 713 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 714 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 715
AnnaBridge 171:3a7713b1edbc 716 /**
AnnaBridge 171:3a7713b1edbc 717 * @}
AnnaBridge 171:3a7713b1edbc 718 */
AnnaBridge 171:3a7713b1edbc 719
AnnaBridge 171:3a7713b1edbc 720 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 721 * @{
AnnaBridge 171:3a7713b1edbc 722 */
AnnaBridge 171:3a7713b1edbc 723
AnnaBridge 171:3a7713b1edbc 724 /* Peripheral Control functions ************************************************/
AnnaBridge 171:3a7713b1edbc 725 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 726 HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 727 HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 728 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 729 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 730
AnnaBridge 171:3a7713b1edbc 731 /**
AnnaBridge 171:3a7713b1edbc 732 * @}
AnnaBridge 171:3a7713b1edbc 733 */
AnnaBridge 171:3a7713b1edbc 734
AnnaBridge 171:3a7713b1edbc 735 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Errors functions
AnnaBridge 171:3a7713b1edbc 736 * @{
AnnaBridge 171:3a7713b1edbc 737 */
AnnaBridge 171:3a7713b1edbc 738
AnnaBridge 171:3a7713b1edbc 739 /* Peripheral State and Errors functions **************************************************/
AnnaBridge 171:3a7713b1edbc 740 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 741 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 742
AnnaBridge 171:3a7713b1edbc 743 /**
AnnaBridge 171:3a7713b1edbc 744 * @}
AnnaBridge 171:3a7713b1edbc 745 */
AnnaBridge 171:3a7713b1edbc 746
AnnaBridge 171:3a7713b1edbc 747 /**
AnnaBridge 171:3a7713b1edbc 748 * @}
AnnaBridge 171:3a7713b1edbc 749 */
AnnaBridge 171:3a7713b1edbc 750
AnnaBridge 171:3a7713b1edbc 751 /**
AnnaBridge 171:3a7713b1edbc 752 * @}
AnnaBridge 171:3a7713b1edbc 753 */
AnnaBridge 171:3a7713b1edbc 754
AnnaBridge 171:3a7713b1edbc 755 /**
AnnaBridge 171:3a7713b1edbc 756 * @}
AnnaBridge 171:3a7713b1edbc 757 */
AnnaBridge 171:3a7713b1edbc 758
AnnaBridge 171:3a7713b1edbc 759 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 760 }
AnnaBridge 171:3a7713b1edbc 761 #endif
AnnaBridge 171:3a7713b1edbc 762
AnnaBridge 171:3a7713b1edbc 763 #endif /* __STM32L1xx_HAL_UART_H */
AnnaBridge 171:3a7713b1edbc 764
AnnaBridge 171:3a7713b1edbc 765 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/