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TARGET_NUCLEO_L152RE/TOOLCHAIN_ARM_MICRO/stm32l1xx_hal_comp_ex.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32l1xx_hal_comp_ex.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of COMP HAL Extension module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32L1xx_HAL_COMP_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32L1xx_HAL_COMP_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32l1xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32L1xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 49 | */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | |
| AnnaBridge | 171:3a7713b1edbc | 51 | /** @defgroup COMPEx COMPEx |
| AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 53 | */ |
| AnnaBridge | 171:3a7713b1edbc | 54 | |
| AnnaBridge | 171:3a7713b1edbc | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 56 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 57 | /** @defgroup COMPEx_Exported_Constants COMPEx Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 58 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 59 | */ |
| AnnaBridge | 171:3a7713b1edbc | 60 | |
| AnnaBridge | 171:3a7713b1edbc | 61 | /** @defgroup COMPEx_NonInvertingInput COMPEx NonInvertingInput |
| AnnaBridge | 171:3a7713b1edbc | 62 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 63 | */ |
| AnnaBridge | 171:3a7713b1edbc | 64 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 65 | /* Non-inverting inputs specific to COMP2 */ |
| AnnaBridge | 171:3a7713b1edbc | 66 | #define COMP_NONINVERTINGINPUT_PB4 RI_IOSWITCH_GR6_1 /*!< I/O pin PB4 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 67 | #define COMP_NONINVERTINGINPUT_PB5 RI_IOSWITCH_GR6_2 /*!< I/O pin PB5 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 68 | #define COMP_NONINVERTINGINPUT_PB6 RI_IOSWITCH_GR6_3 /*!< I/O pin PB6 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 69 | #define COMP_NONINVERTINGINPUT_PB7 RI_IOSWITCH_GR6_4 /*!< I/O pin PB7 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 70 | |
| AnnaBridge | 171:3a7713b1edbc | 71 | /* Non-inverting inputs specific to COMP1 */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | #define COMP_NONINVERTINGINPUT_NONE (0x00000000U) /*!< In case of window mode: No I/O pin connection to COMP1 non-inverting input. Instead, connection to COMP2 non-inverting input. */ |
| AnnaBridge | 171:3a7713b1edbc | 73 | #define COMP_NONINVERTINGINPUT_PA0 RI_IOSWITCH_CH0 /*!< I/O pin PA0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 74 | #define COMP_NONINVERTINGINPUT_PA1 RI_IOSWITCH_CH1 /*!< I/O pin PA1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 75 | #define COMP_NONINVERTINGINPUT_PA2 RI_IOSWITCH_CH2 /*!< I/O pin PA2 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 76 | #define COMP_NONINVERTINGINPUT_PA3 RI_IOSWITCH_CH3 /*!< I/O pin PA3 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 77 | #define COMP_NONINVERTINGINPUT_PA4 RI_IOSWITCH_CH4 /*!< I/O pin PA4 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 78 | #define COMP_NONINVERTINGINPUT_PA5 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 79 | #define COMP_NONINVERTINGINPUT_PA6 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 80 | #define COMP_NONINVERTINGINPUT_PA7 RI_IOSWITCH_CH7 /*!< I/O pin PA7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 81 | #define COMP_NONINVERTINGINPUT_PB0 RI_IOSWITCH_CH8 /*!< I/O pin PB0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 82 | #define COMP_NONINVERTINGINPUT_PB1 RI_IOSWITCH_CH9 /*!< I/O pin PB1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 83 | #define COMP_NONINVERTINGINPUT_PC0 RI_IOSWITCH_CH10 /*!< I/O pin PC0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 84 | #define COMP_NONINVERTINGINPUT_PC1 RI_IOSWITCH_CH11 /*!< I/O pin PC1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 85 | #define COMP_NONINVERTINGINPUT_PC2 RI_IOSWITCH_CH12 /*!< I/O pin PC2 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 86 | #define COMP_NONINVERTINGINPUT_PC3 RI_IOSWITCH_CH13 /*!< I/O pin PC3 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 87 | #define COMP_NONINVERTINGINPUT_PC4 RI_IOSWITCH_CH14 /*!< I/O pin PC4 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 88 | #define COMP_NONINVERTINGINPUT_PC5 RI_IOSWITCH_CH15 /*!< I/O pin PC5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 89 | #define COMP_NONINVERTINGINPUT_PB12 RI_IOSWITCH_CH18 /*!< I/O pin PB12 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 90 | #define COMP_NONINVERTINGINPUT_PB13 RI_IOSWITCH_CH19 /*!< I/O pin PB13 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 91 | #define COMP_NONINVERTINGINPUT_PB14 RI_IOSWITCH_CH20 /*!< I/O pin PB14 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 92 | #define COMP_NONINVERTINGINPUT_PB15 RI_IOSWITCH_CH21 /*!< I/O pin PB15 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 93 | #define COMP_NONINVERTINGINPUT_PE7 RI_IOSWITCH_CH22 /*!< I/O pin PE7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 94 | #define COMP_NONINVERTINGINPUT_PE8 RI_IOSWITCH_CH23 /*!< I/O pin PE8 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 95 | #define COMP_NONINVERTINGINPUT_PE9 RI_IOSWITCH_CH24 /*!< I/O pin PE9 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 96 | #define COMP_NONINVERTINGINPUT_PE10 RI_IOSWITCH_CH25 /*!< I/O pin PE10 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 97 | #define COMP_NONINVERTINGINPUT_PF6 RI_IOSWITCH_CH27 /*!< I/O pin PF6 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 98 | #define COMP_NONINVERTINGINPUT_PF7 RI_IOSWITCH_CH28 /*!< I/O pin PF7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 99 | #define COMP_NONINVERTINGINPUT_PF8 RI_IOSWITCH_CH29 /*!< I/O pin PF8 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 100 | #define COMP_NONINVERTINGINPUT_PF9 RI_IOSWITCH_CH30 /*!< I/O pin PF9 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 101 | #define COMP_NONINVERTINGINPUT_PF10 RI_IOSWITCH_CH31 /*!< I/O pin PF10 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 102 | |
| AnnaBridge | 171:3a7713b1edbc | 103 | #define COMP_NONINVERTINGINPUT_OPAMP1 COMP_NONINVERTINGINPUT_PA3 /*!< OPAMP1 output connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 104 | #define COMP_NONINVERTINGINPUT_OPAMP2 COMP_NONINVERTINGINPUT_PB0 /*!< OPAMP2 output connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 105 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) |
| AnnaBridge | 171:3a7713b1edbc | 106 | #define COMP_NONINVERTINGINPUT_OPAMP3 COMP_NONINVERTINGINPUT_PC3 /*!< OPAMP3 output connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 107 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD */ |
| AnnaBridge | 171:3a7713b1edbc | 108 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 109 | |
| AnnaBridge | 171:3a7713b1edbc | 110 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| AnnaBridge | 171:3a7713b1edbc | 111 | /* Non-inverting inputs specific to COMP2 */ |
| AnnaBridge | 171:3a7713b1edbc | 112 | #define COMP_NONINVERTINGINPUT_PB4 RI_IOSWITCH_GR6_1 /*!< I/O pin PB4 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 113 | #define COMP_NONINVERTINGINPUT_PB5 RI_IOSWITCH_GR6_2 /*!< I/O pin PB5 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 114 | #define COMP_NONINVERTINGINPUT_PB6 RI_IOSWITCH_GR6_3 /*!< I/O pin PB6 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 115 | #define COMP_NONINVERTINGINPUT_PB7 RI_IOSWITCH_GR6_4 /*!< I/O pin PB7 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 116 | |
| AnnaBridge | 171:3a7713b1edbc | 117 | /* Non-inverting inputs specific to COMP1 */ |
| AnnaBridge | 171:3a7713b1edbc | 118 | #define COMP_NONINVERTINGINPUT_NONE (0x00000000U) /*!< In case of window mode: No I/O pin connection to COMP1 non-inverting input. Instead, connection to COMP2 non-inverting input. */ |
| AnnaBridge | 171:3a7713b1edbc | 119 | #define COMP_NONINVERTINGINPUT_PA0 RI_IOSWITCH_CH0 /*!< I/O pin PA0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 120 | #define COMP_NONINVERTINGINPUT_PA1 RI_IOSWITCH_CH1 /*!< I/O pin PA1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 121 | #define COMP_NONINVERTINGINPUT_PA2 RI_IOSWITCH_CH2 /*!< I/O pin PA2 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 122 | #define COMP_NONINVERTINGINPUT_PA3 RI_IOSWITCH_CH3 /*!< I/O pin PA3 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 123 | #define COMP_NONINVERTINGINPUT_PA4 RI_IOSWITCH_CH4 /*!< I/O pin PA4 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 124 | #define COMP_NONINVERTINGINPUT_PA5 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 125 | #define COMP_NONINVERTINGINPUT_PA6 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 126 | #define COMP_NONINVERTINGINPUT_PA7 RI_IOSWITCH_CH7 /*!< I/O pin PA7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | #define COMP_NONINVERTINGINPUT_PB0 RI_IOSWITCH_CH8 /*!< I/O pin PB0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 128 | #define COMP_NONINVERTINGINPUT_PB1 RI_IOSWITCH_CH9 /*!< I/O pin PB1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 129 | #define COMP_NONINVERTINGINPUT_PC0 RI_IOSWITCH_CH10 /*!< I/O pin PC0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 130 | #define COMP_NONINVERTINGINPUT_PC1 RI_IOSWITCH_CH11 /*!< I/O pin PC1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 131 | #define COMP_NONINVERTINGINPUT_PC2 RI_IOSWITCH_CH12 /*!< I/O pin PC2 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 132 | #define COMP_NONINVERTINGINPUT_PC3 RI_IOSWITCH_CH13 /*!< I/O pin PC3 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 133 | #define COMP_NONINVERTINGINPUT_PC4 RI_IOSWITCH_CH14 /*!< I/O pin PC4 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 134 | #define COMP_NONINVERTINGINPUT_PC5 RI_IOSWITCH_CH15 /*!< I/O pin PC5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 135 | #define COMP_NONINVERTINGINPUT_PB12 RI_IOSWITCH_CH18 /*!< I/O pin PB12 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 136 | #define COMP_NONINVERTINGINPUT_PB13 RI_IOSWITCH_CH19 /*!< I/O pin PB13 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 137 | #define COMP_NONINVERTINGINPUT_PB14 RI_IOSWITCH_CH20 /*!< I/O pin PB14 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 138 | #define COMP_NONINVERTINGINPUT_PB15 RI_IOSWITCH_CH21 /*!< I/O pin PB15 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 139 | #define COMP_NONINVERTINGINPUT_PE7 RI_IOSWITCH_CH22 /*!< I/O pin PE7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 140 | #define COMP_NONINVERTINGINPUT_PE8 RI_IOSWITCH_CH23 /*!< I/O pin PE8 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 141 | #define COMP_NONINVERTINGINPUT_PE9 RI_IOSWITCH_CH24 /*!< I/O pin PE9 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 142 | #define COMP_NONINVERTINGINPUT_PE10 RI_IOSWITCH_CH25 /*!< I/O pin PE10 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 143 | |
| AnnaBridge | 171:3a7713b1edbc | 144 | #define COMP_NONINVERTINGINPUT_OPAMP1 COMP_NONINVERTINGINPUT_PA3 /*!< OPAMP1 output connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 145 | #define COMP_NONINVERTINGINPUT_OPAMP2 COMP_NONINVERTINGINPUT_PB0 /*!< OPAMP2 output connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 146 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC */ |
| AnnaBridge | 171:3a7713b1edbc | 147 | |
| AnnaBridge | 171:3a7713b1edbc | 148 | #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) |
| AnnaBridge | 171:3a7713b1edbc | 149 | /* Non-inverting inputs specific to COMP2 */ |
| AnnaBridge | 171:3a7713b1edbc | 150 | #define COMP_NONINVERTINGINPUT_PB4 RI_IOSWITCH_GR6_1 /*!< I/O pin PB4 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 151 | #define COMP_NONINVERTINGINPUT_PB5 RI_IOSWITCH_GR6_2 /*!< I/O pin PB5 connection to COMP2 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 152 | |
| AnnaBridge | 171:3a7713b1edbc | 153 | /* Non-inverting inputs specific to COMP1 */ |
| AnnaBridge | 171:3a7713b1edbc | 154 | #define COMP_NONINVERTINGINPUT_NONE (0x00000000U) /*!< In case of window mode: No I/O pin connection to COMP1 non-inverting input. Instead, connection to COMP2 non-inverting input. */ |
| AnnaBridge | 171:3a7713b1edbc | 155 | #define COMP_NONINVERTINGINPUT_PA0 RI_IOSWITCH_CH0 /*!< I/O pin PA0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 156 | #define COMP_NONINVERTINGINPUT_PA1 RI_IOSWITCH_CH1 /*!< I/O pin PA1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 157 | #define COMP_NONINVERTINGINPUT_PA2 RI_IOSWITCH_CH2 /*!< I/O pin PA2 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 158 | #define COMP_NONINVERTINGINPUT_PA3 RI_IOSWITCH_CH3 /*!< I/O pin PA3 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 159 | #define COMP_NONINVERTINGINPUT_PA4 RI_IOSWITCH_CH4 /*!< I/O pin PA4 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 160 | #define COMP_NONINVERTINGINPUT_PA5 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 161 | #define COMP_NONINVERTINGINPUT_PA6 RI_IOSWITCH_CH5 /*!< I/O pin PA5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 162 | #define COMP_NONINVERTINGINPUT_PA7 RI_IOSWITCH_CH7 /*!< I/O pin PA7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 163 | #define COMP_NONINVERTINGINPUT_PB0 RI_IOSWITCH_CH8 /*!< I/O pin PB0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 164 | #define COMP_NONINVERTINGINPUT_PB1 RI_IOSWITCH_CH9 /*!< I/O pin PB1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 165 | #define COMP_NONINVERTINGINPUT_PC0 RI_IOSWITCH_CH10 /*!< I/O pin PC0 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 166 | #define COMP_NONINVERTINGINPUT_PC1 RI_IOSWITCH_CH11 /*!< I/O pin PC1 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 167 | #define COMP_NONINVERTINGINPUT_PC2 RI_IOSWITCH_CH12 /*!< I/O pin PC2 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 168 | #define COMP_NONINVERTINGINPUT_PC3 RI_IOSWITCH_CH13 /*!< I/O pin PC3 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | #define COMP_NONINVERTINGINPUT_PC4 RI_IOSWITCH_CH14 /*!< I/O pin PC4 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 170 | #define COMP_NONINVERTINGINPUT_PC5 RI_IOSWITCH_CH15 /*!< I/O pin PC5 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 171 | #define COMP_NONINVERTINGINPUT_PB12 RI_IOSWITCH_CH18 /*!< I/O pin PB12 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 172 | #define COMP_NONINVERTINGINPUT_PB13 RI_IOSWITCH_CH19 /*!< I/O pin PB13 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | #define COMP_NONINVERTINGINPUT_PB14 RI_IOSWITCH_CH20 /*!< I/O pin PB14 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 174 | #define COMP_NONINVERTINGINPUT_PB15 RI_IOSWITCH_CH21 /*!< I/O pin PB15 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 175 | #define COMP_NONINVERTINGINPUT_PE7 RI_IOSWITCH_CH22 /*!< I/O pin PE7 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 176 | #define COMP_NONINVERTINGINPUT_PE8 RI_IOSWITCH_CH23 /*!< I/O pin PE8 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 177 | #define COMP_NONINVERTINGINPUT_PE9 RI_IOSWITCH_CH24 /*!< I/O pin PE9 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 178 | #define COMP_NONINVERTINGINPUT_PE10 RI_IOSWITCH_CH25 /*!< I/O pin PE10 connection to COMP1 non-inverting input */ |
| AnnaBridge | 171:3a7713b1edbc | 179 | |
| AnnaBridge | 171:3a7713b1edbc | 180 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */ |
| AnnaBridge | 171:3a7713b1edbc | 181 | |
| AnnaBridge | 171:3a7713b1edbc | 182 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 183 | #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_PB4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 184 | ((INPUT) == COMP_NONINVERTINGINPUT_PB5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 185 | ((INPUT) == COMP_NONINVERTINGINPUT_PB6) || \ |
| AnnaBridge | 171:3a7713b1edbc | 186 | ((INPUT) == COMP_NONINVERTINGINPUT_PB7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 187 | ((INPUT) == COMP_NONINVERTINGINPUT_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 188 | ((INPUT) == COMP_NONINVERTINGINPUT_PA0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 189 | ((INPUT) == COMP_NONINVERTINGINPUT_PA1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 190 | ((INPUT) == COMP_NONINVERTINGINPUT_PA2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 191 | ((INPUT) == COMP_NONINVERTINGINPUT_PA3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 192 | ((INPUT) == COMP_NONINVERTINGINPUT_PA4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 193 | ((INPUT) == COMP_NONINVERTINGINPUT_PA5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 194 | ((INPUT) == COMP_NONINVERTINGINPUT_PA6) || \ |
| AnnaBridge | 171:3a7713b1edbc | 195 | ((INPUT) == COMP_NONINVERTINGINPUT_PA7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 196 | ((INPUT) == COMP_NONINVERTINGINPUT_PB0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 197 | ((INPUT) == COMP_NONINVERTINGINPUT_PB1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 198 | ((INPUT) == COMP_NONINVERTINGINPUT_PC0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 199 | ((INPUT) == COMP_NONINVERTINGINPUT_PC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 200 | ((INPUT) == COMP_NONINVERTINGINPUT_PC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 201 | ((INPUT) == COMP_NONINVERTINGINPUT_PC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 202 | ((INPUT) == COMP_NONINVERTINGINPUT_PC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 203 | ((INPUT) == COMP_NONINVERTINGINPUT_PC5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 204 | ((INPUT) == COMP_NONINVERTINGINPUT_PB12) || \ |
| AnnaBridge | 171:3a7713b1edbc | 205 | ((INPUT) == COMP_NONINVERTINGINPUT_PB13) || \ |
| AnnaBridge | 171:3a7713b1edbc | 206 | ((INPUT) == COMP_NONINVERTINGINPUT_PB14) || \ |
| AnnaBridge | 171:3a7713b1edbc | 207 | ((INPUT) == COMP_NONINVERTINGINPUT_PB15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 208 | ((INPUT) == COMP_NONINVERTINGINPUT_PE7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 209 | ((INPUT) == COMP_NONINVERTINGINPUT_PE8) || \ |
| AnnaBridge | 171:3a7713b1edbc | 210 | ((INPUT) == COMP_NONINVERTINGINPUT_PE9) || \ |
| AnnaBridge | 171:3a7713b1edbc | 211 | ((INPUT) == COMP_NONINVERTINGINPUT_PE10) || \ |
| AnnaBridge | 171:3a7713b1edbc | 212 | ((INPUT) == COMP_NONINVERTINGINPUT_PF6) || \ |
| AnnaBridge | 171:3a7713b1edbc | 213 | ((INPUT) == COMP_NONINVERTINGINPUT_PF7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 214 | ((INPUT) == COMP_NONINVERTINGINPUT_PF8) || \ |
| AnnaBridge | 171:3a7713b1edbc | 215 | ((INPUT) == COMP_NONINVERTINGINPUT_PF9) || \ |
| AnnaBridge | 171:3a7713b1edbc | 216 | ((INPUT) == COMP_NONINVERTINGINPUT_PF10) ) |
| AnnaBridge | 171:3a7713b1edbc | 217 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 218 | |
| AnnaBridge | 171:3a7713b1edbc | 219 | #if defined(STM32L100xC) || defined (STM32L151xC) || defined (STM32L152xC) || defined (STM32L162xC) |
| AnnaBridge | 171:3a7713b1edbc | 220 | #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_PB4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 221 | ((INPUT) == COMP_NONINVERTINGINPUT_PB5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 222 | ((INPUT) == COMP_NONINVERTINGINPUT_PB6) || \ |
| AnnaBridge | 171:3a7713b1edbc | 223 | ((INPUT) == COMP_NONINVERTINGINPUT_PB7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 224 | ((INPUT) == COMP_NONINVERTINGINPUT_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 225 | ((INPUT) == COMP_NONINVERTINGINPUT_PA0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 226 | ((INPUT) == COMP_NONINVERTINGINPUT_PA1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 227 | ((INPUT) == COMP_NONINVERTINGINPUT_PA2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 228 | ((INPUT) == COMP_NONINVERTINGINPUT_PA3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 229 | ((INPUT) == COMP_NONINVERTINGINPUT_PA4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 230 | ((INPUT) == COMP_NONINVERTINGINPUT_PA5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 231 | ((INPUT) == COMP_NONINVERTINGINPUT_PA6) || \ |
| AnnaBridge | 171:3a7713b1edbc | 232 | ((INPUT) == COMP_NONINVERTINGINPUT_PA7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 233 | ((INPUT) == COMP_NONINVERTINGINPUT_PB0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 234 | ((INPUT) == COMP_NONINVERTINGINPUT_PB1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 235 | ((INPUT) == COMP_NONINVERTINGINPUT_PC0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 236 | ((INPUT) == COMP_NONINVERTINGINPUT_PC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 237 | ((INPUT) == COMP_NONINVERTINGINPUT_PC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 238 | ((INPUT) == COMP_NONINVERTINGINPUT_PC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 239 | ((INPUT) == COMP_NONINVERTINGINPUT_PC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 240 | ((INPUT) == COMP_NONINVERTINGINPUT_PC5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 241 | ((INPUT) == COMP_NONINVERTINGINPUT_PB12) || \ |
| AnnaBridge | 171:3a7713b1edbc | 242 | ((INPUT) == COMP_NONINVERTINGINPUT_PB13) || \ |
| AnnaBridge | 171:3a7713b1edbc | 243 | ((INPUT) == COMP_NONINVERTINGINPUT_PB14) || \ |
| AnnaBridge | 171:3a7713b1edbc | 244 | ((INPUT) == COMP_NONINVERTINGINPUT_PB15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 245 | ((INPUT) == COMP_NONINVERTINGINPUT_PE7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 246 | ((INPUT) == COMP_NONINVERTINGINPUT_PE8) || \ |
| AnnaBridge | 171:3a7713b1edbc | 247 | ((INPUT) == COMP_NONINVERTINGINPUT_PE9) || \ |
| AnnaBridge | 171:3a7713b1edbc | 248 | ((INPUT) == COMP_NONINVERTINGINPUT_PE10) ) |
| AnnaBridge | 171:3a7713b1edbc | 249 | #endif /* STM32L100xC || STM32L151xC || STM32L152xC || STM32L162xC */ |
| AnnaBridge | 171:3a7713b1edbc | 250 | |
| AnnaBridge | 171:3a7713b1edbc | 251 | #if defined(STM32L100xB) || defined (STM32L151xB) || defined (STM32L152xB) || defined(STM32L100xBA) || defined (STM32L151xBA) || defined (STM32L152xBA) |
| AnnaBridge | 171:3a7713b1edbc | 252 | #define IS_COMP_NONINVERTINGINPUT(INPUT) (((INPUT) == COMP_NONINVERTINGINPUT_PB4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 253 | ((INPUT) == COMP_NONINVERTINGINPUT_PB5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 254 | ((INPUT) == COMP_NONINVERTINGINPUT_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 255 | ((INPUT) == COMP_NONINVERTINGINPUT_PA0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 256 | ((INPUT) == COMP_NONINVERTINGINPUT_PA1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 257 | ((INPUT) == COMP_NONINVERTINGINPUT_PA2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 258 | ((INPUT) == COMP_NONINVERTINGINPUT_PA3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 259 | ((INPUT) == COMP_NONINVERTINGINPUT_PA4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 260 | ((INPUT) == COMP_NONINVERTINGINPUT_PA5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 261 | ((INPUT) == COMP_NONINVERTINGINPUT_PA6) || \ |
| AnnaBridge | 171:3a7713b1edbc | 262 | ((INPUT) == COMP_NONINVERTINGINPUT_PA7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 263 | ((INPUT) == COMP_NONINVERTINGINPUT_PB0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 264 | ((INPUT) == COMP_NONINVERTINGINPUT_PB1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 265 | ((INPUT) == COMP_NONINVERTINGINPUT_PC0) || \ |
| AnnaBridge | 171:3a7713b1edbc | 266 | ((INPUT) == COMP_NONINVERTINGINPUT_PC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 267 | ((INPUT) == COMP_NONINVERTINGINPUT_PC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 268 | ((INPUT) == COMP_NONINVERTINGINPUT_PC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 269 | ((INPUT) == COMP_NONINVERTINGINPUT_PC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 270 | ((INPUT) == COMP_NONINVERTINGINPUT_PC5) || \ |
| AnnaBridge | 171:3a7713b1edbc | 271 | ((INPUT) == COMP_NONINVERTINGINPUT_PB12) || \ |
| AnnaBridge | 171:3a7713b1edbc | 272 | ((INPUT) == COMP_NONINVERTINGINPUT_PB13) || \ |
| AnnaBridge | 171:3a7713b1edbc | 273 | ((INPUT) == COMP_NONINVERTINGINPUT_PB14) || \ |
| AnnaBridge | 171:3a7713b1edbc | 274 | ((INPUT) == COMP_NONINVERTINGINPUT_PB15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 275 | ((INPUT) == COMP_NONINVERTINGINPUT_PE7) || \ |
| AnnaBridge | 171:3a7713b1edbc | 276 | ((INPUT) == COMP_NONINVERTINGINPUT_PE8) || \ |
| AnnaBridge | 171:3a7713b1edbc | 277 | ((INPUT) == COMP_NONINVERTINGINPUT_PE9) || \ |
| AnnaBridge | 171:3a7713b1edbc | 278 | ((INPUT) == COMP_NONINVERTINGINPUT_PE10) ) |
| AnnaBridge | 171:3a7713b1edbc | 279 | #endif /* STM32L100xB || STM32L151xB || STM32L152xB || STM32L100xBA || STM32L151xBA || STM32L152xBA */ |
| AnnaBridge | 171:3a7713b1edbc | 280 | |
| AnnaBridge | 171:3a7713b1edbc | 281 | /** |
| AnnaBridge | 171:3a7713b1edbc | 282 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 283 | */ |
| AnnaBridge | 171:3a7713b1edbc | 284 | |
| AnnaBridge | 171:3a7713b1edbc | 285 | /** |
| AnnaBridge | 171:3a7713b1edbc | 286 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 287 | */ |
| AnnaBridge | 171:3a7713b1edbc | 288 | |
| AnnaBridge | 171:3a7713b1edbc | 289 | |
| AnnaBridge | 171:3a7713b1edbc | 290 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 291 | |
| AnnaBridge | 171:3a7713b1edbc | 292 | /** @defgroup COMPEx_Private_Macro COMP Private Macro |
| AnnaBridge | 171:3a7713b1edbc | 293 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 294 | */ |
| AnnaBridge | 171:3a7713b1edbc | 295 | |
| AnnaBridge | 171:3a7713b1edbc | 296 | /** |
| AnnaBridge | 171:3a7713b1edbc | 297 | * @brief Specifies whether Routing Interface (RI) needs to be configured for |
| AnnaBridge | 171:3a7713b1edbc | 298 | * switches of comparator non-inverting input. |
| AnnaBridge | 171:3a7713b1edbc | 299 | * @param __HANDLE__: COMP handle. |
| AnnaBridge | 171:3a7713b1edbc | 300 | * @retval None. |
| AnnaBridge | 171:3a7713b1edbc | 301 | */ |
| AnnaBridge | 171:3a7713b1edbc | 302 | #if defined(STM32L151xCA) || defined (STM32L151xD) || defined (STM32L152xCA) || defined (STM32L152xD) || defined (STM32L162xCA) || defined (STM32L162xD) || defined(STM32L151xE) || defined(STM32L151xDX) || defined (STM32L152xE) || defined (STM32L152xDX) || defined (STM32L162xE) || defined (STM32L162xDX) |
| AnnaBridge | 171:3a7713b1edbc | 303 | #define __COMP_ROUTING_INTERFACE_TOBECONFIGURED(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 304 | (((__HANDLE__)->Init.NonInvertingInput != COMP_NONINVERTINGINPUT_NONE) && \ |
| AnnaBridge | 171:3a7713b1edbc | 305 | (READ_BIT(COMP->CSR, COMP_CSR_SW1) == RESET) ) |
| AnnaBridge | 171:3a7713b1edbc | 306 | #else |
| AnnaBridge | 171:3a7713b1edbc | 307 | #define __COMP_ROUTING_INTERFACE_TOBECONFIGURED(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 308 | ((__HANDLE__)->Init.NonInvertingInput != COMP_NONINVERTINGINPUT_NONE) |
| AnnaBridge | 171:3a7713b1edbc | 309 | #endif /* STM32L151xCA || STM32L151xD || STM32L152xCA || STM32L152xD || STM32L162xCA || STM32L162xD || STM32L151xE || STM32L151xDX || STM32L152xE || STM32L152xDX || STM32L162xE || STM32L162xDX */ |
| AnnaBridge | 171:3a7713b1edbc | 310 | |
| AnnaBridge | 171:3a7713b1edbc | 311 | /** |
| AnnaBridge | 171:3a7713b1edbc | 312 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 313 | */ |
| AnnaBridge | 171:3a7713b1edbc | 314 | |
| AnnaBridge | 171:3a7713b1edbc | 315 | |
| AnnaBridge | 171:3a7713b1edbc | 316 | |
| AnnaBridge | 171:3a7713b1edbc | 317 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 318 | |
| AnnaBridge | 171:3a7713b1edbc | 319 | |
| AnnaBridge | 171:3a7713b1edbc | 320 | /** |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 322 | */ |
| AnnaBridge | 171:3a7713b1edbc | 323 | |
| AnnaBridge | 171:3a7713b1edbc | 324 | /** |
| AnnaBridge | 171:3a7713b1edbc | 325 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 326 | */ |
| AnnaBridge | 171:3a7713b1edbc | 327 | |
| AnnaBridge | 171:3a7713b1edbc | 328 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 329 | } |
| AnnaBridge | 171:3a7713b1edbc | 330 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 331 | |
| AnnaBridge | 171:3a7713b1edbc | 332 | #endif /* __STM32L1xx_HAL_COMP_EX_H */ |
| AnnaBridge | 171:3a7713b1edbc | 333 | |
| AnnaBridge | 171:3a7713b1edbc | 334 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
