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TARGET_NUCLEO_H743ZI/TOOLCHAIN_GCC_ARM/stm32h7xx_ll_dma2d.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32h7xx_ll_dma2d.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of DMA2D LL module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© Copyright (c) 2017 STMicroelectronics.
AnnaBridge	172:65be27845400	10	* All rights reserved.</center></h2>
AnnaBridge	172:65be27845400	11	*
AnnaBridge	172:65be27845400	12	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	172:65be27845400	13	* the "License"; You may not use this file except in compliance with the
AnnaBridge	172:65be27845400	14	* License. You may obtain a copy of the License at:
AnnaBridge	172:65be27845400	15	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	172:65be27845400	16	*
AnnaBridge	172:65be27845400	17	******************************************************************************
AnnaBridge	172:65be27845400	18	*/
AnnaBridge	172:65be27845400	19
AnnaBridge	172:65be27845400	20	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	21	#ifndef STM32H7xx_LL_DMA2D_H
AnnaBridge	172:65be27845400	22	#define STM32H7xx_LL_DMA2D_H
AnnaBridge	172:65be27845400	23
AnnaBridge	172:65be27845400	24	#ifdef __cplusplus
AnnaBridge	172:65be27845400	25	extern "C" {
AnnaBridge	172:65be27845400	26	#endif
AnnaBridge	172:65be27845400	27
AnnaBridge	172:65be27845400	28	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	29	#include "stm32h7xx.h"
AnnaBridge	172:65be27845400	30
AnnaBridge	172:65be27845400	31	/** @addtogroup STM32H7xx_LL_Driver
AnnaBridge	172:65be27845400	32	* @{
AnnaBridge	172:65be27845400	33	*/
AnnaBridge	172:65be27845400	34
AnnaBridge	172:65be27845400	35	#if defined (DMA2D)
AnnaBridge	172:65be27845400	36
AnnaBridge	172:65be27845400	37	/** @defgroup DMA2D_LL DMA2D
AnnaBridge	172:65be27845400	38	* @{
AnnaBridge	172:65be27845400	39	*/
AnnaBridge	172:65be27845400	40
AnnaBridge	172:65be27845400	41	/* Private types -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	42	/* Private variables ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	43	/* Private constants ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	44	/* Private macros ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	45	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	46	/** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros
AnnaBridge	172:65be27845400	47	* @{
AnnaBridge	172:65be27845400	48	*/
AnnaBridge	172:65be27845400	49
AnnaBridge	172:65be27845400	50	/**
AnnaBridge	172:65be27845400	51	* @}
AnnaBridge	172:65be27845400	52	*/
AnnaBridge	172:65be27845400	53	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	54
AnnaBridge	172:65be27845400	55	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	56	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	57	/** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures
AnnaBridge	172:65be27845400	58	* @{
AnnaBridge	172:65be27845400	59	*/
AnnaBridge	172:65be27845400	60
AnnaBridge	172:65be27845400	61	/**
AnnaBridge	172:65be27845400	62	* @brief LL DMA2D Init Structure Definition
AnnaBridge	172:65be27845400	63	*/
AnnaBridge	172:65be27845400	64	typedef struct
AnnaBridge	172:65be27845400	65	{
AnnaBridge	172:65be27845400	66	uint32_t Mode; /*!< Specifies the DMA2D transfer mode.
AnnaBridge	172:65be27845400	67	- This parameter can be one value of @ref DMA2D_LL_EC_MODE.
AnnaBridge	172:65be27845400	68
AnnaBridge	172:65be27845400	69	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/
AnnaBridge	172:65be27845400	70
AnnaBridge	172:65be27845400	71	uint32_t ColorMode; /*!< Specifies the color format of the output image.
AnnaBridge	172:65be27845400	72	- This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
AnnaBridge	172:65be27845400	73
AnnaBridge	172:65be27845400	74	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
AnnaBridge	172:65be27845400	75
AnnaBridge	172:65be27845400	76	uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
AnnaBridge	172:65be27845400	77	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	78	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
AnnaBridge	172:65be27845400	79	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
AnnaBridge	172:65be27845400	80	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	81	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	82
AnnaBridge	172:65be27845400	83	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	84	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	85
AnnaBridge	172:65be27845400	86	uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
AnnaBridge	172:65be27845400	87	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	88	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
AnnaBridge	172:65be27845400	89	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
AnnaBridge	172:65be27845400	90	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	91	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	92
AnnaBridge	172:65be27845400	93	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	94	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	95
AnnaBridge	172:65be27845400	96	uint32_t OutputRed; /*!< Specifies the Red value of the output image.
AnnaBridge	172:65be27845400	97	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	98	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
AnnaBridge	172:65be27845400	99	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
AnnaBridge	172:65be27845400	100	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	101	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	102
AnnaBridge	172:65be27845400	103	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	104	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	105
AnnaBridge	172:65be27845400	106	uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
AnnaBridge	172:65be27845400	107	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	108	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	109	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	110	- This parameter is not considered if RGB888 or RGB565 color mode is selected.
AnnaBridge	172:65be27845400	111
AnnaBridge	172:65be27845400	112	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	113	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	114
AnnaBridge	172:65be27845400	115	uint32_t OutputMemoryAddress; /*!< Specifies the memory address.
AnnaBridge	172:65be27845400	116	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
AnnaBridge	172:65be27845400	117
AnnaBridge	172:65be27845400	118	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */
AnnaBridge	172:65be27845400	119
AnnaBridge	172:65be27845400	120
AnnaBridge	172:65be27845400	121
AnnaBridge	172:65be27845400	122	uint32_t LineOffset; /*!< Specifies the output line offset value.
AnnaBridge	172:65be27845400	123	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
AnnaBridge	172:65be27845400	124
AnnaBridge	172:65be27845400	125	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */
AnnaBridge	172:65be27845400	126
AnnaBridge	172:65be27845400	127	uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred.
AnnaBridge	172:65be27845400	128	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF.
AnnaBridge	172:65be27845400	129
AnnaBridge	172:65be27845400	130	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */
AnnaBridge	172:65be27845400	131
AnnaBridge	172:65be27845400	132	uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered.
AnnaBridge	172:65be27845400	133	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
AnnaBridge	172:65be27845400	134
AnnaBridge	172:65be27845400	135	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */
AnnaBridge	172:65be27845400	136
AnnaBridge	172:65be27845400	137	uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode.
AnnaBridge	172:65be27845400	138	- This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
AnnaBridge	172:65be27845400	139
AnnaBridge	172:65be27845400	140	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */
AnnaBridge	172:65be27845400	141
AnnaBridge	172:65be27845400	142	uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode.
AnnaBridge	172:65be27845400	143	- This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP.
AnnaBridge	172:65be27845400	144
AnnaBridge	172:65be27845400	145	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */
AnnaBridge	172:65be27845400	146
AnnaBridge	172:65be27845400	147	} LL_DMA2D_InitTypeDef;
AnnaBridge	172:65be27845400	148
AnnaBridge	172:65be27845400	149	/**
AnnaBridge	172:65be27845400	150	* @brief LL DMA2D Layer Configuration Structure Definition
AnnaBridge	172:65be27845400	151	*/
AnnaBridge	172:65be27845400	152	typedef struct
AnnaBridge	172:65be27845400	153	{
AnnaBridge	172:65be27845400	154	uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address.
AnnaBridge	172:65be27845400	155	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
AnnaBridge	172:65be27845400	156
AnnaBridge	172:65be27845400	157	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	158	- @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer,
AnnaBridge	172:65be27845400	159	- @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */
AnnaBridge	172:65be27845400	160
AnnaBridge	172:65be27845400	161	uint32_t LineOffset; /*!< Specifies the foreground or background line offset value.
AnnaBridge	172:65be27845400	162	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF.
AnnaBridge	172:65be27845400	163
AnnaBridge	172:65be27845400	164	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	165	- @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer,
AnnaBridge	172:65be27845400	166	- @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */
AnnaBridge	172:65be27845400	167
AnnaBridge	172:65be27845400	168	uint32_t ColorMode; /*!< Specifies the foreground or background color mode.
AnnaBridge	172:65be27845400	169	- This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE.
AnnaBridge	172:65be27845400	170
AnnaBridge	172:65be27845400	171	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	172	- @ref LL_DMA2D_FGND_SetColorMode() for foreground layer,
AnnaBridge	172:65be27845400	173	- @ref LL_DMA2D_BGND_SetColorMode() for background layer. */
AnnaBridge	172:65be27845400	174
AnnaBridge	172:65be27845400	175	uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode.
AnnaBridge	172:65be27845400	176	- This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE.
AnnaBridge	172:65be27845400	177
AnnaBridge	172:65be27845400	178	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	179	- @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer,
AnnaBridge	172:65be27845400	180	- @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */
AnnaBridge	172:65be27845400	181
AnnaBridge	172:65be27845400	182	uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size.
AnnaBridge	172:65be27845400	183	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
AnnaBridge	172:65be27845400	184
AnnaBridge	172:65be27845400	185	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	186	- @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer,
AnnaBridge	172:65be27845400	187	- @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */
AnnaBridge	172:65be27845400	188
AnnaBridge	172:65be27845400	189	uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode.
AnnaBridge	172:65be27845400	190	- This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE.
AnnaBridge	172:65be27845400	191
AnnaBridge	172:65be27845400	192	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	193	- @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer,
AnnaBridge	172:65be27845400	194	- @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */
AnnaBridge	172:65be27845400	195
AnnaBridge	172:65be27845400	196	uint32_t Alpha; /*!< Specifies the foreground or background Alpha value.
AnnaBridge	172:65be27845400	197	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
AnnaBridge	172:65be27845400	198
AnnaBridge	172:65be27845400	199	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	200	- @ref LL_DMA2D_FGND_SetAlpha() for foreground layer,
AnnaBridge	172:65be27845400	201	- @ref LL_DMA2D_BGND_SetAlpha() for background layer. */
AnnaBridge	172:65be27845400	202
AnnaBridge	172:65be27845400	203	uint32_t Blue; /*!< Specifies the foreground or background Blue color value.
AnnaBridge	172:65be27845400	204	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
AnnaBridge	172:65be27845400	205
AnnaBridge	172:65be27845400	206	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	207	- @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer,
AnnaBridge	172:65be27845400	208	- @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */
AnnaBridge	172:65be27845400	209
AnnaBridge	172:65be27845400	210	uint32_t Green; /*!< Specifies the foreground or background Green color value.
AnnaBridge	172:65be27845400	211	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
AnnaBridge	172:65be27845400	212
AnnaBridge	172:65be27845400	213	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	214	- @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer,
AnnaBridge	172:65be27845400	215	- @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */
AnnaBridge	172:65be27845400	216
AnnaBridge	172:65be27845400	217	uint32_t Red; /*!< Specifies the foreground or background Red color value.
AnnaBridge	172:65be27845400	218	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
AnnaBridge	172:65be27845400	219
AnnaBridge	172:65be27845400	220	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	221	- @ref LL_DMA2D_FGND_SetRedColor() for foreground layer,
AnnaBridge	172:65be27845400	222	- @ref LL_DMA2D_BGND_SetRedColor() for background layer. */
AnnaBridge	172:65be27845400	223
AnnaBridge	172:65be27845400	224	uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address.
AnnaBridge	172:65be27845400	225	- This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF.
AnnaBridge	172:65be27845400	226
AnnaBridge	172:65be27845400	227	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	228	- @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer,
AnnaBridge	172:65be27845400	229	- @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */
AnnaBridge	172:65be27845400	230
AnnaBridge	172:65be27845400	231	uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode.
AnnaBridge	172:65be27845400	232	- This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION.
AnnaBridge	172:65be27845400	233
AnnaBridge	172:65be27845400	234	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	235	- @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer,
AnnaBridge	172:65be27845400	236	- @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */
AnnaBridge	172:65be27845400	237
AnnaBridge	172:65be27845400	238	uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode.
AnnaBridge	172:65be27845400	239	This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP .
AnnaBridge	172:65be27845400	240
AnnaBridge	172:65be27845400	241	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	242	- @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer,
AnnaBridge	172:65be27845400	243	- @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */
AnnaBridge	172:65be27845400	244
AnnaBridge	172:65be27845400	245	uint32_t ChromaSubSampling; /*!< Configure the chroma sub-sampling mode for the YCbCr color mode
AnnaBridge	172:65be27845400	246	This parameter is applicable for foreground layer only.
AnnaBridge	172:65be27845400	247	This parameter can be one value of @ref DMA2D_LL_CHROMA_SUB_SAMPLING
AnnaBridge	172:65be27845400	248
AnnaBridge	172:65be27845400	249	This parameter can be modified afterwards using unitary functions
AnnaBridge	172:65be27845400	250	- @ref LL_DMA2D_FGND_SetChrSubSampling() for foreground layer. */
AnnaBridge	172:65be27845400	251
AnnaBridge	172:65be27845400	252	} LL_DMA2D_LayerCfgTypeDef;
AnnaBridge	172:65be27845400	253
AnnaBridge	172:65be27845400	254	/**
AnnaBridge	172:65be27845400	255	* @brief LL DMA2D Output Color Structure Definition
AnnaBridge	172:65be27845400	256	*/
AnnaBridge	172:65be27845400	257	typedef struct
AnnaBridge	172:65be27845400	258	{
AnnaBridge	172:65be27845400	259	uint32_t ColorMode; /*!< Specifies the color format of the output image.
AnnaBridge	172:65be27845400	260	- This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE.
AnnaBridge	172:65be27845400	261
AnnaBridge	172:65be27845400	262	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */
AnnaBridge	172:65be27845400	263
AnnaBridge	172:65be27845400	264	uint32_t OutputBlue; /*!< Specifies the Blue value of the output image.
AnnaBridge	172:65be27845400	265	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	266	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
AnnaBridge	172:65be27845400	267	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
AnnaBridge	172:65be27845400	268	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	269	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	270
AnnaBridge	172:65be27845400	271	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	272	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	273
AnnaBridge	172:65be27845400	274	uint32_t OutputGreen; /*!< Specifies the Green value of the output image.
AnnaBridge	172:65be27845400	275	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	276	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
AnnaBridge	172:65be27845400	277	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected.
AnnaBridge	172:65be27845400	278	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	279	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	280
AnnaBridge	172:65be27845400	281	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	282	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	283
AnnaBridge	172:65be27845400	284	uint32_t OutputRed; /*!< Specifies the Red value of the output image.
AnnaBridge	172:65be27845400	285	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	286	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected.
AnnaBridge	172:65be27845400	287	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected.
AnnaBridge	172:65be27845400	288	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	289	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	290
AnnaBridge	172:65be27845400	291	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	292	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	293
AnnaBridge	172:65be27845400	294	uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image.
AnnaBridge	172:65be27845400	295	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected.
AnnaBridge	172:65be27845400	296	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected.
AnnaBridge	172:65be27845400	297	- This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected.
AnnaBridge	172:65be27845400	298	- This parameter is not considered if RGB888 or RGB565 color mode is selected.
AnnaBridge	172:65be27845400	299
AnnaBridge	172:65be27845400	300	This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration
AnnaBridge	172:65be27845400	301	function @ref LL_DMA2D_ConfigOutputColor(). */
AnnaBridge	172:65be27845400	302
AnnaBridge	172:65be27845400	303	} LL_DMA2D_ColorTypeDef;
AnnaBridge	172:65be27845400	304
AnnaBridge	172:65be27845400	305	/**
AnnaBridge	172:65be27845400	306	* @}
AnnaBridge	172:65be27845400	307	*/
AnnaBridge	172:65be27845400	308	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	309
AnnaBridge	172:65be27845400	310	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	311	/** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants
AnnaBridge	172:65be27845400	312	* @{
AnnaBridge	172:65be27845400	313	*/
AnnaBridge	172:65be27845400	314
AnnaBridge	172:65be27845400	315	/** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	172:65be27845400	316	* @brief Flags defines which can be used with LL_DMA2D_ReadReg function
AnnaBridge	172:65be27845400	317	* @{
AnnaBridge	172:65be27845400	318	*/
AnnaBridge	172:65be27845400	319	#define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /!< Configuration Error Interrupt Flag /
AnnaBridge	172:65be27845400	320	#define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /!< CLUT Transfer Complete Interrupt Flag /
AnnaBridge	172:65be27845400	321	#define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /!< CLUT Access Error Interrupt Flag /
AnnaBridge	172:65be27845400	322	#define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /!< Transfer Watermark Interrupt Flag /
AnnaBridge	172:65be27845400	323	#define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /!< Transfer Complete Interrupt Flag /
AnnaBridge	172:65be27845400	324	#define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /!< Transfer Error Interrupt Flag /
AnnaBridge	172:65be27845400	325	/**
AnnaBridge	172:65be27845400	326	* @}
AnnaBridge	172:65be27845400	327	*/
AnnaBridge	172:65be27845400	328
AnnaBridge	172:65be27845400	329	/** @defgroup DMA2D_LL_EC_IT IT Defines
AnnaBridge	172:65be27845400	330	* @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions
AnnaBridge	172:65be27845400	331	* @{
AnnaBridge	172:65be27845400	332	*/
AnnaBridge	172:65be27845400	333	#define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /!< Configuration Error Interrupt /
AnnaBridge	172:65be27845400	334	#define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /!< CLUT Transfer Complete Interrupt /
AnnaBridge	172:65be27845400	335	#define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /!< CLUT Access Error Interrupt /
AnnaBridge	172:65be27845400	336	#define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /!< Transfer Watermark Interrupt /
AnnaBridge	172:65be27845400	337	#define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /!< Transfer Complete Interrupt /
AnnaBridge	172:65be27845400	338	#define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /!< Transfer Error Interrupt /
AnnaBridge	172:65be27845400	339	/**
AnnaBridge	172:65be27845400	340	* @}
AnnaBridge	172:65be27845400	341	*/
AnnaBridge	172:65be27845400	342
AnnaBridge	172:65be27845400	343	/** @defgroup DMA2D_LL_EC_MODE Mode
AnnaBridge	172:65be27845400	344	* @{
AnnaBridge	172:65be27845400	345	*/
AnnaBridge	172:65be27845400	346	#define LL_DMA2D_MODE_M2M 0x00000000U /!< DMA2D memory to memory transfer mode /
AnnaBridge	172:65be27845400	347	#define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /!< DMA2D memory to memory with pixel format conversion transfer mode /
AnnaBridge	172:65be27845400	348	#define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /!< DMA2D memory to memory with blending transfer mode /
AnnaBridge	172:65be27845400	349	#define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /!< DMA2D register to memory transfer mode /
AnnaBridge	172:65be27845400	350	/**
AnnaBridge	172:65be27845400	351	* @}
AnnaBridge	172:65be27845400	352	*/
AnnaBridge	172:65be27845400	353
AnnaBridge	172:65be27845400	354	/** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode
AnnaBridge	172:65be27845400	355	* @{
AnnaBridge	172:65be27845400	356	*/
AnnaBridge	172:65be27845400	357	#define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /!< ARGB8888 /
AnnaBridge	172:65be27845400	358	#define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /!< RGB888 /
AnnaBridge	172:65be27845400	359	#define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /!< RGB565 /
AnnaBridge	172:65be27845400	360	#define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0\|DMA2D_OPFCCR_CM_1) /!< ARGB1555 /
AnnaBridge	172:65be27845400	361	#define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /!< ARGB4444 /
AnnaBridge	172:65be27845400	362	/**
AnnaBridge	172:65be27845400	363	* @}
AnnaBridge	172:65be27845400	364	*/
AnnaBridge	172:65be27845400	365
AnnaBridge	172:65be27845400	366	/** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode
AnnaBridge	172:65be27845400	367	* @{
AnnaBridge	172:65be27845400	368	*/
AnnaBridge	172:65be27845400	369	#define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /!< ARGB8888 /
AnnaBridge	172:65be27845400	370	#define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /!< RGB888 /
AnnaBridge	172:65be27845400	371	#define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /!< RGB565 /
AnnaBridge	172:65be27845400	372	#define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_1) /!< ARGB1555 /
AnnaBridge	172:65be27845400	373	#define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /!< ARGB4444 /
AnnaBridge	172:65be27845400	374	#define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_2) /!< L8 /
AnnaBridge	172:65be27845400	375	#define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_2) /!< AL44 /
AnnaBridge	172:65be27845400	376	#define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_2) /!< AL88 /
AnnaBridge	172:65be27845400	377	#define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /!< L4 /
AnnaBridge	172:65be27845400	378	#define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_3) /!< A8 /
AnnaBridge	172:65be27845400	379	#define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_3) /!< A4 /
AnnaBridge	172:65be27845400	380	#define LL_DMA2D_INPUT_MODE_YCBCR (DMA2D_FGPFCCR_CM_0\|DMA2D_FGPFCCR_CM_1\|DMA2D_FGPFCCR_CM_3) /!< YCbCr /
AnnaBridge	172:65be27845400	381	/**
AnnaBridge	172:65be27845400	382	* @}
AnnaBridge	172:65be27845400	383	*/
AnnaBridge	172:65be27845400	384
AnnaBridge	172:65be27845400	385	/** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode
AnnaBridge	172:65be27845400	386	* @{
AnnaBridge	172:65be27845400	387	*/
AnnaBridge	172:65be27845400	388	#define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /!< No modification of the alpha channel value /
AnnaBridge	172:65be27845400	389	#define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /!< Replace original alpha channel value by programmed alpha value /
AnnaBridge	172:65be27845400	390	#define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value
AnnaBridge	172:65be27845400	391	with original alpha channel value */
AnnaBridge	172:65be27845400	392	/**
AnnaBridge	172:65be27845400	393	* @}
AnnaBridge	172:65be27845400	394	*/
AnnaBridge	172:65be27845400	395
AnnaBridge	172:65be27845400	396
AnnaBridge	172:65be27845400	397	/** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap
AnnaBridge	172:65be27845400	398	* @{
AnnaBridge	172:65be27845400	399	*/
AnnaBridge	172:65be27845400	400	#define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /!< RGB or ARGB /
AnnaBridge	172:65be27845400	401	#define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /!< BGR or ABGR /
AnnaBridge	172:65be27845400	402	/**
AnnaBridge	172:65be27845400	403	* @}
AnnaBridge	172:65be27845400	404	*/
AnnaBridge	172:65be27845400	405
AnnaBridge	172:65be27845400	406	/** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion
AnnaBridge	172:65be27845400	407	* @{
AnnaBridge	172:65be27845400	408	*/
AnnaBridge	172:65be27845400	409	#define LL_DMA2D_ALPHA_REGULAR 0x00000000U /!< Regular alpha /
AnnaBridge	172:65be27845400	410	#define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /!< Inverted alpha /
AnnaBridge	172:65be27845400	411	/**
AnnaBridge	172:65be27845400	412	* @}
AnnaBridge	172:65be27845400	413	*/
AnnaBridge	172:65be27845400	414
AnnaBridge	172:65be27845400	415
AnnaBridge	172:65be27845400	416
AnnaBridge	172:65be27845400	417	/** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode
AnnaBridge	172:65be27845400	418	* @{
AnnaBridge	172:65be27845400	419	*/
AnnaBridge	172:65be27845400	420	#define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /!< ARGB8888 /
AnnaBridge	172:65be27845400	421	#define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /!< RGB888 /
AnnaBridge	172:65be27845400	422	/**
AnnaBridge	172:65be27845400	423	* @}
AnnaBridge	172:65be27845400	424	*/
AnnaBridge	172:65be27845400	425
AnnaBridge	172:65be27845400	426	/** @defgroup DMA2D_LL_CHROMA_SUB_SAMPLING Chroma Sub Sampling
AnnaBridge	172:65be27845400	427	* @{
AnnaBridge	172:65be27845400	428	*/
AnnaBridge	172:65be27845400	429	#define LL_DMA2D_CSS_444 0x00000000U /!< No chroma sub-sampling 4:4:4 /
AnnaBridge	172:65be27845400	430	#define LL_DMA2D_CSS_422 DMA2D_FGPFCCR_CSS_0 /!< chroma sub-sampling 4:2:2 /
AnnaBridge	172:65be27845400	431	#define LL_DMA2D_CSS_420 DMA2D_FGPFCCR_CSS_1 /!< chroma sub-sampling 4:2:0 /
AnnaBridge	172:65be27845400	432	/**
AnnaBridge	172:65be27845400	433	* @}
AnnaBridge	172:65be27845400	434	*/
AnnaBridge	172:65be27845400	435
AnnaBridge	172:65be27845400	436	/**
AnnaBridge	172:65be27845400	437	* @}
AnnaBridge	172:65be27845400	438	*/
AnnaBridge	172:65be27845400	439
AnnaBridge	172:65be27845400	440	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	441	/** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros
AnnaBridge	172:65be27845400	442	* @{
AnnaBridge	172:65be27845400	443	*/
AnnaBridge	172:65be27845400	444
AnnaBridge	172:65be27845400	445	/** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	172:65be27845400	446	* @{
AnnaBridge	172:65be27845400	447	*/
AnnaBridge	172:65be27845400	448
AnnaBridge	172:65be27845400	449	/**
AnnaBridge	172:65be27845400	450	* @brief Write a value in DMA2D register.
AnnaBridge	172:65be27845400	451	* @param __INSTANCE__ DMA2D Instance
AnnaBridge	172:65be27845400	452	* @param __REG__ Register to be written
AnnaBridge	172:65be27845400	453	* @param __VALUE__ Value to be written in the register
AnnaBridge	172:65be27845400	454	* @retval None
AnnaBridge	172:65be27845400	455	*/
AnnaBridge	172:65be27845400	456	#define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->__REG__, (__VALUE__))
AnnaBridge	172:65be27845400	457
AnnaBridge	172:65be27845400	458	/**
AnnaBridge	172:65be27845400	459	* @brief Read a value in DMA2D register.
AnnaBridge	172:65be27845400	460	* @param __INSTANCE__ DMA2D Instance
AnnaBridge	172:65be27845400	461	* @param __REG__ Register to be read
AnnaBridge	172:65be27845400	462	* @retval Register value
AnnaBridge	172:65be27845400	463	*/
AnnaBridge	172:65be27845400	464	#define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->__REG__)
AnnaBridge	172:65be27845400	465	/**
AnnaBridge	172:65be27845400	466	* @}
AnnaBridge	172:65be27845400	467	*/
AnnaBridge	172:65be27845400	468
AnnaBridge	172:65be27845400	469	/**
AnnaBridge	172:65be27845400	470	* @}
AnnaBridge	172:65be27845400	471	*/
AnnaBridge	172:65be27845400	472
AnnaBridge	172:65be27845400	473	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	474	/** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions
AnnaBridge	172:65be27845400	475	* @{
AnnaBridge	172:65be27845400	476	*/
AnnaBridge	172:65be27845400	477
AnnaBridge	172:65be27845400	478	/** @defgroup DMA2D_LL_EF_Configuration Configuration Functions
AnnaBridge	172:65be27845400	479	* @{
AnnaBridge	172:65be27845400	480	*/
AnnaBridge	172:65be27845400	481
AnnaBridge	172:65be27845400	482	/**
AnnaBridge	172:65be27845400	483	* @brief Start a DMA2D transfer.
AnnaBridge	172:65be27845400	484	* @rmtoll CR START LL_DMA2D_Start
AnnaBridge	172:65be27845400	485	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	486	* @retval None
AnnaBridge	172:65be27845400	487	*/
AnnaBridge	172:65be27845400	488	__STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	489	{
AnnaBridge	172:65be27845400	490	SET_BIT(DMA2Dx->CR, DMA2D_CR_START);
AnnaBridge	172:65be27845400	491	}
AnnaBridge	172:65be27845400	492
AnnaBridge	172:65be27845400	493	/**
AnnaBridge	172:65be27845400	494	* @brief Indicate if a DMA2D transfer is ongoing.
AnnaBridge	172:65be27845400	495	* @rmtoll CR START LL_DMA2D_IsTransferOngoing
AnnaBridge	172:65be27845400	496	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	497	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	498	*/
AnnaBridge	172:65be27845400	499	__STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	500	{
AnnaBridge	172:65be27845400	501	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	502	}
AnnaBridge	172:65be27845400	503
AnnaBridge	172:65be27845400	504	/**
AnnaBridge	172:65be27845400	505	* @brief Suspend DMA2D transfer.
AnnaBridge	172:65be27845400	506	* @note This API can be used to suspend automatic foreground or background CLUT loading.
AnnaBridge	172:65be27845400	507	* @rmtoll CR SUSP LL_DMA2D_Suspend
AnnaBridge	172:65be27845400	508	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	509	* @retval None
AnnaBridge	172:65be27845400	510	*/
AnnaBridge	172:65be27845400	511	__STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	512	{
AnnaBridge	172:65be27845400	513	MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP \| DMA2D_CR_START, DMA2D_CR_SUSP);
AnnaBridge	172:65be27845400	514	}
AnnaBridge	172:65be27845400	515
AnnaBridge	172:65be27845400	516	/**
AnnaBridge	172:65be27845400	517	* @brief Resume DMA2D transfer.
AnnaBridge	172:65be27845400	518	* @note This API can be used to resume automatic foreground or background CLUT loading.
AnnaBridge	172:65be27845400	519	* @rmtoll CR SUSP LL_DMA2D_Resume
AnnaBridge	172:65be27845400	520	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	521	* @retval None
AnnaBridge	172:65be27845400	522	*/
AnnaBridge	172:65be27845400	523	__STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	524	{
AnnaBridge	172:65be27845400	525	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP \| DMA2D_CR_START);
AnnaBridge	172:65be27845400	526	}
AnnaBridge	172:65be27845400	527
AnnaBridge	172:65be27845400	528	/**
AnnaBridge	172:65be27845400	529	* @brief Indicate if DMA2D transfer is suspended.
AnnaBridge	172:65be27845400	530	* @note This API can be used to indicate whether or not automatic foreground or
AnnaBridge	172:65be27845400	531	* background CLUT loading is suspended.
AnnaBridge	172:65be27845400	532	* @rmtoll CR SUSP LL_DMA2D_IsSuspended
AnnaBridge	172:65be27845400	533	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	534	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	535	*/
AnnaBridge	172:65be27845400	536	__STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	537	{
AnnaBridge	172:65be27845400	538	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	539	}
AnnaBridge	172:65be27845400	540
AnnaBridge	172:65be27845400	541	/**
AnnaBridge	172:65be27845400	542	* @brief Abort DMA2D transfer.
AnnaBridge	172:65be27845400	543	* @note This API can be used to abort automatic foreground or background CLUT loading.
AnnaBridge	172:65be27845400	544	* @rmtoll CR ABORT LL_DMA2D_Abort
AnnaBridge	172:65be27845400	545	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	546	* @retval None
AnnaBridge	172:65be27845400	547	*/
AnnaBridge	172:65be27845400	548	__STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	549	{
AnnaBridge	172:65be27845400	550	MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT \| DMA2D_CR_START, DMA2D_CR_ABORT);
AnnaBridge	172:65be27845400	551	}
AnnaBridge	172:65be27845400	552
AnnaBridge	172:65be27845400	553	/**
AnnaBridge	172:65be27845400	554	* @brief Indicate if DMA2D transfer is aborted.
AnnaBridge	172:65be27845400	555	* @note This API can be used to indicate whether or not automatic foreground or
AnnaBridge	172:65be27845400	556	* background CLUT loading is aborted.
AnnaBridge	172:65be27845400	557	* @rmtoll CR ABORT LL_DMA2D_IsAborted
AnnaBridge	172:65be27845400	558	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	559	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	560	*/
AnnaBridge	172:65be27845400	561	__STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	562	{
AnnaBridge	172:65be27845400	563	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	564	}
AnnaBridge	172:65be27845400	565
AnnaBridge	172:65be27845400	566	/**
AnnaBridge	172:65be27845400	567	* @brief Set DMA2D mode.
AnnaBridge	172:65be27845400	568	* @rmtoll CR MODE LL_DMA2D_SetMode
AnnaBridge	172:65be27845400	569	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	570	* @param Mode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	571	* @arg @ref LL_DMA2D_MODE_M2M
AnnaBridge	172:65be27845400	572	* @arg @ref LL_DMA2D_MODE_M2M_PFC
AnnaBridge	172:65be27845400	573	* @arg @ref LL_DMA2D_MODE_M2M_BLEND
AnnaBridge	172:65be27845400	574	* @arg @ref LL_DMA2D_MODE_R2M
AnnaBridge	172:65be27845400	575	* @retval None
AnnaBridge	172:65be27845400	576	*/
AnnaBridge	172:65be27845400	577	__STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode)
AnnaBridge	172:65be27845400	578	{
AnnaBridge	172:65be27845400	579	MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode);
AnnaBridge	172:65be27845400	580	}
AnnaBridge	172:65be27845400	581
AnnaBridge	172:65be27845400	582	/**
AnnaBridge	172:65be27845400	583	* @brief Return DMA2D mode
AnnaBridge	172:65be27845400	584	* @rmtoll CR MODE LL_DMA2D_GetMode
AnnaBridge	172:65be27845400	585	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	586	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	587	* @arg @ref LL_DMA2D_MODE_M2M
AnnaBridge	172:65be27845400	588	* @arg @ref LL_DMA2D_MODE_M2M_PFC
AnnaBridge	172:65be27845400	589	* @arg @ref LL_DMA2D_MODE_M2M_BLEND
AnnaBridge	172:65be27845400	590	* @arg @ref LL_DMA2D_MODE_R2M
AnnaBridge	172:65be27845400	591	*/
AnnaBridge	172:65be27845400	592	__STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	593	{
AnnaBridge	172:65be27845400	594	return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE));
AnnaBridge	172:65be27845400	595	}
AnnaBridge	172:65be27845400	596
AnnaBridge	172:65be27845400	597	/**
AnnaBridge	172:65be27845400	598	* @brief Set DMA2D output color mode.
AnnaBridge	172:65be27845400	599	* @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode
AnnaBridge	172:65be27845400	600	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	601	* @param ColorMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	602	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
AnnaBridge	172:65be27845400	603	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
AnnaBridge	172:65be27845400	604	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
AnnaBridge	172:65be27845400	605	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
AnnaBridge	172:65be27845400	606	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
AnnaBridge	172:65be27845400	607	* @retval None
AnnaBridge	172:65be27845400	608	*/
AnnaBridge	172:65be27845400	609	__STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
AnnaBridge	172:65be27845400	610	{
AnnaBridge	172:65be27845400	611	MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode);
AnnaBridge	172:65be27845400	612	}
AnnaBridge	172:65be27845400	613
AnnaBridge	172:65be27845400	614	/**
AnnaBridge	172:65be27845400	615	* @brief Return DMA2D output color mode.
AnnaBridge	172:65be27845400	616	* @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode
AnnaBridge	172:65be27845400	617	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	618	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	619	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888
AnnaBridge	172:65be27845400	620	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888
AnnaBridge	172:65be27845400	621	* @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565
AnnaBridge	172:65be27845400	622	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555
AnnaBridge	172:65be27845400	623	* @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444
AnnaBridge	172:65be27845400	624	*/
AnnaBridge	172:65be27845400	625	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	626	{
AnnaBridge	172:65be27845400	627	return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM));
AnnaBridge	172:65be27845400	628	}
AnnaBridge	172:65be27845400	629
AnnaBridge	172:65be27845400	630	/**
AnnaBridge	172:65be27845400	631	* @brief Set DMA2D output Red Blue swap mode.
AnnaBridge	172:65be27845400	632	* @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode
AnnaBridge	172:65be27845400	633	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	634	* @param RBSwapMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	635	* @arg @ref LL_DMA2D_RB_MODE_REGULAR
AnnaBridge	172:65be27845400	636	* @arg @ref LL_DMA2D_RB_MODE_SWAP
AnnaBridge	172:65be27845400	637	* @retval None
AnnaBridge	172:65be27845400	638	*/
AnnaBridge	172:65be27845400	639	__STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
AnnaBridge	172:65be27845400	640	{
AnnaBridge	172:65be27845400	641	MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode);
AnnaBridge	172:65be27845400	642	}
AnnaBridge	172:65be27845400	643
AnnaBridge	172:65be27845400	644	/**
AnnaBridge	172:65be27845400	645	* @brief Return DMA2D output Red Blue swap mode.
AnnaBridge	172:65be27845400	646	* @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode
AnnaBridge	172:65be27845400	647	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	648	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	649	* @arg @ref LL_DMA2D_RB_MODE_REGULAR
AnnaBridge	172:65be27845400	650	* @arg @ref LL_DMA2D_RB_MODE_SWAP
AnnaBridge	172:65be27845400	651	*/
AnnaBridge	172:65be27845400	652	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	653	{
AnnaBridge	172:65be27845400	654	return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS));
AnnaBridge	172:65be27845400	655	}
AnnaBridge	172:65be27845400	656
AnnaBridge	172:65be27845400	657	/**
AnnaBridge	172:65be27845400	658	* @brief Set DMA2D output alpha inversion mode.
AnnaBridge	172:65be27845400	659	* @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode
AnnaBridge	172:65be27845400	660	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	661	* @param AlphaInversionMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	662	* @arg @ref LL_DMA2D_ALPHA_REGULAR
AnnaBridge	172:65be27845400	663	* @arg @ref LL_DMA2D_ALPHA_INVERTED
AnnaBridge	172:65be27845400	664	* @retval None
AnnaBridge	172:65be27845400	665	*/
AnnaBridge	172:65be27845400	666	__STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
AnnaBridge	172:65be27845400	667	{
AnnaBridge	172:65be27845400	668	MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode);
AnnaBridge	172:65be27845400	669	}
AnnaBridge	172:65be27845400	670
AnnaBridge	172:65be27845400	671	/**
AnnaBridge	172:65be27845400	672	* @brief Return DMA2D output alpha inversion mode.
AnnaBridge	172:65be27845400	673	* @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode
AnnaBridge	172:65be27845400	674	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	675	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	676	* @arg @ref LL_DMA2D_ALPHA_REGULAR
AnnaBridge	172:65be27845400	677	* @arg @ref LL_DMA2D_ALPHA_INVERTED
AnnaBridge	172:65be27845400	678	*/
AnnaBridge	172:65be27845400	679	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	680	{
AnnaBridge	172:65be27845400	681	return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI));
AnnaBridge	172:65be27845400	682	}
AnnaBridge	172:65be27845400	683
AnnaBridge	172:65be27845400	684
AnnaBridge	172:65be27845400	685
AnnaBridge	172:65be27845400	686
AnnaBridge	172:65be27845400	687	/**
AnnaBridge	172:65be27845400	688	* @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	689	* @rmtoll OOR LO LL_DMA2D_SetLineOffset
AnnaBridge	172:65be27845400	690	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	691	* @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF
AnnaBridge	172:65be27845400	692	* @retval None
AnnaBridge	172:65be27845400	693	*/
AnnaBridge	172:65be27845400	694	__STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
AnnaBridge	172:65be27845400	695	{
AnnaBridge	172:65be27845400	696	MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset);
AnnaBridge	172:65be27845400	697	}
AnnaBridge	172:65be27845400	698
AnnaBridge	172:65be27845400	699	/**
AnnaBridge	172:65be27845400	700	* @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	701	* @rmtoll OOR LO LL_DMA2D_GetLineOffset
AnnaBridge	172:65be27845400	702	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	703	* @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF
AnnaBridge	172:65be27845400	704	*/
AnnaBridge	172:65be27845400	705	__STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	706	{
AnnaBridge	172:65be27845400	707	return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO));
AnnaBridge	172:65be27845400	708	}
AnnaBridge	172:65be27845400	709
AnnaBridge	172:65be27845400	710	/**
AnnaBridge	172:65be27845400	711	* @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	712	* @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines
AnnaBridge	172:65be27845400	713	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	714	* @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF
AnnaBridge	172:65be27845400	715	* @retval None
AnnaBridge	172:65be27845400	716	*/
AnnaBridge	172:65be27845400	717	__STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines)
AnnaBridge	172:65be27845400	718	{
AnnaBridge	172:65be27845400	719	MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos));
AnnaBridge	172:65be27845400	720	}
AnnaBridge	172:65be27845400	721
AnnaBridge	172:65be27845400	722	/**
AnnaBridge	172:65be27845400	723	* @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits)
AnnaBridge	172:65be27845400	724	* @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines
AnnaBridge	172:65be27845400	725	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	726	* @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF
AnnaBridge	172:65be27845400	727	*/
AnnaBridge	172:65be27845400	728	__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	729	{
AnnaBridge	172:65be27845400	730	return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos);
AnnaBridge	172:65be27845400	731	}
AnnaBridge	172:65be27845400	732
AnnaBridge	172:65be27845400	733	/**
AnnaBridge	172:65be27845400	734	* @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits).
AnnaBridge	172:65be27845400	735	* @rmtoll NLR NL LL_DMA2D_SetNbrOfLines
AnnaBridge	172:65be27845400	736	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	737	* @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	738	* @retval None
AnnaBridge	172:65be27845400	739	*/
AnnaBridge	172:65be27845400	740	__STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines)
AnnaBridge	172:65be27845400	741	{
AnnaBridge	172:65be27845400	742	MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines);
AnnaBridge	172:65be27845400	743	}
AnnaBridge	172:65be27845400	744
AnnaBridge	172:65be27845400	745	/**
AnnaBridge	172:65be27845400	746	* @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits).
AnnaBridge	172:65be27845400	747	* @rmtoll NLR NL LL_DMA2D_GetNbrOfLines
AnnaBridge	172:65be27845400	748	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	749	* @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	750	*/
AnnaBridge	172:65be27845400	751	__STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	752	{
AnnaBridge	172:65be27845400	753	return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL));
AnnaBridge	172:65be27845400	754	}
AnnaBridge	172:65be27845400	755
AnnaBridge	172:65be27845400	756	/**
AnnaBridge	172:65be27845400	757	* @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	758	* @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr
AnnaBridge	172:65be27845400	759	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	760	* @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	761	* @retval None
AnnaBridge	172:65be27845400	762	*/
AnnaBridge	172:65be27845400	763	__STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress)
AnnaBridge	172:65be27845400	764	{
AnnaBridge	172:65be27845400	765	LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress);
AnnaBridge	172:65be27845400	766	}
AnnaBridge	172:65be27845400	767
AnnaBridge	172:65be27845400	768	/**
AnnaBridge	172:65be27845400	769	* @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	770	* @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr
AnnaBridge	172:65be27845400	771	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	772	* @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	773	*/
AnnaBridge	172:65be27845400	774	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	775	{
AnnaBridge	172:65be27845400	776	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR));
AnnaBridge	172:65be27845400	777	}
AnnaBridge	172:65be27845400	778
AnnaBridge	172:65be27845400	779	/**
AnnaBridge	172:65be27845400	780	* @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	781	* @note Output color format depends on output color mode, ARGB8888, RGB888,
AnnaBridge	172:65be27845400	782	* RGB565, ARGB1555 or ARGB4444.
AnnaBridge	172:65be27845400	783	* @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting
AnnaBridge	172:65be27845400	784	* with respect to color mode is not done by the user code.
AnnaBridge	172:65be27845400	785	* @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n
AnnaBridge	172:65be27845400	786	* OCOLR GREEN LL_DMA2D_SetOutputColor\n
AnnaBridge	172:65be27845400	787	* OCOLR RED LL_DMA2D_SetOutputColor\n
AnnaBridge	172:65be27845400	788	* OCOLR ALPHA LL_DMA2D_SetOutputColor
AnnaBridge	172:65be27845400	789	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	790	* @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	791	* @retval None
AnnaBridge	172:65be27845400	792	*/
AnnaBridge	172:65be27845400	793	__STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor)
AnnaBridge	172:65be27845400	794	{
AnnaBridge	172:65be27845400	795	MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 \| DMA2D_OCOLR_GREEN_1 \| DMA2D_OCOLR_RED_1 \| DMA2D_OCOLR_ALPHA_1), \
AnnaBridge	172:65be27845400	796	OutputColor);
AnnaBridge	172:65be27845400	797	}
AnnaBridge	172:65be27845400	798
AnnaBridge	172:65be27845400	799	/**
AnnaBridge	172:65be27845400	800	* @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	801	* @note Alpha channel and red, green, blue color values must be retrieved from the returned
AnnaBridge	172:65be27845400	802	* value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444)
AnnaBridge	172:65be27845400	803	* as set by @ref LL_DMA2D_SetOutputColorMode.
AnnaBridge	172:65be27845400	804	* @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n
AnnaBridge	172:65be27845400	805	* OCOLR GREEN LL_DMA2D_GetOutputColor\n
AnnaBridge	172:65be27845400	806	* OCOLR RED LL_DMA2D_GetOutputColor\n
AnnaBridge	172:65be27845400	807	* OCOLR ALPHA LL_DMA2D_GetOutputColor
AnnaBridge	172:65be27845400	808	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	809	* @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	810	*/
AnnaBridge	172:65be27845400	811	__STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	812	{
AnnaBridge	172:65be27845400	813	return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \
AnnaBridge	172:65be27845400	814	(DMA2D_OCOLR_BLUE_1 \| DMA2D_OCOLR_GREEN_1 \| DMA2D_OCOLR_RED_1 \| DMA2D_OCOLR_ALPHA_1)));
AnnaBridge	172:65be27845400	815	}
AnnaBridge	172:65be27845400	816
AnnaBridge	172:65be27845400	817	/**
AnnaBridge	172:65be27845400	818	* @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits).
AnnaBridge	172:65be27845400	819	* @rmtoll LWR LW LL_DMA2D_SetLineWatermark
AnnaBridge	172:65be27845400	820	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	821	* @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	822	* @retval None
AnnaBridge	172:65be27845400	823	*/
AnnaBridge	172:65be27845400	824	__STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark)
AnnaBridge	172:65be27845400	825	{
AnnaBridge	172:65be27845400	826	MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark);
AnnaBridge	172:65be27845400	827	}
AnnaBridge	172:65be27845400	828
AnnaBridge	172:65be27845400	829	/**
AnnaBridge	172:65be27845400	830	* @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits).
AnnaBridge	172:65be27845400	831	* @rmtoll LWR LW LL_DMA2D_GetLineWatermark
AnnaBridge	172:65be27845400	832	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	833	* @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	834	*/
AnnaBridge	172:65be27845400	835	__STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	836	{
AnnaBridge	172:65be27845400	837	return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW));
AnnaBridge	172:65be27845400	838	}
AnnaBridge	172:65be27845400	839
AnnaBridge	172:65be27845400	840	/**
AnnaBridge	172:65be27845400	841	* @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	842	* @rmtoll AMTCR DT LL_DMA2D_SetDeadTime
AnnaBridge	172:65be27845400	843	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	844	* @param DeadTime Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	845	* @retval None
AnnaBridge	172:65be27845400	846	*/
AnnaBridge	172:65be27845400	847	__STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime)
AnnaBridge	172:65be27845400	848	{
AnnaBridge	172:65be27845400	849	MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos));
AnnaBridge	172:65be27845400	850	}
AnnaBridge	172:65be27845400	851
AnnaBridge	172:65be27845400	852	/**
AnnaBridge	172:65be27845400	853	* @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	854	* @rmtoll AMTCR DT LL_DMA2D_GetDeadTime
AnnaBridge	172:65be27845400	855	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	856	* @retval Dead time value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	857	*/
AnnaBridge	172:65be27845400	858	__STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	859	{
AnnaBridge	172:65be27845400	860	return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos);
AnnaBridge	172:65be27845400	861	}
AnnaBridge	172:65be27845400	862
AnnaBridge	172:65be27845400	863	/**
AnnaBridge	172:65be27845400	864	* @brief Enable DMA2D dead time functionality.
AnnaBridge	172:65be27845400	865	* @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime
AnnaBridge	172:65be27845400	866	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	867	* @retval None
AnnaBridge	172:65be27845400	868	*/
AnnaBridge	172:65be27845400	869	__STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	870	{
AnnaBridge	172:65be27845400	871	SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
AnnaBridge	172:65be27845400	872	}
AnnaBridge	172:65be27845400	873
AnnaBridge	172:65be27845400	874	/**
AnnaBridge	172:65be27845400	875	* @brief Disable DMA2D dead time functionality.
AnnaBridge	172:65be27845400	876	* @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime
AnnaBridge	172:65be27845400	877	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	878	* @retval None
AnnaBridge	172:65be27845400	879	*/
AnnaBridge	172:65be27845400	880	__STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	881	{
AnnaBridge	172:65be27845400	882	CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN);
AnnaBridge	172:65be27845400	883	}
AnnaBridge	172:65be27845400	884
AnnaBridge	172:65be27845400	885	/**
AnnaBridge	172:65be27845400	886	* @brief Indicate if DMA2D dead time functionality is enabled.
AnnaBridge	172:65be27845400	887	* @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime
AnnaBridge	172:65be27845400	888	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	889	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	890	*/
AnnaBridge	172:65be27845400	891	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	892	{
AnnaBridge	172:65be27845400	893	return ((READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	894	}
AnnaBridge	172:65be27845400	895
AnnaBridge	172:65be27845400	896	/** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions
AnnaBridge	172:65be27845400	897	* @{
AnnaBridge	172:65be27845400	898	*/
AnnaBridge	172:65be27845400	899
AnnaBridge	172:65be27845400	900	/**
AnnaBridge	172:65be27845400	901	* @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	902	* @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr
AnnaBridge	172:65be27845400	903	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	904	* @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	905	* @retval None
AnnaBridge	172:65be27845400	906	*/
AnnaBridge	172:65be27845400	907	__STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
AnnaBridge	172:65be27845400	908	{
AnnaBridge	172:65be27845400	909	LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress);
AnnaBridge	172:65be27845400	910	}
AnnaBridge	172:65be27845400	911
AnnaBridge	172:65be27845400	912	/**
AnnaBridge	172:65be27845400	913	* @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	914	* @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr
AnnaBridge	172:65be27845400	915	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	916	* @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	917	*/
AnnaBridge	172:65be27845400	918	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	919	{
AnnaBridge	172:65be27845400	920	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR));
AnnaBridge	172:65be27845400	921	}
AnnaBridge	172:65be27845400	922
AnnaBridge	172:65be27845400	923	/**
AnnaBridge	172:65be27845400	924	* @brief Enable DMA2D foreground CLUT loading.
AnnaBridge	172:65be27845400	925	* @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad
AnnaBridge	172:65be27845400	926	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	927	* @retval None
AnnaBridge	172:65be27845400	928	*/
AnnaBridge	172:65be27845400	929	__STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	930	{
AnnaBridge	172:65be27845400	931	SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START);
AnnaBridge	172:65be27845400	932	}
AnnaBridge	172:65be27845400	933
AnnaBridge	172:65be27845400	934	/**
AnnaBridge	172:65be27845400	935	* @brief Indicate if DMA2D foreground CLUT loading is enabled.
AnnaBridge	172:65be27845400	936	* @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad
AnnaBridge	172:65be27845400	937	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	938	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	939	*/
AnnaBridge	172:65be27845400	940	__STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	941	{
AnnaBridge	172:65be27845400	942	return ((READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	943	}
AnnaBridge	172:65be27845400	944
AnnaBridge	172:65be27845400	945	/**
AnnaBridge	172:65be27845400	946	* @brief Set DMA2D foreground color mode.
AnnaBridge	172:65be27845400	947	* @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode
AnnaBridge	172:65be27845400	948	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	949	* @param ColorMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	950	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
AnnaBridge	172:65be27845400	951	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
AnnaBridge	172:65be27845400	952	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
AnnaBridge	172:65be27845400	953	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
AnnaBridge	172:65be27845400	954	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
AnnaBridge	172:65be27845400	955	* @arg @ref LL_DMA2D_INPUT_MODE_L8
AnnaBridge	172:65be27845400	956	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
AnnaBridge	172:65be27845400	957	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
AnnaBridge	172:65be27845400	958	* @arg @ref LL_DMA2D_INPUT_MODE_L4
AnnaBridge	172:65be27845400	959	* @arg @ref LL_DMA2D_INPUT_MODE_A8
AnnaBridge	172:65be27845400	960	* @arg @ref LL_DMA2D_INPUT_MODE_A4
AnnaBridge	172:65be27845400	961	* @retval None
AnnaBridge	172:65be27845400	962	*/
AnnaBridge	172:65be27845400	963	__STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
AnnaBridge	172:65be27845400	964	{
AnnaBridge	172:65be27845400	965	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode);
AnnaBridge	172:65be27845400	966	}
AnnaBridge	172:65be27845400	967
AnnaBridge	172:65be27845400	968	/**
AnnaBridge	172:65be27845400	969	* @brief Return DMA2D foreground color mode.
AnnaBridge	172:65be27845400	970	* @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode
AnnaBridge	172:65be27845400	971	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	972	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	973	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
AnnaBridge	172:65be27845400	974	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
AnnaBridge	172:65be27845400	975	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
AnnaBridge	172:65be27845400	976	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
AnnaBridge	172:65be27845400	977	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
AnnaBridge	172:65be27845400	978	* @arg @ref LL_DMA2D_INPUT_MODE_L8
AnnaBridge	172:65be27845400	979	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
AnnaBridge	172:65be27845400	980	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
AnnaBridge	172:65be27845400	981	* @arg @ref LL_DMA2D_INPUT_MODE_L4
AnnaBridge	172:65be27845400	982	* @arg @ref LL_DMA2D_INPUT_MODE_A8
AnnaBridge	172:65be27845400	983	* @arg @ref LL_DMA2D_INPUT_MODE_A4
AnnaBridge	172:65be27845400	984	*/
AnnaBridge	172:65be27845400	985	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	986	{
AnnaBridge	172:65be27845400	987	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM));
AnnaBridge	172:65be27845400	988	}
AnnaBridge	172:65be27845400	989
AnnaBridge	172:65be27845400	990	/**
AnnaBridge	172:65be27845400	991	* @brief Set DMA2D foreground alpha mode.
AnnaBridge	172:65be27845400	992	* @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode
AnnaBridge	172:65be27845400	993	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	994	* @param AphaMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	995	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
AnnaBridge	172:65be27845400	996	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
AnnaBridge	172:65be27845400	997	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
AnnaBridge	172:65be27845400	998	* @retval None
AnnaBridge	172:65be27845400	999	*/
AnnaBridge	172:65be27845400	1000	__STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
AnnaBridge	172:65be27845400	1001	{
AnnaBridge	172:65be27845400	1002	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode);
AnnaBridge	172:65be27845400	1003	}
AnnaBridge	172:65be27845400	1004
AnnaBridge	172:65be27845400	1005	/**
AnnaBridge	172:65be27845400	1006	* @brief Return DMA2D foreground alpha mode.
AnnaBridge	172:65be27845400	1007	* @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode
AnnaBridge	172:65be27845400	1008	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1009	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1010	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
AnnaBridge	172:65be27845400	1011	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
AnnaBridge	172:65be27845400	1012	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
AnnaBridge	172:65be27845400	1013	*/
AnnaBridge	172:65be27845400	1014	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1015	{
AnnaBridge	172:65be27845400	1016	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM));
AnnaBridge	172:65be27845400	1017	}
AnnaBridge	172:65be27845400	1018
AnnaBridge	172:65be27845400	1019	/**
AnnaBridge	172:65be27845400	1020	* @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1021	* @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha
AnnaBridge	172:65be27845400	1022	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1023	* @param Alpha Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1024	* @retval None
AnnaBridge	172:65be27845400	1025	*/
AnnaBridge	172:65be27845400	1026	__STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
AnnaBridge	172:65be27845400	1027	{
AnnaBridge	172:65be27845400	1028	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos));
AnnaBridge	172:65be27845400	1029	}
AnnaBridge	172:65be27845400	1030
AnnaBridge	172:65be27845400	1031	/**
AnnaBridge	172:65be27845400	1032	* @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1033	* @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha
AnnaBridge	172:65be27845400	1034	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1035	* @retval Alpha value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1036	*/
AnnaBridge	172:65be27845400	1037	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1038	{
AnnaBridge	172:65be27845400	1039	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos);
AnnaBridge	172:65be27845400	1040	}
AnnaBridge	172:65be27845400	1041
AnnaBridge	172:65be27845400	1042	/**
AnnaBridge	172:65be27845400	1043	* @brief Set DMA2D foreground Red Blue swap mode.
AnnaBridge	172:65be27845400	1044	* @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode
AnnaBridge	172:65be27845400	1045	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1046	* @param RBSwapMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1047	* @arg @ref LL_DMA2D_RB_MODE_REGULAR
AnnaBridge	172:65be27845400	1048	* @arg @ref LL_DMA2D_RB_MODE_SWAP
AnnaBridge	172:65be27845400	1049	* @retval None
AnnaBridge	172:65be27845400	1050	*/
AnnaBridge	172:65be27845400	1051	__STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
AnnaBridge	172:65be27845400	1052	{
AnnaBridge	172:65be27845400	1053	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode);
AnnaBridge	172:65be27845400	1054	}
AnnaBridge	172:65be27845400	1055
AnnaBridge	172:65be27845400	1056	/**
AnnaBridge	172:65be27845400	1057	* @brief Return DMA2D foreground Red Blue swap mode.
AnnaBridge	172:65be27845400	1058	* @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode
AnnaBridge	172:65be27845400	1059	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1060	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1061	* @arg @ref LL_DMA2D_RB_MODE_REGULAR
AnnaBridge	172:65be27845400	1062	* @arg @ref LL_DMA2D_RB_MODE_SWAP
AnnaBridge	172:65be27845400	1063	*/
AnnaBridge	172:65be27845400	1064	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1065	{
AnnaBridge	172:65be27845400	1066	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS));
AnnaBridge	172:65be27845400	1067	}
AnnaBridge	172:65be27845400	1068
AnnaBridge	172:65be27845400	1069	/**
AnnaBridge	172:65be27845400	1070	* @brief Set DMA2D foreground alpha inversion mode.
AnnaBridge	172:65be27845400	1071	* @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode
AnnaBridge	172:65be27845400	1072	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1073	* @param AlphaInversionMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1074	* @arg @ref LL_DMA2D_ALPHA_REGULAR
AnnaBridge	172:65be27845400	1075	* @arg @ref LL_DMA2D_ALPHA_INVERTED
AnnaBridge	172:65be27845400	1076	* @retval None
AnnaBridge	172:65be27845400	1077	*/
AnnaBridge	172:65be27845400	1078	__STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
AnnaBridge	172:65be27845400	1079	{
AnnaBridge	172:65be27845400	1080	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode);
AnnaBridge	172:65be27845400	1081	}
AnnaBridge	172:65be27845400	1082
AnnaBridge	172:65be27845400	1083	/**
AnnaBridge	172:65be27845400	1084	* @brief Return DMA2D foreground alpha inversion mode.
AnnaBridge	172:65be27845400	1085	* @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode
AnnaBridge	172:65be27845400	1086	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1087	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1088	* @arg @ref LL_DMA2D_ALPHA_REGULAR
AnnaBridge	172:65be27845400	1089	* @arg @ref LL_DMA2D_ALPHA_INVERTED
AnnaBridge	172:65be27845400	1090	*/
AnnaBridge	172:65be27845400	1091	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1092	{
AnnaBridge	172:65be27845400	1093	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI));
AnnaBridge	172:65be27845400	1094	}
AnnaBridge	172:65be27845400	1095
AnnaBridge	172:65be27845400	1096	/**
AnnaBridge	172:65be27845400	1097	* @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	1098	* @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset
AnnaBridge	172:65be27845400	1099	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1100	* @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
AnnaBridge	172:65be27845400	1101	* @retval None
AnnaBridge	172:65be27845400	1102	*/
AnnaBridge	172:65be27845400	1103	__STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
AnnaBridge	172:65be27845400	1104	{
AnnaBridge	172:65be27845400	1105	MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset);
AnnaBridge	172:65be27845400	1106	}
AnnaBridge	172:65be27845400	1107
AnnaBridge	172:65be27845400	1108	/**
AnnaBridge	172:65be27845400	1109	* @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	1110	* @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset
AnnaBridge	172:65be27845400	1111	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1112	* @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF
AnnaBridge	172:65be27845400	1113	*/
AnnaBridge	172:65be27845400	1114	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1115	{
AnnaBridge	172:65be27845400	1116	return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO));
AnnaBridge	172:65be27845400	1117	}
AnnaBridge	172:65be27845400	1118
AnnaBridge	172:65be27845400	1119	/**
AnnaBridge	172:65be27845400	1120	* @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits).
AnnaBridge	172:65be27845400	1121	* @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor
AnnaBridge	172:65be27845400	1122	* @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor
AnnaBridge	172:65be27845400	1123	* @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor
AnnaBridge	172:65be27845400	1124	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1125	* @param Red Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1126	* @param Green Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1127	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1128	* @retval None
AnnaBridge	172:65be27845400	1129	*/
AnnaBridge	172:65be27845400	1130	__STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
AnnaBridge	172:65be27845400	1131	{
AnnaBridge	172:65be27845400	1132	MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED \| DMA2D_FGCOLR_GREEN \| DMA2D_FGCOLR_BLUE), \
AnnaBridge	172:65be27845400	1133	((Red << DMA2D_FGCOLR_RED_Pos) \| (Green << DMA2D_FGCOLR_GREEN_Pos) \| Blue));
AnnaBridge	172:65be27845400	1134	}
AnnaBridge	172:65be27845400	1135
AnnaBridge	172:65be27845400	1136	/**
AnnaBridge	172:65be27845400	1137	* @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1138	* @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor
AnnaBridge	172:65be27845400	1139	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1140	* @param Red Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1141	* @retval None
AnnaBridge	172:65be27845400	1142	*/
AnnaBridge	172:65be27845400	1143	__STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
AnnaBridge	172:65be27845400	1144	{
AnnaBridge	172:65be27845400	1145	MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos));
AnnaBridge	172:65be27845400	1146	}
AnnaBridge	172:65be27845400	1147
AnnaBridge	172:65be27845400	1148	/**
AnnaBridge	172:65be27845400	1149	* @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1150	* @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor
AnnaBridge	172:65be27845400	1151	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1152	* @retval Red color value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1153	*/
AnnaBridge	172:65be27845400	1154	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1155	{
AnnaBridge	172:65be27845400	1156	return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos);
AnnaBridge	172:65be27845400	1157	}
AnnaBridge	172:65be27845400	1158
AnnaBridge	172:65be27845400	1159	/**
AnnaBridge	172:65be27845400	1160	* @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1161	* @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor
AnnaBridge	172:65be27845400	1162	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1163	* @param Green Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1164	* @retval None
AnnaBridge	172:65be27845400	1165	*/
AnnaBridge	172:65be27845400	1166	__STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
AnnaBridge	172:65be27845400	1167	{
AnnaBridge	172:65be27845400	1168	MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos));
AnnaBridge	172:65be27845400	1169	}
AnnaBridge	172:65be27845400	1170
AnnaBridge	172:65be27845400	1171	/**
AnnaBridge	172:65be27845400	1172	* @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1173	* @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor
AnnaBridge	172:65be27845400	1174	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1175	* @retval Green color value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1176	*/
AnnaBridge	172:65be27845400	1177	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1178	{
AnnaBridge	172:65be27845400	1179	return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos);
AnnaBridge	172:65be27845400	1180	}
AnnaBridge	172:65be27845400	1181
AnnaBridge	172:65be27845400	1182	/**
AnnaBridge	172:65be27845400	1183	* @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1184	* @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor
AnnaBridge	172:65be27845400	1185	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1186	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1187	* @retval None
AnnaBridge	172:65be27845400	1188	*/
AnnaBridge	172:65be27845400	1189	__STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
AnnaBridge	172:65be27845400	1190	{
AnnaBridge	172:65be27845400	1191	MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue);
AnnaBridge	172:65be27845400	1192	}
AnnaBridge	172:65be27845400	1193
AnnaBridge	172:65be27845400	1194	/**
AnnaBridge	172:65be27845400	1195	* @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1196	* @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor
AnnaBridge	172:65be27845400	1197	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1198	* @retval Blue color value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1199	*/
AnnaBridge	172:65be27845400	1200	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1201	{
AnnaBridge	172:65be27845400	1202	return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE));
AnnaBridge	172:65be27845400	1203	}
AnnaBridge	172:65be27845400	1204
AnnaBridge	172:65be27845400	1205	/**
AnnaBridge	172:65be27845400	1206	* @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	1207	* @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr
AnnaBridge	172:65be27845400	1208	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1209	* @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	1210	* @retval None
AnnaBridge	172:65be27845400	1211	*/
AnnaBridge	172:65be27845400	1212	__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
AnnaBridge	172:65be27845400	1213	{
AnnaBridge	172:65be27845400	1214	LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress);
AnnaBridge	172:65be27845400	1215	}
AnnaBridge	172:65be27845400	1216
AnnaBridge	172:65be27845400	1217	/**
AnnaBridge	172:65be27845400	1218	* @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	1219	* @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr
AnnaBridge	172:65be27845400	1220	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1221	* @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	1222	*/
AnnaBridge	172:65be27845400	1223	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1224	{
AnnaBridge	172:65be27845400	1225	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR));
AnnaBridge	172:65be27845400	1226	}
AnnaBridge	172:65be27845400	1227
AnnaBridge	172:65be27845400	1228	/**
AnnaBridge	172:65be27845400	1229	* @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1230	* @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize
AnnaBridge	172:65be27845400	1231	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1232	* @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1233	* @retval None
AnnaBridge	172:65be27845400	1234	*/
AnnaBridge	172:65be27845400	1235	__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
AnnaBridge	172:65be27845400	1236	{
AnnaBridge	172:65be27845400	1237	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos));
AnnaBridge	172:65be27845400	1238	}
AnnaBridge	172:65be27845400	1239
AnnaBridge	172:65be27845400	1240	/**
AnnaBridge	172:65be27845400	1241	* @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1242	* @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize
AnnaBridge	172:65be27845400	1243	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1244	* @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1245	*/
AnnaBridge	172:65be27845400	1246	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1247	{
AnnaBridge	172:65be27845400	1248	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos);
AnnaBridge	172:65be27845400	1249	}
AnnaBridge	172:65be27845400	1250
AnnaBridge	172:65be27845400	1251	/**
AnnaBridge	172:65be27845400	1252	* @brief Set DMA2D foreground CLUT color mode.
AnnaBridge	172:65be27845400	1253	* @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode
AnnaBridge	172:65be27845400	1254	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1255	* @param CLUTColorMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1256	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
AnnaBridge	172:65be27845400	1257	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
AnnaBridge	172:65be27845400	1258	* @retval None
AnnaBridge	172:65be27845400	1259	*/
AnnaBridge	172:65be27845400	1260	__STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
AnnaBridge	172:65be27845400	1261	{
AnnaBridge	172:65be27845400	1262	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode);
AnnaBridge	172:65be27845400	1263	}
AnnaBridge	172:65be27845400	1264
AnnaBridge	172:65be27845400	1265	/**
AnnaBridge	172:65be27845400	1266	* @brief Return DMA2D foreground CLUT color mode.
AnnaBridge	172:65be27845400	1267	* @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode
AnnaBridge	172:65be27845400	1268	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1269	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1270	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
AnnaBridge	172:65be27845400	1271	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
AnnaBridge	172:65be27845400	1272	*/
AnnaBridge	172:65be27845400	1273	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1274	{
AnnaBridge	172:65be27845400	1275	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM));
AnnaBridge	172:65be27845400	1276	}
AnnaBridge	172:65be27845400	1277
AnnaBridge	172:65be27845400	1278	/**
AnnaBridge	172:65be27845400	1279	* @brief Set DMA2D foreground Chroma Sub Sampling (for YCbCr input color mode).
AnnaBridge	172:65be27845400	1280	* @rmtoll FGPFCCR CSS LL_DMA2D_FGND_SetChrSubSampling
AnnaBridge	172:65be27845400	1281	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1282	* @param ChromaSubSampling This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1283	* @arg @ref LL_DMA2D_CSS_444
AnnaBridge	172:65be27845400	1284	* @arg @ref LL_DMA2D_CSS_422
AnnaBridge	172:65be27845400	1285	* @arg @ref LL_DMA2D_CSS_420
AnnaBridge	172:65be27845400	1286	* @retval None
AnnaBridge	172:65be27845400	1287	*/
AnnaBridge	172:65be27845400	1288	__STATIC_INLINE void LL_DMA2D_FGND_SetChrSubSampling(DMA2D_TypeDef *DMA2Dx, uint32_t ChromaSubSampling)
AnnaBridge	172:65be27845400	1289	{
AnnaBridge	172:65be27845400	1290	MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CSS, ChromaSubSampling);
AnnaBridge	172:65be27845400	1291	}
AnnaBridge	172:65be27845400	1292
AnnaBridge	172:65be27845400	1293	/**
AnnaBridge	172:65be27845400	1294	* @brief Return DMA2D foreground Chroma Sub Sampling (for YCbCr input color mode).
AnnaBridge	172:65be27845400	1295	* @rmtoll FGPFCCR CSS LL_DMA2D_FGND_GetChrSubSampling
AnnaBridge	172:65be27845400	1296	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1297	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1298	* @arg @ref LL_DMA2D_CSS_444
AnnaBridge	172:65be27845400	1299	* @arg @ref LL_DMA2D_CSS_422
AnnaBridge	172:65be27845400	1300	* @arg @ref LL_DMA2D_CSS_420
AnnaBridge	172:65be27845400	1301	*/
AnnaBridge	172:65be27845400	1302	__STATIC_INLINE uint32_t LL_DMA2D_FGND_GetChrSubSampling(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1303	{
AnnaBridge	172:65be27845400	1304	return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CSS));
AnnaBridge	172:65be27845400	1305	}
AnnaBridge	172:65be27845400	1306	/**
AnnaBridge	172:65be27845400	1307	* @}
AnnaBridge	172:65be27845400	1308	*/
AnnaBridge	172:65be27845400	1309
AnnaBridge	172:65be27845400	1310	/** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions
AnnaBridge	172:65be27845400	1311	* @{
AnnaBridge	172:65be27845400	1312	*/
AnnaBridge	172:65be27845400	1313
AnnaBridge	172:65be27845400	1314	/**
AnnaBridge	172:65be27845400	1315	* @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	1316	* @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr
AnnaBridge	172:65be27845400	1317	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1318	* @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	1319	* @retval None
AnnaBridge	172:65be27845400	1320	*/
AnnaBridge	172:65be27845400	1321	__STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress)
AnnaBridge	172:65be27845400	1322	{
AnnaBridge	172:65be27845400	1323	LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress);
AnnaBridge	172:65be27845400	1324	}
AnnaBridge	172:65be27845400	1325
AnnaBridge	172:65be27845400	1326	/**
AnnaBridge	172:65be27845400	1327	* @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	1328	* @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr
AnnaBridge	172:65be27845400	1329	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1330	* @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	1331	*/
AnnaBridge	172:65be27845400	1332	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1333	{
AnnaBridge	172:65be27845400	1334	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR));
AnnaBridge	172:65be27845400	1335	}
AnnaBridge	172:65be27845400	1336
AnnaBridge	172:65be27845400	1337	/**
AnnaBridge	172:65be27845400	1338	* @brief Enable DMA2D background CLUT loading.
AnnaBridge	172:65be27845400	1339	* @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad
AnnaBridge	172:65be27845400	1340	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1341	* @retval None
AnnaBridge	172:65be27845400	1342	*/
AnnaBridge	172:65be27845400	1343	__STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1344	{
AnnaBridge	172:65be27845400	1345	SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START);
AnnaBridge	172:65be27845400	1346	}
AnnaBridge	172:65be27845400	1347
AnnaBridge	172:65be27845400	1348	/**
AnnaBridge	172:65be27845400	1349	* @brief Indicate if DMA2D background CLUT loading is enabled.
AnnaBridge	172:65be27845400	1350	* @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad
AnnaBridge	172:65be27845400	1351	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1352	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1353	*/
AnnaBridge	172:65be27845400	1354	__STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1355	{
AnnaBridge	172:65be27845400	1356	return ((READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1357	}
AnnaBridge	172:65be27845400	1358
AnnaBridge	172:65be27845400	1359	/**
AnnaBridge	172:65be27845400	1360	* @brief Set DMA2D background color mode.
AnnaBridge	172:65be27845400	1361	* @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode
AnnaBridge	172:65be27845400	1362	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1363	* @param ColorMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1364	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
AnnaBridge	172:65be27845400	1365	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
AnnaBridge	172:65be27845400	1366	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
AnnaBridge	172:65be27845400	1367	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
AnnaBridge	172:65be27845400	1368	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
AnnaBridge	172:65be27845400	1369	* @arg @ref LL_DMA2D_INPUT_MODE_L8
AnnaBridge	172:65be27845400	1370	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
AnnaBridge	172:65be27845400	1371	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
AnnaBridge	172:65be27845400	1372	* @arg @ref LL_DMA2D_INPUT_MODE_L4
AnnaBridge	172:65be27845400	1373	* @arg @ref LL_DMA2D_INPUT_MODE_A8
AnnaBridge	172:65be27845400	1374	* @arg @ref LL_DMA2D_INPUT_MODE_A4
AnnaBridge	172:65be27845400	1375	* @retval None
AnnaBridge	172:65be27845400	1376	*/
AnnaBridge	172:65be27845400	1377	__STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode)
AnnaBridge	172:65be27845400	1378	{
AnnaBridge	172:65be27845400	1379	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode);
AnnaBridge	172:65be27845400	1380	}
AnnaBridge	172:65be27845400	1381
AnnaBridge	172:65be27845400	1382	/**
AnnaBridge	172:65be27845400	1383	* @brief Return DMA2D background color mode.
AnnaBridge	172:65be27845400	1384	* @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode
AnnaBridge	172:65be27845400	1385	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1386	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1387	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888
AnnaBridge	172:65be27845400	1388	* @arg @ref LL_DMA2D_INPUT_MODE_RGB888
AnnaBridge	172:65be27845400	1389	* @arg @ref LL_DMA2D_INPUT_MODE_RGB565
AnnaBridge	172:65be27845400	1390	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555
AnnaBridge	172:65be27845400	1391	* @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444
AnnaBridge	172:65be27845400	1392	* @arg @ref LL_DMA2D_INPUT_MODE_L8
AnnaBridge	172:65be27845400	1393	* @arg @ref LL_DMA2D_INPUT_MODE_AL44
AnnaBridge	172:65be27845400	1394	* @arg @ref LL_DMA2D_INPUT_MODE_AL88
AnnaBridge	172:65be27845400	1395	* @arg @ref LL_DMA2D_INPUT_MODE_L4
AnnaBridge	172:65be27845400	1396	* @arg @ref LL_DMA2D_INPUT_MODE_A8
AnnaBridge	172:65be27845400	1397	* @arg @ref LL_DMA2D_INPUT_MODE_A4
AnnaBridge	172:65be27845400	1398	*/
AnnaBridge	172:65be27845400	1399	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1400	{
AnnaBridge	172:65be27845400	1401	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM));
AnnaBridge	172:65be27845400	1402	}
AnnaBridge	172:65be27845400	1403
AnnaBridge	172:65be27845400	1404	/**
AnnaBridge	172:65be27845400	1405	* @brief Set DMA2D background alpha mode.
AnnaBridge	172:65be27845400	1406	* @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode
AnnaBridge	172:65be27845400	1407	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1408	* @param AphaMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1409	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
AnnaBridge	172:65be27845400	1410	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
AnnaBridge	172:65be27845400	1411	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
AnnaBridge	172:65be27845400	1412	* @retval None
AnnaBridge	172:65be27845400	1413	*/
AnnaBridge	172:65be27845400	1414	__STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode)
AnnaBridge	172:65be27845400	1415	{
AnnaBridge	172:65be27845400	1416	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode);
AnnaBridge	172:65be27845400	1417	}
AnnaBridge	172:65be27845400	1418
AnnaBridge	172:65be27845400	1419	/**
AnnaBridge	172:65be27845400	1420	* @brief Return DMA2D background alpha mode.
AnnaBridge	172:65be27845400	1421	* @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode
AnnaBridge	172:65be27845400	1422	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1423	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1424	* @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF
AnnaBridge	172:65be27845400	1425	* @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE
AnnaBridge	172:65be27845400	1426	* @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE
AnnaBridge	172:65be27845400	1427	*/
AnnaBridge	172:65be27845400	1428	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1429	{
AnnaBridge	172:65be27845400	1430	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM));
AnnaBridge	172:65be27845400	1431	}
AnnaBridge	172:65be27845400	1432
AnnaBridge	172:65be27845400	1433	/**
AnnaBridge	172:65be27845400	1434	* @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1435	* @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha
AnnaBridge	172:65be27845400	1436	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1437	* @param Alpha Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1438	* @retval None
AnnaBridge	172:65be27845400	1439	*/
AnnaBridge	172:65be27845400	1440	__STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha)
AnnaBridge	172:65be27845400	1441	{
AnnaBridge	172:65be27845400	1442	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos));
AnnaBridge	172:65be27845400	1443	}
AnnaBridge	172:65be27845400	1444
AnnaBridge	172:65be27845400	1445	/**
AnnaBridge	172:65be27845400	1446	* @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1447	* @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha
AnnaBridge	172:65be27845400	1448	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1449	* @retval Alpha value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1450	*/
AnnaBridge	172:65be27845400	1451	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1452	{
AnnaBridge	172:65be27845400	1453	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos);
AnnaBridge	172:65be27845400	1454	}
AnnaBridge	172:65be27845400	1455
AnnaBridge	172:65be27845400	1456	/**
AnnaBridge	172:65be27845400	1457	* @brief Set DMA2D background Red Blue swap mode.
AnnaBridge	172:65be27845400	1458	* @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode
AnnaBridge	172:65be27845400	1459	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1460	* @param RBSwapMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1461	* @arg @ref LL_DMA2D_RB_MODE_REGULAR
AnnaBridge	172:65be27845400	1462	* @arg @ref LL_DMA2D_RB_MODE_SWAP
AnnaBridge	172:65be27845400	1463	* @retval None
AnnaBridge	172:65be27845400	1464	*/
AnnaBridge	172:65be27845400	1465	__STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode)
AnnaBridge	172:65be27845400	1466	{
AnnaBridge	172:65be27845400	1467	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode);
AnnaBridge	172:65be27845400	1468	}
AnnaBridge	172:65be27845400	1469
AnnaBridge	172:65be27845400	1470	/**
AnnaBridge	172:65be27845400	1471	* @brief Return DMA2D background Red Blue swap mode.
AnnaBridge	172:65be27845400	1472	* @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode
AnnaBridge	172:65be27845400	1473	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1474	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1475	* @arg @ref LL_DMA2D_RB_MODE_REGULAR
AnnaBridge	172:65be27845400	1476	* @arg @ref LL_DMA2D_RB_MODE_SWAP
AnnaBridge	172:65be27845400	1477	*/
AnnaBridge	172:65be27845400	1478	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1479	{
AnnaBridge	172:65be27845400	1480	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS));
AnnaBridge	172:65be27845400	1481	}
AnnaBridge	172:65be27845400	1482
AnnaBridge	172:65be27845400	1483	/**
AnnaBridge	172:65be27845400	1484	* @brief Set DMA2D background alpha inversion mode.
AnnaBridge	172:65be27845400	1485	* @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode
AnnaBridge	172:65be27845400	1486	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1487	* @param AlphaInversionMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1488	* @arg @ref LL_DMA2D_ALPHA_REGULAR
AnnaBridge	172:65be27845400	1489	* @arg @ref LL_DMA2D_ALPHA_INVERTED
AnnaBridge	172:65be27845400	1490	* @retval None
AnnaBridge	172:65be27845400	1491	*/
AnnaBridge	172:65be27845400	1492	__STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode)
AnnaBridge	172:65be27845400	1493	{
AnnaBridge	172:65be27845400	1494	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode);
AnnaBridge	172:65be27845400	1495	}
AnnaBridge	172:65be27845400	1496
AnnaBridge	172:65be27845400	1497	/**
AnnaBridge	172:65be27845400	1498	* @brief Return DMA2D background alpha inversion mode.
AnnaBridge	172:65be27845400	1499	* @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode
AnnaBridge	172:65be27845400	1500	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1501	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1502	* @arg @ref LL_DMA2D_ALPHA_REGULAR
AnnaBridge	172:65be27845400	1503	* @arg @ref LL_DMA2D_ALPHA_INVERTED
AnnaBridge	172:65be27845400	1504	*/
AnnaBridge	172:65be27845400	1505	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1506	{
AnnaBridge	172:65be27845400	1507	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI));
AnnaBridge	172:65be27845400	1508	}
AnnaBridge	172:65be27845400	1509
AnnaBridge	172:65be27845400	1510	/**
AnnaBridge	172:65be27845400	1511	* @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	1512	* @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset
AnnaBridge	172:65be27845400	1513	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1514	* @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF
AnnaBridge	172:65be27845400	1515	* @retval None
AnnaBridge	172:65be27845400	1516	*/
AnnaBridge	172:65be27845400	1517	__STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset)
AnnaBridge	172:65be27845400	1518	{
AnnaBridge	172:65be27845400	1519	MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset);
AnnaBridge	172:65be27845400	1520	}
AnnaBridge	172:65be27845400	1521
AnnaBridge	172:65be27845400	1522	/**
AnnaBridge	172:65be27845400	1523	* @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits).
AnnaBridge	172:65be27845400	1524	* @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset
AnnaBridge	172:65be27845400	1525	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1526	* @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF
AnnaBridge	172:65be27845400	1527	*/
AnnaBridge	172:65be27845400	1528	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1529	{
AnnaBridge	172:65be27845400	1530	return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO));
AnnaBridge	172:65be27845400	1531	}
AnnaBridge	172:65be27845400	1532
AnnaBridge	172:65be27845400	1533	/**
AnnaBridge	172:65be27845400	1534	* @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits).
AnnaBridge	172:65be27845400	1535	* @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor
AnnaBridge	172:65be27845400	1536	* @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor
AnnaBridge	172:65be27845400	1537	* @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor
AnnaBridge	172:65be27845400	1538	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1539	* @param Red Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1540	* @param Green Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1541	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1542	* @retval None
AnnaBridge	172:65be27845400	1543	*/
AnnaBridge	172:65be27845400	1544	__STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue)
AnnaBridge	172:65be27845400	1545	{
AnnaBridge	172:65be27845400	1546	MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED \| DMA2D_BGCOLR_GREEN \| DMA2D_BGCOLR_BLUE), \
AnnaBridge	172:65be27845400	1547	((Red << DMA2D_BGCOLR_RED_Pos) \| (Green << DMA2D_BGCOLR_GREEN_Pos) \| Blue));
AnnaBridge	172:65be27845400	1548	}
AnnaBridge	172:65be27845400	1549
AnnaBridge	172:65be27845400	1550	/**
AnnaBridge	172:65be27845400	1551	* @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1552	* @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor
AnnaBridge	172:65be27845400	1553	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1554	* @param Red Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1555	* @retval None
AnnaBridge	172:65be27845400	1556	*/
AnnaBridge	172:65be27845400	1557	__STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red)
AnnaBridge	172:65be27845400	1558	{
AnnaBridge	172:65be27845400	1559	MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos));
AnnaBridge	172:65be27845400	1560	}
AnnaBridge	172:65be27845400	1561
AnnaBridge	172:65be27845400	1562	/**
AnnaBridge	172:65be27845400	1563	* @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1564	* @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor
AnnaBridge	172:65be27845400	1565	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1566	* @retval Red color value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1567	*/
AnnaBridge	172:65be27845400	1568	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1569	{
AnnaBridge	172:65be27845400	1570	return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos);
AnnaBridge	172:65be27845400	1571	}
AnnaBridge	172:65be27845400	1572
AnnaBridge	172:65be27845400	1573	/**
AnnaBridge	172:65be27845400	1574	* @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1575	* @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor
AnnaBridge	172:65be27845400	1576	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1577	* @param Green Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1578	* @retval None
AnnaBridge	172:65be27845400	1579	*/
AnnaBridge	172:65be27845400	1580	__STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green)
AnnaBridge	172:65be27845400	1581	{
AnnaBridge	172:65be27845400	1582	MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos));
AnnaBridge	172:65be27845400	1583	}
AnnaBridge	172:65be27845400	1584
AnnaBridge	172:65be27845400	1585	/**
AnnaBridge	172:65be27845400	1586	* @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1587	* @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor
AnnaBridge	172:65be27845400	1588	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1589	* @retval Green color value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1590	*/
AnnaBridge	172:65be27845400	1591	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1592	{
AnnaBridge	172:65be27845400	1593	return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos);
AnnaBridge	172:65be27845400	1594	}
AnnaBridge	172:65be27845400	1595
AnnaBridge	172:65be27845400	1596	/**
AnnaBridge	172:65be27845400	1597	* @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1598	* @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor
AnnaBridge	172:65be27845400	1599	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1600	* @param Blue Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1601	* @retval None
AnnaBridge	172:65be27845400	1602	*/
AnnaBridge	172:65be27845400	1603	__STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue)
AnnaBridge	172:65be27845400	1604	{
AnnaBridge	172:65be27845400	1605	MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue);
AnnaBridge	172:65be27845400	1606	}
AnnaBridge	172:65be27845400	1607
AnnaBridge	172:65be27845400	1608	/**
AnnaBridge	172:65be27845400	1609	* @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1610	* @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor
AnnaBridge	172:65be27845400	1611	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1612	* @retval Blue color value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1613	*/
AnnaBridge	172:65be27845400	1614	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1615	{
AnnaBridge	172:65be27845400	1616	return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE));
AnnaBridge	172:65be27845400	1617	}
AnnaBridge	172:65be27845400	1618
AnnaBridge	172:65be27845400	1619	/**
AnnaBridge	172:65be27845400	1620	* @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	1621	* @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr
AnnaBridge	172:65be27845400	1622	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1623	* @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	1624	* @retval None
AnnaBridge	172:65be27845400	1625	*/
AnnaBridge	172:65be27845400	1626	__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress)
AnnaBridge	172:65be27845400	1627	{
AnnaBridge	172:65be27845400	1628	LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress);
AnnaBridge	172:65be27845400	1629	}
AnnaBridge	172:65be27845400	1630
AnnaBridge	172:65be27845400	1631	/**
AnnaBridge	172:65be27845400	1632	* @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits).
AnnaBridge	172:65be27845400	1633	* @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr
AnnaBridge	172:65be27845400	1634	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1635	* @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	172:65be27845400	1636	*/
AnnaBridge	172:65be27845400	1637	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1638	{
AnnaBridge	172:65be27845400	1639	return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR));
AnnaBridge	172:65be27845400	1640	}
AnnaBridge	172:65be27845400	1641
AnnaBridge	172:65be27845400	1642	/**
AnnaBridge	172:65be27845400	1643	* @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1644	* @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize
AnnaBridge	172:65be27845400	1645	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1646	* @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1647	* @retval None
AnnaBridge	172:65be27845400	1648	*/
AnnaBridge	172:65be27845400	1649	__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize)
AnnaBridge	172:65be27845400	1650	{
AnnaBridge	172:65be27845400	1651	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos));
AnnaBridge	172:65be27845400	1652	}
AnnaBridge	172:65be27845400	1653
AnnaBridge	172:65be27845400	1654	/**
AnnaBridge	172:65be27845400	1655	* @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits).
AnnaBridge	172:65be27845400	1656	* @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize
AnnaBridge	172:65be27845400	1657	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1658	* @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF
AnnaBridge	172:65be27845400	1659	*/
AnnaBridge	172:65be27845400	1660	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1661	{
AnnaBridge	172:65be27845400	1662	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos);
AnnaBridge	172:65be27845400	1663	}
AnnaBridge	172:65be27845400	1664
AnnaBridge	172:65be27845400	1665	/**
AnnaBridge	172:65be27845400	1666	* @brief Set DMA2D background CLUT color mode.
AnnaBridge	172:65be27845400	1667	* @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode
AnnaBridge	172:65be27845400	1668	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1669	* @param CLUTColorMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	1670	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
AnnaBridge	172:65be27845400	1671	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
AnnaBridge	172:65be27845400	1672	* @retval None
AnnaBridge	172:65be27845400	1673	*/
AnnaBridge	172:65be27845400	1674	__STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode)
AnnaBridge	172:65be27845400	1675	{
AnnaBridge	172:65be27845400	1676	MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode);
AnnaBridge	172:65be27845400	1677	}
AnnaBridge	172:65be27845400	1678
AnnaBridge	172:65be27845400	1679	/**
AnnaBridge	172:65be27845400	1680	* @brief Return DMA2D background CLUT color mode.
AnnaBridge	172:65be27845400	1681	* @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode
AnnaBridge	172:65be27845400	1682	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1683	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	1684	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888
AnnaBridge	172:65be27845400	1685	* @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888
AnnaBridge	172:65be27845400	1686	*/
AnnaBridge	172:65be27845400	1687	__STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1688	{
AnnaBridge	172:65be27845400	1689	return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM));
AnnaBridge	172:65be27845400	1690	}
AnnaBridge	172:65be27845400	1691
AnnaBridge	172:65be27845400	1692	/**
AnnaBridge	172:65be27845400	1693	* @}
AnnaBridge	172:65be27845400	1694	*/
AnnaBridge	172:65be27845400	1695
AnnaBridge	172:65be27845400	1696	/**
AnnaBridge	172:65be27845400	1697	* @}
AnnaBridge	172:65be27845400	1698	*/
AnnaBridge	172:65be27845400	1699
AnnaBridge	172:65be27845400	1700
AnnaBridge	172:65be27845400	1701	/** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management
AnnaBridge	172:65be27845400	1702	* @{
AnnaBridge	172:65be27845400	1703	*/
AnnaBridge	172:65be27845400	1704
AnnaBridge	172:65be27845400	1705	/**
AnnaBridge	172:65be27845400	1706	* @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not
AnnaBridge	172:65be27845400	1707	* @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE
AnnaBridge	172:65be27845400	1708	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1709	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1710	*/
AnnaBridge	172:65be27845400	1711	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1712	{
AnnaBridge	172:65be27845400	1713	return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1714	}
AnnaBridge	172:65be27845400	1715
AnnaBridge	172:65be27845400	1716	/**
AnnaBridge	172:65be27845400	1717	* @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not
AnnaBridge	172:65be27845400	1718	* @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC
AnnaBridge	172:65be27845400	1719	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1720	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1721	*/
AnnaBridge	172:65be27845400	1722	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1723	{
AnnaBridge	172:65be27845400	1724	return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1725	}
AnnaBridge	172:65be27845400	1726
AnnaBridge	172:65be27845400	1727	/**
AnnaBridge	172:65be27845400	1728	* @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not
AnnaBridge	172:65be27845400	1729	* @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE
AnnaBridge	172:65be27845400	1730	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1731	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1732	*/
AnnaBridge	172:65be27845400	1733	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1734	{
AnnaBridge	172:65be27845400	1735	return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1736	}
AnnaBridge	172:65be27845400	1737
AnnaBridge	172:65be27845400	1738	/**
AnnaBridge	172:65be27845400	1739	* @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not
AnnaBridge	172:65be27845400	1740	* @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW
AnnaBridge	172:65be27845400	1741	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1742	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1743	*/
AnnaBridge	172:65be27845400	1744	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1745	{
AnnaBridge	172:65be27845400	1746	return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1747	}
AnnaBridge	172:65be27845400	1748
AnnaBridge	172:65be27845400	1749	/**
AnnaBridge	172:65be27845400	1750	* @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not
AnnaBridge	172:65be27845400	1751	* @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC
AnnaBridge	172:65be27845400	1752	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1753	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1754	*/
AnnaBridge	172:65be27845400	1755	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1756	{
AnnaBridge	172:65be27845400	1757	return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1758	}
AnnaBridge	172:65be27845400	1759
AnnaBridge	172:65be27845400	1760	/**
AnnaBridge	172:65be27845400	1761	* @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not
AnnaBridge	172:65be27845400	1762	* @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE
AnnaBridge	172:65be27845400	1763	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1764	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1765	*/
AnnaBridge	172:65be27845400	1766	__STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1767	{
AnnaBridge	172:65be27845400	1768	return ((READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1769	}
AnnaBridge	172:65be27845400	1770
AnnaBridge	172:65be27845400	1771	/**
AnnaBridge	172:65be27845400	1772	* @brief Clear DMA2D Configuration Error Interrupt Flag
AnnaBridge	172:65be27845400	1773	* @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE
AnnaBridge	172:65be27845400	1774	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1775	* @retval None
AnnaBridge	172:65be27845400	1776	*/
AnnaBridge	172:65be27845400	1777	__STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1778	{
AnnaBridge	172:65be27845400	1779	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF);
AnnaBridge	172:65be27845400	1780	}
AnnaBridge	172:65be27845400	1781
AnnaBridge	172:65be27845400	1782	/**
AnnaBridge	172:65be27845400	1783	* @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag
AnnaBridge	172:65be27845400	1784	* @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC
AnnaBridge	172:65be27845400	1785	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1786	* @retval None
AnnaBridge	172:65be27845400	1787	*/
AnnaBridge	172:65be27845400	1788	__STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1789	{
AnnaBridge	172:65be27845400	1790	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF);
AnnaBridge	172:65be27845400	1791	}
AnnaBridge	172:65be27845400	1792
AnnaBridge	172:65be27845400	1793	/**
AnnaBridge	172:65be27845400	1794	* @brief Clear DMA2D CLUT Access Error Interrupt Flag
AnnaBridge	172:65be27845400	1795	* @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE
AnnaBridge	172:65be27845400	1796	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1797	* @retval None
AnnaBridge	172:65be27845400	1798	*/
AnnaBridge	172:65be27845400	1799	__STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1800	{
AnnaBridge	172:65be27845400	1801	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF);
AnnaBridge	172:65be27845400	1802	}
AnnaBridge	172:65be27845400	1803
AnnaBridge	172:65be27845400	1804	/**
AnnaBridge	172:65be27845400	1805	* @brief Clear DMA2D Transfer Watermark Interrupt Flag
AnnaBridge	172:65be27845400	1806	* @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW
AnnaBridge	172:65be27845400	1807	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1808	* @retval None
AnnaBridge	172:65be27845400	1809	*/
AnnaBridge	172:65be27845400	1810	__STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1811	{
AnnaBridge	172:65be27845400	1812	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF);
AnnaBridge	172:65be27845400	1813	}
AnnaBridge	172:65be27845400	1814
AnnaBridge	172:65be27845400	1815	/**
AnnaBridge	172:65be27845400	1816	* @brief Clear DMA2D Transfer Complete Interrupt Flag
AnnaBridge	172:65be27845400	1817	* @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC
AnnaBridge	172:65be27845400	1818	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1819	* @retval None
AnnaBridge	172:65be27845400	1820	*/
AnnaBridge	172:65be27845400	1821	__STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1822	{
AnnaBridge	172:65be27845400	1823	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF);
AnnaBridge	172:65be27845400	1824	}
AnnaBridge	172:65be27845400	1825
AnnaBridge	172:65be27845400	1826	/**
AnnaBridge	172:65be27845400	1827	* @brief Clear DMA2D Transfer Error Interrupt Flag
AnnaBridge	172:65be27845400	1828	* @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE
AnnaBridge	172:65be27845400	1829	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1830	* @retval None
AnnaBridge	172:65be27845400	1831	*/
AnnaBridge	172:65be27845400	1832	__STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1833	{
AnnaBridge	172:65be27845400	1834	WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF);
AnnaBridge	172:65be27845400	1835	}
AnnaBridge	172:65be27845400	1836
AnnaBridge	172:65be27845400	1837	/**
AnnaBridge	172:65be27845400	1838	* @}
AnnaBridge	172:65be27845400	1839	*/
AnnaBridge	172:65be27845400	1840
AnnaBridge	172:65be27845400	1841	/** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management
AnnaBridge	172:65be27845400	1842	* @{
AnnaBridge	172:65be27845400	1843	*/
AnnaBridge	172:65be27845400	1844
AnnaBridge	172:65be27845400	1845	/**
AnnaBridge	172:65be27845400	1846	* @brief Enable Configuration Error Interrupt
AnnaBridge	172:65be27845400	1847	* @rmtoll CR CEIE LL_DMA2D_EnableIT_CE
AnnaBridge	172:65be27845400	1848	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1849	* @retval None
AnnaBridge	172:65be27845400	1850	*/
AnnaBridge	172:65be27845400	1851	__STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1852	{
AnnaBridge	172:65be27845400	1853	SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
AnnaBridge	172:65be27845400	1854	}
AnnaBridge	172:65be27845400	1855
AnnaBridge	172:65be27845400	1856	/**
AnnaBridge	172:65be27845400	1857	* @brief Enable CLUT Transfer Complete Interrupt
AnnaBridge	172:65be27845400	1858	* @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC
AnnaBridge	172:65be27845400	1859	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1860	* @retval None
AnnaBridge	172:65be27845400	1861	*/
AnnaBridge	172:65be27845400	1862	__STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1863	{
AnnaBridge	172:65be27845400	1864	SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
AnnaBridge	172:65be27845400	1865	}
AnnaBridge	172:65be27845400	1866
AnnaBridge	172:65be27845400	1867	/**
AnnaBridge	172:65be27845400	1868	* @brief Enable CLUT Access Error Interrupt
AnnaBridge	172:65be27845400	1869	* @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE
AnnaBridge	172:65be27845400	1870	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1871	* @retval None
AnnaBridge	172:65be27845400	1872	*/
AnnaBridge	172:65be27845400	1873	__STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1874	{
AnnaBridge	172:65be27845400	1875	SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
AnnaBridge	172:65be27845400	1876	}
AnnaBridge	172:65be27845400	1877
AnnaBridge	172:65be27845400	1878	/**
AnnaBridge	172:65be27845400	1879	* @brief Enable Transfer Watermark Interrupt
AnnaBridge	172:65be27845400	1880	* @rmtoll CR TWIE LL_DMA2D_EnableIT_TW
AnnaBridge	172:65be27845400	1881	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1882	* @retval None
AnnaBridge	172:65be27845400	1883	*/
AnnaBridge	172:65be27845400	1884	__STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1885	{
AnnaBridge	172:65be27845400	1886	SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
AnnaBridge	172:65be27845400	1887	}
AnnaBridge	172:65be27845400	1888
AnnaBridge	172:65be27845400	1889	/**
AnnaBridge	172:65be27845400	1890	* @brief Enable Transfer Complete Interrupt
AnnaBridge	172:65be27845400	1891	* @rmtoll CR TCIE LL_DMA2D_EnableIT_TC
AnnaBridge	172:65be27845400	1892	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1893	* @retval None
AnnaBridge	172:65be27845400	1894	*/
AnnaBridge	172:65be27845400	1895	__STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1896	{
AnnaBridge	172:65be27845400	1897	SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
AnnaBridge	172:65be27845400	1898	}
AnnaBridge	172:65be27845400	1899
AnnaBridge	172:65be27845400	1900	/**
AnnaBridge	172:65be27845400	1901	* @brief Enable Transfer Error Interrupt
AnnaBridge	172:65be27845400	1902	* @rmtoll CR TEIE LL_DMA2D_EnableIT_TE
AnnaBridge	172:65be27845400	1903	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1904	* @retval None
AnnaBridge	172:65be27845400	1905	*/
AnnaBridge	172:65be27845400	1906	__STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1907	{
AnnaBridge	172:65be27845400	1908	SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
AnnaBridge	172:65be27845400	1909	}
AnnaBridge	172:65be27845400	1910
AnnaBridge	172:65be27845400	1911	/**
AnnaBridge	172:65be27845400	1912	* @brief Disable Configuration Error Interrupt
AnnaBridge	172:65be27845400	1913	* @rmtoll CR CEIE LL_DMA2D_DisableIT_CE
AnnaBridge	172:65be27845400	1914	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1915	* @retval None
AnnaBridge	172:65be27845400	1916	*/
AnnaBridge	172:65be27845400	1917	__STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1918	{
AnnaBridge	172:65be27845400	1919	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE);
AnnaBridge	172:65be27845400	1920	}
AnnaBridge	172:65be27845400	1921
AnnaBridge	172:65be27845400	1922	/**
AnnaBridge	172:65be27845400	1923	* @brief Disable CLUT Transfer Complete Interrupt
AnnaBridge	172:65be27845400	1924	* @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC
AnnaBridge	172:65be27845400	1925	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1926	* @retval None
AnnaBridge	172:65be27845400	1927	*/
AnnaBridge	172:65be27845400	1928	__STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1929	{
AnnaBridge	172:65be27845400	1930	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE);
AnnaBridge	172:65be27845400	1931	}
AnnaBridge	172:65be27845400	1932
AnnaBridge	172:65be27845400	1933	/**
AnnaBridge	172:65be27845400	1934	* @brief Disable CLUT Access Error Interrupt
AnnaBridge	172:65be27845400	1935	* @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE
AnnaBridge	172:65be27845400	1936	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1937	* @retval None
AnnaBridge	172:65be27845400	1938	*/
AnnaBridge	172:65be27845400	1939	__STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1940	{
AnnaBridge	172:65be27845400	1941	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE);
AnnaBridge	172:65be27845400	1942	}
AnnaBridge	172:65be27845400	1943
AnnaBridge	172:65be27845400	1944	/**
AnnaBridge	172:65be27845400	1945	* @brief Disable Transfer Watermark Interrupt
AnnaBridge	172:65be27845400	1946	* @rmtoll CR TWIE LL_DMA2D_DisableIT_TW
AnnaBridge	172:65be27845400	1947	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1948	* @retval None
AnnaBridge	172:65be27845400	1949	*/
AnnaBridge	172:65be27845400	1950	__STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1951	{
AnnaBridge	172:65be27845400	1952	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE);
AnnaBridge	172:65be27845400	1953	}
AnnaBridge	172:65be27845400	1954
AnnaBridge	172:65be27845400	1955	/**
AnnaBridge	172:65be27845400	1956	* @brief Disable Transfer Complete Interrupt
AnnaBridge	172:65be27845400	1957	* @rmtoll CR TCIE LL_DMA2D_DisableIT_TC
AnnaBridge	172:65be27845400	1958	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1959	* @retval None
AnnaBridge	172:65be27845400	1960	*/
AnnaBridge	172:65be27845400	1961	__STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1962	{
AnnaBridge	172:65be27845400	1963	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE);
AnnaBridge	172:65be27845400	1964	}
AnnaBridge	172:65be27845400	1965
AnnaBridge	172:65be27845400	1966	/**
AnnaBridge	172:65be27845400	1967	* @brief Disable Transfer Error Interrupt
AnnaBridge	172:65be27845400	1968	* @rmtoll CR TEIE LL_DMA2D_DisableIT_TE
AnnaBridge	172:65be27845400	1969	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1970	* @retval None
AnnaBridge	172:65be27845400	1971	*/
AnnaBridge	172:65be27845400	1972	__STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1973	{
AnnaBridge	172:65be27845400	1974	CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE);
AnnaBridge	172:65be27845400	1975	}
AnnaBridge	172:65be27845400	1976
AnnaBridge	172:65be27845400	1977	/**
AnnaBridge	172:65be27845400	1978	* @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	1979	* @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE
AnnaBridge	172:65be27845400	1980	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1981	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1982	*/
AnnaBridge	172:65be27845400	1983	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1984	{
AnnaBridge	172:65be27845400	1985	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1986	}
AnnaBridge	172:65be27845400	1987
AnnaBridge	172:65be27845400	1988	/**
AnnaBridge	172:65be27845400	1989	* @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	1990	* @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC
AnnaBridge	172:65be27845400	1991	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	1992	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1993	*/
AnnaBridge	172:65be27845400	1994	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	1995	{
AnnaBridge	172:65be27845400	1996	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	1997	}
AnnaBridge	172:65be27845400	1998
AnnaBridge	172:65be27845400	1999	/**
AnnaBridge	172:65be27845400	2000	* @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	2001	* @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE
AnnaBridge	172:65be27845400	2002	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	2003	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2004	*/
AnnaBridge	172:65be27845400	2005	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	2006	{
AnnaBridge	172:65be27845400	2007	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2008	}
AnnaBridge	172:65be27845400	2009
AnnaBridge	172:65be27845400	2010	/**
AnnaBridge	172:65be27845400	2011	* @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	2012	* @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW
AnnaBridge	172:65be27845400	2013	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	2014	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2015	*/
AnnaBridge	172:65be27845400	2016	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	2017	{
AnnaBridge	172:65be27845400	2018	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2019	}
AnnaBridge	172:65be27845400	2020
AnnaBridge	172:65be27845400	2021	/**
AnnaBridge	172:65be27845400	2022	* @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	2023	* @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC
AnnaBridge	172:65be27845400	2024	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	2025	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2026	*/
AnnaBridge	172:65be27845400	2027	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	2028	{
AnnaBridge	172:65be27845400	2029	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2030	}
AnnaBridge	172:65be27845400	2031
AnnaBridge	172:65be27845400	2032	/**
AnnaBridge	172:65be27845400	2033	* @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled.
AnnaBridge	172:65be27845400	2034	* @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE
AnnaBridge	172:65be27845400	2035	* @param DMA2Dx DMA2D Instance
AnnaBridge	172:65be27845400	2036	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	2037	*/
AnnaBridge	172:65be27845400	2038	__STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx)
AnnaBridge	172:65be27845400	2039	{
AnnaBridge	172:65be27845400	2040	return ((READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)) ? 1UL : 0UL);
AnnaBridge	172:65be27845400	2041	}
AnnaBridge	172:65be27845400	2042
AnnaBridge	172:65be27845400	2043
AnnaBridge	172:65be27845400	2044
AnnaBridge	172:65be27845400	2045	/**
AnnaBridge	172:65be27845400	2046	* @}
AnnaBridge	172:65be27845400	2047	*/
AnnaBridge	172:65be27845400	2048
AnnaBridge	172:65be27845400	2049	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	2050	/** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions
AnnaBridge	172:65be27845400	2051	* @{
AnnaBridge	172:65be27845400	2052	*/
AnnaBridge	172:65be27845400	2053
AnnaBridge	172:65be27845400	2054	ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx);
AnnaBridge	172:65be27845400	2055	ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef DMA2Dx, LL_DMA2D_InitTypeDef DMA2D_InitStruct);
AnnaBridge	172:65be27845400	2056	void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct);
AnnaBridge	172:65be27845400	2057	void LL_DMA2D_ConfigLayer(DMA2D_TypeDef DMA2Dx, LL_DMA2D_LayerCfgTypeDef DMA2D_LayerCfg, uint32_t LayerIdx);
AnnaBridge	172:65be27845400	2058	void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg);
AnnaBridge	172:65be27845400	2059	void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef DMA2Dx, LL_DMA2D_ColorTypeDef DMA2D_ColorStruct);
AnnaBridge	172:65be27845400	2060	uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
AnnaBridge	172:65be27845400	2061	uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
AnnaBridge	172:65be27845400	2062	uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
AnnaBridge	172:65be27845400	2063	uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode);
AnnaBridge	172:65be27845400	2064	void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines);
AnnaBridge	172:65be27845400	2065
AnnaBridge	172:65be27845400	2066	/**
AnnaBridge	172:65be27845400	2067	* @}
AnnaBridge	172:65be27845400	2068	*/
AnnaBridge	172:65be27845400	2069	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	2070
AnnaBridge	172:65be27845400	2071	/**
AnnaBridge	172:65be27845400	2072	* @}
AnnaBridge	172:65be27845400	2073	*/
AnnaBridge	172:65be27845400	2074
AnnaBridge	172:65be27845400	2075	/**
AnnaBridge	172:65be27845400	2076	* @}
AnnaBridge	172:65be27845400	2077	*/
AnnaBridge	172:65be27845400	2078
AnnaBridge	172:65be27845400	2079	#endif /* defined (DMA2D) */
AnnaBridge	172:65be27845400	2080
AnnaBridge	172:65be27845400	2081	/**
AnnaBridge	172:65be27845400	2082	* @}
AnnaBridge	172:65be27845400	2083	*/
AnnaBridge	172:65be27845400	2084
AnnaBridge	172:65be27845400	2085	#ifdef __cplusplus
AnnaBridge	172:65be27845400	2086	}
AnnaBridge	172:65be27845400	2087	#endif
AnnaBridge	172:65be27845400	2088
AnnaBridge	172:65be27845400	2089	#endif /* STM32H7xx_LL_DMA2D_H */
AnnaBridge	172:65be27845400	2090
AnnaBridge	172:65be27845400	2091	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/