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TARGET_NUCLEO_H743ZI/TOOLCHAIN_GCC_ARM/stm32h7xx_hal_smbus.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 172:65be27845400 | 1 | /** |
| AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_smbus.h |
| AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
| AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of SMBUS HAL module. |
| AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 7 | * @attention |
| AnnaBridge | 172:65be27845400 | 8 | * |
| AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
| AnnaBridge | 172:65be27845400 | 11 | * |
| AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
| AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
| AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
| AnnaBridge | 172:65be27845400 | 16 | * |
| AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 18 | */ |
| AnnaBridge | 172:65be27845400 | 19 | |
| AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_SMBUS_H |
| AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_SMBUS_H |
| AnnaBridge | 172:65be27845400 | 23 | |
| AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
| AnnaBridge | 172:65be27845400 | 26 | #endif |
| AnnaBridge | 172:65be27845400 | 27 | |
| AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
| AnnaBridge | 172:65be27845400 | 30 | |
| AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
| AnnaBridge | 172:65be27845400 | 32 | * @{ |
| AnnaBridge | 172:65be27845400 | 33 | */ |
| AnnaBridge | 172:65be27845400 | 34 | |
| AnnaBridge | 172:65be27845400 | 35 | /** @addtogroup SMBUS |
| AnnaBridge | 172:65be27845400 | 36 | * @{ |
| AnnaBridge | 172:65be27845400 | 37 | */ |
| AnnaBridge | 172:65be27845400 | 38 | |
| AnnaBridge | 172:65be27845400 | 39 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 40 | /** @defgroup SMBUS_Exported_Types SMBUS Exported Types |
| AnnaBridge | 172:65be27845400 | 41 | * @{ |
| AnnaBridge | 172:65be27845400 | 42 | */ |
| AnnaBridge | 172:65be27845400 | 43 | |
| AnnaBridge | 172:65be27845400 | 44 | /** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition |
| AnnaBridge | 172:65be27845400 | 45 | * @brief SMBUS Configuration Structure definition |
| AnnaBridge | 172:65be27845400 | 46 | * @{ |
| AnnaBridge | 172:65be27845400 | 47 | */ |
| AnnaBridge | 172:65be27845400 | 48 | typedef struct |
| AnnaBridge | 172:65be27845400 | 49 | { |
| AnnaBridge | 172:65be27845400 | 50 | uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value. |
| AnnaBridge | 172:65be27845400 | 51 | This parameter calculated by referring to SMBUS initialization |
| AnnaBridge | 172:65be27845400 | 52 | section in Reference manual */ |
| AnnaBridge | 172:65be27845400 | 53 | uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not. |
| AnnaBridge | 172:65be27845400 | 54 | This parameter can be a value of @ref SMBUS_Analog_Filter */ |
| AnnaBridge | 172:65be27845400 | 55 | |
| AnnaBridge | 172:65be27845400 | 56 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| AnnaBridge | 172:65be27845400 | 57 | This parameter can be a 7-bit or 10-bit address. */ |
| AnnaBridge | 172:65be27845400 | 58 | |
| AnnaBridge | 172:65be27845400 | 59 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected. |
| AnnaBridge | 172:65be27845400 | 60 | This parameter can be a value of @ref SMBUS_addressing_mode */ |
| AnnaBridge | 172:65be27845400 | 61 | |
| AnnaBridge | 172:65be27845400 | 62 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| AnnaBridge | 172:65be27845400 | 63 | This parameter can be a value of @ref SMBUS_dual_addressing_mode */ |
| AnnaBridge | 172:65be27845400 | 64 | |
| AnnaBridge | 172:65be27845400 | 65 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| AnnaBridge | 172:65be27845400 | 66 | This parameter can be a 7-bit address. */ |
| AnnaBridge | 172:65be27845400 | 67 | |
| AnnaBridge | 172:65be27845400 | 68 | uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected |
| AnnaBridge | 172:65be27845400 | 69 | This parameter can be a value of @ref SMBUS_own_address2_masks. */ |
| AnnaBridge | 172:65be27845400 | 70 | |
| AnnaBridge | 172:65be27845400 | 71 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| AnnaBridge | 172:65be27845400 | 72 | This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */ |
| AnnaBridge | 172:65be27845400 | 73 | |
| AnnaBridge | 172:65be27845400 | 74 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| AnnaBridge | 172:65be27845400 | 75 | This parameter can be a value of @ref SMBUS_nostretch_mode */ |
| AnnaBridge | 172:65be27845400 | 76 | |
| AnnaBridge | 172:65be27845400 | 77 | uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected. |
| AnnaBridge | 172:65be27845400 | 78 | This parameter can be a value of @ref SMBUS_packet_error_check_mode */ |
| AnnaBridge | 172:65be27845400 | 79 | |
| AnnaBridge | 172:65be27845400 | 80 | uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected. |
| AnnaBridge | 172:65be27845400 | 81 | This parameter can be a value of @ref SMBUS_peripheral_mode */ |
| AnnaBridge | 172:65be27845400 | 82 | |
| AnnaBridge | 172:65be27845400 | 83 | uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value. |
| AnnaBridge | 172:65be27845400 | 84 | (Enable bits and different timeout values) |
| AnnaBridge | 172:65be27845400 | 85 | This parameter calculated by referring to SMBUS initialization |
| AnnaBridge | 172:65be27845400 | 86 | section in Reference manual */ |
| AnnaBridge | 172:65be27845400 | 87 | } SMBUS_InitTypeDef; |
| AnnaBridge | 172:65be27845400 | 88 | /** |
| AnnaBridge | 172:65be27845400 | 89 | * @} |
| AnnaBridge | 172:65be27845400 | 90 | */ |
| AnnaBridge | 172:65be27845400 | 91 | |
| AnnaBridge | 172:65be27845400 | 92 | /** @defgroup HAL_state_definition HAL state definition |
| AnnaBridge | 172:65be27845400 | 93 | * @brief HAL State definition |
| AnnaBridge | 172:65be27845400 | 94 | * @{ |
| AnnaBridge | 172:65be27845400 | 95 | */ |
| AnnaBridge | 172:65be27845400 | 96 | #define HAL_SMBUS_STATE_RESET (0x00000000U) /*!< SMBUS not yet initialized or disabled */ |
| AnnaBridge | 172:65be27845400 | 97 | #define HAL_SMBUS_STATE_READY (0x00000001U) /*!< SMBUS initialized and ready for use */ |
| AnnaBridge | 172:65be27845400 | 98 | #define HAL_SMBUS_STATE_BUSY (0x00000002U) /*!< SMBUS internal process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 99 | #define HAL_SMBUS_STATE_MASTER_BUSY_TX (0x00000012U) /*!< Master Data Transmission process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 100 | #define HAL_SMBUS_STATE_MASTER_BUSY_RX (0x00000022U) /*!< Master Data Reception process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 101 | #define HAL_SMBUS_STATE_SLAVE_BUSY_TX (0x00000032U) /*!< Slave Data Transmission process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 102 | #define HAL_SMBUS_STATE_SLAVE_BUSY_RX (0x00000042U) /*!< Slave Data Reception process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 103 | #define HAL_SMBUS_STATE_TIMEOUT (0x00000003U) /*!< Timeout state */ |
| AnnaBridge | 172:65be27845400 | 104 | #define HAL_SMBUS_STATE_ERROR (0x00000004U) /*!< Reception process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 105 | #define HAL_SMBUS_STATE_LISTEN (0x00000008U) /*!< Address Listen Mode is ongoing */ |
| AnnaBridge | 172:65be27845400 | 106 | /** |
| AnnaBridge | 172:65be27845400 | 107 | * @} |
| AnnaBridge | 172:65be27845400 | 108 | */ |
| AnnaBridge | 172:65be27845400 | 109 | |
| AnnaBridge | 172:65be27845400 | 110 | /** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition |
| AnnaBridge | 172:65be27845400 | 111 | * @brief SMBUS Error Code definition |
| AnnaBridge | 172:65be27845400 | 112 | * @{ |
| AnnaBridge | 172:65be27845400 | 113 | */ |
| AnnaBridge | 172:65be27845400 | 114 | #define HAL_SMBUS_ERROR_NONE (0x00000000U) /*!< No error */ |
| AnnaBridge | 172:65be27845400 | 115 | #define HAL_SMBUS_ERROR_BERR (0x00000001U) /*!< BERR error */ |
| AnnaBridge | 172:65be27845400 | 116 | #define HAL_SMBUS_ERROR_ARLO (0x00000002U) /*!< ARLO error */ |
| AnnaBridge | 172:65be27845400 | 117 | #define HAL_SMBUS_ERROR_ACKF (0x00000004U) /*!< ACKF error */ |
| AnnaBridge | 172:65be27845400 | 118 | #define HAL_SMBUS_ERROR_OVR (0x00000008U) /*!< OVR error */ |
| AnnaBridge | 172:65be27845400 | 119 | #define HAL_SMBUS_ERROR_HALTIMEOUT (0x00000010U) /*!< Timeout error */ |
| AnnaBridge | 172:65be27845400 | 120 | #define HAL_SMBUS_ERROR_BUSTIMEOUT (0x00000020U) /*!< Bus Timeout error */ |
| AnnaBridge | 172:65be27845400 | 121 | #define HAL_SMBUS_ERROR_ALERT (0x00000040U) /*!< Alert error */ |
| AnnaBridge | 172:65be27845400 | 122 | #define HAL_SMBUS_ERROR_PECERR (0x00000080U) /*!< PEC error */ |
| AnnaBridge | 172:65be27845400 | 123 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 124 | #define HAL_SMBUS_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ |
| AnnaBridge | 172:65be27845400 | 125 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 126 | #define HAL_SMBUS_ERROR_INVALID_PARAM (0x00000200U) /*!< Invalid Parameters error */ |
| AnnaBridge | 172:65be27845400 | 127 | /** |
| AnnaBridge | 172:65be27845400 | 128 | * @} |
| AnnaBridge | 172:65be27845400 | 129 | */ |
| AnnaBridge | 172:65be27845400 | 130 | |
| AnnaBridge | 172:65be27845400 | 131 | /** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition |
| AnnaBridge | 172:65be27845400 | 132 | * @brief SMBUS handle Structure definition |
| AnnaBridge | 172:65be27845400 | 133 | * @{ |
| AnnaBridge | 172:65be27845400 | 134 | */ |
| AnnaBridge | 172:65be27845400 | 135 | typedef struct __SMBUS_HandleTypeDef |
| AnnaBridge | 172:65be27845400 | 136 | { |
| AnnaBridge | 172:65be27845400 | 137 | I2C_TypeDef *Instance; /*!< SMBUS registers base address */ |
| AnnaBridge | 172:65be27845400 | 138 | |
| AnnaBridge | 172:65be27845400 | 139 | SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */ |
| AnnaBridge | 172:65be27845400 | 140 | |
| AnnaBridge | 172:65be27845400 | 141 | uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */ |
| AnnaBridge | 172:65be27845400 | 142 | |
| AnnaBridge | 172:65be27845400 | 143 | uint16_t XferSize; /*!< SMBUS transfer size */ |
| AnnaBridge | 172:65be27845400 | 144 | |
| AnnaBridge | 172:65be27845400 | 145 | __IO uint16_t XferCount; /*!< SMBUS transfer counter */ |
| AnnaBridge | 172:65be27845400 | 146 | |
| AnnaBridge | 172:65be27845400 | 147 | __IO uint32_t XferOptions; /*!< SMBUS transfer options */ |
| AnnaBridge | 172:65be27845400 | 148 | |
| AnnaBridge | 172:65be27845400 | 149 | __IO uint32_t PreviousState; /*!< SMBUS communication Previous state */ |
| AnnaBridge | 172:65be27845400 | 150 | |
| AnnaBridge | 172:65be27845400 | 151 | HAL_LockTypeDef Lock; /*!< SMBUS locking object */ |
| AnnaBridge | 172:65be27845400 | 152 | |
| AnnaBridge | 172:65be27845400 | 153 | __IO uint32_t State; /*!< SMBUS communication state */ |
| AnnaBridge | 172:65be27845400 | 154 | |
| AnnaBridge | 172:65be27845400 | 155 | __IO uint32_t ErrorCode; /*!< SMBUS Error code */ |
| AnnaBridge | 172:65be27845400 | 156 | |
| AnnaBridge | 172:65be27845400 | 157 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 158 | void (* MasterTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Tx Transfer completed callback */ |
| AnnaBridge | 172:65be27845400 | 159 | void (* MasterRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Master Rx Transfer completed callback */ |
| AnnaBridge | 172:65be27845400 | 160 | void (* SlaveTxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Tx Transfer completed callback */ |
| AnnaBridge | 172:65be27845400 | 161 | void (* SlaveRxCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Slave Rx Transfer completed callback */ |
| AnnaBridge | 172:65be27845400 | 162 | void (* ListenCpltCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Listen Complete callback */ |
| AnnaBridge | 172:65be27845400 | 163 | void (* ErrorCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Error callback */ |
| AnnaBridge | 172:65be27845400 | 164 | |
| AnnaBridge | 172:65be27845400 | 165 | void (* AddrCallback)(struct __SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< SMBUS Slave Address Match callback */ |
| AnnaBridge | 172:65be27845400 | 166 | |
| AnnaBridge | 172:65be27845400 | 167 | void (* MspInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp Init callback */ |
| AnnaBridge | 172:65be27845400 | 168 | void (* MspDeInitCallback)(struct __SMBUS_HandleTypeDef *hsmbus); /*!< SMBUS Msp DeInit callback */ |
| AnnaBridge | 172:65be27845400 | 169 | |
| AnnaBridge | 172:65be27845400 | 170 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 171 | } SMBUS_HandleTypeDef; |
| AnnaBridge | 172:65be27845400 | 172 | |
| AnnaBridge | 172:65be27845400 | 173 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 174 | /** |
| AnnaBridge | 172:65be27845400 | 175 | * @brief HAL SMBUS Callback ID enumeration definition |
| AnnaBridge | 172:65be27845400 | 176 | */ |
| AnnaBridge | 172:65be27845400 | 177 | typedef enum |
| AnnaBridge | 172:65be27845400 | 178 | { |
| AnnaBridge | 172:65be27845400 | 179 | HAL_SMBUS_MASTER_TX_COMPLETE_CB_ID = 0x00U, /*!< SMBUS Master Tx Transfer completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 180 | HAL_SMBUS_MASTER_RX_COMPLETE_CB_ID = 0x01U, /*!< SMBUS Master Rx Transfer completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 181 | HAL_SMBUS_SLAVE_TX_COMPLETE_CB_ID = 0x02U, /*!< SMBUS Slave Tx Transfer completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 182 | HAL_SMBUS_SLAVE_RX_COMPLETE_CB_ID = 0x03U, /*!< SMBUS Slave Rx Transfer completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 183 | HAL_SMBUS_LISTEN_COMPLETE_CB_ID = 0x04U, /*!< SMBUS Listen Complete callback ID */ |
| AnnaBridge | 172:65be27845400 | 184 | HAL_SMBUS_ERROR_CB_ID = 0x05U, /*!< SMBUS Error callback ID */ |
| AnnaBridge | 172:65be27845400 | 185 | |
| AnnaBridge | 172:65be27845400 | 186 | HAL_SMBUS_MSPINIT_CB_ID = 0x06U, /*!< SMBUS Msp Init callback ID */ |
| AnnaBridge | 172:65be27845400 | 187 | HAL_SMBUS_MSPDEINIT_CB_ID = 0x07U /*!< SMBUS Msp DeInit callback ID */ |
| AnnaBridge | 172:65be27845400 | 188 | |
| AnnaBridge | 172:65be27845400 | 189 | } HAL_SMBUS_CallbackIDTypeDef; |
| AnnaBridge | 172:65be27845400 | 190 | |
| AnnaBridge | 172:65be27845400 | 191 | /** |
| AnnaBridge | 172:65be27845400 | 192 | * @brief HAL SMBUS Callback pointer definition |
| AnnaBridge | 172:65be27845400 | 193 | */ |
| AnnaBridge | 172:65be27845400 | 194 | typedef void (*pSMBUS_CallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus); /*!< pointer to an SMBUS callback function */ |
| AnnaBridge | 172:65be27845400 | 195 | typedef void (*pSMBUS_AddrCallbackTypeDef)(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); /*!< pointer to an SMBUS Address Match callback function */ |
| AnnaBridge | 172:65be27845400 | 196 | |
| AnnaBridge | 172:65be27845400 | 197 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 198 | /** |
| AnnaBridge | 172:65be27845400 | 199 | * @} |
| AnnaBridge | 172:65be27845400 | 200 | */ |
| AnnaBridge | 172:65be27845400 | 201 | |
| AnnaBridge | 172:65be27845400 | 202 | /** |
| AnnaBridge | 172:65be27845400 | 203 | * @} |
| AnnaBridge | 172:65be27845400 | 204 | */ |
| AnnaBridge | 172:65be27845400 | 205 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 206 | |
| AnnaBridge | 172:65be27845400 | 207 | /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants |
| AnnaBridge | 172:65be27845400 | 208 | * @{ |
| AnnaBridge | 172:65be27845400 | 209 | */ |
| AnnaBridge | 172:65be27845400 | 210 | |
| AnnaBridge | 172:65be27845400 | 211 | /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter |
| AnnaBridge | 172:65be27845400 | 212 | * @{ |
| AnnaBridge | 172:65be27845400 | 213 | */ |
| AnnaBridge | 172:65be27845400 | 214 | #define SMBUS_ANALOGFILTER_ENABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 215 | #define SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF |
| AnnaBridge | 172:65be27845400 | 216 | /** |
| AnnaBridge | 172:65be27845400 | 217 | * @} |
| AnnaBridge | 172:65be27845400 | 218 | */ |
| AnnaBridge | 172:65be27845400 | 219 | |
| AnnaBridge | 172:65be27845400 | 220 | /** @defgroup SMBUS_addressing_mode SMBUS addressing mode |
| AnnaBridge | 172:65be27845400 | 221 | * @{ |
| AnnaBridge | 172:65be27845400 | 222 | */ |
| AnnaBridge | 172:65be27845400 | 223 | #define SMBUS_ADDRESSINGMODE_7BIT (0x00000001U) |
| AnnaBridge | 172:65be27845400 | 224 | #define SMBUS_ADDRESSINGMODE_10BIT (0x00000002U) |
| AnnaBridge | 172:65be27845400 | 225 | /** |
| AnnaBridge | 172:65be27845400 | 226 | * @} |
| AnnaBridge | 172:65be27845400 | 227 | */ |
| AnnaBridge | 172:65be27845400 | 228 | |
| AnnaBridge | 172:65be27845400 | 229 | /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode |
| AnnaBridge | 172:65be27845400 | 230 | * @{ |
| AnnaBridge | 172:65be27845400 | 231 | */ |
| AnnaBridge | 172:65be27845400 | 232 | |
| AnnaBridge | 172:65be27845400 | 233 | #define SMBUS_DUALADDRESS_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 234 | #define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN |
| AnnaBridge | 172:65be27845400 | 235 | /** |
| AnnaBridge | 172:65be27845400 | 236 | * @} |
| AnnaBridge | 172:65be27845400 | 237 | */ |
| AnnaBridge | 172:65be27845400 | 238 | |
| AnnaBridge | 172:65be27845400 | 239 | /** @defgroup SMBUS_own_address2_masks SMBUS ownaddress2 masks |
| AnnaBridge | 172:65be27845400 | 240 | * @{ |
| AnnaBridge | 172:65be27845400 | 241 | */ |
| AnnaBridge | 172:65be27845400 | 242 | |
| AnnaBridge | 172:65be27845400 | 243 | #define SMBUS_OA2_NOMASK ((uint8_t)0x00U) |
| AnnaBridge | 172:65be27845400 | 244 | #define SMBUS_OA2_MASK01 ((uint8_t)0x01U) |
| AnnaBridge | 172:65be27845400 | 245 | #define SMBUS_OA2_MASK02 ((uint8_t)0x02U) |
| AnnaBridge | 172:65be27845400 | 246 | #define SMBUS_OA2_MASK03 ((uint8_t)0x03U) |
| AnnaBridge | 172:65be27845400 | 247 | #define SMBUS_OA2_MASK04 ((uint8_t)0x04U) |
| AnnaBridge | 172:65be27845400 | 248 | #define SMBUS_OA2_MASK05 ((uint8_t)0x05U) |
| AnnaBridge | 172:65be27845400 | 249 | #define SMBUS_OA2_MASK06 ((uint8_t)0x06U) |
| AnnaBridge | 172:65be27845400 | 250 | #define SMBUS_OA2_MASK07 ((uint8_t)0x07U) |
| AnnaBridge | 172:65be27845400 | 251 | /** |
| AnnaBridge | 172:65be27845400 | 252 | * @} |
| AnnaBridge | 172:65be27845400 | 253 | */ |
| AnnaBridge | 172:65be27845400 | 254 | |
| AnnaBridge | 172:65be27845400 | 255 | |
| AnnaBridge | 172:65be27845400 | 256 | /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode |
| AnnaBridge | 172:65be27845400 | 257 | * @{ |
| AnnaBridge | 172:65be27845400 | 258 | */ |
| AnnaBridge | 172:65be27845400 | 259 | #define SMBUS_GENERALCALL_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 260 | #define SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN |
| AnnaBridge | 172:65be27845400 | 261 | /** |
| AnnaBridge | 172:65be27845400 | 262 | * @} |
| AnnaBridge | 172:65be27845400 | 263 | */ |
| AnnaBridge | 172:65be27845400 | 264 | |
| AnnaBridge | 172:65be27845400 | 265 | /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode |
| AnnaBridge | 172:65be27845400 | 266 | * @{ |
| AnnaBridge | 172:65be27845400 | 267 | */ |
| AnnaBridge | 172:65be27845400 | 268 | #define SMBUS_NOSTRETCH_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 269 | #define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
| AnnaBridge | 172:65be27845400 | 270 | /** |
| AnnaBridge | 172:65be27845400 | 271 | * @} |
| AnnaBridge | 172:65be27845400 | 272 | */ |
| AnnaBridge | 172:65be27845400 | 273 | |
| AnnaBridge | 172:65be27845400 | 274 | /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode |
| AnnaBridge | 172:65be27845400 | 275 | * @{ |
| AnnaBridge | 172:65be27845400 | 276 | */ |
| AnnaBridge | 172:65be27845400 | 277 | #define SMBUS_PEC_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 278 | #define SMBUS_PEC_ENABLE I2C_CR1_PECEN |
| AnnaBridge | 172:65be27845400 | 279 | /** |
| AnnaBridge | 172:65be27845400 | 280 | * @} |
| AnnaBridge | 172:65be27845400 | 281 | */ |
| AnnaBridge | 172:65be27845400 | 282 | |
| AnnaBridge | 172:65be27845400 | 283 | /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode |
| AnnaBridge | 172:65be27845400 | 284 | * @{ |
| AnnaBridge | 172:65be27845400 | 285 | */ |
| AnnaBridge | 172:65be27845400 | 286 | #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST I2C_CR1_SMBHEN |
| AnnaBridge | 172:65be27845400 | 287 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 288 | #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP I2C_CR1_SMBDEN |
| AnnaBridge | 172:65be27845400 | 289 | /** |
| AnnaBridge | 172:65be27845400 | 290 | * @} |
| AnnaBridge | 172:65be27845400 | 291 | */ |
| AnnaBridge | 172:65be27845400 | 292 | |
| AnnaBridge | 172:65be27845400 | 293 | /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition |
| AnnaBridge | 172:65be27845400 | 294 | * @{ |
| AnnaBridge | 172:65be27845400 | 295 | */ |
| AnnaBridge | 172:65be27845400 | 296 | |
| AnnaBridge | 172:65be27845400 | 297 | #define SMBUS_SOFTEND_MODE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 298 | #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD |
| AnnaBridge | 172:65be27845400 | 299 | #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND |
| AnnaBridge | 172:65be27845400 | 300 | #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE |
| AnnaBridge | 172:65be27845400 | 301 | /** |
| AnnaBridge | 172:65be27845400 | 302 | * @} |
| AnnaBridge | 172:65be27845400 | 303 | */ |
| AnnaBridge | 172:65be27845400 | 304 | |
| AnnaBridge | 172:65be27845400 | 305 | /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition |
| AnnaBridge | 172:65be27845400 | 306 | * @{ |
| AnnaBridge | 172:65be27845400 | 307 | */ |
| AnnaBridge | 172:65be27845400 | 308 | |
| AnnaBridge | 172:65be27845400 | 309 | #define SMBUS_NO_STARTSTOP (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 310 | #define SMBUS_GENERATE_STOP (uint32_t)(0x80000000U | I2C_CR2_STOP) |
| AnnaBridge | 172:65be27845400 | 311 | #define SMBUS_GENERATE_START_READ (uint32_t)(0x80000000U | I2C_CR2_START | I2C_CR2_RD_WRN) |
| AnnaBridge | 172:65be27845400 | 312 | #define SMBUS_GENERATE_START_WRITE (uint32_t)(0x80000000U | I2C_CR2_START) |
| AnnaBridge | 172:65be27845400 | 313 | /** |
| AnnaBridge | 172:65be27845400 | 314 | * @} |
| AnnaBridge | 172:65be27845400 | 315 | */ |
| AnnaBridge | 172:65be27845400 | 316 | |
| AnnaBridge | 172:65be27845400 | 317 | /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition |
| AnnaBridge | 172:65be27845400 | 318 | * @{ |
| AnnaBridge | 172:65be27845400 | 319 | */ |
| AnnaBridge | 172:65be27845400 | 320 | |
| AnnaBridge | 172:65be27845400 | 321 | /* List of XferOptions in usage of : |
| AnnaBridge | 172:65be27845400 | 322 | * 1- Restart condition when direction change |
| AnnaBridge | 172:65be27845400 | 323 | * 2- No Restart condition in other use cases |
| AnnaBridge | 172:65be27845400 | 324 | */ |
| AnnaBridge | 172:65be27845400 | 325 | #define SMBUS_FIRST_FRAME SMBUS_SOFTEND_MODE |
| AnnaBridge | 172:65be27845400 | 326 | #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE)) |
| AnnaBridge | 172:65be27845400 | 327 | #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| AnnaBridge | 172:65be27845400 | 328 | #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE |
| AnnaBridge | 172:65be27845400 | 329 | #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| AnnaBridge | 172:65be27845400 | 330 | #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) |
| AnnaBridge | 172:65be27845400 | 331 | |
| AnnaBridge | 172:65be27845400 | 332 | /* List of XferOptions in usage of : |
| AnnaBridge | 172:65be27845400 | 333 | * 1- Restart condition in all use cases (direction change or not) |
| AnnaBridge | 172:65be27845400 | 334 | */ |
| AnnaBridge | 172:65be27845400 | 335 | #define SMBUS_OTHER_FRAME_NO_PEC (0x000000AAU) |
| AnnaBridge | 172:65be27845400 | 336 | #define SMBUS_OTHER_FRAME_WITH_PEC (0x0000AA00U) |
| AnnaBridge | 172:65be27845400 | 337 | #define SMBUS_OTHER_AND_LAST_FRAME_NO_PEC (0x00AA0000U) |
| AnnaBridge | 172:65be27845400 | 338 | #define SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC (0xAA000000U) |
| AnnaBridge | 172:65be27845400 | 339 | /** |
| AnnaBridge | 172:65be27845400 | 340 | * @} |
| AnnaBridge | 172:65be27845400 | 341 | */ |
| AnnaBridge | 172:65be27845400 | 342 | |
| AnnaBridge | 172:65be27845400 | 343 | /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition |
| AnnaBridge | 172:65be27845400 | 344 | * @brief SMBUS Interrupt definition |
| AnnaBridge | 172:65be27845400 | 345 | * Elements values convention: 0xXXXXXXXX |
| AnnaBridge | 172:65be27845400 | 346 | * - XXXXXXXX : Interrupt control mask |
| AnnaBridge | 172:65be27845400 | 347 | * @{ |
| AnnaBridge | 172:65be27845400 | 348 | */ |
| AnnaBridge | 172:65be27845400 | 349 | #define SMBUS_IT_ERRI I2C_CR1_ERRIE |
| AnnaBridge | 172:65be27845400 | 350 | #define SMBUS_IT_TCI I2C_CR1_TCIE |
| AnnaBridge | 172:65be27845400 | 351 | #define SMBUS_IT_STOPI I2C_CR1_STOPIE |
| AnnaBridge | 172:65be27845400 | 352 | #define SMBUS_IT_NACKI I2C_CR1_NACKIE |
| AnnaBridge | 172:65be27845400 | 353 | #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE |
| AnnaBridge | 172:65be27845400 | 354 | #define SMBUS_IT_RXI I2C_CR1_RXIE |
| AnnaBridge | 172:65be27845400 | 355 | #define SMBUS_IT_TXI I2C_CR1_TXIE |
| AnnaBridge | 172:65be27845400 | 356 | #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI) |
| AnnaBridge | 172:65be27845400 | 357 | #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI) |
| AnnaBridge | 172:65be27845400 | 358 | #define SMBUS_IT_ALERT (SMBUS_IT_ERRI) |
| AnnaBridge | 172:65be27845400 | 359 | #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI) |
| AnnaBridge | 172:65be27845400 | 360 | /** |
| AnnaBridge | 172:65be27845400 | 361 | * @} |
| AnnaBridge | 172:65be27845400 | 362 | */ |
| AnnaBridge | 172:65be27845400 | 363 | |
| AnnaBridge | 172:65be27845400 | 364 | /** @defgroup SMBUS_Flag_definition SMBUS Flag definition |
| AnnaBridge | 172:65be27845400 | 365 | * @brief Flag definition |
| AnnaBridge | 172:65be27845400 | 366 | * Elements values convention: 0xXXXXYYYY |
| AnnaBridge | 172:65be27845400 | 367 | * - XXXXXXXX : Flag mask |
| AnnaBridge | 172:65be27845400 | 368 | * @{ |
| AnnaBridge | 172:65be27845400 | 369 | */ |
| AnnaBridge | 172:65be27845400 | 370 | |
| AnnaBridge | 172:65be27845400 | 371 | #define SMBUS_FLAG_TXE I2C_ISR_TXE |
| AnnaBridge | 172:65be27845400 | 372 | #define SMBUS_FLAG_TXIS I2C_ISR_TXIS |
| AnnaBridge | 172:65be27845400 | 373 | #define SMBUS_FLAG_RXNE I2C_ISR_RXNE |
| AnnaBridge | 172:65be27845400 | 374 | #define SMBUS_FLAG_ADDR I2C_ISR_ADDR |
| AnnaBridge | 172:65be27845400 | 375 | #define SMBUS_FLAG_AF I2C_ISR_NACKF |
| AnnaBridge | 172:65be27845400 | 376 | #define SMBUS_FLAG_STOPF I2C_ISR_STOPF |
| AnnaBridge | 172:65be27845400 | 377 | #define SMBUS_FLAG_TC I2C_ISR_TC |
| AnnaBridge | 172:65be27845400 | 378 | #define SMBUS_FLAG_TCR I2C_ISR_TCR |
| AnnaBridge | 172:65be27845400 | 379 | #define SMBUS_FLAG_BERR I2C_ISR_BERR |
| AnnaBridge | 172:65be27845400 | 380 | #define SMBUS_FLAG_ARLO I2C_ISR_ARLO |
| AnnaBridge | 172:65be27845400 | 381 | #define SMBUS_FLAG_OVR I2C_ISR_OVR |
| AnnaBridge | 172:65be27845400 | 382 | #define SMBUS_FLAG_PECERR I2C_ISR_PECERR |
| AnnaBridge | 172:65be27845400 | 383 | #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| AnnaBridge | 172:65be27845400 | 384 | #define SMBUS_FLAG_ALERT I2C_ISR_ALERT |
| AnnaBridge | 172:65be27845400 | 385 | #define SMBUS_FLAG_BUSY I2C_ISR_BUSY |
| AnnaBridge | 172:65be27845400 | 386 | #define SMBUS_FLAG_DIR I2C_ISR_DIR |
| AnnaBridge | 172:65be27845400 | 387 | /** |
| AnnaBridge | 172:65be27845400 | 388 | * @} |
| AnnaBridge | 172:65be27845400 | 389 | */ |
| AnnaBridge | 172:65be27845400 | 390 | |
| AnnaBridge | 172:65be27845400 | 391 | /** |
| AnnaBridge | 172:65be27845400 | 392 | * @} |
| AnnaBridge | 172:65be27845400 | 393 | */ |
| AnnaBridge | 172:65be27845400 | 394 | |
| AnnaBridge | 172:65be27845400 | 395 | /* Exported macros ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 396 | /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros |
| AnnaBridge | 172:65be27845400 | 397 | * @{ |
| AnnaBridge | 172:65be27845400 | 398 | */ |
| AnnaBridge | 172:65be27845400 | 399 | |
| AnnaBridge | 172:65be27845400 | 400 | /** @brief Reset SMBUS handle state. |
| AnnaBridge | 172:65be27845400 | 401 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 402 | * @retval None |
| AnnaBridge | 172:65be27845400 | 403 | */ |
| AnnaBridge | 172:65be27845400 | 404 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 405 | #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 172:65be27845400 | 406 | (__HANDLE__)->State = HAL_SMBUS_STATE_RESET; \ |
| AnnaBridge | 172:65be27845400 | 407 | (__HANDLE__)->MspInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 408 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 409 | } while(0) |
| AnnaBridge | 172:65be27845400 | 410 | #else |
| AnnaBridge | 172:65be27845400 | 411 | #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET) |
| AnnaBridge | 172:65be27845400 | 412 | #endif |
| AnnaBridge | 172:65be27845400 | 413 | |
| AnnaBridge | 172:65be27845400 | 414 | /** @brief Enable the specified SMBUS interrupts. |
| AnnaBridge | 172:65be27845400 | 415 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 416 | * @param __INTERRUPT__ specifies the interrupt source to enable. |
| AnnaBridge | 172:65be27845400 | 417 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 418 | * @arg @ref SMBUS_IT_ERRI Errors interrupt enable |
| AnnaBridge | 172:65be27845400 | 419 | * @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable |
| AnnaBridge | 172:65be27845400 | 420 | * @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable |
| AnnaBridge | 172:65be27845400 | 421 | * @arg @ref SMBUS_IT_NACKI NACK received interrupt enable |
| AnnaBridge | 172:65be27845400 | 422 | * @arg @ref SMBUS_IT_ADDRI Address match interrupt enable |
| AnnaBridge | 172:65be27845400 | 423 | * @arg @ref SMBUS_IT_RXI RX interrupt enable |
| AnnaBridge | 172:65be27845400 | 424 | * @arg @ref SMBUS_IT_TXI TX interrupt enable |
| AnnaBridge | 172:65be27845400 | 425 | * |
| AnnaBridge | 172:65be27845400 | 426 | * @retval None |
| AnnaBridge | 172:65be27845400 | 427 | */ |
| AnnaBridge | 172:65be27845400 | 428 | #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 429 | |
| AnnaBridge | 172:65be27845400 | 430 | /** @brief Disable the specified SMBUS interrupts. |
| AnnaBridge | 172:65be27845400 | 431 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 432 | * @param __INTERRUPT__ specifies the interrupt source to disable. |
| AnnaBridge | 172:65be27845400 | 433 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 434 | * @arg @ref SMBUS_IT_ERRI Errors interrupt enable |
| AnnaBridge | 172:65be27845400 | 435 | * @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable |
| AnnaBridge | 172:65be27845400 | 436 | * @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable |
| AnnaBridge | 172:65be27845400 | 437 | * @arg @ref SMBUS_IT_NACKI NACK received interrupt enable |
| AnnaBridge | 172:65be27845400 | 438 | * @arg @ref SMBUS_IT_ADDRI Address match interrupt enable |
| AnnaBridge | 172:65be27845400 | 439 | * @arg @ref SMBUS_IT_RXI RX interrupt enable |
| AnnaBridge | 172:65be27845400 | 440 | * @arg @ref SMBUS_IT_TXI TX interrupt enable |
| AnnaBridge | 172:65be27845400 | 441 | * |
| AnnaBridge | 172:65be27845400 | 442 | * @retval None |
| AnnaBridge | 172:65be27845400 | 443 | */ |
| AnnaBridge | 172:65be27845400 | 444 | #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| AnnaBridge | 172:65be27845400 | 445 | |
| AnnaBridge | 172:65be27845400 | 446 | /** @brief Check whether the specified SMBUS interrupt source is enabled or not. |
| AnnaBridge | 172:65be27845400 | 447 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 448 | * @param __INTERRUPT__ specifies the SMBUS interrupt source to check. |
| AnnaBridge | 172:65be27845400 | 449 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 450 | * @arg @ref SMBUS_IT_ERRI Errors interrupt enable |
| AnnaBridge | 172:65be27845400 | 451 | * @arg @ref SMBUS_IT_TCI Transfer complete interrupt enable |
| AnnaBridge | 172:65be27845400 | 452 | * @arg @ref SMBUS_IT_STOPI STOP detection interrupt enable |
| AnnaBridge | 172:65be27845400 | 453 | * @arg @ref SMBUS_IT_NACKI NACK received interrupt enable |
| AnnaBridge | 172:65be27845400 | 454 | * @arg @ref SMBUS_IT_ADDRI Address match interrupt enable |
| AnnaBridge | 172:65be27845400 | 455 | * @arg @ref SMBUS_IT_RXI RX interrupt enable |
| AnnaBridge | 172:65be27845400 | 456 | * @arg @ref SMBUS_IT_TXI TX interrupt enable |
| AnnaBridge | 172:65be27845400 | 457 | * |
| AnnaBridge | 172:65be27845400 | 458 | * @retval The new state of __IT__ (SET or RESET). |
| AnnaBridge | 172:65be27845400 | 459 | */ |
| AnnaBridge | 172:65be27845400 | 460 | #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 172:65be27845400 | 461 | |
| AnnaBridge | 172:65be27845400 | 462 | /** @brief Check whether the specified SMBUS flag is set or not. |
| AnnaBridge | 172:65be27845400 | 463 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 464 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 172:65be27845400 | 465 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 466 | * @arg @ref SMBUS_FLAG_TXE Transmit data register empty |
| AnnaBridge | 172:65be27845400 | 467 | * @arg @ref SMBUS_FLAG_TXIS Transmit interrupt status |
| AnnaBridge | 172:65be27845400 | 468 | * @arg @ref SMBUS_FLAG_RXNE Receive data register not empty |
| AnnaBridge | 172:65be27845400 | 469 | * @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode) |
| AnnaBridge | 172:65be27845400 | 470 | * @arg @ref SMBUS_FLAG_AF NACK received flag |
| AnnaBridge | 172:65be27845400 | 471 | * @arg @ref SMBUS_FLAG_STOPF STOP detection flag |
| AnnaBridge | 172:65be27845400 | 472 | * @arg @ref SMBUS_FLAG_TC Transfer complete (master mode) |
| AnnaBridge | 172:65be27845400 | 473 | * @arg @ref SMBUS_FLAG_TCR Transfer complete reload |
| AnnaBridge | 172:65be27845400 | 474 | * @arg @ref SMBUS_FLAG_BERR Bus error |
| AnnaBridge | 172:65be27845400 | 475 | * @arg @ref SMBUS_FLAG_ARLO Arbitration lost |
| AnnaBridge | 172:65be27845400 | 476 | * @arg @ref SMBUS_FLAG_OVR Overrun/Underrun |
| AnnaBridge | 172:65be27845400 | 477 | * @arg @ref SMBUS_FLAG_PECERR PEC error in reception |
| AnnaBridge | 172:65be27845400 | 478 | * @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag |
| AnnaBridge | 172:65be27845400 | 479 | * @arg @ref SMBUS_FLAG_ALERT SMBus alert |
| AnnaBridge | 172:65be27845400 | 480 | * @arg @ref SMBUS_FLAG_BUSY Bus busy |
| AnnaBridge | 172:65be27845400 | 481 | * @arg @ref SMBUS_FLAG_DIR Transfer direction (slave mode) |
| AnnaBridge | 172:65be27845400 | 482 | * |
| AnnaBridge | 172:65be27845400 | 483 | * @retval The new state of __FLAG__ (SET or RESET). |
| AnnaBridge | 172:65be27845400 | 484 | */ |
| AnnaBridge | 172:65be27845400 | 485 | #define SMBUS_FLAG_MASK (0x0001FFFFU) |
| AnnaBridge | 172:65be27845400 | 486 | #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET) |
| AnnaBridge | 172:65be27845400 | 487 | |
| AnnaBridge | 172:65be27845400 | 488 | /** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit. |
| AnnaBridge | 172:65be27845400 | 489 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 490 | * @param __FLAG__ specifies the flag to clear. |
| AnnaBridge | 172:65be27845400 | 491 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 492 | * @arg @ref SMBUS_FLAG_ADDR Address matched (slave mode) |
| AnnaBridge | 172:65be27845400 | 493 | * @arg @ref SMBUS_FLAG_AF NACK received flag |
| AnnaBridge | 172:65be27845400 | 494 | * @arg @ref SMBUS_FLAG_STOPF STOP detection flag |
| AnnaBridge | 172:65be27845400 | 495 | * @arg @ref SMBUS_FLAG_BERR Bus error |
| AnnaBridge | 172:65be27845400 | 496 | * @arg @ref SMBUS_FLAG_ARLO Arbitration lost |
| AnnaBridge | 172:65be27845400 | 497 | * @arg @ref SMBUS_FLAG_OVR Overrun/Underrun |
| AnnaBridge | 172:65be27845400 | 498 | * @arg @ref SMBUS_FLAG_PECERR PEC error in reception |
| AnnaBridge | 172:65be27845400 | 499 | * @arg @ref SMBUS_FLAG_TIMEOUT Timeout or Tlow detection flag |
| AnnaBridge | 172:65be27845400 | 500 | * @arg @ref SMBUS_FLAG_ALERT SMBus alert |
| AnnaBridge | 172:65be27845400 | 501 | * |
| AnnaBridge | 172:65be27845400 | 502 | * @retval None |
| AnnaBridge | 172:65be27845400 | 503 | */ |
| AnnaBridge | 172:65be27845400 | 504 | #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 505 | |
| AnnaBridge | 172:65be27845400 | 506 | /** @brief Enable the specified SMBUS peripheral. |
| AnnaBridge | 172:65be27845400 | 507 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 508 | * @retval None |
| AnnaBridge | 172:65be27845400 | 509 | */ |
| AnnaBridge | 172:65be27845400 | 510 | #define __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
| AnnaBridge | 172:65be27845400 | 511 | |
| AnnaBridge | 172:65be27845400 | 512 | /** @brief Disable the specified SMBUS peripheral. |
| AnnaBridge | 172:65be27845400 | 513 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 514 | * @retval None |
| AnnaBridge | 172:65be27845400 | 515 | */ |
| AnnaBridge | 172:65be27845400 | 516 | #define __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
| AnnaBridge | 172:65be27845400 | 517 | |
| AnnaBridge | 172:65be27845400 | 518 | /** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode. |
| AnnaBridge | 172:65be27845400 | 519 | * @param __HANDLE__ specifies the SMBUS Handle. |
| AnnaBridge | 172:65be27845400 | 520 | * @retval None |
| AnnaBridge | 172:65be27845400 | 521 | */ |
| AnnaBridge | 172:65be27845400 | 522 | #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) |
| AnnaBridge | 172:65be27845400 | 523 | |
| AnnaBridge | 172:65be27845400 | 524 | /** |
| AnnaBridge | 172:65be27845400 | 525 | * @} |
| AnnaBridge | 172:65be27845400 | 526 | */ |
| AnnaBridge | 172:65be27845400 | 527 | |
| AnnaBridge | 172:65be27845400 | 528 | |
| AnnaBridge | 172:65be27845400 | 529 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 530 | |
| AnnaBridge | 172:65be27845400 | 531 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 532 | /** @defgroup SMBUS_Private_Macro SMBUS Private Macros |
| AnnaBridge | 172:65be27845400 | 533 | * @{ |
| AnnaBridge | 172:65be27845400 | 534 | */ |
| AnnaBridge | 172:65be27845400 | 535 | |
| AnnaBridge | 172:65be27845400 | 536 | #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \ |
| AnnaBridge | 172:65be27845400 | 537 | ((FILTER) == SMBUS_ANALOGFILTER_DISABLE)) |
| AnnaBridge | 172:65be27845400 | 538 | |
| AnnaBridge | 172:65be27845400 | 539 | #define IS_SMBUS_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) |
| AnnaBridge | 172:65be27845400 | 540 | |
| AnnaBridge | 172:65be27845400 | 541 | #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \ |
| AnnaBridge | 172:65be27845400 | 542 | ((MODE) == SMBUS_ADDRESSINGMODE_10BIT)) |
| AnnaBridge | 172:65be27845400 | 543 | |
| AnnaBridge | 172:65be27845400 | 544 | #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 545 | ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 546 | |
| AnnaBridge | 172:65be27845400 | 547 | #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \ |
| AnnaBridge | 172:65be27845400 | 548 | ((MASK) == SMBUS_OA2_MASK01) || \ |
| AnnaBridge | 172:65be27845400 | 549 | ((MASK) == SMBUS_OA2_MASK02) || \ |
| AnnaBridge | 172:65be27845400 | 550 | ((MASK) == SMBUS_OA2_MASK03) || \ |
| AnnaBridge | 172:65be27845400 | 551 | ((MASK) == SMBUS_OA2_MASK04) || \ |
| AnnaBridge | 172:65be27845400 | 552 | ((MASK) == SMBUS_OA2_MASK05) || \ |
| AnnaBridge | 172:65be27845400 | 553 | ((MASK) == SMBUS_OA2_MASK06) || \ |
| AnnaBridge | 172:65be27845400 | 554 | ((MASK) == SMBUS_OA2_MASK07)) |
| AnnaBridge | 172:65be27845400 | 555 | |
| AnnaBridge | 172:65be27845400 | 556 | #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 557 | ((CALL) == SMBUS_GENERALCALL_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 558 | |
| AnnaBridge | 172:65be27845400 | 559 | #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 560 | ((STRETCH) == SMBUS_NOSTRETCH_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 561 | |
| AnnaBridge | 172:65be27845400 | 562 | #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 563 | ((PEC) == SMBUS_PEC_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 564 | |
| AnnaBridge | 172:65be27845400 | 565 | #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \ |
| AnnaBridge | 172:65be27845400 | 566 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \ |
| AnnaBridge | 172:65be27845400 | 567 | ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP)) |
| AnnaBridge | 172:65be27845400 | 568 | |
| AnnaBridge | 172:65be27845400 | 569 | #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \ |
| AnnaBridge | 172:65be27845400 | 570 | ((MODE) == SMBUS_AUTOEND_MODE) || \ |
| AnnaBridge | 172:65be27845400 | 571 | ((MODE) == SMBUS_SOFTEND_MODE) || \ |
| AnnaBridge | 172:65be27845400 | 572 | ((MODE) == SMBUS_SENDPEC_MODE) || \ |
| AnnaBridge | 172:65be27845400 | 573 | ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \ |
| AnnaBridge | 172:65be27845400 | 574 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \ |
| AnnaBridge | 172:65be27845400 | 575 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \ |
| AnnaBridge | 172:65be27845400 | 576 | ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE ))) |
| AnnaBridge | 172:65be27845400 | 577 | |
| AnnaBridge | 172:65be27845400 | 578 | |
| AnnaBridge | 172:65be27845400 | 579 | #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \ |
| AnnaBridge | 172:65be27845400 | 580 | ((REQUEST) == SMBUS_GENERATE_START_READ) || \ |
| AnnaBridge | 172:65be27845400 | 581 | ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \ |
| AnnaBridge | 172:65be27845400 | 582 | ((REQUEST) == SMBUS_NO_STARTSTOP)) |
| AnnaBridge | 172:65be27845400 | 583 | |
| AnnaBridge | 172:65be27845400 | 584 | |
| AnnaBridge | 172:65be27845400 | 585 | #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) || \ |
| AnnaBridge | 172:65be27845400 | 586 | ((REQUEST) == SMBUS_FIRST_FRAME) || \ |
| AnnaBridge | 172:65be27845400 | 587 | ((REQUEST) == SMBUS_NEXT_FRAME) || \ |
| AnnaBridge | 172:65be27845400 | 588 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \ |
| AnnaBridge | 172:65be27845400 | 589 | ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \ |
| AnnaBridge | 172:65be27845400 | 590 | ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \ |
| AnnaBridge | 172:65be27845400 | 591 | ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC)) |
| AnnaBridge | 172:65be27845400 | 592 | |
| AnnaBridge | 172:65be27845400 | 593 | #define IS_SMBUS_TRANSFER_OTHER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_OTHER_FRAME_NO_PEC) || \ |
| AnnaBridge | 172:65be27845400 | 594 | ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_NO_PEC) || \ |
| AnnaBridge | 172:65be27845400 | 595 | ((REQUEST) == SMBUS_OTHER_FRAME_WITH_PEC) || \ |
| AnnaBridge | 172:65be27845400 | 596 | ((REQUEST) == SMBUS_OTHER_AND_LAST_FRAME_WITH_PEC)) |
| AnnaBridge | 172:65be27845400 | 597 | |
| AnnaBridge | 172:65be27845400 | 598 | #define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN))) |
| AnnaBridge | 172:65be27845400 | 599 | #define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| AnnaBridge | 172:65be27845400 | 600 | |
| AnnaBridge | 172:65be27845400 | 601 | #define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| AnnaBridge | 172:65be27845400 | 602 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| AnnaBridge | 172:65be27845400 | 603 | |
| AnnaBridge | 172:65be27845400 | 604 | #define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17U) |
| AnnaBridge | 172:65be27845400 | 605 | #define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) |
| AnnaBridge | 172:65be27845400 | 606 | #define SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
| AnnaBridge | 172:65be27845400 | 607 | #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE) |
| AnnaBridge | 172:65be27845400 | 608 | #define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN) |
| AnnaBridge | 172:65be27845400 | 609 | |
| AnnaBridge | 172:65be27845400 | 610 | #define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)) ? SET : RESET) |
| AnnaBridge | 172:65be27845400 | 611 | #define SMBUS_CHECK_IT_SOURCE(__CR1__, __IT__) ((((__CR1__) & (__IT__)) == (__IT__)) ? SET : RESET) |
| AnnaBridge | 172:65be27845400 | 612 | |
| AnnaBridge | 172:65be27845400 | 613 | #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) |
| AnnaBridge | 172:65be27845400 | 614 | #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) |
| AnnaBridge | 172:65be27845400 | 615 | |
| AnnaBridge | 172:65be27845400 | 616 | /** |
| AnnaBridge | 172:65be27845400 | 617 | * @} |
| AnnaBridge | 172:65be27845400 | 618 | */ |
| AnnaBridge | 172:65be27845400 | 619 | |
| AnnaBridge | 172:65be27845400 | 620 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 621 | /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions |
| AnnaBridge | 172:65be27845400 | 622 | * @{ |
| AnnaBridge | 172:65be27845400 | 623 | */ |
| AnnaBridge | 172:65be27845400 | 624 | |
| AnnaBridge | 172:65be27845400 | 625 | /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 172:65be27845400 | 626 | * @{ |
| AnnaBridge | 172:65be27845400 | 627 | */ |
| AnnaBridge | 172:65be27845400 | 628 | |
| AnnaBridge | 172:65be27845400 | 629 | /* Initialization and de-initialization functions ****************************/ |
| AnnaBridge | 172:65be27845400 | 630 | HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 631 | HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 632 | void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 633 | void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 634 | HAL_StatusTypeDef HAL_SMBUS_ConfigAnalogFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t AnalogFilter); |
| AnnaBridge | 172:65be27845400 | 635 | HAL_StatusTypeDef HAL_SMBUS_ConfigDigitalFilter(SMBUS_HandleTypeDef *hsmbus, uint32_t DigitalFilter); |
| AnnaBridge | 172:65be27845400 | 636 | |
| AnnaBridge | 172:65be27845400 | 637 | /* Callbacks Register/UnRegister functions ***********************************/ |
| AnnaBridge | 172:65be27845400 | 638 | #if (USE_HAL_SMBUS_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 639 | HAL_StatusTypeDef HAL_SMBUS_RegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID, pSMBUS_CallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 640 | HAL_StatusTypeDef HAL_SMBUS_UnRegisterCallback(SMBUS_HandleTypeDef *hsmbus, HAL_SMBUS_CallbackIDTypeDef CallbackID); |
| AnnaBridge | 172:65be27845400 | 641 | |
| AnnaBridge | 172:65be27845400 | 642 | HAL_StatusTypeDef HAL_SMBUS_RegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus, pSMBUS_AddrCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 643 | HAL_StatusTypeDef HAL_SMBUS_UnRegisterAddrCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 644 | #endif /* USE_HAL_SMBUS_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 645 | /** |
| AnnaBridge | 172:65be27845400 | 646 | * @} |
| AnnaBridge | 172:65be27845400 | 647 | */ |
| AnnaBridge | 172:65be27845400 | 648 | |
| AnnaBridge | 172:65be27845400 | 649 | /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions |
| AnnaBridge | 172:65be27845400 | 650 | * @{ |
| AnnaBridge | 172:65be27845400 | 651 | */ |
| AnnaBridge | 172:65be27845400 | 652 | |
| AnnaBridge | 172:65be27845400 | 653 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 172:65be27845400 | 654 | /** @addtogroup Blocking_mode_Polling Blocking mode Polling |
| AnnaBridge | 172:65be27845400 | 655 | * @{ |
| AnnaBridge | 172:65be27845400 | 656 | */ |
| AnnaBridge | 172:65be27845400 | 657 | /******* Blocking mode: Polling */ |
| AnnaBridge | 172:65be27845400 | 658 | HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| AnnaBridge | 172:65be27845400 | 659 | /** |
| AnnaBridge | 172:65be27845400 | 660 | * @} |
| AnnaBridge | 172:65be27845400 | 661 | */ |
| AnnaBridge | 172:65be27845400 | 662 | |
| AnnaBridge | 172:65be27845400 | 663 | /** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt |
| AnnaBridge | 172:65be27845400 | 664 | * @{ |
| AnnaBridge | 172:65be27845400 | 665 | */ |
| AnnaBridge | 172:65be27845400 | 666 | /******* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 172:65be27845400 | 667 | HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 172:65be27845400 | 668 | HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 172:65be27845400 | 669 | HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress); |
| AnnaBridge | 172:65be27845400 | 670 | HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 172:65be27845400 | 671 | HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 172:65be27845400 | 672 | |
| AnnaBridge | 172:65be27845400 | 673 | HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 674 | HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 675 | HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 676 | HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 677 | /** |
| AnnaBridge | 172:65be27845400 | 678 | * @} |
| AnnaBridge | 172:65be27845400 | 679 | */ |
| AnnaBridge | 172:65be27845400 | 680 | |
| AnnaBridge | 172:65be27845400 | 681 | /** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
| AnnaBridge | 172:65be27845400 | 682 | * @{ |
| AnnaBridge | 172:65be27845400 | 683 | */ |
| AnnaBridge | 172:65be27845400 | 684 | /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */ |
| AnnaBridge | 172:65be27845400 | 685 | void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 686 | void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 687 | void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 688 | void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 689 | void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 690 | void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 691 | void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode); |
| AnnaBridge | 172:65be27845400 | 692 | void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 693 | void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 694 | |
| AnnaBridge | 172:65be27845400 | 695 | /** |
| AnnaBridge | 172:65be27845400 | 696 | * @} |
| AnnaBridge | 172:65be27845400 | 697 | */ |
| AnnaBridge | 172:65be27845400 | 698 | |
| AnnaBridge | 172:65be27845400 | 699 | /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions |
| AnnaBridge | 172:65be27845400 | 700 | * @{ |
| AnnaBridge | 172:65be27845400 | 701 | */ |
| AnnaBridge | 172:65be27845400 | 702 | |
| AnnaBridge | 172:65be27845400 | 703 | /* Peripheral State and Errors functions **************************************************/ |
| AnnaBridge | 172:65be27845400 | 704 | uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 705 | uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus); |
| AnnaBridge | 172:65be27845400 | 706 | |
| AnnaBridge | 172:65be27845400 | 707 | /** |
| AnnaBridge | 172:65be27845400 | 708 | * @} |
| AnnaBridge | 172:65be27845400 | 709 | */ |
| AnnaBridge | 172:65be27845400 | 710 | |
| AnnaBridge | 172:65be27845400 | 711 | /** |
| AnnaBridge | 172:65be27845400 | 712 | * @} |
| AnnaBridge | 172:65be27845400 | 713 | */ |
| AnnaBridge | 172:65be27845400 | 714 | |
| AnnaBridge | 172:65be27845400 | 715 | /* Private Functions ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 716 | /** @defgroup SMBUS_Private_Functions SMBUS Private Functions |
| AnnaBridge | 172:65be27845400 | 717 | * @{ |
| AnnaBridge | 172:65be27845400 | 718 | */ |
| AnnaBridge | 172:65be27845400 | 719 | /* Private functions are defined in stm32h7xx_hal_smbus.c file */ |
| AnnaBridge | 172:65be27845400 | 720 | /** |
| AnnaBridge | 172:65be27845400 | 721 | * @} |
| AnnaBridge | 172:65be27845400 | 722 | */ |
| AnnaBridge | 172:65be27845400 | 723 | |
| AnnaBridge | 172:65be27845400 | 724 | /** |
| AnnaBridge | 172:65be27845400 | 725 | * @} |
| AnnaBridge | 172:65be27845400 | 726 | */ |
| AnnaBridge | 172:65be27845400 | 727 | |
| AnnaBridge | 172:65be27845400 | 728 | /** |
| AnnaBridge | 172:65be27845400 | 729 | * @} |
| AnnaBridge | 172:65be27845400 | 730 | */ |
| AnnaBridge | 172:65be27845400 | 731 | |
| AnnaBridge | 172:65be27845400 | 732 | /** |
| AnnaBridge | 172:65be27845400 | 733 | * @} |
| AnnaBridge | 172:65be27845400 | 734 | */ |
| AnnaBridge | 172:65be27845400 | 735 | |
| AnnaBridge | 172:65be27845400 | 736 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 737 | } |
| AnnaBridge | 172:65be27845400 | 738 | #endif |
| AnnaBridge | 172:65be27845400 | 739 | |
| AnnaBridge | 172:65be27845400 | 740 | |
| AnnaBridge | 172:65be27845400 | 741 | #endif /* STM32H7xx_HAL_SMBUS_H */ |
| AnnaBridge | 172:65be27845400 | 742 | |
| AnnaBridge | 172:65be27845400 | 743 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
