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TARGET_NUCLEO_H743ZI/TOOLCHAIN_GCC_ARM/stm32h7xx_hal_fdcan.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 172:65be27845400 | 1 | /** |
| AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_fdcan.h |
| AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
| AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of FDCAN HAL module. |
| AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 7 | * @attention |
| AnnaBridge | 172:65be27845400 | 8 | * |
| AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
| AnnaBridge | 172:65be27845400 | 11 | * |
| AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
| AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
| AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
| AnnaBridge | 172:65be27845400 | 16 | * |
| AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 18 | */ |
| AnnaBridge | 172:65be27845400 | 19 | |
| AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_FDCAN_H |
| AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_FDCAN_H |
| AnnaBridge | 172:65be27845400 | 23 | |
| AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
| AnnaBridge | 172:65be27845400 | 26 | #endif |
| AnnaBridge | 172:65be27845400 | 27 | |
| AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
| AnnaBridge | 172:65be27845400 | 30 | |
| AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
| AnnaBridge | 172:65be27845400 | 32 | * @{ |
| AnnaBridge | 172:65be27845400 | 33 | */ |
| AnnaBridge | 172:65be27845400 | 34 | |
| AnnaBridge | 172:65be27845400 | 35 | /** @addtogroup FDCAN |
| AnnaBridge | 172:65be27845400 | 36 | * @{ |
| AnnaBridge | 172:65be27845400 | 37 | */ |
| AnnaBridge | 172:65be27845400 | 38 | |
| AnnaBridge | 172:65be27845400 | 39 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 40 | /** @defgroup FDCAN_Exported_Types FDCAN Exported Types |
| AnnaBridge | 172:65be27845400 | 41 | * @{ |
| AnnaBridge | 172:65be27845400 | 42 | */ |
| AnnaBridge | 172:65be27845400 | 43 | |
| AnnaBridge | 172:65be27845400 | 44 | /** |
| AnnaBridge | 172:65be27845400 | 45 | * @brief HAL State structures definition |
| AnnaBridge | 172:65be27845400 | 46 | */ |
| AnnaBridge | 172:65be27845400 | 47 | typedef enum |
| AnnaBridge | 172:65be27845400 | 48 | { |
| AnnaBridge | 172:65be27845400 | 49 | HAL_FDCAN_STATE_RESET = 0x00U, /*!< FDCAN not yet initialized or disabled */ |
| AnnaBridge | 172:65be27845400 | 50 | HAL_FDCAN_STATE_READY = 0x01U, /*!< FDCAN initialized and ready for use */ |
| AnnaBridge | 172:65be27845400 | 51 | HAL_FDCAN_STATE_BUSY = 0x02U, /*!< FDCAN process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 52 | HAL_FDCAN_STATE_ERROR = 0x03U /*!< FDCAN error state */ |
| AnnaBridge | 172:65be27845400 | 53 | } HAL_FDCAN_StateTypeDef; |
| AnnaBridge | 172:65be27845400 | 54 | |
| AnnaBridge | 172:65be27845400 | 55 | /** |
| AnnaBridge | 172:65be27845400 | 56 | * @brief FDCAN Init structure definition |
| AnnaBridge | 172:65be27845400 | 57 | */ |
| AnnaBridge | 172:65be27845400 | 58 | typedef struct |
| AnnaBridge | 172:65be27845400 | 59 | { |
| AnnaBridge | 172:65be27845400 | 60 | uint32_t FrameFormat; /*!< Specifies the FDCAN frame format. |
| AnnaBridge | 172:65be27845400 | 61 | This parameter can be a value of @ref FDCAN_frame_format */ |
| AnnaBridge | 172:65be27845400 | 62 | |
| AnnaBridge | 172:65be27845400 | 63 | uint32_t Mode; /*!< Specifies the FDCAN mode. |
| AnnaBridge | 172:65be27845400 | 64 | This parameter can be a value of @ref FDCAN_operating_mode */ |
| AnnaBridge | 172:65be27845400 | 65 | |
| AnnaBridge | 172:65be27845400 | 66 | FunctionalState AutoRetransmission; /*!< Enable or disable the automatic retransmission mode. |
| AnnaBridge | 172:65be27845400 | 67 | This parameter can be set to ENABLE or DISABLE */ |
| AnnaBridge | 172:65be27845400 | 68 | |
| AnnaBridge | 172:65be27845400 | 69 | FunctionalState TransmitPause; /*!< Enable or disable the Transmit Pause feature. |
| AnnaBridge | 172:65be27845400 | 70 | This parameter can be set to ENABLE or DISABLE */ |
| AnnaBridge | 172:65be27845400 | 71 | |
| AnnaBridge | 172:65be27845400 | 72 | FunctionalState ProtocolException; /*!< Enable or disable the Protocol Exception Handling. |
| AnnaBridge | 172:65be27845400 | 73 | This parameter can be set to ENABLE or DISABLE */ |
| AnnaBridge | 172:65be27845400 | 74 | |
| AnnaBridge | 172:65be27845400 | 75 | uint32_t NominalPrescaler; /*!< Specifies the value by which the oscillator frequency is |
| AnnaBridge | 172:65be27845400 | 76 | divided for generating the nominal bit time quanta. |
| AnnaBridge | 172:65be27845400 | 77 | This parameter must be a number between 1 and 512 */ |
| AnnaBridge | 172:65be27845400 | 78 | |
| AnnaBridge | 172:65be27845400 | 79 | uint32_t NominalSyncJumpWidth; /*!< Specifies the maximum number of time quanta the FDCAN |
| AnnaBridge | 172:65be27845400 | 80 | hardware is allowed to lengthen or shorten a bit to perform |
| AnnaBridge | 172:65be27845400 | 81 | resynchronization. |
| AnnaBridge | 172:65be27845400 | 82 | This parameter must be a number between 1 and 128 */ |
| AnnaBridge | 172:65be27845400 | 83 | |
| AnnaBridge | 172:65be27845400 | 84 | uint32_t NominalTimeSeg1; /*!< Specifies the number of time quanta in Bit Segment 1. |
| AnnaBridge | 172:65be27845400 | 85 | This parameter must be a number between 2 and 256 */ |
| AnnaBridge | 172:65be27845400 | 86 | |
| AnnaBridge | 172:65be27845400 | 87 | uint32_t NominalTimeSeg2; /*!< Specifies the number of time quanta in Bit Segment 2. |
| AnnaBridge | 172:65be27845400 | 88 | This parameter must be a number between 2 and 128 */ |
| AnnaBridge | 172:65be27845400 | 89 | |
| AnnaBridge | 172:65be27845400 | 90 | uint32_t DataPrescaler; /*!< Specifies the value by which the oscillator frequency is |
| AnnaBridge | 172:65be27845400 | 91 | divided for generating the data bit time quanta. |
| AnnaBridge | 172:65be27845400 | 92 | This parameter must be a number between 1 and 32 */ |
| AnnaBridge | 172:65be27845400 | 93 | |
| AnnaBridge | 172:65be27845400 | 94 | uint32_t DataSyncJumpWidth; /*!< Specifies the maximum number of time quanta the FDCAN |
| AnnaBridge | 172:65be27845400 | 95 | hardware is allowed to lengthen or shorten a data bit to |
| AnnaBridge | 172:65be27845400 | 96 | perform resynchronization. |
| AnnaBridge | 172:65be27845400 | 97 | This parameter must be a number between 1 and 16 */ |
| AnnaBridge | 172:65be27845400 | 98 | |
| AnnaBridge | 172:65be27845400 | 99 | uint32_t DataTimeSeg1; /*!< Specifies the number of time quanta in Data Bit Segment 1. |
| AnnaBridge | 172:65be27845400 | 100 | This parameter must be a number between 1 and 32 */ |
| AnnaBridge | 172:65be27845400 | 101 | |
| AnnaBridge | 172:65be27845400 | 102 | uint32_t DataTimeSeg2; /*!< Specifies the number of time quanta in Data Bit Segment 2. |
| AnnaBridge | 172:65be27845400 | 103 | This parameter must be a number between 1 and 16 */ |
| AnnaBridge | 172:65be27845400 | 104 | |
| AnnaBridge | 172:65be27845400 | 105 | uint32_t MessageRAMOffset; /*!< Specifies the message RAM start address. |
| AnnaBridge | 172:65be27845400 | 106 | This parameter must be a number between 0 and 2560 */ |
| AnnaBridge | 172:65be27845400 | 107 | |
| AnnaBridge | 172:65be27845400 | 108 | uint32_t StdFiltersNbr; /*!< Specifies the number of standard Message ID filters. |
| AnnaBridge | 172:65be27845400 | 109 | This parameter must be a number between 0 and 128 */ |
| AnnaBridge | 172:65be27845400 | 110 | |
| AnnaBridge | 172:65be27845400 | 111 | uint32_t ExtFiltersNbr; /*!< Specifies the number of extended Message ID filters. |
| AnnaBridge | 172:65be27845400 | 112 | This parameter must be a number between 0 and 64 */ |
| AnnaBridge | 172:65be27845400 | 113 | |
| AnnaBridge | 172:65be27845400 | 114 | uint32_t RxFifo0ElmtsNbr; /*!< Specifies the number of Rx FIFO0 Elements. |
| AnnaBridge | 172:65be27845400 | 115 | This parameter must be a number between 0 and 64 */ |
| AnnaBridge | 172:65be27845400 | 116 | |
| AnnaBridge | 172:65be27845400 | 117 | uint32_t RxFifo0ElmtSize; /*!< Specifies the Data Field Size in an Rx FIFO 0 element. |
| AnnaBridge | 172:65be27845400 | 118 | This parameter can be a value of @ref FDCAN_data_field_size */ |
| AnnaBridge | 172:65be27845400 | 119 | |
| AnnaBridge | 172:65be27845400 | 120 | uint32_t RxFifo1ElmtsNbr; /*!< Specifies the number of Rx FIFO 1 Elements. |
| AnnaBridge | 172:65be27845400 | 121 | This parameter must be a number between 0 and 64 */ |
| AnnaBridge | 172:65be27845400 | 122 | |
| AnnaBridge | 172:65be27845400 | 123 | uint32_t RxFifo1ElmtSize; /*!< Specifies the Data Field Size in an Rx FIFO 1 element. |
| AnnaBridge | 172:65be27845400 | 124 | This parameter can be a value of @ref FDCAN_data_field_size */ |
| AnnaBridge | 172:65be27845400 | 125 | |
| AnnaBridge | 172:65be27845400 | 126 | uint32_t RxBuffersNbr; /*!< Specifies the number of Dedicated Rx Buffer elements. |
| AnnaBridge | 172:65be27845400 | 127 | This parameter must be a number between 0 and 64 */ |
| AnnaBridge | 172:65be27845400 | 128 | |
| AnnaBridge | 172:65be27845400 | 129 | uint32_t RxBufferSize; /*!< Specifies the Data Field Size in an Rx Buffer element. |
| AnnaBridge | 172:65be27845400 | 130 | This parameter can be a value of @ref FDCAN_data_field_size */ |
| AnnaBridge | 172:65be27845400 | 131 | |
| AnnaBridge | 172:65be27845400 | 132 | uint32_t TxEventsNbr; /*!< Specifies the number of Tx Event FIFO elements. |
| AnnaBridge | 172:65be27845400 | 133 | This parameter must be a number between 0 and 32 */ |
| AnnaBridge | 172:65be27845400 | 134 | |
| AnnaBridge | 172:65be27845400 | 135 | uint32_t TxBuffersNbr; /*!< Specifies the number of Dedicated Tx Buffers. |
| AnnaBridge | 172:65be27845400 | 136 | This parameter must be a number between 0 and 32 */ |
| AnnaBridge | 172:65be27845400 | 137 | |
| AnnaBridge | 172:65be27845400 | 138 | uint32_t TxFifoQueueElmtsNbr; /*!< Specifies the number of Tx Buffers used for Tx FIFO/Queue. |
| AnnaBridge | 172:65be27845400 | 139 | This parameter must be a number between 0 and 32 */ |
| AnnaBridge | 172:65be27845400 | 140 | |
| AnnaBridge | 172:65be27845400 | 141 | uint32_t TxFifoQueueMode; /*!< Tx FIFO/Queue Mode selection. |
| AnnaBridge | 172:65be27845400 | 142 | This parameter can be a value of @ref FDCAN_txFifoQueue_Mode */ |
| AnnaBridge | 172:65be27845400 | 143 | |
| AnnaBridge | 172:65be27845400 | 144 | uint32_t TxElmtSize; /*!< Specifies the Data Field Size in a Tx Element. |
| AnnaBridge | 172:65be27845400 | 145 | This parameter can be a value of @ref FDCAN_data_field_size */ |
| AnnaBridge | 172:65be27845400 | 146 | |
| AnnaBridge | 172:65be27845400 | 147 | } FDCAN_InitTypeDef; |
| AnnaBridge | 172:65be27845400 | 148 | |
| AnnaBridge | 172:65be27845400 | 149 | /** |
| AnnaBridge | 172:65be27845400 | 150 | * @brief FDCAN clock calibration unit structure definition |
| AnnaBridge | 172:65be27845400 | 151 | */ |
| AnnaBridge | 172:65be27845400 | 152 | typedef struct |
| AnnaBridge | 172:65be27845400 | 153 | { |
| AnnaBridge | 172:65be27845400 | 154 | uint32_t ClockCalibration; /*!< Enable or disable the clock calibration. |
| AnnaBridge | 172:65be27845400 | 155 | This parameter can be a value of @ref FDCAN_clock_calibration. */ |
| AnnaBridge | 172:65be27845400 | 156 | |
| AnnaBridge | 172:65be27845400 | 157 | uint32_t ClockDivider; /*!< Specifies the FDCAN kernel clock divider when the clock calibration |
| AnnaBridge | 172:65be27845400 | 158 | is bypassed. |
| AnnaBridge | 172:65be27845400 | 159 | This parameter can be a value of @ref FDCAN_clock_divider */ |
| AnnaBridge | 172:65be27845400 | 160 | |
| AnnaBridge | 172:65be27845400 | 161 | uint32_t MinOscClkPeriods; /*!< Configures the minimum number of periods in two CAN bit times. The |
| AnnaBridge | 172:65be27845400 | 162 | actual configured number of periods is MinOscClkPeriods x 32. |
| AnnaBridge | 172:65be27845400 | 163 | This parameter must be a number between 0x00 and 0xFF */ |
| AnnaBridge | 172:65be27845400 | 164 | |
| AnnaBridge | 172:65be27845400 | 165 | uint32_t CalFieldLength; /*!< Specifies the calibration field length. |
| AnnaBridge | 172:65be27845400 | 166 | This parameter can be a value of @ref FDCAN_calibration_field_length */ |
| AnnaBridge | 172:65be27845400 | 167 | |
| AnnaBridge | 172:65be27845400 | 168 | uint32_t TimeQuantaPerBitTime; /*!< Configures the number of time quanta per bit time. |
| AnnaBridge | 172:65be27845400 | 169 | This parameter must be a number between 4 and 25 */ |
| AnnaBridge | 172:65be27845400 | 170 | |
| AnnaBridge | 172:65be27845400 | 171 | uint32_t WatchdogStartValue; /*!< Start value of the Calibration Watchdog Counter. |
| AnnaBridge | 172:65be27845400 | 172 | If set to zero the counter is disabled. |
| AnnaBridge | 172:65be27845400 | 173 | This parameter must be a number between 0x0000 and 0xFFFF */ |
| AnnaBridge | 172:65be27845400 | 174 | |
| AnnaBridge | 172:65be27845400 | 175 | } FDCAN_ClkCalUnitTypeDef; |
| AnnaBridge | 172:65be27845400 | 176 | |
| AnnaBridge | 172:65be27845400 | 177 | /** |
| AnnaBridge | 172:65be27845400 | 178 | * @brief FDCAN filter structure definition |
| AnnaBridge | 172:65be27845400 | 179 | */ |
| AnnaBridge | 172:65be27845400 | 180 | typedef struct |
| AnnaBridge | 172:65be27845400 | 181 | { |
| AnnaBridge | 172:65be27845400 | 182 | uint32_t IdType; /*!< Specifies the identifier type. |
| AnnaBridge | 172:65be27845400 | 183 | This parameter can be a value of @ref FDCAN_id_type */ |
| AnnaBridge | 172:65be27845400 | 184 | |
| AnnaBridge | 172:65be27845400 | 185 | uint32_t FilterIndex; /*!< Specifies the filter which will be initialized. |
| AnnaBridge | 172:65be27845400 | 186 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 187 | - 0 and 127, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 188 | - 0 and 63, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 189 | |
| AnnaBridge | 172:65be27845400 | 190 | uint32_t FilterType; /*!< Specifies the filter type. |
| AnnaBridge | 172:65be27845400 | 191 | This parameter can be a value of @ref FDCAN_filter_type. |
| AnnaBridge | 172:65be27845400 | 192 | The value FDCAN_EXT_FILTER_RANGE_NO_EIDM is permitted |
| AnnaBridge | 172:65be27845400 | 193 | only when IdType is FDCAN_EXTENDED_ID. |
| AnnaBridge | 172:65be27845400 | 194 | This parameter is ignored if FilterConfig is set to |
| AnnaBridge | 172:65be27845400 | 195 | FDCAN_FILTER_TO_RXBUFFER */ |
| AnnaBridge | 172:65be27845400 | 196 | |
| AnnaBridge | 172:65be27845400 | 197 | uint32_t FilterConfig; /*!< Specifies the filter configuration. |
| AnnaBridge | 172:65be27845400 | 198 | This parameter can be a value of @ref FDCAN_filter_config */ |
| AnnaBridge | 172:65be27845400 | 199 | |
| AnnaBridge | 172:65be27845400 | 200 | uint32_t FilterID1; /*!< Specifies the filter identification 1. |
| AnnaBridge | 172:65be27845400 | 201 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 202 | - 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 203 | - 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 204 | |
| AnnaBridge | 172:65be27845400 | 205 | uint32_t FilterID2; /*!< Specifies the filter identification 2. |
| AnnaBridge | 172:65be27845400 | 206 | This parameter is ignored if FilterConfig is set to |
| AnnaBridge | 172:65be27845400 | 207 | FDCAN_FILTER_TO_RXBUFFER. |
| AnnaBridge | 172:65be27845400 | 208 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 209 | - 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 210 | - 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 211 | |
| AnnaBridge | 172:65be27845400 | 212 | uint32_t RxBufferIndex; /*!< Contains the index of the Rx buffer in which the |
| AnnaBridge | 172:65be27845400 | 213 | matching message will be stored. |
| AnnaBridge | 172:65be27845400 | 214 | This parameter must be a number between 0 and 63. |
| AnnaBridge | 172:65be27845400 | 215 | This parameter is ignored if FilterConfig is different |
| AnnaBridge | 172:65be27845400 | 216 | from FDCAN_FILTER_TO_RXBUFFER */ |
| AnnaBridge | 172:65be27845400 | 217 | |
| AnnaBridge | 172:65be27845400 | 218 | uint32_t IsCalibrationMsg; /*!< Specifies whether the filter is configured for |
| AnnaBridge | 172:65be27845400 | 219 | calibration messages. |
| AnnaBridge | 172:65be27845400 | 220 | This parameter is ignored if FilterConfig is different |
| AnnaBridge | 172:65be27845400 | 221 | from FDCAN_FILTER_TO_RXBUFFER. |
| AnnaBridge | 172:65be27845400 | 222 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 223 | - 0 : ordinary message |
| AnnaBridge | 172:65be27845400 | 224 | - 1 : calibration message */ |
| AnnaBridge | 172:65be27845400 | 225 | |
| AnnaBridge | 172:65be27845400 | 226 | } FDCAN_FilterTypeDef; |
| AnnaBridge | 172:65be27845400 | 227 | |
| AnnaBridge | 172:65be27845400 | 228 | /** |
| AnnaBridge | 172:65be27845400 | 229 | * @brief FDCAN Tx header structure definition |
| AnnaBridge | 172:65be27845400 | 230 | */ |
| AnnaBridge | 172:65be27845400 | 231 | typedef struct |
| AnnaBridge | 172:65be27845400 | 232 | { |
| AnnaBridge | 172:65be27845400 | 233 | uint32_t Identifier; /*!< Specifies the identifier. |
| AnnaBridge | 172:65be27845400 | 234 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 235 | - 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 236 | - 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 237 | |
| AnnaBridge | 172:65be27845400 | 238 | uint32_t IdType; /*!< Specifies the identifier type for the message that will be |
| AnnaBridge | 172:65be27845400 | 239 | transmitted. |
| AnnaBridge | 172:65be27845400 | 240 | This parameter can be a value of @ref FDCAN_id_type */ |
| AnnaBridge | 172:65be27845400 | 241 | |
| AnnaBridge | 172:65be27845400 | 242 | uint32_t TxFrameType; /*!< Specifies the frame type of the message that will be transmitted. |
| AnnaBridge | 172:65be27845400 | 243 | This parameter can be a value of @ref FDCAN_frame_type */ |
| AnnaBridge | 172:65be27845400 | 244 | |
| AnnaBridge | 172:65be27845400 | 245 | uint32_t DataLength; /*!< Specifies the length of the frame that will be transmitted. |
| AnnaBridge | 172:65be27845400 | 246 | This parameter can be a value of @ref FDCAN_data_length_code */ |
| AnnaBridge | 172:65be27845400 | 247 | |
| AnnaBridge | 172:65be27845400 | 248 | uint32_t ErrorStateIndicator; /*!< Specifies the error state indicator. |
| AnnaBridge | 172:65be27845400 | 249 | This parameter can be a value of @ref FDCAN_error_state_indicator */ |
| AnnaBridge | 172:65be27845400 | 250 | |
| AnnaBridge | 172:65be27845400 | 251 | uint32_t BitRateSwitch; /*!< Specifies whether the Tx frame will be transmitted with or without |
| AnnaBridge | 172:65be27845400 | 252 | bit rate switching. |
| AnnaBridge | 172:65be27845400 | 253 | This parameter can be a value of @ref FDCAN_bit_rate_switching */ |
| AnnaBridge | 172:65be27845400 | 254 | |
| AnnaBridge | 172:65be27845400 | 255 | uint32_t FDFormat; /*!< Specifies whether the Tx frame will be transmitted in classic or |
| AnnaBridge | 172:65be27845400 | 256 | FD format. |
| AnnaBridge | 172:65be27845400 | 257 | This parameter can be a value of @ref FDCAN_format */ |
| AnnaBridge | 172:65be27845400 | 258 | |
| AnnaBridge | 172:65be27845400 | 259 | uint32_t TxEventFifoControl; /*!< Specifies the event FIFO control. |
| AnnaBridge | 172:65be27845400 | 260 | This parameter can be a value of @ref FDCAN_EFC */ |
| AnnaBridge | 172:65be27845400 | 261 | |
| AnnaBridge | 172:65be27845400 | 262 | uint32_t MessageMarker; /*!< Specifies the message marker to be copied into Tx Event FIFO |
| AnnaBridge | 172:65be27845400 | 263 | element for identification of Tx message status. |
| AnnaBridge | 172:65be27845400 | 264 | This parameter must be a number between 0 and 0xFF */ |
| AnnaBridge | 172:65be27845400 | 265 | |
| AnnaBridge | 172:65be27845400 | 266 | } FDCAN_TxHeaderTypeDef; |
| AnnaBridge | 172:65be27845400 | 267 | |
| AnnaBridge | 172:65be27845400 | 268 | /** |
| AnnaBridge | 172:65be27845400 | 269 | * @brief FDCAN Rx header structure definition |
| AnnaBridge | 172:65be27845400 | 270 | */ |
| AnnaBridge | 172:65be27845400 | 271 | typedef struct |
| AnnaBridge | 172:65be27845400 | 272 | { |
| AnnaBridge | 172:65be27845400 | 273 | uint32_t Identifier; /*!< Specifies the identifier. |
| AnnaBridge | 172:65be27845400 | 274 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 275 | - 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 276 | - 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 277 | |
| AnnaBridge | 172:65be27845400 | 278 | uint32_t IdType; /*!< Specifies the identifier type of the received message. |
| AnnaBridge | 172:65be27845400 | 279 | This parameter can be a value of @ref FDCAN_id_type */ |
| AnnaBridge | 172:65be27845400 | 280 | |
| AnnaBridge | 172:65be27845400 | 281 | uint32_t RxFrameType; /*!< Specifies the the received message frame type. |
| AnnaBridge | 172:65be27845400 | 282 | This parameter can be a value of @ref FDCAN_frame_type */ |
| AnnaBridge | 172:65be27845400 | 283 | |
| AnnaBridge | 172:65be27845400 | 284 | uint32_t DataLength; /*!< Specifies the received frame length. |
| AnnaBridge | 172:65be27845400 | 285 | This parameter can be a value of @ref FDCAN_data_length_code */ |
| AnnaBridge | 172:65be27845400 | 286 | |
| AnnaBridge | 172:65be27845400 | 287 | uint32_t ErrorStateIndicator; /*!< Specifies the error state indicator. |
| AnnaBridge | 172:65be27845400 | 288 | This parameter can be a value of @ref FDCAN_error_state_indicator */ |
| AnnaBridge | 172:65be27845400 | 289 | |
| AnnaBridge | 172:65be27845400 | 290 | uint32_t BitRateSwitch; /*!< Specifies whether the Rx frame is received with or without bit |
| AnnaBridge | 172:65be27845400 | 291 | rate switching. |
| AnnaBridge | 172:65be27845400 | 292 | This parameter can be a value of @ref FDCAN_bit_rate_switching */ |
| AnnaBridge | 172:65be27845400 | 293 | |
| AnnaBridge | 172:65be27845400 | 294 | uint32_t FDFormat; /*!< Specifies whether the Rx frame is received in classic or FD |
| AnnaBridge | 172:65be27845400 | 295 | format. |
| AnnaBridge | 172:65be27845400 | 296 | This parameter can be a value of @ref FDCAN_format */ |
| AnnaBridge | 172:65be27845400 | 297 | |
| AnnaBridge | 172:65be27845400 | 298 | uint32_t RxTimestamp; /*!< Specifies the timestamp counter value captured on start of frame |
| AnnaBridge | 172:65be27845400 | 299 | reception. |
| AnnaBridge | 172:65be27845400 | 300 | This parameter must be a number between 0 and 0xFFFF */ |
| AnnaBridge | 172:65be27845400 | 301 | |
| AnnaBridge | 172:65be27845400 | 302 | uint32_t FilterIndex; /*!< Specifies the index of matching Rx acceptance filter element. |
| AnnaBridge | 172:65be27845400 | 303 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 304 | - 0 and 127, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 305 | - 0 and 63, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 306 | |
| AnnaBridge | 172:65be27845400 | 307 | uint32_t IsFilterMatchingFrame; /*!< Specifies whether the accepted frame did not match any Rx filter. |
| AnnaBridge | 172:65be27845400 | 308 | Acceptance of non-matching frames may be enabled via |
| AnnaBridge | 172:65be27845400 | 309 | HAL_FDCAN_ConfigGlobalFilter(). |
| AnnaBridge | 172:65be27845400 | 310 | This parameter can be 0 or 1 */ |
| AnnaBridge | 172:65be27845400 | 311 | |
| AnnaBridge | 172:65be27845400 | 312 | } FDCAN_RxHeaderTypeDef; |
| AnnaBridge | 172:65be27845400 | 313 | |
| AnnaBridge | 172:65be27845400 | 314 | /** |
| AnnaBridge | 172:65be27845400 | 315 | * @brief FDCAN Tx event FIFO structure definition |
| AnnaBridge | 172:65be27845400 | 316 | */ |
| AnnaBridge | 172:65be27845400 | 317 | typedef struct |
| AnnaBridge | 172:65be27845400 | 318 | { |
| AnnaBridge | 172:65be27845400 | 319 | uint32_t Identifier; /*!< Specifies the identifier. |
| AnnaBridge | 172:65be27845400 | 320 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 321 | - 0 and 0x7FF, if IdType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 322 | - 0 and 0x1FFFFFFF, if IdType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 323 | |
| AnnaBridge | 172:65be27845400 | 324 | uint32_t IdType; /*!< Specifies the identifier type for the transmitted message. |
| AnnaBridge | 172:65be27845400 | 325 | This parameter can be a value of @ref FDCAN_id_type */ |
| AnnaBridge | 172:65be27845400 | 326 | |
| AnnaBridge | 172:65be27845400 | 327 | uint32_t TxFrameType; /*!< Specifies the frame type of the transmitted message. |
| AnnaBridge | 172:65be27845400 | 328 | This parameter can be a value of @ref FDCAN_frame_type */ |
| AnnaBridge | 172:65be27845400 | 329 | |
| AnnaBridge | 172:65be27845400 | 330 | uint32_t DataLength; /*!< Specifies the length of the transmitted frame. |
| AnnaBridge | 172:65be27845400 | 331 | This parameter can be a value of @ref FDCAN_data_length_code */ |
| AnnaBridge | 172:65be27845400 | 332 | |
| AnnaBridge | 172:65be27845400 | 333 | uint32_t ErrorStateIndicator; /*!< Specifies the error state indicator. |
| AnnaBridge | 172:65be27845400 | 334 | This parameter can be a value of @ref FDCAN_error_state_indicator */ |
| AnnaBridge | 172:65be27845400 | 335 | |
| AnnaBridge | 172:65be27845400 | 336 | uint32_t BitRateSwitch; /*!< Specifies whether the Tx frame is transmitted with or without bit |
| AnnaBridge | 172:65be27845400 | 337 | rate switching. |
| AnnaBridge | 172:65be27845400 | 338 | This parameter can be a value of @ref FDCAN_bit_rate_switching */ |
| AnnaBridge | 172:65be27845400 | 339 | |
| AnnaBridge | 172:65be27845400 | 340 | uint32_t FDFormat; /*!< Specifies whether the Tx frame is transmitted in classic or FD |
| AnnaBridge | 172:65be27845400 | 341 | format. |
| AnnaBridge | 172:65be27845400 | 342 | This parameter can be a value of @ref FDCAN_format */ |
| AnnaBridge | 172:65be27845400 | 343 | |
| AnnaBridge | 172:65be27845400 | 344 | uint32_t TxTimestamp; /*!< Specifies the timestamp counter value captured on start of frame |
| AnnaBridge | 172:65be27845400 | 345 | transmission. |
| AnnaBridge | 172:65be27845400 | 346 | This parameter must be a number between 0 and 0xFFFF */ |
| AnnaBridge | 172:65be27845400 | 347 | |
| AnnaBridge | 172:65be27845400 | 348 | uint32_t MessageMarker; /*!< Specifies the message marker copied into Tx Event FIFO element |
| AnnaBridge | 172:65be27845400 | 349 | for identification of Tx message status. |
| AnnaBridge | 172:65be27845400 | 350 | This parameter must be a number between 0 and 0xFF */ |
| AnnaBridge | 172:65be27845400 | 351 | |
| AnnaBridge | 172:65be27845400 | 352 | uint32_t EventType; /*!< Specifies the event type. |
| AnnaBridge | 172:65be27845400 | 353 | This parameter can be a value of @ref FDCAN_event_type */ |
| AnnaBridge | 172:65be27845400 | 354 | |
| AnnaBridge | 172:65be27845400 | 355 | } FDCAN_TxEventFifoTypeDef; |
| AnnaBridge | 172:65be27845400 | 356 | |
| AnnaBridge | 172:65be27845400 | 357 | /** |
| AnnaBridge | 172:65be27845400 | 358 | * @brief FDCAN High Priority Message Status structure definition |
| AnnaBridge | 172:65be27845400 | 359 | */ |
| AnnaBridge | 172:65be27845400 | 360 | typedef struct |
| AnnaBridge | 172:65be27845400 | 361 | { |
| AnnaBridge | 172:65be27845400 | 362 | uint32_t FilterList; /*!< Specifies the filter list of the matching filter element. |
| AnnaBridge | 172:65be27845400 | 363 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 364 | - 0 : Standard Filter List |
| AnnaBridge | 172:65be27845400 | 365 | - 1 : Extended Filter List */ |
| AnnaBridge | 172:65be27845400 | 366 | |
| AnnaBridge | 172:65be27845400 | 367 | uint32_t FilterIndex; /*!< Specifies the index of matching filter element. |
| AnnaBridge | 172:65be27845400 | 368 | This parameter can be a number between: |
| AnnaBridge | 172:65be27845400 | 369 | - 0 and 127, if FilterList is 0 (Standard) |
| AnnaBridge | 172:65be27845400 | 370 | - 0 and 63, if FilterList is 1 (Extended) */ |
| AnnaBridge | 172:65be27845400 | 371 | |
| AnnaBridge | 172:65be27845400 | 372 | uint32_t MessageStorage; /*!< Specifies the HP Message Storage. |
| AnnaBridge | 172:65be27845400 | 373 | This parameter can be a value of @ref FDCAN_hp_msg_storage */ |
| AnnaBridge | 172:65be27845400 | 374 | |
| AnnaBridge | 172:65be27845400 | 375 | uint32_t MessageIndex; /*!< Specifies the Index of Rx FIFO element to which the |
| AnnaBridge | 172:65be27845400 | 376 | message was stored. |
| AnnaBridge | 172:65be27845400 | 377 | This parameter is valid only when MessageStorage is: |
| AnnaBridge | 172:65be27845400 | 378 | FDCAN_HP_STORAGE_RXFIFO0 |
| AnnaBridge | 172:65be27845400 | 379 | or |
| AnnaBridge | 172:65be27845400 | 380 | FDCAN_HP_STORAGE_RXFIFO1 */ |
| AnnaBridge | 172:65be27845400 | 381 | |
| AnnaBridge | 172:65be27845400 | 382 | } FDCAN_HpMsgStatusTypeDef; |
| AnnaBridge | 172:65be27845400 | 383 | |
| AnnaBridge | 172:65be27845400 | 384 | /** |
| AnnaBridge | 172:65be27845400 | 385 | * @brief FDCAN Protocol Status structure definition |
| AnnaBridge | 172:65be27845400 | 386 | */ |
| AnnaBridge | 172:65be27845400 | 387 | typedef struct |
| AnnaBridge | 172:65be27845400 | 388 | { |
| AnnaBridge | 172:65be27845400 | 389 | uint32_t LastErrorCode; /*!< Specifies the type of the last error that occurred on the FDCAN bus. |
| AnnaBridge | 172:65be27845400 | 390 | This parameter can be a value of @ref FDCAN_protocol_error_code */ |
| AnnaBridge | 172:65be27845400 | 391 | |
| AnnaBridge | 172:65be27845400 | 392 | uint32_t DataLastErrorCode; /*!< Specifies the type of the last error that occurred in the data phase of a CAN FD format |
| AnnaBridge | 172:65be27845400 | 393 | frame with its BRS flag set. |
| AnnaBridge | 172:65be27845400 | 394 | This parameter can be a value of @ref FDCAN_protocol_error_code */ |
| AnnaBridge | 172:65be27845400 | 395 | |
| AnnaBridge | 172:65be27845400 | 396 | uint32_t Activity; /*!< Specifies the FDCAN module communication state. |
| AnnaBridge | 172:65be27845400 | 397 | This parameter can be a value of @ref FDCAN_communication_state */ |
| AnnaBridge | 172:65be27845400 | 398 | |
| AnnaBridge | 172:65be27845400 | 399 | uint32_t ErrorPassive; /*!< Specifies the FDCAN module error status. |
| AnnaBridge | 172:65be27845400 | 400 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 401 | - 0 : The FDCAN is in Error_Active state |
| AnnaBridge | 172:65be27845400 | 402 | - 1 : The FDCAN is in Error_Passive state */ |
| AnnaBridge | 172:65be27845400 | 403 | |
| AnnaBridge | 172:65be27845400 | 404 | uint32_t Warning; /*!< Specifies the FDCAN module warning status. |
| AnnaBridge | 172:65be27845400 | 405 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 406 | - 0 : error counters (RxErrorCnt and TxErrorCnt) are below the Error_Warning limit of 96 |
| AnnaBridge | 172:65be27845400 | 407 | - 1 : at least one of error counters has reached the Error_Warning limit of 96 */ |
| AnnaBridge | 172:65be27845400 | 408 | |
| AnnaBridge | 172:65be27845400 | 409 | uint32_t BusOff; /*!< Specifies the FDCAN module Bus_Off status. |
| AnnaBridge | 172:65be27845400 | 410 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 411 | - 0 : The FDCAN is not in Bus_Off state |
| AnnaBridge | 172:65be27845400 | 412 | - 1 : The FDCAN is in Bus_Off state */ |
| AnnaBridge | 172:65be27845400 | 413 | |
| AnnaBridge | 172:65be27845400 | 414 | uint32_t RxESIflag; /*!< Specifies ESI flag of last received CAN FD message. |
| AnnaBridge | 172:65be27845400 | 415 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 416 | - 0 : Last received CAN FD message did not have its ESI flag set |
| AnnaBridge | 172:65be27845400 | 417 | - 1 : Last received CAN FD message had its ESI flag set */ |
| AnnaBridge | 172:65be27845400 | 418 | |
| AnnaBridge | 172:65be27845400 | 419 | uint32_t RxBRSflag; /*!< Specifies BRS flag of last received CAN FD message. |
| AnnaBridge | 172:65be27845400 | 420 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 421 | - 0 : Last received CAN FD message did not have its BRS flag set |
| AnnaBridge | 172:65be27845400 | 422 | - 1 : Last received CAN FD message had its BRS flag set */ |
| AnnaBridge | 172:65be27845400 | 423 | |
| AnnaBridge | 172:65be27845400 | 424 | uint32_t RxFDFflag; /*!< Specifies if CAN FD message (FDF flag set) has been received since last protocol status. |
| AnnaBridge | 172:65be27845400 | 425 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 426 | - 0 : no CAN FD message received |
| AnnaBridge | 172:65be27845400 | 427 | - 1 : CAN FD message received */ |
| AnnaBridge | 172:65be27845400 | 428 | |
| AnnaBridge | 172:65be27845400 | 429 | uint32_t ProtocolException; /*!< Specifies the FDCAN module Protocol Exception status. |
| AnnaBridge | 172:65be27845400 | 430 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 431 | - 0 : No protocol exception event occurred since last read access |
| AnnaBridge | 172:65be27845400 | 432 | - 1 : Protocol exception event occurred */ |
| AnnaBridge | 172:65be27845400 | 433 | |
| AnnaBridge | 172:65be27845400 | 434 | uint32_t TDCvalue; /*!< Specifies the Transmitter Delay Compensation Value. |
| AnnaBridge | 172:65be27845400 | 435 | This parameter can be a number between 0 and 127 */ |
| AnnaBridge | 172:65be27845400 | 436 | |
| AnnaBridge | 172:65be27845400 | 437 | } FDCAN_ProtocolStatusTypeDef; |
| AnnaBridge | 172:65be27845400 | 438 | |
| AnnaBridge | 172:65be27845400 | 439 | /** |
| AnnaBridge | 172:65be27845400 | 440 | * @brief FDCAN Error Counters structure definition |
| AnnaBridge | 172:65be27845400 | 441 | */ |
| AnnaBridge | 172:65be27845400 | 442 | typedef struct |
| AnnaBridge | 172:65be27845400 | 443 | { |
| AnnaBridge | 172:65be27845400 | 444 | uint32_t TxErrorCnt; /*!< Specifies the Transmit Error Counter Value. |
| AnnaBridge | 172:65be27845400 | 445 | This parameter can be a number between 0 and 255 */ |
| AnnaBridge | 172:65be27845400 | 446 | |
| AnnaBridge | 172:65be27845400 | 447 | uint32_t RxErrorCnt; /*!< Specifies the Receive Error Counter Value. |
| AnnaBridge | 172:65be27845400 | 448 | This parameter can be a number between 0 and 127 */ |
| AnnaBridge | 172:65be27845400 | 449 | |
| AnnaBridge | 172:65be27845400 | 450 | uint32_t RxErrorPassive; /*!< Specifies the Receive Error Passive status. |
| AnnaBridge | 172:65be27845400 | 451 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 452 | - 0 : The Receive Error Counter (RxErrorCnt) is below the error passive level of 128 |
| AnnaBridge | 172:65be27845400 | 453 | - 1 : The Receive Error Counter (RxErrorCnt) has reached the error passive level of 128 */ |
| AnnaBridge | 172:65be27845400 | 454 | |
| AnnaBridge | 172:65be27845400 | 455 | uint32_t ErrorLogging; /*!< Specifies the Transmit/Receive error logging counter value. |
| AnnaBridge | 172:65be27845400 | 456 | This parameter can be a number between 0 and 255. |
| AnnaBridge | 172:65be27845400 | 457 | This counter is incremented each time when a FDCAN protocol error causes the TxErrorCnt |
| AnnaBridge | 172:65be27845400 | 458 | or the RxErrorCnt to be incremented. The counter stops at 255; the next increment of |
| AnnaBridge | 172:65be27845400 | 459 | TxErrorCnt or RxErrorCnt sets interrupt flag FDCAN_FLAG_ERROR_LOGGING_OVERFLOW */ |
| AnnaBridge | 172:65be27845400 | 460 | |
| AnnaBridge | 172:65be27845400 | 461 | } FDCAN_ErrorCountersTypeDef; |
| AnnaBridge | 172:65be27845400 | 462 | |
| AnnaBridge | 172:65be27845400 | 463 | /** |
| AnnaBridge | 172:65be27845400 | 464 | * @brief FDCAN TT Init structure definition |
| AnnaBridge | 172:65be27845400 | 465 | */ |
| AnnaBridge | 172:65be27845400 | 466 | typedef struct |
| AnnaBridge | 172:65be27845400 | 467 | { |
| AnnaBridge | 172:65be27845400 | 468 | uint32_t OperationMode; /*!< Specifies the FDCAN Operation Mode. |
| AnnaBridge | 172:65be27845400 | 469 | This parameter can be a value of @ref FDCAN_operation_mode */ |
| AnnaBridge | 172:65be27845400 | 470 | |
| AnnaBridge | 172:65be27845400 | 471 | uint32_t GapEnable; /*!< Specifies the FDCAN TT Operation. |
| AnnaBridge | 172:65be27845400 | 472 | This parameter can be a value of @ref FDCAN_TT_operation. |
| AnnaBridge | 172:65be27845400 | 473 | This parameter is ignored if OperationMode is set to |
| AnnaBridge | 172:65be27845400 | 474 | FDCAN_TT_COMMUNICATION_LEVEL0 */ |
| AnnaBridge | 172:65be27845400 | 475 | |
| AnnaBridge | 172:65be27845400 | 476 | uint32_t TimeMaster; /*!< Specifies whether the instance is a slave or a potential master. |
| AnnaBridge | 172:65be27845400 | 477 | This parameter can be a value of @ref FDCAN_TT_time_master */ |
| AnnaBridge | 172:65be27845400 | 478 | |
| AnnaBridge | 172:65be27845400 | 479 | uint32_t SyncDevLimit; /*!< Specifies the Synchronization Deviation Limit SDL of the TUR |
| AnnaBridge | 172:65be27845400 | 480 | numerator : TUR = (Numerator ± SDL) / Denominator. |
| AnnaBridge | 172:65be27845400 | 481 | With : SDL = 2^(SyncDevLimit+5). |
| AnnaBridge | 172:65be27845400 | 482 | This parameter must be a number between 0 and 7 */ |
| AnnaBridge | 172:65be27845400 | 483 | |
| AnnaBridge | 172:65be27845400 | 484 | uint32_t InitRefTrigOffset; /*!< Specifies the Initial Reference Trigger Offset. |
| AnnaBridge | 172:65be27845400 | 485 | This parameter must be a number between 0 and 127 */ |
| AnnaBridge | 172:65be27845400 | 486 | |
| AnnaBridge | 172:65be27845400 | 487 | uint32_t ExternalClkSync; /*!< Enable or disable External Clock Synchronization. |
| AnnaBridge | 172:65be27845400 | 488 | This parameter can be a value of @ref FDCAN_TT_external_clk_sync. |
| AnnaBridge | 172:65be27845400 | 489 | This parameter is ignored if OperationMode is set to |
| AnnaBridge | 172:65be27845400 | 490 | FDCAN_TT_COMMUNICATION_LEVEL1 */ |
| AnnaBridge | 172:65be27845400 | 491 | |
| AnnaBridge | 172:65be27845400 | 492 | uint32_t AppWdgLimit; /*!< Specifies the Application Watchdog Limit : maximum time after |
| AnnaBridge | 172:65be27845400 | 493 | which the application has to serve the application watchdog. |
| AnnaBridge | 172:65be27845400 | 494 | The application watchdog is incremented once each 256 NTUs. |
| AnnaBridge | 172:65be27845400 | 495 | The application watchdog can be disabled by setting AppWdgLimit to 0. |
| AnnaBridge | 172:65be27845400 | 496 | This parameter must be a number between 0 and 255. |
| AnnaBridge | 172:65be27845400 | 497 | This parameter is ignored if OperationMode is set to |
| AnnaBridge | 172:65be27845400 | 498 | FDCAN_TT_COMMUNICATION_LEVEL0 */ |
| AnnaBridge | 172:65be27845400 | 499 | |
| AnnaBridge | 172:65be27845400 | 500 | uint32_t GlobalTimeFilter; /*!< Enable or disable Global Time Filtering. |
| AnnaBridge | 172:65be27845400 | 501 | This parameter can be a value of @ref FDCAN_TT_global_time_filtering. |
| AnnaBridge | 172:65be27845400 | 502 | This parameter is ignored if OperationMode is set to |
| AnnaBridge | 172:65be27845400 | 503 | FDCAN_TT_COMMUNICATION_LEVEL1 */ |
| AnnaBridge | 172:65be27845400 | 504 | |
| AnnaBridge | 172:65be27845400 | 505 | uint32_t ClockCalibration; /*!< Enable or disable Automatic Clock Calibration. |
| AnnaBridge | 172:65be27845400 | 506 | This parameter can be a value of @ref FDCAN_TT_auto_clk_calibration. |
| AnnaBridge | 172:65be27845400 | 507 | This parameter is ignored if OperationMode is set to |
| AnnaBridge | 172:65be27845400 | 508 | FDCAN_TT_COMMUNICATION_LEVEL1 */ |
| AnnaBridge | 172:65be27845400 | 509 | |
| AnnaBridge | 172:65be27845400 | 510 | uint32_t EvtTrigPolarity; /*!< Specifies the Event Trigger Polarity. |
| AnnaBridge | 172:65be27845400 | 511 | This parameter can be a value of @ref FDCAN_TT_event_trig_polarity. |
| AnnaBridge | 172:65be27845400 | 512 | This parameter is ignored if OperationMode is set to |
| AnnaBridge | 172:65be27845400 | 513 | FDCAN_TT_COMMUNICATION_LEVEL0 */ |
| AnnaBridge | 172:65be27845400 | 514 | |
| AnnaBridge | 172:65be27845400 | 515 | uint32_t BasicCyclesNbr; /*!< Specifies the nubmer of basic cycles in the system matrix. |
| AnnaBridge | 172:65be27845400 | 516 | This parameter can be a value of @ref FDCAN_TT_basic_cycle_number */ |
| AnnaBridge | 172:65be27845400 | 517 | |
| AnnaBridge | 172:65be27845400 | 518 | uint32_t CycleStartSync; /*!< Enable or disable synchronization pulse output at pin fdcan1_soc. |
| AnnaBridge | 172:65be27845400 | 519 | This parameter can be a value of @ref FDCAN_TT_cycle_start_sync */ |
| AnnaBridge | 172:65be27845400 | 520 | |
| AnnaBridge | 172:65be27845400 | 521 | uint32_t TxEnableWindow; /*!< Specifies the length of Tx enable window in NTUs. |
| AnnaBridge | 172:65be27845400 | 522 | This parameter must be a number between 1 and 16 */ |
| AnnaBridge | 172:65be27845400 | 523 | |
| AnnaBridge | 172:65be27845400 | 524 | uint32_t ExpTxTrigNbr; /*!< Specifies the number of expected Tx_Triggers in the system matrix. |
| AnnaBridge | 172:65be27845400 | 525 | This is the sum of Tx_Triggers for exclusive, single arbitrating and |
| AnnaBridge | 172:65be27845400 | 526 | merged arbitrating windows. |
| AnnaBridge | 172:65be27845400 | 527 | This parameter must be a number between 0 and 4095 */ |
| AnnaBridge | 172:65be27845400 | 528 | |
| AnnaBridge | 172:65be27845400 | 529 | uint32_t TURNumerator; /*!< Specifies the TUR (Time Unit Ratio) numerator. |
| AnnaBridge | 172:65be27845400 | 530 | It is adviced to set this parameter to the largest applicable value. |
| AnnaBridge | 172:65be27845400 | 531 | This parameter must be a number between 0x10000 and 0x1FFFF */ |
| AnnaBridge | 172:65be27845400 | 532 | |
| AnnaBridge | 172:65be27845400 | 533 | uint32_t TURDenominator; /*!< Specifies the TUR (Time Unit Ratio) denominator. |
| AnnaBridge | 172:65be27845400 | 534 | This parameter must be a number between 0x0001 and 0x3FFF */ |
| AnnaBridge | 172:65be27845400 | 535 | |
| AnnaBridge | 172:65be27845400 | 536 | uint32_t TriggerMemoryNbr; /*!< Specifies the number of trigger memory elements. |
| AnnaBridge | 172:65be27845400 | 537 | This parameter must be a number between 0 and 64 */ |
| AnnaBridge | 172:65be27845400 | 538 | |
| AnnaBridge | 172:65be27845400 | 539 | uint32_t StopWatchTrigSel; /*!< Specifies the input to be used as stop watch trigger. |
| AnnaBridge | 172:65be27845400 | 540 | This parameter can be a value of @ref FDCAN_TT_stop_watch_trig_selection */ |
| AnnaBridge | 172:65be27845400 | 541 | |
| AnnaBridge | 172:65be27845400 | 542 | uint32_t EventTrigSel; /*!< Specifies the input to be used as event trigger. |
| AnnaBridge | 172:65be27845400 | 543 | This parameter can be a value of @ref FDCAN_TT_event_trig_selection */ |
| AnnaBridge | 172:65be27845400 | 544 | |
| AnnaBridge | 172:65be27845400 | 545 | } FDCAN_TT_ConfigTypeDef; |
| AnnaBridge | 172:65be27845400 | 546 | |
| AnnaBridge | 172:65be27845400 | 547 | /** |
| AnnaBridge | 172:65be27845400 | 548 | * @brief FDCAN Trigger structure definition |
| AnnaBridge | 172:65be27845400 | 549 | */ |
| AnnaBridge | 172:65be27845400 | 550 | typedef struct |
| AnnaBridge | 172:65be27845400 | 551 | { |
| AnnaBridge | 172:65be27845400 | 552 | uint32_t TriggerIndex; /*!< Specifies the trigger which will be configured. |
| AnnaBridge | 172:65be27845400 | 553 | This parameter must be a number between 0 and 63 */ |
| AnnaBridge | 172:65be27845400 | 554 | |
| AnnaBridge | 172:65be27845400 | 555 | uint32_t TimeMark; /*!< Specifies the cycle time for which the trigger becomes active. |
| AnnaBridge | 172:65be27845400 | 556 | This parameter must be a number between 0 and 0xFFFF */ |
| AnnaBridge | 172:65be27845400 | 557 | |
| AnnaBridge | 172:65be27845400 | 558 | uint32_t RepeatFactor; /*!< Specifies the trigger repeat factor. |
| AnnaBridge | 172:65be27845400 | 559 | This parameter can be a value of @ref FDCAN_TT_Repeat_Factor */ |
| AnnaBridge | 172:65be27845400 | 560 | |
| AnnaBridge | 172:65be27845400 | 561 | uint32_t StartCycle; /*!< Specifies the index of the first cycle in which the trigger becomes active. |
| AnnaBridge | 172:65be27845400 | 562 | This parameter is ignored if RepeatFactor is set to FDCAN_TT_REPEAT_EVERY_CYCLE. |
| AnnaBridge | 172:65be27845400 | 563 | This parameter must be a number between 0 and RepeatFactor */ |
| AnnaBridge | 172:65be27845400 | 564 | |
| AnnaBridge | 172:65be27845400 | 565 | uint32_t TmEventInt; /*!< Enable or disable the internal time mark event. |
| AnnaBridge | 172:65be27845400 | 566 | If enabled, FDCAN_TT_FLAG_TRIG_TIME_MARK flag is set when trigger memory element |
| AnnaBridge | 172:65be27845400 | 567 | becomes active. |
| AnnaBridge | 172:65be27845400 | 568 | This parameter can be a value of @ref FDCAN_TT_Time_Mark_Event_Internal */ |
| AnnaBridge | 172:65be27845400 | 569 | |
| AnnaBridge | 172:65be27845400 | 570 | uint32_t TmEventExt; /*!< Enable or disable the external time mark event. |
| AnnaBridge | 172:65be27845400 | 571 | If enabled, and if TTOCN.TTIE is set, a pulse is generated at fdcan1_tmp when |
| AnnaBridge | 172:65be27845400 | 572 | trigger memory element becomes active. |
| AnnaBridge | 172:65be27845400 | 573 | This parameter can be a value of @ref FDCAN_TT_Time_Mark_Event_External */ |
| AnnaBridge | 172:65be27845400 | 574 | |
| AnnaBridge | 172:65be27845400 | 575 | uint32_t TriggerType; /*!< Specifies the trigger type. |
| AnnaBridge | 172:65be27845400 | 576 | This parameter can be a value of @ref FDCAN_TT_Trigger_Type */ |
| AnnaBridge | 172:65be27845400 | 577 | |
| AnnaBridge | 172:65be27845400 | 578 | uint32_t FilterType; /*!< Specifies the filter identifier type. |
| AnnaBridge | 172:65be27845400 | 579 | This parameter can be a value of @ref FDCAN_id_type */ |
| AnnaBridge | 172:65be27845400 | 580 | |
| AnnaBridge | 172:65be27845400 | 581 | uint32_t TxBufferIndex; /*!< Specifies the index of the Tx buffer for which the trigger is valid. |
| AnnaBridge | 172:65be27845400 | 582 | This parameter can be a value of @ref FDCAN_Tx_location. |
| AnnaBridge | 172:65be27845400 | 583 | This parameter is taken in consideration only if the trigger is configured for |
| AnnaBridge | 172:65be27845400 | 584 | transmission. */ |
| AnnaBridge | 172:65be27845400 | 585 | |
| AnnaBridge | 172:65be27845400 | 586 | uint32_t FilterIndex; /*!< Specifies the filter for which the trigger is valid. |
| AnnaBridge | 172:65be27845400 | 587 | This parameter is taken in consideration only if the trigger is configured for |
| AnnaBridge | 172:65be27845400 | 588 | reception. |
| AnnaBridge | 172:65be27845400 | 589 | This parameter must be a number between: |
| AnnaBridge | 172:65be27845400 | 590 | - 0 and 127, if FilterType is FDCAN_STANDARD_ID |
| AnnaBridge | 172:65be27845400 | 591 | - 0 and 63, if FilterType is FDCAN_EXTENDED_ID */ |
| AnnaBridge | 172:65be27845400 | 592 | |
| AnnaBridge | 172:65be27845400 | 593 | } FDCAN_TriggerTypeDef; |
| AnnaBridge | 172:65be27845400 | 594 | |
| AnnaBridge | 172:65be27845400 | 595 | /** |
| AnnaBridge | 172:65be27845400 | 596 | * @brief FDCAN TT Operation Status structure definition |
| AnnaBridge | 172:65be27845400 | 597 | */ |
| AnnaBridge | 172:65be27845400 | 598 | typedef struct |
| AnnaBridge | 172:65be27845400 | 599 | { |
| AnnaBridge | 172:65be27845400 | 600 | uint32_t ErrorLevel; /*!< Specifies the type of the TT operation error level. |
| AnnaBridge | 172:65be27845400 | 601 | This parameter can be a value of @ref FDCAN_TT_error_level */ |
| AnnaBridge | 172:65be27845400 | 602 | |
| AnnaBridge | 172:65be27845400 | 603 | uint32_t MasterState; /*!< Specifies the type of the TT master state. |
| AnnaBridge | 172:65be27845400 | 604 | This parameter can be a value of @ref FDCAN_TT_master_state */ |
| AnnaBridge | 172:65be27845400 | 605 | |
| AnnaBridge | 172:65be27845400 | 606 | uint32_t SyncState; /*!< Specifies the type of the TT synchronization state. |
| AnnaBridge | 172:65be27845400 | 607 | This parameter can be a value of @ref FDCAN_TT_sync_state */ |
| AnnaBridge | 172:65be27845400 | 608 | |
| AnnaBridge | 172:65be27845400 | 609 | uint32_t GTimeQuality; /*!< Specifies the Quality of Global Time Phase. |
| AnnaBridge | 172:65be27845400 | 610 | This parameter is only relevant in Level 0 and Level 2, otherwise fixed to 0. |
| AnnaBridge | 172:65be27845400 | 611 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 612 | - 0 : Global time not valid |
| AnnaBridge | 172:65be27845400 | 613 | - 1 : Global time in phase with Time Master */ |
| AnnaBridge | 172:65be27845400 | 614 | |
| AnnaBridge | 172:65be27845400 | 615 | uint32_t ClockQuality; /*!< Specifies the Quality of Clock Speed. |
| AnnaBridge | 172:65be27845400 | 616 | This parameter is only relevant in Level 0 and Level 2, otherwise fixed to 1. |
| AnnaBridge | 172:65be27845400 | 617 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 618 | - 0 : Local clock speed not synchronized to Time Master clock speed |
| AnnaBridge | 172:65be27845400 | 619 | - 1 : Synchronization Deviation = SDL */ |
| AnnaBridge | 172:65be27845400 | 620 | |
| AnnaBridge | 172:65be27845400 | 621 | uint32_t RefTrigOffset; /*!< Specifies the Actual Reference Trigger Offset Value. |
| AnnaBridge | 172:65be27845400 | 622 | This parameter can be a number between 0 and 0xFF */ |
| AnnaBridge | 172:65be27845400 | 623 | |
| AnnaBridge | 172:65be27845400 | 624 | uint32_t GTimeDiscPending; /*!< Specifies the Global Time Discontinuity State. |
| AnnaBridge | 172:65be27845400 | 625 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 626 | - 0 : No global time preset pending |
| AnnaBridge | 172:65be27845400 | 627 | - 1 : Node waits for the global time preset to take effect */ |
| AnnaBridge | 172:65be27845400 | 628 | |
| AnnaBridge | 172:65be27845400 | 629 | uint32_t GapFinished; /*!< Specifies whether a Gap is finished. |
| AnnaBridge | 172:65be27845400 | 630 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 631 | - 0 : Reset at the end of each reference message |
| AnnaBridge | 172:65be27845400 | 632 | - 1 : Gap finished */ |
| AnnaBridge | 172:65be27845400 | 633 | |
| AnnaBridge | 172:65be27845400 | 634 | uint32_t MasterPriority; /*!< Specifies the Priority of actual Time Master. |
| AnnaBridge | 172:65be27845400 | 635 | This parameter can be a number between 0 and 0x7 */ |
| AnnaBridge | 172:65be27845400 | 636 | |
| AnnaBridge | 172:65be27845400 | 637 | uint32_t GapStarted; /*!< Specifies whether a Gap is started. |
| AnnaBridge | 172:65be27845400 | 638 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 639 | - 0 : No Gap in schedule |
| AnnaBridge | 172:65be27845400 | 640 | - 1 : Gap time after Basic Cycle has started */ |
| AnnaBridge | 172:65be27845400 | 641 | |
| AnnaBridge | 172:65be27845400 | 642 | uint32_t WaitForEvt; /*!< Specifies whether a Gap is annouced. |
| AnnaBridge | 172:65be27845400 | 643 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 644 | - 0 : No Gap announced, reset by a reference message with Next_is_Gap = 0 |
| AnnaBridge | 172:65be27845400 | 645 | - 1 : Reference message with Next_is_Gap = 1 received */ |
| AnnaBridge | 172:65be27845400 | 646 | |
| AnnaBridge | 172:65be27845400 | 647 | uint32_t AppWdgEvt; /*!< Specifies the Application Watchdog State. |
| AnnaBridge | 172:65be27845400 | 648 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 649 | - 0 : Application Watchdog served in time |
| AnnaBridge | 172:65be27845400 | 650 | - 1 : Failed to serve Application Watchdog in time */ |
| AnnaBridge | 172:65be27845400 | 651 | |
| AnnaBridge | 172:65be27845400 | 652 | uint32_t ECSPending; /*!< Specifies the External Clock Synchronization State. |
| AnnaBridge | 172:65be27845400 | 653 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 654 | - 0 : No external clock synchronization pending |
| AnnaBridge | 172:65be27845400 | 655 | - 1 : Node waits for external clock synchronization to take effect */ |
| AnnaBridge | 172:65be27845400 | 656 | |
| AnnaBridge | 172:65be27845400 | 657 | uint32_t PhaseLock; /*!< Specifies the Phase Lock State. |
| AnnaBridge | 172:65be27845400 | 658 | This parameter can be: |
| AnnaBridge | 172:65be27845400 | 659 | - 0 : Phase outside range |
| AnnaBridge | 172:65be27845400 | 660 | - 1 : Phase inside range */ |
| AnnaBridge | 172:65be27845400 | 661 | |
| AnnaBridge | 172:65be27845400 | 662 | } FDCAN_TTOperationStatusTypeDef; |
| AnnaBridge | 172:65be27845400 | 663 | |
| AnnaBridge | 172:65be27845400 | 664 | /** |
| AnnaBridge | 172:65be27845400 | 665 | * @brief FDCAN Message RAM blocks |
| AnnaBridge | 172:65be27845400 | 666 | */ |
| AnnaBridge | 172:65be27845400 | 667 | typedef struct |
| AnnaBridge | 172:65be27845400 | 668 | { |
| AnnaBridge | 172:65be27845400 | 669 | uint32_t StandardFilterSA; /*!< Specifies the Standard Filter List Start Address. |
| AnnaBridge | 172:65be27845400 | 670 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 671 | |
| AnnaBridge | 172:65be27845400 | 672 | uint32_t ExtendedFilterSA; /*!< Specifies the Extended Filter List Start Address. |
| AnnaBridge | 172:65be27845400 | 673 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 674 | |
| AnnaBridge | 172:65be27845400 | 675 | uint32_t RxFIFO0SA; /*!< Specifies the Rx FIFO 0 Start Address. |
| AnnaBridge | 172:65be27845400 | 676 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 677 | |
| AnnaBridge | 172:65be27845400 | 678 | uint32_t RxFIFO1SA; /*!< Specifies the Rx FIFO 1 Start Address. |
| AnnaBridge | 172:65be27845400 | 679 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 680 | |
| AnnaBridge | 172:65be27845400 | 681 | uint32_t RxBufferSA; /*!< Specifies the Rx Buffer Start Address. |
| AnnaBridge | 172:65be27845400 | 682 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 683 | |
| AnnaBridge | 172:65be27845400 | 684 | uint32_t TxEventFIFOSA; /*!< Specifies the Tx Event FIFO Start Address. |
| AnnaBridge | 172:65be27845400 | 685 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 686 | |
| AnnaBridge | 172:65be27845400 | 687 | uint32_t TxBufferSA; /*!< Specifies the Tx Buffers Start Address. |
| AnnaBridge | 172:65be27845400 | 688 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 689 | |
| AnnaBridge | 172:65be27845400 | 690 | uint32_t TxFIFOQSA; /*!< Specifies the Tx FIFO/Queue Start Address. |
| AnnaBridge | 172:65be27845400 | 691 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 692 | |
| AnnaBridge | 172:65be27845400 | 693 | uint32_t TTMemorySA; /*!< Specifies the Trigger Memory Start Address. |
| AnnaBridge | 172:65be27845400 | 694 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 695 | |
| AnnaBridge | 172:65be27845400 | 696 | uint32_t EndAddress; /*!< Specifies the End Address of the allocated RAM. |
| AnnaBridge | 172:65be27845400 | 697 | This parameter must be a 32-bit word address */ |
| AnnaBridge | 172:65be27845400 | 698 | |
| AnnaBridge | 172:65be27845400 | 699 | } FDCAN_MsgRamAddressTypeDef; |
| AnnaBridge | 172:65be27845400 | 700 | |
| AnnaBridge | 172:65be27845400 | 701 | /** |
| AnnaBridge | 172:65be27845400 | 702 | * @brief FDCAN handle structure definition |
| AnnaBridge | 172:65be27845400 | 703 | */ |
| AnnaBridge | 172:65be27845400 | 704 | #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 |
| AnnaBridge | 172:65be27845400 | 705 | typedef struct __FDCAN_HandleTypeDef |
| AnnaBridge | 172:65be27845400 | 706 | #else |
| AnnaBridge | 172:65be27845400 | 707 | typedef struct |
| AnnaBridge | 172:65be27845400 | 708 | #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 709 | { |
| AnnaBridge | 172:65be27845400 | 710 | FDCAN_GlobalTypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 172:65be27845400 | 711 | |
| AnnaBridge | 172:65be27845400 | 712 | TTCAN_TypeDef *ttcan; /*!< TT register base address */ |
| AnnaBridge | 172:65be27845400 | 713 | |
| AnnaBridge | 172:65be27845400 | 714 | FDCAN_InitTypeDef Init; /*!< FDCAN required parameters */ |
| AnnaBridge | 172:65be27845400 | 715 | |
| AnnaBridge | 172:65be27845400 | 716 | FDCAN_MsgRamAddressTypeDef msgRam; /*!< FDCAN Message RAM blocks */ |
| AnnaBridge | 172:65be27845400 | 717 | |
| AnnaBridge | 172:65be27845400 | 718 | uint32_t LatestTxFifoQRequest; /*!< FDCAN Tx buffer index |
| AnnaBridge | 172:65be27845400 | 719 | of latest Tx FIFO/Queue request */ |
| AnnaBridge | 172:65be27845400 | 720 | |
| AnnaBridge | 172:65be27845400 | 721 | __IO HAL_FDCAN_StateTypeDef State; /*!< FDCAN communication state */ |
| AnnaBridge | 172:65be27845400 | 722 | |
| AnnaBridge | 172:65be27845400 | 723 | HAL_LockTypeDef Lock; /*!< FDCAN locking object */ |
| AnnaBridge | 172:65be27845400 | 724 | |
| AnnaBridge | 172:65be27845400 | 725 | __IO uint32_t ErrorCode; /*!< FDCAN Error code */ |
| AnnaBridge | 172:65be27845400 | 726 | |
| AnnaBridge | 172:65be27845400 | 727 | #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 |
| AnnaBridge | 172:65be27845400 | 728 | void (* ClockCalibrationCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs); /*!< FDCAN Clock Calibration callback */ |
| AnnaBridge | 172:65be27845400 | 729 | void (* TxEventFifoCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs); /*!< FDCAN Tx Event Fifo callback */ |
| AnnaBridge | 172:65be27845400 | 730 | void (* RxFifo0Callback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs); /*!< FDCAN Rx Fifo 0 callback */ |
| AnnaBridge | 172:65be27845400 | 731 | void (* RxFifo1Callback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs); /*!< FDCAN Rx Fifo 1 callback */ |
| AnnaBridge | 172:65be27845400 | 732 | void (* TxFifoEmptyCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Tx Fifo Empty callback */ |
| AnnaBridge | 172:65be27845400 | 733 | void (* TxBufferCompleteCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes); /*!< FDCAN Tx Buffer complete callback */ |
| AnnaBridge | 172:65be27845400 | 734 | void (* TxBufferAbortCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes); /*!< FDCAN Tx Buffer abort callback */ |
| AnnaBridge | 172:65be27845400 | 735 | void (* RxBufferNewMessageCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Rx Buffer New Message callback */ |
| AnnaBridge | 172:65be27845400 | 736 | void (* HighPriorityMessageCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN High priority message callback */ |
| AnnaBridge | 172:65be27845400 | 737 | void (* TimestampWraparoundCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Timestamp wraparound callback */ |
| AnnaBridge | 172:65be27845400 | 738 | void (* TimeoutOccurredCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Timeout occurred callback */ |
| AnnaBridge | 172:65be27845400 | 739 | void (* ErrorCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Error callback */ |
| AnnaBridge | 172:65be27845400 | 740 | void (* ErrorStatusCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs); /*!< FDCAN Error status callback */ |
| AnnaBridge | 172:65be27845400 | 741 | void (* TT_ScheduleSyncCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs); /*!< FDCAN T Schedule Synchronization callback */ |
| AnnaBridge | 172:65be27845400 | 742 | void (* TT_TimeMarkCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs); /*!< FDCAN TT Time Mark callback */ |
| AnnaBridge | 172:65be27845400 | 743 | void (* TT_StopWatchCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount); /*!< FDCAN TT Stop Watch callback */ |
| AnnaBridge | 172:65be27845400 | 744 | void (* TT_GlobalTimeCallback)(struct __FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs); /*!< FDCAN TT Global Time callback */ |
| AnnaBridge | 172:65be27845400 | 745 | |
| AnnaBridge | 172:65be27845400 | 746 | void (* MspInitCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Msp Init callback */ |
| AnnaBridge | 172:65be27845400 | 747 | void (* MspDeInitCallback)(struct __FDCAN_HandleTypeDef *hfdcan); /*!< FDCAN Msp DeInit callback */ |
| AnnaBridge | 172:65be27845400 | 748 | #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 749 | |
| AnnaBridge | 172:65be27845400 | 750 | } FDCAN_HandleTypeDef; |
| AnnaBridge | 172:65be27845400 | 751 | |
| AnnaBridge | 172:65be27845400 | 752 | #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 |
| AnnaBridge | 172:65be27845400 | 753 | /** |
| AnnaBridge | 172:65be27845400 | 754 | * @brief HAL FDCAN common Callback ID enumeration definition |
| AnnaBridge | 172:65be27845400 | 755 | */ |
| AnnaBridge | 172:65be27845400 | 756 | typedef enum |
| AnnaBridge | 172:65be27845400 | 757 | { |
| AnnaBridge | 172:65be27845400 | 758 | HAL_FDCAN_TX_FIFO_EMPTY_CB_ID = 0x00U, /*!< FDCAN Tx Fifo Empty callback ID */ |
| AnnaBridge | 172:65be27845400 | 759 | HAL_FDCAN_RX_BUFFER_NEW_MSG_CB_ID = 0x01U, /*!< FDCAN Rx buffer new message callback ID */ |
| AnnaBridge | 172:65be27845400 | 760 | HAL_FDCAN_HIGH_PRIO_MESSAGE_CB_ID = 0x02U, /*!< FDCAN High priority message callback ID */ |
| AnnaBridge | 172:65be27845400 | 761 | HAL_FDCAN_TIMESTAMP_WRAPAROUND_CB_ID = 0x03U, /*!< FDCAN Timestamp wraparound callback ID */ |
| AnnaBridge | 172:65be27845400 | 762 | HAL_FDCAN_TIMEOUT_OCCURRED_CB_ID = 0x04U, /*!< FDCAN Timeout occurred callback ID */ |
| AnnaBridge | 172:65be27845400 | 763 | HAL_FDCAN_ERROR_CALLBACK_CB_ID = 0x05U, /*!< FDCAN Error callback ID */ |
| AnnaBridge | 172:65be27845400 | 764 | |
| AnnaBridge | 172:65be27845400 | 765 | HAL_FDCAN_MSPINIT_CB_ID = 0x06U, /*!< FDCAN MspInit callback ID */ |
| AnnaBridge | 172:65be27845400 | 766 | HAL_FDCAN_MSPDEINIT_CB_ID = 0x07U, /*!< FDCAN MspDeInit callback ID */ |
| AnnaBridge | 172:65be27845400 | 767 | |
| AnnaBridge | 172:65be27845400 | 768 | } HAL_FDCAN_CallbackIDTypeDef; |
| AnnaBridge | 172:65be27845400 | 769 | |
| AnnaBridge | 172:65be27845400 | 770 | /** |
| AnnaBridge | 172:65be27845400 | 771 | * @brief HAL FDCAN Callback pointer definition |
| AnnaBridge | 172:65be27845400 | 772 | */ |
| AnnaBridge | 172:65be27845400 | 773 | typedef void (*pFDCAN_CallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan); /*!< pointer to a common FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 774 | typedef void (*pFDCAN_ClockCalibrationCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs); /*!< pointer to Clock Calibration FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 775 | typedef void (*pFDCAN_TxEventFifoCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs); /*!< pointer to Tx event Fifo FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 776 | typedef void (*pFDCAN_RxFifo0CallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs); /*!< pointer to Rx Fifo 0 FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 777 | typedef void (*pFDCAN_RxFifo1CallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs); /*!< pointer to Rx Fifo 1 FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 778 | typedef void (*pFDCAN_TxBufferCompleteCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes); /*!< pointer to Tx Buffer complete FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 779 | typedef void (*pFDCAN_TxBufferAbortCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes); /*!< pointer to Tx Buffer abort FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 780 | typedef void (*pFDCAN_ErrorStatusCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs); /*!< pointer to Error Status callback function */ |
| AnnaBridge | 172:65be27845400 | 781 | typedef void (*pFDCAN_TT_ScheduleSyncCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs); /*!< pointer to TT Schedule Synchronization FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 782 | typedef void (*pFDCAN_TT_TimeMarkCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs); /*!< pointer to TT Time Mark FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 783 | typedef void (*pFDCAN_TT_StopWatchCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount); /*!< pointer to TT Stop Watch FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 784 | typedef void (*pFDCAN_TT_GlobalTimeCallbackTypeDef)(FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs); /*!< pointer to TT Global Time FDCAN callback function */ |
| AnnaBridge | 172:65be27845400 | 785 | #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 786 | |
| AnnaBridge | 172:65be27845400 | 787 | /** |
| AnnaBridge | 172:65be27845400 | 788 | * @} |
| AnnaBridge | 172:65be27845400 | 789 | */ |
| AnnaBridge | 172:65be27845400 | 790 | |
| AnnaBridge | 172:65be27845400 | 791 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 792 | /** @defgroup FDCAN_Exported_Constants FDCAN Exported Constants |
| AnnaBridge | 172:65be27845400 | 793 | * @{ |
| AnnaBridge | 172:65be27845400 | 794 | */ |
| AnnaBridge | 172:65be27845400 | 795 | |
| AnnaBridge | 172:65be27845400 | 796 | /** @defgroup HAL_FDCAN_Error_Code HAL FDCAN Error Code |
| AnnaBridge | 172:65be27845400 | 797 | * @{ |
| AnnaBridge | 172:65be27845400 | 798 | */ |
| AnnaBridge | 172:65be27845400 | 799 | #define HAL_FDCAN_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ |
| AnnaBridge | 172:65be27845400 | 800 | #define HAL_FDCAN_ERROR_TIMEOUT ((uint32_t)0x00000001U) /*!< Timeout error */ |
| AnnaBridge | 172:65be27845400 | 801 | #define HAL_FDCAN_ERROR_NOT_INITIALIZED ((uint32_t)0x00000002U) /*!< Peripheral not initialized */ |
| AnnaBridge | 172:65be27845400 | 802 | #define HAL_FDCAN_ERROR_NOT_READY ((uint32_t)0x00000004U) /*!< Peripheral not ready */ |
| AnnaBridge | 172:65be27845400 | 803 | #define HAL_FDCAN_ERROR_NOT_STARTED ((uint32_t)0x00000008U) /*!< Peripheral not started */ |
| AnnaBridge | 172:65be27845400 | 804 | #define HAL_FDCAN_ERROR_NOT_SUPPORTED ((uint32_t)0x00000010U) /*!< Mode not supported */ |
| AnnaBridge | 172:65be27845400 | 805 | #define HAL_FDCAN_ERROR_PARAM ((uint32_t)0x00000020U) /*!< Parameter error */ |
| AnnaBridge | 172:65be27845400 | 806 | #define HAL_FDCAN_ERROR_PENDING ((uint32_t)0x00000040U) /*!< Pending operation */ |
| AnnaBridge | 172:65be27845400 | 807 | #define HAL_FDCAN_ERROR_RAM_ACCESS ((uint32_t)0x00000080U) /*!< Message RAM Access Failure */ |
| AnnaBridge | 172:65be27845400 | 808 | #define HAL_FDCAN_ERROR_FIFO_EMPTY ((uint32_t)0x00000100U) /*!< Put element in full FIFO */ |
| AnnaBridge | 172:65be27845400 | 809 | #define HAL_FDCAN_ERROR_FIFO_FULL ((uint32_t)0x00000200U) /*!< Get element from empty FIFO */ |
| AnnaBridge | 172:65be27845400 | 810 | #define HAL_FDCAN_ERROR_LOG_OVERFLOW FDCAN_IR_ELO /*!< Overflow of CAN Error Logging Counter */ |
| AnnaBridge | 172:65be27845400 | 811 | #define HAL_FDCAN_ERROR_RAM_WDG FDCAN_IR_WDI /*!< Message RAM Watchdog event occurred */ |
| AnnaBridge | 172:65be27845400 | 812 | #define HAL_FDCAN_ERROR_PROTOCOL_ARBT FDCAN_IR_PEA /*!< Protocol Error in Arbitration Phase (Nominal Bit Time is used) */ |
| AnnaBridge | 172:65be27845400 | 813 | #define HAL_FDCAN_ERROR_PROTOCOL_DATA FDCAN_IR_PED /*!< Protocol Error in Data Phase (Data Bit Time is used) */ |
| AnnaBridge | 172:65be27845400 | 814 | #define HAL_FDCAN_ERROR_RESERVED_AREA FDCAN_IR_ARA /*!< Access to Reserved Address */ |
| AnnaBridge | 172:65be27845400 | 815 | #define HAL_FDCAN_ERROR_TT_GLOBAL_TIME FDCAN_TTIR_GTE /*!< Global Time Error : Synchronization deviation exceeded limit */ |
| AnnaBridge | 172:65be27845400 | 816 | #define HAL_FDCAN_ERROR_TT_TX_UNDERFLOW FDCAN_TTIR_TXU /*!< Tx Count Underflow : Less Tx trigger than expected in one matrix cycle */ |
| AnnaBridge | 172:65be27845400 | 817 | #define HAL_FDCAN_ERROR_TT_TX_OVERFLOW FDCAN_TTIR_TXO /*!< Tx Count Overflow : More Tx trigger than expected in one matrix cycle */ |
| AnnaBridge | 172:65be27845400 | 818 | #define HAL_FDCAN_ERROR_TT_SCHEDULE1 FDCAN_TTIR_SE1 /*!< Scheduling error 1 */ |
| AnnaBridge | 172:65be27845400 | 819 | #define HAL_FDCAN_ERROR_TT_SCHEDULE2 FDCAN_TTIR_SE2 /*!< Scheduling error 2 */ |
| AnnaBridge | 172:65be27845400 | 820 | #define HAL_FDCAN_ERROR_TT_NO_INIT_REF FDCAN_TTIR_IWT /*!< No system startup due to missing reference message */ |
| AnnaBridge | 172:65be27845400 | 821 | #define HAL_FDCAN_ERROR_TT_NO_REF FDCAN_TTIR_WT /*!< Missing reference message */ |
| AnnaBridge | 172:65be27845400 | 822 | #define HAL_FDCAN_ERROR_TT_APPL_WDG FDCAN_TTIR_AW /*!< Application watchdog not served in time */ |
| AnnaBridge | 172:65be27845400 | 823 | #define HAL_FDCAN_ERROR_TT_CONFIG FDCAN_TTIR_CER /*!< Error found in trigger list */ |
| AnnaBridge | 172:65be27845400 | 824 | |
| AnnaBridge | 172:65be27845400 | 825 | #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 |
| AnnaBridge | 172:65be27845400 | 826 | #define HAL_FDCAN_ERROR_INVALID_CALLBACK ((uint32_t)0x00000100U) /*!< Invalid Callback error */ |
| AnnaBridge | 172:65be27845400 | 827 | #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 828 | /** |
| AnnaBridge | 172:65be27845400 | 829 | * @} |
| AnnaBridge | 172:65be27845400 | 830 | */ |
| AnnaBridge | 172:65be27845400 | 831 | |
| AnnaBridge | 172:65be27845400 | 832 | /** @defgroup FDCAN_frame_format FDCAN Frame Format |
| AnnaBridge | 172:65be27845400 | 833 | * @{ |
| AnnaBridge | 172:65be27845400 | 834 | */ |
| AnnaBridge | 172:65be27845400 | 835 | #define FDCAN_FRAME_CLASSIC ((uint32_t)0x00000000U) /*!< Classic mode */ |
| AnnaBridge | 172:65be27845400 | 836 | #define FDCAN_FRAME_FD_NO_BRS ((uint32_t)FDCAN_CCCR_FDOE) /*!< FD mode without BitRate Switching */ |
| AnnaBridge | 172:65be27845400 | 837 | #define FDCAN_FRAME_FD_BRS ((uint32_t)(FDCAN_CCCR_FDOE | FDCAN_CCCR_BRSE)) /*!< FD mode with BitRate Switching */ |
| AnnaBridge | 172:65be27845400 | 838 | /** |
| AnnaBridge | 172:65be27845400 | 839 | * @} |
| AnnaBridge | 172:65be27845400 | 840 | */ |
| AnnaBridge | 172:65be27845400 | 841 | |
| AnnaBridge | 172:65be27845400 | 842 | /** @defgroup FDCAN_operating_mode FDCAN Operating Mode |
| AnnaBridge | 172:65be27845400 | 843 | * @{ |
| AnnaBridge | 172:65be27845400 | 844 | */ |
| AnnaBridge | 172:65be27845400 | 845 | #define FDCAN_MODE_NORMAL ((uint32_t)0x00000000U) /*!< Normal mode */ |
| AnnaBridge | 172:65be27845400 | 846 | #define FDCAN_MODE_RESTRICTED_OPERATION ((uint32_t)0x00000001U) /*!< Restricted Operation mode */ |
| AnnaBridge | 172:65be27845400 | 847 | #define FDCAN_MODE_BUS_MONITORING ((uint32_t)0x00000002U) /*!< Bus Monitoring mode */ |
| AnnaBridge | 172:65be27845400 | 848 | #define FDCAN_MODE_INTERNAL_LOOPBACK ((uint32_t)0x00000003U) /*!< Internal LoopBack mode */ |
| AnnaBridge | 172:65be27845400 | 849 | #define FDCAN_MODE_EXTERNAL_LOOPBACK ((uint32_t)0x00000004U) /*!< External LoopBack mode */ |
| AnnaBridge | 172:65be27845400 | 850 | /** |
| AnnaBridge | 172:65be27845400 | 851 | * @} |
| AnnaBridge | 172:65be27845400 | 852 | */ |
| AnnaBridge | 172:65be27845400 | 853 | |
| AnnaBridge | 172:65be27845400 | 854 | /** @defgroup FDCAN_clock_calibration FDCAN Clock Calibration |
| AnnaBridge | 172:65be27845400 | 855 | * @{ |
| AnnaBridge | 172:65be27845400 | 856 | */ |
| AnnaBridge | 172:65be27845400 | 857 | #define FDCAN_CLOCK_CALIBRATION_DISABLE ((uint32_t)0x00000000U) /*!< Disable Clock Calibration */ |
| AnnaBridge | 172:65be27845400 | 858 | #define FDCAN_CLOCK_CALIBRATION_ENABLE ((uint32_t)0x00000001U) /*!< Enable Clock Calibration */ |
| AnnaBridge | 172:65be27845400 | 859 | /** |
| AnnaBridge | 172:65be27845400 | 860 | * @} |
| AnnaBridge | 172:65be27845400 | 861 | */ |
| AnnaBridge | 172:65be27845400 | 862 | |
| AnnaBridge | 172:65be27845400 | 863 | /** @defgroup FDCAN_clock_divider FDCAN Clock Divider |
| AnnaBridge | 172:65be27845400 | 864 | * @{ |
| AnnaBridge | 172:65be27845400 | 865 | */ |
| AnnaBridge | 172:65be27845400 | 866 | #define FDCAN_CLOCK_DIV1 ((uint32_t)0x00000000U) /*!< Divide kernel clock by 1 */ |
| AnnaBridge | 172:65be27845400 | 867 | #define FDCAN_CLOCK_DIV2 ((uint32_t)0x00010000U) /*!< Divide kernel clock by 2 */ |
| AnnaBridge | 172:65be27845400 | 868 | #define FDCAN_CLOCK_DIV4 ((uint32_t)0x00020000U) /*!< Divide kernel clock by 4 */ |
| AnnaBridge | 172:65be27845400 | 869 | #define FDCAN_CLOCK_DIV6 ((uint32_t)0x00030000U) /*!< Divide kernel clock by 6 */ |
| AnnaBridge | 172:65be27845400 | 870 | #define FDCAN_CLOCK_DIV8 ((uint32_t)0x00040000U) /*!< Divide kernel clock by 8 */ |
| AnnaBridge | 172:65be27845400 | 871 | #define FDCAN_CLOCK_DIV10 ((uint32_t)0x00050000U) /*!< Divide kernel clock by 10 */ |
| AnnaBridge | 172:65be27845400 | 872 | #define FDCAN_CLOCK_DIV12 ((uint32_t)0x00060000U) /*!< Divide kernel clock by 12 */ |
| AnnaBridge | 172:65be27845400 | 873 | #define FDCAN_CLOCK_DIV14 ((uint32_t)0x00070000U) /*!< Divide kernel clock by 14 */ |
| AnnaBridge | 172:65be27845400 | 874 | #define FDCAN_CLOCK_DIV16 ((uint32_t)0x00080000U) /*!< Divide kernel clock by 16 */ |
| AnnaBridge | 172:65be27845400 | 875 | #define FDCAN_CLOCK_DIV18 ((uint32_t)0x00090000U) /*!< Divide kernel clock by 18 */ |
| AnnaBridge | 172:65be27845400 | 876 | #define FDCAN_CLOCK_DIV20 ((uint32_t)0x000A0000U) /*!< Divide kernel clock by 20 */ |
| AnnaBridge | 172:65be27845400 | 877 | #define FDCAN_CLOCK_DIV22 ((uint32_t)0x000B0000U) /*!< Divide kernel clock by 22 */ |
| AnnaBridge | 172:65be27845400 | 878 | #define FDCAN_CLOCK_DIV24 ((uint32_t)0x000C0000U) /*!< Divide kernel clock by 24 */ |
| AnnaBridge | 172:65be27845400 | 879 | #define FDCAN_CLOCK_DIV26 ((uint32_t)0x000D0000U) /*!< Divide kernel clock by 26 */ |
| AnnaBridge | 172:65be27845400 | 880 | #define FDCAN_CLOCK_DIV28 ((uint32_t)0x000E0000U) /*!< Divide kernel clock by 28 */ |
| AnnaBridge | 172:65be27845400 | 881 | #define FDCAN_CLOCK_DIV30 ((uint32_t)0x000F0000U) /*!< Divide kernel clock by 30 */ |
| AnnaBridge | 172:65be27845400 | 882 | /** |
| AnnaBridge | 172:65be27845400 | 883 | * @} |
| AnnaBridge | 172:65be27845400 | 884 | */ |
| AnnaBridge | 172:65be27845400 | 885 | |
| AnnaBridge | 172:65be27845400 | 886 | /** @defgroup FDCAN_calibration_field_length FDCAN Calibration Field Length |
| AnnaBridge | 172:65be27845400 | 887 | * @{ |
| AnnaBridge | 172:65be27845400 | 888 | */ |
| AnnaBridge | 172:65be27845400 | 889 | #define FDCAN_CALIB_FIELD_LENGTH_32 ((uint32_t)0x00000000U) /*!< Calibration field length is 32 bits */ |
| AnnaBridge | 172:65be27845400 | 890 | #define FDCAN_CALIB_FIELD_LENGTH_64 ((uint32_t)FDCANCCU_CCFG_CFL) /*!< Calibration field length is 64 bits */ |
| AnnaBridge | 172:65be27845400 | 891 | /** |
| AnnaBridge | 172:65be27845400 | 892 | * @} |
| AnnaBridge | 172:65be27845400 | 893 | */ |
| AnnaBridge | 172:65be27845400 | 894 | |
| AnnaBridge | 172:65be27845400 | 895 | /** @defgroup FDCAN_calibration_state FDCAN Calibration State |
| AnnaBridge | 172:65be27845400 | 896 | * @{ |
| AnnaBridge | 172:65be27845400 | 897 | */ |
| AnnaBridge | 172:65be27845400 | 898 | #define FDCAN_CLOCK_NOT_CALIBRATED ((uint32_t)0x00000000U) /*!< Clock not calibrated */ |
| AnnaBridge | 172:65be27845400 | 899 | #define FDCAN_CLOCK_BASIC_CALIBRATED ((uint32_t)0x40000000U) /*!< Clock basic calibrated */ |
| AnnaBridge | 172:65be27845400 | 900 | #define FDCAN_CLOCK_PRECISION_CALIBRATED ((uint32_t)0x80000000U) /*!< Clock precision calibrated */ |
| AnnaBridge | 172:65be27845400 | 901 | /** |
| AnnaBridge | 172:65be27845400 | 902 | * @} |
| AnnaBridge | 172:65be27845400 | 903 | */ |
| AnnaBridge | 172:65be27845400 | 904 | |
| AnnaBridge | 172:65be27845400 | 905 | /** @defgroup FDCAN_calibration_counter FDCAN Calibration Counter |
| AnnaBridge | 172:65be27845400 | 906 | * @{ |
| AnnaBridge | 172:65be27845400 | 907 | */ |
| AnnaBridge | 172:65be27845400 | 908 | #define FDCAN_CALIB_TIME_QUANTA_COUNTER ((uint32_t)0x00000000U) /*!< Time Quanta Counter */ |
| AnnaBridge | 172:65be27845400 | 909 | #define FDCAN_CALIB_CLOCK_PERIOD_COUNTER ((uint32_t)0x00000001U) /*!< Oscillator Clock Period Counter */ |
| AnnaBridge | 172:65be27845400 | 910 | #define FDCAN_CALIB_WATCHDOG_COUNTER ((uint32_t)0x00000002U) /*!< Calibration Watchdog Counter */ |
| AnnaBridge | 172:65be27845400 | 911 | /** |
| AnnaBridge | 172:65be27845400 | 912 | * @} |
| AnnaBridge | 172:65be27845400 | 913 | */ |
| AnnaBridge | 172:65be27845400 | 914 | |
| AnnaBridge | 172:65be27845400 | 915 | /** @defgroup FDCAN_data_field_size FDCAN Data Field Size |
| AnnaBridge | 172:65be27845400 | 916 | * @{ |
| AnnaBridge | 172:65be27845400 | 917 | */ |
| AnnaBridge | 172:65be27845400 | 918 | #define FDCAN_DATA_BYTES_8 ((uint32_t)0x00000004U) /*!< 8 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 919 | #define FDCAN_DATA_BYTES_12 ((uint32_t)0x00000005U) /*!< 12 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 920 | #define FDCAN_DATA_BYTES_16 ((uint32_t)0x00000006U) /*!< 16 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 921 | #define FDCAN_DATA_BYTES_20 ((uint32_t)0x00000007U) /*!< 20 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 922 | #define FDCAN_DATA_BYTES_24 ((uint32_t)0x00000008U) /*!< 24 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 923 | #define FDCAN_DATA_BYTES_32 ((uint32_t)0x0000000AU) /*!< 32 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 924 | #define FDCAN_DATA_BYTES_48 ((uint32_t)0x0000000EU) /*!< 48 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 925 | #define FDCAN_DATA_BYTES_64 ((uint32_t)0x00000012U) /*!< 64 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 926 | /** |
| AnnaBridge | 172:65be27845400 | 927 | * @} |
| AnnaBridge | 172:65be27845400 | 928 | */ |
| AnnaBridge | 172:65be27845400 | 929 | |
| AnnaBridge | 172:65be27845400 | 930 | /** @defgroup FDCAN_txFifoQueue_Mode FDCAN Tx FIFO/Queue Mode |
| AnnaBridge | 172:65be27845400 | 931 | * @{ |
| AnnaBridge | 172:65be27845400 | 932 | */ |
| AnnaBridge | 172:65be27845400 | 933 | #define FDCAN_TX_FIFO_OPERATION ((uint32_t)0x00000000U) /*!< FIFO mode */ |
| AnnaBridge | 172:65be27845400 | 934 | #define FDCAN_TX_QUEUE_OPERATION ((uint32_t)FDCAN_TXBC_TFQM) /*!< Queue mode */ |
| AnnaBridge | 172:65be27845400 | 935 | /** |
| AnnaBridge | 172:65be27845400 | 936 | * @} |
| AnnaBridge | 172:65be27845400 | 937 | */ |
| AnnaBridge | 172:65be27845400 | 938 | |
| AnnaBridge | 172:65be27845400 | 939 | /** @defgroup FDCAN_id_type FDCAN ID Type |
| AnnaBridge | 172:65be27845400 | 940 | * @{ |
| AnnaBridge | 172:65be27845400 | 941 | */ |
| AnnaBridge | 172:65be27845400 | 942 | #define FDCAN_STANDARD_ID ((uint32_t)0x00000000U) /*!< Standard ID element */ |
| AnnaBridge | 172:65be27845400 | 943 | #define FDCAN_EXTENDED_ID ((uint32_t)0x40000000U) /*!< Extended ID element */ |
| AnnaBridge | 172:65be27845400 | 944 | /** |
| AnnaBridge | 172:65be27845400 | 945 | * @} |
| AnnaBridge | 172:65be27845400 | 946 | */ |
| AnnaBridge | 172:65be27845400 | 947 | |
| AnnaBridge | 172:65be27845400 | 948 | /** @defgroup FDCAN_frame_type FDCAN Frame Type |
| AnnaBridge | 172:65be27845400 | 949 | * @{ |
| AnnaBridge | 172:65be27845400 | 950 | */ |
| AnnaBridge | 172:65be27845400 | 951 | #define FDCAN_DATA_FRAME ((uint32_t)0x00000000U) /*!< Data frame */ |
| AnnaBridge | 172:65be27845400 | 952 | #define FDCAN_REMOTE_FRAME ((uint32_t)0x20000000U) /*!< Remote frame */ |
| AnnaBridge | 172:65be27845400 | 953 | /** |
| AnnaBridge | 172:65be27845400 | 954 | * @} |
| AnnaBridge | 172:65be27845400 | 955 | */ |
| AnnaBridge | 172:65be27845400 | 956 | |
| AnnaBridge | 172:65be27845400 | 957 | /** @defgroup FDCAN_data_length_code FDCAN Data Length Code |
| AnnaBridge | 172:65be27845400 | 958 | * @{ |
| AnnaBridge | 172:65be27845400 | 959 | */ |
| AnnaBridge | 172:65be27845400 | 960 | #define FDCAN_DLC_BYTES_0 ((uint32_t)0x00000000U) /*!< 0 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 961 | #define FDCAN_DLC_BYTES_1 ((uint32_t)0x00010000U) /*!< 1 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 962 | #define FDCAN_DLC_BYTES_2 ((uint32_t)0x00020000U) /*!< 2 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 963 | #define FDCAN_DLC_BYTES_3 ((uint32_t)0x00030000U) /*!< 3 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 964 | #define FDCAN_DLC_BYTES_4 ((uint32_t)0x00040000U) /*!< 4 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 965 | #define FDCAN_DLC_BYTES_5 ((uint32_t)0x00050000U) /*!< 5 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 966 | #define FDCAN_DLC_BYTES_6 ((uint32_t)0x00060000U) /*!< 6 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 967 | #define FDCAN_DLC_BYTES_7 ((uint32_t)0x00070000U) /*!< 7 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 968 | #define FDCAN_DLC_BYTES_8 ((uint32_t)0x00080000U) /*!< 8 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 969 | #define FDCAN_DLC_BYTES_12 ((uint32_t)0x00090000U) /*!< 12 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 970 | #define FDCAN_DLC_BYTES_16 ((uint32_t)0x000A0000U) /*!< 16 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 971 | #define FDCAN_DLC_BYTES_20 ((uint32_t)0x000B0000U) /*!< 20 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 972 | #define FDCAN_DLC_BYTES_24 ((uint32_t)0x000C0000U) /*!< 24 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 973 | #define FDCAN_DLC_BYTES_32 ((uint32_t)0x000D0000U) /*!< 32 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 974 | #define FDCAN_DLC_BYTES_48 ((uint32_t)0x000E0000U) /*!< 48 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 975 | #define FDCAN_DLC_BYTES_64 ((uint32_t)0x000F0000U) /*!< 64 bytes data field */ |
| AnnaBridge | 172:65be27845400 | 976 | /** |
| AnnaBridge | 172:65be27845400 | 977 | * @} |
| AnnaBridge | 172:65be27845400 | 978 | */ |
| AnnaBridge | 172:65be27845400 | 979 | |
| AnnaBridge | 172:65be27845400 | 980 | /** @defgroup FDCAN_error_state_indicator FDCAN Error State Indicator |
| AnnaBridge | 172:65be27845400 | 981 | * @{ |
| AnnaBridge | 172:65be27845400 | 982 | */ |
| AnnaBridge | 172:65be27845400 | 983 | #define FDCAN_ESI_ACTIVE ((uint32_t)0x00000000U) /*!< Transmitting node is error active */ |
| AnnaBridge | 172:65be27845400 | 984 | #define FDCAN_ESI_PASSIVE ((uint32_t)0x80000000U) /*!< Transmitting node is error passive */ |
| AnnaBridge | 172:65be27845400 | 985 | /** |
| AnnaBridge | 172:65be27845400 | 986 | * @} |
| AnnaBridge | 172:65be27845400 | 987 | */ |
| AnnaBridge | 172:65be27845400 | 988 | |
| AnnaBridge | 172:65be27845400 | 989 | /** @defgroup FDCAN_bit_rate_switching FDCAN Bit Rate Switching |
| AnnaBridge | 172:65be27845400 | 990 | * @{ |
| AnnaBridge | 172:65be27845400 | 991 | */ |
| AnnaBridge | 172:65be27845400 | 992 | #define FDCAN_BRS_OFF ((uint32_t)0x00000000U) /*!< FDCAN frames transmitted/received without bit rate switching */ |
| AnnaBridge | 172:65be27845400 | 993 | #define FDCAN_BRS_ON ((uint32_t)0x00100000U) /*!< FDCAN frames transmitted/received with bit rate switching */ |
| AnnaBridge | 172:65be27845400 | 994 | /** |
| AnnaBridge | 172:65be27845400 | 995 | * @} |
| AnnaBridge | 172:65be27845400 | 996 | */ |
| AnnaBridge | 172:65be27845400 | 997 | |
| AnnaBridge | 172:65be27845400 | 998 | /** @defgroup FDCAN_format FDCAN format |
| AnnaBridge | 172:65be27845400 | 999 | * @{ |
| AnnaBridge | 172:65be27845400 | 1000 | */ |
| AnnaBridge | 172:65be27845400 | 1001 | #define FDCAN_CLASSIC_CAN ((uint32_t)0x00000000U) /*!< Frame transmitted/received in Classic CAN format */ |
| AnnaBridge | 172:65be27845400 | 1002 | #define FDCAN_FD_CAN ((uint32_t)0x00200000U) /*!< Frame transmitted/received in FDCAN format */ |
| AnnaBridge | 172:65be27845400 | 1003 | /** |
| AnnaBridge | 172:65be27845400 | 1004 | * @} |
| AnnaBridge | 172:65be27845400 | 1005 | */ |
| AnnaBridge | 172:65be27845400 | 1006 | |
| AnnaBridge | 172:65be27845400 | 1007 | /** @defgroup FDCAN_EFC FDCAN Event FIFO control |
| AnnaBridge | 172:65be27845400 | 1008 | * @{ |
| AnnaBridge | 172:65be27845400 | 1009 | */ |
| AnnaBridge | 172:65be27845400 | 1010 | #define FDCAN_NO_TX_EVENTS ((uint32_t)0x00000000U) /*!< Do not store Tx events */ |
| AnnaBridge | 172:65be27845400 | 1011 | #define FDCAN_STORE_TX_EVENTS ((uint32_t)0x00800000U) /*!< Store Tx events */ |
| AnnaBridge | 172:65be27845400 | 1012 | /** |
| AnnaBridge | 172:65be27845400 | 1013 | * @} |
| AnnaBridge | 172:65be27845400 | 1014 | */ |
| AnnaBridge | 172:65be27845400 | 1015 | |
| AnnaBridge | 172:65be27845400 | 1016 | /** @defgroup FDCAN_filter_type FDCAN Filter Type |
| AnnaBridge | 172:65be27845400 | 1017 | * @{ |
| AnnaBridge | 172:65be27845400 | 1018 | */ |
| AnnaBridge | 172:65be27845400 | 1019 | #define FDCAN_FILTER_RANGE ((uint32_t)0x00000000U) /*!< Range filter from FilterID1 to FilterID2 */ |
| AnnaBridge | 172:65be27845400 | 1020 | #define FDCAN_FILTER_DUAL ((uint32_t)0x00000001U) /*!< Dual ID filter for FilterID1 or FilterID2 */ |
| AnnaBridge | 172:65be27845400 | 1021 | #define FDCAN_FILTER_MASK ((uint32_t)0x00000002U) /*!< Classic filter: FilterID1 = filter, FilterID2 = mask */ |
| AnnaBridge | 172:65be27845400 | 1022 | #define FDCAN_FILTER_RANGE_NO_EIDM ((uint32_t)0x00000003U) /*!< Range filter from FilterID1 to FilterID2, EIDM mask not applied */ |
| AnnaBridge | 172:65be27845400 | 1023 | /** |
| AnnaBridge | 172:65be27845400 | 1024 | * @} |
| AnnaBridge | 172:65be27845400 | 1025 | */ |
| AnnaBridge | 172:65be27845400 | 1026 | |
| AnnaBridge | 172:65be27845400 | 1027 | /** @defgroup FDCAN_filter_config FDCAN Filter Configuration |
| AnnaBridge | 172:65be27845400 | 1028 | * @{ |
| AnnaBridge | 172:65be27845400 | 1029 | */ |
| AnnaBridge | 172:65be27845400 | 1030 | #define FDCAN_FILTER_DISABLE ((uint32_t)0x00000000U) /*!< Disable filter element */ |
| AnnaBridge | 172:65be27845400 | 1031 | #define FDCAN_FILTER_TO_RXFIFO0 ((uint32_t)0x00000001U) /*!< Store in Rx FIFO 0 if filter matches */ |
| AnnaBridge | 172:65be27845400 | 1032 | #define FDCAN_FILTER_TO_RXFIFO1 ((uint32_t)0x00000002U) /*!< Store in Rx FIFO 1 if filter matches */ |
| AnnaBridge | 172:65be27845400 | 1033 | #define FDCAN_FILTER_REJECT ((uint32_t)0x00000003U) /*!< Reject ID if filter matches */ |
| AnnaBridge | 172:65be27845400 | 1034 | #define FDCAN_FILTER_HP ((uint32_t)0x00000004U) /*!< Set high priority if filter matches */ |
| AnnaBridge | 172:65be27845400 | 1035 | #define FDCAN_FILTER_TO_RXFIFO0_HP ((uint32_t)0x00000005U) /*!< Set high priority and store in FIFO 0 if filter matches */ |
| AnnaBridge | 172:65be27845400 | 1036 | #define FDCAN_FILTER_TO_RXFIFO1_HP ((uint32_t)0x00000006U) /*!< Set high priority and store in FIFO 1 if filter matches */ |
| AnnaBridge | 172:65be27845400 | 1037 | #define FDCAN_FILTER_TO_RXBUFFER ((uint32_t)0x00000007U) /*!< Store into Rx Buffer, configuration of FilterType ignored */ |
| AnnaBridge | 172:65be27845400 | 1038 | /** |
| AnnaBridge | 172:65be27845400 | 1039 | * @} |
| AnnaBridge | 172:65be27845400 | 1040 | */ |
| AnnaBridge | 172:65be27845400 | 1041 | |
| AnnaBridge | 172:65be27845400 | 1042 | /** @defgroup FDCAN_Tx_location FDCAN Tx Location |
| AnnaBridge | 172:65be27845400 | 1043 | * @{ |
| AnnaBridge | 172:65be27845400 | 1044 | */ |
| AnnaBridge | 172:65be27845400 | 1045 | #define FDCAN_TX_BUFFER0 ((uint32_t)0x00000001U) /*!< Add message to Tx Buffer 0 */ |
| AnnaBridge | 172:65be27845400 | 1046 | #define FDCAN_TX_BUFFER1 ((uint32_t)0x00000002U) /*!< Add message to Tx Buffer 1 */ |
| AnnaBridge | 172:65be27845400 | 1047 | #define FDCAN_TX_BUFFER2 ((uint32_t)0x00000004U) /*!< Add message to Tx Buffer 2 */ |
| AnnaBridge | 172:65be27845400 | 1048 | #define FDCAN_TX_BUFFER3 ((uint32_t)0x00000008U) /*!< Add message to Tx Buffer 3 */ |
| AnnaBridge | 172:65be27845400 | 1049 | #define FDCAN_TX_BUFFER4 ((uint32_t)0x00000010U) /*!< Add message to Tx Buffer 4 */ |
| AnnaBridge | 172:65be27845400 | 1050 | #define FDCAN_TX_BUFFER5 ((uint32_t)0x00000020U) /*!< Add message to Tx Buffer 5 */ |
| AnnaBridge | 172:65be27845400 | 1051 | #define FDCAN_TX_BUFFER6 ((uint32_t)0x00000040U) /*!< Add message to Tx Buffer 6 */ |
| AnnaBridge | 172:65be27845400 | 1052 | #define FDCAN_TX_BUFFER7 ((uint32_t)0x00000080U) /*!< Add message to Tx Buffer 7 */ |
| AnnaBridge | 172:65be27845400 | 1053 | #define FDCAN_TX_BUFFER8 ((uint32_t)0x00000100U) /*!< Add message to Tx Buffer 8 */ |
| AnnaBridge | 172:65be27845400 | 1054 | #define FDCAN_TX_BUFFER9 ((uint32_t)0x00000200U) /*!< Add message to Tx Buffer 9 */ |
| AnnaBridge | 172:65be27845400 | 1055 | #define FDCAN_TX_BUFFER10 ((uint32_t)0x00000400U) /*!< Add message to Tx Buffer 10 */ |
| AnnaBridge | 172:65be27845400 | 1056 | #define FDCAN_TX_BUFFER11 ((uint32_t)0x00000800U) /*!< Add message to Tx Buffer 11 */ |
| AnnaBridge | 172:65be27845400 | 1057 | #define FDCAN_TX_BUFFER12 ((uint32_t)0x00001000U) /*!< Add message to Tx Buffer 12 */ |
| AnnaBridge | 172:65be27845400 | 1058 | #define FDCAN_TX_BUFFER13 ((uint32_t)0x00002000U) /*!< Add message to Tx Buffer 13 */ |
| AnnaBridge | 172:65be27845400 | 1059 | #define FDCAN_TX_BUFFER14 ((uint32_t)0x00004000U) /*!< Add message to Tx Buffer 14 */ |
| AnnaBridge | 172:65be27845400 | 1060 | #define FDCAN_TX_BUFFER15 ((uint32_t)0x00008000U) /*!< Add message to Tx Buffer 15 */ |
| AnnaBridge | 172:65be27845400 | 1061 | #define FDCAN_TX_BUFFER16 ((uint32_t)0x00010000U) /*!< Add message to Tx Buffer 16 */ |
| AnnaBridge | 172:65be27845400 | 1062 | #define FDCAN_TX_BUFFER17 ((uint32_t)0x00020000U) /*!< Add message to Tx Buffer 17 */ |
| AnnaBridge | 172:65be27845400 | 1063 | #define FDCAN_TX_BUFFER18 ((uint32_t)0x00040000U) /*!< Add message to Tx Buffer 18 */ |
| AnnaBridge | 172:65be27845400 | 1064 | #define FDCAN_TX_BUFFER19 ((uint32_t)0x00080000U) /*!< Add message to Tx Buffer 19 */ |
| AnnaBridge | 172:65be27845400 | 1065 | #define FDCAN_TX_BUFFER20 ((uint32_t)0x00100000U) /*!< Add message to Tx Buffer 20 */ |
| AnnaBridge | 172:65be27845400 | 1066 | #define FDCAN_TX_BUFFER21 ((uint32_t)0x00200000U) /*!< Add message to Tx Buffer 21 */ |
| AnnaBridge | 172:65be27845400 | 1067 | #define FDCAN_TX_BUFFER22 ((uint32_t)0x00400000U) /*!< Add message to Tx Buffer 22 */ |
| AnnaBridge | 172:65be27845400 | 1068 | #define FDCAN_TX_BUFFER23 ((uint32_t)0x00800000U) /*!< Add message to Tx Buffer 23 */ |
| AnnaBridge | 172:65be27845400 | 1069 | #define FDCAN_TX_BUFFER24 ((uint32_t)0x01000000U) /*!< Add message to Tx Buffer 24 */ |
| AnnaBridge | 172:65be27845400 | 1070 | #define FDCAN_TX_BUFFER25 ((uint32_t)0x02000000U) /*!< Add message to Tx Buffer 25 */ |
| AnnaBridge | 172:65be27845400 | 1071 | #define FDCAN_TX_BUFFER26 ((uint32_t)0x04000000U) /*!< Add message to Tx Buffer 26 */ |
| AnnaBridge | 172:65be27845400 | 1072 | #define FDCAN_TX_BUFFER27 ((uint32_t)0x08000000U) /*!< Add message to Tx Buffer 27 */ |
| AnnaBridge | 172:65be27845400 | 1073 | #define FDCAN_TX_BUFFER28 ((uint32_t)0x10000000U) /*!< Add message to Tx Buffer 28 */ |
| AnnaBridge | 172:65be27845400 | 1074 | #define FDCAN_TX_BUFFER29 ((uint32_t)0x20000000U) /*!< Add message to Tx Buffer 29 */ |
| AnnaBridge | 172:65be27845400 | 1075 | #define FDCAN_TX_BUFFER30 ((uint32_t)0x40000000U) /*!< Add message to Tx Buffer 30 */ |
| AnnaBridge | 172:65be27845400 | 1076 | #define FDCAN_TX_BUFFER31 ((uint32_t)0x80000000U) /*!< Add message to Tx Buffer 31 */ |
| AnnaBridge | 172:65be27845400 | 1077 | /** |
| AnnaBridge | 172:65be27845400 | 1078 | * @} |
| AnnaBridge | 172:65be27845400 | 1079 | */ |
| AnnaBridge | 172:65be27845400 | 1080 | |
| AnnaBridge | 172:65be27845400 | 1081 | /** @defgroup FDCAN_Rx_location FDCAN Rx Location |
| AnnaBridge | 172:65be27845400 | 1082 | * @{ |
| AnnaBridge | 172:65be27845400 | 1083 | */ |
| AnnaBridge | 172:65be27845400 | 1084 | #define FDCAN_RX_FIFO0 ((uint32_t)0x00000040U) /*!< Get received message from Rx FIFO 0 */ |
| AnnaBridge | 172:65be27845400 | 1085 | #define FDCAN_RX_FIFO1 ((uint32_t)0x00000041U) /*!< Get received message from Rx FIFO 1 */ |
| AnnaBridge | 172:65be27845400 | 1086 | #define FDCAN_RX_BUFFER0 ((uint32_t)0x00000000U) /*!< Get received message from Rx Buffer 0 */ |
| AnnaBridge | 172:65be27845400 | 1087 | #define FDCAN_RX_BUFFER1 ((uint32_t)0x00000001U) /*!< Get received message from Rx Buffer 1 */ |
| AnnaBridge | 172:65be27845400 | 1088 | #define FDCAN_RX_BUFFER2 ((uint32_t)0x00000002U) /*!< Get received message from Rx Buffer 2 */ |
| AnnaBridge | 172:65be27845400 | 1089 | #define FDCAN_RX_BUFFER3 ((uint32_t)0x00000003U) /*!< Get received message from Rx Buffer 3 */ |
| AnnaBridge | 172:65be27845400 | 1090 | #define FDCAN_RX_BUFFER4 ((uint32_t)0x00000004U) /*!< Get received message from Rx Buffer 4 */ |
| AnnaBridge | 172:65be27845400 | 1091 | #define FDCAN_RX_BUFFER5 ((uint32_t)0x00000005U) /*!< Get received message from Rx Buffer 5 */ |
| AnnaBridge | 172:65be27845400 | 1092 | #define FDCAN_RX_BUFFER6 ((uint32_t)0x00000006U) /*!< Get received message from Rx Buffer 6 */ |
| AnnaBridge | 172:65be27845400 | 1093 | #define FDCAN_RX_BUFFER7 ((uint32_t)0x00000007U) /*!< Get received message from Rx Buffer 7 */ |
| AnnaBridge | 172:65be27845400 | 1094 | #define FDCAN_RX_BUFFER8 ((uint32_t)0x00000008U) /*!< Get received message from Rx Buffer 8 */ |
| AnnaBridge | 172:65be27845400 | 1095 | #define FDCAN_RX_BUFFER9 ((uint32_t)0x00000009U) /*!< Get received message from Rx Buffer 9 */ |
| AnnaBridge | 172:65be27845400 | 1096 | #define FDCAN_RX_BUFFER10 ((uint32_t)0x0000000AU) /*!< Get received message from Rx Buffer 10 */ |
| AnnaBridge | 172:65be27845400 | 1097 | #define FDCAN_RX_BUFFER11 ((uint32_t)0x0000000BU) /*!< Get received message from Rx Buffer 11 */ |
| AnnaBridge | 172:65be27845400 | 1098 | #define FDCAN_RX_BUFFER12 ((uint32_t)0x0000000CU) /*!< Get received message from Rx Buffer 12 */ |
| AnnaBridge | 172:65be27845400 | 1099 | #define FDCAN_RX_BUFFER13 ((uint32_t)0x0000000DU) /*!< Get received message from Rx Buffer 13 */ |
| AnnaBridge | 172:65be27845400 | 1100 | #define FDCAN_RX_BUFFER14 ((uint32_t)0x0000000EU) /*!< Get received message from Rx Buffer 14 */ |
| AnnaBridge | 172:65be27845400 | 1101 | #define FDCAN_RX_BUFFER15 ((uint32_t)0x0000000FU) /*!< Get received message from Rx Buffer 15 */ |
| AnnaBridge | 172:65be27845400 | 1102 | #define FDCAN_RX_BUFFER16 ((uint32_t)0x00000010U) /*!< Get received message from Rx Buffer 16 */ |
| AnnaBridge | 172:65be27845400 | 1103 | #define FDCAN_RX_BUFFER17 ((uint32_t)0x00000011U) /*!< Get received message from Rx Buffer 17 */ |
| AnnaBridge | 172:65be27845400 | 1104 | #define FDCAN_RX_BUFFER18 ((uint32_t)0x00000012U) /*!< Get received message from Rx Buffer 18 */ |
| AnnaBridge | 172:65be27845400 | 1105 | #define FDCAN_RX_BUFFER19 ((uint32_t)0x00000013U) /*!< Get received message from Rx Buffer 19 */ |
| AnnaBridge | 172:65be27845400 | 1106 | #define FDCAN_RX_BUFFER20 ((uint32_t)0x00000014U) /*!< Get received message from Rx Buffer 20 */ |
| AnnaBridge | 172:65be27845400 | 1107 | #define FDCAN_RX_BUFFER21 ((uint32_t)0x00000015U) /*!< Get received message from Rx Buffer 21 */ |
| AnnaBridge | 172:65be27845400 | 1108 | #define FDCAN_RX_BUFFER22 ((uint32_t)0x00000016U) /*!< Get received message from Rx Buffer 22 */ |
| AnnaBridge | 172:65be27845400 | 1109 | #define FDCAN_RX_BUFFER23 ((uint32_t)0x00000017U) /*!< Get received message from Rx Buffer 23 */ |
| AnnaBridge | 172:65be27845400 | 1110 | #define FDCAN_RX_BUFFER24 ((uint32_t)0x00000018U) /*!< Get received message from Rx Buffer 24 */ |
| AnnaBridge | 172:65be27845400 | 1111 | #define FDCAN_RX_BUFFER25 ((uint32_t)0x00000019U) /*!< Get received message from Rx Buffer 25 */ |
| AnnaBridge | 172:65be27845400 | 1112 | #define FDCAN_RX_BUFFER26 ((uint32_t)0x0000001AU) /*!< Get received message from Rx Buffer 26 */ |
| AnnaBridge | 172:65be27845400 | 1113 | #define FDCAN_RX_BUFFER27 ((uint32_t)0x0000001BU) /*!< Get received message from Rx Buffer 27 */ |
| AnnaBridge | 172:65be27845400 | 1114 | #define FDCAN_RX_BUFFER28 ((uint32_t)0x0000001CU) /*!< Get received message from Rx Buffer 28 */ |
| AnnaBridge | 172:65be27845400 | 1115 | #define FDCAN_RX_BUFFER29 ((uint32_t)0x0000001DU) /*!< Get received message from Rx Buffer 29 */ |
| AnnaBridge | 172:65be27845400 | 1116 | #define FDCAN_RX_BUFFER30 ((uint32_t)0x0000001EU) /*!< Get received message from Rx Buffer 30 */ |
| AnnaBridge | 172:65be27845400 | 1117 | #define FDCAN_RX_BUFFER31 ((uint32_t)0x0000001FU) /*!< Get received message from Rx Buffer 31 */ |
| AnnaBridge | 172:65be27845400 | 1118 | #define FDCAN_RX_BUFFER32 ((uint32_t)0x00000020U) /*!< Get received message from Rx Buffer 32 */ |
| AnnaBridge | 172:65be27845400 | 1119 | #define FDCAN_RX_BUFFER33 ((uint32_t)0x00000021U) /*!< Get received message from Rx Buffer 33 */ |
| AnnaBridge | 172:65be27845400 | 1120 | #define FDCAN_RX_BUFFER34 ((uint32_t)0x00000022U) /*!< Get received message from Rx Buffer 34 */ |
| AnnaBridge | 172:65be27845400 | 1121 | #define FDCAN_RX_BUFFER35 ((uint32_t)0x00000023U) /*!< Get received message from Rx Buffer 35 */ |
| AnnaBridge | 172:65be27845400 | 1122 | #define FDCAN_RX_BUFFER36 ((uint32_t)0x00000024U) /*!< Get received message from Rx Buffer 36 */ |
| AnnaBridge | 172:65be27845400 | 1123 | #define FDCAN_RX_BUFFER37 ((uint32_t)0x00000025U) /*!< Get received message from Rx Buffer 37 */ |
| AnnaBridge | 172:65be27845400 | 1124 | #define FDCAN_RX_BUFFER38 ((uint32_t)0x00000026U) /*!< Get received message from Rx Buffer 38 */ |
| AnnaBridge | 172:65be27845400 | 1125 | #define FDCAN_RX_BUFFER39 ((uint32_t)0x00000027U) /*!< Get received message from Rx Buffer 39 */ |
| AnnaBridge | 172:65be27845400 | 1126 | #define FDCAN_RX_BUFFER40 ((uint32_t)0x00000028U) /*!< Get received message from Rx Buffer 40 */ |
| AnnaBridge | 172:65be27845400 | 1127 | #define FDCAN_RX_BUFFER41 ((uint32_t)0x00000029U) /*!< Get received message from Rx Buffer 41 */ |
| AnnaBridge | 172:65be27845400 | 1128 | #define FDCAN_RX_BUFFER42 ((uint32_t)0x0000002AU) /*!< Get received message from Rx Buffer 42 */ |
| AnnaBridge | 172:65be27845400 | 1129 | #define FDCAN_RX_BUFFER43 ((uint32_t)0x0000002BU) /*!< Get received message from Rx Buffer 43 */ |
| AnnaBridge | 172:65be27845400 | 1130 | #define FDCAN_RX_BUFFER44 ((uint32_t)0x0000002CU) /*!< Get received message from Rx Buffer 44 */ |
| AnnaBridge | 172:65be27845400 | 1131 | #define FDCAN_RX_BUFFER45 ((uint32_t)0x0000002DU) /*!< Get received message from Rx Buffer 45 */ |
| AnnaBridge | 172:65be27845400 | 1132 | #define FDCAN_RX_BUFFER46 ((uint32_t)0x0000002EU) /*!< Get received message from Rx Buffer 46 */ |
| AnnaBridge | 172:65be27845400 | 1133 | #define FDCAN_RX_BUFFER47 ((uint32_t)0x0000002FU) /*!< Get received message from Rx Buffer 47 */ |
| AnnaBridge | 172:65be27845400 | 1134 | #define FDCAN_RX_BUFFER48 ((uint32_t)0x00000030U) /*!< Get received message from Rx Buffer 48 */ |
| AnnaBridge | 172:65be27845400 | 1135 | #define FDCAN_RX_BUFFER49 ((uint32_t)0x00000031U) /*!< Get received message from Rx Buffer 49 */ |
| AnnaBridge | 172:65be27845400 | 1136 | #define FDCAN_RX_BUFFER50 ((uint32_t)0x00000032U) /*!< Get received message from Rx Buffer 50 */ |
| AnnaBridge | 172:65be27845400 | 1137 | #define FDCAN_RX_BUFFER51 ((uint32_t)0x00000033U) /*!< Get received message from Rx Buffer 51 */ |
| AnnaBridge | 172:65be27845400 | 1138 | #define FDCAN_RX_BUFFER52 ((uint32_t)0x00000034U) /*!< Get received message from Rx Buffer 52 */ |
| AnnaBridge | 172:65be27845400 | 1139 | #define FDCAN_RX_BUFFER53 ((uint32_t)0x00000035U) /*!< Get received message from Rx Buffer 53 */ |
| AnnaBridge | 172:65be27845400 | 1140 | #define FDCAN_RX_BUFFER54 ((uint32_t)0x00000036U) /*!< Get received message from Rx Buffer 54 */ |
| AnnaBridge | 172:65be27845400 | 1141 | #define FDCAN_RX_BUFFER55 ((uint32_t)0x00000037U) /*!< Get received message from Rx Buffer 55 */ |
| AnnaBridge | 172:65be27845400 | 1142 | #define FDCAN_RX_BUFFER56 ((uint32_t)0x00000038U) /*!< Get received message from Rx Buffer 56 */ |
| AnnaBridge | 172:65be27845400 | 1143 | #define FDCAN_RX_BUFFER57 ((uint32_t)0x00000039U) /*!< Get received message from Rx Buffer 57 */ |
| AnnaBridge | 172:65be27845400 | 1144 | #define FDCAN_RX_BUFFER58 ((uint32_t)0x0000003AU) /*!< Get received message from Rx Buffer 58 */ |
| AnnaBridge | 172:65be27845400 | 1145 | #define FDCAN_RX_BUFFER59 ((uint32_t)0x0000003BU) /*!< Get received message from Rx Buffer 59 */ |
| AnnaBridge | 172:65be27845400 | 1146 | #define FDCAN_RX_BUFFER60 ((uint32_t)0x0000003CU) /*!< Get received message from Rx Buffer 60 */ |
| AnnaBridge | 172:65be27845400 | 1147 | #define FDCAN_RX_BUFFER61 ((uint32_t)0x0000003DU) /*!< Get received message from Rx Buffer 61 */ |
| AnnaBridge | 172:65be27845400 | 1148 | #define FDCAN_RX_BUFFER62 ((uint32_t)0x0000003EU) /*!< Get received message from Rx Buffer 62 */ |
| AnnaBridge | 172:65be27845400 | 1149 | #define FDCAN_RX_BUFFER63 ((uint32_t)0x0000003FU) /*!< Get received message from Rx Buffer 63 */ |
| AnnaBridge | 172:65be27845400 | 1150 | /** |
| AnnaBridge | 172:65be27845400 | 1151 | * @} |
| AnnaBridge | 172:65be27845400 | 1152 | */ |
| AnnaBridge | 172:65be27845400 | 1153 | |
| AnnaBridge | 172:65be27845400 | 1154 | /** @defgroup FDCAN_event_type FDCAN Event Type |
| AnnaBridge | 172:65be27845400 | 1155 | * @{ |
| AnnaBridge | 172:65be27845400 | 1156 | */ |
| AnnaBridge | 172:65be27845400 | 1157 | #define FDCAN_TX_EVENT ((uint32_t)0x00400000U) /*!< Tx event */ |
| AnnaBridge | 172:65be27845400 | 1158 | #define FDCAN_TX_IN_SPITE_OF_ABORT ((uint32_t)0x00800000U) /*!< Transmission in spite of cancellation */ |
| AnnaBridge | 172:65be27845400 | 1159 | /** |
| AnnaBridge | 172:65be27845400 | 1160 | * @} |
| AnnaBridge | 172:65be27845400 | 1161 | */ |
| AnnaBridge | 172:65be27845400 | 1162 | |
| AnnaBridge | 172:65be27845400 | 1163 | /** @defgroup FDCAN_hp_msg_storage FDCAN High Priority Message Storage |
| AnnaBridge | 172:65be27845400 | 1164 | * @{ |
| AnnaBridge | 172:65be27845400 | 1165 | */ |
| AnnaBridge | 172:65be27845400 | 1166 | #define FDCAN_HP_STORAGE_NO_FIFO ((uint32_t)0x00000000U) /*!< No FIFO selected */ |
| AnnaBridge | 172:65be27845400 | 1167 | #define FDCAN_HP_STORAGE_MSG_LOST ((uint32_t)0x00000040U) /*!< FIFO message lost */ |
| AnnaBridge | 172:65be27845400 | 1168 | #define FDCAN_HP_STORAGE_RXFIFO0 ((uint32_t)0x00000080U) /*!< Message stored in FIFO 0 */ |
| AnnaBridge | 172:65be27845400 | 1169 | #define FDCAN_HP_STORAGE_RXFIFO1 ((uint32_t)0x000000C0U) /*!< Message stored in FIFO 1 */ |
| AnnaBridge | 172:65be27845400 | 1170 | /** |
| AnnaBridge | 172:65be27845400 | 1171 | * @} |
| AnnaBridge | 172:65be27845400 | 1172 | */ |
| AnnaBridge | 172:65be27845400 | 1173 | |
| AnnaBridge | 172:65be27845400 | 1174 | /** @defgroup FDCAN_protocol_error_code FDCAN protocol error code |
| AnnaBridge | 172:65be27845400 | 1175 | * @{ |
| AnnaBridge | 172:65be27845400 | 1176 | */ |
| AnnaBridge | 172:65be27845400 | 1177 | #define FDCAN_PROTOCOL_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error occurred */ |
| AnnaBridge | 172:65be27845400 | 1178 | #define FDCAN_PROTOCOL_ERROR_STUFF ((uint32_t)0x00000001U) /*!< Stuff error */ |
| AnnaBridge | 172:65be27845400 | 1179 | #define FDCAN_PROTOCOL_ERROR_FORM ((uint32_t)0x00000002U) /*!< Form error */ |
| AnnaBridge | 172:65be27845400 | 1180 | #define FDCAN_PROTOCOL_ERROR_ACK ((uint32_t)0x00000003U) /*!< Acknowledge error */ |
| AnnaBridge | 172:65be27845400 | 1181 | #define FDCAN_PROTOCOL_ERROR_BIT1 ((uint32_t)0x00000004U) /*!< Bit 1 (recessive) error */ |
| AnnaBridge | 172:65be27845400 | 1182 | #define FDCAN_PROTOCOL_ERROR_BIT0 ((uint32_t)0x00000005U) /*!< Bit 0 (dominant) error */ |
| AnnaBridge | 172:65be27845400 | 1183 | #define FDCAN_PROTOCOL_ERROR_CRC ((uint32_t)0x00000006U) /*!< CRC check sum error */ |
| AnnaBridge | 172:65be27845400 | 1184 | #define FDCAN_PROTOCOL_ERROR_NO_CHANGE ((uint32_t)0x00000007U) /*!< No change since last read */ |
| AnnaBridge | 172:65be27845400 | 1185 | /** |
| AnnaBridge | 172:65be27845400 | 1186 | * @} |
| AnnaBridge | 172:65be27845400 | 1187 | */ |
| AnnaBridge | 172:65be27845400 | 1188 | |
| AnnaBridge | 172:65be27845400 | 1189 | /** @defgroup FDCAN_communication_state FDCAN communication state |
| AnnaBridge | 172:65be27845400 | 1190 | * @{ |
| AnnaBridge | 172:65be27845400 | 1191 | */ |
| AnnaBridge | 172:65be27845400 | 1192 | #define FDCAN_COM_STATE_SYNC ((uint32_t)0x00000000U) /*!< Node is synchronizing on CAN communication */ |
| AnnaBridge | 172:65be27845400 | 1193 | #define FDCAN_COM_STATE_IDLE ((uint32_t)0x00000008U) /*!< Node is neither receiver nor transmitter */ |
| AnnaBridge | 172:65be27845400 | 1194 | #define FDCAN_COM_STATE_RX ((uint32_t)0x00000010U) /*!< Node is operating as receiver */ |
| AnnaBridge | 172:65be27845400 | 1195 | #define FDCAN_COM_STATE_TX ((uint32_t)0x00000018U) /*!< Node is operating as transmitter */ |
| AnnaBridge | 172:65be27845400 | 1196 | /** |
| AnnaBridge | 172:65be27845400 | 1197 | * @} |
| AnnaBridge | 172:65be27845400 | 1198 | */ |
| AnnaBridge | 172:65be27845400 | 1199 | |
| AnnaBridge | 172:65be27845400 | 1200 | /** @defgroup FDCAN_FIFO_watermark FDCAN FIFO watermark |
| AnnaBridge | 172:65be27845400 | 1201 | * @{ |
| AnnaBridge | 172:65be27845400 | 1202 | */ |
| AnnaBridge | 172:65be27845400 | 1203 | #define FDCAN_CFG_TX_EVENT_FIFO ((uint32_t)0x00000000U) /*!< Tx event FIFO */ |
| AnnaBridge | 172:65be27845400 | 1204 | #define FDCAN_CFG_RX_FIFO0 ((uint32_t)0x00000001U) /*!< Rx FIFO0 */ |
| AnnaBridge | 172:65be27845400 | 1205 | #define FDCAN_CFG_RX_FIFO1 ((uint32_t)0x00000002U) /*!< Rx FIFO1 */ |
| AnnaBridge | 172:65be27845400 | 1206 | /** |
| AnnaBridge | 172:65be27845400 | 1207 | * @} |
| AnnaBridge | 172:65be27845400 | 1208 | */ |
| AnnaBridge | 172:65be27845400 | 1209 | |
| AnnaBridge | 172:65be27845400 | 1210 | /** @defgroup FDCAN_Rx_FIFO_operation_mode FDCAN FIFO operation mode |
| AnnaBridge | 172:65be27845400 | 1211 | * @{ |
| AnnaBridge | 172:65be27845400 | 1212 | */ |
| AnnaBridge | 172:65be27845400 | 1213 | #define FDCAN_RX_FIFO_BLOCKING ((uint32_t)0x00000000U) /*!< Rx FIFO blocking mode */ |
| AnnaBridge | 172:65be27845400 | 1214 | #define FDCAN_RX_FIFO_OVERWRITE ((uint32_t)0x80000000U) /*!< Rx FIFO overwrite mode */ |
| AnnaBridge | 172:65be27845400 | 1215 | /** |
| AnnaBridge | 172:65be27845400 | 1216 | * @} |
| AnnaBridge | 172:65be27845400 | 1217 | */ |
| AnnaBridge | 172:65be27845400 | 1218 | |
| AnnaBridge | 172:65be27845400 | 1219 | /** @defgroup FDCAN_Non_Matching_Frames FDCAN non-matching frames |
| AnnaBridge | 172:65be27845400 | 1220 | * @{ |
| AnnaBridge | 172:65be27845400 | 1221 | */ |
| AnnaBridge | 172:65be27845400 | 1222 | #define FDCAN_ACCEPT_IN_RX_FIFO0 ((uint32_t)0x00000000U) /*!< Accept in Rx FIFO 0 */ |
| AnnaBridge | 172:65be27845400 | 1223 | #define FDCAN_ACCEPT_IN_RX_FIFO1 ((uint32_t)0x00000001U) /*!< Accept in Rx FIFO 1 */ |
| AnnaBridge | 172:65be27845400 | 1224 | #define FDCAN_REJECT ((uint32_t)0x00000002U) /*!< Reject */ |
| AnnaBridge | 172:65be27845400 | 1225 | /** |
| AnnaBridge | 172:65be27845400 | 1226 | * @} |
| AnnaBridge | 172:65be27845400 | 1227 | */ |
| AnnaBridge | 172:65be27845400 | 1228 | |
| AnnaBridge | 172:65be27845400 | 1229 | /** @defgroup FDCAN_Reject_Remote_Frames FDCAN reject remote frames |
| AnnaBridge | 172:65be27845400 | 1230 | * @{ |
| AnnaBridge | 172:65be27845400 | 1231 | */ |
| AnnaBridge | 172:65be27845400 | 1232 | #define FDCAN_FILTER_REMOTE ((uint32_t)0x00000000U) /*!< Filter remote frames */ |
| AnnaBridge | 172:65be27845400 | 1233 | #define FDCAN_REJECT_REMOTE ((uint32_t)0x00000001U) /*!< Reject all remote frames */ |
| AnnaBridge | 172:65be27845400 | 1234 | /** |
| AnnaBridge | 172:65be27845400 | 1235 | * @} |
| AnnaBridge | 172:65be27845400 | 1236 | */ |
| AnnaBridge | 172:65be27845400 | 1237 | |
| AnnaBridge | 172:65be27845400 | 1238 | /** @defgroup FDCAN_Interrupt_Line FDCAN interrupt line |
| AnnaBridge | 172:65be27845400 | 1239 | * @{ |
| AnnaBridge | 172:65be27845400 | 1240 | */ |
| AnnaBridge | 172:65be27845400 | 1241 | #define FDCAN_INTERRUPT_LINE0 ((uint32_t)0x00000001U) /*!< Interrupt Line 0 */ |
| AnnaBridge | 172:65be27845400 | 1242 | #define FDCAN_INTERRUPT_LINE1 ((uint32_t)0x00000002U) /*!< Interrupt Line 1 */ |
| AnnaBridge | 172:65be27845400 | 1243 | /** |
| AnnaBridge | 172:65be27845400 | 1244 | * @} |
| AnnaBridge | 172:65be27845400 | 1245 | */ |
| AnnaBridge | 172:65be27845400 | 1246 | |
| AnnaBridge | 172:65be27845400 | 1247 | /** @defgroup FDCAN_Timestamp FDCAN timestamp |
| AnnaBridge | 172:65be27845400 | 1248 | * @{ |
| AnnaBridge | 172:65be27845400 | 1249 | */ |
| AnnaBridge | 172:65be27845400 | 1250 | #define FDCAN_TIMESTAMP_INTERNAL ((uint32_t)0x00000001U) /*!< Timestamp counter value incremented according to TCP */ |
| AnnaBridge | 172:65be27845400 | 1251 | #define FDCAN_TIMESTAMP_EXTERNAL ((uint32_t)0x00000002U) /*!< External timestamp counter value used */ |
| AnnaBridge | 172:65be27845400 | 1252 | /** |
| AnnaBridge | 172:65be27845400 | 1253 | * @} |
| AnnaBridge | 172:65be27845400 | 1254 | */ |
| AnnaBridge | 172:65be27845400 | 1255 | |
| AnnaBridge | 172:65be27845400 | 1256 | /** @defgroup FDCAN_Timestamp_Prescaler FDCAN timestamp prescaler |
| AnnaBridge | 172:65be27845400 | 1257 | * @{ |
| AnnaBridge | 172:65be27845400 | 1258 | */ |
| AnnaBridge | 172:65be27845400 | 1259 | #define FDCAN_TIMESTAMP_PRESC_1 ((uint32_t)0x00000000U) /*!< Timestamp counter time unit in equal to CAN bit time */ |
| AnnaBridge | 172:65be27845400 | 1260 | #define FDCAN_TIMESTAMP_PRESC_2 ((uint32_t)0x00010000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 2 */ |
| AnnaBridge | 172:65be27845400 | 1261 | #define FDCAN_TIMESTAMP_PRESC_3 ((uint32_t)0x00020000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 3 */ |
| AnnaBridge | 172:65be27845400 | 1262 | #define FDCAN_TIMESTAMP_PRESC_4 ((uint32_t)0x00030000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 4 */ |
| AnnaBridge | 172:65be27845400 | 1263 | #define FDCAN_TIMESTAMP_PRESC_5 ((uint32_t)0x00040000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 5 */ |
| AnnaBridge | 172:65be27845400 | 1264 | #define FDCAN_TIMESTAMP_PRESC_6 ((uint32_t)0x00050000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 6 */ |
| AnnaBridge | 172:65be27845400 | 1265 | #define FDCAN_TIMESTAMP_PRESC_7 ((uint32_t)0x00060000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 7 */ |
| AnnaBridge | 172:65be27845400 | 1266 | #define FDCAN_TIMESTAMP_PRESC_8 ((uint32_t)0x00070000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 8 */ |
| AnnaBridge | 172:65be27845400 | 1267 | #define FDCAN_TIMESTAMP_PRESC_9 ((uint32_t)0x00080000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 9 */ |
| AnnaBridge | 172:65be27845400 | 1268 | #define FDCAN_TIMESTAMP_PRESC_10 ((uint32_t)0x00090000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 10 */ |
| AnnaBridge | 172:65be27845400 | 1269 | #define FDCAN_TIMESTAMP_PRESC_11 ((uint32_t)0x000A0000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 11 */ |
| AnnaBridge | 172:65be27845400 | 1270 | #define FDCAN_TIMESTAMP_PRESC_12 ((uint32_t)0x000B0000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 12 */ |
| AnnaBridge | 172:65be27845400 | 1271 | #define FDCAN_TIMESTAMP_PRESC_13 ((uint32_t)0x000C0000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 13 */ |
| AnnaBridge | 172:65be27845400 | 1272 | #define FDCAN_TIMESTAMP_PRESC_14 ((uint32_t)0x000D0000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 14 */ |
| AnnaBridge | 172:65be27845400 | 1273 | #define FDCAN_TIMESTAMP_PRESC_15 ((uint32_t)0x000E0000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 15 */ |
| AnnaBridge | 172:65be27845400 | 1274 | #define FDCAN_TIMESTAMP_PRESC_16 ((uint32_t)0x000F0000U) /*!< Timestamp counter time unit in equal to CAN bit time multipled by 16 */ |
| AnnaBridge | 172:65be27845400 | 1275 | /** |
| AnnaBridge | 172:65be27845400 | 1276 | * @} |
| AnnaBridge | 172:65be27845400 | 1277 | */ |
| AnnaBridge | 172:65be27845400 | 1278 | |
| AnnaBridge | 172:65be27845400 | 1279 | /** @defgroup FDCAN_Timeout_Operation FDCAN timeout operation |
| AnnaBridge | 172:65be27845400 | 1280 | * @{ |
| AnnaBridge | 172:65be27845400 | 1281 | */ |
| AnnaBridge | 172:65be27845400 | 1282 | #define FDCAN_TIMEOUT_CONTINUOUS ((uint32_t)0x00000000U) /*!< Timeout continuous operation */ |
| AnnaBridge | 172:65be27845400 | 1283 | #define FDCAN_TIMEOUT_TX_EVENT_FIFO ((uint32_t)0x00000002U) /*!< Timeout controlled by Tx Event FIFO */ |
| AnnaBridge | 172:65be27845400 | 1284 | #define FDCAN_TIMEOUT_RX_FIFO0 ((uint32_t)0x00000004U) /*!< Timeout controlled by Rx FIFO 0 */ |
| AnnaBridge | 172:65be27845400 | 1285 | #define FDCAN_TIMEOUT_RX_FIFO1 ((uint32_t)0x00000006U) /*!< Timeout controlled by Rx FIFO 1 */ |
| AnnaBridge | 172:65be27845400 | 1286 | /** |
| AnnaBridge | 172:65be27845400 | 1287 | * @} |
| AnnaBridge | 172:65be27845400 | 1288 | */ |
| AnnaBridge | 172:65be27845400 | 1289 | |
| AnnaBridge | 172:65be27845400 | 1290 | /** @defgroup FDCAN_TT_Reference_Message_Payload FDCAN TT reference message payload |
| AnnaBridge | 172:65be27845400 | 1291 | * @{ |
| AnnaBridge | 172:65be27845400 | 1292 | */ |
| AnnaBridge | 172:65be27845400 | 1293 | #define FDCAN_TT_REF_MESSAGE_NO_PAYLOAD ((uint32_t)0x00000000U) /*!< Reference message has no additional payload */ |
| AnnaBridge | 172:65be27845400 | 1294 | #define FDCAN_TT_REF_MESSAGE_ADD_PAYLOAD ((uint32_t)FDCAN_TTRMC_RMPS) /*!< Additional payload is taken from Tx Buffer 0 */ |
| AnnaBridge | 172:65be27845400 | 1295 | /** |
| AnnaBridge | 172:65be27845400 | 1296 | * @} |
| AnnaBridge | 172:65be27845400 | 1297 | */ |
| AnnaBridge | 172:65be27845400 | 1298 | |
| AnnaBridge | 172:65be27845400 | 1299 | /** @defgroup FDCAN_TT_Repeat_Factor FDCAN TT repeat factor |
| AnnaBridge | 172:65be27845400 | 1300 | * @{ |
| AnnaBridge | 172:65be27845400 | 1301 | */ |
| AnnaBridge | 172:65be27845400 | 1302 | #define FDCAN_TT_REPEAT_EVERY_CYCLE ((uint32_t)0x00000000U) /*!< Trigger valid for all cycles */ |
| AnnaBridge | 172:65be27845400 | 1303 | #define FDCAN_TT_REPEAT_EVERY_2ND_CYCLE ((uint32_t)0x00000002U) /*!< Trigger valid every 2dn cycle */ |
| AnnaBridge | 172:65be27845400 | 1304 | #define FDCAN_TT_REPEAT_EVERY_4TH_CYCLE ((uint32_t)0x00000004U) /*!< Trigger valid every 4th cycle */ |
| AnnaBridge | 172:65be27845400 | 1305 | #define FDCAN_TT_REPEAT_EVERY_8TH_CYCLE ((uint32_t)0x00000008U) /*!< Trigger valid every 8th cycle */ |
| AnnaBridge | 172:65be27845400 | 1306 | #define FDCAN_TT_REPEAT_EVERY_16TH_CYCLE ((uint32_t)0x00000010U) /*!< Trigger valid every 16th cycle */ |
| AnnaBridge | 172:65be27845400 | 1307 | #define FDCAN_TT_REPEAT_EVERY_32ND_CYCLE ((uint32_t)0x00000020U) /*!< Trigger valid every 32nd cycle */ |
| AnnaBridge | 172:65be27845400 | 1308 | #define FDCAN_TT_REPEAT_EVERY_64TH_CYCLE ((uint32_t)0x00000040U) /*!< Trigger valid every 64th cycle */ |
| AnnaBridge | 172:65be27845400 | 1309 | /** |
| AnnaBridge | 172:65be27845400 | 1310 | * @} |
| AnnaBridge | 172:65be27845400 | 1311 | */ |
| AnnaBridge | 172:65be27845400 | 1312 | |
| AnnaBridge | 172:65be27845400 | 1313 | /** @defgroup FDCAN_TT_Trigger_Type FDCAN TT trigger type |
| AnnaBridge | 172:65be27845400 | 1314 | * @{ |
| AnnaBridge | 172:65be27845400 | 1315 | */ |
| AnnaBridge | 172:65be27845400 | 1316 | #define FDCAN_TT_TX_REF_TRIGGER ((uint32_t)0x00000000U) /*!< Transmit reference message in strictly time-triggered operation */ |
| AnnaBridge | 172:65be27845400 | 1317 | #define FDCAN_TT_TX_REF_TRIGGER_GAP ((uint32_t)0x00000001U) /*!< Transmit reference message in external event-synchronized time-triggered operation */ |
| AnnaBridge | 172:65be27845400 | 1318 | #define FDCAN_TT_TX_TRIGGER_SINGLE ((uint32_t)0x00000002U) /*!< Start a single transmission in an exclusive time window */ |
| AnnaBridge | 172:65be27845400 | 1319 | #define FDCAN_TT_TX_TRIGGER_CONTINUOUS ((uint32_t)0x00000003U) /*!< Start a continuous transmission in an exclusive time window */ |
| AnnaBridge | 172:65be27845400 | 1320 | #define FDCAN_TT_TX_TRIGGER_ARBITRATION ((uint32_t)0x00000004U) /*!< Start a transmission in an arbitration time window */ |
| AnnaBridge | 172:65be27845400 | 1321 | #define FDCAN_TT_TX_TRIGGER_MERGED ((uint32_t)0x00000005U) /*!< Start a merged arbitration window */ |
| AnnaBridge | 172:65be27845400 | 1322 | #define FDCAN_TT_WATCH_TRIGGER ((uint32_t)0x00000006U) /*!< Check for missing reference messages in strictly time-triggered operation */ |
| AnnaBridge | 172:65be27845400 | 1323 | #define FDCAN_TT_WATCH_TRIGGER_GAP ((uint32_t)0x00000007U) /*!< Check for missing reference messages in external event-synchronized time-triggered operation */ |
| AnnaBridge | 172:65be27845400 | 1324 | #define FDCAN_TT_RX_TRIGGER ((uint32_t)0x00000008U) /*!< Check for the reception of periodic messages in exclusive time windows */ |
| AnnaBridge | 172:65be27845400 | 1325 | #define FDCAN_TT_TIME_BASE_TRIGGER ((uint32_t)0x00000009U) /*!< Generate internal/external events depending on TmEventInt/TmEventExt configuration */ |
| AnnaBridge | 172:65be27845400 | 1326 | #define FDCAN_TT_END_OF_LIST ((uint32_t)0x0000000AU) /*!< Illegal trigger, to be assigned to the unused triggers after a FDCAN_TT_WATCH_TRIGGER or FDCAN_TT_WATCH_TRIGGER_GAP */ |
| AnnaBridge | 172:65be27845400 | 1327 | /** |
| AnnaBridge | 172:65be27845400 | 1328 | * @} |
| AnnaBridge | 172:65be27845400 | 1329 | */ |
| AnnaBridge | 172:65be27845400 | 1330 | |
| AnnaBridge | 172:65be27845400 | 1331 | /** @defgroup FDCAN_TT_Time_Mark_Event_Internal FDCAN TT time mark event internal |
| AnnaBridge | 172:65be27845400 | 1332 | * @{ |
| AnnaBridge | 172:65be27845400 | 1333 | */ |
| AnnaBridge | 172:65be27845400 | 1334 | #define FDCAN_TT_TM_NO_INTERNAL_EVENT ((uint32_t)0x00000000U) /*!< No action */ |
| AnnaBridge | 172:65be27845400 | 1335 | #define FDCAN_TT_TM_GEN_INTERNAL_EVENT ((uint32_t)0x00000020U) /*!< Internal event is generated when trigger becomes active */ |
| AnnaBridge | 172:65be27845400 | 1336 | /** |
| AnnaBridge | 172:65be27845400 | 1337 | * @} |
| AnnaBridge | 172:65be27845400 | 1338 | */ |
| AnnaBridge | 172:65be27845400 | 1339 | |
| AnnaBridge | 172:65be27845400 | 1340 | /** @defgroup FDCAN_TT_Time_Mark_Event_External FDCAN TT time mark event external |
| AnnaBridge | 172:65be27845400 | 1341 | * @{ |
| AnnaBridge | 172:65be27845400 | 1342 | */ |
| AnnaBridge | 172:65be27845400 | 1343 | #define FDCAN_TT_TM_NO_EXTERNAL_EVENT ((uint32_t)0x00000000U) /*!< No action */ |
| AnnaBridge | 172:65be27845400 | 1344 | #define FDCAN_TT_TM_GEN_EXTERNAL_EVENT ((uint32_t)0x00000010U) /*!< External event (pulse) is generated when trigger becomes active */ |
| AnnaBridge | 172:65be27845400 | 1345 | /** |
| AnnaBridge | 172:65be27845400 | 1346 | * @} |
| AnnaBridge | 172:65be27845400 | 1347 | */ |
| AnnaBridge | 172:65be27845400 | 1348 | |
| AnnaBridge | 172:65be27845400 | 1349 | /** @defgroup FDCAN_operation_mode FDCAN Operation Mode |
| AnnaBridge | 172:65be27845400 | 1350 | * @{ |
| AnnaBridge | 172:65be27845400 | 1351 | */ |
| AnnaBridge | 172:65be27845400 | 1352 | #define FDCAN_TT_COMMUNICATION_LEVEL1 ((uint32_t)0x00000001U) /*!< Time triggered communication, level 1 */ |
| AnnaBridge | 172:65be27845400 | 1353 | #define FDCAN_TT_COMMUNICATION_LEVEL2 ((uint32_t)0x00000002U) /*!< Time triggered communication, level 2 */ |
| AnnaBridge | 172:65be27845400 | 1354 | #define FDCAN_TT_COMMUNICATION_LEVEL0 ((uint32_t)0x00000003U) /*!< Time triggered communication, level 0 */ |
| AnnaBridge | 172:65be27845400 | 1355 | /** |
| AnnaBridge | 172:65be27845400 | 1356 | * @} |
| AnnaBridge | 172:65be27845400 | 1357 | */ |
| AnnaBridge | 172:65be27845400 | 1358 | |
| AnnaBridge | 172:65be27845400 | 1359 | /** @defgroup FDCAN_TT_operation FDCAN TT Operation |
| AnnaBridge | 172:65be27845400 | 1360 | * @{ |
| AnnaBridge | 172:65be27845400 | 1361 | */ |
| AnnaBridge | 172:65be27845400 | 1362 | #define FDCAN_STRICTLY_TT_OPERATION ((uint32_t)0x00000000U) /*!< Strictly time-triggered operation */ |
| AnnaBridge | 172:65be27845400 | 1363 | #define FDCAN_EXT_EVT_SYNC_TT_OPERATION ((uint32_t)FDCAN_TTOCF_GEN) /*!< External event-synchronized time-triggered operation */ |
| AnnaBridge | 172:65be27845400 | 1364 | /** |
| AnnaBridge | 172:65be27845400 | 1365 | * @} |
| AnnaBridge | 172:65be27845400 | 1366 | */ |
| AnnaBridge | 172:65be27845400 | 1367 | |
| AnnaBridge | 172:65be27845400 | 1368 | /** @defgroup FDCAN_TT_time_master FDCAN TT Time Master |
| AnnaBridge | 172:65be27845400 | 1369 | * @{ |
| AnnaBridge | 172:65be27845400 | 1370 | */ |
| AnnaBridge | 172:65be27845400 | 1371 | #define FDCAN_TT_SLAVE ((uint32_t)0x00000000U) /*!< Time slave */ |
| AnnaBridge | 172:65be27845400 | 1372 | #define FDCAN_TT_POTENTIAL_MASTER ((uint32_t)FDCAN_TTOCF_TM) /*!< Potential time master */ |
| AnnaBridge | 172:65be27845400 | 1373 | /** |
| AnnaBridge | 172:65be27845400 | 1374 | * @} |
| AnnaBridge | 172:65be27845400 | 1375 | */ |
| AnnaBridge | 172:65be27845400 | 1376 | |
| AnnaBridge | 172:65be27845400 | 1377 | /** @defgroup FDCAN_TT_external_clk_sync FDCAN TT External Clock Synchronization |
| AnnaBridge | 172:65be27845400 | 1378 | * @{ |
| AnnaBridge | 172:65be27845400 | 1379 | */ |
| AnnaBridge | 172:65be27845400 | 1380 | #define FDCAN_TT_EXT_CLK_SYNC_DISABLE ((uint32_t)0x00000000U) /*!< External clock synchronization in Level 0,2 disabled */ |
| AnnaBridge | 172:65be27845400 | 1381 | #define FDCAN_TT_EXT_CLK_SYNC_ENABLE ((uint32_t)FDCAN_TTOCF_EECS) /*!< External clock synchronization in Level 0,2 enabled */ |
| AnnaBridge | 172:65be27845400 | 1382 | /** |
| AnnaBridge | 172:65be27845400 | 1383 | * @} |
| AnnaBridge | 172:65be27845400 | 1384 | */ |
| AnnaBridge | 172:65be27845400 | 1385 | |
| AnnaBridge | 172:65be27845400 | 1386 | /** @defgroup FDCAN_TT_global_time_filtering FDCAN TT Global Time Filtering |
| AnnaBridge | 172:65be27845400 | 1387 | * @{ |
| AnnaBridge | 172:65be27845400 | 1388 | */ |
| AnnaBridge | 172:65be27845400 | 1389 | #define FDCAN_TT_GLOB_TIME_FILT_DISABLE ((uint32_t)0x00000000U) /*!< Global time filtering in Level 0,2 disabled */ |
| AnnaBridge | 172:65be27845400 | 1390 | #define FDCAN_TT_GLOB_TIME_FILT_ENABLE ((uint32_t)FDCAN_TTOCF_EGTF) /*!< Global time filtering in Level 0,2 enabled */ |
| AnnaBridge | 172:65be27845400 | 1391 | /** |
| AnnaBridge | 172:65be27845400 | 1392 | * @} |
| AnnaBridge | 172:65be27845400 | 1393 | */ |
| AnnaBridge | 172:65be27845400 | 1394 | |
| AnnaBridge | 172:65be27845400 | 1395 | /** @defgroup FDCAN_TT_auto_clk_calibration FDCAN TT Automatic Clock Calibration |
| AnnaBridge | 172:65be27845400 | 1396 | * @{ |
| AnnaBridge | 172:65be27845400 | 1397 | */ |
| AnnaBridge | 172:65be27845400 | 1398 | #define FDCAN_TT_AUTO_CLK_CALIB_DISABLE ((uint32_t)0x00000000U) /*!< Automatic clock calibration in Level 0,2 disabled */ |
| AnnaBridge | 172:65be27845400 | 1399 | #define FDCAN_TT_AUTO_CLK_CALIB_ENABLE ((uint32_t)FDCAN_TTOCF_ECC) /*!< Automatic clock calibration in Level 0,2 enabled */ |
| AnnaBridge | 172:65be27845400 | 1400 | /** |
| AnnaBridge | 172:65be27845400 | 1401 | * @} |
| AnnaBridge | 172:65be27845400 | 1402 | */ |
| AnnaBridge | 172:65be27845400 | 1403 | |
| AnnaBridge | 172:65be27845400 | 1404 | /** @defgroup FDCAN_TT_event_trig_polarity FDCAN TT Event Trigger Polarity |
| AnnaBridge | 172:65be27845400 | 1405 | * @{ |
| AnnaBridge | 172:65be27845400 | 1406 | */ |
| AnnaBridge | 172:65be27845400 | 1407 | #define FDCAN_TT_EVT_TRIG_POL_RISING ((uint32_t)0x00000000U) /*!< Rising edge trigger */ |
| AnnaBridge | 172:65be27845400 | 1408 | #define FDCAN_TT_EVT_TRIG_POL_FALLING ((uint32_t)FDCAN_TTOCF_EVTP) /*!< Falling edge trigger */ |
| AnnaBridge | 172:65be27845400 | 1409 | /** |
| AnnaBridge | 172:65be27845400 | 1410 | * @} |
| AnnaBridge | 172:65be27845400 | 1411 | */ |
| AnnaBridge | 172:65be27845400 | 1412 | |
| AnnaBridge | 172:65be27845400 | 1413 | /** @defgroup FDCAN_TT_basic_cycle_number FDCAN TT Basic Cycle Number |
| AnnaBridge | 172:65be27845400 | 1414 | * @{ |
| AnnaBridge | 172:65be27845400 | 1415 | */ |
| AnnaBridge | 172:65be27845400 | 1416 | #define FDCAN_TT_CYCLES_PER_MATRIX_1 ((uint32_t)0x00000000U) /*!< 1 Basic Cycle per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1417 | #define FDCAN_TT_CYCLES_PER_MATRIX_2 ((uint32_t)0x00000001U) /*!< 2 Basic Cycles per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1418 | #define FDCAN_TT_CYCLES_PER_MATRIX_4 ((uint32_t)0x00000003U) /*!< 4 Basic Cycles per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1419 | #define FDCAN_TT_CYCLES_PER_MATRIX_8 ((uint32_t)0x00000007U) /*!< 8 Basic Cycles per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1420 | #define FDCAN_TT_CYCLES_PER_MATRIX_16 ((uint32_t)0x0000000FU) /*!< 16 Basic Cycles per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1421 | #define FDCAN_TT_CYCLES_PER_MATRIX_32 ((uint32_t)0x0000001FU) /*!< 32 Basic Cycles per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1422 | #define FDCAN_TT_CYCLES_PER_MATRIX_64 ((uint32_t)0x0000003FU) /*!< 64 Basic Cycles per Matrix */ |
| AnnaBridge | 172:65be27845400 | 1423 | /** |
| AnnaBridge | 172:65be27845400 | 1424 | * @} |
| AnnaBridge | 172:65be27845400 | 1425 | */ |
| AnnaBridge | 172:65be27845400 | 1426 | |
| AnnaBridge | 172:65be27845400 | 1427 | /** @defgroup FDCAN_TT_cycle_start_sync FDCAN TT Cycle Start Sync |
| AnnaBridge | 172:65be27845400 | 1428 | * @{ |
| AnnaBridge | 172:65be27845400 | 1429 | */ |
| AnnaBridge | 172:65be27845400 | 1430 | #define FDCAN_TT_NO_SYNC_PULSE ((uint32_t)0x00000000U) /*!< No sync pulse */ |
| AnnaBridge | 172:65be27845400 | 1431 | #define FDCAN_TT_SYNC_BASIC_CYCLE_START ((uint32_t)0x00000040U) /*!< Sync pulse at start of basic cycle */ |
| AnnaBridge | 172:65be27845400 | 1432 | #define FDCAN_TT_SYNC_MATRIX_START ((uint32_t)0x00000080U) /*!< Sync pulse at start of matrix */ |
| AnnaBridge | 172:65be27845400 | 1433 | /** |
| AnnaBridge | 172:65be27845400 | 1434 | * @} |
| AnnaBridge | 172:65be27845400 | 1435 | */ |
| AnnaBridge | 172:65be27845400 | 1436 | |
| AnnaBridge | 172:65be27845400 | 1437 | /** @defgroup FDCAN_TT_stop_watch_trig_selection FDCAN TT Stop Watch Trigger Selection |
| AnnaBridge | 172:65be27845400 | 1438 | * @{ |
| AnnaBridge | 172:65be27845400 | 1439 | */ |
| AnnaBridge | 172:65be27845400 | 1440 | #define FDCAN_TT_STOP_WATCH_TRIGGER_0 ((uint32_t)0x00000000U) /*!< TIM2 selected as stop watch trigger */ |
| AnnaBridge | 172:65be27845400 | 1441 | #define FDCAN_TT_STOP_WATCH_TRIGGER_1 ((uint32_t)0x00000001U) /*!< TIM3 selected as stop watch trigger */ |
| AnnaBridge | 172:65be27845400 | 1442 | #define FDCAN_TT_STOP_WATCH_TRIGGER_2 ((uint32_t)0x00000002U) /*!< ETH selected as stop watch trigger */ |
| AnnaBridge | 172:65be27845400 | 1443 | #define FDCAN_TT_STOP_WATCH_TRIGGER_3 ((uint32_t)0x00000003U) /*!< HRTIM selected as stop watch trigger */ |
| AnnaBridge | 172:65be27845400 | 1444 | /** |
| AnnaBridge | 172:65be27845400 | 1445 | * @} |
| AnnaBridge | 172:65be27845400 | 1446 | */ |
| AnnaBridge | 172:65be27845400 | 1447 | |
| AnnaBridge | 172:65be27845400 | 1448 | /** @defgroup FDCAN_TT_event_trig_selection FDCAN TT Event Trigger Selection |
| AnnaBridge | 172:65be27845400 | 1449 | * @{ |
| AnnaBridge | 172:65be27845400 | 1450 | */ |
| AnnaBridge | 172:65be27845400 | 1451 | #define FDCAN_TT_EVENT_TRIGGER_0 ((uint32_t)0x00000000U) /*!< TIM2 selected as event trigger */ |
| AnnaBridge | 172:65be27845400 | 1452 | #define FDCAN_TT_EVENT_TRIGGER_1 ((uint32_t)0x00000010U) /*!< TIM3 selected as event trigger */ |
| AnnaBridge | 172:65be27845400 | 1453 | #define FDCAN_TT_EVENT_TRIGGER_2 ((uint32_t)0x00000020U) /*!< ETH selected as event trigger */ |
| AnnaBridge | 172:65be27845400 | 1454 | #define FDCAN_TT_EVENT_TRIGGER_3 ((uint32_t)0x00000030U) /*!< HRTIM selected as event trigger */ |
| AnnaBridge | 172:65be27845400 | 1455 | /** |
| AnnaBridge | 172:65be27845400 | 1456 | * @} |
| AnnaBridge | 172:65be27845400 | 1457 | */ |
| AnnaBridge | 172:65be27845400 | 1458 | |
| AnnaBridge | 172:65be27845400 | 1459 | /** @defgroup FDCAN_TT_stop_watch_source FDCAN TT Stop Watch Source |
| AnnaBridge | 172:65be27845400 | 1460 | * @{ |
| AnnaBridge | 172:65be27845400 | 1461 | */ |
| AnnaBridge | 172:65be27845400 | 1462 | #define FDCAN_TT_STOP_WATCH_DISABLED ((uint32_t)0x00000000U) /*!< Stop Watch disabled */ |
| AnnaBridge | 172:65be27845400 | 1463 | #define FDCAN_TT_STOP_WATCH_CYCLE_TIME ((uint32_t)0x00000008U) /*!< Actual value of cycle time is copied to Capture Time register (TTCPT.SWV) */ |
| AnnaBridge | 172:65be27845400 | 1464 | #define FDCAN_TT_STOP_WATCH_LOCAL_TIME ((uint32_t)0x00000010U) /*!< Actual value of local time is copied to Capture Time register (TTCPT.SWV) */ |
| AnnaBridge | 172:65be27845400 | 1465 | #define FDCAN_TT_STOP_WATCH_GLOBAL_TIME ((uint32_t)0x00000018U) /*!< Actual value of global time is copied to Capture Time register (TTCPT.SWV) */ |
| AnnaBridge | 172:65be27845400 | 1466 | /** |
| AnnaBridge | 172:65be27845400 | 1467 | * @} |
| AnnaBridge | 172:65be27845400 | 1468 | */ |
| AnnaBridge | 172:65be27845400 | 1469 | |
| AnnaBridge | 172:65be27845400 | 1470 | /** @defgroup FDCAN_TT_stop_watch_polarity FDCAN TT Stop Watch Polarity |
| AnnaBridge | 172:65be27845400 | 1471 | * @{ |
| AnnaBridge | 172:65be27845400 | 1472 | */ |
| AnnaBridge | 172:65be27845400 | 1473 | #define FDCAN_TT_STOP_WATCH_RISING ((uint32_t)0x00000000U) /*!< Selected stop watch source is captured at rising edge of fdcan1_swt */ |
| AnnaBridge | 172:65be27845400 | 1474 | #define FDCAN_TT_STOP_WATCH_FALLING ((uint32_t)0x00000004U) /*!< Selected stop watch source is captured at falling edge of fdcan1_swt */ |
| AnnaBridge | 172:65be27845400 | 1475 | /** |
| AnnaBridge | 172:65be27845400 | 1476 | * @} |
| AnnaBridge | 172:65be27845400 | 1477 | */ |
| AnnaBridge | 172:65be27845400 | 1478 | |
| AnnaBridge | 172:65be27845400 | 1479 | /** @defgroup FDCAN_TT_time_mark_source FDCAN TT Time Mark Source |
| AnnaBridge | 172:65be27845400 | 1480 | * @{ |
| AnnaBridge | 172:65be27845400 | 1481 | */ |
| AnnaBridge | 172:65be27845400 | 1482 | #define FDCAN_TT_REG_TIMEMARK_DIABLED ((uint32_t)0x00000000U) /*!< No Register Time Mark Interrupt generated */ |
| AnnaBridge | 172:65be27845400 | 1483 | #define FDCAN_TT_REG_TIMEMARK_CYC_TIME ((uint32_t)0x00000040U) /*!< Register Time Mark Interrupt if Time Mark = cycle time */ |
| AnnaBridge | 172:65be27845400 | 1484 | #define FDCAN_TT_REG_TIMEMARK_LOC_TIME ((uint32_t)0x00000080U) /*!< Register Time Mark Interrupt if Time Mark = local time */ |
| AnnaBridge | 172:65be27845400 | 1485 | #define FDCAN_TT_REG_TIMEMARK_GLO_TIME ((uint32_t)0x000000C0U) /*!< Register Time Mark Interrupt if Time Mark = global time */ |
| AnnaBridge | 172:65be27845400 | 1486 | /** |
| AnnaBridge | 172:65be27845400 | 1487 | * @} |
| AnnaBridge | 172:65be27845400 | 1488 | */ |
| AnnaBridge | 172:65be27845400 | 1489 | |
| AnnaBridge | 172:65be27845400 | 1490 | /** @defgroup FDCAN_TT_error_level FDCAN TT Error Level |
| AnnaBridge | 172:65be27845400 | 1491 | * @{ |
| AnnaBridge | 172:65be27845400 | 1492 | */ |
| AnnaBridge | 172:65be27845400 | 1493 | #define FDCAN_TT_NO_ERROR ((uint32_t)0x00000000U) /*!< Severity 0 - No Error */ |
| AnnaBridge | 172:65be27845400 | 1494 | #define FDCAN_TT_WARNING ((uint32_t)0x00000001U) /*!< Severity 1 - Warning */ |
| AnnaBridge | 172:65be27845400 | 1495 | #define FDCAN_TT_ERROR ((uint32_t)0x00000002U) /*!< Severity 2 - Error */ |
| AnnaBridge | 172:65be27845400 | 1496 | #define FDCAN_TT_SEVERE_ERROR ((uint32_t)0x00000003U) /*!< Severity 3 - Severe Error */ |
| AnnaBridge | 172:65be27845400 | 1497 | /** |
| AnnaBridge | 172:65be27845400 | 1498 | * @} |
| AnnaBridge | 172:65be27845400 | 1499 | */ |
| AnnaBridge | 172:65be27845400 | 1500 | |
| AnnaBridge | 172:65be27845400 | 1501 | /** @defgroup FDCAN_TT_master_state FDCAN TT Master State |
| AnnaBridge | 172:65be27845400 | 1502 | * @{ |
| AnnaBridge | 172:65be27845400 | 1503 | */ |
| AnnaBridge | 172:65be27845400 | 1504 | #define FDCAN_TT_MASTER_OFF ((uint32_t)0x00000000U) /*!< Master_Off, no master properties relevant */ |
| AnnaBridge | 172:65be27845400 | 1505 | #define FDCAN_TT_TIME_SLAVE ((uint32_t)0x00000004U) /*!< Operating as Time Slave */ |
| AnnaBridge | 172:65be27845400 | 1506 | #define FDCAN_TT_BACKUP_TIME_MASTER ((uint32_t)0x00000008U) /*!< Operating as Backup Time Master */ |
| AnnaBridge | 172:65be27845400 | 1507 | #define FDCAN_TT_CURRENT_TIME_MASTER ((uint32_t)0x0000000CU) /*!< Operating as current Time Master */ |
| AnnaBridge | 172:65be27845400 | 1508 | /** |
| AnnaBridge | 172:65be27845400 | 1509 | * @} |
| AnnaBridge | 172:65be27845400 | 1510 | */ |
| AnnaBridge | 172:65be27845400 | 1511 | |
| AnnaBridge | 172:65be27845400 | 1512 | /** @defgroup FDCAN_TT_sync_state FDCAN TT Synchronization State |
| AnnaBridge | 172:65be27845400 | 1513 | * @{ |
| AnnaBridge | 172:65be27845400 | 1514 | */ |
| AnnaBridge | 172:65be27845400 | 1515 | #define FDCAN_TT_OUT_OF_SYNC ((uint32_t)0x00000000U) /*!< Out of Synchronization */ |
| AnnaBridge | 172:65be27845400 | 1516 | #define FDCAN_TT_SYNCHRONIZING ((uint32_t)0x00000010U) /*!< Synchronizing to communication */ |
| AnnaBridge | 172:65be27845400 | 1517 | #define FDCAN_TT_IN_GAP ((uint32_t)0x00000020U) /*!< Schedule suspended by Gap */ |
| AnnaBridge | 172:65be27845400 | 1518 | #define FDCAN_TT_IN_SCHEDULE ((uint32_t)0x00000030U) /*!< Synchronized to schedule */ |
| AnnaBridge | 172:65be27845400 | 1519 | /** |
| AnnaBridge | 172:65be27845400 | 1520 | * @} |
| AnnaBridge | 172:65be27845400 | 1521 | */ |
| AnnaBridge | 172:65be27845400 | 1522 | |
| AnnaBridge | 172:65be27845400 | 1523 | /** @defgroup Interrupt_Masks Interrupt masks |
| AnnaBridge | 172:65be27845400 | 1524 | * @{ |
| AnnaBridge | 172:65be27845400 | 1525 | */ |
| AnnaBridge | 172:65be27845400 | 1526 | #define FDCAN_IR_MASK ((uint32_t)0x3FCFFFFFU) /*!< FDCAN interrupts mask */ |
| AnnaBridge | 172:65be27845400 | 1527 | #define CCU_IR_MASK ((uint32_t)0xC0000000U) /*!< CCU interrupts mask */ |
| AnnaBridge | 172:65be27845400 | 1528 | /** |
| AnnaBridge | 172:65be27845400 | 1529 | * @} |
| AnnaBridge | 172:65be27845400 | 1530 | */ |
| AnnaBridge | 172:65be27845400 | 1531 | |
| AnnaBridge | 172:65be27845400 | 1532 | /** @defgroup FDCAN_flags FDCAN Flags |
| AnnaBridge | 172:65be27845400 | 1533 | * @{ |
| AnnaBridge | 172:65be27845400 | 1534 | */ |
| AnnaBridge | 172:65be27845400 | 1535 | #define FDCAN_FLAG_TX_COMPLETE FDCAN_IR_TC /*!< Transmission Completed */ |
| AnnaBridge | 172:65be27845400 | 1536 | #define FDCAN_FLAG_TX_ABORT_COMPLETE FDCAN_IR_TCF /*!< Transmission Cancellation Finished */ |
| AnnaBridge | 172:65be27845400 | 1537 | #define FDCAN_FLAG_TX_FIFO_EMPTY FDCAN_IR_TFE /*!< Tx FIFO Empty */ |
| AnnaBridge | 172:65be27845400 | 1538 | #define FDCAN_FLAG_RX_HIGH_PRIORITY_MSG FDCAN_IR_HPM /*!< High priority message received */ |
| AnnaBridge | 172:65be27845400 | 1539 | #define FDCAN_FLAG_RX_BUFFER_NEW_MESSAGE FDCAN_IR_DRX /*!< At least one received message stored into a Rx Buffer */ |
| AnnaBridge | 172:65be27845400 | 1540 | #define FDCAN_FLAG_TX_EVT_FIFO_ELT_LOST FDCAN_IR_TEFL /*!< Tx Event FIFO element lost */ |
| AnnaBridge | 172:65be27845400 | 1541 | #define FDCAN_FLAG_TX_EVT_FIFO_FULL FDCAN_IR_TEFF /*!< Tx Event FIFO full */ |
| AnnaBridge | 172:65be27845400 | 1542 | #define FDCAN_FLAG_TX_EVT_FIFO_WATERMARK FDCAN_IR_TEFW /*!< Tx Event FIFO fill level reached watermark */ |
| AnnaBridge | 172:65be27845400 | 1543 | #define FDCAN_FLAG_TX_EVT_FIFO_NEW_DATA FDCAN_IR_TEFN /*!< Tx Handler wrote Tx Event FIFO element */ |
| AnnaBridge | 172:65be27845400 | 1544 | #define FDCAN_FLAG_RX_FIFO0_MESSAGE_LOST FDCAN_IR_RF0L /*!< Rx FIFO 0 message lost */ |
| AnnaBridge | 172:65be27845400 | 1545 | #define FDCAN_FLAG_RX_FIFO0_FULL FDCAN_IR_RF0F /*!< Rx FIFO 0 full */ |
| AnnaBridge | 172:65be27845400 | 1546 | #define FDCAN_FLAG_RX_FIFO0_WATERMARK FDCAN_IR_RF0W /*!< Rx FIFO 0 fill level reached watermark */ |
| AnnaBridge | 172:65be27845400 | 1547 | #define FDCAN_FLAG_RX_FIFO0_NEW_MESSAGE FDCAN_IR_RF0N /*!< New message written to Rx FIFO 0 */ |
| AnnaBridge | 172:65be27845400 | 1548 | #define FDCAN_FLAG_RX_FIFO1_MESSAGE_LOST FDCAN_IR_RF1L /*!< Rx FIFO 1 message lost */ |
| AnnaBridge | 172:65be27845400 | 1549 | #define FDCAN_FLAG_RX_FIFO1_FULL FDCAN_IR_RF1F /*!< Rx FIFO 1 full */ |
| AnnaBridge | 172:65be27845400 | 1550 | #define FDCAN_FLAG_RX_FIFO1_WATERMARK FDCAN_IR_RF1W /*!< Rx FIFO 1 fill level reached watermark */ |
| AnnaBridge | 172:65be27845400 | 1551 | #define FDCAN_FLAG_RX_FIFO1_NEW_MESSAGE FDCAN_IR_RF1N /*!< New message written to Rx FIFO 1 */ |
| AnnaBridge | 172:65be27845400 | 1552 | #define FDCAN_FLAG_RAM_ACCESS_FAILURE FDCAN_IR_MRAF /*!< Message RAM access failure occurred */ |
| AnnaBridge | 172:65be27845400 | 1553 | #define FDCAN_FLAG_ERROR_LOGGING_OVERFLOW FDCAN_IR_ELO /*!< Overflow of FDCAN Error Logging Counter occurred */ |
| AnnaBridge | 172:65be27845400 | 1554 | #define FDCAN_FLAG_ERROR_PASSIVE FDCAN_IR_EP /*!< Error_Passive status changed */ |
| AnnaBridge | 172:65be27845400 | 1555 | #define FDCAN_FLAG_ERROR_WARNING FDCAN_IR_EW /*!< Error_Warning status changed */ |
| AnnaBridge | 172:65be27845400 | 1556 | #define FDCAN_FLAG_BUS_OFF FDCAN_IR_BO /*!< Bus_Off status changed */ |
| AnnaBridge | 172:65be27845400 | 1557 | #define FDCAN_FLAG_RAM_WATCHDOG FDCAN_IR_WDI /*!< Message RAM Watchdog event due to missing READY */ |
| AnnaBridge | 172:65be27845400 | 1558 | #define FDCAN_FLAG_ARB_PROTOCOL_ERROR FDCAN_IR_PEA /*!< Protocol error in arbitration phase detected */ |
| AnnaBridge | 172:65be27845400 | 1559 | #define FDCAN_FLAG_DATA_PROTOCOL_ERROR FDCAN_IR_PED /*!< Protocol error in data phase detected */ |
| AnnaBridge | 172:65be27845400 | 1560 | #define FDCAN_FLAG_RESERVED_ADDRESS_ACCESS FDCAN_IR_ARA /*!< Access to reserved address occurred */ |
| AnnaBridge | 172:65be27845400 | 1561 | #define FDCAN_FLAG_TIMESTAMP_WRAPAROUND FDCAN_IR_TSW /*!< Timestamp counter wrapped around */ |
| AnnaBridge | 172:65be27845400 | 1562 | #define FDCAN_FLAG_TIMEOUT_OCCURRED FDCAN_IR_TOO /*!< Timeout reached */ |
| AnnaBridge | 172:65be27845400 | 1563 | #define FDCAN_FLAG_CALIB_STATE_CHANGED (FDCANCCU_IR_CSC << 30) /*!< Clock calibration state changed */ |
| AnnaBridge | 172:65be27845400 | 1564 | #define FDCAN_FLAG_CALIB_WATCHDOG_EVENT (FDCANCCU_IR_CWE << 30) /*!< Clock calibration watchdog event occurred */ |
| AnnaBridge | 172:65be27845400 | 1565 | /** |
| AnnaBridge | 172:65be27845400 | 1566 | * @} |
| AnnaBridge | 172:65be27845400 | 1567 | */ |
| AnnaBridge | 172:65be27845400 | 1568 | |
| AnnaBridge | 172:65be27845400 | 1569 | /** @defgroup FDCAN_Interrupts FDCAN Interrupts |
| AnnaBridge | 172:65be27845400 | 1570 | * @{ |
| AnnaBridge | 172:65be27845400 | 1571 | */ |
| AnnaBridge | 172:65be27845400 | 1572 | |
| AnnaBridge | 172:65be27845400 | 1573 | /** @defgroup FDCAN_Tx_Interrupts FDCAN Tx Interrupts |
| AnnaBridge | 172:65be27845400 | 1574 | * @{ |
| AnnaBridge | 172:65be27845400 | 1575 | */ |
| AnnaBridge | 172:65be27845400 | 1576 | #define FDCAN_IT_TX_COMPLETE FDCAN_IE_TCE /*!< Transmission Completed */ |
| AnnaBridge | 172:65be27845400 | 1577 | #define FDCAN_IT_TX_ABORT_COMPLETE FDCAN_IE_TCFE /*!< Transmission Cancellation Finished */ |
| AnnaBridge | 172:65be27845400 | 1578 | #define FDCAN_IT_TX_FIFO_EMPTY FDCAN_IE_TFEE /*!< Tx FIFO Empty */ |
| AnnaBridge | 172:65be27845400 | 1579 | /** |
| AnnaBridge | 172:65be27845400 | 1580 | * @} |
| AnnaBridge | 172:65be27845400 | 1581 | */ |
| AnnaBridge | 172:65be27845400 | 1582 | |
| AnnaBridge | 172:65be27845400 | 1583 | /** @defgroup FDCAN_Rx_Interrupts FDCAN Rx Interrupts |
| AnnaBridge | 172:65be27845400 | 1584 | * @{ |
| AnnaBridge | 172:65be27845400 | 1585 | */ |
| AnnaBridge | 172:65be27845400 | 1586 | #define FDCAN_IT_RX_HIGH_PRIORITY_MSG FDCAN_IE_HPME /*!< High priority message received */ |
| AnnaBridge | 172:65be27845400 | 1587 | #define FDCAN_IT_RX_BUFFER_NEW_MESSAGE FDCAN_IE_DRXE /*!< At least one received message stored into a Rx Buffer */ |
| AnnaBridge | 172:65be27845400 | 1588 | /** |
| AnnaBridge | 172:65be27845400 | 1589 | * @} |
| AnnaBridge | 172:65be27845400 | 1590 | */ |
| AnnaBridge | 172:65be27845400 | 1591 | |
| AnnaBridge | 172:65be27845400 | 1592 | /** @defgroup FDCAN_Counter_Interrupts FDCAN Counter Interrupts |
| AnnaBridge | 172:65be27845400 | 1593 | * @{ |
| AnnaBridge | 172:65be27845400 | 1594 | */ |
| AnnaBridge | 172:65be27845400 | 1595 | #define FDCAN_IT_TIMESTAMP_WRAPAROUND FDCAN_IE_TSWE /*!< Timestamp counter wrapped around */ |
| AnnaBridge | 172:65be27845400 | 1596 | #define FDCAN_IT_TIMEOUT_OCCURRED FDCAN_IE_TOOE /*!< Timeout reached */ |
| AnnaBridge | 172:65be27845400 | 1597 | /** |
| AnnaBridge | 172:65be27845400 | 1598 | * @} |
| AnnaBridge | 172:65be27845400 | 1599 | */ |
| AnnaBridge | 172:65be27845400 | 1600 | |
| AnnaBridge | 172:65be27845400 | 1601 | /** @defgroup FDCAN_Clock_Calibration_Interrupts Clock Calibration Interrupts |
| AnnaBridge | 172:65be27845400 | 1602 | * @{ |
| AnnaBridge | 172:65be27845400 | 1603 | */ |
| AnnaBridge | 172:65be27845400 | 1604 | #define FDCAN_IT_CALIB_STATE_CHANGED (FDCANCCU_IE_CSCE << 30) /*!< Clock calibration state changed */ |
| AnnaBridge | 172:65be27845400 | 1605 | #define FDCAN_IT_CALIB_WATCHDOG_EVENT (FDCANCCU_IE_CWEE << 30) /*!< Clock calibration watchdog event occurred */ |
| AnnaBridge | 172:65be27845400 | 1606 | /** |
| AnnaBridge | 172:65be27845400 | 1607 | * @} |
| AnnaBridge | 172:65be27845400 | 1608 | */ |
| AnnaBridge | 172:65be27845400 | 1609 | |
| AnnaBridge | 172:65be27845400 | 1610 | /** @defgroup FDCAN_Tx_Event_Fifo_Interrupts FDCAN Tx Event FIFO Interrupts |
| AnnaBridge | 172:65be27845400 | 1611 | * @{ |
| AnnaBridge | 172:65be27845400 | 1612 | */ |
| AnnaBridge | 172:65be27845400 | 1613 | #define FDCAN_IT_TX_EVT_FIFO_ELT_LOST FDCAN_IE_TEFLE /*!< Tx Event FIFO element lost */ |
| AnnaBridge | 172:65be27845400 | 1614 | #define FDCAN_IT_TX_EVT_FIFO_FULL FDCAN_IE_TEFFE /*!< Tx Event FIFO full */ |
| AnnaBridge | 172:65be27845400 | 1615 | #define FDCAN_IT_TX_EVT_FIFO_WATERMARK FDCAN_IE_TEFWE /*!< Tx Event FIFO fill level reached watermark */ |
| AnnaBridge | 172:65be27845400 | 1616 | #define FDCAN_IT_TX_EVT_FIFO_NEW_DATA FDCAN_IE_TEFNE /*!< Tx Handler wrote Tx Event FIFO element */ |
| AnnaBridge | 172:65be27845400 | 1617 | /** |
| AnnaBridge | 172:65be27845400 | 1618 | * @} |
| AnnaBridge | 172:65be27845400 | 1619 | */ |
| AnnaBridge | 172:65be27845400 | 1620 | |
| AnnaBridge | 172:65be27845400 | 1621 | /** @defgroup FDCAN_Rx_Fifo0_Interrupts FDCAN Rx FIFO 0 Interrupts |
| AnnaBridge | 172:65be27845400 | 1622 | * @{ |
| AnnaBridge | 172:65be27845400 | 1623 | */ |
| AnnaBridge | 172:65be27845400 | 1624 | #define FDCAN_IT_RX_FIFO0_MESSAGE_LOST FDCAN_IE_RF0LE /*!< Rx FIFO 0 message lost */ |
| AnnaBridge | 172:65be27845400 | 1625 | #define FDCAN_IT_RX_FIFO0_FULL FDCAN_IE_RF0FE /*!< Rx FIFO 0 full */ |
| AnnaBridge | 172:65be27845400 | 1626 | #define FDCAN_IT_RX_FIFO0_WATERMARK FDCAN_IE_RF0WE /*!< Rx FIFO 0 fill level reached watermark */ |
| AnnaBridge | 172:65be27845400 | 1627 | #define FDCAN_IT_RX_FIFO0_NEW_MESSAGE FDCAN_IE_RF0NE /*!< New message written to Rx FIFO 0 */ |
| AnnaBridge | 172:65be27845400 | 1628 | /** |
| AnnaBridge | 172:65be27845400 | 1629 | * @} |
| AnnaBridge | 172:65be27845400 | 1630 | */ |
| AnnaBridge | 172:65be27845400 | 1631 | |
| AnnaBridge | 172:65be27845400 | 1632 | /** @defgroup FDCAN_Rx_Fifo1_Interrupts FDCAN Rx FIFO 1 Interrupts |
| AnnaBridge | 172:65be27845400 | 1633 | * @{ |
| AnnaBridge | 172:65be27845400 | 1634 | */ |
| AnnaBridge | 172:65be27845400 | 1635 | #define FDCAN_IT_RX_FIFO1_MESSAGE_LOST FDCAN_IE_RF1LE /*!< Rx FIFO 1 message lost */ |
| AnnaBridge | 172:65be27845400 | 1636 | #define FDCAN_IT_RX_FIFO1_FULL FDCAN_IE_RF1FE /*!< Rx FIFO 1 full */ |
| AnnaBridge | 172:65be27845400 | 1637 | #define FDCAN_IT_RX_FIFO1_WATERMARK FDCAN_IE_RF1WE /*!< Rx FIFO 1 fill level reached watermark */ |
| AnnaBridge | 172:65be27845400 | 1638 | #define FDCAN_IT_RX_FIFO1_NEW_MESSAGE FDCAN_IE_RF1NE /*!< New message written to Rx FIFO 1 */ |
| AnnaBridge | 172:65be27845400 | 1639 | /** |
| AnnaBridge | 172:65be27845400 | 1640 | * @} |
| AnnaBridge | 172:65be27845400 | 1641 | */ |
| AnnaBridge | 172:65be27845400 | 1642 | |
| AnnaBridge | 172:65be27845400 | 1643 | /** @defgroup FDCAN_Error_Interrupts FDCAN Error Interrupts |
| AnnaBridge | 172:65be27845400 | 1644 | * @{ |
| AnnaBridge | 172:65be27845400 | 1645 | */ |
| AnnaBridge | 172:65be27845400 | 1646 | #define FDCAN_IT_RAM_ACCESS_FAILURE FDCAN_IE_MRAFE /*!< Message RAM access failure occurred */ |
| AnnaBridge | 172:65be27845400 | 1647 | #define FDCAN_IT_ERROR_LOGGING_OVERFLOW FDCAN_IE_ELOE /*!< Overflow of FDCAN Error Logging Counter occurred */ |
| AnnaBridge | 172:65be27845400 | 1648 | #define FDCAN_IT_RAM_WATCHDOG FDCAN_IE_WDIE /*!< Message RAM Watchdog event due to missing READY */ |
| AnnaBridge | 172:65be27845400 | 1649 | #define FDCAN_IT_ARB_PROTOCOL_ERROR FDCAN_IE_PEAE /*!< Protocol error in arbitration phase detected */ |
| AnnaBridge | 172:65be27845400 | 1650 | #define FDCAN_IT_DATA_PROTOCOL_ERROR FDCAN_IE_PEDE /*!< Protocol error in data phase detected */ |
| AnnaBridge | 172:65be27845400 | 1651 | #define FDCAN_IT_RESERVED_ADDRESS_ACCESS FDCAN_IE_ARAE /*!< Access to reserved address occurred */ |
| AnnaBridge | 172:65be27845400 | 1652 | /** |
| AnnaBridge | 172:65be27845400 | 1653 | * @} |
| AnnaBridge | 172:65be27845400 | 1654 | */ |
| AnnaBridge | 172:65be27845400 | 1655 | |
| AnnaBridge | 172:65be27845400 | 1656 | /** @defgroup FDCAN_Error_Status_Interrupts FDCAN Error Status Interrupts |
| AnnaBridge | 172:65be27845400 | 1657 | * @{ |
| AnnaBridge | 172:65be27845400 | 1658 | */ |
| AnnaBridge | 172:65be27845400 | 1659 | #define FDCAN_IT_ERROR_PASSIVE FDCAN_IE_EPE /*!< Error_Passive status changed */ |
| AnnaBridge | 172:65be27845400 | 1660 | #define FDCAN_IT_ERROR_WARNING FDCAN_IE_EWE /*!< Error_Warning status changed */ |
| AnnaBridge | 172:65be27845400 | 1661 | #define FDCAN_IT_BUS_OFF FDCAN_IE_BOE /*!< Bus_Off status changed */ |
| AnnaBridge | 172:65be27845400 | 1662 | /** |
| AnnaBridge | 172:65be27845400 | 1663 | * @} |
| AnnaBridge | 172:65be27845400 | 1664 | */ |
| AnnaBridge | 172:65be27845400 | 1665 | |
| AnnaBridge | 172:65be27845400 | 1666 | /** |
| AnnaBridge | 172:65be27845400 | 1667 | * @} |
| AnnaBridge | 172:65be27845400 | 1668 | */ |
| AnnaBridge | 172:65be27845400 | 1669 | |
| AnnaBridge | 172:65be27845400 | 1670 | /** @defgroup FDCAN_TTflags FDCAN TT Flags |
| AnnaBridge | 172:65be27845400 | 1671 | * @{ |
| AnnaBridge | 172:65be27845400 | 1672 | */ |
| AnnaBridge | 172:65be27845400 | 1673 | #define FDCAN_TT_FLAG_BASIC_CYCLE_START FDCAN_TTIR_SBC /*!< Start of Basic Cycle */ |
| AnnaBridge | 172:65be27845400 | 1674 | #define FDCAN_TT_FLAG_MATRIX_CYCLE_START FDCAN_TTIR_SMC /*!< Start of Matrix Cycle */ |
| AnnaBridge | 172:65be27845400 | 1675 | #define FDCAN_TT_FLAG_SYNC_MODE_CHANGE FDCAN_TTIR_CSM /*!< Change of Synchronization Mode */ |
| AnnaBridge | 172:65be27845400 | 1676 | #define FDCAN_TT_FLAG_START_OF_GAP FDCAN_TTIR_SOG /*!< Start of Gap */ |
| AnnaBridge | 172:65be27845400 | 1677 | #define FDCAN_TT_FLAG_REG_TIME_MARK FDCAN_TTIR_RTMI /*!< Register Time Mark Interrupt */ |
| AnnaBridge | 172:65be27845400 | 1678 | #define FDCAN_TT_FLAG_TRIG_TIME_MARK FDCAN_TTIR_TTMI /*!< Trigger Time Mark Event Internal */ |
| AnnaBridge | 172:65be27845400 | 1679 | #define FDCAN_TT_FLAG_STOP_WATCH FDCAN_TTIR_SWE /*!< Stop Watch Event */ |
| AnnaBridge | 172:65be27845400 | 1680 | #define FDCAN_TT_FLAG_GLOBAL_TIME_WRAP FDCAN_TTIR_GTW /*!< Global Time Wrap */ |
| AnnaBridge | 172:65be27845400 | 1681 | #define FDCAN_TT_FLAG_GLOBAL_TIME_DISC FDCAN_TTIR_GTD /*!< Global Time Discontinuity */ |
| AnnaBridge | 172:65be27845400 | 1682 | #define FDCAN_TT_FLAG_GLOBAL_TIME_ERROR FDCAN_TTIR_GTE /*!< Global Time Error */ |
| AnnaBridge | 172:65be27845400 | 1683 | #define FDCAN_TT_FLAG_TX_COUNT_UNDERFLOW FDCAN_TTIR_TXU /*!< Tx Count Underflow */ |
| AnnaBridge | 172:65be27845400 | 1684 | #define FDCAN_TT_FLAG_TX_COUNT_OVERFLOW FDCAN_TTIR_TXO /*!< Tx Count Overflow */ |
| AnnaBridge | 172:65be27845400 | 1685 | #define FDCAN_TT_FLAG_SCHEDULING_ERROR_1 FDCAN_TTIR_SE1 /*!< Scheduling Error 1 */ |
| AnnaBridge | 172:65be27845400 | 1686 | #define FDCAN_TT_FLAG_SCHEDULING_ERROR_2 FDCAN_TTIR_SE2 /*!< Scheduling Error 2 */ |
| AnnaBridge | 172:65be27845400 | 1687 | #define FDCAN_TT_FLAG_ERROR_LEVEL_CHANGE FDCAN_TTIR_ELC /*!< Error Level Changed */ |
| AnnaBridge | 172:65be27845400 | 1688 | #define FDCAN_TT_FLAG_INIT_WATCH_TRIGGER FDCAN_TTIR_IWT /*!< Initialization Watch Trigger */ |
| AnnaBridge | 172:65be27845400 | 1689 | #define FDCAN_TT_FLAG_WATCH_TRIGGER FDCAN_TTIR_WT /*!< Watch Trigger */ |
| AnnaBridge | 172:65be27845400 | 1690 | #define FDCAN_TT_FLAG_APPLICATION_WATCHDOG FDCAN_TTIR_AW /*!< Application Watchdog */ |
| AnnaBridge | 172:65be27845400 | 1691 | #define FDCAN_TT_FLAG_CONFIG_ERROR FDCAN_TTIR_CER /*!< Configuration Error */ |
| AnnaBridge | 172:65be27845400 | 1692 | /** |
| AnnaBridge | 172:65be27845400 | 1693 | * @} |
| AnnaBridge | 172:65be27845400 | 1694 | */ |
| AnnaBridge | 172:65be27845400 | 1695 | |
| AnnaBridge | 172:65be27845400 | 1696 | /** @defgroup FDCAN_TTInterrupts FDCAN TT Interrupts |
| AnnaBridge | 172:65be27845400 | 1697 | * @{ |
| AnnaBridge | 172:65be27845400 | 1698 | */ |
| AnnaBridge | 172:65be27845400 | 1699 | |
| AnnaBridge | 172:65be27845400 | 1700 | /** @defgroup FDCAN_TTScheduleSynchronization_Interrupts FDCAN TT Schedule Synchronization Interrupts |
| AnnaBridge | 172:65be27845400 | 1701 | * @{ |
| AnnaBridge | 172:65be27845400 | 1702 | */ |
| AnnaBridge | 172:65be27845400 | 1703 | #define FDCAN_TT_IT_BASIC_CYCLE_START FDCAN_TTIE_SBCE /*!< Start of Basic Cycle */ |
| AnnaBridge | 172:65be27845400 | 1704 | #define FDCAN_TT_IT_MATRIX_CYCLE_START FDCAN_TTIE_SMCE /*!< Start of Matrix Cycle */ |
| AnnaBridge | 172:65be27845400 | 1705 | #define FDCAN_TT_IT_SYNC_MODE_CHANGE FDCAN_TTIE_CSME /*!< Change of Synchronization Mode */ |
| AnnaBridge | 172:65be27845400 | 1706 | #define FDCAN_TT_IT_START_OF_GAP FDCAN_TTIE_SOGE /*!< Start of Gap */ |
| AnnaBridge | 172:65be27845400 | 1707 | /** |
| AnnaBridge | 172:65be27845400 | 1708 | * @} |
| AnnaBridge | 172:65be27845400 | 1709 | */ |
| AnnaBridge | 172:65be27845400 | 1710 | |
| AnnaBridge | 172:65be27845400 | 1711 | /** @defgroup FDCAN_TTTimeMark_Interrupts FDCAN TT Time Mark Interrupts |
| AnnaBridge | 172:65be27845400 | 1712 | * @{ |
| AnnaBridge | 172:65be27845400 | 1713 | */ |
| AnnaBridge | 172:65be27845400 | 1714 | #define FDCAN_TT_IT_REG_TIME_MARK FDCAN_TTIE_RTMIE /*!< Register Time Mark Interrupt */ |
| AnnaBridge | 172:65be27845400 | 1715 | #define FDCAN_TT_IT_TRIG_TIME_MARK FDCAN_TTIE_TTMIE /*!< Trigger Time Mark Event Internal */ |
| AnnaBridge | 172:65be27845400 | 1716 | /** |
| AnnaBridge | 172:65be27845400 | 1717 | * @} |
| AnnaBridge | 172:65be27845400 | 1718 | */ |
| AnnaBridge | 172:65be27845400 | 1719 | |
| AnnaBridge | 172:65be27845400 | 1720 | /** @defgroup FDCAN_TTStopWatch_Interrupt FDCAN TT Stop Watch Interrupt |
| AnnaBridge | 172:65be27845400 | 1721 | * @{ |
| AnnaBridge | 172:65be27845400 | 1722 | */ |
| AnnaBridge | 172:65be27845400 | 1723 | #define FDCAN_TT_IT_STOP_WATCH FDCAN_TTIE_SWEE /*!< Stop Watch Event */ |
| AnnaBridge | 172:65be27845400 | 1724 | /** |
| AnnaBridge | 172:65be27845400 | 1725 | * @} |
| AnnaBridge | 172:65be27845400 | 1726 | */ |
| AnnaBridge | 172:65be27845400 | 1727 | |
| AnnaBridge | 172:65be27845400 | 1728 | /** @defgroup FDCAN_TTGlobalTime_Interrupts FDCAN TT Global Time Interrupts |
| AnnaBridge | 172:65be27845400 | 1729 | * @{ |
| AnnaBridge | 172:65be27845400 | 1730 | */ |
| AnnaBridge | 172:65be27845400 | 1731 | #define FDCAN_TT_IT_GLOBAL_TIME_WRAP FDCAN_TTIE_GTWE /*!< Global Time Wrap */ |
| AnnaBridge | 172:65be27845400 | 1732 | #define FDCAN_TT_IT_GLOBAL_TIME_DISC FDCAN_TTIE_GTDE /*!< Global Time Discontinuity */ |
| AnnaBridge | 172:65be27845400 | 1733 | /** |
| AnnaBridge | 172:65be27845400 | 1734 | * @} |
| AnnaBridge | 172:65be27845400 | 1735 | */ |
| AnnaBridge | 172:65be27845400 | 1736 | |
| AnnaBridge | 172:65be27845400 | 1737 | /** @defgroup FDCAN_TTDisturbingError_Interrupts FDCAN TT Disturbing Error Interrupts |
| AnnaBridge | 172:65be27845400 | 1738 | * @{ |
| AnnaBridge | 172:65be27845400 | 1739 | */ |
| AnnaBridge | 172:65be27845400 | 1740 | #define FDCAN_TT_IT_GLOBAL_TIME_ERROR FDCAN_TTIE_GTEE /*!< Global Time Error */ |
| AnnaBridge | 172:65be27845400 | 1741 | #define FDCAN_TT_IT_TX_COUNT_UNDERFLOW FDCAN_TTIE_TXUE /*!< Tx Count Underflow */ |
| AnnaBridge | 172:65be27845400 | 1742 | #define FDCAN_TT_IT_TX_COUNT_OVERFLOW FDCAN_TTIE_TXOE /*!< Tx Count Overflow */ |
| AnnaBridge | 172:65be27845400 | 1743 | #define FDCAN_TT_IT_SCHEDULING_ERROR_1 FDCAN_TTIE_SE1E /*!< Scheduling Error 1 */ |
| AnnaBridge | 172:65be27845400 | 1744 | #define FDCAN_TT_IT_SCHEDULING_ERROR_2 FDCAN_TTIE_SE2E /*!< Scheduling Error 2 */ |
| AnnaBridge | 172:65be27845400 | 1745 | #define FDCAN_TT_IT_ERROR_LEVEL_CHANGE FDCAN_TTIE_ELCE /*!< Error Level Changed */ |
| AnnaBridge | 172:65be27845400 | 1746 | /** |
| AnnaBridge | 172:65be27845400 | 1747 | * @} |
| AnnaBridge | 172:65be27845400 | 1748 | */ |
| AnnaBridge | 172:65be27845400 | 1749 | |
| AnnaBridge | 172:65be27845400 | 1750 | /** @defgroup FDCAN_TTFatalError_Interrupts FDCAN TT Fatal Error Interrupts |
| AnnaBridge | 172:65be27845400 | 1751 | * @{ |
| AnnaBridge | 172:65be27845400 | 1752 | */ |
| AnnaBridge | 172:65be27845400 | 1753 | #define FDCAN_TT_IT_INIT_WATCH_TRIGGER FDCAN_TTIE_IWTE /*!< Initialization Watch Trigger */ |
| AnnaBridge | 172:65be27845400 | 1754 | #define FDCAN_TT_IT_WATCH_TRIGGER FDCAN_TTIE_WTE /*!< Watch Trigger */ |
| AnnaBridge | 172:65be27845400 | 1755 | #define FDCAN_TT_IT_APPLICATION_WATCHDOG FDCAN_TTIE_AWE /*!< Application Watchdog */ |
| AnnaBridge | 172:65be27845400 | 1756 | #define FDCAN_TT_IT_CONFIG_ERROR FDCAN_TTIE_CERE /*!< Configuration Error */ |
| AnnaBridge | 172:65be27845400 | 1757 | /** |
| AnnaBridge | 172:65be27845400 | 1758 | * @} |
| AnnaBridge | 172:65be27845400 | 1759 | */ |
| AnnaBridge | 172:65be27845400 | 1760 | |
| AnnaBridge | 172:65be27845400 | 1761 | /** |
| AnnaBridge | 172:65be27845400 | 1762 | * @} |
| AnnaBridge | 172:65be27845400 | 1763 | */ |
| AnnaBridge | 172:65be27845400 | 1764 | |
| AnnaBridge | 172:65be27845400 | 1765 | /** |
| AnnaBridge | 172:65be27845400 | 1766 | * @} |
| AnnaBridge | 172:65be27845400 | 1767 | */ |
| AnnaBridge | 172:65be27845400 | 1768 | |
| AnnaBridge | 172:65be27845400 | 1769 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 1770 | /** @defgroup FDCAN_Exported_Macros FDCAN Exported Macros |
| AnnaBridge | 172:65be27845400 | 1771 | * @{ |
| AnnaBridge | 172:65be27845400 | 1772 | */ |
| AnnaBridge | 172:65be27845400 | 1773 | |
| AnnaBridge | 172:65be27845400 | 1774 | /** @brief Reset FDCAN handle state. |
| AnnaBridge | 172:65be27845400 | 1775 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1776 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1777 | */ |
| AnnaBridge | 172:65be27845400 | 1778 | #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 |
| AnnaBridge | 172:65be27845400 | 1779 | #define __HAL_FDCAN_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 172:65be27845400 | 1780 | (__HANDLE__)->State = HAL_FDCAN_STATE_RESET; \ |
| AnnaBridge | 172:65be27845400 | 1781 | (__HANDLE__)->MspInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 1782 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 1783 | } while(0) |
| AnnaBridge | 172:65be27845400 | 1784 | #else |
| AnnaBridge | 172:65be27845400 | 1785 | #define __HAL_FDCAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_FDCAN_STATE_RESET) |
| AnnaBridge | 172:65be27845400 | 1786 | #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 1787 | |
| AnnaBridge | 172:65be27845400 | 1788 | /** |
| AnnaBridge | 172:65be27845400 | 1789 | * @brief Enable the specified FDCAN interrupts. |
| AnnaBridge | 172:65be27845400 | 1790 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1791 | * @param __INTERRUPT__ FDCAN interrupt. |
| AnnaBridge | 172:65be27845400 | 1792 | * This parameter can be any combination of @arg FDCAN_Interrupts |
| AnnaBridge | 172:65be27845400 | 1793 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1794 | */ |
| AnnaBridge | 172:65be27845400 | 1795 | #define __HAL_FDCAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 172:65be27845400 | 1796 | do{ \ |
| AnnaBridge | 172:65be27845400 | 1797 | (__HANDLE__)->Instance->IE |= ((__INTERRUPT__) & FDCAN_IR_MASK); \ |
| AnnaBridge | 172:65be27845400 | 1798 | FDCAN_CCU->IE |= (((__INTERRUPT__) & CCU_IR_MASK) >> 30); \ |
| AnnaBridge | 172:65be27845400 | 1799 | }while(0) |
| AnnaBridge | 172:65be27845400 | 1800 | |
| AnnaBridge | 172:65be27845400 | 1801 | |
| AnnaBridge | 172:65be27845400 | 1802 | /** |
| AnnaBridge | 172:65be27845400 | 1803 | * @brief Disable the specified FDCAN interrupts. |
| AnnaBridge | 172:65be27845400 | 1804 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1805 | * @param __INTERRUPT__ FDCAN interrupt. |
| AnnaBridge | 172:65be27845400 | 1806 | * This parameter can be any combination of @arg FDCAN_Interrupts |
| AnnaBridge | 172:65be27845400 | 1807 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1808 | */ |
| AnnaBridge | 172:65be27845400 | 1809 | #define __HAL_FDCAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 172:65be27845400 | 1810 | do{ \ |
| AnnaBridge | 172:65be27845400 | 1811 | ((__HANDLE__)->Instance->IE) &= ~((__INTERRUPT__) & FDCAN_IR_MASK); \ |
| AnnaBridge | 172:65be27845400 | 1812 | FDCAN_CCU->IE &= ~(((__INTERRUPT__) & CCU_IR_MASK) >> 30); \ |
| AnnaBridge | 172:65be27845400 | 1813 | }while(0) |
| AnnaBridge | 172:65be27845400 | 1814 | |
| AnnaBridge | 172:65be27845400 | 1815 | /** |
| AnnaBridge | 172:65be27845400 | 1816 | * @brief Check whether the specified FDCAN interrupt is set or not. |
| AnnaBridge | 172:65be27845400 | 1817 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1818 | * @param __INTERRUPT__ FDCAN interrupt. |
| AnnaBridge | 172:65be27845400 | 1819 | * This parameter can be one of @arg FDCAN_Interrupts |
| AnnaBridge | 172:65be27845400 | 1820 | * @retval ITStatus |
| AnnaBridge | 172:65be27845400 | 1821 | */ |
| AnnaBridge | 172:65be27845400 | 1822 | #define __HAL_FDCAN_GET_IT(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) < FDCAN_IT_CALIB_WATCHDOG_EVENT) ? ((__HANDLE__)->Instance->IR & (__INTERRUPT__)) : ((FDCAN_CCU->IR << 30) & (__INTERRUPT__))) |
| AnnaBridge | 172:65be27845400 | 1823 | |
| AnnaBridge | 172:65be27845400 | 1824 | /** |
| AnnaBridge | 172:65be27845400 | 1825 | * @brief Clear the specified FDCAN interrupts. |
| AnnaBridge | 172:65be27845400 | 1826 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1827 | * @param __INTERRUPT__ specifies the interrupts to clear. |
| AnnaBridge | 172:65be27845400 | 1828 | * This parameter can be any combination of @arg FDCAN_Interrupts |
| AnnaBridge | 172:65be27845400 | 1829 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1830 | */ |
| AnnaBridge | 172:65be27845400 | 1831 | #define __HAL_FDCAN_CLEAR_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 172:65be27845400 | 1832 | do{ \ |
| AnnaBridge | 172:65be27845400 | 1833 | ((__HANDLE__)->Instance->IR) = ((__INTERRUPT__) & FDCAN_IR_MASK); \ |
| AnnaBridge | 172:65be27845400 | 1834 | FDCAN_CCU->IR = (((__INTERRUPT__) & CCU_IR_MASK) >> 30); \ |
| AnnaBridge | 172:65be27845400 | 1835 | }while(0) |
| AnnaBridge | 172:65be27845400 | 1836 | |
| AnnaBridge | 172:65be27845400 | 1837 | /** |
| AnnaBridge | 172:65be27845400 | 1838 | * @brief Check whether the specified FDCAN flag is set or not. |
| AnnaBridge | 172:65be27845400 | 1839 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1840 | * @param __FLAG__ FDCAN flag. |
| AnnaBridge | 172:65be27845400 | 1841 | * This parameter can be one of @arg FDCAN_flags |
| AnnaBridge | 172:65be27845400 | 1842 | * @retval FlagStatus |
| AnnaBridge | 172:65be27845400 | 1843 | */ |
| AnnaBridge | 172:65be27845400 | 1844 | #define __HAL_FDCAN_GET_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) < FDCAN_FLAG_CALIB_WATCHDOG_EVENT) ? ((__HANDLE__)->Instance->IR & (__FLAG__)) : ((FDCAN_CCU->IR << 30) & (__FLAG__))) |
| AnnaBridge | 172:65be27845400 | 1845 | |
| AnnaBridge | 172:65be27845400 | 1846 | /** |
| AnnaBridge | 172:65be27845400 | 1847 | * @brief Clear the specified FDCAN flags. |
| AnnaBridge | 172:65be27845400 | 1848 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1849 | * @param __FLAG__ specifies the flags to clear. |
| AnnaBridge | 172:65be27845400 | 1850 | * This parameter can be any combination of @arg FDCAN_flags |
| AnnaBridge | 172:65be27845400 | 1851 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1852 | */ |
| AnnaBridge | 172:65be27845400 | 1853 | #define __HAL_FDCAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| AnnaBridge | 172:65be27845400 | 1854 | do{ \ |
| AnnaBridge | 172:65be27845400 | 1855 | ((__HANDLE__)->Instance->IR) = ((__FLAG__) & FDCAN_IR_MASK); \ |
| AnnaBridge | 172:65be27845400 | 1856 | FDCAN_CCU->IR = (((__FLAG__) & CCU_IR_MASK) >> 30); \ |
| AnnaBridge | 172:65be27845400 | 1857 | }while(0) |
| AnnaBridge | 172:65be27845400 | 1858 | |
| AnnaBridge | 172:65be27845400 | 1859 | /** @brief Check if the specified FDCAN interrupt source is enabled or disabled. |
| AnnaBridge | 172:65be27845400 | 1860 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1861 | * @param __INTERRUPT__ specifies the FDCAN interrupt source to check. |
| AnnaBridge | 172:65be27845400 | 1862 | * This parameter can be a value of @arg FDCAN_Interrupts |
| AnnaBridge | 172:65be27845400 | 1863 | * @retval ITStatus |
| AnnaBridge | 172:65be27845400 | 1864 | */ |
| AnnaBridge | 172:65be27845400 | 1865 | #define __HAL_FDCAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__INTERRUPT__) < FDCAN_IT_CALIB_WATCHDOG_EVENT) ? ((__HANDLE__)->Instance->IE & (__INTERRUPT__)) : ((FDCAN_CCU->IE << 30) & (__INTERRUPT__))) |
| AnnaBridge | 172:65be27845400 | 1866 | |
| AnnaBridge | 172:65be27845400 | 1867 | /** |
| AnnaBridge | 172:65be27845400 | 1868 | * @brief Enable the specified FDCAN TT interrupts. |
| AnnaBridge | 172:65be27845400 | 1869 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1870 | * @param __INTERRUPT__ FDCAN TT interrupt. |
| AnnaBridge | 172:65be27845400 | 1871 | * This parameter can be any combination of @arg FDCAN_TTInterrupts |
| AnnaBridge | 172:65be27845400 | 1872 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1873 | */ |
| AnnaBridge | 172:65be27845400 | 1874 | #define __HAL_FDCAN_TT_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIE) |= (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 1875 | |
| AnnaBridge | 172:65be27845400 | 1876 | /** |
| AnnaBridge | 172:65be27845400 | 1877 | * @brief Disable the specified FDCAN TT interrupts. |
| AnnaBridge | 172:65be27845400 | 1878 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1879 | * @param __INTERRUPT__ FDCAN TT interrupt. |
| AnnaBridge | 172:65be27845400 | 1880 | * This parameter can be any combination of @arg FDCAN_TTInterrupts |
| AnnaBridge | 172:65be27845400 | 1881 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1882 | */ |
| AnnaBridge | 172:65be27845400 | 1883 | #define __HAL_FDCAN_TT_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIE) &= ~(__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 1884 | |
| AnnaBridge | 172:65be27845400 | 1885 | /** |
| AnnaBridge | 172:65be27845400 | 1886 | * @brief Check whether the specified FDCAN TT interrupt is set or not. |
| AnnaBridge | 172:65be27845400 | 1887 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1888 | * @param __INTERRUPT__ FDCAN TT interrupt. |
| AnnaBridge | 172:65be27845400 | 1889 | * This parameter can be one of @arg FDCAN_TTInterrupts |
| AnnaBridge | 172:65be27845400 | 1890 | * @retval ITStatus |
| AnnaBridge | 172:65be27845400 | 1891 | */ |
| AnnaBridge | 172:65be27845400 | 1892 | #define __HAL_FDCAN_TT_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIR) & (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 1893 | |
| AnnaBridge | 172:65be27845400 | 1894 | /** |
| AnnaBridge | 172:65be27845400 | 1895 | * @brief Clear the specified FDCAN TT interrupts. |
| AnnaBridge | 172:65be27845400 | 1896 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1897 | * @param __INTERRUPT__ specifies the TT interrupts to clear. |
| AnnaBridge | 172:65be27845400 | 1898 | * This parameter can be any combination of @arg FDCAN_TTInterrupts |
| AnnaBridge | 172:65be27845400 | 1899 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1900 | */ |
| AnnaBridge | 172:65be27845400 | 1901 | #define __HAL_FDCAN_TT_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIR) = (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 1902 | |
| AnnaBridge | 172:65be27845400 | 1903 | /** |
| AnnaBridge | 172:65be27845400 | 1904 | * @brief Check whether the specified FDCAN TT flag is set or not. |
| AnnaBridge | 172:65be27845400 | 1905 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1906 | * @param __FLAG__ FDCAN TT flag. |
| AnnaBridge | 172:65be27845400 | 1907 | * This parameter can be one of @arg FDCAN_TTflags |
| AnnaBridge | 172:65be27845400 | 1908 | * @retval FlagStatus |
| AnnaBridge | 172:65be27845400 | 1909 | */ |
| AnnaBridge | 172:65be27845400 | 1910 | #define __HAL_FDCAN_TT_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->ttcan->TTIR) & (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 1911 | |
| AnnaBridge | 172:65be27845400 | 1912 | /** |
| AnnaBridge | 172:65be27845400 | 1913 | * @brief Clear the specified FDCAN TT flags. |
| AnnaBridge | 172:65be27845400 | 1914 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1915 | * @param __FLAG__ specifies the TT flags to clear. |
| AnnaBridge | 172:65be27845400 | 1916 | * This parameter can be any combination of @arg FDCAN_TTflags |
| AnnaBridge | 172:65be27845400 | 1917 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1918 | */ |
| AnnaBridge | 172:65be27845400 | 1919 | #define __HAL_FDCAN_TT_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->ttcan->TTIR) = (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 1920 | |
| AnnaBridge | 172:65be27845400 | 1921 | /** @brief Check if the specified FDCAN TT interrupt source is enabled or disabled. |
| AnnaBridge | 172:65be27845400 | 1922 | * @param __HANDLE__ FDCAN handle. |
| AnnaBridge | 172:65be27845400 | 1923 | * @param __INTERRUPT__ specifies the FDCAN TT interrupt source to check. |
| AnnaBridge | 172:65be27845400 | 1924 | * This parameter can be a value of @arg FDCAN_TTInterrupts |
| AnnaBridge | 172:65be27845400 | 1925 | * @retval ITStatus |
| AnnaBridge | 172:65be27845400 | 1926 | */ |
| AnnaBridge | 172:65be27845400 | 1927 | #define __HAL_FDCAN_TT_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->ttcan->TTIE) & (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 1928 | |
| AnnaBridge | 172:65be27845400 | 1929 | /** |
| AnnaBridge | 172:65be27845400 | 1930 | * @} |
| AnnaBridge | 172:65be27845400 | 1931 | */ |
| AnnaBridge | 172:65be27845400 | 1932 | |
| AnnaBridge | 172:65be27845400 | 1933 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 1934 | /** @addtogroup FDCAN_Exported_Functions |
| AnnaBridge | 172:65be27845400 | 1935 | * @{ |
| AnnaBridge | 172:65be27845400 | 1936 | */ |
| AnnaBridge | 172:65be27845400 | 1937 | |
| AnnaBridge | 172:65be27845400 | 1938 | /** @addtogroup FDCAN_Exported_Functions_Group1 |
| AnnaBridge | 172:65be27845400 | 1939 | * @{ |
| AnnaBridge | 172:65be27845400 | 1940 | */ |
| AnnaBridge | 172:65be27845400 | 1941 | /* Initialization and de-initialization functions *****************************/ |
| AnnaBridge | 172:65be27845400 | 1942 | HAL_StatusTypeDef HAL_FDCAN_Init(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1943 | HAL_StatusTypeDef HAL_FDCAN_DeInit(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1944 | void HAL_FDCAN_MspInit(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1945 | void HAL_FDCAN_MspDeInit(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1946 | HAL_StatusTypeDef HAL_FDCAN_EnterPowerDownMode(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1947 | HAL_StatusTypeDef HAL_FDCAN_ExitPowerDownMode(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1948 | |
| AnnaBridge | 172:65be27845400 | 1949 | #if USE_HAL_FDCAN_REGISTER_CALLBACKS == 1 |
| AnnaBridge | 172:65be27845400 | 1950 | /* Callbacks Register/UnRegister functions ***********************************/ |
| AnnaBridge | 172:65be27845400 | 1951 | HAL_StatusTypeDef HAL_FDCAN_RegisterCallback(FDCAN_HandleTypeDef *hfdcan, HAL_FDCAN_CallbackIDTypeDef CallbackID, pFDCAN_CallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1952 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterCallback(FDCAN_HandleTypeDef *hfdcan, HAL_FDCAN_CallbackIDTypeDef CallbackID); |
| AnnaBridge | 172:65be27845400 | 1953 | HAL_StatusTypeDef HAL_FDCAN_RegisterClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_ClockCalibrationCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1954 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1955 | HAL_StatusTypeDef HAL_FDCAN_RegisterTxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TxEventFifoCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1956 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1957 | HAL_StatusTypeDef HAL_FDCAN_RegisterRxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_RxFifo0CallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1958 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterRxFifo0Callback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1959 | HAL_StatusTypeDef HAL_FDCAN_RegisterRxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_RxFifo1CallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1960 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterRxFifo1Callback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1961 | HAL_StatusTypeDef HAL_FDCAN_RegisterTxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TxBufferCompleteCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1962 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1963 | HAL_StatusTypeDef HAL_FDCAN_RegisterTxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TxBufferAbortCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1964 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1965 | HAL_StatusTypeDef HAL_FDCAN_RegisterErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_ErrorStatusCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1966 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1967 | HAL_StatusTypeDef HAL_FDCAN_RegisterTTScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_ScheduleSyncCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1968 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1969 | HAL_StatusTypeDef HAL_FDCAN_RegisterTTTimeMarkCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_TimeMarkCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1970 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTTimeMarkCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1971 | HAL_StatusTypeDef HAL_FDCAN_RegisterTTStopWatchCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_StopWatchCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1972 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTStopWatchCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1973 | HAL_StatusTypeDef HAL_FDCAN_RegisterTTGlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan, pFDCAN_TT_GlobalTimeCallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 1974 | HAL_StatusTypeDef HAL_FDCAN_UnRegisterTTGlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1975 | #endif /* USE_HAL_FDCAN_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 1976 | /** |
| AnnaBridge | 172:65be27845400 | 1977 | * @} |
| AnnaBridge | 172:65be27845400 | 1978 | */ |
| AnnaBridge | 172:65be27845400 | 1979 | |
| AnnaBridge | 172:65be27845400 | 1980 | /** @addtogroup FDCAN_Exported_Functions_Group2 |
| AnnaBridge | 172:65be27845400 | 1981 | * @{ |
| AnnaBridge | 172:65be27845400 | 1982 | */ |
| AnnaBridge | 172:65be27845400 | 1983 | /* Configuration functions ****************************************************/ |
| AnnaBridge | 172:65be27845400 | 1984 | HAL_StatusTypeDef HAL_FDCAN_ConfigClockCalibration(FDCAN_HandleTypeDef *hfdcan, FDCAN_ClkCalUnitTypeDef *sCcuConfig); |
| AnnaBridge | 172:65be27845400 | 1985 | uint32_t HAL_FDCAN_GetClockCalibrationState(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1986 | HAL_StatusTypeDef HAL_FDCAN_ResetClockCalibrationState(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1987 | uint32_t HAL_FDCAN_GetClockCalibrationCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t Counter); |
| AnnaBridge | 172:65be27845400 | 1988 | HAL_StatusTypeDef HAL_FDCAN_ConfigFilter(FDCAN_HandleTypeDef *hfdcan, FDCAN_FilterTypeDef *sFilterConfig); |
| AnnaBridge | 172:65be27845400 | 1989 | HAL_StatusTypeDef HAL_FDCAN_ConfigGlobalFilter(FDCAN_HandleTypeDef *hfdcan, uint32_t NonMatchingStd, uint32_t NonMatchingExt, uint32_t RejectRemoteStd, uint32_t RejectRemoteExt); |
| AnnaBridge | 172:65be27845400 | 1990 | HAL_StatusTypeDef HAL_FDCAN_ConfigExtendedIdMask(FDCAN_HandleTypeDef *hfdcan, uint32_t Mask); |
| AnnaBridge | 172:65be27845400 | 1991 | HAL_StatusTypeDef HAL_FDCAN_ConfigRxFifoOverwrite(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo, uint32_t OperationMode); |
| AnnaBridge | 172:65be27845400 | 1992 | HAL_StatusTypeDef HAL_FDCAN_ConfigFifoWatermark(FDCAN_HandleTypeDef *hfdcan, uint32_t FIFO, uint32_t Watermark); |
| AnnaBridge | 172:65be27845400 | 1993 | HAL_StatusTypeDef HAL_FDCAN_ConfigRamWatchdog(FDCAN_HandleTypeDef *hfdcan, uint32_t CounterStartValue); |
| AnnaBridge | 172:65be27845400 | 1994 | HAL_StatusTypeDef HAL_FDCAN_ConfigTimestampCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t TimestampPrescaler); |
| AnnaBridge | 172:65be27845400 | 1995 | HAL_StatusTypeDef HAL_FDCAN_EnableTimestampCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t TimestampOperation); |
| AnnaBridge | 172:65be27845400 | 1996 | HAL_StatusTypeDef HAL_FDCAN_DisableTimestampCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1997 | uint16_t HAL_FDCAN_GetTimestampCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1998 | HAL_StatusTypeDef HAL_FDCAN_ResetTimestampCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 1999 | HAL_StatusTypeDef HAL_FDCAN_ConfigTimeoutCounter(FDCAN_HandleTypeDef *hfdcan, uint32_t TimeoutOperation, uint32_t TimeoutPeriod); |
| AnnaBridge | 172:65be27845400 | 2000 | HAL_StatusTypeDef HAL_FDCAN_EnableTimeoutCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2001 | HAL_StatusTypeDef HAL_FDCAN_DisableTimeoutCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2002 | uint16_t HAL_FDCAN_GetTimeoutCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2003 | HAL_StatusTypeDef HAL_FDCAN_ResetTimeoutCounter(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2004 | HAL_StatusTypeDef HAL_FDCAN_ConfigTxDelayCompensation(FDCAN_HandleTypeDef *hfdcan, uint32_t TdcOffset, uint32_t TdcFilter); |
| AnnaBridge | 172:65be27845400 | 2005 | HAL_StatusTypeDef HAL_FDCAN_EnableTxDelayCompensation(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2006 | HAL_StatusTypeDef HAL_FDCAN_DisableTxDelayCompensation(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2007 | HAL_StatusTypeDef HAL_FDCAN_EnableISOMode(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2008 | HAL_StatusTypeDef HAL_FDCAN_DisableISOMode(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2009 | HAL_StatusTypeDef HAL_FDCAN_EnableEdgeFiltering(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2010 | HAL_StatusTypeDef HAL_FDCAN_DisableEdgeFiltering(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2011 | /** |
| AnnaBridge | 172:65be27845400 | 2012 | * @} |
| AnnaBridge | 172:65be27845400 | 2013 | */ |
| AnnaBridge | 172:65be27845400 | 2014 | |
| AnnaBridge | 172:65be27845400 | 2015 | /** @addtogroup FDCAN_Exported_Functions_Group3 |
| AnnaBridge | 172:65be27845400 | 2016 | * @{ |
| AnnaBridge | 172:65be27845400 | 2017 | */ |
| AnnaBridge | 172:65be27845400 | 2018 | /* Control functions **********************************************************/ |
| AnnaBridge | 172:65be27845400 | 2019 | HAL_StatusTypeDef HAL_FDCAN_Start(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2020 | HAL_StatusTypeDef HAL_FDCAN_Stop(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2021 | HAL_StatusTypeDef HAL_FDCAN_AddMessageToTxFifoQ(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData); |
| AnnaBridge | 172:65be27845400 | 2022 | HAL_StatusTypeDef HAL_FDCAN_AddMessageToTxBuffer(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxHeaderTypeDef *pTxHeader, uint8_t *pTxData, uint32_t BufferIndex); |
| AnnaBridge | 172:65be27845400 | 2023 | HAL_StatusTypeDef HAL_FDCAN_EnableTxBufferRequest(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndex); |
| AnnaBridge | 172:65be27845400 | 2024 | uint32_t HAL_FDCAN_GetLatestTxFifoQRequestBuffer(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2025 | HAL_StatusTypeDef HAL_FDCAN_AbortTxRequest(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndex); |
| AnnaBridge | 172:65be27845400 | 2026 | HAL_StatusTypeDef HAL_FDCAN_GetRxMessage(FDCAN_HandleTypeDef *hfdcan, uint32_t RxLocation, FDCAN_RxHeaderTypeDef *pRxHeader, uint8_t *pRxData); |
| AnnaBridge | 172:65be27845400 | 2027 | HAL_StatusTypeDef HAL_FDCAN_GetTxEvent(FDCAN_HandleTypeDef *hfdcan, FDCAN_TxEventFifoTypeDef *pTxEvent); |
| AnnaBridge | 172:65be27845400 | 2028 | HAL_StatusTypeDef HAL_FDCAN_GetHighPriorityMessageStatus(FDCAN_HandleTypeDef *hfdcan, FDCAN_HpMsgStatusTypeDef *HpMsgStatus); |
| AnnaBridge | 172:65be27845400 | 2029 | HAL_StatusTypeDef HAL_FDCAN_GetProtocolStatus(FDCAN_HandleTypeDef *hfdcan, FDCAN_ProtocolStatusTypeDef *ProtocolStatus); |
| AnnaBridge | 172:65be27845400 | 2030 | HAL_StatusTypeDef HAL_FDCAN_GetErrorCounters(FDCAN_HandleTypeDef *hfdcan, FDCAN_ErrorCountersTypeDef *ErrorCounters); |
| AnnaBridge | 172:65be27845400 | 2031 | uint32_t HAL_FDCAN_IsRxBufferMessageAvailable(FDCAN_HandleTypeDef *hfdcan, uint32_t RxBufferIndex); |
| AnnaBridge | 172:65be27845400 | 2032 | uint32_t HAL_FDCAN_IsTxBufferMessagePending(FDCAN_HandleTypeDef *hfdcan, uint32_t TxBufferIndex); |
| AnnaBridge | 172:65be27845400 | 2033 | uint32_t HAL_FDCAN_GetRxFifoFillLevel(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo); |
| AnnaBridge | 172:65be27845400 | 2034 | uint32_t HAL_FDCAN_GetTxFifoFreeLevel(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2035 | uint32_t HAL_FDCAN_IsRestrictedOperationMode(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2036 | HAL_StatusTypeDef HAL_FDCAN_ExitRestrictedOperationMode(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2037 | /** |
| AnnaBridge | 172:65be27845400 | 2038 | * @} |
| AnnaBridge | 172:65be27845400 | 2039 | */ |
| AnnaBridge | 172:65be27845400 | 2040 | |
| AnnaBridge | 172:65be27845400 | 2041 | /** @addtogroup FDCAN_Exported_Functions_Group4 |
| AnnaBridge | 172:65be27845400 | 2042 | * @{ |
| AnnaBridge | 172:65be27845400 | 2043 | */ |
| AnnaBridge | 172:65be27845400 | 2044 | /* TT Configuration and control functions**************************************/ |
| AnnaBridge | 172:65be27845400 | 2045 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigOperation(FDCAN_HandleTypeDef *hfdcan, FDCAN_TT_ConfigTypeDef *pTTParams); |
| AnnaBridge | 172:65be27845400 | 2046 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigReferenceMessage(FDCAN_HandleTypeDef *hfdcan, uint32_t IdType, uint32_t Identifier, uint32_t Payload); |
| AnnaBridge | 172:65be27845400 | 2047 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigTrigger(FDCAN_HandleTypeDef *hfdcan, FDCAN_TriggerTypeDef *sTriggerConfig); |
| AnnaBridge | 172:65be27845400 | 2048 | HAL_StatusTypeDef HAL_FDCAN_TT_SetGlobalTime(FDCAN_HandleTypeDef *hfdcan, uint32_t TimePreset); |
| AnnaBridge | 172:65be27845400 | 2049 | HAL_StatusTypeDef HAL_FDCAN_TT_SetClockSynchronization(FDCAN_HandleTypeDef *hfdcan, uint32_t NewTURNumerator); |
| AnnaBridge | 172:65be27845400 | 2050 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigStopWatch(FDCAN_HandleTypeDef *hfdcan, uint32_t Source, uint32_t Polarity); |
| AnnaBridge | 172:65be27845400 | 2051 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigRegisterTimeMark(FDCAN_HandleTypeDef *hfdcan, uint32_t TimeMarkSource, uint32_t TimeMarkValue, uint32_t RepeatFactor, uint32_t StartCycle); |
| AnnaBridge | 172:65be27845400 | 2052 | HAL_StatusTypeDef HAL_FDCAN_TT_EnableRegisterTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2053 | HAL_StatusTypeDef HAL_FDCAN_TT_DisableRegisterTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2054 | HAL_StatusTypeDef HAL_FDCAN_TT_EnableTriggerTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2055 | HAL_StatusTypeDef HAL_FDCAN_TT_DisableTriggerTimeMarkPulse(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2056 | HAL_StatusTypeDef HAL_FDCAN_TT_EnableHardwareGapControl(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2057 | HAL_StatusTypeDef HAL_FDCAN_TT_DisableHardwareGapControl(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2058 | HAL_StatusTypeDef HAL_FDCAN_TT_EnableTimeMarkGapControl(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2059 | HAL_StatusTypeDef HAL_FDCAN_TT_DisableTimeMarkGapControl(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2060 | HAL_StatusTypeDef HAL_FDCAN_TT_SetNextIsGap(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2061 | HAL_StatusTypeDef HAL_FDCAN_TT_SetEndOfGap(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2062 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigExternalSyncPhase(FDCAN_HandleTypeDef *hfdcan, uint32_t TargetPhase); |
| AnnaBridge | 172:65be27845400 | 2063 | HAL_StatusTypeDef HAL_FDCAN_TT_EnableExternalSynchronization(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2064 | HAL_StatusTypeDef HAL_FDCAN_TT_DisableExternalSynchronization(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2065 | HAL_StatusTypeDef HAL_FDCAN_TT_GetOperationStatus(FDCAN_HandleTypeDef *hfdcan, FDCAN_TTOperationStatusTypeDef *TTOpStatus); |
| AnnaBridge | 172:65be27845400 | 2066 | /** |
| AnnaBridge | 172:65be27845400 | 2067 | * @} |
| AnnaBridge | 172:65be27845400 | 2068 | */ |
| AnnaBridge | 172:65be27845400 | 2069 | |
| AnnaBridge | 172:65be27845400 | 2070 | /** @addtogroup FDCAN_Exported_Functions_Group5 |
| AnnaBridge | 172:65be27845400 | 2071 | * @{ |
| AnnaBridge | 172:65be27845400 | 2072 | */ |
| AnnaBridge | 172:65be27845400 | 2073 | /* Interrupts management ******************************************************/ |
| AnnaBridge | 172:65be27845400 | 2074 | HAL_StatusTypeDef HAL_FDCAN_ConfigInterruptLines(FDCAN_HandleTypeDef *hfdcan, uint32_t ITList, uint32_t InterruptLine); |
| AnnaBridge | 172:65be27845400 | 2075 | HAL_StatusTypeDef HAL_FDCAN_TT_ConfigInterruptLines(FDCAN_HandleTypeDef *hfdcan, uint32_t TTITList, uint32_t InterruptLine); |
| AnnaBridge | 172:65be27845400 | 2076 | HAL_StatusTypeDef HAL_FDCAN_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveITs, uint32_t BufferIndexes); |
| AnnaBridge | 172:65be27845400 | 2077 | HAL_StatusTypeDef HAL_FDCAN_DeactivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t InactiveITs); |
| AnnaBridge | 172:65be27845400 | 2078 | HAL_StatusTypeDef HAL_FDCAN_TT_ActivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t ActiveTTITs); |
| AnnaBridge | 172:65be27845400 | 2079 | HAL_StatusTypeDef HAL_FDCAN_TT_DeactivateNotification(FDCAN_HandleTypeDef *hfdcan, uint32_t InactiveTTITs); |
| AnnaBridge | 172:65be27845400 | 2080 | void HAL_FDCAN_IRQHandler(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2081 | /** |
| AnnaBridge | 172:65be27845400 | 2082 | * @} |
| AnnaBridge | 172:65be27845400 | 2083 | */ |
| AnnaBridge | 172:65be27845400 | 2084 | |
| AnnaBridge | 172:65be27845400 | 2085 | /** @addtogroup FDCAN_Exported_Functions_Group6 |
| AnnaBridge | 172:65be27845400 | 2086 | * @{ |
| AnnaBridge | 172:65be27845400 | 2087 | */ |
| AnnaBridge | 172:65be27845400 | 2088 | /* Callback functions *********************************************************/ |
| AnnaBridge | 172:65be27845400 | 2089 | void HAL_FDCAN_ClockCalibrationCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ClkCalibrationITs); |
| AnnaBridge | 172:65be27845400 | 2090 | void HAL_FDCAN_TxEventFifoCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TxEventFifoITs); |
| AnnaBridge | 172:65be27845400 | 2091 | void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs); |
| AnnaBridge | 172:65be27845400 | 2092 | void HAL_FDCAN_RxFifo1Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo1ITs); |
| AnnaBridge | 172:65be27845400 | 2093 | void HAL_FDCAN_TxFifoEmptyCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2094 | void HAL_FDCAN_TxBufferCompleteCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes); |
| AnnaBridge | 172:65be27845400 | 2095 | void HAL_FDCAN_TxBufferAbortCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t BufferIndexes); |
| AnnaBridge | 172:65be27845400 | 2096 | void HAL_FDCAN_RxBufferNewMessageCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2097 | void HAL_FDCAN_HighPriorityMessageCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2098 | void HAL_FDCAN_TimestampWraparoundCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2099 | void HAL_FDCAN_TimeoutOccurredCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2100 | void HAL_FDCAN_ErrorCallback(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2101 | void HAL_FDCAN_ErrorStatusCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t ErrorStatusITs); |
| AnnaBridge | 172:65be27845400 | 2102 | void HAL_FDCAN_TT_ScheduleSyncCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTSchedSyncITs); |
| AnnaBridge | 172:65be27845400 | 2103 | void HAL_FDCAN_TT_TimeMarkCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTTimeMarkITs); |
| AnnaBridge | 172:65be27845400 | 2104 | void HAL_FDCAN_TT_StopWatchCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t SWTime, uint32_t SWCycleCount); |
| AnnaBridge | 172:65be27845400 | 2105 | void HAL_FDCAN_TT_GlobalTimeCallback(FDCAN_HandleTypeDef *hfdcan, uint32_t TTGlobTimeITs); |
| AnnaBridge | 172:65be27845400 | 2106 | /** |
| AnnaBridge | 172:65be27845400 | 2107 | * @} |
| AnnaBridge | 172:65be27845400 | 2108 | */ |
| AnnaBridge | 172:65be27845400 | 2109 | |
| AnnaBridge | 172:65be27845400 | 2110 | /** @addtogroup FDCAN_Exported_Functions_Group7 |
| AnnaBridge | 172:65be27845400 | 2111 | * @{ |
| AnnaBridge | 172:65be27845400 | 2112 | */ |
| AnnaBridge | 172:65be27845400 | 2113 | /* Peripheral State functions *************************************************/ |
| AnnaBridge | 172:65be27845400 | 2114 | uint32_t HAL_FDCAN_GetError(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2115 | HAL_FDCAN_StateTypeDef HAL_FDCAN_GetState(FDCAN_HandleTypeDef *hfdcan); |
| AnnaBridge | 172:65be27845400 | 2116 | /** |
| AnnaBridge | 172:65be27845400 | 2117 | * @} |
| AnnaBridge | 172:65be27845400 | 2118 | */ |
| AnnaBridge | 172:65be27845400 | 2119 | |
| AnnaBridge | 172:65be27845400 | 2120 | /** |
| AnnaBridge | 172:65be27845400 | 2121 | * @} |
| AnnaBridge | 172:65be27845400 | 2122 | */ |
| AnnaBridge | 172:65be27845400 | 2123 | |
| AnnaBridge | 172:65be27845400 | 2124 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 2125 | /** @defgroup FDCAN_Private_Types FDCAN Private Types |
| AnnaBridge | 172:65be27845400 | 2126 | * @{ |
| AnnaBridge | 172:65be27845400 | 2127 | */ |
| AnnaBridge | 172:65be27845400 | 2128 | |
| AnnaBridge | 172:65be27845400 | 2129 | /** |
| AnnaBridge | 172:65be27845400 | 2130 | * @} |
| AnnaBridge | 172:65be27845400 | 2131 | */ |
| AnnaBridge | 172:65be27845400 | 2132 | |
| AnnaBridge | 172:65be27845400 | 2133 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 2134 | /** @defgroup FDCAN_Private_Variables FDCAN Private Variables |
| AnnaBridge | 172:65be27845400 | 2135 | * @{ |
| AnnaBridge | 172:65be27845400 | 2136 | */ |
| AnnaBridge | 172:65be27845400 | 2137 | |
| AnnaBridge | 172:65be27845400 | 2138 | /** |
| AnnaBridge | 172:65be27845400 | 2139 | * @} |
| AnnaBridge | 172:65be27845400 | 2140 | */ |
| AnnaBridge | 172:65be27845400 | 2141 | |
| AnnaBridge | 172:65be27845400 | 2142 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 2143 | /** @defgroup FDCAN_Private_Constants FDCAN Private Constants |
| AnnaBridge | 172:65be27845400 | 2144 | * @{ |
| AnnaBridge | 172:65be27845400 | 2145 | */ |
| AnnaBridge | 172:65be27845400 | 2146 | |
| AnnaBridge | 172:65be27845400 | 2147 | /** |
| AnnaBridge | 172:65be27845400 | 2148 | * @} |
| AnnaBridge | 172:65be27845400 | 2149 | */ |
| AnnaBridge | 172:65be27845400 | 2150 | |
| AnnaBridge | 172:65be27845400 | 2151 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 2152 | /** @defgroup FDCAN_Private_Macros FDCAN Private Macros |
| AnnaBridge | 172:65be27845400 | 2153 | * @{ |
| AnnaBridge | 172:65be27845400 | 2154 | */ |
| AnnaBridge | 172:65be27845400 | 2155 | #define IS_FDCAN_FRAME_FORMAT(FORMAT) (((FORMAT) == FDCAN_FRAME_CLASSIC ) || \ |
| AnnaBridge | 172:65be27845400 | 2156 | ((FORMAT) == FDCAN_FRAME_FD_NO_BRS) || \ |
| AnnaBridge | 172:65be27845400 | 2157 | ((FORMAT) == FDCAN_FRAME_FD_BRS )) |
| AnnaBridge | 172:65be27845400 | 2158 | #define IS_FDCAN_MODE(MODE) (((MODE) == FDCAN_MODE_NORMAL ) || \ |
| AnnaBridge | 172:65be27845400 | 2159 | ((MODE) == FDCAN_MODE_RESTRICTED_OPERATION) || \ |
| AnnaBridge | 172:65be27845400 | 2160 | ((MODE) == FDCAN_MODE_BUS_MONITORING ) || \ |
| AnnaBridge | 172:65be27845400 | 2161 | ((MODE) == FDCAN_MODE_INTERNAL_LOOPBACK ) || \ |
| AnnaBridge | 172:65be27845400 | 2162 | ((MODE) == FDCAN_MODE_EXTERNAL_LOOPBACK )) |
| AnnaBridge | 172:65be27845400 | 2163 | |
| AnnaBridge | 172:65be27845400 | 2164 | #define IS_FDCAN_CLOCK_CALIBRATION(CALIBRATION) (((CALIBRATION) == FDCAN_CLOCK_CALIBRATION_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 2165 | ((CALIBRATION) == FDCAN_CLOCK_CALIBRATION_ENABLE )) |
| AnnaBridge | 172:65be27845400 | 2166 | |
| AnnaBridge | 172:65be27845400 | 2167 | #define IS_FDCAN_CKDIV(CKDIV) (((CKDIV) == FDCAN_CLOCK_DIV1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2168 | ((CKDIV) == FDCAN_CLOCK_DIV2 ) || \ |
| AnnaBridge | 172:65be27845400 | 2169 | ((CKDIV) == FDCAN_CLOCK_DIV4 ) || \ |
| AnnaBridge | 172:65be27845400 | 2170 | ((CKDIV) == FDCAN_CLOCK_DIV6 ) || \ |
| AnnaBridge | 172:65be27845400 | 2171 | ((CKDIV) == FDCAN_CLOCK_DIV8 ) || \ |
| AnnaBridge | 172:65be27845400 | 2172 | ((CKDIV) == FDCAN_CLOCK_DIV10) || \ |
| AnnaBridge | 172:65be27845400 | 2173 | ((CKDIV) == FDCAN_CLOCK_DIV12) || \ |
| AnnaBridge | 172:65be27845400 | 2174 | ((CKDIV) == FDCAN_CLOCK_DIV14) || \ |
| AnnaBridge | 172:65be27845400 | 2175 | ((CKDIV) == FDCAN_CLOCK_DIV16) || \ |
| AnnaBridge | 172:65be27845400 | 2176 | ((CKDIV) == FDCAN_CLOCK_DIV18) || \ |
| AnnaBridge | 172:65be27845400 | 2177 | ((CKDIV) == FDCAN_CLOCK_DIV20) || \ |
| AnnaBridge | 172:65be27845400 | 2178 | ((CKDIV) == FDCAN_CLOCK_DIV22) || \ |
| AnnaBridge | 172:65be27845400 | 2179 | ((CKDIV) == FDCAN_CLOCK_DIV24) || \ |
| AnnaBridge | 172:65be27845400 | 2180 | ((CKDIV) == FDCAN_CLOCK_DIV26) || \ |
| AnnaBridge | 172:65be27845400 | 2181 | ((CKDIV) == FDCAN_CLOCK_DIV28) || \ |
| AnnaBridge | 172:65be27845400 | 2182 | ((CKDIV) == FDCAN_CLOCK_DIV30)) |
| AnnaBridge | 172:65be27845400 | 2183 | #define IS_FDCAN_NOMINAL_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 512U)) |
| AnnaBridge | 172:65be27845400 | 2184 | #define IS_FDCAN_NOMINAL_SJW(SJW) (((SJW) >= 1U) && ((SJW) <= 128U)) |
| AnnaBridge | 172:65be27845400 | 2185 | #define IS_FDCAN_NOMINAL_TSEG1(TSEG1) (((TSEG1) >= 1U) && ((TSEG1) <= 256U)) |
| AnnaBridge | 172:65be27845400 | 2186 | #define IS_FDCAN_NOMINAL_TSEG2(TSEG2) (((TSEG2) >= 1U) && ((TSEG2) <= 128U)) |
| AnnaBridge | 172:65be27845400 | 2187 | #define IS_FDCAN_DATA_PRESCALER(PRESCALER) (((PRESCALER) >= 1U) && ((PRESCALER) <= 32U)) |
| AnnaBridge | 172:65be27845400 | 2188 | #define IS_FDCAN_DATA_SJW(SJW) (((SJW) >= 1U) && ((SJW) <= 16U)) |
| AnnaBridge | 172:65be27845400 | 2189 | #define IS_FDCAN_DATA_TSEG1(TSEG1) (((TSEG1) >= 1U) && ((TSEG1) <= 32U)) |
| AnnaBridge | 172:65be27845400 | 2190 | #define IS_FDCAN_DATA_TSEG2(TSEG2) (((TSEG2) >= 1U) && ((TSEG2) <= 16U)) |
| AnnaBridge | 172:65be27845400 | 2191 | #define IS_FDCAN_MAX_VALUE(VALUE, MAX) ((VALUE) <= (MAX)) |
| AnnaBridge | 172:65be27845400 | 2192 | #define IS_FDCAN_MIN_VALUE(VALUE, MIN) ((VALUE) >= (MIN)) |
| AnnaBridge | 172:65be27845400 | 2193 | #define IS_FDCAN_DATA_SIZE(SIZE) (((SIZE) == FDCAN_DATA_BYTES_8 ) || \ |
| AnnaBridge | 172:65be27845400 | 2194 | ((SIZE) == FDCAN_DATA_BYTES_12) || \ |
| AnnaBridge | 172:65be27845400 | 2195 | ((SIZE) == FDCAN_DATA_BYTES_16) || \ |
| AnnaBridge | 172:65be27845400 | 2196 | ((SIZE) == FDCAN_DATA_BYTES_20) || \ |
| AnnaBridge | 172:65be27845400 | 2197 | ((SIZE) == FDCAN_DATA_BYTES_24) || \ |
| AnnaBridge | 172:65be27845400 | 2198 | ((SIZE) == FDCAN_DATA_BYTES_32) || \ |
| AnnaBridge | 172:65be27845400 | 2199 | ((SIZE) == FDCAN_DATA_BYTES_48) || \ |
| AnnaBridge | 172:65be27845400 | 2200 | ((SIZE) == FDCAN_DATA_BYTES_64)) |
| AnnaBridge | 172:65be27845400 | 2201 | #define IS_FDCAN_TX_FIFO_QUEUE_MODE(MODE) (((MODE) == FDCAN_TX_FIFO_OPERATION ) || \ |
| AnnaBridge | 172:65be27845400 | 2202 | ((MODE) == FDCAN_TX_QUEUE_OPERATION)) |
| AnnaBridge | 172:65be27845400 | 2203 | #define IS_FDCAN_ID_TYPE(ID_TYPE) (((ID_TYPE) == FDCAN_STANDARD_ID) || \ |
| AnnaBridge | 172:65be27845400 | 2204 | ((ID_TYPE) == FDCAN_EXTENDED_ID)) |
| AnnaBridge | 172:65be27845400 | 2205 | #define IS_FDCAN_FILTER_CFG(CONFIG) (((CONFIG) == FDCAN_FILTER_DISABLE ) || \ |
| AnnaBridge | 172:65be27845400 | 2206 | ((CONFIG) == FDCAN_FILTER_TO_RXFIFO0 ) || \ |
| AnnaBridge | 172:65be27845400 | 2207 | ((CONFIG) == FDCAN_FILTER_TO_RXFIFO1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2208 | ((CONFIG) == FDCAN_FILTER_REJECT ) || \ |
| AnnaBridge | 172:65be27845400 | 2209 | ((CONFIG) == FDCAN_FILTER_HP ) || \ |
| AnnaBridge | 172:65be27845400 | 2210 | ((CONFIG) == FDCAN_FILTER_TO_RXFIFO0_HP) || \ |
| AnnaBridge | 172:65be27845400 | 2211 | ((CONFIG) == FDCAN_FILTER_TO_RXFIFO1_HP) || \ |
| AnnaBridge | 172:65be27845400 | 2212 | ((CONFIG) == FDCAN_FILTER_TO_RXBUFFER )) |
| AnnaBridge | 172:65be27845400 | 2213 | #define IS_FDCAN_TX_LOCATION(LOCATION) (((LOCATION) == FDCAN_TX_BUFFER0 ) || ((LOCATION) == FDCAN_TX_BUFFER1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2214 | ((LOCATION) == FDCAN_TX_BUFFER2 ) || ((LOCATION) == FDCAN_TX_BUFFER3 ) || \ |
| AnnaBridge | 172:65be27845400 | 2215 | ((LOCATION) == FDCAN_TX_BUFFER4 ) || ((LOCATION) == FDCAN_TX_BUFFER5 ) || \ |
| AnnaBridge | 172:65be27845400 | 2216 | ((LOCATION) == FDCAN_TX_BUFFER6 ) || ((LOCATION) == FDCAN_TX_BUFFER7 ) || \ |
| AnnaBridge | 172:65be27845400 | 2217 | ((LOCATION) == FDCAN_TX_BUFFER8 ) || ((LOCATION) == FDCAN_TX_BUFFER9 ) || \ |
| AnnaBridge | 172:65be27845400 | 2218 | ((LOCATION) == FDCAN_TX_BUFFER10) || ((LOCATION) == FDCAN_TX_BUFFER11) || \ |
| AnnaBridge | 172:65be27845400 | 2219 | ((LOCATION) == FDCAN_TX_BUFFER12) || ((LOCATION) == FDCAN_TX_BUFFER13) || \ |
| AnnaBridge | 172:65be27845400 | 2220 | ((LOCATION) == FDCAN_TX_BUFFER14) || ((LOCATION) == FDCAN_TX_BUFFER15) || \ |
| AnnaBridge | 172:65be27845400 | 2221 | ((LOCATION) == FDCAN_TX_BUFFER16) || ((LOCATION) == FDCAN_TX_BUFFER17) || \ |
| AnnaBridge | 172:65be27845400 | 2222 | ((LOCATION) == FDCAN_TX_BUFFER18) || ((LOCATION) == FDCAN_TX_BUFFER19) || \ |
| AnnaBridge | 172:65be27845400 | 2223 | ((LOCATION) == FDCAN_TX_BUFFER20) || ((LOCATION) == FDCAN_TX_BUFFER21) || \ |
| AnnaBridge | 172:65be27845400 | 2224 | ((LOCATION) == FDCAN_TX_BUFFER22) || ((LOCATION) == FDCAN_TX_BUFFER23) || \ |
| AnnaBridge | 172:65be27845400 | 2225 | ((LOCATION) == FDCAN_TX_BUFFER24) || ((LOCATION) == FDCAN_TX_BUFFER25) || \ |
| AnnaBridge | 172:65be27845400 | 2226 | ((LOCATION) == FDCAN_TX_BUFFER26) || ((LOCATION) == FDCAN_TX_BUFFER27) || \ |
| AnnaBridge | 172:65be27845400 | 2227 | ((LOCATION) == FDCAN_TX_BUFFER28) || ((LOCATION) == FDCAN_TX_BUFFER29) || \ |
| AnnaBridge | 172:65be27845400 | 2228 | ((LOCATION) == FDCAN_TX_BUFFER30) || ((LOCATION) == FDCAN_TX_BUFFER31)) |
| AnnaBridge | 172:65be27845400 | 2229 | #define IS_FDCAN_RX_FIFO(FIFO) (((FIFO) == FDCAN_RX_FIFO0) || \ |
| AnnaBridge | 172:65be27845400 | 2230 | ((FIFO) == FDCAN_RX_FIFO1)) |
| AnnaBridge | 172:65be27845400 | 2231 | #define IS_FDCAN_RX_FIFO_MODE(MODE) (((MODE) == FDCAN_RX_FIFO_BLOCKING ) || \ |
| AnnaBridge | 172:65be27845400 | 2232 | ((MODE) == FDCAN_RX_FIFO_OVERWRITE)) |
| AnnaBridge | 172:65be27845400 | 2233 | #define IS_FDCAN_STD_FILTER_TYPE(TYPE) (((TYPE) == FDCAN_FILTER_RANGE) || \ |
| AnnaBridge | 172:65be27845400 | 2234 | ((TYPE) == FDCAN_FILTER_DUAL ) || \ |
| AnnaBridge | 172:65be27845400 | 2235 | ((TYPE) == FDCAN_FILTER_MASK )) |
| AnnaBridge | 172:65be27845400 | 2236 | #define IS_FDCAN_EXT_FILTER_TYPE(TYPE) (((TYPE) == FDCAN_FILTER_RANGE ) || \ |
| AnnaBridge | 172:65be27845400 | 2237 | ((TYPE) == FDCAN_FILTER_DUAL ) || \ |
| AnnaBridge | 172:65be27845400 | 2238 | ((TYPE) == FDCAN_FILTER_MASK ) || \ |
| AnnaBridge | 172:65be27845400 | 2239 | ((TYPE) == FDCAN_FILTER_RANGE_NO_EIDM)) |
| AnnaBridge | 172:65be27845400 | 2240 | #define IS_FDCAN_FRAME_TYPE(TYPE) (((TYPE) == FDCAN_DATA_FRAME ) || \ |
| AnnaBridge | 172:65be27845400 | 2241 | ((TYPE) == FDCAN_REMOTE_FRAME)) |
| AnnaBridge | 172:65be27845400 | 2242 | #define IS_FDCAN_DLC(DLC) (((DLC) == FDCAN_DLC_BYTES_0 ) || \ |
| AnnaBridge | 172:65be27845400 | 2243 | ((DLC) == FDCAN_DLC_BYTES_1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2244 | ((DLC) == FDCAN_DLC_BYTES_2 ) || \ |
| AnnaBridge | 172:65be27845400 | 2245 | ((DLC) == FDCAN_DLC_BYTES_3 ) || \ |
| AnnaBridge | 172:65be27845400 | 2246 | ((DLC) == FDCAN_DLC_BYTES_4 ) || \ |
| AnnaBridge | 172:65be27845400 | 2247 | ((DLC) == FDCAN_DLC_BYTES_5 ) || \ |
| AnnaBridge | 172:65be27845400 | 2248 | ((DLC) == FDCAN_DLC_BYTES_6 ) || \ |
| AnnaBridge | 172:65be27845400 | 2249 | ((DLC) == FDCAN_DLC_BYTES_7 ) || \ |
| AnnaBridge | 172:65be27845400 | 2250 | ((DLC) == FDCAN_DLC_BYTES_8 ) || \ |
| AnnaBridge | 172:65be27845400 | 2251 | ((DLC) == FDCAN_DLC_BYTES_12) || \ |
| AnnaBridge | 172:65be27845400 | 2252 | ((DLC) == FDCAN_DLC_BYTES_16) || \ |
| AnnaBridge | 172:65be27845400 | 2253 | ((DLC) == FDCAN_DLC_BYTES_20) || \ |
| AnnaBridge | 172:65be27845400 | 2254 | ((DLC) == FDCAN_DLC_BYTES_24) || \ |
| AnnaBridge | 172:65be27845400 | 2255 | ((DLC) == FDCAN_DLC_BYTES_32) || \ |
| AnnaBridge | 172:65be27845400 | 2256 | ((DLC) == FDCAN_DLC_BYTES_48) || \ |
| AnnaBridge | 172:65be27845400 | 2257 | ((DLC) == FDCAN_DLC_BYTES_64)) |
| AnnaBridge | 172:65be27845400 | 2258 | #define IS_FDCAN_ESI(ESI) (((ESI) == FDCAN_ESI_ACTIVE ) || \ |
| AnnaBridge | 172:65be27845400 | 2259 | ((ESI) == FDCAN_ESI_PASSIVE)) |
| AnnaBridge | 172:65be27845400 | 2260 | #define IS_FDCAN_BRS(BRS) (((BRS) == FDCAN_BRS_OFF) || \ |
| AnnaBridge | 172:65be27845400 | 2261 | ((BRS) == FDCAN_BRS_ON )) |
| AnnaBridge | 172:65be27845400 | 2262 | #define IS_FDCAN_FDF(FDF) (((FDF) == FDCAN_CLASSIC_CAN) || \ |
| AnnaBridge | 172:65be27845400 | 2263 | ((FDF) == FDCAN_FD_CAN )) |
| AnnaBridge | 172:65be27845400 | 2264 | #define IS_FDCAN_EFC(EFC) (((EFC) == FDCAN_NO_TX_EVENTS ) || \ |
| AnnaBridge | 172:65be27845400 | 2265 | ((EFC) == FDCAN_STORE_TX_EVENTS)) |
| AnnaBridge | 172:65be27845400 | 2266 | #define IS_FDCAN_IT(IT) (((IT) & ~(FDCAN_IR_MASK | CCU_IR_MASK)) == 0U) |
| AnnaBridge | 172:65be27845400 | 2267 | #define IS_FDCAN_TT_IT(IT) (((IT) & 0xFFF80000U) == 0U) |
| AnnaBridge | 172:65be27845400 | 2268 | #define IS_FDCAN_FIFO_WATERMARK(FIFO) (((FIFO) == FDCAN_CFG_TX_EVENT_FIFO) || \ |
| AnnaBridge | 172:65be27845400 | 2269 | ((FIFO) == FDCAN_CFG_RX_FIFO0 ) || \ |
| AnnaBridge | 172:65be27845400 | 2270 | ((FIFO) == FDCAN_CFG_RX_FIFO1 )) |
| AnnaBridge | 172:65be27845400 | 2271 | #define IS_FDCAN_NON_MATCHING(DESTINATION) (((DESTINATION) == FDCAN_ACCEPT_IN_RX_FIFO0) || \ |
| AnnaBridge | 172:65be27845400 | 2272 | ((DESTINATION) == FDCAN_ACCEPT_IN_RX_FIFO1) || \ |
| AnnaBridge | 172:65be27845400 | 2273 | ((DESTINATION) == FDCAN_REJECT )) |
| AnnaBridge | 172:65be27845400 | 2274 | #define IS_FDCAN_REJECT_REMOTE(DESTINATION) (((DESTINATION) == FDCAN_FILTER_REMOTE) || \ |
| AnnaBridge | 172:65be27845400 | 2275 | ((DESTINATION) == FDCAN_REJECT_REMOTE)) |
| AnnaBridge | 172:65be27845400 | 2276 | #define IS_FDCAN_IT_LINE(IT_LINE) (((IT_LINE) == FDCAN_INTERRUPT_LINE0) || \ |
| AnnaBridge | 172:65be27845400 | 2277 | ((IT_LINE) == FDCAN_INTERRUPT_LINE1)) |
| AnnaBridge | 172:65be27845400 | 2278 | #define IS_FDCAN_TIMESTAMP(OPERATION) (((OPERATION) == FDCAN_TIMESTAMP_INTERNAL) || \ |
| AnnaBridge | 172:65be27845400 | 2279 | ((OPERATION) == FDCAN_TIMESTAMP_EXTERNAL)) |
| AnnaBridge | 172:65be27845400 | 2280 | #define IS_FDCAN_TIMESTAMP_PRESCALER(PRESCALER) (((PRESCALER) == FDCAN_TIMESTAMP_PRESC_1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2281 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_2 ) || \ |
| AnnaBridge | 172:65be27845400 | 2282 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_3 ) || \ |
| AnnaBridge | 172:65be27845400 | 2283 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_4 ) || \ |
| AnnaBridge | 172:65be27845400 | 2284 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_5 ) || \ |
| AnnaBridge | 172:65be27845400 | 2285 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_6 ) || \ |
| AnnaBridge | 172:65be27845400 | 2286 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_7 ) || \ |
| AnnaBridge | 172:65be27845400 | 2287 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_8 ) || \ |
| AnnaBridge | 172:65be27845400 | 2288 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_9 ) || \ |
| AnnaBridge | 172:65be27845400 | 2289 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_10) || \ |
| AnnaBridge | 172:65be27845400 | 2290 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_11) || \ |
| AnnaBridge | 172:65be27845400 | 2291 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_12) || \ |
| AnnaBridge | 172:65be27845400 | 2292 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_13) || \ |
| AnnaBridge | 172:65be27845400 | 2293 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_14) || \ |
| AnnaBridge | 172:65be27845400 | 2294 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_15) || \ |
| AnnaBridge | 172:65be27845400 | 2295 | ((PRESCALER) == FDCAN_TIMESTAMP_PRESC_16)) |
| AnnaBridge | 172:65be27845400 | 2296 | #define IS_FDCAN_TIMEOUT(OPERATION) (((OPERATION) == FDCAN_TIMEOUT_CONTINUOUS ) || \ |
| AnnaBridge | 172:65be27845400 | 2297 | ((OPERATION) == FDCAN_TIMEOUT_TX_EVENT_FIFO) || \ |
| AnnaBridge | 172:65be27845400 | 2298 | ((OPERATION) == FDCAN_TIMEOUT_RX_FIFO0 ) || \ |
| AnnaBridge | 172:65be27845400 | 2299 | ((OPERATION) == FDCAN_TIMEOUT_RX_FIFO1 )) |
| AnnaBridge | 172:65be27845400 | 2300 | #define IS_FDCAN_CALIBRATION_FIELD_LENGTH(LENGTH) (((LENGTH) == FDCAN_CALIB_FIELD_LENGTH_32) || \ |
| AnnaBridge | 172:65be27845400 | 2301 | ((LENGTH) == FDCAN_CALIB_FIELD_LENGTH_64)) |
| AnnaBridge | 172:65be27845400 | 2302 | #define IS_FDCAN_CALIBRATION_COUNTER(COUNTER) (((COUNTER) == FDCAN_CALIB_TIME_QUANTA_COUNTER ) || \ |
| AnnaBridge | 172:65be27845400 | 2303 | ((COUNTER) == FDCAN_CALIB_CLOCK_PERIOD_COUNTER) || \ |
| AnnaBridge | 172:65be27845400 | 2304 | ((COUNTER) == FDCAN_CALIB_WATCHDOG_COUNTER )) |
| AnnaBridge | 172:65be27845400 | 2305 | #define IS_FDCAN_TT_REFERENCE_MESSAGE_PAYLOAD(PAYLOAD) (((PAYLOAD) == FDCAN_TT_REF_MESSAGE_NO_PAYLOAD ) || \ |
| AnnaBridge | 172:65be27845400 | 2306 | ((PAYLOAD) == FDCAN_TT_REF_MESSAGE_ADD_PAYLOAD)) |
| AnnaBridge | 172:65be27845400 | 2307 | #define IS_FDCAN_TT_REPEAT_FACTOR(FACTOR) (((FACTOR) == FDCAN_TT_REPEAT_EVERY_CYCLE ) || \ |
| AnnaBridge | 172:65be27845400 | 2308 | ((FACTOR) == FDCAN_TT_REPEAT_EVERY_2ND_CYCLE ) || \ |
| AnnaBridge | 172:65be27845400 | 2309 | ((FACTOR) == FDCAN_TT_REPEAT_EVERY_4TH_CYCLE ) || \ |
| AnnaBridge | 172:65be27845400 | 2310 | ((FACTOR) == FDCAN_TT_REPEAT_EVERY_8TH_CYCLE ) || \ |
| AnnaBridge | 172:65be27845400 | 2311 | ((FACTOR) == FDCAN_TT_REPEAT_EVERY_16TH_CYCLE) || \ |
| AnnaBridge | 172:65be27845400 | 2312 | ((FACTOR) == FDCAN_TT_REPEAT_EVERY_32ND_CYCLE) || \ |
| AnnaBridge | 172:65be27845400 | 2313 | ((FACTOR) == FDCAN_TT_REPEAT_EVERY_64TH_CYCLE)) |
| AnnaBridge | 172:65be27845400 | 2314 | #define IS_FDCAN_TT_TRIGGER_TYPE(TYPE) (((TYPE) == FDCAN_TT_TX_REF_TRIGGER ) || \ |
| AnnaBridge | 172:65be27845400 | 2315 | ((TYPE) == FDCAN_TT_TX_REF_TRIGGER_GAP ) || \ |
| AnnaBridge | 172:65be27845400 | 2316 | ((TYPE) == FDCAN_TT_TX_TRIGGER_SINGLE ) || \ |
| AnnaBridge | 172:65be27845400 | 2317 | ((TYPE) == FDCAN_TT_TX_TRIGGER_CONTINUOUS ) || \ |
| AnnaBridge | 172:65be27845400 | 2318 | ((TYPE) == FDCAN_TT_TX_TRIGGER_ARBITRATION) || \ |
| AnnaBridge | 172:65be27845400 | 2319 | ((TYPE) == FDCAN_TT_TX_TRIGGER_MERGED ) || \ |
| AnnaBridge | 172:65be27845400 | 2320 | ((TYPE) == FDCAN_TT_WATCH_TRIGGER ) || \ |
| AnnaBridge | 172:65be27845400 | 2321 | ((TYPE) == FDCAN_TT_WATCH_TRIGGER_GAP ) || \ |
| AnnaBridge | 172:65be27845400 | 2322 | ((TYPE) == FDCAN_TT_RX_TRIGGER ) || \ |
| AnnaBridge | 172:65be27845400 | 2323 | ((TYPE) == FDCAN_TT_TIME_BASE_TRIGGER ) || \ |
| AnnaBridge | 172:65be27845400 | 2324 | ((TYPE) == FDCAN_TT_END_OF_LIST )) |
| AnnaBridge | 172:65be27845400 | 2325 | #define IS_FDCAN_TT_TM_EVENT_INTERNAL(EVENT) (((EVENT) == FDCAN_TT_TM_NO_INTERNAL_EVENT ) || \ |
| AnnaBridge | 172:65be27845400 | 2326 | ((EVENT) == FDCAN_TT_TM_GEN_INTERNAL_EVENT)) |
| AnnaBridge | 172:65be27845400 | 2327 | #define IS_FDCAN_TT_TM_EVENT_EXTERNAL(EVENT) (((EVENT) == FDCAN_TT_TM_NO_EXTERNAL_EVENT ) || \ |
| AnnaBridge | 172:65be27845400 | 2328 | ((EVENT) == FDCAN_TT_TM_GEN_EXTERNAL_EVENT)) |
| AnnaBridge | 172:65be27845400 | 2329 | #define IS_FDCAN_OPERATION_MODE(MODE) (((MODE) == FDCAN_TT_COMMUNICATION_LEVEL1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2330 | ((MODE) == FDCAN_TT_COMMUNICATION_LEVEL2 ) || \ |
| AnnaBridge | 172:65be27845400 | 2331 | ((MODE) == FDCAN_TT_COMMUNICATION_LEVEL0 )) |
| AnnaBridge | 172:65be27845400 | 2332 | #define IS_FDCAN_TT_OPERATION(OPERATION) (((OPERATION) == FDCAN_STRICTLY_TT_OPERATION ) || \ |
| AnnaBridge | 172:65be27845400 | 2333 | ((OPERATION) == FDCAN_EXT_EVT_SYNC_TT_OPERATION)) |
| AnnaBridge | 172:65be27845400 | 2334 | #define IS_FDCAN_TT_TIME_MASTER(FUNCTION) (((FUNCTION) == FDCAN_TT_SLAVE ) || \ |
| AnnaBridge | 172:65be27845400 | 2335 | ((FUNCTION) == FDCAN_TT_POTENTIAL_MASTER)) |
| AnnaBridge | 172:65be27845400 | 2336 | #define IS_FDCAN_TT_EXTERNAL_CLK_SYNC(SYNC) (((SYNC) == FDCAN_TT_EXT_CLK_SYNC_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 2337 | ((SYNC) == FDCAN_TT_EXT_CLK_SYNC_ENABLE )) |
| AnnaBridge | 172:65be27845400 | 2338 | #define IS_FDCAN_TT_GLOBAL_TIME_FILTERING(FILTERING) (((FILTERING) == FDCAN_TT_GLOB_TIME_FILT_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 2339 | ((FILTERING) == FDCAN_TT_GLOB_TIME_FILT_ENABLE )) |
| AnnaBridge | 172:65be27845400 | 2340 | #define IS_FDCAN_TT_AUTO_CLK_CALIBRATION(CALIBRATION) (((CALIBRATION) == FDCAN_TT_AUTO_CLK_CALIB_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 2341 | ((CALIBRATION) == FDCAN_TT_AUTO_CLK_CALIB_ENABLE )) |
| AnnaBridge | 172:65be27845400 | 2342 | #define IS_FDCAN_TT_EVENT_TRIGGER_POLARITY(POLARITY) (((POLARITY) == FDCAN_TT_EVT_TRIG_POL_RISING ) || \ |
| AnnaBridge | 172:65be27845400 | 2343 | ((POLARITY) == FDCAN_TT_EVT_TRIG_POL_FALLING)) |
| AnnaBridge | 172:65be27845400 | 2344 | #define IS_FDCAN_TT_BASIC_CYCLES_NUMBER(NUMBER) (((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_1 ) || \ |
| AnnaBridge | 172:65be27845400 | 2345 | ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_2 ) || \ |
| AnnaBridge | 172:65be27845400 | 2346 | ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_4 ) || \ |
| AnnaBridge | 172:65be27845400 | 2347 | ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_8 ) || \ |
| AnnaBridge | 172:65be27845400 | 2348 | ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_16) || \ |
| AnnaBridge | 172:65be27845400 | 2349 | ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_32) || \ |
| AnnaBridge | 172:65be27845400 | 2350 | ((NUMBER) == FDCAN_TT_CYCLES_PER_MATRIX_64)) |
| AnnaBridge | 172:65be27845400 | 2351 | #define IS_FDCAN_TT_CYCLE_START_SYNC(SYNC) (((SYNC) == FDCAN_TT_NO_SYNC_PULSE ) || \ |
| AnnaBridge | 172:65be27845400 | 2352 | ((SYNC) == FDCAN_TT_SYNC_BASIC_CYCLE_START) || \ |
| AnnaBridge | 172:65be27845400 | 2353 | ((SYNC) == FDCAN_TT_SYNC_MATRIX_START )) |
| AnnaBridge | 172:65be27845400 | 2354 | #define IS_FDCAN_TT_TX_ENABLE_WINDOW(NTU) (((NTU) >= 1U) && ((NTU) <= 16U)) |
| AnnaBridge | 172:65be27845400 | 2355 | #define IS_FDCAN_TT_TUR_NUMERATOR(NUMERATOR) (((NUMERATOR) >= 0x10000U) && ((NUMERATOR) <= 0x1FFFFU)) |
| AnnaBridge | 172:65be27845400 | 2356 | #define IS_FDCAN_TT_TUR_DENOMINATOR(DENOMINATOR) (((DENOMINATOR) >= 0x0001U) && ((DENOMINATOR) <= 0x3FFFU)) |
| AnnaBridge | 172:65be27845400 | 2357 | #define IS_FDCAN_TT_TUR_LEVEL_1(NC,DC) ((NC) >= (4U * (DC))) |
| AnnaBridge | 172:65be27845400 | 2358 | #define IS_FDCAN_TT_TUR_LEVEL_0_2(NC,DC) ((NC) >= (8U * (DC))) |
| AnnaBridge | 172:65be27845400 | 2359 | #define IS_FDCAN_TT_STOP_WATCH_TRIGGER(TRIGGER) (((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_0) || \ |
| AnnaBridge | 172:65be27845400 | 2360 | ((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_1) || \ |
| AnnaBridge | 172:65be27845400 | 2361 | ((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_2) || \ |
| AnnaBridge | 172:65be27845400 | 2362 | ((TRIGGER) == FDCAN_TT_STOP_WATCH_TRIGGER_3)) |
| AnnaBridge | 172:65be27845400 | 2363 | #define IS_FDCAN_TT_EVENT_TRIGGER(TRIGGER) (((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_0) || \ |
| AnnaBridge | 172:65be27845400 | 2364 | ((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_1) || \ |
| AnnaBridge | 172:65be27845400 | 2365 | ((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_2) || \ |
| AnnaBridge | 172:65be27845400 | 2366 | ((TRIGGER) == FDCAN_TT_EVENT_TRIGGER_3)) |
| AnnaBridge | 172:65be27845400 | 2367 | #define IS_FDCAN_TT_TIME_PRESET(TIME) (((TIME) <= 0xFFFFU) && ((TIME) != 0x8000U)) |
| AnnaBridge | 172:65be27845400 | 2368 | #define IS_FDCAN_TT_STOP_WATCH_SOURCE(SOURCE) (((SOURCE) == FDCAN_TT_STOP_WATCH_DISABLED ) || \ |
| AnnaBridge | 172:65be27845400 | 2369 | ((SOURCE) == FDCAN_TT_STOP_WATCH_CYCLE_TIME ) || \ |
| AnnaBridge | 172:65be27845400 | 2370 | ((SOURCE) == FDCAN_TT_STOP_WATCH_LOCAL_TIME ) || \ |
| AnnaBridge | 172:65be27845400 | 2371 | ((SOURCE) == FDCAN_TT_STOP_WATCH_GLOBAL_TIME)) |
| AnnaBridge | 172:65be27845400 | 2372 | #define IS_FDCAN_TT_STOP_WATCH_POLARITY(POLARITY) (((POLARITY) == FDCAN_TT_STOP_WATCH_RISING ) || \ |
| AnnaBridge | 172:65be27845400 | 2373 | ((POLARITY) == FDCAN_TT_STOP_WATCH_FALLING)) |
| AnnaBridge | 172:65be27845400 | 2374 | #define IS_FDCAN_TT_REGISTER_TIME_MARK_SOURCE(SOURCE) (((SOURCE) == FDCAN_TT_REG_TIMEMARK_DIABLED ) || \ |
| AnnaBridge | 172:65be27845400 | 2375 | ((SOURCE) == FDCAN_TT_REG_TIMEMARK_CYC_TIME) || \ |
| AnnaBridge | 172:65be27845400 | 2376 | ((SOURCE) == FDCAN_TT_REG_TIMEMARK_LOC_TIME) || \ |
| AnnaBridge | 172:65be27845400 | 2377 | ((SOURCE) == FDCAN_TT_REG_TIMEMARK_GLO_TIME)) |
| AnnaBridge | 172:65be27845400 | 2378 | /** |
| AnnaBridge | 172:65be27845400 | 2379 | * @} |
| AnnaBridge | 172:65be27845400 | 2380 | */ |
| AnnaBridge | 172:65be27845400 | 2381 | |
| AnnaBridge | 172:65be27845400 | 2382 | /* Private functions prototypes ----------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 2383 | /** @defgroup FDCAN_Private_Functions_Prototypes FDCAN Private Functions Prototypes |
| AnnaBridge | 172:65be27845400 | 2384 | * @{ |
| AnnaBridge | 172:65be27845400 | 2385 | */ |
| AnnaBridge | 172:65be27845400 | 2386 | |
| AnnaBridge | 172:65be27845400 | 2387 | /** |
| AnnaBridge | 172:65be27845400 | 2388 | * @} |
| AnnaBridge | 172:65be27845400 | 2389 | */ |
| AnnaBridge | 172:65be27845400 | 2390 | |
| AnnaBridge | 172:65be27845400 | 2391 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 2392 | /** @defgroup FDCAN_Private_Functions FDCAN Private Functions |
| AnnaBridge | 172:65be27845400 | 2393 | * @{ |
| AnnaBridge | 172:65be27845400 | 2394 | */ |
| AnnaBridge | 172:65be27845400 | 2395 | |
| AnnaBridge | 172:65be27845400 | 2396 | /** |
| AnnaBridge | 172:65be27845400 | 2397 | * @} |
| AnnaBridge | 172:65be27845400 | 2398 | */ |
| AnnaBridge | 172:65be27845400 | 2399 | /** |
| AnnaBridge | 172:65be27845400 | 2400 | * @} |
| AnnaBridge | 172:65be27845400 | 2401 | */ |
| AnnaBridge | 172:65be27845400 | 2402 | |
| AnnaBridge | 172:65be27845400 | 2403 | /** |
| AnnaBridge | 172:65be27845400 | 2404 | * @} |
| AnnaBridge | 172:65be27845400 | 2405 | */ |
| AnnaBridge | 172:65be27845400 | 2406 | |
| AnnaBridge | 172:65be27845400 | 2407 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 2408 | } |
| AnnaBridge | 172:65be27845400 | 2409 | #endif |
| AnnaBridge | 172:65be27845400 | 2410 | |
| AnnaBridge | 172:65be27845400 | 2411 | #endif /* STM32H7xx_HAL_FDCAN_H */ |
| AnnaBridge | 172:65be27845400 | 2412 | |
| AnnaBridge | 172:65be27845400 | 2413 | |
| AnnaBridge | 172:65be27845400 | 2414 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
