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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_ll_lptim.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32h7xx_ll_lptim.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of LPTIM LL module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© Copyright (c) 2017 STMicroelectronics.
AnnaBridge	172:65be27845400	10	* All rights reserved.</center></h2>
AnnaBridge	172:65be27845400	11	*
AnnaBridge	172:65be27845400	12	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	172:65be27845400	13	* the "License"; You may not use this file except in compliance with the
AnnaBridge	172:65be27845400	14	* License. You may obtain a copy of the License at:
AnnaBridge	172:65be27845400	15	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	172:65be27845400	16	*
AnnaBridge	172:65be27845400	17	******************************************************************************
AnnaBridge	172:65be27845400	18	*/
AnnaBridge	172:65be27845400	19
AnnaBridge	172:65be27845400	20	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	21	#ifndef STM32H7xx_LL_LPTIM_H
AnnaBridge	172:65be27845400	22	#define STM32H7xx_LL_LPTIM_H
AnnaBridge	172:65be27845400	23
AnnaBridge	172:65be27845400	24	#ifdef __cplusplus
AnnaBridge	172:65be27845400	25	extern "C" {
AnnaBridge	172:65be27845400	26	#endif
AnnaBridge	172:65be27845400	27
AnnaBridge	172:65be27845400	28	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	29	#include "stm32h7xx.h"
AnnaBridge	172:65be27845400	30
AnnaBridge	172:65be27845400	31	/** @addtogroup STM32H7xx_LL_Driver
AnnaBridge	172:65be27845400	32	* @{
AnnaBridge	172:65be27845400	33	*/
AnnaBridge	172:65be27845400	34
AnnaBridge	172:65be27845400	35	#if defined (LPTIM1) \|\| defined (LPTIM2) \|\| defined (LPTIM3) \|\| defined (LPTIM4) \|\| defined (LPTIM5)
AnnaBridge	172:65be27845400	36
AnnaBridge	172:65be27845400	37	/** @defgroup LPTIM_LL LPTIM
AnnaBridge	172:65be27845400	38	* @{
AnnaBridge	172:65be27845400	39	*/
AnnaBridge	172:65be27845400	40
AnnaBridge	172:65be27845400	41	/* Private types -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	42	/* Private variables ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	43
AnnaBridge	172:65be27845400	44	/* Private constants ---------------------------------------------------------*/
AnnaBridge	172:65be27845400	45
AnnaBridge	172:65be27845400	46	/* Private macros ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	47	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	48	/** @defgroup LPTIM_LL_Private_Macros LPTIM Private Macros
AnnaBridge	172:65be27845400	49	* @{
AnnaBridge	172:65be27845400	50	*/
AnnaBridge	172:65be27845400	51	/**
AnnaBridge	172:65be27845400	52	* @}
AnnaBridge	172:65be27845400	53	*/
AnnaBridge	172:65be27845400	54	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	172:65be27845400	55
AnnaBridge	172:65be27845400	56	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	57	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	58	/** @defgroup LPTIM_LL_ES_INIT LPTIM Exported Init structure
AnnaBridge	172:65be27845400	59	* @{
AnnaBridge	172:65be27845400	60	*/
AnnaBridge	172:65be27845400	61
AnnaBridge	172:65be27845400	62	/**
AnnaBridge	172:65be27845400	63	* @brief LPTIM Init structure definition
AnnaBridge	172:65be27845400	64	*/
AnnaBridge	172:65be27845400	65	typedef struct
AnnaBridge	172:65be27845400	66	{
AnnaBridge	172:65be27845400	67	uint32_t ClockSource; /*!< Specifies the source of the clock used by the LPTIM instance.
AnnaBridge	172:65be27845400	68	This parameter can be a value of @ref LPTIM_LL_EC_CLK_SOURCE.
AnnaBridge	172:65be27845400	69
AnnaBridge	172:65be27845400	70	This feature can be modified afterwards using unitary function @ref LL_LPTIM_SetClockSource().*/
AnnaBridge	172:65be27845400	71
AnnaBridge	172:65be27845400	72	uint32_t Prescaler; /*!< Specifies the prescaler division ratio.
AnnaBridge	172:65be27845400	73	This parameter can be a value of @ref LPTIM_LL_EC_PRESCALER.
AnnaBridge	172:65be27845400	74
AnnaBridge	172:65be27845400	75	This feature can be modified afterwards using using unitary function @ref LL_LPTIM_SetPrescaler().*/
AnnaBridge	172:65be27845400	76
AnnaBridge	172:65be27845400	77	uint32_t Waveform; /*!< Specifies the waveform shape.
AnnaBridge	172:65be27845400	78	This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_WAVEFORM.
AnnaBridge	172:65be27845400	79
AnnaBridge	172:65be27845400	80	This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge	172:65be27845400	81
AnnaBridge	172:65be27845400	82	uint32_t Polarity; /*!< Specifies waveform polarity.
AnnaBridge	172:65be27845400	83	This parameter can be a value of @ref LPTIM_LL_EC_OUTPUT_POLARITY.
AnnaBridge	172:65be27845400	84
AnnaBridge	172:65be27845400	85	This feature can be modified afterwards using unitary function @ref LL_LPTIM_ConfigOutput().*/
AnnaBridge	172:65be27845400	86	} LL_LPTIM_InitTypeDef;
AnnaBridge	172:65be27845400	87
AnnaBridge	172:65be27845400	88	/**
AnnaBridge	172:65be27845400	89	* @}
AnnaBridge	172:65be27845400	90	*/
AnnaBridge	172:65be27845400	91	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	92
AnnaBridge	172:65be27845400	93	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	94	/** @defgroup LPTIM_LL_Exported_Constants LPTIM Exported Constants
AnnaBridge	172:65be27845400	95	* @{
AnnaBridge	172:65be27845400	96	*/
AnnaBridge	172:65be27845400	97
AnnaBridge	172:65be27845400	98	/** @defgroup LPTIM_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	172:65be27845400	99	* @brief Flags defines which can be used with LL_LPTIM_ReadReg function
AnnaBridge	172:65be27845400	100	* @{
AnnaBridge	172:65be27845400	101	*/
AnnaBridge	172:65be27845400	102	#define LL_LPTIM_ISR_CMPM LPTIM_ISR_CMPM /!< Compare match /
AnnaBridge	172:65be27845400	103	#define LL_LPTIM_ISR_ARRM LPTIM_ISR_ARRM /!< Autoreload match /
AnnaBridge	172:65be27845400	104	#define LL_LPTIM_ISR_EXTTRIG LPTIM_ISR_EXTTRIG /!< External trigger edge event /
AnnaBridge	172:65be27845400	105	#define LL_LPTIM_ISR_CMPOK LPTIM_ISR_CMPOK /!< Compare register update OK /
AnnaBridge	172:65be27845400	106	#define LL_LPTIM_ISR_ARROK LPTIM_ISR_ARROK /!< Autoreload register update OK /
AnnaBridge	172:65be27845400	107	#define LL_LPTIM_ISR_UP LPTIM_ISR_UP /!< Counter direction change down to up /
AnnaBridge	172:65be27845400	108	#define LL_LPTIM_ISR_DOWN LPTIM_ISR_DOWN /!< Counter direction change up to down /
AnnaBridge	172:65be27845400	109	/**
AnnaBridge	172:65be27845400	110	* @}
AnnaBridge	172:65be27845400	111	*/
AnnaBridge	172:65be27845400	112
AnnaBridge	172:65be27845400	113	/** @defgroup LPTIM_LL_EC_IT IT Defines
AnnaBridge	172:65be27845400	114	* @brief IT defines which can be used with LL_LPTIM_ReadReg and LL_LPTIM_WriteReg functions
AnnaBridge	172:65be27845400	115	* @{
AnnaBridge	172:65be27845400	116	*/
AnnaBridge	172:65be27845400	117	#define LL_LPTIM_IER_CMPMIE LPTIM_IER_CMPMIE /!< Compare match Interrupt Enable /
AnnaBridge	172:65be27845400	118	#define LL_LPTIM_IER_ARRMIE LPTIM_IER_ARRMIE /!< Autoreload match Interrupt Enable /
AnnaBridge	172:65be27845400	119	#define LL_LPTIM_IER_EXTTRIGIE LPTIM_IER_EXTTRIGIE /!< External trigger valid edge Interrupt Enable /
AnnaBridge	172:65be27845400	120	#define LL_LPTIM_IER_CMPOKIE LPTIM_IER_CMPOKIE /!< Compare register update OK Interrupt Enable /
AnnaBridge	172:65be27845400	121	#define LL_LPTIM_IER_ARROKIE LPTIM_IER_ARROKIE /!< Autoreload register update OK Interrupt Enable /
AnnaBridge	172:65be27845400	122	#define LL_LPTIM_IER_UPIE LPTIM_IER_UPIE /!< Direction change to UP Interrupt Enable /
AnnaBridge	172:65be27845400	123	#define LL_LPTIM_IER_DOWNIE LPTIM_IER_DOWNIE /!< Direction change to down Interrupt Enable /
AnnaBridge	172:65be27845400	124	/**
AnnaBridge	172:65be27845400	125	* @}
AnnaBridge	172:65be27845400	126	*/
AnnaBridge	172:65be27845400	127
AnnaBridge	172:65be27845400	128	/** @defgroup LPTIM_LL_EC_OPERATING_MODE Operating Mode
AnnaBridge	172:65be27845400	129	* @{
AnnaBridge	172:65be27845400	130	*/
AnnaBridge	172:65be27845400	131	#define LL_LPTIM_OPERATING_MODE_CONTINUOUS LPTIM_CR_CNTSTRT /!<LP Timer starts in continuous mode/
AnnaBridge	172:65be27845400	132	#define LL_LPTIM_OPERATING_MODE_ONESHOT LPTIM_CR_SNGSTRT /!<LP Tilmer starts in single mode/
AnnaBridge	172:65be27845400	133	/**
AnnaBridge	172:65be27845400	134	* @}
AnnaBridge	172:65be27845400	135	*/
AnnaBridge	172:65be27845400	136
AnnaBridge	172:65be27845400	137	/** @defgroup LPTIM_LL_EC_UPDATE_MODE Update Mode
AnnaBridge	172:65be27845400	138	* @{
AnnaBridge	172:65be27845400	139	*/
AnnaBridge	172:65be27845400	140	#define LL_LPTIM_UPDATE_MODE_IMMEDIATE 0x00000000U /!<Preload is disabled: registers are updated after each APB bus write access/
AnnaBridge	172:65be27845400	141	#define LL_LPTIM_UPDATE_MODE_ENDOFPERIOD LPTIM_CFGR_PRELOAD /!<preload is enabled: registers are updated at the end of the current LPTIM period/
AnnaBridge	172:65be27845400	142	/**
AnnaBridge	172:65be27845400	143	* @}
AnnaBridge	172:65be27845400	144	*/
AnnaBridge	172:65be27845400	145
AnnaBridge	172:65be27845400	146	/** @defgroup LPTIM_LL_EC_COUNTER_MODE Counter Mode
AnnaBridge	172:65be27845400	147	* @{
AnnaBridge	172:65be27845400	148	*/
AnnaBridge	172:65be27845400	149	#define LL_LPTIM_COUNTER_MODE_INTERNAL 0x00000000U /!<The counter is incremented following each internal clock pulse/
AnnaBridge	172:65be27845400	150	#define LL_LPTIM_COUNTER_MODE_EXTERNAL LPTIM_CFGR_COUNTMODE /!<The counter is incremented following each valid clock pulse on the LPTIM external Input1/
AnnaBridge	172:65be27845400	151	/**
AnnaBridge	172:65be27845400	152	* @}
AnnaBridge	172:65be27845400	153	*/
AnnaBridge	172:65be27845400	154
AnnaBridge	172:65be27845400	155	/** @defgroup LPTIM_LL_EC_OUTPUT_WAVEFORM Output Waveform Type
AnnaBridge	172:65be27845400	156	* @{
AnnaBridge	172:65be27845400	157	*/
AnnaBridge	172:65be27845400	158	#define LL_LPTIM_OUTPUT_WAVEFORM_PWM 0x00000000U /!<LPTIM generates either a PWM waveform or a One pulse waveform depending on chosen operating mode CONTINOUS or SINGLE/
AnnaBridge	172:65be27845400	159	#define LL_LPTIM_OUTPUT_WAVEFORM_SETONCE LPTIM_CFGR_WAVE /!<LPTIM generates a Set Once waveform/
AnnaBridge	172:65be27845400	160	/**
AnnaBridge	172:65be27845400	161	* @}
AnnaBridge	172:65be27845400	162	*/
AnnaBridge	172:65be27845400	163
AnnaBridge	172:65be27845400	164	/** @defgroup LPTIM_LL_EC_OUTPUT_POLARITY Output Polarity
AnnaBridge	172:65be27845400	165	* @{
AnnaBridge	172:65be27845400	166	*/
AnnaBridge	172:65be27845400	167	#define LL_LPTIM_OUTPUT_POLARITY_REGULAR 0x00000000U /!<The LPTIM output reflects the compare results between LPTIMx_ARR and LPTIMx_CMP registers/
AnnaBridge	172:65be27845400	168	#define LL_LPTIM_OUTPUT_POLARITY_INVERSE LPTIM_CFGR_WAVPOL /!<The LPTIM output reflects the inverse of the compare results between LPTIMx_ARR and LPTIMx_CMP registers/
AnnaBridge	172:65be27845400	169	/**
AnnaBridge	172:65be27845400	170	* @}
AnnaBridge	172:65be27845400	171	*/
AnnaBridge	172:65be27845400	172
AnnaBridge	172:65be27845400	173	/** @defgroup LPTIM_LL_EC_PRESCALER Prescaler Value
AnnaBridge	172:65be27845400	174	* @{
AnnaBridge	172:65be27845400	175	*/
AnnaBridge	172:65be27845400	176	#define LL_LPTIM_PRESCALER_DIV1 0x00000000U /!<Prescaler division factor is set to 1/
AnnaBridge	172:65be27845400	177	#define LL_LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0 /!<Prescaler division factor is set to 2/
AnnaBridge	172:65be27845400	178	#define LL_LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1 /!<Prescaler division factor is set to 4/
AnnaBridge	172:65be27845400	179	#define LL_LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_1 \| LPTIM_CFGR_PRESC_0) /!<Prescaler division factor is set to 8/
AnnaBridge	172:65be27845400	180	#define LL_LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2 /!<Prescaler division factor is set to 16/
AnnaBridge	172:65be27845400	181	#define LL_LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_2 \| LPTIM_CFGR_PRESC_0) /!<Prescaler division factor is set to 32/
AnnaBridge	172:65be27845400	182	#define LL_LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_2 \| LPTIM_CFGR_PRESC_1) /!<Prescaler division factor is set to 64/
AnnaBridge	172:65be27845400	183	#define LL_LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC /!<Prescaler division factor is set to 128/
AnnaBridge	172:65be27845400	184	/**
AnnaBridge	172:65be27845400	185	* @}
AnnaBridge	172:65be27845400	186	*/
AnnaBridge	172:65be27845400	187
AnnaBridge	172:65be27845400	188	/** @defgroup LPTIM_LL_EC_TRIG_SOURCE Trigger Source
AnnaBridge	172:65be27845400	189	* @{
AnnaBridge	172:65be27845400	190	*/
AnnaBridge	172:65be27845400	191	#define LL_LPTIM_TRIG_SOURCE_GPIO 0x00000000U /!<External input trigger is connected to TIMx_ETR input/
AnnaBridge	172:65be27845400	192	#define LL_LPTIM_TRIG_SOURCE_RTCALARMA LPTIM_CFGR_TRIGSEL_0 /!<External input trigger is connected to RTC Alarm A/
AnnaBridge	172:65be27845400	193	#define LL_LPTIM_TRIG_SOURCE_RTCALARMB LPTIM_CFGR_TRIGSEL_1 /!<External input trigger is connected to RTC Alarm B/
AnnaBridge	172:65be27845400	194	#define LL_LPTIM_TRIG_SOURCE_RTCTAMP1 (LPTIM_CFGR_TRIGSEL_1 \| LPTIM_CFGR_TRIGSEL_0) /!<External input trigger is connected to RTC Tamper 1/
AnnaBridge	172:65be27845400	195	#define LL_LPTIM_TRIG_SOURCE_RTCTAMP2 LPTIM_CFGR_TRIGSEL_2 /!<External input trigger is connected to RTC Tamper 2/
AnnaBridge	172:65be27845400	196	#define LL_LPTIM_TRIG_SOURCE_RTCTAMP3 (LPTIM_CFGR_TRIGSEL_2 \| LPTIM_CFGR_TRIGSEL_0) /!<External input trigger is connected to RTC Tamper 3/
AnnaBridge	172:65be27845400	197	#define LL_LPTIM_TRIG_SOURCE_COMP1 (LPTIM_CFGR_TRIGSEL_2 \| LPTIM_CFGR_TRIGSEL_1) /!<External input trigger is connected to COMP1 output/
AnnaBridge	172:65be27845400	198	#define LL_LPTIM_TRIG_SOURCE_COMP2 LPTIM_CFGR_TRIGSEL /!<External input trigger is connected to COMP2 output/
AnnaBridge	172:65be27845400	199	/**
AnnaBridge	172:65be27845400	200	* @}
AnnaBridge	172:65be27845400	201	*/
AnnaBridge	172:65be27845400	202
AnnaBridge	172:65be27845400	203	/** @defgroup LPTIM_LL_EC_TRIG_FILTER Trigger Filter
AnnaBridge	172:65be27845400	204	* @{
AnnaBridge	172:65be27845400	205	*/
AnnaBridge	172:65be27845400	206	#define LL_LPTIM_TRIG_FILTER_NONE 0x00000000U /!<Any trigger active level change is considered as a valid trigger/
AnnaBridge	172:65be27845400	207	#define LL_LPTIM_TRIG_FILTER_2 LPTIM_CFGR_TRGFLT_0 /!<Trigger active level change must be stable for at least 2 clock periods before it is considered as valid trigger/
AnnaBridge	172:65be27845400	208	#define LL_LPTIM_TRIG_FILTER_4 LPTIM_CFGR_TRGFLT_1 /!<Trigger active level change must be stable for at least 4 clock periods before it is considered as valid trigger/
AnnaBridge	172:65be27845400	209	#define LL_LPTIM_TRIG_FILTER_8 LPTIM_CFGR_TRGFLT /!<Trigger active level change must be stable for at least 8 clock periods before it is considered as valid trigger/
AnnaBridge	172:65be27845400	210	/**
AnnaBridge	172:65be27845400	211	* @}
AnnaBridge	172:65be27845400	212	*/
AnnaBridge	172:65be27845400	213
AnnaBridge	172:65be27845400	214	/** @defgroup LPTIM_LL_EC_TRIG_POLARITY Trigger Polarity
AnnaBridge	172:65be27845400	215	* @{
AnnaBridge	172:65be27845400	216	*/
AnnaBridge	172:65be27845400	217	#define LL_LPTIM_TRIG_POLARITY_RISING LPTIM_CFGR_TRIGEN_0 /!<LPTIM counter starts when a rising edge is detected/
AnnaBridge	172:65be27845400	218	#define LL_LPTIM_TRIG_POLARITY_FALLING LPTIM_CFGR_TRIGEN_1 /!<LPTIM counter starts when a falling edge is detected/
AnnaBridge	172:65be27845400	219	#define LL_LPTIM_TRIG_POLARITY_RISING_FALLING LPTIM_CFGR_TRIGEN /!<LPTIM counter starts when a rising or a falling edge is detected/
AnnaBridge	172:65be27845400	220	/**
AnnaBridge	172:65be27845400	221	* @}
AnnaBridge	172:65be27845400	222	*/
AnnaBridge	172:65be27845400	223
AnnaBridge	172:65be27845400	224	/** @defgroup LPTIM_LL_EC_CLK_SOURCE Clock Source
AnnaBridge	172:65be27845400	225	* @{
AnnaBridge	172:65be27845400	226	*/
AnnaBridge	172:65be27845400	227	#define LL_LPTIM_CLK_SOURCE_INTERNAL 0x00000000U /!<LPTIM is clocked by internal clock source (APB clock or any of the embedded oscillators)/
AnnaBridge	172:65be27845400	228	#define LL_LPTIM_CLK_SOURCE_EXTERNAL LPTIM_CFGR_CKSEL /!<LPTIM is clocked by an external clock source through the LPTIM external Input1/
AnnaBridge	172:65be27845400	229	/**
AnnaBridge	172:65be27845400	230	* @}
AnnaBridge	172:65be27845400	231	*/
AnnaBridge	172:65be27845400	232
AnnaBridge	172:65be27845400	233	/** @defgroup LPTIM_LL_EC_CLK_FILTER Clock Filter
AnnaBridge	172:65be27845400	234	* @{
AnnaBridge	172:65be27845400	235	*/
AnnaBridge	172:65be27845400	236	#define LL_LPTIM_CLK_FILTER_NONE 0x00000000U /!<Any external clock signal level change is considered as a valid transition/
AnnaBridge	172:65be27845400	237	#define LL_LPTIM_CLK_FILTER_2 LPTIM_CFGR_CKFLT_0 /!<External clock signal level change must be stable for at least 2 clock periods before it is considered as valid transition/
AnnaBridge	172:65be27845400	238	#define LL_LPTIM_CLK_FILTER_4 LPTIM_CFGR_CKFLT_1 /!<External clock signal level change must be stable for at least 4 clock periods before it is considered as valid transition/
AnnaBridge	172:65be27845400	239	#define LL_LPTIM_CLK_FILTER_8 LPTIM_CFGR_CKFLT /!<External clock signal level change must be stable for at least 8 clock periods before it is considered as valid transition/
AnnaBridge	172:65be27845400	240	/**
AnnaBridge	172:65be27845400	241	* @}
AnnaBridge	172:65be27845400	242	*/
AnnaBridge	172:65be27845400	243
AnnaBridge	172:65be27845400	244	/** @defgroup LPTIM_LL_EC_CLK_POLARITY Clock Polarity
AnnaBridge	172:65be27845400	245	* @{
AnnaBridge	172:65be27845400	246	*/
AnnaBridge	172:65be27845400	247	#define LL_LPTIM_CLK_POLARITY_RISING 0x00000000U /!< The rising edge is the active edge used for counting/
AnnaBridge	172:65be27845400	248	#define LL_LPTIM_CLK_POLARITY_FALLING LPTIM_CFGR_CKPOL_0 /!< The falling edge is the active edge used for counting/
AnnaBridge	172:65be27845400	249	#define LL_LPTIM_CLK_POLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1 /!< Both edges are active edges/
AnnaBridge	172:65be27845400	250	/**
AnnaBridge	172:65be27845400	251	* @}
AnnaBridge	172:65be27845400	252	*/
AnnaBridge	172:65be27845400	253
AnnaBridge	172:65be27845400	254	/** @defgroup LPTIM_LL_EC_ENCODER_MODE Encoder Mode
AnnaBridge	172:65be27845400	255	* @{
AnnaBridge	172:65be27845400	256	*/
AnnaBridge	172:65be27845400	257	#define LL_LPTIM_ENCODER_MODE_RISING 0x00000000U /!< The rising edge is the active edge used for counting/
AnnaBridge	172:65be27845400	258	#define LL_LPTIM_ENCODER_MODE_FALLING LPTIM_CFGR_CKPOL_0 /!< The falling edge is the active edge used for counting/
AnnaBridge	172:65be27845400	259	#define LL_LPTIM_ENCODER_MODE_RISING_FALLING LPTIM_CFGR_CKPOL_1 /!< Both edges are active edges/
AnnaBridge	172:65be27845400	260	/**
AnnaBridge	172:65be27845400	261	* @}
AnnaBridge	172:65be27845400	262	*/
AnnaBridge	172:65be27845400	263
AnnaBridge	172:65be27845400	264	/** @defgroup LPTIM_EC_INPUT1_SRC Input1 Source
AnnaBridge	172:65be27845400	265	* @{
AnnaBridge	172:65be27845400	266	*/
AnnaBridge	172:65be27845400	267	#define LL_LPTIM_INPUT1_SRC_GPIO 0x00000000U /!< For LPTIM1 and LPTIM2 /
AnnaBridge	172:65be27845400	268	#define LL_LPTIM_INPUT1_SRC_COMP1 LPTIM_CFGR2_IN1SEL_0 /!< For LPTIM1 and LPTIM2 /
AnnaBridge	172:65be27845400	269	#define LL_LPTIM_INPUT1_SRC_COMP2 LPTIM_CFGR2_IN1SEL_1 /!< For LPTIM2 /
AnnaBridge	172:65be27845400	270	#define LL_LPTIM_INPUT1_SRC_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 \| LPTIM_CFGR2_IN1SEL_0) /!< For LPTIM2 /
AnnaBridge	172:65be27845400	271	#define LL_LPTIM_INPUT1_SRC_SAI4_FS_A LPTIM_CFGR2_IN1SEL_0 /!< For LPTIM3 /
AnnaBridge	172:65be27845400	272	#define LL_LPTIM_INPUT1_SRC_SAI4_FS_B LPTIM_CFGR2_IN1SEL_1 /!< For LPTIM3 /
AnnaBridge	172:65be27845400	273	/**
AnnaBridge	172:65be27845400	274	* @}
AnnaBridge	172:65be27845400	275	*/
AnnaBridge	172:65be27845400	276
AnnaBridge	172:65be27845400	277	/** @defgroup LPTIM_EC_INPUT2_SRC Input2 Source
AnnaBridge	172:65be27845400	278	* @{
AnnaBridge	172:65be27845400	279	*/
AnnaBridge	172:65be27845400	280	#define LL_LPTIM_INPUT2_SRC_GPIO 0x00000000U /!< For LPTIM1 /
AnnaBridge	172:65be27845400	281	#define LL_LPTIM_INPUT2_SRC_COMP2 LPTIM_CFGR2_IN2SEL_0 /!< For LPTIM1 /
AnnaBridge	172:65be27845400	282	/**
AnnaBridge	172:65be27845400	283	* @}
AnnaBridge	172:65be27845400	284	*/
AnnaBridge	172:65be27845400	285
AnnaBridge	172:65be27845400	286
AnnaBridge	172:65be27845400	287	/**
AnnaBridge	172:65be27845400	288	* @}
AnnaBridge	172:65be27845400	289	*/
AnnaBridge	172:65be27845400	290
AnnaBridge	172:65be27845400	291	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	292	/** @defgroup LPTIM_LL_Exported_Macros LPTIM Exported Macros
AnnaBridge	172:65be27845400	293	* @{
AnnaBridge	172:65be27845400	294	*/
AnnaBridge	172:65be27845400	295
AnnaBridge	172:65be27845400	296	/** @defgroup LPTIM_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	172:65be27845400	297	* @{
AnnaBridge	172:65be27845400	298	*/
AnnaBridge	172:65be27845400	299
AnnaBridge	172:65be27845400	300	/**
AnnaBridge	172:65be27845400	301	* @brief Write a value in LPTIM register
AnnaBridge	172:65be27845400	302	* @param __INSTANCE__ LPTIM Instance
AnnaBridge	172:65be27845400	303	* @param __REG__ Register to be written
AnnaBridge	172:65be27845400	304	* @param __VALUE__ Value to be written in the register
AnnaBridge	172:65be27845400	305	* @retval None
AnnaBridge	172:65be27845400	306	*/
AnnaBridge	172:65be27845400	307	#define LL_LPTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG((__INSTANCE__)->(__REG__), (__VALUE__))
AnnaBridge	172:65be27845400	308
AnnaBridge	172:65be27845400	309	/**
AnnaBridge	172:65be27845400	310	* @brief Read a value in LPTIM register
AnnaBridge	172:65be27845400	311	* @param __INSTANCE__ LPTIM Instance
AnnaBridge	172:65be27845400	312	* @param __REG__ Register to be read
AnnaBridge	172:65be27845400	313	* @retval Register value
AnnaBridge	172:65be27845400	314	*/
AnnaBridge	172:65be27845400	315	#define LL_LPTIM_ReadReg(__INSTANCE__, __REG__) READ_REG((__INSTANCE__)->(__REG__))
AnnaBridge	172:65be27845400	316	/**
AnnaBridge	172:65be27845400	317	* @}
AnnaBridge	172:65be27845400	318	*/
AnnaBridge	172:65be27845400	319
AnnaBridge	172:65be27845400	320	/**
AnnaBridge	172:65be27845400	321	* @}
AnnaBridge	172:65be27845400	322	*/
AnnaBridge	172:65be27845400	323
AnnaBridge	172:65be27845400	324	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	325	/** @defgroup LPTIM_LL_Exported_Functions LPTIM Exported Functions
AnnaBridge	172:65be27845400	326	* @{
AnnaBridge	172:65be27845400	327	*/
AnnaBridge	172:65be27845400	328
AnnaBridge	172:65be27845400	329	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	172:65be27845400	330	/** @defgroup LPTIM_LL_EF_Init Initialisation and deinitialisation functions
AnnaBridge	172:65be27845400	331	* @{
AnnaBridge	172:65be27845400	332	*/
AnnaBridge	172:65be27845400	333
AnnaBridge	172:65be27845400	334	ErrorStatus LL_LPTIM_DeInit(LPTIM_TypeDef *LPTIMx);
AnnaBridge	172:65be27845400	335	void LL_LPTIM_StructInit(LL_LPTIM_InitTypeDef *LPTIM_InitStruct);
AnnaBridge	172:65be27845400	336	ErrorStatus LL_LPTIM_Init(LPTIM_TypeDef LPTIMx, LL_LPTIM_InitTypeDef LPTIM_InitStruct);
AnnaBridge	172:65be27845400	337	void LL_LPTIM_Disable(LPTIM_TypeDef *LPTIMx);
AnnaBridge	172:65be27845400	338	/**
AnnaBridge	172:65be27845400	339	* @}
AnnaBridge	172:65be27845400	340	*/
AnnaBridge	172:65be27845400	341	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	172:65be27845400	342
AnnaBridge	172:65be27845400	343	/** @defgroup LPTIM_LL_EF_LPTIM_Configuration LPTIM Configuration
AnnaBridge	172:65be27845400	344	* @{
AnnaBridge	172:65be27845400	345	*/
AnnaBridge	172:65be27845400	346
AnnaBridge	172:65be27845400	347	/**
AnnaBridge	172:65be27845400	348	* @brief Enable the LPTIM instance
AnnaBridge	172:65be27845400	349	* @note After setting the ENABLE bit, a delay of two counter clock is needed
AnnaBridge	172:65be27845400	350	* before the LPTIM instance is actually enabled.
AnnaBridge	172:65be27845400	351	* @rmtoll CR ENABLE LL_LPTIM_Enable
AnnaBridge	172:65be27845400	352	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	353	* @retval None
AnnaBridge	172:65be27845400	354	*/
AnnaBridge	172:65be27845400	355	__STATIC_INLINE void LL_LPTIM_Enable(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	356	{
AnnaBridge	172:65be27845400	357	SET_BIT(LPTIMx->CR, LPTIM_CR_ENABLE);
AnnaBridge	172:65be27845400	358	}
AnnaBridge	172:65be27845400	359
AnnaBridge	172:65be27845400	360	/**
AnnaBridge	172:65be27845400	361	* @brief Indicates whether the LPTIM instance is enabled.
AnnaBridge	172:65be27845400	362	* @rmtoll CR ENABLE LL_LPTIM_IsEnabled
AnnaBridge	172:65be27845400	363	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	364	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	365	*/
AnnaBridge	172:65be27845400	366	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabled(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	367	{
AnnaBridge	172:65be27845400	368	return (((READ_BIT(LPTIMx->CR, LPTIM_CR_ENABLE) == LPTIM_CR_ENABLE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	369	}
AnnaBridge	172:65be27845400	370
AnnaBridge	172:65be27845400	371	/**
AnnaBridge	172:65be27845400	372	* @brief Starts the LPTIM counter in the desired mode.
AnnaBridge	172:65be27845400	373	* @note LPTIM instance must be enabled before starting the counter.
AnnaBridge	172:65be27845400	374	* @note It is possible to change on the fly from One Shot mode to
AnnaBridge	172:65be27845400	375	* Continuous mode.
AnnaBridge	172:65be27845400	376	* @rmtoll CR CNTSTRT LL_LPTIM_StartCounter\n
AnnaBridge	172:65be27845400	377	* CR SNGSTRT LL_LPTIM_StartCounter
AnnaBridge	172:65be27845400	378	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	379	* @param OperatingMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	380	* @arg @ref LL_LPTIM_OPERATING_MODE_CONTINUOUS
AnnaBridge	172:65be27845400	381	* @arg @ref LL_LPTIM_OPERATING_MODE_ONESHOT
AnnaBridge	172:65be27845400	382	* @retval None
AnnaBridge	172:65be27845400	383	*/
AnnaBridge	172:65be27845400	384	__STATIC_INLINE void LL_LPTIM_StartCounter(LPTIM_TypeDef *LPTIMx, uint32_t OperatingMode)
AnnaBridge	172:65be27845400	385	{
AnnaBridge	172:65be27845400	386	MODIFY_REG(LPTIMx->CR, LPTIM_CR_CNTSTRT \| LPTIM_CR_SNGSTRT, OperatingMode);
AnnaBridge	172:65be27845400	387	}
AnnaBridge	172:65be27845400	388
AnnaBridge	172:65be27845400	389	/**
AnnaBridge	172:65be27845400	390	* @brief Enable reset after read.
AnnaBridge	172:65be27845400	391	* @note After calling this function any read access to LPTIM_CNT
AnnaBridge	172:65be27845400	392	* register will asynchronously reset the LPTIM_CNT register content.
AnnaBridge	172:65be27845400	393	* @rmtoll CR RSTARE LL_LPTIM_EnableResetAfterRead
AnnaBridge	172:65be27845400	394	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	395	* @retval None
AnnaBridge	172:65be27845400	396	*/
AnnaBridge	172:65be27845400	397	__STATIC_INLINE void LL_LPTIM_EnableResetAfterRead(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	398	{
AnnaBridge	172:65be27845400	399	SET_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
AnnaBridge	172:65be27845400	400	}
AnnaBridge	172:65be27845400	401
AnnaBridge	172:65be27845400	402	/**
AnnaBridge	172:65be27845400	403	* @brief Disable reset after read.
AnnaBridge	172:65be27845400	404	* @rmtoll CR RSTARE LL_LPTIM_DisableResetAfterRead
AnnaBridge	172:65be27845400	405	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	406	* @retval None
AnnaBridge	172:65be27845400	407	*/
AnnaBridge	172:65be27845400	408	__STATIC_INLINE void LL_LPTIM_DisableResetAfterRead(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	409	{
AnnaBridge	172:65be27845400	410	CLEAR_BIT(LPTIMx->CR, LPTIM_CR_RSTARE);
AnnaBridge	172:65be27845400	411	}
AnnaBridge	172:65be27845400	412
AnnaBridge	172:65be27845400	413	/**
AnnaBridge	172:65be27845400	414	* @brief Indicate whether the reset after read feature is enabled.
AnnaBridge	172:65be27845400	415	* @rmtoll CR RSTARE LL_LPTIM_IsEnabledResetAfterRead
AnnaBridge	172:65be27845400	416	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	417	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	418	*/
AnnaBridge	172:65be27845400	419	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledResetAfterRead(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	420	{
AnnaBridge	172:65be27845400	421	return (((READ_BIT(LPTIMx->CR, LPTIM_CR_RSTARE) == LPTIM_CR_RSTARE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	422	}
AnnaBridge	172:65be27845400	423
AnnaBridge	172:65be27845400	424	/**
AnnaBridge	172:65be27845400	425	* @brief Reset of the LPTIM_CNT counter register (synchronous).
AnnaBridge	172:65be27845400	426	* @note Due to the synchronous nature of this reset, it only takes
AnnaBridge	172:65be27845400	427	* place after a synchronization delay of 3 LPTIM core clock cycles
AnnaBridge	172:65be27845400	428	* (LPTIM core clock may be different from APB clock).
AnnaBridge	172:65be27845400	429	* @note COUNTRST is automatically cleared by hardware
AnnaBridge	172:65be27845400	430	* @rmtoll CR COUNTRST LL_LPTIM_ResetCounter\n
AnnaBridge	172:65be27845400	431	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	432	* @retval None
AnnaBridge	172:65be27845400	433	*/
AnnaBridge	172:65be27845400	434	__STATIC_INLINE void LL_LPTIM_ResetCounter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	435	{
AnnaBridge	172:65be27845400	436	SET_BIT(LPTIMx->CR, LPTIM_CR_COUNTRST);
AnnaBridge	172:65be27845400	437	}
AnnaBridge	172:65be27845400	438
AnnaBridge	172:65be27845400	439	/**
AnnaBridge	172:65be27845400	440	* @brief Set the LPTIM registers update mode (enable/disable register preload)
AnnaBridge	172:65be27845400	441	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	442	* @rmtoll CFGR PRELOAD LL_LPTIM_SetUpdateMode
AnnaBridge	172:65be27845400	443	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	444	* @param UpdateMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	445	* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge	172:65be27845400	446	* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge	172:65be27845400	447	* @retval None
AnnaBridge	172:65be27845400	448	*/
AnnaBridge	172:65be27845400	449	__STATIC_INLINE void LL_LPTIM_SetUpdateMode(LPTIM_TypeDef *LPTIMx, uint32_t UpdateMode)
AnnaBridge	172:65be27845400	450	{
AnnaBridge	172:65be27845400	451	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD, UpdateMode);
AnnaBridge	172:65be27845400	452	}
AnnaBridge	172:65be27845400	453
AnnaBridge	172:65be27845400	454	/**
AnnaBridge	172:65be27845400	455	* @brief Get the LPTIM registers update mode
AnnaBridge	172:65be27845400	456	* @rmtoll CFGR PRELOAD LL_LPTIM_GetUpdateMode
AnnaBridge	172:65be27845400	457	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	458	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	459	* @arg @ref LL_LPTIM_UPDATE_MODE_IMMEDIATE
AnnaBridge	172:65be27845400	460	* @arg @ref LL_LPTIM_UPDATE_MODE_ENDOFPERIOD
AnnaBridge	172:65be27845400	461	*/
AnnaBridge	172:65be27845400	462	__STATIC_INLINE uint32_t LL_LPTIM_GetUpdateMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	463	{
AnnaBridge	172:65be27845400	464	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRELOAD));
AnnaBridge	172:65be27845400	465	}
AnnaBridge	172:65be27845400	466
AnnaBridge	172:65be27845400	467	/**
AnnaBridge	172:65be27845400	468	* @brief Set the auto reload value
AnnaBridge	172:65be27845400	469	* @note The LPTIMx_ARR register content must only be modified when the LPTIM is enabled
AnnaBridge	172:65be27845400	470	* @note After a write to the LPTIMx_ARR register a new write operation to the
AnnaBridge	172:65be27845400	471	* same register can only be performed when the previous write operation
AnnaBridge	172:65be27845400	472	* is completed. Any successive write before the ARROK flag be set, will
AnnaBridge	172:65be27845400	473	* lead to unpredictable results.
AnnaBridge	172:65be27845400	474	* @note autoreload value be strictly greater than the compare value.
AnnaBridge	172:65be27845400	475	* @rmtoll ARR ARR LL_LPTIM_SetAutoReload
AnnaBridge	172:65be27845400	476	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	477	* @param AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	478	* @retval None
AnnaBridge	172:65be27845400	479	*/
AnnaBridge	172:65be27845400	480	__STATIC_INLINE void LL_LPTIM_SetAutoReload(LPTIM_TypeDef *LPTIMx, uint32_t AutoReload)
AnnaBridge	172:65be27845400	481	{
AnnaBridge	172:65be27845400	482	MODIFY_REG(LPTIMx->ARR, LPTIM_ARR_ARR, AutoReload);
AnnaBridge	172:65be27845400	483	}
AnnaBridge	172:65be27845400	484
AnnaBridge	172:65be27845400	485	/**
AnnaBridge	172:65be27845400	486	* @brief Get actual auto reload value
AnnaBridge	172:65be27845400	487	* @rmtoll ARR ARR LL_LPTIM_GetAutoReload
AnnaBridge	172:65be27845400	488	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	489	* @retval AutoReload Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	490	*/
AnnaBridge	172:65be27845400	491	__STATIC_INLINE uint32_t LL_LPTIM_GetAutoReload(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	492	{
AnnaBridge	172:65be27845400	493	return (uint32_t)(READ_BIT(LPTIMx->ARR, LPTIM_ARR_ARR));
AnnaBridge	172:65be27845400	494	}
AnnaBridge	172:65be27845400	495
AnnaBridge	172:65be27845400	496	/**
AnnaBridge	172:65be27845400	497	* @brief Set the compare value
AnnaBridge	172:65be27845400	498	* @note After a write to the LPTIMx_CMP register a new write operation to the
AnnaBridge	172:65be27845400	499	* same register can only be performed when the previous write operation
AnnaBridge	172:65be27845400	500	* is completed. Any successive write before the CMPOK flag be set, will
AnnaBridge	172:65be27845400	501	* lead to unpredictable results.
AnnaBridge	172:65be27845400	502	* @rmtoll CMP CMP LL_LPTIM_SetCompare
AnnaBridge	172:65be27845400	503	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	504	* @param CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	505	* @retval None
AnnaBridge	172:65be27845400	506	*/
AnnaBridge	172:65be27845400	507	__STATIC_INLINE void LL_LPTIM_SetCompare(LPTIM_TypeDef *LPTIMx, uint32_t CompareValue)
AnnaBridge	172:65be27845400	508	{
AnnaBridge	172:65be27845400	509	MODIFY_REG(LPTIMx->CMP, LPTIM_CMP_CMP, CompareValue);
AnnaBridge	172:65be27845400	510	}
AnnaBridge	172:65be27845400	511
AnnaBridge	172:65be27845400	512	/**
AnnaBridge	172:65be27845400	513	* @brief Get actual compare value
AnnaBridge	172:65be27845400	514	* @rmtoll CMP CMP LL_LPTIM_GetCompare
AnnaBridge	172:65be27845400	515	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	516	* @retval CompareValue Value between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge	172:65be27845400	517	*/
AnnaBridge	172:65be27845400	518	__STATIC_INLINE uint32_t LL_LPTIM_GetCompare(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	519	{
AnnaBridge	172:65be27845400	520	return (uint32_t)(READ_BIT(LPTIMx->CMP, LPTIM_CMP_CMP));
AnnaBridge	172:65be27845400	521	}
AnnaBridge	172:65be27845400	522
AnnaBridge	172:65be27845400	523	/**
AnnaBridge	172:65be27845400	524	* @brief Get actual counter value
AnnaBridge	172:65be27845400	525	* @note When the LPTIM instance is running with an asynchronous clock, reading
AnnaBridge	172:65be27845400	526	* the LPTIMx_CNT register may return unreliable values. So in this case
AnnaBridge	172:65be27845400	527	* it is necessary to perform two consecutive read accesses and verify
AnnaBridge	172:65be27845400	528	* that the two returned values are identical.
AnnaBridge	172:65be27845400	529	* @rmtoll CNT CNT LL_LPTIM_GetCounter
AnnaBridge	172:65be27845400	530	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	531	* @retval Counter value
AnnaBridge	172:65be27845400	532	*/
AnnaBridge	172:65be27845400	533	__STATIC_INLINE uint32_t LL_LPTIM_GetCounter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	534	{
AnnaBridge	172:65be27845400	535	return (uint32_t)(READ_BIT(LPTIMx->CNT, LPTIM_CNT_CNT));
AnnaBridge	172:65be27845400	536	}
AnnaBridge	172:65be27845400	537
AnnaBridge	172:65be27845400	538	/**
AnnaBridge	172:65be27845400	539	* @brief Set the counter mode (selection of the LPTIM counter clock source).
AnnaBridge	172:65be27845400	540	* @note The counter mode can be set only when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	541	* @rmtoll CFGR COUNTMODE LL_LPTIM_SetCounterMode
AnnaBridge	172:65be27845400	542	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	543	* @param CounterMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	544	* @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge	172:65be27845400	545	* @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge	172:65be27845400	546	* @retval None
AnnaBridge	172:65be27845400	547	*/
AnnaBridge	172:65be27845400	548	__STATIC_INLINE void LL_LPTIM_SetCounterMode(LPTIM_TypeDef *LPTIMx, uint32_t CounterMode)
AnnaBridge	172:65be27845400	549	{
AnnaBridge	172:65be27845400	550	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE, CounterMode);
AnnaBridge	172:65be27845400	551	}
AnnaBridge	172:65be27845400	552
AnnaBridge	172:65be27845400	553	/**
AnnaBridge	172:65be27845400	554	* @brief Get the counter mode
AnnaBridge	172:65be27845400	555	* @rmtoll CFGR COUNTMODE LL_LPTIM_GetCounterMode
AnnaBridge	172:65be27845400	556	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	557	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	558	* @arg @ref LL_LPTIM_COUNTER_MODE_INTERNAL
AnnaBridge	172:65be27845400	559	* @arg @ref LL_LPTIM_COUNTER_MODE_EXTERNAL
AnnaBridge	172:65be27845400	560	*/
AnnaBridge	172:65be27845400	561	__STATIC_INLINE uint32_t LL_LPTIM_GetCounterMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	562	{
AnnaBridge	172:65be27845400	563	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_COUNTMODE));
AnnaBridge	172:65be27845400	564	}
AnnaBridge	172:65be27845400	565
AnnaBridge	172:65be27845400	566	/**
AnnaBridge	172:65be27845400	567	* @brief Configure the LPTIM instance output (LPTIMx_OUT)
AnnaBridge	172:65be27845400	568	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	569	* @note Regarding the LPTIM output polarity the change takes effect
AnnaBridge	172:65be27845400	570	* immediately, so the output default value will change immediately after
AnnaBridge	172:65be27845400	571	* the polarity is re-configured, even before the timer is enabled.
AnnaBridge	172:65be27845400	572	* @rmtoll CFGR WAVE LL_LPTIM_ConfigOutput\n
AnnaBridge	172:65be27845400	573	* CFGR WAVPOL LL_LPTIM_ConfigOutput
AnnaBridge	172:65be27845400	574	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	575	* @param Waveform This parameter can be one of the following values:
AnnaBridge	172:65be27845400	576	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge	172:65be27845400	577	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge	172:65be27845400	578	* @param Polarity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	579	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge	172:65be27845400	580	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge	172:65be27845400	581	* @retval None
AnnaBridge	172:65be27845400	582	*/
AnnaBridge	172:65be27845400	583	__STATIC_INLINE void LL_LPTIM_ConfigOutput(LPTIM_TypeDef *LPTIMx, uint32_t Waveform, uint32_t Polarity)
AnnaBridge	172:65be27845400	584	{
AnnaBridge	172:65be27845400	585	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE \| LPTIM_CFGR_WAVPOL, Waveform \| Polarity);
AnnaBridge	172:65be27845400	586	}
AnnaBridge	172:65be27845400	587
AnnaBridge	172:65be27845400	588	/**
AnnaBridge	172:65be27845400	589	* @brief Set waveform shape
AnnaBridge	172:65be27845400	590	* @rmtoll CFGR WAVE LL_LPTIM_SetWaveform
AnnaBridge	172:65be27845400	591	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	592	* @param Waveform This parameter can be one of the following values:
AnnaBridge	172:65be27845400	593	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge	172:65be27845400	594	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge	172:65be27845400	595	* @retval None
AnnaBridge	172:65be27845400	596	*/
AnnaBridge	172:65be27845400	597	__STATIC_INLINE void LL_LPTIM_SetWaveform(LPTIM_TypeDef *LPTIMx, uint32_t Waveform)
AnnaBridge	172:65be27845400	598	{
AnnaBridge	172:65be27845400	599	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVE, Waveform);
AnnaBridge	172:65be27845400	600	}
AnnaBridge	172:65be27845400	601
AnnaBridge	172:65be27845400	602	/**
AnnaBridge	172:65be27845400	603	* @brief Get actual waveform shape
AnnaBridge	172:65be27845400	604	* @rmtoll CFGR WAVE LL_LPTIM_GetWaveform
AnnaBridge	172:65be27845400	605	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	606	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	607	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_PWM
AnnaBridge	172:65be27845400	608	* @arg @ref LL_LPTIM_OUTPUT_WAVEFORM_SETONCE
AnnaBridge	172:65be27845400	609	*/
AnnaBridge	172:65be27845400	610	__STATIC_INLINE uint32_t LL_LPTIM_GetWaveform(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	611	{
AnnaBridge	172:65be27845400	612	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVE));
AnnaBridge	172:65be27845400	613	}
AnnaBridge	172:65be27845400	614
AnnaBridge	172:65be27845400	615	/**
AnnaBridge	172:65be27845400	616	* @brief Set output polarity
AnnaBridge	172:65be27845400	617	* @rmtoll CFGR WAVPOL LL_LPTIM_SetPolarity
AnnaBridge	172:65be27845400	618	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	619	* @param Polarity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	620	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge	172:65be27845400	621	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge	172:65be27845400	622	* @retval None
AnnaBridge	172:65be27845400	623	*/
AnnaBridge	172:65be27845400	624	__STATIC_INLINE void LL_LPTIM_SetPolarity(LPTIM_TypeDef *LPTIMx, uint32_t Polarity)
AnnaBridge	172:65be27845400	625	{
AnnaBridge	172:65be27845400	626	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL, Polarity);
AnnaBridge	172:65be27845400	627	}
AnnaBridge	172:65be27845400	628
AnnaBridge	172:65be27845400	629	/**
AnnaBridge	172:65be27845400	630	* @brief Get actual output polarity
AnnaBridge	172:65be27845400	631	* @rmtoll CFGR WAVPOL LL_LPTIM_GetPolarity
AnnaBridge	172:65be27845400	632	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	633	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	634	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_REGULAR
AnnaBridge	172:65be27845400	635	* @arg @ref LL_LPTIM_OUTPUT_POLARITY_INVERSE
AnnaBridge	172:65be27845400	636	*/
AnnaBridge	172:65be27845400	637	__STATIC_INLINE uint32_t LL_LPTIM_GetPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	638	{
AnnaBridge	172:65be27845400	639	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_WAVPOL));
AnnaBridge	172:65be27845400	640	}
AnnaBridge	172:65be27845400	641
AnnaBridge	172:65be27845400	642	/**
AnnaBridge	172:65be27845400	643	* @brief Set actual prescaler division ratio.
AnnaBridge	172:65be27845400	644	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	645	* @note When the LPTIM is configured to be clocked by an internal clock source
AnnaBridge	172:65be27845400	646	* and the LPTIM counter is configured to be updated by active edges
AnnaBridge	172:65be27845400	647	* detected on the LPTIM external Input1, the internal clock provided to
AnnaBridge	172:65be27845400	648	* the LPTIM must be not be prescaled.
AnnaBridge	172:65be27845400	649	* @rmtoll CFGR PRESC LL_LPTIM_SetPrescaler
AnnaBridge	172:65be27845400	650	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	651	* @param Prescaler This parameter can be one of the following values:
AnnaBridge	172:65be27845400	652	* @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge	172:65be27845400	653	* @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge	172:65be27845400	654	* @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge	172:65be27845400	655	* @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge	172:65be27845400	656	* @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge	172:65be27845400	657	* @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge	172:65be27845400	658	* @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge	172:65be27845400	659	* @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge	172:65be27845400	660	* @retval None
AnnaBridge	172:65be27845400	661	*/
AnnaBridge	172:65be27845400	662	__STATIC_INLINE void LL_LPTIM_SetPrescaler(LPTIM_TypeDef *LPTIMx, uint32_t Prescaler)
AnnaBridge	172:65be27845400	663	{
AnnaBridge	172:65be27845400	664	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_PRESC, Prescaler);
AnnaBridge	172:65be27845400	665	}
AnnaBridge	172:65be27845400	666
AnnaBridge	172:65be27845400	667	/**
AnnaBridge	172:65be27845400	668	* @brief Get actual prescaler division ratio.
AnnaBridge	172:65be27845400	669	* @rmtoll CFGR PRESC LL_LPTIM_GetPrescaler
AnnaBridge	172:65be27845400	670	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	671	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	672	* @arg @ref LL_LPTIM_PRESCALER_DIV1
AnnaBridge	172:65be27845400	673	* @arg @ref LL_LPTIM_PRESCALER_DIV2
AnnaBridge	172:65be27845400	674	* @arg @ref LL_LPTIM_PRESCALER_DIV4
AnnaBridge	172:65be27845400	675	* @arg @ref LL_LPTIM_PRESCALER_DIV8
AnnaBridge	172:65be27845400	676	* @arg @ref LL_LPTIM_PRESCALER_DIV16
AnnaBridge	172:65be27845400	677	* @arg @ref LL_LPTIM_PRESCALER_DIV32
AnnaBridge	172:65be27845400	678	* @arg @ref LL_LPTIM_PRESCALER_DIV64
AnnaBridge	172:65be27845400	679	* @arg @ref LL_LPTIM_PRESCALER_DIV128
AnnaBridge	172:65be27845400	680	*/
AnnaBridge	172:65be27845400	681	__STATIC_INLINE uint32_t LL_LPTIM_GetPrescaler(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	682	{
AnnaBridge	172:65be27845400	683	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_PRESC));
AnnaBridge	172:65be27845400	684	}
AnnaBridge	172:65be27845400	685
AnnaBridge	172:65be27845400	686	/**
AnnaBridge	172:65be27845400	687	* @brief Set LPTIM input 1 source (default GPIO).
AnnaBridge	172:65be27845400	688	* @rmtoll CFGR2 IN1SEL LL_LPTIM_SetInput1Src
AnnaBridge	172:65be27845400	689	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	690	* @param Src This parameter can be one of the following values:
AnnaBridge	172:65be27845400	691	* @arg @ref LL_LPTIM_INPUT1_SRC_GPIO
AnnaBridge	172:65be27845400	692	* @arg @ref LL_LPTIM_INPUT1_SRC_COMP1
AnnaBridge	172:65be27845400	693	* @arg @ref LL_LPTIM_INPUT1_SRC_COMP2
AnnaBridge	172:65be27845400	694	* @arg @ref LL_LPTIM_INPUT1_SRC_COMP1_COMP2
AnnaBridge	172:65be27845400	695	* @arg @ref LL_LPTIM_INPUT1_SRC_SAI4_FS_A
AnnaBridge	172:65be27845400	696	* @arg @ref LL_LPTIM_INPUT1_SRC_SAI4_FS_B
AnnaBridge	172:65be27845400	697	* @retval None
AnnaBridge	172:65be27845400	698	*/
AnnaBridge	172:65be27845400	699	__STATIC_INLINE void LL_LPTIM_SetInput1Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
AnnaBridge	172:65be27845400	700	{
AnnaBridge	172:65be27845400	701	WRITE_REG(LPTIMx->CFGR2, Src);
AnnaBridge	172:65be27845400	702	}
AnnaBridge	172:65be27845400	703
AnnaBridge	172:65be27845400	704	/**
AnnaBridge	172:65be27845400	705	* @brief Set LPTIM input 2 source (default GPIO).
AnnaBridge	172:65be27845400	706	* @rmtoll CFGR2 IN2SEL LL_LPTIM_SetInput2Src
AnnaBridge	172:65be27845400	707	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	708	* @param Src This parameter can be one of the following values:
AnnaBridge	172:65be27845400	709	* @arg @ref LL_LPTIM_INPUT2_SRC_GPIO
AnnaBridge	172:65be27845400	710	* @arg @ref LL_LPTIM_INPUT2_SRC_COMP2
AnnaBridge	172:65be27845400	711	* @retval None
AnnaBridge	172:65be27845400	712	*/
AnnaBridge	172:65be27845400	713	__STATIC_INLINE void LL_LPTIM_SetInput2Src(LPTIM_TypeDef *LPTIMx, uint32_t Src)
AnnaBridge	172:65be27845400	714	{
AnnaBridge	172:65be27845400	715	WRITE_REG(LPTIMx->CFGR2, Src);
AnnaBridge	172:65be27845400	716	}
AnnaBridge	172:65be27845400	717
AnnaBridge	172:65be27845400	718	/**
AnnaBridge	172:65be27845400	719	* @}
AnnaBridge	172:65be27845400	720	*/
AnnaBridge	172:65be27845400	721
AnnaBridge	172:65be27845400	722	/** @defgroup LPTIM_LL_EF_Trigger_Configuration Trigger Configuration
AnnaBridge	172:65be27845400	723	* @{
AnnaBridge	172:65be27845400	724	*/
AnnaBridge	172:65be27845400	725
AnnaBridge	172:65be27845400	726	/**
AnnaBridge	172:65be27845400	727	* @brief Enable the timeout function
AnnaBridge	172:65be27845400	728	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	729	* @note The first trigger event will start the timer, any successive trigger
AnnaBridge	172:65be27845400	730	* event will reset the counter and the timer will restart.
AnnaBridge	172:65be27845400	731	* @note The timeout value corresponds to the compare value; if no trigger
AnnaBridge	172:65be27845400	732	* occurs within the expected time frame, the MCU is waked-up by the
AnnaBridge	172:65be27845400	733	* compare match event.
AnnaBridge	172:65be27845400	734	* @rmtoll CFGR TIMOUT LL_LPTIM_EnableTimeout
AnnaBridge	172:65be27845400	735	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	736	* @retval None
AnnaBridge	172:65be27845400	737	*/
AnnaBridge	172:65be27845400	738	__STATIC_INLINE void LL_LPTIM_EnableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	739	{
AnnaBridge	172:65be27845400	740	SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge	172:65be27845400	741	}
AnnaBridge	172:65be27845400	742
AnnaBridge	172:65be27845400	743	/**
AnnaBridge	172:65be27845400	744	* @brief Disable the timeout function
AnnaBridge	172:65be27845400	745	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	746	* @note A trigger event arriving when the timer is already started will be
AnnaBridge	172:65be27845400	747	* ignored.
AnnaBridge	172:65be27845400	748	* @rmtoll CFGR TIMOUT LL_LPTIM_DisableTimeout
AnnaBridge	172:65be27845400	749	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	750	* @retval None
AnnaBridge	172:65be27845400	751	*/
AnnaBridge	172:65be27845400	752	__STATIC_INLINE void LL_LPTIM_DisableTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	753	{
AnnaBridge	172:65be27845400	754	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT);
AnnaBridge	172:65be27845400	755	}
AnnaBridge	172:65be27845400	756
AnnaBridge	172:65be27845400	757	/**
AnnaBridge	172:65be27845400	758	* @brief Indicate whether the timeout function is enabled.
AnnaBridge	172:65be27845400	759	* @rmtoll CFGR TIMOUT LL_LPTIM_IsEnabledTimeout
AnnaBridge	172:65be27845400	760	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	761	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	762	*/
AnnaBridge	172:65be27845400	763	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledTimeout(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	764	{
AnnaBridge	172:65be27845400	765	return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TIMOUT) == LPTIM_CFGR_TIMOUT)? 1UL : 0UL));
AnnaBridge	172:65be27845400	766	}
AnnaBridge	172:65be27845400	767
AnnaBridge	172:65be27845400	768	/**
AnnaBridge	172:65be27845400	769	* @brief Start the LPTIM counter
AnnaBridge	172:65be27845400	770	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	771	* @rmtoll CFGR TRIGEN LL_LPTIM_TrigSw
AnnaBridge	172:65be27845400	772	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	773	* @retval None
AnnaBridge	172:65be27845400	774	*/
AnnaBridge	172:65be27845400	775	__STATIC_INLINE void LL_LPTIM_TrigSw(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	776	{
AnnaBridge	172:65be27845400	777	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN);
AnnaBridge	172:65be27845400	778	}
AnnaBridge	172:65be27845400	779
AnnaBridge	172:65be27845400	780	/**
AnnaBridge	172:65be27845400	781	* @brief Configure the external trigger used as a trigger event for the LPTIM.
AnnaBridge	172:65be27845400	782	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	783	* @note An internal clock source must be present when a digital filter is
AnnaBridge	172:65be27845400	784	* required for the trigger.
AnnaBridge	172:65be27845400	785	* @rmtoll CFGR TRIGSEL LL_LPTIM_ConfigTrigger\n
AnnaBridge	172:65be27845400	786	* CFGR TRGFLT LL_LPTIM_ConfigTrigger\n
AnnaBridge	172:65be27845400	787	* CFGR TRIGEN LL_LPTIM_ConfigTrigger
AnnaBridge	172:65be27845400	788	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	789	* @param Source This parameter can be one of the following values:
AnnaBridge	172:65be27845400	790	* @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge	172:65be27845400	791	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge	172:65be27845400	792	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge	172:65be27845400	793	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge	172:65be27845400	794	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
AnnaBridge	172:65be27845400	795	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
AnnaBridge	172:65be27845400	796	* @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
AnnaBridge	172:65be27845400	797	* @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
AnnaBridge	172:65be27845400	798	* @param Filter This parameter can be one of the following values:
AnnaBridge	172:65be27845400	799	* @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge	172:65be27845400	800	* @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge	172:65be27845400	801	* @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge	172:65be27845400	802	* @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge	172:65be27845400	803	* @param Polarity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	804	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge	172:65be27845400	805	* @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge	172:65be27845400	806	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge	172:65be27845400	807	* @retval None
AnnaBridge	172:65be27845400	808	*/
AnnaBridge	172:65be27845400	809	__STATIC_INLINE void LL_LPTIM_ConfigTrigger(LPTIM_TypeDef *LPTIMx, uint32_t Source, uint32_t Filter, uint32_t Polarity)
AnnaBridge	172:65be27845400	810	{
AnnaBridge	172:65be27845400	811	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL \| LPTIM_CFGR_TRGFLT \| LPTIM_CFGR_TRIGEN, Source \| Filter \| Polarity);
AnnaBridge	172:65be27845400	812	}
AnnaBridge	172:65be27845400	813
AnnaBridge	172:65be27845400	814	/**
AnnaBridge	172:65be27845400	815	* @brief Get actual external trigger source.
AnnaBridge	172:65be27845400	816	* @rmtoll CFGR TRIGSEL LL_LPTIM_GetTriggerSource
AnnaBridge	172:65be27845400	817	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	818	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	819	* @arg @ref LL_LPTIM_TRIG_SOURCE_GPIO
AnnaBridge	172:65be27845400	820	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMA
AnnaBridge	172:65be27845400	821	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCALARMB
AnnaBridge	172:65be27845400	822	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP1
AnnaBridge	172:65be27845400	823	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP2
AnnaBridge	172:65be27845400	824	* @arg @ref LL_LPTIM_TRIG_SOURCE_RTCTAMP3
AnnaBridge	172:65be27845400	825	* @arg @ref LL_LPTIM_TRIG_SOURCE_COMP1
AnnaBridge	172:65be27845400	826	* @arg @ref LL_LPTIM_TRIG_SOURCE_COMP2
AnnaBridge	172:65be27845400	827	*/
AnnaBridge	172:65be27845400	828	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	829	{
AnnaBridge	172:65be27845400	830	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGSEL));
AnnaBridge	172:65be27845400	831	}
AnnaBridge	172:65be27845400	832
AnnaBridge	172:65be27845400	833	/**
AnnaBridge	172:65be27845400	834	* @brief Get actual external trigger filter.
AnnaBridge	172:65be27845400	835	* @rmtoll CFGR TRGFLT LL_LPTIM_GetTriggerFilter
AnnaBridge	172:65be27845400	836	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	837	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	838	* @arg @ref LL_LPTIM_TRIG_FILTER_NONE
AnnaBridge	172:65be27845400	839	* @arg @ref LL_LPTIM_TRIG_FILTER_2
AnnaBridge	172:65be27845400	840	* @arg @ref LL_LPTIM_TRIG_FILTER_4
AnnaBridge	172:65be27845400	841	* @arg @ref LL_LPTIM_TRIG_FILTER_8
AnnaBridge	172:65be27845400	842	*/
AnnaBridge	172:65be27845400	843	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	844	{
AnnaBridge	172:65be27845400	845	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRGFLT));
AnnaBridge	172:65be27845400	846	}
AnnaBridge	172:65be27845400	847
AnnaBridge	172:65be27845400	848	/**
AnnaBridge	172:65be27845400	849	* @brief Get actual external trigger polarity.
AnnaBridge	172:65be27845400	850	* @rmtoll CFGR TRIGEN LL_LPTIM_GetTriggerPolarity
AnnaBridge	172:65be27845400	851	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	852	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	853	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING
AnnaBridge	172:65be27845400	854	* @arg @ref LL_LPTIM_TRIG_POLARITY_FALLING
AnnaBridge	172:65be27845400	855	* @arg @ref LL_LPTIM_TRIG_POLARITY_RISING_FALLING
AnnaBridge	172:65be27845400	856	*/
AnnaBridge	172:65be27845400	857	__STATIC_INLINE uint32_t LL_LPTIM_GetTriggerPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	858	{
AnnaBridge	172:65be27845400	859	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_TRIGEN));
AnnaBridge	172:65be27845400	860	}
AnnaBridge	172:65be27845400	861
AnnaBridge	172:65be27845400	862	/**
AnnaBridge	172:65be27845400	863	* @}
AnnaBridge	172:65be27845400	864	*/
AnnaBridge	172:65be27845400	865
AnnaBridge	172:65be27845400	866	/** @defgroup LPTIM_LL_EF_Clock_Configuration Clock Configuration
AnnaBridge	172:65be27845400	867	* @{
AnnaBridge	172:65be27845400	868	*/
AnnaBridge	172:65be27845400	869
AnnaBridge	172:65be27845400	870	/**
AnnaBridge	172:65be27845400	871	* @brief Set the source of the clock used by the LPTIM instance.
AnnaBridge	172:65be27845400	872	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	873	* @rmtoll CFGR CKSEL LL_LPTIM_SetClockSource
AnnaBridge	172:65be27845400	874	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	875	* @param ClockSource This parameter can be one of the following values:
AnnaBridge	172:65be27845400	876	* @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge	172:65be27845400	877	* @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge	172:65be27845400	878	* @retval None
AnnaBridge	172:65be27845400	879	*/
AnnaBridge	172:65be27845400	880	__STATIC_INLINE void LL_LPTIM_SetClockSource(LPTIM_TypeDef *LPTIMx, uint32_t ClockSource)
AnnaBridge	172:65be27845400	881	{
AnnaBridge	172:65be27845400	882	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKSEL, ClockSource);
AnnaBridge	172:65be27845400	883	}
AnnaBridge	172:65be27845400	884
AnnaBridge	172:65be27845400	885	/**
AnnaBridge	172:65be27845400	886	* @brief Get actual LPTIM instance clock source.
AnnaBridge	172:65be27845400	887	* @rmtoll CFGR CKSEL LL_LPTIM_GetClockSource
AnnaBridge	172:65be27845400	888	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	889	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	890	* @arg @ref LL_LPTIM_CLK_SOURCE_INTERNAL
AnnaBridge	172:65be27845400	891	* @arg @ref LL_LPTIM_CLK_SOURCE_EXTERNAL
AnnaBridge	172:65be27845400	892	*/
AnnaBridge	172:65be27845400	893	__STATIC_INLINE uint32_t LL_LPTIM_GetClockSource(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	894	{
AnnaBridge	172:65be27845400	895	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKSEL));
AnnaBridge	172:65be27845400	896	}
AnnaBridge	172:65be27845400	897
AnnaBridge	172:65be27845400	898	/**
AnnaBridge	172:65be27845400	899	* @brief Configure the active edge or edges used by the counter when the LPTIM is clocked by an external clock source.
AnnaBridge	172:65be27845400	900	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	901	* @note When both external clock signal edges are considered active ones,
AnnaBridge	172:65be27845400	902	* the LPTIM must also be clocked by an internal clock source with a
AnnaBridge	172:65be27845400	903	* frequency equal to at least four times the external clock frequency.
AnnaBridge	172:65be27845400	904	* @note An internal clock source must be present when a digital filter is
AnnaBridge	172:65be27845400	905	* required for external clock.
AnnaBridge	172:65be27845400	906	* @rmtoll CFGR CKFLT LL_LPTIM_ConfigClock\n
AnnaBridge	172:65be27845400	907	* CFGR CKPOL LL_LPTIM_ConfigClock
AnnaBridge	172:65be27845400	908	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	909	* @param ClockFilter This parameter can be one of the following values:
AnnaBridge	172:65be27845400	910	* @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge	172:65be27845400	911	* @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge	172:65be27845400	912	* @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge	172:65be27845400	913	* @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge	172:65be27845400	914	* @param ClockPolarity This parameter can be one of the following values:
AnnaBridge	172:65be27845400	915	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge	172:65be27845400	916	* @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge	172:65be27845400	917	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge	172:65be27845400	918	* @retval None
AnnaBridge	172:65be27845400	919	*/
AnnaBridge	172:65be27845400	920	__STATIC_INLINE void LL_LPTIM_ConfigClock(LPTIM_TypeDef *LPTIMx, uint32_t ClockFilter, uint32_t ClockPolarity)
AnnaBridge	172:65be27845400	921	{
AnnaBridge	172:65be27845400	922	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKFLT \| LPTIM_CFGR_CKPOL, ClockFilter \| ClockPolarity);
AnnaBridge	172:65be27845400	923	}
AnnaBridge	172:65be27845400	924
AnnaBridge	172:65be27845400	925	/**
AnnaBridge	172:65be27845400	926	* @brief Get actual clock polarity
AnnaBridge	172:65be27845400	927	* @rmtoll CFGR CKPOL LL_LPTIM_GetClockPolarity
AnnaBridge	172:65be27845400	928	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	929	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	930	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING
AnnaBridge	172:65be27845400	931	* @arg @ref LL_LPTIM_CLK_POLARITY_FALLING
AnnaBridge	172:65be27845400	932	* @arg @ref LL_LPTIM_CLK_POLARITY_RISING_FALLING
AnnaBridge	172:65be27845400	933	*/
AnnaBridge	172:65be27845400	934	__STATIC_INLINE uint32_t LL_LPTIM_GetClockPolarity(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	935	{
AnnaBridge	172:65be27845400	936	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge	172:65be27845400	937	}
AnnaBridge	172:65be27845400	938
AnnaBridge	172:65be27845400	939	/**
AnnaBridge	172:65be27845400	940	* @brief Get actual clock digital filter
AnnaBridge	172:65be27845400	941	* @rmtoll CFGR CKFLT LL_LPTIM_GetClockFilter
AnnaBridge	172:65be27845400	942	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	943	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	944	* @arg @ref LL_LPTIM_CLK_FILTER_NONE
AnnaBridge	172:65be27845400	945	* @arg @ref LL_LPTIM_CLK_FILTER_2
AnnaBridge	172:65be27845400	946	* @arg @ref LL_LPTIM_CLK_FILTER_4
AnnaBridge	172:65be27845400	947	* @arg @ref LL_LPTIM_CLK_FILTER_8
AnnaBridge	172:65be27845400	948	*/
AnnaBridge	172:65be27845400	949	__STATIC_INLINE uint32_t LL_LPTIM_GetClockFilter(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	950	{
AnnaBridge	172:65be27845400	951	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKFLT));
AnnaBridge	172:65be27845400	952	}
AnnaBridge	172:65be27845400	953
AnnaBridge	172:65be27845400	954	/**
AnnaBridge	172:65be27845400	955	* @}
AnnaBridge	172:65be27845400	956	*/
AnnaBridge	172:65be27845400	957
AnnaBridge	172:65be27845400	958	/** @defgroup LPTIM_LL_EF_Encoder_Mode Encoder Mode
AnnaBridge	172:65be27845400	959	* @{
AnnaBridge	172:65be27845400	960	*/
AnnaBridge	172:65be27845400	961
AnnaBridge	172:65be27845400	962	/**
AnnaBridge	172:65be27845400	963	* @brief Configure the encoder mode.
AnnaBridge	172:65be27845400	964	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	965	* @rmtoll CFGR CKPOL LL_LPTIM_SetEncoderMode
AnnaBridge	172:65be27845400	966	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	967	* @param EncoderMode This parameter can be one of the following values:
AnnaBridge	172:65be27845400	968	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge	172:65be27845400	969	* @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge	172:65be27845400	970	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge	172:65be27845400	971	* @retval None
AnnaBridge	172:65be27845400	972	*/
AnnaBridge	172:65be27845400	973	__STATIC_INLINE void LL_LPTIM_SetEncoderMode(LPTIM_TypeDef *LPTIMx, uint32_t EncoderMode)
AnnaBridge	172:65be27845400	974	{
AnnaBridge	172:65be27845400	975	MODIFY_REG(LPTIMx->CFGR, LPTIM_CFGR_CKPOL, EncoderMode);
AnnaBridge	172:65be27845400	976	}
AnnaBridge	172:65be27845400	977
AnnaBridge	172:65be27845400	978	/**
AnnaBridge	172:65be27845400	979	* @brief Get actual encoder mode.
AnnaBridge	172:65be27845400	980	* @rmtoll CFGR CKPOL LL_LPTIM_GetEncoderMode
AnnaBridge	172:65be27845400	981	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	982	* @retval Returned value can be one of the following values:
AnnaBridge	172:65be27845400	983	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING
AnnaBridge	172:65be27845400	984	* @arg @ref LL_LPTIM_ENCODER_MODE_FALLING
AnnaBridge	172:65be27845400	985	* @arg @ref LL_LPTIM_ENCODER_MODE_RISING_FALLING
AnnaBridge	172:65be27845400	986	*/
AnnaBridge	172:65be27845400	987	__STATIC_INLINE uint32_t LL_LPTIM_GetEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	988	{
AnnaBridge	172:65be27845400	989	return (uint32_t)(READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_CKPOL));
AnnaBridge	172:65be27845400	990	}
AnnaBridge	172:65be27845400	991
AnnaBridge	172:65be27845400	992	/**
AnnaBridge	172:65be27845400	993	* @brief Enable the encoder mode
AnnaBridge	172:65be27845400	994	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	995	* @note In this mode the LPTIM instance must be clocked by an internal clock
AnnaBridge	172:65be27845400	996	* source. Also, the prescaler division ratio must be equal to 1.
AnnaBridge	172:65be27845400	997	* @note LPTIM instance must be configured in continuous mode prior enabling
AnnaBridge	172:65be27845400	998	* the encoder mode.
AnnaBridge	172:65be27845400	999	* @rmtoll CFGR ENC LL_LPTIM_EnableEncoderMode
AnnaBridge	172:65be27845400	1000	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1001	* @retval None
AnnaBridge	172:65be27845400	1002	*/
AnnaBridge	172:65be27845400	1003	__STATIC_INLINE void LL_LPTIM_EnableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1004	{
AnnaBridge	172:65be27845400	1005	SET_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge	172:65be27845400	1006	}
AnnaBridge	172:65be27845400	1007
AnnaBridge	172:65be27845400	1008	/**
AnnaBridge	172:65be27845400	1009	* @brief Disable the encoder mode
AnnaBridge	172:65be27845400	1010	* @note This function must be called when the LPTIM instance is disabled.
AnnaBridge	172:65be27845400	1011	* @rmtoll CFGR ENC LL_LPTIM_DisableEncoderMode
AnnaBridge	172:65be27845400	1012	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1013	* @retval None
AnnaBridge	172:65be27845400	1014	*/
AnnaBridge	172:65be27845400	1015	__STATIC_INLINE void LL_LPTIM_DisableEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1016	{
AnnaBridge	172:65be27845400	1017	CLEAR_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC);
AnnaBridge	172:65be27845400	1018	}
AnnaBridge	172:65be27845400	1019
AnnaBridge	172:65be27845400	1020	/**
AnnaBridge	172:65be27845400	1021	* @brief Indicates whether the LPTIM operates in encoder mode.
AnnaBridge	172:65be27845400	1022	* @rmtoll CFGR ENC LL_LPTIM_IsEnabledEncoderMode
AnnaBridge	172:65be27845400	1023	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1024	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1025	*/
AnnaBridge	172:65be27845400	1026	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledEncoderMode(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1027	{
AnnaBridge	172:65be27845400	1028	return (((READ_BIT(LPTIMx->CFGR, LPTIM_CFGR_ENC) == LPTIM_CFGR_ENC)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1029	}
AnnaBridge	172:65be27845400	1030
AnnaBridge	172:65be27845400	1031	/**
AnnaBridge	172:65be27845400	1032	* @}
AnnaBridge	172:65be27845400	1033	*/
AnnaBridge	172:65be27845400	1034
AnnaBridge	172:65be27845400	1035	/** @defgroup LPTIM_LL_EF_FLAG_Management FLAG Management
AnnaBridge	172:65be27845400	1036	* @{
AnnaBridge	172:65be27845400	1037	*/
AnnaBridge	172:65be27845400	1038
AnnaBridge	172:65be27845400	1039	/**
AnnaBridge	172:65be27845400	1040	* @brief Clear the compare match flag (CMPMCF)
AnnaBridge	172:65be27845400	1041	* @rmtoll ICR CMPMCF LL_LPTIM_ClearFLAG_CMPM
AnnaBridge	172:65be27845400	1042	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1043	* @retval None
AnnaBridge	172:65be27845400	1044	*/
AnnaBridge	172:65be27845400	1045	__STATIC_INLINE void LL_LPTIM_ClearFLAG_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1046	{
AnnaBridge	172:65be27845400	1047	SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPMCF);
AnnaBridge	172:65be27845400	1048	}
AnnaBridge	172:65be27845400	1049
AnnaBridge	172:65be27845400	1050	/**
AnnaBridge	172:65be27845400	1051	* @brief Inform application whether a compare match interrupt has occurred.
AnnaBridge	172:65be27845400	1052	* @rmtoll ISR CMPM LL_LPTIM_IsActiveFlag_CMPM
AnnaBridge	172:65be27845400	1053	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1054	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1055	*/
AnnaBridge	172:65be27845400	1056	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1057	{
AnnaBridge	172:65be27845400	1058	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPM) == LPTIM_ISR_CMPM)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1059	}
AnnaBridge	172:65be27845400	1060
AnnaBridge	172:65be27845400	1061	/**
AnnaBridge	172:65be27845400	1062	* @brief Clear the autoreload match flag (ARRMCF)
AnnaBridge	172:65be27845400	1063	* @rmtoll ICR ARRMCF LL_LPTIM_ClearFLAG_ARRM
AnnaBridge	172:65be27845400	1064	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1065	* @retval None
AnnaBridge	172:65be27845400	1066	*/
AnnaBridge	172:65be27845400	1067	__STATIC_INLINE void LL_LPTIM_ClearFLAG_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1068	{
AnnaBridge	172:65be27845400	1069	SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARRMCF);
AnnaBridge	172:65be27845400	1070	}
AnnaBridge	172:65be27845400	1071
AnnaBridge	172:65be27845400	1072	/**
AnnaBridge	172:65be27845400	1073	* @brief Inform application whether a autoreload match interrupt has occured.
AnnaBridge	172:65be27845400	1074	* @rmtoll ISR ARRM LL_LPTIM_IsActiveFlag_ARRM
AnnaBridge	172:65be27845400	1075	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1076	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1077	*/
AnnaBridge	172:65be27845400	1078	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1079	{
AnnaBridge	172:65be27845400	1080	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARRM) == LPTIM_ISR_ARRM)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1081	}
AnnaBridge	172:65be27845400	1082
AnnaBridge	172:65be27845400	1083	/**
AnnaBridge	172:65be27845400	1084	* @brief Clear the external trigger valid edge flag(EXTTRIGCF).
AnnaBridge	172:65be27845400	1085	* @rmtoll ICR EXTTRIGCF LL_LPTIM_ClearFlag_EXTTRIG
AnnaBridge	172:65be27845400	1086	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1087	* @retval None
AnnaBridge	172:65be27845400	1088	*/
AnnaBridge	172:65be27845400	1089	__STATIC_INLINE void LL_LPTIM_ClearFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1090	{
AnnaBridge	172:65be27845400	1091	SET_BIT(LPTIMx->ICR, LPTIM_ICR_EXTTRIGCF);
AnnaBridge	172:65be27845400	1092	}
AnnaBridge	172:65be27845400	1093
AnnaBridge	172:65be27845400	1094	/**
AnnaBridge	172:65be27845400	1095	* @brief Inform application whether a valid edge on the selected external trigger input has occurred.
AnnaBridge	172:65be27845400	1096	* @rmtoll ISR EXTTRIG LL_LPTIM_IsActiveFlag_EXTTRIG
AnnaBridge	172:65be27845400	1097	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1098	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1099	*/
AnnaBridge	172:65be27845400	1100	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1101	{
AnnaBridge	172:65be27845400	1102	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_EXTTRIG) == LPTIM_ISR_EXTTRIG)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1103	}
AnnaBridge	172:65be27845400	1104
AnnaBridge	172:65be27845400	1105	/**
AnnaBridge	172:65be27845400	1106	* @brief Clear the compare register update interrupt flag (CMPOKCF).
AnnaBridge	172:65be27845400	1107	* @rmtoll ICR CMPOKCF LL_LPTIM_ClearFlag_CMPOK
AnnaBridge	172:65be27845400	1108	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1109	* @retval None
AnnaBridge	172:65be27845400	1110	*/
AnnaBridge	172:65be27845400	1111	__STATIC_INLINE void LL_LPTIM_ClearFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1112	{
AnnaBridge	172:65be27845400	1113	SET_BIT(LPTIMx->ICR, LPTIM_ICR_CMPOKCF);
AnnaBridge	172:65be27845400	1114	}
AnnaBridge	172:65be27845400	1115
AnnaBridge	172:65be27845400	1116	/**
AnnaBridge	172:65be27845400	1117	* @brief Informs application whether the APB bus write operation to the LPTIMx_CMP register has been successfully completed. If so, a new one can be initiated.
AnnaBridge	172:65be27845400	1118	* @rmtoll ISR CMPOK LL_LPTIM_IsActiveFlag_CMPOK
AnnaBridge	172:65be27845400	1119	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1120	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1121	*/
AnnaBridge	172:65be27845400	1122	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1123	{
AnnaBridge	172:65be27845400	1124	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_CMPOK) == LPTIM_ISR_CMPOK)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1125	}
AnnaBridge	172:65be27845400	1126
AnnaBridge	172:65be27845400	1127	/**
AnnaBridge	172:65be27845400	1128	* @brief Clear the autoreload register update interrupt flag (ARROKCF).
AnnaBridge	172:65be27845400	1129	* @rmtoll ICR ARROKCF LL_LPTIM_ClearFlag_ARROK
AnnaBridge	172:65be27845400	1130	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1131	* @retval None
AnnaBridge	172:65be27845400	1132	*/
AnnaBridge	172:65be27845400	1133	__STATIC_INLINE void LL_LPTIM_ClearFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1134	{
AnnaBridge	172:65be27845400	1135	SET_BIT(LPTIMx->ICR, LPTIM_ICR_ARROKCF);
AnnaBridge	172:65be27845400	1136	}
AnnaBridge	172:65be27845400	1137
AnnaBridge	172:65be27845400	1138	/**
AnnaBridge	172:65be27845400	1139	* @brief Informs application whether the APB bus write operation to the LPTIMx_ARR register has been successfully completed. If so, a new one can be initiated.
AnnaBridge	172:65be27845400	1140	* @rmtoll ISR ARROK LL_LPTIM_IsActiveFlag_ARROK
AnnaBridge	172:65be27845400	1141	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1142	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1143	*/
AnnaBridge	172:65be27845400	1144	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1145	{
AnnaBridge	172:65be27845400	1146	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_ARROK) == LPTIM_ISR_ARROK)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1147	}
AnnaBridge	172:65be27845400	1148
AnnaBridge	172:65be27845400	1149	/**
AnnaBridge	172:65be27845400	1150	* @brief Clear the counter direction change to up interrupt flag (UPCF).
AnnaBridge	172:65be27845400	1151	* @rmtoll ICR UPCF LL_LPTIM_ClearFlag_UP
AnnaBridge	172:65be27845400	1152	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1153	* @retval None
AnnaBridge	172:65be27845400	1154	*/
AnnaBridge	172:65be27845400	1155	__STATIC_INLINE void LL_LPTIM_ClearFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1156	{
AnnaBridge	172:65be27845400	1157	SET_BIT(LPTIMx->ICR, LPTIM_ICR_UPCF);
AnnaBridge	172:65be27845400	1158	}
AnnaBridge	172:65be27845400	1159
AnnaBridge	172:65be27845400	1160	/**
AnnaBridge	172:65be27845400	1161	* @brief Informs the application whether the counter direction has changed from down to up (when the LPTIM instance operates in encoder mode).
AnnaBridge	172:65be27845400	1162	* @rmtoll ISR UP LL_LPTIM_IsActiveFlag_UP
AnnaBridge	172:65be27845400	1163	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1164	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1165	*/
AnnaBridge	172:65be27845400	1166	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1167	{
AnnaBridge	172:65be27845400	1168	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_UP) == LPTIM_ISR_UP)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1169	}
AnnaBridge	172:65be27845400	1170
AnnaBridge	172:65be27845400	1171	/**
AnnaBridge	172:65be27845400	1172	* @brief Clear the counter direction change to down interrupt flag (DOWNCF).
AnnaBridge	172:65be27845400	1173	* @rmtoll ICR DOWNCF LL_LPTIM_ClearFlag_DOWN
AnnaBridge	172:65be27845400	1174	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1175	* @retval None
AnnaBridge	172:65be27845400	1176	*/
AnnaBridge	172:65be27845400	1177	__STATIC_INLINE void LL_LPTIM_ClearFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1178	{
AnnaBridge	172:65be27845400	1179	SET_BIT(LPTIMx->ICR, LPTIM_ICR_DOWNCF);
AnnaBridge	172:65be27845400	1180	}
AnnaBridge	172:65be27845400	1181
AnnaBridge	172:65be27845400	1182	/**
AnnaBridge	172:65be27845400	1183	* @brief Informs the application whether the counter direction has changed from up to down (when the LPTIM instance operates in encoder mode).
AnnaBridge	172:65be27845400	1184	* @rmtoll ISR DOWN LL_LPTIM_IsActiveFlag_DOWN
AnnaBridge	172:65be27845400	1185	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1186	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1187	*/
AnnaBridge	172:65be27845400	1188	__STATIC_INLINE uint32_t LL_LPTIM_IsActiveFlag_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1189	{
AnnaBridge	172:65be27845400	1190	return (((READ_BIT(LPTIMx->ISR, LPTIM_ISR_DOWN) == LPTIM_ISR_DOWN)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1191	}
AnnaBridge	172:65be27845400	1192
AnnaBridge	172:65be27845400	1193	/**
AnnaBridge	172:65be27845400	1194	* @}
AnnaBridge	172:65be27845400	1195	*/
AnnaBridge	172:65be27845400	1196
AnnaBridge	172:65be27845400	1197	/** @defgroup LPTIM_LL_EF_IT_Management Interrupt Management
AnnaBridge	172:65be27845400	1198	* @{
AnnaBridge	172:65be27845400	1199	*/
AnnaBridge	172:65be27845400	1200
AnnaBridge	172:65be27845400	1201	/**
AnnaBridge	172:65be27845400	1202	* @brief Enable compare match interrupt (CMPMIE).
AnnaBridge	172:65be27845400	1203	* @rmtoll IER CMPMIE LL_LPTIM_EnableIT_CMPM
AnnaBridge	172:65be27845400	1204	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1205	* @retval None
AnnaBridge	172:65be27845400	1206	*/
AnnaBridge	172:65be27845400	1207	__STATIC_INLINE void LL_LPTIM_EnableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1208	{
AnnaBridge	172:65be27845400	1209	SET_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge	172:65be27845400	1210	}
AnnaBridge	172:65be27845400	1211
AnnaBridge	172:65be27845400	1212	/**
AnnaBridge	172:65be27845400	1213	* @brief Disable compare match interrupt (CMPMIE).
AnnaBridge	172:65be27845400	1214	* @rmtoll IER CMPMIE LL_LPTIM_DisableIT_CMPM
AnnaBridge	172:65be27845400	1215	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1216	* @retval None
AnnaBridge	172:65be27845400	1217	*/
AnnaBridge	172:65be27845400	1218	__STATIC_INLINE void LL_LPTIM_DisableIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1219	{
AnnaBridge	172:65be27845400	1220	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE);
AnnaBridge	172:65be27845400	1221	}
AnnaBridge	172:65be27845400	1222
AnnaBridge	172:65be27845400	1223	/**
AnnaBridge	172:65be27845400	1224	* @brief Indicates whether the compare match interrupt (CMPMIE) is enabled.
AnnaBridge	172:65be27845400	1225	* @rmtoll IER CMPMIE LL_LPTIM_IsEnabledIT_CMPM
AnnaBridge	172:65be27845400	1226	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1227	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1228	*/
AnnaBridge	172:65be27845400	1229	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1230	{
AnnaBridge	172:65be27845400	1231	return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPMIE) == LPTIM_IER_CMPMIE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1232	}
AnnaBridge	172:65be27845400	1233
AnnaBridge	172:65be27845400	1234	/**
AnnaBridge	172:65be27845400	1235	* @brief Enable autoreload match interrupt (ARRMIE).
AnnaBridge	172:65be27845400	1236	* @rmtoll IER ARRMIE LL_LPTIM_EnableIT_ARRM
AnnaBridge	172:65be27845400	1237	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1238	* @retval None
AnnaBridge	172:65be27845400	1239	*/
AnnaBridge	172:65be27845400	1240	__STATIC_INLINE void LL_LPTIM_EnableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1241	{
AnnaBridge	172:65be27845400	1242	SET_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge	172:65be27845400	1243	}
AnnaBridge	172:65be27845400	1244
AnnaBridge	172:65be27845400	1245	/**
AnnaBridge	172:65be27845400	1246	* @brief Disable autoreload match interrupt (ARRMIE).
AnnaBridge	172:65be27845400	1247	* @rmtoll IER ARRMIE LL_LPTIM_DisableIT_ARRM
AnnaBridge	172:65be27845400	1248	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1249	* @retval None
AnnaBridge	172:65be27845400	1250	*/
AnnaBridge	172:65be27845400	1251	__STATIC_INLINE void LL_LPTIM_DisableIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1252	{
AnnaBridge	172:65be27845400	1253	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE);
AnnaBridge	172:65be27845400	1254	}
AnnaBridge	172:65be27845400	1255
AnnaBridge	172:65be27845400	1256	/**
AnnaBridge	172:65be27845400	1257	* @brief Indicates whether the autoreload match interrupt (ARRMIE) is enabled.
AnnaBridge	172:65be27845400	1258	* @rmtoll IER ARRMIE LL_LPTIM_IsEnabledIT_ARRM
AnnaBridge	172:65be27845400	1259	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1260	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1261	*/
AnnaBridge	172:65be27845400	1262	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARRM(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1263	{
AnnaBridge	172:65be27845400	1264	return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARRMIE) == LPTIM_IER_ARRMIE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1265	}
AnnaBridge	172:65be27845400	1266
AnnaBridge	172:65be27845400	1267	/**
AnnaBridge	172:65be27845400	1268	* @brief Enable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge	172:65be27845400	1269	* @rmtoll IER EXTTRIGIE LL_LPTIM_EnableIT_EXTTRIG
AnnaBridge	172:65be27845400	1270	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1271	* @retval None
AnnaBridge	172:65be27845400	1272	*/
AnnaBridge	172:65be27845400	1273	__STATIC_INLINE void LL_LPTIM_EnableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1274	{
AnnaBridge	172:65be27845400	1275	SET_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge	172:65be27845400	1276	}
AnnaBridge	172:65be27845400	1277
AnnaBridge	172:65be27845400	1278	/**
AnnaBridge	172:65be27845400	1279	* @brief Disable external trigger valid edge interrupt (EXTTRIGIE).
AnnaBridge	172:65be27845400	1280	* @rmtoll IER EXTTRIGIE LL_LPTIM_DisableIT_EXTTRIG
AnnaBridge	172:65be27845400	1281	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1282	* @retval None
AnnaBridge	172:65be27845400	1283	*/
AnnaBridge	172:65be27845400	1284	__STATIC_INLINE void LL_LPTIM_DisableIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1285	{
AnnaBridge	172:65be27845400	1286	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE);
AnnaBridge	172:65be27845400	1287	}
AnnaBridge	172:65be27845400	1288
AnnaBridge	172:65be27845400	1289	/**
AnnaBridge	172:65be27845400	1290	* @brief Indicates external trigger valid edge interrupt (EXTTRIGIE) is enabled.
AnnaBridge	172:65be27845400	1291	* @rmtoll IER EXTTRIGIE LL_LPTIM_IsEnabledIT_EXTTRIG
AnnaBridge	172:65be27845400	1292	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1293	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1294	*/
AnnaBridge	172:65be27845400	1295	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_EXTTRIG(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1296	{
AnnaBridge	172:65be27845400	1297	return (((READ_BIT(LPTIMx->IER, LPTIM_IER_EXTTRIGIE) == LPTIM_IER_EXTTRIGIE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1298	}
AnnaBridge	172:65be27845400	1299
AnnaBridge	172:65be27845400	1300	/**
AnnaBridge	172:65be27845400	1301	* @brief Enable compare register write completed interrupt (CMPOKIE).
AnnaBridge	172:65be27845400	1302	* @rmtoll IER CMPOKIE LL_LPTIM_EnableIT_CMPOK
AnnaBridge	172:65be27845400	1303	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1304	* @retval None
AnnaBridge	172:65be27845400	1305	*/
AnnaBridge	172:65be27845400	1306	__STATIC_INLINE void LL_LPTIM_EnableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1307	{
AnnaBridge	172:65be27845400	1308	SET_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge	172:65be27845400	1309	}
AnnaBridge	172:65be27845400	1310
AnnaBridge	172:65be27845400	1311	/**
AnnaBridge	172:65be27845400	1312	* @brief Disable compare register write completed interrupt (CMPOKIE).
AnnaBridge	172:65be27845400	1313	* @rmtoll IER CMPOKIE LL_LPTIM_DisableIT_CMPOK
AnnaBridge	172:65be27845400	1314	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1315	* @retval None
AnnaBridge	172:65be27845400	1316	*/
AnnaBridge	172:65be27845400	1317	__STATIC_INLINE void LL_LPTIM_DisableIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1318	{
AnnaBridge	172:65be27845400	1319	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE);
AnnaBridge	172:65be27845400	1320	}
AnnaBridge	172:65be27845400	1321
AnnaBridge	172:65be27845400	1322	/**
AnnaBridge	172:65be27845400	1323	* @brief Indicates whether the compare register write completed interrupt (CMPOKIE) is enabled.
AnnaBridge	172:65be27845400	1324	* @rmtoll IER CMPOKIE LL_LPTIM_IsEnabledIT_CMPOK
AnnaBridge	172:65be27845400	1325	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1326	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1327	*/
AnnaBridge	172:65be27845400	1328	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_CMPOK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1329	{
AnnaBridge	172:65be27845400	1330	return (((READ_BIT(LPTIMx->IER, LPTIM_IER_CMPOKIE) == LPTIM_IER_CMPOKIE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1331	}
AnnaBridge	172:65be27845400	1332
AnnaBridge	172:65be27845400	1333	/**
AnnaBridge	172:65be27845400	1334	* @brief Enable autoreload register write completed interrupt (ARROKIE).
AnnaBridge	172:65be27845400	1335	* @rmtoll IER ARROKIE LL_LPTIM_EnableIT_ARROK
AnnaBridge	172:65be27845400	1336	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1337	* @retval None
AnnaBridge	172:65be27845400	1338	*/
AnnaBridge	172:65be27845400	1339	__STATIC_INLINE void LL_LPTIM_EnableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1340	{
AnnaBridge	172:65be27845400	1341	SET_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge	172:65be27845400	1342	}
AnnaBridge	172:65be27845400	1343
AnnaBridge	172:65be27845400	1344	/**
AnnaBridge	172:65be27845400	1345	* @brief Disable autoreload register write completed interrupt (ARROKIE).
AnnaBridge	172:65be27845400	1346	* @rmtoll IER ARROKIE LL_LPTIM_DisableIT_ARROK
AnnaBridge	172:65be27845400	1347	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1348	* @retval None
AnnaBridge	172:65be27845400	1349	*/
AnnaBridge	172:65be27845400	1350	__STATIC_INLINE void LL_LPTIM_DisableIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1351	{
AnnaBridge	172:65be27845400	1352	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE);
AnnaBridge	172:65be27845400	1353	}
AnnaBridge	172:65be27845400	1354
AnnaBridge	172:65be27845400	1355	/**
AnnaBridge	172:65be27845400	1356	* @brief Indicates whether the autoreload register write completed interrupt (ARROKIE) is enabled.
AnnaBridge	172:65be27845400	1357	* @rmtoll IER ARROKIE LL_LPTIM_IsEnabledIT_ARROK
AnnaBridge	172:65be27845400	1358	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1359	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1360	*/
AnnaBridge	172:65be27845400	1361	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_ARROK(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1362	{
AnnaBridge	172:65be27845400	1363	return (((READ_BIT(LPTIMx->IER, LPTIM_IER_ARROKIE) == LPTIM_IER_ARROKIE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1364	}
AnnaBridge	172:65be27845400	1365
AnnaBridge	172:65be27845400	1366	/**
AnnaBridge	172:65be27845400	1367	* @brief Enable direction change to up interrupt (UPIE).
AnnaBridge	172:65be27845400	1368	* @rmtoll IER UPIE LL_LPTIM_EnableIT_UP
AnnaBridge	172:65be27845400	1369	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1370	* @retval None
AnnaBridge	172:65be27845400	1371	*/
AnnaBridge	172:65be27845400	1372	__STATIC_INLINE void LL_LPTIM_EnableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1373	{
AnnaBridge	172:65be27845400	1374	SET_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge	172:65be27845400	1375	}
AnnaBridge	172:65be27845400	1376
AnnaBridge	172:65be27845400	1377	/**
AnnaBridge	172:65be27845400	1378	* @brief Disable direction change to up interrupt (UPIE).
AnnaBridge	172:65be27845400	1379	* @rmtoll IER UPIE LL_LPTIM_DisableIT_UP
AnnaBridge	172:65be27845400	1380	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1381	* @retval None
AnnaBridge	172:65be27845400	1382	*/
AnnaBridge	172:65be27845400	1383	__STATIC_INLINE void LL_LPTIM_DisableIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1384	{
AnnaBridge	172:65be27845400	1385	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_UPIE);
AnnaBridge	172:65be27845400	1386	}
AnnaBridge	172:65be27845400	1387
AnnaBridge	172:65be27845400	1388	/**
AnnaBridge	172:65be27845400	1389	* @brief Indicates whether the direction change to up interrupt (UPIE) is enabled.
AnnaBridge	172:65be27845400	1390	* @rmtoll IER UPIE LL_LPTIM_IsEnabledIT_UP
AnnaBridge	172:65be27845400	1391	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1392	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1393	*/
AnnaBridge	172:65be27845400	1394	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_UP(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1395	{
AnnaBridge	172:65be27845400	1396	return (((READ_BIT(LPTIMx->IER, LPTIM_IER_UPIE) == LPTIM_IER_UPIE)? 1UL : 0UL));
AnnaBridge	172:65be27845400	1397	}
AnnaBridge	172:65be27845400	1398
AnnaBridge	172:65be27845400	1399	/**
AnnaBridge	172:65be27845400	1400	* @brief Enable direction change to down interrupt (DOWNIE).
AnnaBridge	172:65be27845400	1401	* @rmtoll IER DOWNIE LL_LPTIM_EnableIT_DOWN
AnnaBridge	172:65be27845400	1402	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1403	* @retval None
AnnaBridge	172:65be27845400	1404	*/
AnnaBridge	172:65be27845400	1405	__STATIC_INLINE void LL_LPTIM_EnableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1406	{
AnnaBridge	172:65be27845400	1407	SET_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge	172:65be27845400	1408	}
AnnaBridge	172:65be27845400	1409
AnnaBridge	172:65be27845400	1410	/**
AnnaBridge	172:65be27845400	1411	* @brief Disable direction change to down interrupt (DOWNIE).
AnnaBridge	172:65be27845400	1412	* @rmtoll IER DOWNIE LL_LPTIM_DisableIT_DOWN
AnnaBridge	172:65be27845400	1413	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1414	* @retval None
AnnaBridge	172:65be27845400	1415	*/
AnnaBridge	172:65be27845400	1416	__STATIC_INLINE void LL_LPTIM_DisableIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1417	{
AnnaBridge	172:65be27845400	1418	CLEAR_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE);
AnnaBridge	172:65be27845400	1419	}
AnnaBridge	172:65be27845400	1420
AnnaBridge	172:65be27845400	1421	/**
AnnaBridge	172:65be27845400	1422	* @brief Indicates whether the direction change to down interrupt (DOWNIE) is enabled.
AnnaBridge	172:65be27845400	1423	* @rmtoll IER DOWNIE LL_LPTIM_IsEnabledIT_DOWN
AnnaBridge	172:65be27845400	1424	* @param LPTIMx Low-Power Timer instance
AnnaBridge	172:65be27845400	1425	* @retval State of bit (1 or 0).
AnnaBridge	172:65be27845400	1426	*/
AnnaBridge	172:65be27845400	1427	__STATIC_INLINE uint32_t LL_LPTIM_IsEnabledIT_DOWN(LPTIM_TypeDef *LPTIMx)
AnnaBridge	172:65be27845400	1428	{
AnnaBridge	172:65be27845400	1429	return ((READ_BIT(LPTIMx->IER, LPTIM_IER_DOWNIE) == LPTIM_IER_DOWNIE)? 1UL : 0UL);
AnnaBridge	172:65be27845400	1430	}
AnnaBridge	172:65be27845400	1431
AnnaBridge	172:65be27845400	1432	/**
AnnaBridge	172:65be27845400	1433	* @}
AnnaBridge	172:65be27845400	1434	*/
AnnaBridge	172:65be27845400	1435
AnnaBridge	172:65be27845400	1436	/**
AnnaBridge	172:65be27845400	1437	* @}
AnnaBridge	172:65be27845400	1438	*/
AnnaBridge	172:65be27845400	1439
AnnaBridge	172:65be27845400	1440	/**
AnnaBridge	172:65be27845400	1441	* @}
AnnaBridge	172:65be27845400	1442	*/
AnnaBridge	172:65be27845400	1443
AnnaBridge	172:65be27845400	1444	#endif /* LPTIM1 \|\| LPTIM2 \|\| LPTIM3 \|\| LPTIM4 \|\| LPTIM5 */
AnnaBridge	172:65be27845400	1445
AnnaBridge	172:65be27845400	1446	/**
AnnaBridge	172:65be27845400	1447	* @}
AnnaBridge	172:65be27845400	1448	*/
AnnaBridge	172:65be27845400	1449
AnnaBridge	172:65be27845400	1450	#ifdef __cplusplus
AnnaBridge	172:65be27845400	1451	}
AnnaBridge	172:65be27845400	1452	#endif
AnnaBridge	172:65be27845400	1453
AnnaBridge	172:65be27845400	1454	#endif /* STM32H7xx_LL_LPTIM_H */
AnnaBridge	172:65be27845400	1455
AnnaBridge	172:65be27845400	1456	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/