mbed - The official Mbed 2 C/C++ SDK provides the softwa…

Users » mbed_official » Code » mbed

mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_hal_tim_ex.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	172:65be27845400	1	/**
AnnaBridge	172:65be27845400	2	******************************************************************************
AnnaBridge	172:65be27845400	3	* @file stm32h7xx_hal_tim_ex.h
AnnaBridge	172:65be27845400	4	* @author MCD Application Team
AnnaBridge	172:65be27845400	5	* @brief Header file of TIM HAL Extended module.
AnnaBridge	172:65be27845400	6	******************************************************************************
AnnaBridge	172:65be27845400	7	* @attention
AnnaBridge	172:65be27845400	8	*
AnnaBridge	172:65be27845400	9	* <h2><center>© Copyright (c) 2017 STMicroelectronics.
AnnaBridge	172:65be27845400	10	* All rights reserved.</center></h2>
AnnaBridge	172:65be27845400	11	*
AnnaBridge	172:65be27845400	12	* This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge	172:65be27845400	13	* the "License"; You may not use this file except in compliance with the
AnnaBridge	172:65be27845400	14	* License. You may obtain a copy of the License at:
AnnaBridge	172:65be27845400	15	* opensource.org/licenses/BSD-3-Clause
AnnaBridge	172:65be27845400	16	*
AnnaBridge	172:65be27845400	17	******************************************************************************
AnnaBridge	172:65be27845400	18	*/
AnnaBridge	172:65be27845400	19
AnnaBridge	172:65be27845400	20	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	172:65be27845400	21	#ifndef STM32H7xx_HAL_TIM_EX_H
AnnaBridge	172:65be27845400	22	#define STM32H7xx_HAL_TIM_EX_H
AnnaBridge	172:65be27845400	23
AnnaBridge	172:65be27845400	24	#ifdef __cplusplus
AnnaBridge	172:65be27845400	25	extern "C" {
AnnaBridge	172:65be27845400	26	#endif
AnnaBridge	172:65be27845400	27
AnnaBridge	172:65be27845400	28	/* Includes ------------------------------------------------------------------*/
AnnaBridge	172:65be27845400	29	#include "stm32h7xx_hal_def.h"
AnnaBridge	172:65be27845400	30
AnnaBridge	172:65be27845400	31	/** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge	172:65be27845400	32	* @{
AnnaBridge	172:65be27845400	33	*/
AnnaBridge	172:65be27845400	34
AnnaBridge	172:65be27845400	35	/** @addtogroup TIMEx
AnnaBridge	172:65be27845400	36	* @{
AnnaBridge	172:65be27845400	37	*/
AnnaBridge	172:65be27845400	38
AnnaBridge	172:65be27845400	39	/* Exported types ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	40	/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
AnnaBridge	172:65be27845400	41	* @{
AnnaBridge	172:65be27845400	42	*/
AnnaBridge	172:65be27845400	43
AnnaBridge	172:65be27845400	44	/**
AnnaBridge	172:65be27845400	45	* @brief TIM Hall sensor Configuration Structure definition
AnnaBridge	172:65be27845400	46	*/
AnnaBridge	172:65be27845400	47
AnnaBridge	172:65be27845400	48	typedef struct
AnnaBridge	172:65be27845400	49	{
AnnaBridge	172:65be27845400	50	uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
AnnaBridge	172:65be27845400	51	This parameter can be a value of @ref TIM_Input_Capture_Polarity */
AnnaBridge	172:65be27845400	52
AnnaBridge	172:65be27845400	53	uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
AnnaBridge	172:65be27845400	54	This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
AnnaBridge	172:65be27845400	55
AnnaBridge	172:65be27845400	56	uint32_t IC1Filter; /*!< Specifies the input capture filter.
AnnaBridge	172:65be27845400	57	This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
AnnaBridge	172:65be27845400	58
AnnaBridge	172:65be27845400	59	uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
AnnaBridge	172:65be27845400	60	This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
AnnaBridge	172:65be27845400	61	} TIM_HallSensor_InitTypeDef;
AnnaBridge	172:65be27845400	62	#if defined(TIM_BREAK_INPUT_SUPPORT)
AnnaBridge	172:65be27845400	63
AnnaBridge	172:65be27845400	64	/**
AnnaBridge	172:65be27845400	65	* @brief TIM Break/Break2 input configuration
AnnaBridge	172:65be27845400	66	*/
AnnaBridge	172:65be27845400	67	typedef struct
AnnaBridge	172:65be27845400	68	{
AnnaBridge	172:65be27845400	69	uint32_t Source; /*!< Specifies the source of the timer break input.
AnnaBridge	172:65be27845400	70	This parameter can be a value of @ref TIMEx_Break_Input_Source */
AnnaBridge	172:65be27845400	71	uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
AnnaBridge	172:65be27845400	72	This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
AnnaBridge	172:65be27845400	73	uint32_t Polarity; /*!< Specifies the break input source polarity.
AnnaBridge	172:65be27845400	74	This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
AnnaBridge	172:65be27845400	75	Not relevant when analog watchdog output of the DFSDM1 used as break input source */
AnnaBridge	172:65be27845400	76	}
AnnaBridge	172:65be27845400	77	TIMEx_BreakInputConfigTypeDef;
AnnaBridge	172:65be27845400	78
AnnaBridge	172:65be27845400	79	#endif /* TIM_BREAK_INPUT_SUPPORT */
AnnaBridge	172:65be27845400	80	/**
AnnaBridge	172:65be27845400	81	* @}
AnnaBridge	172:65be27845400	82	*/
AnnaBridge	172:65be27845400	83	/* End of exported types -----------------------------------------------------*/
AnnaBridge	172:65be27845400	84
AnnaBridge	172:65be27845400	85	/* Exported constants --------------------------------------------------------*/
AnnaBridge	172:65be27845400	86	/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
AnnaBridge	172:65be27845400	87	* @{
AnnaBridge	172:65be27845400	88	*/
AnnaBridge	172:65be27845400	89
AnnaBridge	172:65be27845400	90	/** @defgroup TIMEx_Remap TIM Extended Remapping
AnnaBridge	172:65be27845400	91	* @{
AnnaBridge	172:65be27845400	92	*/
AnnaBridge	172:65be27845400	93	#define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */
AnnaBridge	172:65be27845400	94	#define TIM_TIM1_ETR_COMP1 TIM1_AF1_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	95	#define TIM_TIM1_ETR_COMP2 TIM1_AF1_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 OUT */
AnnaBridge	172:65be27845400	96	#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_AF1_ETRSEL_1 \| TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */
AnnaBridge	172:65be27845400	97	#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_AF1_ETRSEL_2) /* !< TIM1_ETR is connected to ADC1 AWD2 */
AnnaBridge	172:65be27845400	98	#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_AF1_ETRSEL_2 \| TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
AnnaBridge	172:65be27845400	99	#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_AF1_ETRSEL_2 \| TIM1_AF1_ETRSEL_1) /* !< TIM1_ETR is connected to ADC3 AWD1 */
AnnaBridge	172:65be27845400	100	#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_AF1_ETRSEL_2 \| TIM1_AF1_ETRSEL_1 \| TIM1_AF1_ETRSEL_0) /* !< TIM1_ETR is connected to ADC3 AWD2 */
AnnaBridge	172:65be27845400	101	#define TIM_TIM1_ETR_ADC3_AWD3 TIM1_AF1_ETRSEL_3 /* !< TIM1_ETR is connected to ADC3 AWD3 */
AnnaBridge	172:65be27845400	102
AnnaBridge	172:65be27845400	103	#define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */
AnnaBridge	172:65be27845400	104	#define TIM_TIM8_ETR_COMP1 TIM8_AF1_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	105	#define TIM_TIM8_ETR_COMP2 TIM8_AF1_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 OUT */
AnnaBridge	172:65be27845400	106	#define TIM_TIM8_ETR_ADC1_AWD1 (TIM8_AF1_ETRSEL_1 \| TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC1 AWD1 */
AnnaBridge	172:65be27845400	107	#define TIM_TIM8_ETR_ADC1_AWD2 (TIM8_AF1_ETRSEL_2) /* !< TIM8_ETR is connected to ADC1 AWD2 */
AnnaBridge	172:65be27845400	108	#define TIM_TIM8_ETR_ADC1_AWD3 (TIM8_AF1_ETRSEL_2 \| TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC1 AWD3 */
AnnaBridge	172:65be27845400	109	#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_AF1_ETRSEL_2 \| TIM8_AF1_ETRSEL_1) /* !< TIM8_ETR is connected to ADC3 AWD1 */
AnnaBridge	172:65be27845400	110	#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_AF1_ETRSEL_2 \| TIM8_AF1_ETRSEL_1 \| TIM8_AF1_ETRSEL_0) /* !< TIM8_ETR is connected to ADC3 AWD2 */
AnnaBridge	172:65be27845400	111	#define TIM_TIM8_ETR_ADC3_AWD3 TIM8_AF1_ETRSEL_3 /* !< TIM8_ETR is connected to ADC3 AWD3 */
AnnaBridge	172:65be27845400	112
AnnaBridge	172:65be27845400	113	#define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */
AnnaBridge	172:65be27845400	114	#define TIM_TIM2_ETR_COMP1 (TIM2_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	115	#define TIM_TIM2_ETR_COMP2 (TIM2_AF1_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 OUT */
AnnaBridge	172:65be27845400	116	#define TIM_TIM2_ETR_RCC_LSE (TIM2_AF1_ETRSEL_1 \| TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to RCC LSE */
AnnaBridge	172:65be27845400	117	#define TIM_TIM2_ETR_SAI1_FSA TIM2_AF1_ETRSEL_2 /* !< TIM2_ETR is connected to SAI1 FS_A */
AnnaBridge	172:65be27845400	118	#define TIM_TIM2_ETR_SAI1_FSB (TIM2_AF1_ETRSEL_2 \| TIM8_AF1_ETRSEL_0) /* !< TIM2_ETR is connected to SAI1 FS_B */
AnnaBridge	172:65be27845400	119
AnnaBridge	172:65be27845400	120	#define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */
AnnaBridge	172:65be27845400	121	#define TIM_TIM3_ETR_COMP1 TIM3_AF1_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	122
AnnaBridge	172:65be27845400	123	#define TIM_TIM5_ETR_GPIO 0x00000000U /* !< TIM5_ETR is connected to GPIO */
AnnaBridge	172:65be27845400	124	#define TIM_TIM5_ETR_SAI2_FSA TIM5_AF1_ETRSEL_0 /* !< TIM5_ETR is connected to SAI2 FS_A */
AnnaBridge	172:65be27845400	125	#define TIM_TIM5_ETR_SAI2_FSB TIM5_AF1_ETRSEL_1 /* !< TIM5_ETR is connected to SAI2 FS_B */
AnnaBridge	172:65be27845400	126	/**
AnnaBridge	172:65be27845400	127	* @}
AnnaBridge	172:65be27845400	128	*/
AnnaBridge	172:65be27845400	129	#if defined(TIM_BREAK_INPUT_SUPPORT)
AnnaBridge	172:65be27845400	130
AnnaBridge	172:65be27845400	131	/** @defgroup TIMEx_Break_Input TIM Extended Break input
AnnaBridge	172:65be27845400	132	* @{
AnnaBridge	172:65be27845400	133	*/
AnnaBridge	172:65be27845400	134	#define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */
AnnaBridge	172:65be27845400	135	#define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */
AnnaBridge	172:65be27845400	136	/**
AnnaBridge	172:65be27845400	137	* @}
AnnaBridge	172:65be27845400	138	*/
AnnaBridge	172:65be27845400	139
AnnaBridge	172:65be27845400	140	/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
AnnaBridge	172:65be27845400	141	* @{
AnnaBridge	172:65be27845400	142	*/
AnnaBridge	172:65be27845400	143	#define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
AnnaBridge	172:65be27845400	144	#define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
AnnaBridge	172:65be27845400	145	#define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
AnnaBridge	172:65be27845400	146	#define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
AnnaBridge	172:65be27845400	147	/**
AnnaBridge	172:65be27845400	148	* @}
AnnaBridge	172:65be27845400	149	*/
AnnaBridge	172:65be27845400	150
AnnaBridge	172:65be27845400	151	/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
AnnaBridge	172:65be27845400	152	* @{
AnnaBridge	172:65be27845400	153	*/
AnnaBridge	172:65be27845400	154	#define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */
AnnaBridge	172:65be27845400	155	#define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */
AnnaBridge	172:65be27845400	156	/**
AnnaBridge	172:65be27845400	157	* @}
AnnaBridge	172:65be27845400	158	*/
AnnaBridge	172:65be27845400	159
AnnaBridge	172:65be27845400	160	/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
AnnaBridge	172:65be27845400	161	* @{
AnnaBridge	172:65be27845400	162	*/
AnnaBridge	172:65be27845400	163	#define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */
AnnaBridge	172:65be27845400	164	#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */
AnnaBridge	172:65be27845400	165	/**
AnnaBridge	172:65be27845400	166	* @}
AnnaBridge	172:65be27845400	167	*/
AnnaBridge	172:65be27845400	168	#endif /* TIM_BREAK_INPUT_SUPPORT */
AnnaBridge	172:65be27845400	169
AnnaBridge	172:65be27845400	170	/** @defgroup TIMEx_Timer_Input_Selection TIM Extended Timer input selection
AnnaBridge	172:65be27845400	171	* @{
AnnaBridge	172:65be27845400	172	*/
AnnaBridge	172:65be27845400	173	#define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1_TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	174	#define TIM_TIM1_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM1_TI1 is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	175
AnnaBridge	172:65be27845400	176	#define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8_TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	177	#define TIM_TIM8_TI1_COMP2 TIM_TISEL_TI1SEL_0 /* !< TIM8_TI1 is connected to COMP2 OUT */
AnnaBridge	172:65be27845400	178
AnnaBridge	172:65be27845400	179	#define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2_TI4 is connected to GPIO */
AnnaBridge	172:65be27845400	180	#define TIM_TIM2_TI4_COMP1 TIM_TISEL_TI4SEL_0 /* !< TIM2_TI4 is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	181	#define TIM_TIM2_TI4_COMP2 TIM_TISEL_TI4SEL_1 /* !< TIM2_TI4 is connected to COMP2 OUT */
AnnaBridge	172:65be27845400	182	#define TIM_TIM2_TI4_COMP1_COMP2 (TIM_TISEL_TI4SEL_0 \| TIM_TISEL_TI4SEL_1) /* !< TIM2_TI4 is connected to COMP2 OUT OR COMP2 OUT */
AnnaBridge	172:65be27845400	183
AnnaBridge	172:65be27845400	184	#define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3_TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	185	#define TIM_TIM3_TI1_COMP1 TIM_TISEL_TI1SEL_0 /* !< TIM3_TI1 is connected to COMP1 OUT */
AnnaBridge	172:65be27845400	186	#define TIM_TIM3_TI1_COMP2 TIM_TISEL_TI1SEL_1 /* !< TIM3_TI1 is connected to COMP2 OUT */
AnnaBridge	172:65be27845400	187	#define TIM_TIM3_TI1_COMP1_COMP2 (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1) /* !< TIM3_TI1 is connected to COMP2 OUT OR COMP2 OUT */
AnnaBridge	172:65be27845400	188
AnnaBridge	172:65be27845400	189	#define TIM_TIM5_TI1_GPIO 0x00000000U /* !< TIM5_TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	190	#define TIM_TIM5_TI1_CAN_TMP TIM_TISEL_TI1SEL_0 /* !< TIM5_TI1 is connected to CAN TMP */
AnnaBridge	172:65be27845400	191	#define TIM_TIM5_TI1_CAN_RTP TIM_TISEL_TI1SEL_1 /* !< TIM5_TI1 is connected to CAN RTP */
AnnaBridge	172:65be27845400	192
AnnaBridge	172:65be27845400	193	#define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15_TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	194	#define TIM_TIM15_TI1_TIM2_CH1 TIM_TISEL_TI1SEL_0 /* !< TIM15_TI1 is connected to TIM2 CH1 */
AnnaBridge	172:65be27845400	195	#define TIM_TIM15_TI1_TIM3_CH1 TIM_TISEL_TI1SEL_1 /* !< TIM15_TI1 is connected to TIM3 CH1 */
AnnaBridge	172:65be27845400	196	#define TIM_TIM15_TI1_TIM4_CH1 (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to TIM4 CH1 */
AnnaBridge	172:65be27845400	197	#define TIM_TIM15_TI1_RCC_LSE (TIM_TISEL_TI1SEL_3) /* !< TIM15_TI1 is connected to RCC LSE */
AnnaBridge	172:65be27845400	198	#define TIM_TIM15_TI1_RCC_CSI (TIM_TISEL_TI1SEL_3 \| TIM_TISEL_TI1SEL_0) /* !< TIM15_TI1 is connected to RCC CSI */
AnnaBridge	172:65be27845400	199	#define TIM_TIM15_TI1_RCC_MCO2 (TIM_TISEL_TI1SEL_3 \| TIM_TISEL_TI1SEL_1) /* !< TIM15_TI1 is connected to RCC MCO2 */
AnnaBridge	172:65be27845400	200
AnnaBridge	172:65be27845400	201	#define TIM_TIM15_TI2_GPIO 0x00000000U /* !< TIM15_TI2 is connected to GPIO */
AnnaBridge	172:65be27845400	202	#define TIM_TIM15_TI2_TIM2_CH2 (TIM_TISEL_TI2SEL_0) /* !< TIM15_TI2 is connected to TIM2 CH2 */
AnnaBridge	172:65be27845400	203	#define TIM_TIM15_TI2_TIM3_CH2 (TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM3 CH2 */
AnnaBridge	172:65be27845400	204	#define TIM_TIM15_TI2_TIM4_CH2 (TIM_TISEL_TI2SEL_0 \| TIM_TISEL_TI2SEL_1) /* !< TIM15_TI2 is connected to TIM4 CH2 */
AnnaBridge	172:65be27845400	205
AnnaBridge	172:65be27845400	206	#define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	207	#define TIM_TIM16_TI1_RCC_LSI TIM_TISEL_TI1SEL_0 /* !< TIM16 TI1 is connected to RCC LSI */
AnnaBridge	172:65be27845400	208	#define TIM_TIM16_TI1_RCC_LSE TIM_TISEL_TI1SEL_1 /* !< TIM16 TI1 is connected to RCC LSE */
AnnaBridge	172:65be27845400	209	#define TIM_TIM16_TI1_WKUP_IT (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1) /* !< TIM16 TI1 is connected to WKUP_IT */
AnnaBridge	172:65be27845400	210
AnnaBridge	172:65be27845400	211	#define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */
AnnaBridge	172:65be27845400	212	#define TIM_TIM17_TI1_SPDIF_FS TIM_TISEL_TI1SEL_0 /* !< TIM17 TI1 is connected to RCC LSI */
AnnaBridge	172:65be27845400	213	#define TIM_TIM17_TI1_RCC_HSE1MHZ TIM_TISEL_TI1SEL_1 /* !< TIM17 TI1 is connected to RCC LSE */
AnnaBridge	172:65be27845400	214	#define TIM_TIM17_TI1_RCC_MCO1 (TIM_TISEL_TI1SEL_0 \| TIM_TISEL_TI1SEL_1) /* !< TIM17 TI1 is connected to RCC MCO1 */
AnnaBridge	172:65be27845400	215	/**
AnnaBridge	172:65be27845400	216	* @}
AnnaBridge	172:65be27845400	217	*/
AnnaBridge	172:65be27845400	218
AnnaBridge	172:65be27845400	219	/**
AnnaBridge	172:65be27845400	220	* @}
AnnaBridge	172:65be27845400	221	*/
AnnaBridge	172:65be27845400	222	/* End of exported constants -------------------------------------------------*/
AnnaBridge	172:65be27845400	223
AnnaBridge	172:65be27845400	224	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	172:65be27845400	225	/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
AnnaBridge	172:65be27845400	226	* @{
AnnaBridge	172:65be27845400	227	*/
AnnaBridge	172:65be27845400	228
AnnaBridge	172:65be27845400	229	/**
AnnaBridge	172:65be27845400	230	* @}
AnnaBridge	172:65be27845400	231	*/
AnnaBridge	172:65be27845400	232	/* End of exported macro -----------------------------------------------------*/
AnnaBridge	172:65be27845400	233
AnnaBridge	172:65be27845400	234	/* Private macro -------------------------------------------------------------*/
AnnaBridge	172:65be27845400	235	/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
AnnaBridge	172:65be27845400	236	* @{
AnnaBridge	172:65be27845400	237	*/
AnnaBridge	172:65be27845400	238	#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) \|\| \
AnnaBridge	172:65be27845400	239	((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
AnnaBridge	172:65be27845400	240
AnnaBridge	172:65be27845400	241	#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) \|\| \
AnnaBridge	172:65be27845400	242	((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) \|\| \
AnnaBridge	172:65be27845400	243	((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) \|\| \
AnnaBridge	172:65be27845400	244	((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
AnnaBridge	172:65be27845400	245
AnnaBridge	172:65be27845400	246	#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) \|\| \
AnnaBridge	172:65be27845400	247	((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
AnnaBridge	172:65be27845400	248
AnnaBridge	172:65be27845400	249	#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) \|\| \
AnnaBridge	172:65be27845400	250	((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
AnnaBridge	172:65be27845400	251
AnnaBridge	172:65be27845400	252	#define IS_TIM_TISEL(__TISEL__) (((__TISEL__) == TIM_TIM1_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	253	((__TISEL__) == TIM_TIM1_TI1_COMP1) \|\|\
AnnaBridge	172:65be27845400	254	((__TISEL__) == TIM_TIM8_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	255	((__TISEL__) == TIM_TIM8_TI1_COMP2) \|\|\
AnnaBridge	172:65be27845400	256	((__TISEL__) == TIM_TIM2_TI4_GPIO) \|\|\
AnnaBridge	172:65be27845400	257	((__TISEL__) == TIM_TIM2_TI4_COMP1) \|\|\
AnnaBridge	172:65be27845400	258	((__TISEL__) == TIM_TIM2_TI4_COMP2) \|\|\
AnnaBridge	172:65be27845400	259	((__TISEL__) == TIM_TIM2_TI4_COMP1_COMP2) \|\|\
AnnaBridge	172:65be27845400	260	((__TISEL__) == TIM_TIM3_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	261	((__TISEL__) == TIM_TIM3_TI1_COMP1) \|\|\
AnnaBridge	172:65be27845400	262	((__TISEL__) == TIM_TIM3_TI1_COMP2) \|\|\
AnnaBridge	172:65be27845400	263	((__TISEL__) == TIM_TIM3_TI1_COMP1_COMP2) \|\|\
AnnaBridge	172:65be27845400	264	((__TISEL__) == TIM_TIM5_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	265	((__TISEL__) == TIM_TIM5_TI1_CAN_TMP) \|\|\
AnnaBridge	172:65be27845400	266	((__TISEL__) == TIM_TIM5_TI1_CAN_RTP) \|\|\
AnnaBridge	172:65be27845400	267	((__TISEL__) == TIM_TIM15_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	268	((__TISEL__) == TIM_TIM15_TI1_TIM2_CH1) \|\|\
AnnaBridge	172:65be27845400	269	((__TISEL__) == TIM_TIM15_TI1_TIM3_CH1) \|\|\
AnnaBridge	172:65be27845400	270	((__TISEL__) == TIM_TIM15_TI1_TIM4_CH1) \|\|\
AnnaBridge	172:65be27845400	271	((__TISEL__) == TIM_TIM15_TI1_RCC_LSE) \|\|\
AnnaBridge	172:65be27845400	272	((__TISEL__) == TIM_TIM15_TI1_RCC_CSI) \|\|\
AnnaBridge	172:65be27845400	273	((__TISEL__) == TIM_TIM15_TI1_RCC_MCO2) \|\|\
AnnaBridge	172:65be27845400	274	((__TISEL__) == TIM_TIM15_TI2_GPIO) \|\|\
AnnaBridge	172:65be27845400	275	((__TISEL__) == TIM_TIM15_TI2_TIM2_CH2) \|\|\
AnnaBridge	172:65be27845400	276	((__TISEL__) == TIM_TIM15_TI2_TIM3_CH2) \|\|\
AnnaBridge	172:65be27845400	277	((__TISEL__) == TIM_TIM15_TI2_TIM4_CH2) \|\|\
AnnaBridge	172:65be27845400	278	((__TISEL__) == TIM_TIM16_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	279	((__TISEL__) == TIM_TIM16_TI1_RCC_LSI) \|\|\
AnnaBridge	172:65be27845400	280	((__TISEL__) == TIM_TIM16_TI1_RCC_LSE) \|\|\
AnnaBridge	172:65be27845400	281	((__TISEL__) == TIM_TIM16_TI1_WKUP_IT) \|\|\
AnnaBridge	172:65be27845400	282	((__TISEL__) == TIM_TIM17_TI1_GPIO) \|\|\
AnnaBridge	172:65be27845400	283	((__TISEL__) == TIM_TIM17_TI1_SPDIF_FS) \|\|\
AnnaBridge	172:65be27845400	284	((__TISEL__) == TIM_TIM17_TI1_RCC_HSE1MHZ) \|\|\
AnnaBridge	172:65be27845400	285	((__TISEL__) == TIM_TIM17_TI1_RCC_MCO1))
AnnaBridge	172:65be27845400	286
AnnaBridge	172:65be27845400	287	#define IS_TIM_REMAP(__RREMAP__) (((__RREMAP__) == TIM_TIM1_ETR_GPIO) \|\|\
AnnaBridge	172:65be27845400	288	((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD1) \|\|\
AnnaBridge	172:65be27845400	289	((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD2) \|\|\
AnnaBridge	172:65be27845400	290	((__RREMAP__) == TIM_TIM1_ETR_ADC1_AWD3) \|\|\
AnnaBridge	172:65be27845400	291	((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD1) \|\|\
AnnaBridge	172:65be27845400	292	((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD2) \|\|\
AnnaBridge	172:65be27845400	293	((__RREMAP__) == TIM_TIM1_ETR_ADC3_AWD3) \|\|\
AnnaBridge	172:65be27845400	294	((__RREMAP__) == TIM_TIM1_ETR_COMP1) \|\|\
AnnaBridge	172:65be27845400	295	((__RREMAP__) == TIM_TIM1_ETR_COMP2) \|\|\
AnnaBridge	172:65be27845400	296	((__RREMAP__) == TIM_TIM8_ETR_GPIO) \|\|\
AnnaBridge	172:65be27845400	297	((__RREMAP__) == TIM_TIM8_ETR_ADC1_AWD1) \|\|\
AnnaBridge	172:65be27845400	298	((__RREMAP__) == TIM_TIM8_ETR_ADC1_AWD2) \|\|\
AnnaBridge	172:65be27845400	299	((__RREMAP__) == TIM_TIM8_ETR_ADC1_AWD3) \|\|\
AnnaBridge	172:65be27845400	300	((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD1) \|\|\
AnnaBridge	172:65be27845400	301	((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD2) \|\|\
AnnaBridge	172:65be27845400	302	((__RREMAP__) == TIM_TIM8_ETR_ADC3_AWD3) \|\|\
AnnaBridge	172:65be27845400	303	((__RREMAP__) == TIM_TIM8_ETR_COMP1) \|\|\
AnnaBridge	172:65be27845400	304	((__RREMAP__) == TIM_TIM8_ETR_COMP2) \|\|\
AnnaBridge	172:65be27845400	305	((__RREMAP__) == TIM_TIM2_ETR_GPIO) \|\|\
AnnaBridge	172:65be27845400	306	((__RREMAP__) == TIM_TIM2_ETR_COMP1) \|\|\
AnnaBridge	172:65be27845400	307	((__RREMAP__) == TIM_TIM2_ETR_COMP2) \|\|\
AnnaBridge	172:65be27845400	308	((__RREMAP__) == TIM_TIM2_ETR_RCC_LSE) \|\|\
AnnaBridge	172:65be27845400	309	((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSA) \|\|\
AnnaBridge	172:65be27845400	310	((__RREMAP__) == TIM_TIM2_ETR_SAI1_FSB) \|\|\
AnnaBridge	172:65be27845400	311	((__RREMAP__) == TIM_TIM3_ETR_GPIO) \|\|\
AnnaBridge	172:65be27845400	312	((__RREMAP__) == TIM_TIM3_ETR_COMP1) \|\|\
AnnaBridge	172:65be27845400	313	((__RREMAP__) == TIM_TIM5_ETR_GPIO) \|\|\
AnnaBridge	172:65be27845400	314	((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSA) \|\|\
AnnaBridge	172:65be27845400	315	((__RREMAP__) == TIM_TIM5_ETR_SAI2_FSB))
AnnaBridge	172:65be27845400	316
AnnaBridge	172:65be27845400	317
AnnaBridge	172:65be27845400	318	/**
AnnaBridge	172:65be27845400	319	* @}
AnnaBridge	172:65be27845400	320	*/
AnnaBridge	172:65be27845400	321	/* End of private macro ------------------------------------------------------*/
AnnaBridge	172:65be27845400	322
AnnaBridge	172:65be27845400	323	/* Exported functions --------------------------------------------------------*/
AnnaBridge	172:65be27845400	324	/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
AnnaBridge	172:65be27845400	325	* @{
AnnaBridge	172:65be27845400	326	*/
AnnaBridge	172:65be27845400	327
AnnaBridge	172:65be27845400	328	/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
AnnaBridge	172:65be27845400	329	* @brief Timer Hall Sensor functions
AnnaBridge	172:65be27845400	330	* @{
AnnaBridge	172:65be27845400	331	*/
AnnaBridge	172:65be27845400	332	/* Timer Hall Sensor functions **********************************************/
AnnaBridge	172:65be27845400	333	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef htim, TIM_HallSensor_InitTypeDef sConfig);
AnnaBridge	172:65be27845400	334	HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	335
AnnaBridge	172:65be27845400	336	void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	337	void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	338
AnnaBridge	172:65be27845400	339	/* Blocking mode: Polling */
AnnaBridge	172:65be27845400	340	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	341	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	342	/* Non-Blocking mode: Interrupt */
AnnaBridge	172:65be27845400	343	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	344	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	345	/* Non-Blocking mode: DMA */
AnnaBridge	172:65be27845400	346	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef htim, uint32_t pData, uint16_t Length);
AnnaBridge	172:65be27845400	347	HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	348	/**
AnnaBridge	172:65be27845400	349	* @}
AnnaBridge	172:65be27845400	350	*/
AnnaBridge	172:65be27845400	351
AnnaBridge	172:65be27845400	352	/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
AnnaBridge	172:65be27845400	353	* @brief Timer Complementary Output Compare functions
AnnaBridge	172:65be27845400	354	* @{
AnnaBridge	172:65be27845400	355	*/
AnnaBridge	172:65be27845400	356	/* Timer Complementary Output Compare functions *****************************/
AnnaBridge	172:65be27845400	357	/* Blocking mode: Polling */
AnnaBridge	172:65be27845400	358	HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	359	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	360
AnnaBridge	172:65be27845400	361	/* Non-Blocking mode: Interrupt */
AnnaBridge	172:65be27845400	362	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	363	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	364
AnnaBridge	172:65be27845400	365	/* Non-Blocking mode: DMA */
AnnaBridge	172:65be27845400	366	HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
AnnaBridge	172:65be27845400	367	HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	368	/**
AnnaBridge	172:65be27845400	369	* @}
AnnaBridge	172:65be27845400	370	*/
AnnaBridge	172:65be27845400	371
AnnaBridge	172:65be27845400	372	/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
AnnaBridge	172:65be27845400	373	* @brief Timer Complementary PWM functions
AnnaBridge	172:65be27845400	374	* @{
AnnaBridge	172:65be27845400	375	*/
AnnaBridge	172:65be27845400	376	/* Timer Complementary PWM functions ****************************************/
AnnaBridge	172:65be27845400	377	/* Blocking mode: Polling */
AnnaBridge	172:65be27845400	378	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	379	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	380
AnnaBridge	172:65be27845400	381	/* Non-Blocking mode: Interrupt */
AnnaBridge	172:65be27845400	382	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	383	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	384	/* Non-Blocking mode: DMA */
AnnaBridge	172:65be27845400	385	HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef htim, uint32_t Channel, uint32_t pData, uint16_t Length);
AnnaBridge	172:65be27845400	386	HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
AnnaBridge	172:65be27845400	387	/**
AnnaBridge	172:65be27845400	388	* @}
AnnaBridge	172:65be27845400	389	*/
AnnaBridge	172:65be27845400	390
AnnaBridge	172:65be27845400	391	/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
AnnaBridge	172:65be27845400	392	* @brief Timer Complementary One Pulse functions
AnnaBridge	172:65be27845400	393	* @{
AnnaBridge	172:65be27845400	394	*/
AnnaBridge	172:65be27845400	395	/* Timer Complementary One Pulse functions **********************************/
AnnaBridge	172:65be27845400	396	/* Blocking mode: Polling */
AnnaBridge	172:65be27845400	397	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge	172:65be27845400	398	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge	172:65be27845400	399
AnnaBridge	172:65be27845400	400	/* Non-Blocking mode: Interrupt */
AnnaBridge	172:65be27845400	401	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge	172:65be27845400	402	HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
AnnaBridge	172:65be27845400	403	/**
AnnaBridge	172:65be27845400	404	* @}
AnnaBridge	172:65be27845400	405	*/
AnnaBridge	172:65be27845400	406
AnnaBridge	172:65be27845400	407	/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
AnnaBridge	172:65be27845400	408	* @brief Peripheral Control functions
AnnaBridge	172:65be27845400	409	* @{
AnnaBridge	172:65be27845400	410	*/
AnnaBridge	172:65be27845400	411	/* Extended Control functions ************************************************/
AnnaBridge	172:65be27845400	412	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge	172:65be27845400	413	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge	172:65be27845400	414	HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge	172:65be27845400	415	HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef htim, TIM_MasterConfigTypeDef sMasterConfig);
AnnaBridge	172:65be27845400	416	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef htim, TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig);
AnnaBridge	172:65be27845400	417	#if defined(TIM_BREAK_INPUT_SUPPORT)
AnnaBridge	172:65be27845400	418	HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef sBreakInputConfig);
AnnaBridge	172:65be27845400	419	#endif /* TIM_BREAK_INPUT_SUPPORT */
AnnaBridge	172:65be27845400	420	HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
AnnaBridge	172:65be27845400	421	HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
AnnaBridge	172:65be27845400	422	HAL_StatusTypeDef HAL_TIMEx_TISelection(TIM_HandleTypeDef *htim, uint32_t TISelection, uint32_t Channel);
AnnaBridge	172:65be27845400	423	/**
AnnaBridge	172:65be27845400	424	* @}
AnnaBridge	172:65be27845400	425	*/
AnnaBridge	172:65be27845400	426
AnnaBridge	172:65be27845400	427	/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
AnnaBridge	172:65be27845400	428	* @brief Extended Callbacks functions
AnnaBridge	172:65be27845400	429	* @{
AnnaBridge	172:65be27845400	430	*/
AnnaBridge	172:65be27845400	431	/* Extended Callback **********************************************************/
AnnaBridge	172:65be27845400	432	void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	433	void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	434	void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	435	void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	436	/**
AnnaBridge	172:65be27845400	437	* @}
AnnaBridge	172:65be27845400	438	*/
AnnaBridge	172:65be27845400	439
AnnaBridge	172:65be27845400	440	/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
AnnaBridge	172:65be27845400	441	* @brief Extended Peripheral State functions
AnnaBridge	172:65be27845400	442	* @{
AnnaBridge	172:65be27845400	443	*/
AnnaBridge	172:65be27845400	444	/* Extended Peripheral State functions ***************************************/
AnnaBridge	172:65be27845400	445	HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
AnnaBridge	172:65be27845400	446	/**
AnnaBridge	172:65be27845400	447	* @}
AnnaBridge	172:65be27845400	448	*/
AnnaBridge	172:65be27845400	449
AnnaBridge	172:65be27845400	450	/**
AnnaBridge	172:65be27845400	451	* @}
AnnaBridge	172:65be27845400	452	*/
AnnaBridge	172:65be27845400	453	/* End of exported functions -------------------------------------------------*/
AnnaBridge	172:65be27845400	454
AnnaBridge	172:65be27845400	455	/* Private functions----------------------------------------------------------*/
AnnaBridge	172:65be27845400	456	/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
AnnaBridge	172:65be27845400	457	* @{
AnnaBridge	172:65be27845400	458	*/
AnnaBridge	172:65be27845400	459	void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
AnnaBridge	172:65be27845400	460	void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma);
AnnaBridge	172:65be27845400	461	/**
AnnaBridge	172:65be27845400	462	* @}
AnnaBridge	172:65be27845400	463	*/
AnnaBridge	172:65be27845400	464	/* End of private functions --------------------------------------------------*/
AnnaBridge	172:65be27845400	465
AnnaBridge	172:65be27845400	466	/**
AnnaBridge	172:65be27845400	467	* @}
AnnaBridge	172:65be27845400	468	*/
AnnaBridge	172:65be27845400	469
AnnaBridge	172:65be27845400	470	/**
AnnaBridge	172:65be27845400	471	* @}
AnnaBridge	172:65be27845400	472	*/
AnnaBridge	172:65be27845400	473
AnnaBridge	172:65be27845400	474	#ifdef __cplusplus
AnnaBridge	172:65be27845400	475	}
AnnaBridge	172:65be27845400	476	#endif
AnnaBridge	172:65be27845400	477
AnnaBridge	172:65be27845400	478
AnnaBridge	172:65be27845400	479	#endif /* STM32H7xx_HAL_TIM_EX_H */
AnnaBridge	172:65be27845400	480
AnnaBridge	172:65be27845400	481	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/