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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_hal_nor.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32h7xx_hal_nor.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of NOR HAL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 172:65be27845400 10 *
AnnaBridge 172:65be27845400 11 * This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge 172:65be27845400 12 * the "License"; You may not use this file except in compliance with the
AnnaBridge 172:65be27845400 13 * License. You may obtain a copy of the License at:
AnnaBridge 172:65be27845400 14 * opensource.org/licenses/BSD-3-Clause
AnnaBridge 172:65be27845400 15 *
AnnaBridge 172:65be27845400 16 ******************************************************************************
AnnaBridge 172:65be27845400 17 */
AnnaBridge 172:65be27845400 18
AnnaBridge 172:65be27845400 19 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 20 #ifndef STM32H7xx_HAL_NOR_H
AnnaBridge 172:65be27845400 21 #define STM32H7xx_HAL_NOR_H
AnnaBridge 172:65be27845400 22
AnnaBridge 172:65be27845400 23 #ifdef __cplusplus
AnnaBridge 172:65be27845400 24 extern "C" {
AnnaBridge 172:65be27845400 25 #endif
AnnaBridge 172:65be27845400 26
AnnaBridge 172:65be27845400 27
AnnaBridge 172:65be27845400 28 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 29 #include "stm32h7xx_ll_fmc.h"
AnnaBridge 172:65be27845400 30
AnnaBridge 172:65be27845400 31
AnnaBridge 172:65be27845400 32 /** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge 172:65be27845400 33 * @{
AnnaBridge 172:65be27845400 34 */
AnnaBridge 172:65be27845400 35
AnnaBridge 172:65be27845400 36 /** @addtogroup NOR
AnnaBridge 172:65be27845400 37 * @{
AnnaBridge 172:65be27845400 38 */
AnnaBridge 172:65be27845400 39
AnnaBridge 172:65be27845400 40 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 172:65be27845400 41 /** @defgroup NOR_Exported_Types NOR Exported Types
AnnaBridge 172:65be27845400 42 * @{
AnnaBridge 172:65be27845400 43 */
AnnaBridge 172:65be27845400 44
AnnaBridge 172:65be27845400 45 /**
AnnaBridge 172:65be27845400 46 * @brief HAL SRAM State structures definition
AnnaBridge 172:65be27845400 47 */
AnnaBridge 172:65be27845400 48 typedef enum
AnnaBridge 172:65be27845400 49 {
AnnaBridge 172:65be27845400 50 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
AnnaBridge 172:65be27845400 51 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
AnnaBridge 172:65be27845400 52 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
AnnaBridge 172:65be27845400 53 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
AnnaBridge 172:65be27845400 54 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
AnnaBridge 172:65be27845400 55 } HAL_NOR_StateTypeDef;
AnnaBridge 172:65be27845400 56
AnnaBridge 172:65be27845400 57 /**
AnnaBridge 172:65be27845400 58 * @brief FMC NOR Status typedef
AnnaBridge 172:65be27845400 59 */
AnnaBridge 172:65be27845400 60 typedef enum
AnnaBridge 172:65be27845400 61 {
AnnaBridge 172:65be27845400 62 HAL_NOR_STATUS_SUCCESS = 0U,
AnnaBridge 172:65be27845400 63 HAL_NOR_STATUS_ONGOING,
AnnaBridge 172:65be27845400 64 HAL_NOR_STATUS_ERROR,
AnnaBridge 172:65be27845400 65 HAL_NOR_STATUS_TIMEOUT
AnnaBridge 172:65be27845400 66 } HAL_NOR_StatusTypeDef;
AnnaBridge 172:65be27845400 67
AnnaBridge 172:65be27845400 68 /**
AnnaBridge 172:65be27845400 69 * @brief FMC NOR ID typedef
AnnaBridge 172:65be27845400 70 */
AnnaBridge 172:65be27845400 71 typedef struct
AnnaBridge 172:65be27845400 72 {
AnnaBridge 172:65be27845400 73 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
AnnaBridge 172:65be27845400 74
AnnaBridge 172:65be27845400 75 uint16_t Device_Code1;
AnnaBridge 172:65be27845400 76
AnnaBridge 172:65be27845400 77 uint16_t Device_Code2;
AnnaBridge 172:65be27845400 78
AnnaBridge 172:65be27845400 79 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
AnnaBridge 172:65be27845400 80 These codes can be accessed by performing read operations with specific
AnnaBridge 172:65be27845400 81 control signals and addresses set.They can also be accessed by issuing
AnnaBridge 172:65be27845400 82 an Auto Select command */
AnnaBridge 172:65be27845400 83 } NOR_IDTypeDef;
AnnaBridge 172:65be27845400 84
AnnaBridge 172:65be27845400 85 /**
AnnaBridge 172:65be27845400 86 * @brief FMC NOR CFI typedef
AnnaBridge 172:65be27845400 87 */
AnnaBridge 172:65be27845400 88 typedef struct
AnnaBridge 172:65be27845400 89 {
AnnaBridge 172:65be27845400 90 /*!< Defines the information stored in the memory's Common flash interface
AnnaBridge 172:65be27845400 91 which contains a description of various electrical and timing parameters,
AnnaBridge 172:65be27845400 92 density information and functions supported by the memory */
AnnaBridge 172:65be27845400 93
AnnaBridge 172:65be27845400 94 uint16_t CFI_1;
AnnaBridge 172:65be27845400 95
AnnaBridge 172:65be27845400 96 uint16_t CFI_2;
AnnaBridge 172:65be27845400 97
AnnaBridge 172:65be27845400 98 uint16_t CFI_3;
AnnaBridge 172:65be27845400 99
AnnaBridge 172:65be27845400 100 uint16_t CFI_4;
AnnaBridge 172:65be27845400 101 } NOR_CFITypeDef;
AnnaBridge 172:65be27845400 102
AnnaBridge 172:65be27845400 103 /**
AnnaBridge 172:65be27845400 104 * @brief NOR handle Structure definition
AnnaBridge 172:65be27845400 105 */
AnnaBridge 172:65be27845400 106 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 107 typedef struct __NOR_HandleTypeDef
AnnaBridge 172:65be27845400 108 #else
AnnaBridge 172:65be27845400 109 typedef struct
AnnaBridge 172:65be27845400 110 #endif /* USE_HAL_NOR_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 111
AnnaBridge 172:65be27845400 112 {
AnnaBridge 172:65be27845400 113 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 172:65be27845400 114
AnnaBridge 172:65be27845400 115 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 172:65be27845400 116
AnnaBridge 172:65be27845400 117 FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
AnnaBridge 172:65be27845400 118
AnnaBridge 172:65be27845400 119 HAL_LockTypeDef Lock; /*!< NOR locking object */
AnnaBridge 172:65be27845400 120
AnnaBridge 172:65be27845400 121 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
AnnaBridge 172:65be27845400 122
AnnaBridge 172:65be27845400 123 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 124 void (* MspInitCallback) ( struct __NOR_HandleTypeDef * hnor); /*!< NOR Msp Init callback */
AnnaBridge 172:65be27845400 125 void (* MspDeInitCallback) ( struct __NOR_HandleTypeDef * hnor); /*!< NOR Msp DeInit callback */
AnnaBridge 172:65be27845400 126 #endif
AnnaBridge 172:65be27845400 127 } NOR_HandleTypeDef;
AnnaBridge 172:65be27845400 128
AnnaBridge 172:65be27845400 129 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 130 /**
AnnaBridge 172:65be27845400 131 * @brief HAL NOR Callback ID enumeration definition
AnnaBridge 172:65be27845400 132 */
AnnaBridge 172:65be27845400 133 typedef enum
AnnaBridge 172:65be27845400 134 {
AnnaBridge 172:65be27845400 135 HAL_NOR_MSP_INIT_CB_ID = 0x00U, /*!< NOR MspInit Callback ID */
AnnaBridge 172:65be27845400 136 HAL_NOR_MSP_DEINIT_CB_ID = 0x01U /*!< NOR MspDeInit Callback ID */
AnnaBridge 172:65be27845400 137 }HAL_NOR_CallbackIDTypeDef;
AnnaBridge 172:65be27845400 138
AnnaBridge 172:65be27845400 139 /**
AnnaBridge 172:65be27845400 140 * @brief HAL NOR Callback pointer definition
AnnaBridge 172:65be27845400 141 */
AnnaBridge 172:65be27845400 142 typedef void (*pNOR_CallbackTypeDef)(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 143 #endif
AnnaBridge 172:65be27845400 144 /**
AnnaBridge 172:65be27845400 145 * @}
AnnaBridge 172:65be27845400 146 */
AnnaBridge 172:65be27845400 147
AnnaBridge 172:65be27845400 148 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 149 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 150 /** @defgroup NOR_Exported_Macros NOR Exported Macros
AnnaBridge 172:65be27845400 151 * @{
AnnaBridge 172:65be27845400 152 */
AnnaBridge 172:65be27845400 153 /** @brief Reset NOR handle state
AnnaBridge 172:65be27845400 154 * @param __HANDLE__ specifies the NOR handle.
AnnaBridge 172:65be27845400 155 * @retval None
AnnaBridge 172:65be27845400 156 */
AnnaBridge 172:65be27845400 157 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 158 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) do { \
AnnaBridge 172:65be27845400 159 (__HANDLE__)->State = HAL_NOR_STATE_RESET; \
AnnaBridge 172:65be27845400 160 (__HANDLE__)->MspInitCallback = NULL; \
AnnaBridge 172:65be27845400 161 (__HANDLE__)->MspDeInitCallback = NULL; \
AnnaBridge 172:65be27845400 162 } while(0)
AnnaBridge 172:65be27845400 163 #else
AnnaBridge 172:65be27845400 164 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
AnnaBridge 172:65be27845400 165 #endif
AnnaBridge 172:65be27845400 166 /**
AnnaBridge 172:65be27845400 167 * @}
AnnaBridge 172:65be27845400 168 */
AnnaBridge 172:65be27845400 169
AnnaBridge 172:65be27845400 170 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 171 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
AnnaBridge 172:65be27845400 172 * @{
AnnaBridge 172:65be27845400 173 */
AnnaBridge 172:65be27845400 174
AnnaBridge 172:65be27845400 175 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 172:65be27845400 176 * @{
AnnaBridge 172:65be27845400 177 */
AnnaBridge 172:65be27845400 178
AnnaBridge 172:65be27845400 179 /* Initialization/de-initialization functions ********************************/
AnnaBridge 172:65be27845400 180 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 172:65be27845400 181 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 182 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 183 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 184 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
AnnaBridge 172:65be27845400 185 /**
AnnaBridge 172:65be27845400 186 * @}
AnnaBridge 172:65be27845400 187 */
AnnaBridge 172:65be27845400 188
AnnaBridge 172:65be27845400 189 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
AnnaBridge 172:65be27845400 190 * @{
AnnaBridge 172:65be27845400 191 */
AnnaBridge 172:65be27845400 192
AnnaBridge 172:65be27845400 193 /* I/O operation functions ***************************************************/
AnnaBridge 172:65be27845400 194 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
AnnaBridge 172:65be27845400 195 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 196 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
AnnaBridge 172:65be27845400 197 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
AnnaBridge 172:65be27845400 198
AnnaBridge 172:65be27845400 199 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
AnnaBridge 172:65be27845400 200 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
AnnaBridge 172:65be27845400 201
AnnaBridge 172:65be27845400 202 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
AnnaBridge 172:65be27845400 203 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
AnnaBridge 172:65be27845400 204 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
AnnaBridge 172:65be27845400 205
AnnaBridge 172:65be27845400 206 #if (USE_HAL_NOR_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 207 /* NOR callback registering/unregistering */
AnnaBridge 172:65be27845400 208 HAL_StatusTypeDef HAL_NOR_RegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId, pNOR_CallbackTypeDef pCallback);
AnnaBridge 172:65be27845400 209 HAL_StatusTypeDef HAL_NOR_UnRegisterCallback(NOR_HandleTypeDef *hnor, HAL_NOR_CallbackIDTypeDef CallbackId);
AnnaBridge 172:65be27845400 210 #endif
AnnaBridge 172:65be27845400 211 /**
AnnaBridge 172:65be27845400 212 * @}
AnnaBridge 172:65be27845400 213 */
AnnaBridge 172:65be27845400 214
AnnaBridge 172:65be27845400 215 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
AnnaBridge 172:65be27845400 216 * @{
AnnaBridge 172:65be27845400 217 */
AnnaBridge 172:65be27845400 218
AnnaBridge 172:65be27845400 219 /* NOR Control functions *****************************************************/
AnnaBridge 172:65be27845400 220 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 221 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 222 /**
AnnaBridge 172:65be27845400 223 * @}
AnnaBridge 172:65be27845400 224 */
AnnaBridge 172:65be27845400 225
AnnaBridge 172:65be27845400 226 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
AnnaBridge 172:65be27845400 227 * @{
AnnaBridge 172:65be27845400 228 */
AnnaBridge 172:65be27845400 229
AnnaBridge 172:65be27845400 230 /* NOR State functions ********************************************************/
AnnaBridge 172:65be27845400 231 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
AnnaBridge 172:65be27845400 232 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
AnnaBridge 172:65be27845400 233 /**
AnnaBridge 172:65be27845400 234 * @}
AnnaBridge 172:65be27845400 235 */
AnnaBridge 172:65be27845400 236
AnnaBridge 172:65be27845400 237 /**
AnnaBridge 172:65be27845400 238 * @}
AnnaBridge 172:65be27845400 239 */
AnnaBridge 172:65be27845400 240
AnnaBridge 172:65be27845400 241 /* Private types -------------------------------------------------------------*/
AnnaBridge 172:65be27845400 242 /* Private variables ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 243 /* Private constants ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 244 /** @defgroup NOR_Private_Constants NOR Private Constants
AnnaBridge 172:65be27845400 245 * @{
AnnaBridge 172:65be27845400 246 */
AnnaBridge 172:65be27845400 247 /* NOR device IDs addresses */
AnnaBridge 172:65be27845400 248 #define MC_ADDRESS ((uint16_t)0x0000U)
AnnaBridge 172:65be27845400 249 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001U)
AnnaBridge 172:65be27845400 250 #define DEVICE_CODE2_ADDR ((uint16_t)0x000EU)
AnnaBridge 172:65be27845400 251 #define DEVICE_CODE3_ADDR ((uint16_t)0x000FU)
AnnaBridge 172:65be27845400 252
AnnaBridge 172:65be27845400 253 /* NOR CFI IDs addresses */
AnnaBridge 172:65be27845400 254 #define CFI1_ADDRESS ((uint16_t)0x61U)
AnnaBridge 172:65be27845400 255 #define CFI2_ADDRESS ((uint16_t)0x62U)
AnnaBridge 172:65be27845400 256 #define CFI3_ADDRESS ((uint16_t)0x63U)
AnnaBridge 172:65be27845400 257 #define CFI4_ADDRESS ((uint16_t)0x64U)
AnnaBridge 172:65be27845400 258
AnnaBridge 172:65be27845400 259 /* NOR operation wait timeout */
AnnaBridge 172:65be27845400 260 #define NOR_TMEOUT ((uint16_t)0xFFFFU)
AnnaBridge 172:65be27845400 261
AnnaBridge 172:65be27845400 262 /* NOR memory data width */
AnnaBridge 172:65be27845400 263 #define NOR_MEMORY_8B ((uint8_t)0x0U)
AnnaBridge 172:65be27845400 264 #define NOR_MEMORY_16B ((uint8_t)0x1U)
AnnaBridge 172:65be27845400 265
AnnaBridge 172:65be27845400 266 /* NOR memory device read/write start address */
AnnaBridge 172:65be27845400 267 #define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000U)
AnnaBridge 172:65be27845400 268 #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000U)
AnnaBridge 172:65be27845400 269 #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000U)
AnnaBridge 172:65be27845400 270 #define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000U)
AnnaBridge 172:65be27845400 271 /**
AnnaBridge 172:65be27845400 272 * @}
AnnaBridge 172:65be27845400 273 */
AnnaBridge 172:65be27845400 274
AnnaBridge 172:65be27845400 275 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 276 /** @defgroup NOR_Private_Macros NOR Private Macros
AnnaBridge 172:65be27845400 277 * @{
AnnaBridge 172:65be27845400 278 */
AnnaBridge 172:65be27845400 279 /**
AnnaBridge 172:65be27845400 280 * @brief NOR memory address shifting.
AnnaBridge 172:65be27845400 281 * @param __NOR_ADDRESS NOR base address
AnnaBridge 172:65be27845400 282 * @param __NOR_MEMORY_WIDTH_ NOR memory width
AnnaBridge 172:65be27845400 283 * @param __ADDRESS__ NOR memory address
AnnaBridge 172:65be27845400 284 * @retval NOR shifted address value
AnnaBridge 172:65be27845400 285 */
AnnaBridge 172:65be27845400 286 #define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
AnnaBridge 172:65be27845400 287 ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
AnnaBridge 172:65be27845400 288 ((uint32_t)((__NOR_ADDRESS) + (2U * (__ADDRESS__)))): \
AnnaBridge 172:65be27845400 289 ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
AnnaBridge 172:65be27845400 290
AnnaBridge 172:65be27845400 291 /**
AnnaBridge 172:65be27845400 292 * @brief NOR memory write data to specified address.
AnnaBridge 172:65be27845400 293 * @param __ADDRESS__ NOR memory address
AnnaBridge 172:65be27845400 294 * @param __DATA__ Data to write
AnnaBridge 172:65be27845400 295 * @retval None
AnnaBridge 172:65be27845400 296 */
AnnaBridge 172:65be27845400 297 #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
AnnaBridge 172:65be27845400 298 (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
AnnaBridge 172:65be27845400 299 __DSB(); \
AnnaBridge 172:65be27845400 300 } while(0)
AnnaBridge 172:65be27845400 301
AnnaBridge 172:65be27845400 302 /**
AnnaBridge 172:65be27845400 303 * @}
AnnaBridge 172:65be27845400 304 */
AnnaBridge 172:65be27845400 305
AnnaBridge 172:65be27845400 306 /**
AnnaBridge 172:65be27845400 307 * @}
AnnaBridge 172:65be27845400 308 */
AnnaBridge 172:65be27845400 309
AnnaBridge 172:65be27845400 310 /**
AnnaBridge 172:65be27845400 311 * @}
AnnaBridge 172:65be27845400 312 */
AnnaBridge 172:65be27845400 313
AnnaBridge 172:65be27845400 314
AnnaBridge 172:65be27845400 315 #ifdef __cplusplus
AnnaBridge 172:65be27845400 316 }
AnnaBridge 172:65be27845400 317 #endif
AnnaBridge 172:65be27845400 318
AnnaBridge 172:65be27845400 319 #endif /* STM32H7xx_HAL_NOR_H */
AnnaBridge 172:65be27845400 320
AnnaBridge 172:65be27845400 321 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/