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Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32h7xx_hal_lptim.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of LPTIM HAL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
AnnaBridge 172:65be27845400 10 * All rights reserved.</center></h2>
AnnaBridge 172:65be27845400 11 *
AnnaBridge 172:65be27845400 12 * This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge 172:65be27845400 13 * the "License"; You may not use this file except in compliance with the
AnnaBridge 172:65be27845400 14 * License. You may obtain a copy of the License at:
AnnaBridge 172:65be27845400 15 * opensource.org/licenses/BSD-3-Clause
AnnaBridge 172:65be27845400 16 * ******************************************************************************
AnnaBridge 172:65be27845400 17 */
AnnaBridge 172:65be27845400 18
AnnaBridge 172:65be27845400 19 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 20 #ifndef STM32H7xx_HAL_LPTIM_H
AnnaBridge 172:65be27845400 21 #define STM32H7xx_HAL_LPTIM_H
AnnaBridge 172:65be27845400 22
AnnaBridge 172:65be27845400 23 #ifdef __cplusplus
AnnaBridge 172:65be27845400 24 extern "C" {
AnnaBridge 172:65be27845400 25 #endif
AnnaBridge 172:65be27845400 26
AnnaBridge 172:65be27845400 27 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 28 #include "stm32h7xx_hal_def.h"
AnnaBridge 172:65be27845400 29
AnnaBridge 172:65be27845400 30 /** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge 172:65be27845400 31 * @{
AnnaBridge 172:65be27845400 32 */
AnnaBridge 172:65be27845400 33
AnnaBridge 172:65be27845400 34 #if defined (LPTIM1) || defined (LPTIM2) || defined (LPTIM3) || defined (LPTIM4) || defined (LPTIM5)
AnnaBridge 172:65be27845400 35
AnnaBridge 172:65be27845400 36 /** @addtogroup LPTIM
AnnaBridge 172:65be27845400 37 * @{
AnnaBridge 172:65be27845400 38 */
AnnaBridge 172:65be27845400 39
AnnaBridge 172:65be27845400 40 /* Exported types ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 41 /** @defgroup LPTIM_Exported_Types LPTIM Exported Types
AnnaBridge 172:65be27845400 42 * @{
AnnaBridge 172:65be27845400 43 */
AnnaBridge 172:65be27845400 44
AnnaBridge 172:65be27845400 45 /**
AnnaBridge 172:65be27845400 46 * @brief LPTIM Clock configuration definition
AnnaBridge 172:65be27845400 47 */
AnnaBridge 172:65be27845400 48 typedef struct
AnnaBridge 172:65be27845400 49 {
AnnaBridge 172:65be27845400 50 uint32_t Source; /*!< Selects the clock source.
AnnaBridge 172:65be27845400 51 This parameter can be a value of @ref LPTIM_Clock_Source */
AnnaBridge 172:65be27845400 52
AnnaBridge 172:65be27845400 53 uint32_t Prescaler; /*!< Specifies the counter clock Prescaler.
AnnaBridge 172:65be27845400 54 This parameter can be a value of @ref LPTIM_Clock_Prescaler */
AnnaBridge 172:65be27845400 55
AnnaBridge 172:65be27845400 56 } LPTIM_ClockConfigTypeDef;
AnnaBridge 172:65be27845400 57
AnnaBridge 172:65be27845400 58 /**
AnnaBridge 172:65be27845400 59 * @brief LPTIM Clock configuration definition
AnnaBridge 172:65be27845400 60 */
AnnaBridge 172:65be27845400 61 typedef struct
AnnaBridge 172:65be27845400 62 {
AnnaBridge 172:65be27845400 63 uint32_t Polarity; /*!< Selects the polarity of the active edge for the counter unit
AnnaBridge 172:65be27845400 64 if the ULPTIM input is selected.
AnnaBridge 172:65be27845400 65 Note: This parameter is used only when Ultra low power clock source is used.
AnnaBridge 172:65be27845400 66 Note: If the polarity is configured on 'both edges', an auxiliary clock
AnnaBridge 172:65be27845400 67 (one of the Low power oscillator) must be active.
AnnaBridge 172:65be27845400 68 This parameter can be a value of @ref LPTIM_Clock_Polarity */
AnnaBridge 172:65be27845400 69
AnnaBridge 172:65be27845400 70 uint32_t SampleTime; /*!< Selects the clock sampling time to configure the clock glitch filter.
AnnaBridge 172:65be27845400 71 Note: This parameter is used only when Ultra low power clock source is used.
AnnaBridge 172:65be27845400 72 This parameter can be a value of @ref LPTIM_Clock_Sample_Time */
AnnaBridge 172:65be27845400 73
AnnaBridge 172:65be27845400 74 } LPTIM_ULPClockConfigTypeDef;
AnnaBridge 172:65be27845400 75
AnnaBridge 172:65be27845400 76 /**
AnnaBridge 172:65be27845400 77 * @brief LPTIM Trigger configuration definition
AnnaBridge 172:65be27845400 78 */
AnnaBridge 172:65be27845400 79 typedef struct
AnnaBridge 172:65be27845400 80 {
AnnaBridge 172:65be27845400 81 uint32_t Source; /*!< Selects the Trigger source.
AnnaBridge 172:65be27845400 82 This parameter can be a value of @ref LPTIM_Trigger_Source */
AnnaBridge 172:65be27845400 83
AnnaBridge 172:65be27845400 84 uint32_t ActiveEdge; /*!< Selects the Trigger active edge.
AnnaBridge 172:65be27845400 85 Note: This parameter is used only when an external trigger is used.
AnnaBridge 172:65be27845400 86 This parameter can be a value of @ref LPTIM_External_Trigger_Polarity */
AnnaBridge 172:65be27845400 87
AnnaBridge 172:65be27845400 88 uint32_t SampleTime; /*!< Selects the trigger sampling time to configure the clock glitch filter.
AnnaBridge 172:65be27845400 89 Note: This parameter is used only when an external trigger is used.
AnnaBridge 172:65be27845400 90 This parameter can be a value of @ref LPTIM_Trigger_Sample_Time */
AnnaBridge 172:65be27845400 91 } LPTIM_TriggerConfigTypeDef;
AnnaBridge 172:65be27845400 92
AnnaBridge 172:65be27845400 93 /**
AnnaBridge 172:65be27845400 94 * @brief LPTIM Initialization Structure definition
AnnaBridge 172:65be27845400 95 */
AnnaBridge 172:65be27845400 96 typedef struct
AnnaBridge 172:65be27845400 97 {
AnnaBridge 172:65be27845400 98 LPTIM_ClockConfigTypeDef Clock; /*!< Specifies the clock parameters */
AnnaBridge 172:65be27845400 99
AnnaBridge 172:65be27845400 100 LPTIM_ULPClockConfigTypeDef UltraLowPowerClock; /*!< Specifies the Ultra Low Power clock parameters */
AnnaBridge 172:65be27845400 101
AnnaBridge 172:65be27845400 102 LPTIM_TriggerConfigTypeDef Trigger; /*!< Specifies the Trigger parameters */
AnnaBridge 172:65be27845400 103
AnnaBridge 172:65be27845400 104 uint32_t OutputPolarity; /*!< Specifies the Output polarity.
AnnaBridge 172:65be27845400 105 This parameter can be a value of @ref LPTIM_Output_Polarity */
AnnaBridge 172:65be27845400 106
AnnaBridge 172:65be27845400 107 uint32_t UpdateMode; /*!< Specifies whether the update of the autoreload and the compare
AnnaBridge 172:65be27845400 108 values is done immediately or after the end of current period.
AnnaBridge 172:65be27845400 109 This parameter can be a value of @ref LPTIM_Updating_Mode */
AnnaBridge 172:65be27845400 110
AnnaBridge 172:65be27845400 111 uint32_t CounterSource; /*!< Specifies whether the counter is incremented each internal event
AnnaBridge 172:65be27845400 112 or each external event.
AnnaBridge 172:65be27845400 113 This parameter can be a value of @ref LPTIM_Counter_Source */
AnnaBridge 172:65be27845400 114
AnnaBridge 172:65be27845400 115 uint32_t Input1Source; /*!< Specifies source selected for input1 (GPIO or comparator output).
AnnaBridge 172:65be27845400 116 This parameter can be a value of @ref LPTIM_Input1_Source */
AnnaBridge 172:65be27845400 117
AnnaBridge 172:65be27845400 118 uint32_t Input2Source; /*!< Specifies source selected for input2 (GPIO or comparator output).
AnnaBridge 172:65be27845400 119 Note: This parameter is used only for encoder feature so is used only
AnnaBridge 172:65be27845400 120 for LPTIM1 instance.
AnnaBridge 172:65be27845400 121 This parameter can be a value of @ref LPTIM_Input2_Source */
AnnaBridge 172:65be27845400 122 } LPTIM_InitTypeDef;
AnnaBridge 172:65be27845400 123
AnnaBridge 172:65be27845400 124 /**
AnnaBridge 172:65be27845400 125 * @brief HAL LPTIM State structure definition
AnnaBridge 172:65be27845400 126 */
AnnaBridge 172:65be27845400 127 typedef enum
AnnaBridge 172:65be27845400 128 {
AnnaBridge 172:65be27845400 129 HAL_LPTIM_STATE_RESET = 0x00U, /*!< Peripheral not yet initialized or disabled */
AnnaBridge 172:65be27845400 130 HAL_LPTIM_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 172:65be27845400 131 HAL_LPTIM_STATE_BUSY = 0x02U, /*!< An internal process is ongoing */
AnnaBridge 172:65be27845400 132 HAL_LPTIM_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
AnnaBridge 172:65be27845400 133 HAL_LPTIM_STATE_ERROR = 0x04U /*!< Internal Process is ongoing */
AnnaBridge 172:65be27845400 134 } HAL_LPTIM_StateTypeDef;
AnnaBridge 172:65be27845400 135
AnnaBridge 172:65be27845400 136 /**
AnnaBridge 172:65be27845400 137 * @brief LPTIM handle Structure definition
AnnaBridge 172:65be27845400 138 */
AnnaBridge 172:65be27845400 139 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 140 typedef struct __LPTIM_HandleTypeDef
AnnaBridge 172:65be27845400 141 #else
AnnaBridge 172:65be27845400 142 typedef struct
AnnaBridge 172:65be27845400 143 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 144 {
AnnaBridge 172:65be27845400 145 LPTIM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 172:65be27845400 146
AnnaBridge 172:65be27845400 147 LPTIM_InitTypeDef Init; /*!< LPTIM required parameters */
AnnaBridge 172:65be27845400 148
AnnaBridge 172:65be27845400 149 HAL_StatusTypeDef Status; /*!< LPTIM peripheral status */
AnnaBridge 172:65be27845400 150
AnnaBridge 172:65be27845400 151 HAL_LockTypeDef Lock; /*!< LPTIM locking object */
AnnaBridge 172:65be27845400 152
AnnaBridge 172:65be27845400 153 __IO HAL_LPTIM_StateTypeDef State; /*!< LPTIM peripheral state */
AnnaBridge 172:65be27845400 154
AnnaBridge 172:65be27845400 155 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 156 void (* MspInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp Init Callback */
AnnaBridge 172:65be27845400 157 void (* MspDeInitCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< LPTIM Base Msp DeInit Callback */
AnnaBridge 172:65be27845400 158 void (* CompareMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare match Callback */
AnnaBridge 172:65be27845400 159 void (* AutoReloadMatchCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload match Callback */
AnnaBridge 172:65be27845400 160 void (* TriggerCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< External trigger event detection Callback */
AnnaBridge 172:65be27845400 161 void (* CompareWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Compare register write complete Callback */
AnnaBridge 172:65be27845400 162 void (* AutoReloadWriteCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Auto-reload register write complete Callback */
AnnaBridge 172:65be27845400 163 void (* DirectionUpCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Up-counting direction change Callback */
AnnaBridge 172:65be27845400 164 void (* DirectionDownCallback)(struct __LPTIM_HandleTypeDef *hlptim); /*!< Down-counting direction change Callback */
AnnaBridge 172:65be27845400 165 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 166 } LPTIM_HandleTypeDef;
AnnaBridge 172:65be27845400 167
AnnaBridge 172:65be27845400 168 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 169 /**
AnnaBridge 172:65be27845400 170 * @brief HAL LPTIM Callback ID enumeration definition
AnnaBridge 172:65be27845400 171 */
AnnaBridge 172:65be27845400 172 typedef enum
AnnaBridge 172:65be27845400 173 {
AnnaBridge 172:65be27845400 174 HAL_LPTIM_MSPINIT_CB_ID = 0x00U, /*!< LPTIM Base Msp Init Callback ID */
AnnaBridge 172:65be27845400 175 HAL_LPTIM_MSPDEINIT_CB_ID = 0x01U, /*!< LPTIM Base Msp DeInit Callback ID */
AnnaBridge 172:65be27845400 176 HAL_LPTIM_COMPARE_MATCH_CB_ID = 0x02U, /*!< Compare match Callback ID */
AnnaBridge 172:65be27845400 177 HAL_LPTIM_AUTORELOAD_MATCH_CB_ID = 0x03U, /*!< Auto-reload match Callback ID */
AnnaBridge 172:65be27845400 178 HAL_LPTIM_TRIGGER_CB_ID = 0x04U, /*!< External trigger event detection Callback ID */
AnnaBridge 172:65be27845400 179 HAL_LPTIM_COMPARE_WRITE_CB_ID = 0x05U, /*!< Compare register write complete Callback ID */
AnnaBridge 172:65be27845400 180 HAL_LPTIM_AUTORELOAD_WRITE_CB_ID = 0x06U, /*!< Auto-reload register write complete Callback ID */
AnnaBridge 172:65be27845400 181 HAL_LPTIM_DIRECTION_UP_CB_ID = 0x07U, /*!< Up-counting direction change Callback ID */
AnnaBridge 172:65be27845400 182 HAL_LPTIM_DIRECTION_DOWN_CB_ID = 0x08U, /*!< Down-counting direction change Callback ID */
AnnaBridge 172:65be27845400 183 } HAL_LPTIM_CallbackIDTypeDef;
AnnaBridge 172:65be27845400 184
AnnaBridge 172:65be27845400 185 /**
AnnaBridge 172:65be27845400 186 * @brief HAL TIM Callback pointer definition
AnnaBridge 172:65be27845400 187 */
AnnaBridge 172:65be27845400 188 typedef void (*pLPTIM_CallbackTypeDef)(LPTIM_HandleTypeDef *hlptim); /*!< pointer to the LPTIM callback function */
AnnaBridge 172:65be27845400 189
AnnaBridge 172:65be27845400 190 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 191 /**
AnnaBridge 172:65be27845400 192 * @}
AnnaBridge 172:65be27845400 193 */
AnnaBridge 172:65be27845400 194
AnnaBridge 172:65be27845400 195 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 196 /** @defgroup LPTIM_Exported_Constants LPTIM Exported Constants
AnnaBridge 172:65be27845400 197 * @{
AnnaBridge 172:65be27845400 198 */
AnnaBridge 172:65be27845400 199
AnnaBridge 172:65be27845400 200 /** @defgroup LPTIM_Clock_Source LPTIM Clock Source
AnnaBridge 172:65be27845400 201 * @{
AnnaBridge 172:65be27845400 202 */
AnnaBridge 172:65be27845400 203 #define LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC 0x00000000U
AnnaBridge 172:65be27845400 204 #define LPTIM_CLOCKSOURCE_ULPTIM LPTIM_CFGR_CKSEL
AnnaBridge 172:65be27845400 205 /**
AnnaBridge 172:65be27845400 206 * @}
AnnaBridge 172:65be27845400 207 */
AnnaBridge 172:65be27845400 208
AnnaBridge 172:65be27845400 209 /** @defgroup LPTIM_Clock_Prescaler LPTIM Clock Prescaler
AnnaBridge 172:65be27845400 210 * @{
AnnaBridge 172:65be27845400 211 */
AnnaBridge 172:65be27845400 212 #define LPTIM_PRESCALER_DIV1 0x00000000U
AnnaBridge 172:65be27845400 213 #define LPTIM_PRESCALER_DIV2 LPTIM_CFGR_PRESC_0
AnnaBridge 172:65be27845400 214 #define LPTIM_PRESCALER_DIV4 LPTIM_CFGR_PRESC_1
AnnaBridge 172:65be27845400 215 #define LPTIM_PRESCALER_DIV8 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_1)
AnnaBridge 172:65be27845400 216 #define LPTIM_PRESCALER_DIV16 LPTIM_CFGR_PRESC_2
AnnaBridge 172:65be27845400 217 #define LPTIM_PRESCALER_DIV32 (LPTIM_CFGR_PRESC_0 | LPTIM_CFGR_PRESC_2)
AnnaBridge 172:65be27845400 218 #define LPTIM_PRESCALER_DIV64 (LPTIM_CFGR_PRESC_1 | LPTIM_CFGR_PRESC_2)
AnnaBridge 172:65be27845400 219 #define LPTIM_PRESCALER_DIV128 LPTIM_CFGR_PRESC
AnnaBridge 172:65be27845400 220 /**
AnnaBridge 172:65be27845400 221 * @}
AnnaBridge 172:65be27845400 222 */
AnnaBridge 172:65be27845400 223
AnnaBridge 172:65be27845400 224 /** @defgroup LPTIM_Output_Polarity LPTIM Output Polarity
AnnaBridge 172:65be27845400 225 * @{
AnnaBridge 172:65be27845400 226 */
AnnaBridge 172:65be27845400 227
AnnaBridge 172:65be27845400 228 #define LPTIM_OUTPUTPOLARITY_HIGH 0x00000000U
AnnaBridge 172:65be27845400 229 #define LPTIM_OUTPUTPOLARITY_LOW LPTIM_CFGR_WAVPOL
AnnaBridge 172:65be27845400 230 /**
AnnaBridge 172:65be27845400 231 * @}
AnnaBridge 172:65be27845400 232 */
AnnaBridge 172:65be27845400 233
AnnaBridge 172:65be27845400 234 /** @defgroup LPTIM_Clock_Sample_Time LPTIM Clock Sample Time
AnnaBridge 172:65be27845400 235 * @{
AnnaBridge 172:65be27845400 236 */
AnnaBridge 172:65be27845400 237 #define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION 0x00000000U
AnnaBridge 172:65be27845400 238 #define LPTIM_CLOCKSAMPLETIME_2TRANSITIONS LPTIM_CFGR_CKFLT_0
AnnaBridge 172:65be27845400 239 #define LPTIM_CLOCKSAMPLETIME_4TRANSITIONS LPTIM_CFGR_CKFLT_1
AnnaBridge 172:65be27845400 240 #define LPTIM_CLOCKSAMPLETIME_8TRANSITIONS LPTIM_CFGR_CKFLT
AnnaBridge 172:65be27845400 241 /**
AnnaBridge 172:65be27845400 242 * @}
AnnaBridge 172:65be27845400 243 */
AnnaBridge 172:65be27845400 244
AnnaBridge 172:65be27845400 245 /** @defgroup LPTIM_Clock_Polarity LPTIM Clock Polarity
AnnaBridge 172:65be27845400 246 * @{
AnnaBridge 172:65be27845400 247 */
AnnaBridge 172:65be27845400 248 #define LPTIM_CLOCKPOLARITY_RISING 0x00000000U
AnnaBridge 172:65be27845400 249 #define LPTIM_CLOCKPOLARITY_FALLING LPTIM_CFGR_CKPOL_0
AnnaBridge 172:65be27845400 250 #define LPTIM_CLOCKPOLARITY_RISING_FALLING LPTIM_CFGR_CKPOL_1
AnnaBridge 172:65be27845400 251 /**
AnnaBridge 172:65be27845400 252 * @}
AnnaBridge 172:65be27845400 253 */
AnnaBridge 172:65be27845400 254
AnnaBridge 172:65be27845400 255 /** @defgroup LPTIM_Trigger_Source LPTIM Trigger Source
AnnaBridge 172:65be27845400 256 * @{
AnnaBridge 172:65be27845400 257 */
AnnaBridge 172:65be27845400 258 #define LPTIM_TRIGSOURCE_SOFTWARE 0x0000FFFFU
AnnaBridge 172:65be27845400 259 #define LPTIM_TRIGSOURCE_0 0x00000000U
AnnaBridge 172:65be27845400 260 #define LPTIM_TRIGSOURCE_1 LPTIM_CFGR_TRIGSEL_0
AnnaBridge 172:65be27845400 261 #define LPTIM_TRIGSOURCE_2 LPTIM_CFGR_TRIGSEL_1
AnnaBridge 172:65be27845400 262 #define LPTIM_TRIGSOURCE_3 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_1)
AnnaBridge 172:65be27845400 263 #define LPTIM_TRIGSOURCE_4 LPTIM_CFGR_TRIGSEL_2
AnnaBridge 172:65be27845400 264 #define LPTIM_TRIGSOURCE_5 (LPTIM_CFGR_TRIGSEL_0 | LPTIM_CFGR_TRIGSEL_2)
AnnaBridge 172:65be27845400 265 #define LPTIM_TRIGSOURCE_6 (LPTIM_CFGR_TRIGSEL_1 | LPTIM_CFGR_TRIGSEL_2)
AnnaBridge 172:65be27845400 266 #define LPTIM_TRIGSOURCE_7 LPTIM_CFGR_TRIGSEL
AnnaBridge 172:65be27845400 267 /**
AnnaBridge 172:65be27845400 268 * @}
AnnaBridge 172:65be27845400 269 */
AnnaBridge 172:65be27845400 270
AnnaBridge 172:65be27845400 271 /** @defgroup LPTIM_External_Trigger_Polarity LPTIM External Trigger Polarity
AnnaBridge 172:65be27845400 272 * @{
AnnaBridge 172:65be27845400 273 */
AnnaBridge 172:65be27845400 274 #define LPTIM_ACTIVEEDGE_RISING LPTIM_CFGR_TRIGEN_0
AnnaBridge 172:65be27845400 275 #define LPTIM_ACTIVEEDGE_FALLING LPTIM_CFGR_TRIGEN_1
AnnaBridge 172:65be27845400 276 #define LPTIM_ACTIVEEDGE_RISING_FALLING LPTIM_CFGR_TRIGEN
AnnaBridge 172:65be27845400 277 /**
AnnaBridge 172:65be27845400 278 * @}
AnnaBridge 172:65be27845400 279 */
AnnaBridge 172:65be27845400 280
AnnaBridge 172:65be27845400 281 /** @defgroup LPTIM_Trigger_Sample_Time LPTIM Trigger Sample Time
AnnaBridge 172:65be27845400 282 * @{
AnnaBridge 172:65be27845400 283 */
AnnaBridge 172:65be27845400 284 #define LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION 0x00000000U
AnnaBridge 172:65be27845400 285 #define LPTIM_TRIGSAMPLETIME_2TRANSITIONS LPTIM_CFGR_TRGFLT_0
AnnaBridge 172:65be27845400 286 #define LPTIM_TRIGSAMPLETIME_4TRANSITIONS LPTIM_CFGR_TRGFLT_1
AnnaBridge 172:65be27845400 287 #define LPTIM_TRIGSAMPLETIME_8TRANSITIONS LPTIM_CFGR_TRGFLT
AnnaBridge 172:65be27845400 288 /**
AnnaBridge 172:65be27845400 289 * @}
AnnaBridge 172:65be27845400 290 */
AnnaBridge 172:65be27845400 291
AnnaBridge 172:65be27845400 292 /** @defgroup LPTIM_Updating_Mode LPTIM Updating Mode
AnnaBridge 172:65be27845400 293 * @{
AnnaBridge 172:65be27845400 294 */
AnnaBridge 172:65be27845400 295
AnnaBridge 172:65be27845400 296 #define LPTIM_UPDATE_IMMEDIATE 0x00000000U
AnnaBridge 172:65be27845400 297 #define LPTIM_UPDATE_ENDOFPERIOD LPTIM_CFGR_PRELOAD
AnnaBridge 172:65be27845400 298 /**
AnnaBridge 172:65be27845400 299 * @}
AnnaBridge 172:65be27845400 300 */
AnnaBridge 172:65be27845400 301
AnnaBridge 172:65be27845400 302 /** @defgroup LPTIM_Counter_Source LPTIM Counter Source
AnnaBridge 172:65be27845400 303 * @{
AnnaBridge 172:65be27845400 304 */
AnnaBridge 172:65be27845400 305
AnnaBridge 172:65be27845400 306 #define LPTIM_COUNTERSOURCE_INTERNAL 0x00000000U
AnnaBridge 172:65be27845400 307 #define LPTIM_COUNTERSOURCE_EXTERNAL LPTIM_CFGR_COUNTMODE
AnnaBridge 172:65be27845400 308 /**
AnnaBridge 172:65be27845400 309 * @}
AnnaBridge 172:65be27845400 310 */
AnnaBridge 172:65be27845400 311
AnnaBridge 172:65be27845400 312 /** @defgroup LPTIM_Input1_Source LPTIM Input1 Source
AnnaBridge 172:65be27845400 313 * @{
AnnaBridge 172:65be27845400 314 */
AnnaBridge 172:65be27845400 315
AnnaBridge 172:65be27845400 316 #define LPTIM_INPUT1SOURCE_GPIO 0x00000000U /*!< For LPTIM1 and LPTIM2 */
AnnaBridge 172:65be27845400 317 #define LPTIM_INPUT1SOURCE_COMP1 LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM1 and LPTIM2 */
AnnaBridge 172:65be27845400 318 #define LPTIM_INPUT1SOURCE_COMP2 LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM2 */
AnnaBridge 172:65be27845400 319 #define LPTIM_INPUT1SOURCE_COMP1_COMP2 (LPTIM_CFGR2_IN1SEL_1 | LPTIM_CFGR2_IN1SEL_0) /*!< For LPTIM2 */
AnnaBridge 172:65be27845400 320 #define LPTIM_INPUT1SOURCE_NOT_CONNECTED 0x00000000U /*!< For LPTIM3 */
AnnaBridge 172:65be27845400 321 #define LPTIM_INPUT1SOURCE_SAI1_FSA LPTIM_CFGR2_IN1SEL_0 /*!< For LPTIM3 */
AnnaBridge 172:65be27845400 322 #define LPTIM_INPUT1SOURCE_SAI1_FSB LPTIM_CFGR2_IN1SEL_1 /*!< For LPTIM3 */
AnnaBridge 172:65be27845400 323 /**
AnnaBridge 172:65be27845400 324 * @}
AnnaBridge 172:65be27845400 325 */
AnnaBridge 172:65be27845400 326
AnnaBridge 172:65be27845400 327 /** @defgroup LPTIM_Input2_Source LPTIM Input2 Source
AnnaBridge 172:65be27845400 328 * @{
AnnaBridge 172:65be27845400 329 */
AnnaBridge 172:65be27845400 330
AnnaBridge 172:65be27845400 331 #define LPTIM_INPUT2SOURCE_GPIO 0x00000000U /*!< For LPTIM1 */
AnnaBridge 172:65be27845400 332 #define LPTIM_INPUT2SOURCE_COMP2 LPTIM_CFGR2_IN2SEL_0 /*!< For LPTIM1 */
AnnaBridge 172:65be27845400 333 /**
AnnaBridge 172:65be27845400 334 * @}
AnnaBridge 172:65be27845400 335 */
AnnaBridge 172:65be27845400 336
AnnaBridge 172:65be27845400 337 /** @defgroup LPTIM_Flag_Definition LPTIM Flags Definition
AnnaBridge 172:65be27845400 338 * @{
AnnaBridge 172:65be27845400 339 */
AnnaBridge 172:65be27845400 340
AnnaBridge 172:65be27845400 341 #define LPTIM_FLAG_DOWN LPTIM_ISR_DOWN
AnnaBridge 172:65be27845400 342 #define LPTIM_FLAG_UP LPTIM_ISR_UP
AnnaBridge 172:65be27845400 343 #define LPTIM_FLAG_ARROK LPTIM_ISR_ARROK
AnnaBridge 172:65be27845400 344 #define LPTIM_FLAG_CMPOK LPTIM_ISR_CMPOK
AnnaBridge 172:65be27845400 345 #define LPTIM_FLAG_EXTTRIG LPTIM_ISR_EXTTRIG
AnnaBridge 172:65be27845400 346 #define LPTIM_FLAG_ARRM LPTIM_ISR_ARRM
AnnaBridge 172:65be27845400 347 #define LPTIM_FLAG_CMPM LPTIM_ISR_CMPM
AnnaBridge 172:65be27845400 348 /**
AnnaBridge 172:65be27845400 349 * @}
AnnaBridge 172:65be27845400 350 */
AnnaBridge 172:65be27845400 351
AnnaBridge 172:65be27845400 352 /** @defgroup LPTIM_Interrupts_Definition LPTIM Interrupts Definition
AnnaBridge 172:65be27845400 353 * @{
AnnaBridge 172:65be27845400 354 */
AnnaBridge 172:65be27845400 355
AnnaBridge 172:65be27845400 356 #define LPTIM_IT_DOWN LPTIM_IER_DOWNIE
AnnaBridge 172:65be27845400 357 #define LPTIM_IT_UP LPTIM_IER_UPIE
AnnaBridge 172:65be27845400 358 #define LPTIM_IT_ARROK LPTIM_IER_ARROKIE
AnnaBridge 172:65be27845400 359 #define LPTIM_IT_CMPOK LPTIM_IER_CMPOKIE
AnnaBridge 172:65be27845400 360 #define LPTIM_IT_EXTTRIG LPTIM_IER_EXTTRIGIE
AnnaBridge 172:65be27845400 361 #define LPTIM_IT_ARRM LPTIM_IER_ARRMIE
AnnaBridge 172:65be27845400 362 #define LPTIM_IT_CMPM LPTIM_IER_CMPMIE
AnnaBridge 172:65be27845400 363 /**
AnnaBridge 172:65be27845400 364 * @}
AnnaBridge 172:65be27845400 365 */
AnnaBridge 172:65be27845400 366
AnnaBridge 172:65be27845400 367 /**
AnnaBridge 172:65be27845400 368 * @}
AnnaBridge 172:65be27845400 369 */
AnnaBridge 172:65be27845400 370
AnnaBridge 172:65be27845400 371 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 172:65be27845400 372 /** @defgroup LPTIM_Exported_Macros LPTIM Exported Macros
AnnaBridge 172:65be27845400 373 * @{
AnnaBridge 172:65be27845400 374 */
AnnaBridge 172:65be27845400 375
AnnaBridge 172:65be27845400 376 /** @brief Reset LPTIM handle state.
AnnaBridge 172:65be27845400 377 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 378 * @retval None
AnnaBridge 172:65be27845400 379 */
AnnaBridge 172:65be27845400 380 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 381 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) do { \
AnnaBridge 172:65be27845400 382 (__HANDLE__)->State = HAL_LPTIM_STATE_RESET; \
AnnaBridge 172:65be27845400 383 (__HANDLE__)->MspInitCallback = NULL; \
AnnaBridge 172:65be27845400 384 (__HANDLE__)->MspDeInitCallback = NULL; \
AnnaBridge 172:65be27845400 385 } while(0)
AnnaBridge 172:65be27845400 386 #else
AnnaBridge 172:65be27845400 387 #define __HAL_LPTIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LPTIM_STATE_RESET)
AnnaBridge 172:65be27845400 388 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 389
AnnaBridge 172:65be27845400 390 /**
AnnaBridge 172:65be27845400 391 * @brief Enable the LPTIM peripheral.
AnnaBridge 172:65be27845400 392 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 393 * @retval None
AnnaBridge 172:65be27845400 394 */
AnnaBridge 172:65be27845400 395 #define __HAL_LPTIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= (LPTIM_CR_ENABLE))
AnnaBridge 172:65be27845400 396
AnnaBridge 172:65be27845400 397 /**
AnnaBridge 172:65be27845400 398 * @brief Disable the LPTIM peripheral.
AnnaBridge 172:65be27845400 399 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 400 * @note The following sequence is required to solve LPTIM disable HW limitation.
AnnaBridge 172:65be27845400 401 * Please check Errata Sheet ES0335 for more details under "MCU may remain
AnnaBridge 172:65be27845400 402 * stuck in LPTIM interrupt when entering Stop mode" section.
AnnaBridge 172:65be27845400 403 * @retval None
AnnaBridge 172:65be27845400 404 */
AnnaBridge 172:65be27845400 405 #define __HAL_LPTIM_DISABLE(__HANDLE__) LPTIM_Disable(__HANDLE__)
AnnaBridge 172:65be27845400 406
AnnaBridge 172:65be27845400 407 /**
AnnaBridge 172:65be27845400 408 * @brief Start the LPTIM peripheral in Continuous mode.
AnnaBridge 172:65be27845400 409 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 410 * @retval None
AnnaBridge 172:65be27845400 411 */
AnnaBridge 172:65be27845400 412 #define __HAL_LPTIM_START_CONTINUOUS(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_CNTSTRT)
AnnaBridge 172:65be27845400 413 /**
AnnaBridge 172:65be27845400 414 * @brief Start the LPTIM peripheral in single mode.
AnnaBridge 172:65be27845400 415 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 416 * @retval None
AnnaBridge 172:65be27845400 417 */
AnnaBridge 172:65be27845400 418 #define __HAL_LPTIM_START_SINGLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_SNGSTRT)
AnnaBridge 172:65be27845400 419
AnnaBridge 172:65be27845400 420 /**
AnnaBridge 172:65be27845400 421 * @brief Reset the LPTIM Counter register in synchronous mode.
AnnaBridge 172:65be27845400 422 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 423 * @retval None
AnnaBridge 172:65be27845400 424 */
AnnaBridge 172:65be27845400 425 #define __HAL_LPTIM_RESET_COUNTER(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_COUNTRST)
AnnaBridge 172:65be27845400 426
AnnaBridge 172:65be27845400 427 /**
AnnaBridge 172:65be27845400 428 * @brief Reset after read of the LPTIM Counter register in asynchronous mode.
AnnaBridge 172:65be27845400 429 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 430 * @retval None
AnnaBridge 172:65be27845400 431 */
AnnaBridge 172:65be27845400 432 #define __HAL_LPTIM_RESET_COUNTER_AFTERREAD(__HANDLE__) ((__HANDLE__)->Instance->CR |= LPTIM_CR_RSTARE)
AnnaBridge 172:65be27845400 433
AnnaBridge 172:65be27845400 434 /**
AnnaBridge 172:65be27845400 435 * @brief Write the passed parameter in the Autoreload register.
AnnaBridge 172:65be27845400 436 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 437 * @param __VALUE__ Autoreload value
AnnaBridge 172:65be27845400 438 * @retval None
AnnaBridge 172:65be27845400 439 */
AnnaBridge 172:65be27845400 440 #define __HAL_LPTIM_AUTORELOAD_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->ARR = (__VALUE__))
AnnaBridge 172:65be27845400 441
AnnaBridge 172:65be27845400 442 /**
AnnaBridge 172:65be27845400 443 * @brief Write the passed parameter in the Compare register.
AnnaBridge 172:65be27845400 444 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 445 * @param __VALUE__ Compare value
AnnaBridge 172:65be27845400 446 * @retval None
AnnaBridge 172:65be27845400 447 */
AnnaBridge 172:65be27845400 448 #define __HAL_LPTIM_COMPARE_SET(__HANDLE__ , __VALUE__) ((__HANDLE__)->Instance->CMP = (__VALUE__))
AnnaBridge 172:65be27845400 449
AnnaBridge 172:65be27845400 450 /**
AnnaBridge 172:65be27845400 451 * @brief Check whether the specified LPTIM flag is set or not.
AnnaBridge 172:65be27845400 452 * @param __HANDLE__ LPTIM handle
AnnaBridge 172:65be27845400 453 * @param __FLAG__ LPTIM flag to check
AnnaBridge 172:65be27845400 454 * This parameter can be a value of:
AnnaBridge 172:65be27845400 455 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
AnnaBridge 172:65be27845400 456 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
AnnaBridge 172:65be27845400 457 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
AnnaBridge 172:65be27845400 458 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
AnnaBridge 172:65be27845400 459 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
AnnaBridge 172:65be27845400 460 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
AnnaBridge 172:65be27845400 461 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
AnnaBridge 172:65be27845400 462 * @retval The state of the specified flag (SET or RESET).
AnnaBridge 172:65be27845400 463 */
AnnaBridge 172:65be27845400 464 #define __HAL_LPTIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR &(__FLAG__)) == (__FLAG__))
AnnaBridge 172:65be27845400 465
AnnaBridge 172:65be27845400 466 /**
AnnaBridge 172:65be27845400 467 * @brief Clear the specified LPTIM flag.
AnnaBridge 172:65be27845400 468 * @param __HANDLE__ LPTIM handle.
AnnaBridge 172:65be27845400 469 * @param __FLAG__ LPTIM flag to clear.
AnnaBridge 172:65be27845400 470 * This parameter can be a value of:
AnnaBridge 172:65be27845400 471 * @arg LPTIM_FLAG_DOWN : Counter direction change up Flag.
AnnaBridge 172:65be27845400 472 * @arg LPTIM_FLAG_UP : Counter direction change down to up Flag.
AnnaBridge 172:65be27845400 473 * @arg LPTIM_FLAG_ARROK : Autoreload register update OK Flag.
AnnaBridge 172:65be27845400 474 * @arg LPTIM_FLAG_CMPOK : Compare register update OK Flag.
AnnaBridge 172:65be27845400 475 * @arg LPTIM_FLAG_EXTTRIG : External trigger edge event Flag.
AnnaBridge 172:65be27845400 476 * @arg LPTIM_FLAG_ARRM : Autoreload match Flag.
AnnaBridge 172:65be27845400 477 * @arg LPTIM_FLAG_CMPM : Compare match Flag.
AnnaBridge 172:65be27845400 478 * @retval None.
AnnaBridge 172:65be27845400 479 */
AnnaBridge 172:65be27845400 480 #define __HAL_LPTIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 172:65be27845400 481
AnnaBridge 172:65be27845400 482 /**
AnnaBridge 172:65be27845400 483 * @brief Enable the specified LPTIM interrupt.
AnnaBridge 172:65be27845400 484 * @param __HANDLE__ LPTIM handle.
AnnaBridge 172:65be27845400 485 * @param __INTERRUPT__ LPTIM interrupt to set.
AnnaBridge 172:65be27845400 486 * This parameter can be a value of:
AnnaBridge 172:65be27845400 487 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 172:65be27845400 488 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 172:65be27845400 489 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 172:65be27845400 490 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 172:65be27845400 491 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 172:65be27845400 492 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 172:65be27845400 493 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 172:65be27845400 494 * @retval None.
AnnaBridge 172:65be27845400 495 */
AnnaBridge 172:65be27845400 496 #define __HAL_LPTIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
AnnaBridge 172:65be27845400 497
AnnaBridge 172:65be27845400 498 /**
AnnaBridge 172:65be27845400 499 * @brief Disable the specified LPTIM interrupt.
AnnaBridge 172:65be27845400 500 * @param __HANDLE__ LPTIM handle.
AnnaBridge 172:65be27845400 501 * @param __INTERRUPT__ LPTIM interrupt to set.
AnnaBridge 172:65be27845400 502 * This parameter can be a value of:
AnnaBridge 172:65be27845400 503 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 172:65be27845400 504 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 172:65be27845400 505 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 172:65be27845400 506 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 172:65be27845400 507 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 172:65be27845400 508 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 172:65be27845400 509 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 172:65be27845400 510 * @retval None.
AnnaBridge 172:65be27845400 511 */
AnnaBridge 172:65be27845400 512 #define __HAL_LPTIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (~(__INTERRUPT__)))
AnnaBridge 172:65be27845400 513
AnnaBridge 172:65be27845400 514 /**
AnnaBridge 172:65be27845400 515 * @brief Check whether the specified LPTIM interrupt source is enabled or not.
AnnaBridge 172:65be27845400 516 * @param __HANDLE__ LPTIM handle.
AnnaBridge 172:65be27845400 517 * @param __INTERRUPT__ LPTIM interrupt to check.
AnnaBridge 172:65be27845400 518 * This parameter can be a value of:
AnnaBridge 172:65be27845400 519 * @arg LPTIM_IT_DOWN : Counter direction change up Interrupt.
AnnaBridge 172:65be27845400 520 * @arg LPTIM_IT_UP : Counter direction change down to up Interrupt.
AnnaBridge 172:65be27845400 521 * @arg LPTIM_IT_ARROK : Autoreload register update OK Interrupt.
AnnaBridge 172:65be27845400 522 * @arg LPTIM_IT_CMPOK : Compare register update OK Interrupt.
AnnaBridge 172:65be27845400 523 * @arg LPTIM_IT_EXTTRIG : External trigger edge event Interrupt.
AnnaBridge 172:65be27845400 524 * @arg LPTIM_IT_ARRM : Autoreload match Interrupt.
AnnaBridge 172:65be27845400 525 * @arg LPTIM_IT_CMPM : Compare match Interrupt.
AnnaBridge 172:65be27845400 526 * @retval Interrupt status.
AnnaBridge 172:65be27845400 527 */
AnnaBridge 172:65be27845400 528
AnnaBridge 172:65be27845400 529 #define __HAL_LPTIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
AnnaBridge 172:65be27845400 530
AnnaBridge 172:65be27845400 531 /**
AnnaBridge 172:65be27845400 532 * @}
AnnaBridge 172:65be27845400 533 */
AnnaBridge 172:65be27845400 534
AnnaBridge 172:65be27845400 535 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 536 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
AnnaBridge 172:65be27845400 537 * @{
AnnaBridge 172:65be27845400 538 */
AnnaBridge 172:65be27845400 539
AnnaBridge 172:65be27845400 540 /* Initialization/de-initialization functions ********************************/
AnnaBridge 172:65be27845400 541 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 542 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 543
AnnaBridge 172:65be27845400 544 /* MSP functions *************************************************************/
AnnaBridge 172:65be27845400 545 void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 546 void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 547
AnnaBridge 172:65be27845400 548 /* Start/Stop operation functions *********************************************/
AnnaBridge 172:65be27845400 549 /* ################################# PWM Mode ################################*/
AnnaBridge 172:65be27845400 550 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 551 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 172:65be27845400 552 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 553 /* Non-Blocking mode: Interrupt */
AnnaBridge 172:65be27845400 554 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 172:65be27845400 555 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 556
AnnaBridge 172:65be27845400 557 /* ############################# One Pulse Mode ##############################*/
AnnaBridge 172:65be27845400 558 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 559 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 172:65be27845400 560 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 561 /* Non-Blocking mode: Interrupt */
AnnaBridge 172:65be27845400 562 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 172:65be27845400 563 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 564
AnnaBridge 172:65be27845400 565 /* ############################## Set once Mode ##############################*/
AnnaBridge 172:65be27845400 566 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 567 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 172:65be27845400 568 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 569 /* Non-Blocking mode: Interrupt */
AnnaBridge 172:65be27845400 570 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse);
AnnaBridge 172:65be27845400 571 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 572
AnnaBridge 172:65be27845400 573 /* ############################### Encoder Mode ##############################*/
AnnaBridge 172:65be27845400 574 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 575 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 172:65be27845400 576 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 577 /* Non-Blocking mode: Interrupt */
AnnaBridge 172:65be27845400 578 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 172:65be27845400 579 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 580
AnnaBridge 172:65be27845400 581 /* ############################# Time out Mode ##############################*/
AnnaBridge 172:65be27845400 582 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 583 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
AnnaBridge 172:65be27845400 584 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 585 /* Non-Blocking mode: Interrupt */
AnnaBridge 172:65be27845400 586 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout);
AnnaBridge 172:65be27845400 587 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 588
AnnaBridge 172:65be27845400 589 /* ############################## Counter Mode ###############################*/
AnnaBridge 172:65be27845400 590 /* Blocking mode: Polling */
AnnaBridge 172:65be27845400 591 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 172:65be27845400 592 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 593 /* Non-Blocking mode: Interrupt */
AnnaBridge 172:65be27845400 594 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period);
AnnaBridge 172:65be27845400 595 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 596
AnnaBridge 172:65be27845400 597 /* Reading operation functions ************************************************/
AnnaBridge 172:65be27845400 598 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 599 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 600 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 601
AnnaBridge 172:65be27845400 602 /* LPTIM IRQ functions *******************************************************/
AnnaBridge 172:65be27845400 603 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 604
AnnaBridge 172:65be27845400 605 /* CallBack functions ********************************************************/
AnnaBridge 172:65be27845400 606 void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 607 void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 608 void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 609 void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 610 void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 611 void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 612 void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 613
AnnaBridge 172:65be27845400 614 /* Callbacks Register/UnRegister functions ***********************************/
AnnaBridge 172:65be27845400 615 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 616 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID, pLPTIM_CallbackTypeDef pCallback);
AnnaBridge 172:65be27845400 617 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *lphtim, HAL_LPTIM_CallbackIDTypeDef CallbackID);
AnnaBridge 172:65be27845400 618 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 619
AnnaBridge 172:65be27845400 620 /* Peripheral State functions ************************************************/
AnnaBridge 172:65be27845400 621 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim);
AnnaBridge 172:65be27845400 622
AnnaBridge 172:65be27845400 623 /**
AnnaBridge 172:65be27845400 624 * @}
AnnaBridge 172:65be27845400 625 */
AnnaBridge 172:65be27845400 626
AnnaBridge 172:65be27845400 627 /* Private types -------------------------------------------------------------*/
AnnaBridge 172:65be27845400 628 /** @defgroup LPTIM_Private_Types LPTIM Private Types
AnnaBridge 172:65be27845400 629 * @{
AnnaBridge 172:65be27845400 630 */
AnnaBridge 172:65be27845400 631
AnnaBridge 172:65be27845400 632 /**
AnnaBridge 172:65be27845400 633 * @}
AnnaBridge 172:65be27845400 634 */
AnnaBridge 172:65be27845400 635
AnnaBridge 172:65be27845400 636 /* Private variables ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 637 /** @defgroup LPTIM_Private_Variables LPTIM Private Variables
AnnaBridge 172:65be27845400 638 * @{
AnnaBridge 172:65be27845400 639 */
AnnaBridge 172:65be27845400 640
AnnaBridge 172:65be27845400 641 /**
AnnaBridge 172:65be27845400 642 * @}
AnnaBridge 172:65be27845400 643 */
AnnaBridge 172:65be27845400 644
AnnaBridge 172:65be27845400 645 /* Private constants ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 646 /** @defgroup LPTIM_Private_Constants LPTIM Private Constants
AnnaBridge 172:65be27845400 647 * @{
AnnaBridge 172:65be27845400 648 */
AnnaBridge 172:65be27845400 649
AnnaBridge 172:65be27845400 650 /**
AnnaBridge 172:65be27845400 651 * @}
AnnaBridge 172:65be27845400 652 */
AnnaBridge 172:65be27845400 653
AnnaBridge 172:65be27845400 654 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 655 /** @defgroup LPTIM_Private_Macros LPTIM Private Macros
AnnaBridge 172:65be27845400 656 * @{
AnnaBridge 172:65be27845400 657 */
AnnaBridge 172:65be27845400 658
AnnaBridge 172:65be27845400 659 #define IS_LPTIM_CLOCK_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_CLOCKSOURCE_ULPTIM) || \
AnnaBridge 172:65be27845400 660 ((__SOURCE__) == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC))
AnnaBridge 172:65be27845400 661
AnnaBridge 172:65be27845400 662
AnnaBridge 172:65be27845400 663 #define IS_LPTIM_CLOCK_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LPTIM_PRESCALER_DIV1 ) || \
AnnaBridge 172:65be27845400 664 ((__PRESCALER__) == LPTIM_PRESCALER_DIV2 ) || \
AnnaBridge 172:65be27845400 665 ((__PRESCALER__) == LPTIM_PRESCALER_DIV4 ) || \
AnnaBridge 172:65be27845400 666 ((__PRESCALER__) == LPTIM_PRESCALER_DIV8 ) || \
AnnaBridge 172:65be27845400 667 ((__PRESCALER__) == LPTIM_PRESCALER_DIV16 ) || \
AnnaBridge 172:65be27845400 668 ((__PRESCALER__) == LPTIM_PRESCALER_DIV32 ) || \
AnnaBridge 172:65be27845400 669 ((__PRESCALER__) == LPTIM_PRESCALER_DIV64 ) || \
AnnaBridge 172:65be27845400 670 ((__PRESCALER__) == LPTIM_PRESCALER_DIV128))
AnnaBridge 172:65be27845400 671
AnnaBridge 172:65be27845400 672 #define IS_LPTIM_CLOCK_PRESCALERDIV1(__PRESCALER__) ((__PRESCALER__) == LPTIM_PRESCALER_DIV1)
AnnaBridge 172:65be27845400 673
AnnaBridge 172:65be27845400 674 #define IS_LPTIM_OUTPUT_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_OUTPUTPOLARITY_LOW ) || \
AnnaBridge 172:65be27845400 675 ((__POLARITY__) == LPTIM_OUTPUTPOLARITY_HIGH))
AnnaBridge 172:65be27845400 676
AnnaBridge 172:65be27845400 677 #define IS_LPTIM_CLOCK_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION) || \
AnnaBridge 172:65be27845400 678 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_2TRANSITIONS) || \
AnnaBridge 172:65be27845400 679 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_4TRANSITIONS) || \
AnnaBridge 172:65be27845400 680 ((__SAMPLETIME__) == LPTIM_CLOCKSAMPLETIME_8TRANSITIONS))
AnnaBridge 172:65be27845400 681
AnnaBridge 172:65be27845400 682 #define IS_LPTIM_CLOCK_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING) || \
AnnaBridge 172:65be27845400 683 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_FALLING) || \
AnnaBridge 172:65be27845400 684 ((__POLARITY__) == LPTIM_CLOCKPOLARITY_RISING_FALLING))
AnnaBridge 172:65be27845400 685
AnnaBridge 172:65be27845400 686 #define IS_LPTIM_TRG_SOURCE(__TRIG__) (((__TRIG__) == LPTIM_TRIGSOURCE_SOFTWARE) || \
AnnaBridge 172:65be27845400 687 ((__TRIG__) == LPTIM_TRIGSOURCE_0) || \
AnnaBridge 172:65be27845400 688 ((__TRIG__) == LPTIM_TRIGSOURCE_1) || \
AnnaBridge 172:65be27845400 689 ((__TRIG__) == LPTIM_TRIGSOURCE_2) || \
AnnaBridge 172:65be27845400 690 ((__TRIG__) == LPTIM_TRIGSOURCE_3) || \
AnnaBridge 172:65be27845400 691 ((__TRIG__) == LPTIM_TRIGSOURCE_4) || \
AnnaBridge 172:65be27845400 692 ((__TRIG__) == LPTIM_TRIGSOURCE_5) || \
AnnaBridge 172:65be27845400 693 ((__TRIG__) == LPTIM_TRIGSOURCE_6) || \
AnnaBridge 172:65be27845400 694 ((__TRIG__) == LPTIM_TRIGSOURCE_7))
AnnaBridge 172:65be27845400 695
AnnaBridge 172:65be27845400 696 #define IS_LPTIM_EXT_TRG_POLARITY(__POLARITY__) (((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING ) || \
AnnaBridge 172:65be27845400 697 ((__POLARITY__) == LPTIM_ACTIVEEDGE_FALLING ) || \
AnnaBridge 172:65be27845400 698 ((__POLARITY__) == LPTIM_ACTIVEEDGE_RISING_FALLING ))
AnnaBridge 172:65be27845400 699
AnnaBridge 172:65be27845400 700 #define IS_LPTIM_TRIG_SAMPLE_TIME(__SAMPLETIME__) (((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION) || \
AnnaBridge 172:65be27845400 701 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_2TRANSITIONS ) || \
AnnaBridge 172:65be27845400 702 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_4TRANSITIONS ) || \
AnnaBridge 172:65be27845400 703 ((__SAMPLETIME__) == LPTIM_TRIGSAMPLETIME_8TRANSITIONS ))
AnnaBridge 172:65be27845400 704
AnnaBridge 172:65be27845400 705 #define IS_LPTIM_UPDATE_MODE(__MODE__) (((__MODE__) == LPTIM_UPDATE_IMMEDIATE) || \
AnnaBridge 172:65be27845400 706 ((__MODE__) == LPTIM_UPDATE_ENDOFPERIOD))
AnnaBridge 172:65be27845400 707
AnnaBridge 172:65be27845400 708 #define IS_LPTIM_COUNTER_SOURCE(__SOURCE__) (((__SOURCE__) == LPTIM_COUNTERSOURCE_INTERNAL) || \
AnnaBridge 172:65be27845400 709 ((__SOURCE__) == LPTIM_COUNTERSOURCE_EXTERNAL))
AnnaBridge 172:65be27845400 710
AnnaBridge 172:65be27845400 711 #define IS_LPTIM_AUTORELOAD(__AUTORELOAD__) ((__AUTORELOAD__) <= 0x0000FFFFUL)
AnnaBridge 172:65be27845400 712
AnnaBridge 172:65be27845400 713 #define IS_LPTIM_COMPARE(__COMPARE__) ((__COMPARE__) <= 0x0000FFFFUL)
AnnaBridge 172:65be27845400 714
AnnaBridge 172:65be27845400 715 #define IS_LPTIM_PERIOD(__PERIOD__) ((__PERIOD__) <= 0x0000FFFFUL)
AnnaBridge 172:65be27845400 716
AnnaBridge 172:65be27845400 717 #define IS_LPTIM_PULSE(__PULSE__) ((__PULSE__) <= 0x0000FFFFUL)
AnnaBridge 172:65be27845400 718
AnnaBridge 172:65be27845400 719 #define IS_LPTIM_INPUT1_SOURCE(__INSTANCE__, __SOURCE__) \
AnnaBridge 172:65be27845400 720 ((((__INSTANCE__) == LPTIM1) && \
AnnaBridge 172:65be27845400 721 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \
AnnaBridge 172:65be27845400 722 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1))) \
AnnaBridge 172:65be27845400 723 || \
AnnaBridge 172:65be27845400 724 (((__INSTANCE__) == LPTIM2) && \
AnnaBridge 172:65be27845400 725 (((__SOURCE__) == LPTIM_INPUT1SOURCE_GPIO) || \
AnnaBridge 172:65be27845400 726 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1) || \
AnnaBridge 172:65be27845400 727 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP2) || \
AnnaBridge 172:65be27845400 728 ((__SOURCE__) == LPTIM_INPUT1SOURCE_COMP1_COMP2))) \
AnnaBridge 172:65be27845400 729 || \
AnnaBridge 172:65be27845400 730 (((__INSTANCE__) == LPTIM3) && \
AnnaBridge 172:65be27845400 731 (((__SOURCE__) == LPTIM_INPUT1SOURCE_NOT_CONNECTED) || \
AnnaBridge 172:65be27845400 732 ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI1_FSA) || \
AnnaBridge 172:65be27845400 733 ((__SOURCE__) == LPTIM_INPUT1SOURCE_SAI1_FSB))))
AnnaBridge 172:65be27845400 734
AnnaBridge 172:65be27845400 735 #define IS_LPTIM_INPUT2_SOURCE(__INSTANCE__, __SOURCE__) \
AnnaBridge 172:65be27845400 736 ((((__INSTANCE__) == LPTIM1) || \
AnnaBridge 172:65be27845400 737 ((__INSTANCE__) == LPTIM2)) && \
AnnaBridge 172:65be27845400 738 (((__SOURCE__) == LPTIM_INPUT2SOURCE_GPIO) || \
AnnaBridge 172:65be27845400 739 ((__SOURCE__) == LPTIM_INPUT2SOURCE_COMP2)))
AnnaBridge 172:65be27845400 740
AnnaBridge 172:65be27845400 741 /**
AnnaBridge 172:65be27845400 742 * @}
AnnaBridge 172:65be27845400 743 */
AnnaBridge 172:65be27845400 744
AnnaBridge 172:65be27845400 745 /* Private functions ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 746 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
AnnaBridge 172:65be27845400 747 * @{
AnnaBridge 172:65be27845400 748 */
AnnaBridge 172:65be27845400 749 void LPTIM_Disable(LPTIM_HandleTypeDef *lptim);
AnnaBridge 172:65be27845400 750 /**
AnnaBridge 172:65be27845400 751 * @}
AnnaBridge 172:65be27845400 752 */
AnnaBridge 172:65be27845400 753
AnnaBridge 172:65be27845400 754 /**
AnnaBridge 172:65be27845400 755 * @}
AnnaBridge 172:65be27845400 756 */
AnnaBridge 172:65be27845400 757
AnnaBridge 172:65be27845400 758 #endif /* LPTIM1 || LPTIM2 || LPTIM3 || LPTIM4 || LPTIM5 */
AnnaBridge 172:65be27845400 759 /**
AnnaBridge 172:65be27845400 760 * @}
AnnaBridge 172:65be27845400 761 */
AnnaBridge 172:65be27845400 762
AnnaBridge 172:65be27845400 763 #ifdef __cplusplus
AnnaBridge 172:65be27845400 764 }
AnnaBridge 172:65be27845400 765 #endif
AnnaBridge 172:65be27845400 766
AnnaBridge 172:65be27845400 767 #endif /* STM32H7xx_HAL_LPTIM_H */
AnnaBridge 172:65be27845400 768
AnnaBridge 172:65be27845400 769 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/