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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_STD/stm32h7xx_hal_dac.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 172:65be27845400 | 1 | /** |
| AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_dac.h |
| AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
| AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of DAC HAL module. |
| AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 7 | * @attention |
| AnnaBridge | 172:65be27845400 | 8 | * |
| AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
| AnnaBridge | 172:65be27845400 | 11 | * |
| AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
| AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
| AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
| AnnaBridge | 172:65be27845400 | 16 | * |
| AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 18 | */ |
| AnnaBridge | 172:65be27845400 | 19 | |
| AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_DAC_H |
| AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_DAC_H |
| AnnaBridge | 172:65be27845400 | 23 | |
| AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
| AnnaBridge | 172:65be27845400 | 26 | #endif |
| AnnaBridge | 172:65be27845400 | 27 | |
| AnnaBridge | 172:65be27845400 | 28 | |
| AnnaBridge | 172:65be27845400 | 29 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 30 | #include "stm32h7xx_hal_def.h" |
| AnnaBridge | 172:65be27845400 | 31 | |
| AnnaBridge | 172:65be27845400 | 32 | /** @addtogroup STM32H7xx_HAL_Driver |
| AnnaBridge | 172:65be27845400 | 33 | * @{ |
| AnnaBridge | 172:65be27845400 | 34 | */ |
| AnnaBridge | 172:65be27845400 | 35 | |
| AnnaBridge | 172:65be27845400 | 36 | /** @addtogroup DAC |
| AnnaBridge | 172:65be27845400 | 37 | * @{ |
| AnnaBridge | 172:65be27845400 | 38 | */ |
| AnnaBridge | 172:65be27845400 | 39 | |
| AnnaBridge | 172:65be27845400 | 40 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 41 | |
| AnnaBridge | 172:65be27845400 | 42 | /** @defgroup DAC_Exported_Types DAC Exported Types |
| AnnaBridge | 172:65be27845400 | 43 | * @{ |
| AnnaBridge | 172:65be27845400 | 44 | */ |
| AnnaBridge | 172:65be27845400 | 45 | |
| AnnaBridge | 172:65be27845400 | 46 | /** |
| AnnaBridge | 172:65be27845400 | 47 | * @brief HAL State structures definition |
| AnnaBridge | 172:65be27845400 | 48 | */ |
| AnnaBridge | 172:65be27845400 | 49 | typedef enum |
| AnnaBridge | 172:65be27845400 | 50 | { |
| AnnaBridge | 172:65be27845400 | 51 | HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
| AnnaBridge | 172:65be27845400 | 52 | HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
| AnnaBridge | 172:65be27845400 | 53 | HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
| AnnaBridge | 172:65be27845400 | 54 | HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
| AnnaBridge | 172:65be27845400 | 55 | HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
| AnnaBridge | 172:65be27845400 | 56 | |
| AnnaBridge | 172:65be27845400 | 57 | }HAL_DAC_StateTypeDef; |
| AnnaBridge | 172:65be27845400 | 58 | |
| AnnaBridge | 172:65be27845400 | 59 | /** |
| AnnaBridge | 172:65be27845400 | 60 | * @brief DAC handle Structure definition |
| AnnaBridge | 172:65be27845400 | 61 | */ |
| AnnaBridge | 172:65be27845400 | 62 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 63 | typedef struct __DAC_HandleTypeDef |
| AnnaBridge | 172:65be27845400 | 64 | #else |
| AnnaBridge | 172:65be27845400 | 65 | typedef struct |
| AnnaBridge | 172:65be27845400 | 66 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 67 | { |
| AnnaBridge | 172:65be27845400 | 68 | DAC_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 172:65be27845400 | 69 | |
| AnnaBridge | 172:65be27845400 | 70 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
| AnnaBridge | 172:65be27845400 | 71 | |
| AnnaBridge | 172:65be27845400 | 72 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
| AnnaBridge | 172:65be27845400 | 73 | |
| AnnaBridge | 172:65be27845400 | 74 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
| AnnaBridge | 172:65be27845400 | 75 | |
| AnnaBridge | 172:65be27845400 | 76 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
| AnnaBridge | 172:65be27845400 | 77 | |
| AnnaBridge | 172:65be27845400 | 78 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
| AnnaBridge | 172:65be27845400 | 79 | |
| AnnaBridge | 172:65be27845400 | 80 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 81 | void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 82 | void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 83 | void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 84 | void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 85 | void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 86 | void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 87 | void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 88 | void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 89 | |
| AnnaBridge | 172:65be27845400 | 90 | void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 91 | void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 92 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 93 | |
| AnnaBridge | 172:65be27845400 | 94 | }DAC_HandleTypeDef; |
| AnnaBridge | 172:65be27845400 | 95 | |
| AnnaBridge | 172:65be27845400 | 96 | /** |
| AnnaBridge | 172:65be27845400 | 97 | * @brief DAC Configuration sample and hold Channel structure definition |
| AnnaBridge | 172:65be27845400 | 98 | */ |
| AnnaBridge | 172:65be27845400 | 99 | typedef struct |
| AnnaBridge | 172:65be27845400 | 100 | { |
| AnnaBridge | 172:65be27845400 | 101 | uint32_t DAC_SampleTime ; /*!< Specifies the Sample time for the selected channel. |
| AnnaBridge | 172:65be27845400 | 102 | This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. |
| AnnaBridge | 172:65be27845400 | 103 | This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ |
| AnnaBridge | 172:65be27845400 | 104 | |
| AnnaBridge | 172:65be27845400 | 105 | uint32_t DAC_HoldTime ; /*!< Specifies the hold time for the selected channel |
| AnnaBridge | 172:65be27845400 | 106 | This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. |
| AnnaBridge | 172:65be27845400 | 107 | This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */ |
| AnnaBridge | 172:65be27845400 | 108 | |
| AnnaBridge | 172:65be27845400 | 109 | uint32_t DAC_RefreshTime ; /*!< Specifies the refresh time for the selected channel |
| AnnaBridge | 172:65be27845400 | 110 | This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE. |
| AnnaBridge | 172:65be27845400 | 111 | This parameter must be a number between Min_Data = 0 and Max_Data = 255 */ |
| AnnaBridge | 172:65be27845400 | 112 | } |
| AnnaBridge | 172:65be27845400 | 113 | DAC_SampleAndHoldConfTypeDef; |
| AnnaBridge | 172:65be27845400 | 114 | |
| AnnaBridge | 172:65be27845400 | 115 | /** |
| AnnaBridge | 172:65be27845400 | 116 | * @brief DAC Configuration regular Channel structure definition |
| AnnaBridge | 172:65be27845400 | 117 | */ |
| AnnaBridge | 172:65be27845400 | 118 | typedef struct |
| AnnaBridge | 172:65be27845400 | 119 | { |
| AnnaBridge | 172:65be27845400 | 120 | uint32_t DAC_SampleAndHold; /*!< Specifies whether the DAC mode. |
| AnnaBridge | 172:65be27845400 | 121 | This parameter can be a value of @ref DAC_SampleAndHold */ |
| AnnaBridge | 172:65be27845400 | 122 | |
| AnnaBridge | 172:65be27845400 | 123 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
| AnnaBridge | 172:65be27845400 | 124 | This parameter can be a value of @ref DAC_trigger_selection */ |
| AnnaBridge | 172:65be27845400 | 125 | |
| AnnaBridge | 172:65be27845400 | 126 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
| AnnaBridge | 172:65be27845400 | 127 | This parameter can be a value of @ref DAC_output_buffer */ |
| AnnaBridge | 172:65be27845400 | 128 | |
| AnnaBridge | 172:65be27845400 | 129 | uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral . |
| AnnaBridge | 172:65be27845400 | 130 | This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */ |
| AnnaBridge | 172:65be27845400 | 131 | |
| AnnaBridge | 172:65be27845400 | 132 | uint32_t DAC_UserTrimming; /*!< Specifies the trimming mode |
| AnnaBridge | 172:65be27845400 | 133 | This parameter must be a value of @ref DAC_UserTrimming |
| AnnaBridge | 172:65be27845400 | 134 | DAC_UserTrimming is either factory or user trimming */ |
| AnnaBridge | 172:65be27845400 | 135 | |
| AnnaBridge | 172:65be27845400 | 136 | uint32_t DAC_TrimmingValue; /*!< Specifies the offset trimming value |
| AnnaBridge | 172:65be27845400 | 137 | i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER. |
| AnnaBridge | 172:65be27845400 | 138 | This parameter must be a number between Min_Data = 1 and Max_Data = 31 */ |
| AnnaBridge | 172:65be27845400 | 139 | |
| AnnaBridge | 172:65be27845400 | 140 | DAC_SampleAndHoldConfTypeDef DAC_SampleAndHoldConfig; /*!< Sample and Hold settings */ |
| AnnaBridge | 172:65be27845400 | 141 | |
| AnnaBridge | 172:65be27845400 | 142 | }DAC_ChannelConfTypeDef; |
| AnnaBridge | 172:65be27845400 | 143 | |
| AnnaBridge | 172:65be27845400 | 144 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 145 | /** |
| AnnaBridge | 172:65be27845400 | 146 | * @brief HAL DAC Callback ID enumeration definition |
| AnnaBridge | 172:65be27845400 | 147 | */ |
| AnnaBridge | 172:65be27845400 | 148 | typedef enum |
| AnnaBridge | 172:65be27845400 | 149 | { |
| AnnaBridge | 172:65be27845400 | 150 | HAL_DAC_CH1_COMPLETE_CB_ID = 0x00U, /*!< DAC CH1 Complete Callback ID */ |
| AnnaBridge | 172:65be27845400 | 151 | HAL_DAC_CH1_HALF_COMPLETE_CB_ID = 0x01U, /*!< DAC CH1 half Complete Callback ID */ |
| AnnaBridge | 172:65be27845400 | 152 | HAL_DAC_CH1_ERROR_ID = 0x02U, /*!< DAC CH1 error Callback ID */ |
| AnnaBridge | 172:65be27845400 | 153 | HAL_DAC_CH1_UNDERRUN_CB_ID = 0x03U, /*!< DAC CH1 underrun Callback ID */ |
| AnnaBridge | 172:65be27845400 | 154 | HAL_DAC_CH2_COMPLETE_CB_ID = 0x04U, /*!< DAC CH2 Complete Callback ID */ |
| AnnaBridge | 172:65be27845400 | 155 | HAL_DAC_CH2_HALF_COMPLETE_CB_ID = 0x05U, /*!< DAC CH2 half Complete Callback ID */ |
| AnnaBridge | 172:65be27845400 | 156 | HAL_DAC_CH2_ERROR_ID = 0x06U, /*!< DAC CH2 error Callback ID */ |
| AnnaBridge | 172:65be27845400 | 157 | HAL_DAC_CH2_UNDERRUN_CB_ID = 0x07U, /*!< DAC CH2 underrun Callback ID */ |
| AnnaBridge | 172:65be27845400 | 158 | HAL_DAC_MSP_INIT_CB_ID = 0x08U, /*!< DAC MspInit Callback ID */ |
| AnnaBridge | 172:65be27845400 | 159 | HAL_DAC_MSP_DEINIT_CB_ID = 0x09U, /*!< DAC MspDeInit Callback ID */ |
| AnnaBridge | 172:65be27845400 | 160 | HAL_DAC_ALL_CB_ID = 0x0AU /*!< DAC All ID */ |
| AnnaBridge | 172:65be27845400 | 161 | } HAL_DAC_CallbackIDTypeDef; |
| AnnaBridge | 172:65be27845400 | 162 | |
| AnnaBridge | 172:65be27845400 | 163 | /** |
| AnnaBridge | 172:65be27845400 | 164 | * @brief HAL DAC Callback pointer definition |
| AnnaBridge | 172:65be27845400 | 165 | */ |
| AnnaBridge | 172:65be27845400 | 166 | typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 167 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 168 | |
| AnnaBridge | 172:65be27845400 | 169 | /** |
| AnnaBridge | 172:65be27845400 | 170 | * @} |
| AnnaBridge | 172:65be27845400 | 171 | */ |
| AnnaBridge | 172:65be27845400 | 172 | |
| AnnaBridge | 172:65be27845400 | 173 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 174 | |
| AnnaBridge | 172:65be27845400 | 175 | /** @defgroup DAC_Exported_Constants DAC Exported Constants |
| AnnaBridge | 172:65be27845400 | 176 | * @{ |
| AnnaBridge | 172:65be27845400 | 177 | */ |
| AnnaBridge | 172:65be27845400 | 178 | |
| AnnaBridge | 172:65be27845400 | 179 | /** @defgroup DAC_Error_Code DAC Error Code |
| AnnaBridge | 172:65be27845400 | 180 | * @{ |
| AnnaBridge | 172:65be27845400 | 181 | */ |
| AnnaBridge | 172:65be27845400 | 182 | #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
| AnnaBridge | 172:65be27845400 | 183 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */ |
| AnnaBridge | 172:65be27845400 | 184 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */ |
| AnnaBridge | 172:65be27845400 | 185 | #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
| AnnaBridge | 172:65be27845400 | 186 | #define HAL_DAC_ERROR_TIMEOUT 0x08U /*!< Timeout error */ |
| AnnaBridge | 172:65be27845400 | 187 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 188 | #define HAL_DAC_ERROR_INVALID_CALLBACK 0x10U /*!< Invalid callback error */ |
| AnnaBridge | 172:65be27845400 | 189 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 190 | /** |
| AnnaBridge | 172:65be27845400 | 191 | * @} |
| AnnaBridge | 172:65be27845400 | 192 | */ |
| AnnaBridge | 172:65be27845400 | 193 | |
| AnnaBridge | 172:65be27845400 | 194 | /** @defgroup DAC_trigger_selection DAC trigger selection |
| AnnaBridge | 172:65be27845400 | 195 | * @{ |
| AnnaBridge | 172:65be27845400 | 196 | */ |
| AnnaBridge | 172:65be27845400 | 197 | #define DAC_TRIGGER_NONE 0x00000000U /*!< Conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */ |
| AnnaBridge | 172:65be27845400 | 198 | #define DAC_TRIGGER_SOFTWARE (DAC_CR_TEN1) /*!< Conversion started by software trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 199 | #define DAC_TRIGGER_T1_TRGO (DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM1 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 200 | #define DAC_TRIGGER_T2_TRGO (DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 201 | #define DAC_TRIGGER_T4_TRGO (DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 202 | #define DAC_TRIGGER_T5_TRGO (DAC_CR_TSEL1_2 |DAC_CR_TEN1) /*!< TIM5 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 203 | #define DAC_TRIGGER_T6_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 204 | #define DAC_TRIGGER_T7_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 205 | #define DAC_TRIGGER_T8_TRGO (DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< TIM8 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 206 | #define DAC_TRIGGER_T15_TRGO (DAC_CR_TSEL1_3 | DAC_CR_TEN1) /*!< TIM15 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 207 | #define DAC_TRIGGER_HR1_TRGO1 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< HR1 TRGO1 selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 208 | #define DAC_TRIGGER_HR1_TRGO2 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TEN1) /*!< HR1 TRGO2 selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 209 | #define DAC_TRIGGER_LP1_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< LP1 OUT TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 210 | #define DAC_TRIGGER_LP2_OUT (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TEN1) /*!< LP2 OUT TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 211 | #define DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 172:65be27845400 | 212 | /** |
| AnnaBridge | 172:65be27845400 | 213 | * @} |
| AnnaBridge | 172:65be27845400 | 214 | */ |
| AnnaBridge | 172:65be27845400 | 215 | |
| AnnaBridge | 172:65be27845400 | 216 | /** @defgroup DAC_output_buffer DAC output buffer |
| AnnaBridge | 172:65be27845400 | 217 | * @{ |
| AnnaBridge | 172:65be27845400 | 218 | */ |
| AnnaBridge | 172:65be27845400 | 219 | #define DAC_OUTPUTBUFFER_ENABLE 0x00000000U |
| AnnaBridge | 172:65be27845400 | 220 | #define DAC_OUTPUTBUFFER_DISABLE DAC_MCR_MODE1_1 |
| AnnaBridge | 172:65be27845400 | 221 | |
| AnnaBridge | 172:65be27845400 | 222 | /** |
| AnnaBridge | 172:65be27845400 | 223 | * @} |
| AnnaBridge | 172:65be27845400 | 224 | */ |
| AnnaBridge | 172:65be27845400 | 225 | |
| AnnaBridge | 172:65be27845400 | 226 | /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral |
| AnnaBridge | 172:65be27845400 | 227 | * @{ |
| AnnaBridge | 172:65be27845400 | 228 | */ |
| AnnaBridge | 172:65be27845400 | 229 | #define DAC_CHIPCONNECT_DISABLE 0x00000000U |
| AnnaBridge | 172:65be27845400 | 230 | #define DAC_CHIPCONNECT_ENABLE DAC_MCR_MODE1_0 |
| AnnaBridge | 172:65be27845400 | 231 | |
| AnnaBridge | 172:65be27845400 | 232 | /** |
| AnnaBridge | 172:65be27845400 | 233 | * @} |
| AnnaBridge | 172:65be27845400 | 234 | */ |
| AnnaBridge | 172:65be27845400 | 235 | |
| AnnaBridge | 172:65be27845400 | 236 | /** @defgroup DAC_UserTrimming DAC User Trimming |
| AnnaBridge | 172:65be27845400 | 237 | * @{ |
| AnnaBridge | 172:65be27845400 | 238 | */ |
| AnnaBridge | 172:65be27845400 | 239 | |
| AnnaBridge | 172:65be27845400 | 240 | #define DAC_TRIMMING_FACTORY 0x00000000U /*!< Factory trimming */ |
| AnnaBridge | 172:65be27845400 | 241 | #define DAC_TRIMMING_USER 0x00000001U /*!< User trimming */ |
| AnnaBridge | 172:65be27845400 | 242 | |
| AnnaBridge | 172:65be27845400 | 243 | /** |
| AnnaBridge | 172:65be27845400 | 244 | * @} |
| AnnaBridge | 172:65be27845400 | 245 | */ |
| AnnaBridge | 172:65be27845400 | 246 | |
| AnnaBridge | 172:65be27845400 | 247 | /** @defgroup DAC_SampleAndHold DAC Sample and hold |
| AnnaBridge | 172:65be27845400 | 248 | * @{ |
| AnnaBridge | 172:65be27845400 | 249 | */ |
| AnnaBridge | 172:65be27845400 | 250 | #define DAC_SAMPLEANDHOLD_DISABLE 0x00000000U |
| AnnaBridge | 172:65be27845400 | 251 | #define DAC_SAMPLEANDHOLD_ENABLE DAC_MCR_MODE1_2 |
| AnnaBridge | 172:65be27845400 | 252 | |
| AnnaBridge | 172:65be27845400 | 253 | |
| AnnaBridge | 172:65be27845400 | 254 | /** |
| AnnaBridge | 172:65be27845400 | 255 | * @} |
| AnnaBridge | 172:65be27845400 | 256 | */ |
| AnnaBridge | 172:65be27845400 | 257 | |
| AnnaBridge | 172:65be27845400 | 258 | |
| AnnaBridge | 172:65be27845400 | 259 | /** @defgroup DAC_Channel_selection DAC Channel selection |
| AnnaBridge | 172:65be27845400 | 260 | * @{ |
| AnnaBridge | 172:65be27845400 | 261 | */ |
| AnnaBridge | 172:65be27845400 | 262 | #define DAC_CHANNEL_1 0x00000000U |
| AnnaBridge | 172:65be27845400 | 263 | #define DAC_CHANNEL_2 0x00000010U |
| AnnaBridge | 172:65be27845400 | 264 | |
| AnnaBridge | 172:65be27845400 | 265 | /** |
| AnnaBridge | 172:65be27845400 | 266 | * @} |
| AnnaBridge | 172:65be27845400 | 267 | */ |
| AnnaBridge | 172:65be27845400 | 268 | |
| AnnaBridge | 172:65be27845400 | 269 | /** @defgroup DAC_data_alignment DAC data alignment |
| AnnaBridge | 172:65be27845400 | 270 | * @{ |
| AnnaBridge | 172:65be27845400 | 271 | */ |
| AnnaBridge | 172:65be27845400 | 272 | #define DAC_ALIGN_12B_R 0x00000000U |
| AnnaBridge | 172:65be27845400 | 273 | #define DAC_ALIGN_12B_L 0x00000004U |
| AnnaBridge | 172:65be27845400 | 274 | #define DAC_ALIGN_8B_R 0x00000008U |
| AnnaBridge | 172:65be27845400 | 275 | /** |
| AnnaBridge | 172:65be27845400 | 276 | * @} |
| AnnaBridge | 172:65be27845400 | 277 | */ |
| AnnaBridge | 172:65be27845400 | 278 | |
| AnnaBridge | 172:65be27845400 | 279 | /** @defgroup DAC_flags_definition DAC flags definition |
| AnnaBridge | 172:65be27845400 | 280 | * @{ |
| AnnaBridge | 172:65be27845400 | 281 | */ |
| AnnaBridge | 172:65be27845400 | 282 | #define DAC_FLAG_DMAUDR1 DAC_SR_DMAUDR1 |
| AnnaBridge | 172:65be27845400 | 283 | #define DAC_FLAG_DMAUDR2 DAC_SR_DMAUDR2 |
| AnnaBridge | 172:65be27845400 | 284 | |
| AnnaBridge | 172:65be27845400 | 285 | /** |
| AnnaBridge | 172:65be27845400 | 286 | * @} |
| AnnaBridge | 172:65be27845400 | 287 | */ |
| AnnaBridge | 172:65be27845400 | 288 | |
| AnnaBridge | 172:65be27845400 | 289 | /** @defgroup DAC_IT_definition DAC IT definition |
| AnnaBridge | 172:65be27845400 | 290 | * @{ |
| AnnaBridge | 172:65be27845400 | 291 | */ |
| AnnaBridge | 172:65be27845400 | 292 | #define DAC_IT_DMAUDR1 DAC_SR_DMAUDR1 |
| AnnaBridge | 172:65be27845400 | 293 | #define DAC_IT_DMAUDR2 DAC_SR_DMAUDR2 |
| AnnaBridge | 172:65be27845400 | 294 | |
| AnnaBridge | 172:65be27845400 | 295 | /** |
| AnnaBridge | 172:65be27845400 | 296 | * @} |
| AnnaBridge | 172:65be27845400 | 297 | */ |
| AnnaBridge | 172:65be27845400 | 298 | |
| AnnaBridge | 172:65be27845400 | 299 | /** |
| AnnaBridge | 172:65be27845400 | 300 | * @} |
| AnnaBridge | 172:65be27845400 | 301 | */ |
| AnnaBridge | 172:65be27845400 | 302 | |
| AnnaBridge | 172:65be27845400 | 303 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 304 | |
| AnnaBridge | 172:65be27845400 | 305 | /** @defgroup DAC_Exported_Macros DAC Exported Macros |
| AnnaBridge | 172:65be27845400 | 306 | * @{ |
| AnnaBridge | 172:65be27845400 | 307 | */ |
| AnnaBridge | 172:65be27845400 | 308 | |
| AnnaBridge | 172:65be27845400 | 309 | /** @brief Reset DAC handle state. |
| AnnaBridge | 172:65be27845400 | 310 | * @param __HANDLE__ specifies the DAC handle. |
| AnnaBridge | 172:65be27845400 | 311 | * @retval None |
| AnnaBridge | 172:65be27845400 | 312 | */ |
| AnnaBridge | 172:65be27845400 | 313 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 314 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do { \ |
| AnnaBridge | 172:65be27845400 | 315 | (__HANDLE__)->State = HAL_DAC_STATE_RESET; \ |
| AnnaBridge | 172:65be27845400 | 316 | (__HANDLE__)->MspInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 317 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 318 | } while(0) |
| AnnaBridge | 172:65be27845400 | 319 | #else |
| AnnaBridge | 172:65be27845400 | 320 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
| AnnaBridge | 172:65be27845400 | 321 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 322 | |
| AnnaBridge | 172:65be27845400 | 323 | /** @brief Enable the DAC channel. |
| AnnaBridge | 172:65be27845400 | 324 | * @param __HANDLE__ specifies the DAC handle. |
| AnnaBridge | 172:65be27845400 | 325 | * @param __DAC_Channel__ specifies the DAC channel |
| AnnaBridge | 172:65be27845400 | 326 | * @retval None |
| AnnaBridge | 172:65be27845400 | 327 | */ |
| AnnaBridge | 172:65be27845400 | 328 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \ |
| AnnaBridge | 172:65be27845400 | 329 | ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) |
| AnnaBridge | 172:65be27845400 | 330 | |
| AnnaBridge | 172:65be27845400 | 331 | /** @brief Disable the DAC channel. |
| AnnaBridge | 172:65be27845400 | 332 | * @param __HANDLE__ specifies the DAC handle |
| AnnaBridge | 172:65be27845400 | 333 | * @param __DAC_Channel__ specifies the DAC channel. |
| AnnaBridge | 172:65be27845400 | 334 | * @retval None |
| AnnaBridge | 172:65be27845400 | 335 | */ |
| AnnaBridge | 172:65be27845400 | 336 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \ |
| AnnaBridge | 172:65be27845400 | 337 | ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL))) |
| AnnaBridge | 172:65be27845400 | 338 | |
| AnnaBridge | 172:65be27845400 | 339 | /** @brief Set DHR12R1 alignment. |
| AnnaBridge | 172:65be27845400 | 340 | * @param __ALIGNMENT__ specifies the DAC alignment |
| AnnaBridge | 172:65be27845400 | 341 | * @retval None |
| AnnaBridge | 172:65be27845400 | 342 | */ |
| AnnaBridge | 172:65be27845400 | 343 | #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__)) |
| AnnaBridge | 172:65be27845400 | 344 | |
| AnnaBridge | 172:65be27845400 | 345 | /** @brief Set DHR12R2 alignment. |
| AnnaBridge | 172:65be27845400 | 346 | * @param __ALIGNMENT__ specifies the DAC alignment |
| AnnaBridge | 172:65be27845400 | 347 | * @retval None |
| AnnaBridge | 172:65be27845400 | 348 | */ |
| AnnaBridge | 172:65be27845400 | 349 | #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__)) |
| AnnaBridge | 172:65be27845400 | 350 | |
| AnnaBridge | 172:65be27845400 | 351 | /** @brief Set DHR12RD alignment. |
| AnnaBridge | 172:65be27845400 | 352 | * @param __ALIGNMENT__ specifies the DAC alignment |
| AnnaBridge | 172:65be27845400 | 353 | * @retval None |
| AnnaBridge | 172:65be27845400 | 354 | */ |
| AnnaBridge | 172:65be27845400 | 355 | #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__)) |
| AnnaBridge | 172:65be27845400 | 356 | |
| AnnaBridge | 172:65be27845400 | 357 | /** @brief Enable the DAC interrupt. |
| AnnaBridge | 172:65be27845400 | 358 | * @param __HANDLE__ specifies the DAC handle |
| AnnaBridge | 172:65be27845400 | 359 | * @param __INTERRUPT__ specifies the DAC interrupt. |
| AnnaBridge | 172:65be27845400 | 360 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 361 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 172:65be27845400 | 362 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
| AnnaBridge | 172:65be27845400 | 363 | * @retval None |
| AnnaBridge | 172:65be27845400 | 364 | */ |
| AnnaBridge | 172:65be27845400 | 365 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 366 | |
| AnnaBridge | 172:65be27845400 | 367 | /** @brief Disable the DAC interrupt. |
| AnnaBridge | 172:65be27845400 | 368 | * @param __HANDLE__ specifies the DAC handle |
| AnnaBridge | 172:65be27845400 | 369 | * @param __INTERRUPT__ specifies the DAC interrupt. |
| AnnaBridge | 172:65be27845400 | 370 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 371 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 172:65be27845400 | 372 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
| AnnaBridge | 172:65be27845400 | 373 | * @retval None |
| AnnaBridge | 172:65be27845400 | 374 | */ |
| AnnaBridge | 172:65be27845400 | 375 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 376 | |
| AnnaBridge | 172:65be27845400 | 377 | /** @brief Check whether the specified DAC interrupt source is enabled or not. |
| AnnaBridge | 172:65be27845400 | 378 | * @param __HANDLE__ DAC handle |
| AnnaBridge | 172:65be27845400 | 379 | * @param __INTERRUPT__ DAC interrupt source to check |
| AnnaBridge | 172:65be27845400 | 380 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 381 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 172:65be27845400 | 382 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt |
| AnnaBridge | 172:65be27845400 | 383 | * @retval State of interruption (SET or RESET) |
| AnnaBridge | 172:65be27845400 | 384 | */ |
| AnnaBridge | 172:65be27845400 | 385 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 386 | |
| AnnaBridge | 172:65be27845400 | 387 | /** @brief Get the selected DAC's flag status. |
| AnnaBridge | 172:65be27845400 | 388 | * @param __HANDLE__ specifies the DAC handle. |
| AnnaBridge | 172:65be27845400 | 389 | * @param __FLAG__ specifies the DAC flag to get. |
| AnnaBridge | 172:65be27845400 | 390 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 391 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
| AnnaBridge | 172:65be27845400 | 392 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
| AnnaBridge | 172:65be27845400 | 393 | * @retval None |
| AnnaBridge | 172:65be27845400 | 394 | */ |
| AnnaBridge | 172:65be27845400 | 395 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 396 | |
| AnnaBridge | 172:65be27845400 | 397 | /** @brief Clear the DAC's flag. |
| AnnaBridge | 172:65be27845400 | 398 | * @param __HANDLE__ specifies the DAC handle. |
| AnnaBridge | 172:65be27845400 | 399 | * @param __FLAG__ specifies the DAC flag to clear. |
| AnnaBridge | 172:65be27845400 | 400 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 401 | * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag |
| AnnaBridge | 172:65be27845400 | 402 | * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag |
| AnnaBridge | 172:65be27845400 | 403 | * @retval None |
| AnnaBridge | 172:65be27845400 | 404 | */ |
| AnnaBridge | 172:65be27845400 | 405 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 406 | |
| AnnaBridge | 172:65be27845400 | 407 | /** |
| AnnaBridge | 172:65be27845400 | 408 | * @} |
| AnnaBridge | 172:65be27845400 | 409 | */ |
| AnnaBridge | 172:65be27845400 | 410 | |
| AnnaBridge | 172:65be27845400 | 411 | /* Private macro -------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 412 | |
| AnnaBridge | 172:65be27845400 | 413 | /** @defgroup DAC_Private_Macros DAC Private Macros |
| AnnaBridge | 172:65be27845400 | 414 | * @{ |
| AnnaBridge | 172:65be27845400 | 415 | */ |
| AnnaBridge | 172:65be27845400 | 416 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
| AnnaBridge | 172:65be27845400 | 417 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
| AnnaBridge | 172:65be27845400 | 418 | |
| AnnaBridge | 172:65be27845400 | 419 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
| AnnaBridge | 172:65be27845400 | 420 | ((CHANNEL) == DAC_CHANNEL_2)) |
| AnnaBridge | 172:65be27845400 | 421 | |
| AnnaBridge | 172:65be27845400 | 422 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
| AnnaBridge | 172:65be27845400 | 423 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
| AnnaBridge | 172:65be27845400 | 424 | ((ALIGN) == DAC_ALIGN_8B_R)) |
| AnnaBridge | 172:65be27845400 | 425 | |
| AnnaBridge | 172:65be27845400 | 426 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
| AnnaBridge | 172:65be27845400 | 427 | |
| AnnaBridge | 172:65be27845400 | 428 | #define IS_DAC_REFRESHTIME(TIME) ((TIME) <= 0x000000FFU) |
| AnnaBridge | 172:65be27845400 | 429 | |
| AnnaBridge | 172:65be27845400 | 430 | /** |
| AnnaBridge | 172:65be27845400 | 431 | * @} |
| AnnaBridge | 172:65be27845400 | 432 | */ |
| AnnaBridge | 172:65be27845400 | 433 | |
| AnnaBridge | 172:65be27845400 | 434 | /* Include DAC HAL Extended module */ |
| AnnaBridge | 172:65be27845400 | 435 | #include "stm32h7xx_hal_dac_ex.h" |
| AnnaBridge | 172:65be27845400 | 436 | |
| AnnaBridge | 172:65be27845400 | 437 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 438 | |
| AnnaBridge | 172:65be27845400 | 439 | /** @addtogroup DAC_Exported_Functions |
| AnnaBridge | 172:65be27845400 | 440 | * @{ |
| AnnaBridge | 172:65be27845400 | 441 | */ |
| AnnaBridge | 172:65be27845400 | 442 | |
| AnnaBridge | 172:65be27845400 | 443 | /** @addtogroup DAC_Exported_Functions_Group1 |
| AnnaBridge | 172:65be27845400 | 444 | * @{ |
| AnnaBridge | 172:65be27845400 | 445 | */ |
| AnnaBridge | 172:65be27845400 | 446 | /* Initialization and de-initialization functions *****************************/ |
| AnnaBridge | 172:65be27845400 | 447 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 448 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 449 | void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 450 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 451 | |
| AnnaBridge | 172:65be27845400 | 452 | /** |
| AnnaBridge | 172:65be27845400 | 453 | * @} |
| AnnaBridge | 172:65be27845400 | 454 | */ |
| AnnaBridge | 172:65be27845400 | 455 | |
| AnnaBridge | 172:65be27845400 | 456 | /** @addtogroup DAC_Exported_Functions_Group2 |
| AnnaBridge | 172:65be27845400 | 457 | * @{ |
| AnnaBridge | 172:65be27845400 | 458 | */ |
| AnnaBridge | 172:65be27845400 | 459 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 172:65be27845400 | 460 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 172:65be27845400 | 461 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 172:65be27845400 | 462 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
| AnnaBridge | 172:65be27845400 | 463 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 172:65be27845400 | 464 | |
| AnnaBridge | 172:65be27845400 | 465 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 466 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
| AnnaBridge | 172:65be27845400 | 467 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 468 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 469 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 470 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 471 | #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1) |
| AnnaBridge | 172:65be27845400 | 472 | /* DAC callback registering/unregistering */ |
| AnnaBridge | 172:65be27845400 | 473 | HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId, pDAC_CallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 474 | HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackId); |
| AnnaBridge | 172:65be27845400 | 475 | #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 476 | /** |
| AnnaBridge | 172:65be27845400 | 477 | * @} |
| AnnaBridge | 172:65be27845400 | 478 | */ |
| AnnaBridge | 172:65be27845400 | 479 | |
| AnnaBridge | 172:65be27845400 | 480 | /** @addtogroup DAC_Exported_Functions_Group3 |
| AnnaBridge | 172:65be27845400 | 481 | * @{ |
| AnnaBridge | 172:65be27845400 | 482 | */ |
| AnnaBridge | 172:65be27845400 | 483 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 172:65be27845400 | 484 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
| AnnaBridge | 172:65be27845400 | 485 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 172:65be27845400 | 486 | /** |
| AnnaBridge | 172:65be27845400 | 487 | * @} |
| AnnaBridge | 172:65be27845400 | 488 | */ |
| AnnaBridge | 172:65be27845400 | 489 | |
| AnnaBridge | 172:65be27845400 | 490 | /** @addtogroup DAC_Exported_Functions_Group4 |
| AnnaBridge | 172:65be27845400 | 491 | * @{ |
| AnnaBridge | 172:65be27845400 | 492 | */ |
| AnnaBridge | 172:65be27845400 | 493 | /* Peripheral State and Error functions ***************************************/ |
| AnnaBridge | 172:65be27845400 | 494 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 172:65be27845400 | 495 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 172:65be27845400 | 496 | |
| AnnaBridge | 172:65be27845400 | 497 | /** |
| AnnaBridge | 172:65be27845400 | 498 | * @} |
| AnnaBridge | 172:65be27845400 | 499 | */ |
| AnnaBridge | 172:65be27845400 | 500 | |
| AnnaBridge | 172:65be27845400 | 501 | /** |
| AnnaBridge | 172:65be27845400 | 502 | * @} |
| AnnaBridge | 172:65be27845400 | 503 | */ |
| AnnaBridge | 172:65be27845400 | 504 | |
| AnnaBridge | 172:65be27845400 | 505 | /** |
| AnnaBridge | 172:65be27845400 | 506 | * @} |
| AnnaBridge | 172:65be27845400 | 507 | */ |
| AnnaBridge | 172:65be27845400 | 508 | |
| AnnaBridge | 172:65be27845400 | 509 | /** |
| AnnaBridge | 172:65be27845400 | 510 | * @} |
| AnnaBridge | 172:65be27845400 | 511 | */ |
| AnnaBridge | 172:65be27845400 | 512 | |
| AnnaBridge | 172:65be27845400 | 513 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 514 | } |
| AnnaBridge | 172:65be27845400 | 515 | #endif |
| AnnaBridge | 172:65be27845400 | 516 | |
| AnnaBridge | 172:65be27845400 | 517 | |
| AnnaBridge | 172:65be27845400 | 518 | #endif /*STM32H7xx_HAL_DAC_H */ |
| AnnaBridge | 172:65be27845400 | 519 | |
| AnnaBridge | 172:65be27845400 | 520 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| AnnaBridge | 172:65be27845400 | 521 |
