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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_ll_usb.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_ll_usb.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of USB Low Layer HAL module. |
AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 7 | * @attention |
AnnaBridge | 172:65be27845400 | 8 | * |
AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
AnnaBridge | 172:65be27845400 | 11 | * |
AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 16 | * |
AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 18 | */ |
AnnaBridge | 172:65be27845400 | 19 | |
AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_LL_USB_H |
AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_LL_USB_H |
AnnaBridge | 172:65be27845400 | 23 | |
AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
AnnaBridge | 172:65be27845400 | 26 | #endif |
AnnaBridge | 172:65be27845400 | 27 | |
AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
AnnaBridge | 172:65be27845400 | 30 | |
AnnaBridge | 172:65be27845400 | 31 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) |
AnnaBridge | 172:65be27845400 | 32 | /** @addtogroup STM32H7xx_HAL_Driver |
AnnaBridge | 172:65be27845400 | 33 | * @{ |
AnnaBridge | 172:65be27845400 | 34 | */ |
AnnaBridge | 172:65be27845400 | 35 | |
AnnaBridge | 172:65be27845400 | 36 | /** @addtogroup USB_LL |
AnnaBridge | 172:65be27845400 | 37 | * @{ |
AnnaBridge | 172:65be27845400 | 38 | */ |
AnnaBridge | 172:65be27845400 | 39 | |
AnnaBridge | 172:65be27845400 | 40 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 41 | |
AnnaBridge | 172:65be27845400 | 42 | /** |
AnnaBridge | 172:65be27845400 | 43 | * @brief USB Mode definition |
AnnaBridge | 172:65be27845400 | 44 | */ |
AnnaBridge | 172:65be27845400 | 45 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) |
AnnaBridge | 172:65be27845400 | 46 | |
AnnaBridge | 172:65be27845400 | 47 | typedef enum |
AnnaBridge | 172:65be27845400 | 48 | { |
AnnaBridge | 172:65be27845400 | 49 | USB_DEVICE_MODE = 0, |
AnnaBridge | 172:65be27845400 | 50 | USB_HOST_MODE = 1, |
AnnaBridge | 172:65be27845400 | 51 | USB_DRD_MODE = 2 |
AnnaBridge | 172:65be27845400 | 52 | } USB_OTG_ModeTypeDef; |
AnnaBridge | 172:65be27845400 | 53 | |
AnnaBridge | 172:65be27845400 | 54 | /** |
AnnaBridge | 172:65be27845400 | 55 | * @brief URB States definition |
AnnaBridge | 172:65be27845400 | 56 | */ |
AnnaBridge | 172:65be27845400 | 57 | typedef enum |
AnnaBridge | 172:65be27845400 | 58 | { |
AnnaBridge | 172:65be27845400 | 59 | URB_IDLE = 0, |
AnnaBridge | 172:65be27845400 | 60 | URB_DONE, |
AnnaBridge | 172:65be27845400 | 61 | URB_NOTREADY, |
AnnaBridge | 172:65be27845400 | 62 | URB_NYET, |
AnnaBridge | 172:65be27845400 | 63 | URB_ERROR, |
AnnaBridge | 172:65be27845400 | 64 | URB_STALL |
AnnaBridge | 172:65be27845400 | 65 | } USB_OTG_URBStateTypeDef; |
AnnaBridge | 172:65be27845400 | 66 | |
AnnaBridge | 172:65be27845400 | 67 | /** |
AnnaBridge | 172:65be27845400 | 68 | * @brief Host channel States definition |
AnnaBridge | 172:65be27845400 | 69 | */ |
AnnaBridge | 172:65be27845400 | 70 | typedef enum |
AnnaBridge | 172:65be27845400 | 71 | { |
AnnaBridge | 172:65be27845400 | 72 | HC_IDLE = 0, |
AnnaBridge | 172:65be27845400 | 73 | HC_XFRC, |
AnnaBridge | 172:65be27845400 | 74 | HC_HALTED, |
AnnaBridge | 172:65be27845400 | 75 | HC_NAK, |
AnnaBridge | 172:65be27845400 | 76 | HC_NYET, |
AnnaBridge | 172:65be27845400 | 77 | HC_STALL, |
AnnaBridge | 172:65be27845400 | 78 | HC_XACTERR, |
AnnaBridge | 172:65be27845400 | 79 | HC_BBLERR, |
AnnaBridge | 172:65be27845400 | 80 | HC_DATATGLERR |
AnnaBridge | 172:65be27845400 | 81 | } USB_OTG_HCStateTypeDef; |
AnnaBridge | 172:65be27845400 | 82 | |
AnnaBridge | 172:65be27845400 | 83 | /** |
AnnaBridge | 172:65be27845400 | 84 | * @brief USB OTG Initialization Structure definition |
AnnaBridge | 172:65be27845400 | 85 | */ |
AnnaBridge | 172:65be27845400 | 86 | typedef struct |
AnnaBridge | 172:65be27845400 | 87 | { |
AnnaBridge | 172:65be27845400 | 88 | uint32_t dev_endpoints; /*!< Device Endpoints number. |
AnnaBridge | 172:65be27845400 | 89 | This parameter depends on the used USB core. |
AnnaBridge | 172:65be27845400 | 90 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
AnnaBridge | 172:65be27845400 | 91 | |
AnnaBridge | 172:65be27845400 | 92 | uint32_t Host_channels; /*!< Host Channels number. |
AnnaBridge | 172:65be27845400 | 93 | This parameter Depends on the used USB core. |
AnnaBridge | 172:65be27845400 | 94 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
AnnaBridge | 172:65be27845400 | 95 | |
AnnaBridge | 172:65be27845400 | 96 | uint32_t speed; /*!< USB Core speed. |
AnnaBridge | 172:65be27845400 | 97 | This parameter can be any value of @ref USB_Core_Speed_ */ |
AnnaBridge | 172:65be27845400 | 98 | |
AnnaBridge | 172:65be27845400 | 99 | uint32_t dma_enable; /*!< Enable or disable of the USB embedded DMA used only for OTG HS. */ |
AnnaBridge | 172:65be27845400 | 100 | |
AnnaBridge | 172:65be27845400 | 101 | uint32_t ep0_mps; /*!< Set the Endpoint 0 Max Packet size. */ |
AnnaBridge | 172:65be27845400 | 102 | |
AnnaBridge | 172:65be27845400 | 103 | uint32_t phy_itface; /*!< Select the used PHY interface. |
AnnaBridge | 172:65be27845400 | 104 | This parameter can be any value of @ref USB_Core_PHY_ */ |
AnnaBridge | 172:65be27845400 | 105 | |
AnnaBridge | 172:65be27845400 | 106 | uint32_t Sof_enable; /*!< Enable or disable the output of the SOF signal. */ |
AnnaBridge | 172:65be27845400 | 107 | |
AnnaBridge | 172:65be27845400 | 108 | uint32_t low_power_enable; /*!< Enable or disable the low power mode. */ |
AnnaBridge | 172:65be27845400 | 109 | |
AnnaBridge | 172:65be27845400 | 110 | uint32_t lpm_enable; /*!< Enable or disable Link Power Management. */ |
AnnaBridge | 172:65be27845400 | 111 | |
AnnaBridge | 172:65be27845400 | 112 | uint32_t battery_charging_enable; /*!< Enable or disable Battery charging. */ |
AnnaBridge | 172:65be27845400 | 113 | |
AnnaBridge | 172:65be27845400 | 114 | uint32_t vbus_sensing_enable; /*!< Enable or disable the VBUS Sensing feature. */ |
AnnaBridge | 172:65be27845400 | 115 | |
AnnaBridge | 172:65be27845400 | 116 | uint32_t use_dedicated_ep1; /*!< Enable or disable the use of the dedicated EP1 interrupt. */ |
AnnaBridge | 172:65be27845400 | 117 | |
AnnaBridge | 172:65be27845400 | 118 | uint32_t use_external_vbus; /*!< Enable or disable the use of the external VBUS. */ |
AnnaBridge | 172:65be27845400 | 119 | } USB_OTG_CfgTypeDef; |
AnnaBridge | 172:65be27845400 | 120 | |
AnnaBridge | 172:65be27845400 | 121 | typedef struct |
AnnaBridge | 172:65be27845400 | 122 | { |
AnnaBridge | 172:65be27845400 | 123 | uint8_t num; /*!< Endpoint number |
AnnaBridge | 172:65be27845400 | 124 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
AnnaBridge | 172:65be27845400 | 125 | |
AnnaBridge | 172:65be27845400 | 126 | uint8_t is_in; /*!< Endpoint direction |
AnnaBridge | 172:65be27845400 | 127 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 128 | |
AnnaBridge | 172:65be27845400 | 129 | uint8_t is_stall; /*!< Endpoint stall condition |
AnnaBridge | 172:65be27845400 | 130 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 131 | |
AnnaBridge | 172:65be27845400 | 132 | uint8_t type; /*!< Endpoint type |
AnnaBridge | 172:65be27845400 | 133 | This parameter can be any value of @ref USB_EP_Type_ */ |
AnnaBridge | 172:65be27845400 | 134 | |
AnnaBridge | 172:65be27845400 | 135 | uint8_t data_pid_start; /*!< Initial data PID |
AnnaBridge | 172:65be27845400 | 136 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 137 | |
AnnaBridge | 172:65be27845400 | 138 | uint8_t even_odd_frame; /*!< IFrame parity |
AnnaBridge | 172:65be27845400 | 139 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 140 | |
AnnaBridge | 172:65be27845400 | 141 | uint16_t tx_fifo_num; /*!< Transmission FIFO number |
AnnaBridge | 172:65be27845400 | 142 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
AnnaBridge | 172:65be27845400 | 143 | |
AnnaBridge | 172:65be27845400 | 144 | uint32_t maxpacket; /*!< Endpoint Max packet size |
AnnaBridge | 172:65be27845400 | 145 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
AnnaBridge | 172:65be27845400 | 146 | |
AnnaBridge | 172:65be27845400 | 147 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer */ |
AnnaBridge | 172:65be27845400 | 148 | |
AnnaBridge | 172:65be27845400 | 149 | uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address */ |
AnnaBridge | 172:65be27845400 | 150 | |
AnnaBridge | 172:65be27845400 | 151 | uint32_t xfer_len; /*!< Current transfer length */ |
AnnaBridge | 172:65be27845400 | 152 | |
AnnaBridge | 172:65be27845400 | 153 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer */ |
AnnaBridge | 172:65be27845400 | 154 | } USB_OTG_EPTypeDef; |
AnnaBridge | 172:65be27845400 | 155 | |
AnnaBridge | 172:65be27845400 | 156 | typedef struct |
AnnaBridge | 172:65be27845400 | 157 | { |
AnnaBridge | 172:65be27845400 | 158 | uint8_t dev_addr ; /*!< USB device address. |
AnnaBridge | 172:65be27845400 | 159 | This parameter must be a number between Min_Data = 1 and Max_Data = 255 */ |
AnnaBridge | 172:65be27845400 | 160 | |
AnnaBridge | 172:65be27845400 | 161 | uint8_t ch_num; /*!< Host channel number. |
AnnaBridge | 172:65be27845400 | 162 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
AnnaBridge | 172:65be27845400 | 163 | |
AnnaBridge | 172:65be27845400 | 164 | uint8_t ep_num; /*!< Endpoint number. |
AnnaBridge | 172:65be27845400 | 165 | This parameter must be a number between Min_Data = 1 and Max_Data = 15 */ |
AnnaBridge | 172:65be27845400 | 166 | |
AnnaBridge | 172:65be27845400 | 167 | uint8_t ep_is_in; /*!< Endpoint direction |
AnnaBridge | 172:65be27845400 | 168 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 169 | |
AnnaBridge | 172:65be27845400 | 170 | uint8_t speed; /*!< USB Host speed. |
AnnaBridge | 172:65be27845400 | 171 | This parameter can be any value of @ref USB_Core_Speed_ */ |
AnnaBridge | 172:65be27845400 | 172 | |
AnnaBridge | 172:65be27845400 | 173 | uint8_t do_ping; /*!< Enable or disable the use of the PING protocol for HS mode. */ |
AnnaBridge | 172:65be27845400 | 174 | |
AnnaBridge | 172:65be27845400 | 175 | uint8_t process_ping; /*!< Execute the PING protocol for HS mode. */ |
AnnaBridge | 172:65be27845400 | 176 | |
AnnaBridge | 172:65be27845400 | 177 | uint8_t ep_type; /*!< Endpoint Type. |
AnnaBridge | 172:65be27845400 | 178 | This parameter can be any value of @ref USB_EP_Type_ */ |
AnnaBridge | 172:65be27845400 | 179 | |
AnnaBridge | 172:65be27845400 | 180 | uint16_t max_packet; /*!< Endpoint Max packet size. |
AnnaBridge | 172:65be27845400 | 181 | This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */ |
AnnaBridge | 172:65be27845400 | 182 | |
AnnaBridge | 172:65be27845400 | 183 | uint8_t data_pid; /*!< Initial data PID. |
AnnaBridge | 172:65be27845400 | 184 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 185 | |
AnnaBridge | 172:65be27845400 | 186 | uint8_t *xfer_buff; /*!< Pointer to transfer buffer. */ |
AnnaBridge | 172:65be27845400 | 187 | |
AnnaBridge | 172:65be27845400 | 188 | uint32_t xfer_len; /*!< Current transfer length. */ |
AnnaBridge | 172:65be27845400 | 189 | |
AnnaBridge | 172:65be27845400 | 190 | uint32_t xfer_count; /*!< Partial transfer length in case of multi packet transfer. */ |
AnnaBridge | 172:65be27845400 | 191 | |
AnnaBridge | 172:65be27845400 | 192 | uint8_t toggle_in; /*!< IN transfer current toggle flag. |
AnnaBridge | 172:65be27845400 | 193 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 194 | |
AnnaBridge | 172:65be27845400 | 195 | uint8_t toggle_out; /*!< OUT transfer current toggle flag |
AnnaBridge | 172:65be27845400 | 196 | This parameter must be a number between Min_Data = 0 and Max_Data = 1 */ |
AnnaBridge | 172:65be27845400 | 197 | |
AnnaBridge | 172:65be27845400 | 198 | uint32_t dma_addr; /*!< 32 bits aligned transfer buffer address. */ |
AnnaBridge | 172:65be27845400 | 199 | |
AnnaBridge | 172:65be27845400 | 200 | uint32_t ErrCnt; /*!< Host channel error count.*/ |
AnnaBridge | 172:65be27845400 | 201 | |
AnnaBridge | 172:65be27845400 | 202 | USB_OTG_URBStateTypeDef urb_state; /*!< URB state. |
AnnaBridge | 172:65be27845400 | 203 | This parameter can be any value of @ref USB_OTG_URBStateTypeDef */ |
AnnaBridge | 172:65be27845400 | 204 | |
AnnaBridge | 172:65be27845400 | 205 | USB_OTG_HCStateTypeDef state; /*!< Host Channel state. |
AnnaBridge | 172:65be27845400 | 206 | This parameter can be any value of @ref USB_OTG_HCStateTypeDef */ |
AnnaBridge | 172:65be27845400 | 207 | } USB_OTG_HCTypeDef; |
AnnaBridge | 172:65be27845400 | 208 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ |
AnnaBridge | 172:65be27845400 | 209 | |
AnnaBridge | 172:65be27845400 | 210 | |
AnnaBridge | 172:65be27845400 | 211 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 212 | |
AnnaBridge | 172:65be27845400 | 213 | /** @defgroup PCD_Exported_Constants PCD Exported Constants |
AnnaBridge | 172:65be27845400 | 214 | * @{ |
AnnaBridge | 172:65be27845400 | 215 | */ |
AnnaBridge | 172:65be27845400 | 216 | |
AnnaBridge | 172:65be27845400 | 217 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) |
AnnaBridge | 172:65be27845400 | 218 | /** @defgroup USB_Core_Mode_ USB Core Mode |
AnnaBridge | 172:65be27845400 | 219 | * @{ |
AnnaBridge | 172:65be27845400 | 220 | */ |
AnnaBridge | 172:65be27845400 | 221 | #define USB_OTG_MODE_DEVICE 0U |
AnnaBridge | 172:65be27845400 | 222 | #define USB_OTG_MODE_HOST 1U |
AnnaBridge | 172:65be27845400 | 223 | #define USB_OTG_MODE_DRD 2U |
AnnaBridge | 172:65be27845400 | 224 | /** |
AnnaBridge | 172:65be27845400 | 225 | * @} |
AnnaBridge | 172:65be27845400 | 226 | */ |
AnnaBridge | 172:65be27845400 | 227 | |
AnnaBridge | 172:65be27845400 | 228 | /** @defgroup USB_LL_Core_Speed USB Low Layer Core Speed |
AnnaBridge | 172:65be27845400 | 229 | * @{ |
AnnaBridge | 172:65be27845400 | 230 | */ |
AnnaBridge | 172:65be27845400 | 231 | #define USB_OTG_SPEED_HIGH 0U |
AnnaBridge | 172:65be27845400 | 232 | #define USB_OTG_SPEED_HIGH_IN_FULL 1U |
AnnaBridge | 172:65be27845400 | 233 | #define USB_OTG_SPEED_FULL 3U |
AnnaBridge | 172:65be27845400 | 234 | /** |
AnnaBridge | 172:65be27845400 | 235 | * @} |
AnnaBridge | 172:65be27845400 | 236 | */ |
AnnaBridge | 172:65be27845400 | 237 | |
AnnaBridge | 172:65be27845400 | 238 | /** @defgroup USB_LL_Core_PHY USB Low Layer Core PHY |
AnnaBridge | 172:65be27845400 | 239 | * @{ |
AnnaBridge | 172:65be27845400 | 240 | */ |
AnnaBridge | 172:65be27845400 | 241 | #define USB_OTG_ULPI_PHY 1U |
AnnaBridge | 172:65be27845400 | 242 | #define USB_OTG_EMBEDDED_PHY 2U |
AnnaBridge | 172:65be27845400 | 243 | #define USB_OTG_HS_EMBEDDED_PHY 3U |
AnnaBridge | 172:65be27845400 | 244 | |
AnnaBridge | 172:65be27845400 | 245 | #if !defined (USB_HS_PHYC_TUNE_VALUE) |
AnnaBridge | 172:65be27845400 | 246 | #define USB_HS_PHYC_TUNE_VALUE 0x00000F13U /*!< Value of USB HS PHY Tune */ |
AnnaBridge | 172:65be27845400 | 247 | #endif /* USB_HS_PHYC_TUNE_VALUE */ |
AnnaBridge | 172:65be27845400 | 248 | /** |
AnnaBridge | 172:65be27845400 | 249 | * @} |
AnnaBridge | 172:65be27845400 | 250 | */ |
AnnaBridge | 172:65be27845400 | 251 | |
AnnaBridge | 172:65be27845400 | 252 | /** @defgroup USB_LL_Core_MPS USB Low Layer Core MPS |
AnnaBridge | 172:65be27845400 | 253 | * @{ |
AnnaBridge | 172:65be27845400 | 254 | */ |
AnnaBridge | 172:65be27845400 | 255 | #define USB_OTG_HS_MAX_PACKET_SIZE 512U |
AnnaBridge | 172:65be27845400 | 256 | #define USB_OTG_FS_MAX_PACKET_SIZE 64U |
AnnaBridge | 172:65be27845400 | 257 | #define USB_OTG_MAX_EP0_SIZE 64U |
AnnaBridge | 172:65be27845400 | 258 | /** |
AnnaBridge | 172:65be27845400 | 259 | * @} |
AnnaBridge | 172:65be27845400 | 260 | */ |
AnnaBridge | 172:65be27845400 | 261 | |
AnnaBridge | 172:65be27845400 | 262 | /** @defgroup USB_LL_Core_PHY_Frequency USB Low Layer Core PHY Frequency |
AnnaBridge | 172:65be27845400 | 263 | * @{ |
AnnaBridge | 172:65be27845400 | 264 | */ |
AnnaBridge | 172:65be27845400 | 265 | #define DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ (0U << 1) |
AnnaBridge | 172:65be27845400 | 266 | #define DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ (1U << 1) |
AnnaBridge | 172:65be27845400 | 267 | #define DSTS_ENUMSPD_LS_PHY_6MHZ (2U << 1) |
AnnaBridge | 172:65be27845400 | 268 | #define DSTS_ENUMSPD_FS_PHY_48MHZ (3U << 1) |
AnnaBridge | 172:65be27845400 | 269 | /** |
AnnaBridge | 172:65be27845400 | 270 | * @} |
AnnaBridge | 172:65be27845400 | 271 | */ |
AnnaBridge | 172:65be27845400 | 272 | |
AnnaBridge | 172:65be27845400 | 273 | /** @defgroup USB_LL_CORE_Frame_Interval USB Low Layer Core Frame Interval |
AnnaBridge | 172:65be27845400 | 274 | * @{ |
AnnaBridge | 172:65be27845400 | 275 | */ |
AnnaBridge | 172:65be27845400 | 276 | #define DCFG_FRAME_INTERVAL_80 0U |
AnnaBridge | 172:65be27845400 | 277 | #define DCFG_FRAME_INTERVAL_85 1U |
AnnaBridge | 172:65be27845400 | 278 | #define DCFG_FRAME_INTERVAL_90 2U |
AnnaBridge | 172:65be27845400 | 279 | #define DCFG_FRAME_INTERVAL_95 3U |
AnnaBridge | 172:65be27845400 | 280 | /** |
AnnaBridge | 172:65be27845400 | 281 | * @} |
AnnaBridge | 172:65be27845400 | 282 | */ |
AnnaBridge | 172:65be27845400 | 283 | |
AnnaBridge | 172:65be27845400 | 284 | /** @defgroup USB_LL_EP0_MPS USB Low Layer EP0 MPS |
AnnaBridge | 172:65be27845400 | 285 | * @{ |
AnnaBridge | 172:65be27845400 | 286 | */ |
AnnaBridge | 172:65be27845400 | 287 | #define DEP0CTL_MPS_64 0U |
AnnaBridge | 172:65be27845400 | 288 | #define DEP0CTL_MPS_32 1U |
AnnaBridge | 172:65be27845400 | 289 | #define DEP0CTL_MPS_16 2U |
AnnaBridge | 172:65be27845400 | 290 | #define DEP0CTL_MPS_8 3U |
AnnaBridge | 172:65be27845400 | 291 | /** |
AnnaBridge | 172:65be27845400 | 292 | * @} |
AnnaBridge | 172:65be27845400 | 293 | */ |
AnnaBridge | 172:65be27845400 | 294 | |
AnnaBridge | 172:65be27845400 | 295 | /** @defgroup USB_LL_EP_Speed USB Low Layer EP Speed |
AnnaBridge | 172:65be27845400 | 296 | * @{ |
AnnaBridge | 172:65be27845400 | 297 | */ |
AnnaBridge | 172:65be27845400 | 298 | #define EP_SPEED_LOW 0U |
AnnaBridge | 172:65be27845400 | 299 | #define EP_SPEED_FULL 1U |
AnnaBridge | 172:65be27845400 | 300 | #define EP_SPEED_HIGH 2U |
AnnaBridge | 172:65be27845400 | 301 | /** |
AnnaBridge | 172:65be27845400 | 302 | * @} |
AnnaBridge | 172:65be27845400 | 303 | */ |
AnnaBridge | 172:65be27845400 | 304 | |
AnnaBridge | 172:65be27845400 | 305 | /** @defgroup USB_LL_EP_Type USB Low Layer EP Type |
AnnaBridge | 172:65be27845400 | 306 | * @{ |
AnnaBridge | 172:65be27845400 | 307 | */ |
AnnaBridge | 172:65be27845400 | 308 | #define EP_TYPE_CTRL 0U |
AnnaBridge | 172:65be27845400 | 309 | #define EP_TYPE_ISOC 1U |
AnnaBridge | 172:65be27845400 | 310 | #define EP_TYPE_BULK 2U |
AnnaBridge | 172:65be27845400 | 311 | #define EP_TYPE_INTR 3U |
AnnaBridge | 172:65be27845400 | 312 | #define EP_TYPE_MSK 3U |
AnnaBridge | 172:65be27845400 | 313 | /** |
AnnaBridge | 172:65be27845400 | 314 | * @} |
AnnaBridge | 172:65be27845400 | 315 | */ |
AnnaBridge | 172:65be27845400 | 316 | |
AnnaBridge | 172:65be27845400 | 317 | /** @defgroup USB_LL_STS_Defines USB Low Layer STS Defines |
AnnaBridge | 172:65be27845400 | 318 | * @{ |
AnnaBridge | 172:65be27845400 | 319 | */ |
AnnaBridge | 172:65be27845400 | 320 | #define STS_GOUT_NAK 1U |
AnnaBridge | 172:65be27845400 | 321 | #define STS_DATA_UPDT 2U |
AnnaBridge | 172:65be27845400 | 322 | #define STS_XFER_COMP 3U |
AnnaBridge | 172:65be27845400 | 323 | #define STS_SETUP_COMP 4U |
AnnaBridge | 172:65be27845400 | 324 | #define STS_SETUP_UPDT 6U |
AnnaBridge | 172:65be27845400 | 325 | /** |
AnnaBridge | 172:65be27845400 | 326 | * @} |
AnnaBridge | 172:65be27845400 | 327 | */ |
AnnaBridge | 172:65be27845400 | 328 | |
AnnaBridge | 172:65be27845400 | 329 | /** @defgroup USB_LL_HCFG_SPEED_Defines USB Low Layer HCFG Speed Defines |
AnnaBridge | 172:65be27845400 | 330 | * @{ |
AnnaBridge | 172:65be27845400 | 331 | */ |
AnnaBridge | 172:65be27845400 | 332 | #define HCFG_30_60_MHZ 0U |
AnnaBridge | 172:65be27845400 | 333 | #define HCFG_48_MHZ 1U |
AnnaBridge | 172:65be27845400 | 334 | #define HCFG_6_MHZ 2U |
AnnaBridge | 172:65be27845400 | 335 | /** |
AnnaBridge | 172:65be27845400 | 336 | * @} |
AnnaBridge | 172:65be27845400 | 337 | */ |
AnnaBridge | 172:65be27845400 | 338 | |
AnnaBridge | 172:65be27845400 | 339 | /** @defgroup USB_LL_HPRT0_PRTSPD_SPEED_Defines USB Low Layer HPRT0 PRTSPD Speed Defines |
AnnaBridge | 172:65be27845400 | 340 | * @{ |
AnnaBridge | 172:65be27845400 | 341 | */ |
AnnaBridge | 172:65be27845400 | 342 | #define HPRT0_PRTSPD_HIGH_SPEED 0U |
AnnaBridge | 172:65be27845400 | 343 | #define HPRT0_PRTSPD_FULL_SPEED 1U |
AnnaBridge | 172:65be27845400 | 344 | #define HPRT0_PRTSPD_LOW_SPEED 2U |
AnnaBridge | 172:65be27845400 | 345 | /** |
AnnaBridge | 172:65be27845400 | 346 | * @} |
AnnaBridge | 172:65be27845400 | 347 | */ |
AnnaBridge | 172:65be27845400 | 348 | |
AnnaBridge | 172:65be27845400 | 349 | #define HCCHAR_CTRL 0U |
AnnaBridge | 172:65be27845400 | 350 | #define HCCHAR_ISOC 1U |
AnnaBridge | 172:65be27845400 | 351 | #define HCCHAR_BULK 2U |
AnnaBridge | 172:65be27845400 | 352 | #define HCCHAR_INTR 3U |
AnnaBridge | 172:65be27845400 | 353 | |
AnnaBridge | 172:65be27845400 | 354 | #define HC_PID_DATA0 0U |
AnnaBridge | 172:65be27845400 | 355 | #define HC_PID_DATA2 1U |
AnnaBridge | 172:65be27845400 | 356 | #define HC_PID_DATA1 2U |
AnnaBridge | 172:65be27845400 | 357 | #define HC_PID_SETUP 3U |
AnnaBridge | 172:65be27845400 | 358 | |
AnnaBridge | 172:65be27845400 | 359 | #define GRXSTS_PKTSTS_IN 2U |
AnnaBridge | 172:65be27845400 | 360 | #define GRXSTS_PKTSTS_IN_XFER_COMP 3U |
AnnaBridge | 172:65be27845400 | 361 | #define GRXSTS_PKTSTS_DATA_TOGGLE_ERR 5U |
AnnaBridge | 172:65be27845400 | 362 | #define GRXSTS_PKTSTS_CH_HALTED 7U |
AnnaBridge | 172:65be27845400 | 363 | |
AnnaBridge | 172:65be27845400 | 364 | #define USBx_PCGCCTL *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_PCGCCTL_BASE) |
AnnaBridge | 172:65be27845400 | 365 | #define USBx_HPRT0 *(__IO uint32_t *)((uint32_t)USBx_BASE + USB_OTG_HOST_PORT_BASE) |
AnnaBridge | 172:65be27845400 | 366 | |
AnnaBridge | 172:65be27845400 | 367 | #define USBx_DEVICE ((USB_OTG_DeviceTypeDef *)(USBx_BASE + USB_OTG_DEVICE_BASE)) |
AnnaBridge | 172:65be27845400 | 368 | #define USBx_INEP(i) ((USB_OTG_INEndpointTypeDef *)(USBx_BASE + USB_OTG_IN_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE))) |
AnnaBridge | 172:65be27845400 | 369 | #define USBx_OUTEP(i) ((USB_OTG_OUTEndpointTypeDef *)(USBx_BASE + USB_OTG_OUT_ENDPOINT_BASE + ((i) * USB_OTG_EP_REG_SIZE))) |
AnnaBridge | 172:65be27845400 | 370 | #define USBx_DFIFO(i) *(__IO uint32_t *)(USBx_BASE + USB_OTG_FIFO_BASE + ((i) * USB_OTG_FIFO_SIZE)) |
AnnaBridge | 172:65be27845400 | 371 | |
AnnaBridge | 172:65be27845400 | 372 | #define USBx_HOST ((USB_OTG_HostTypeDef *)(USBx_BASE + USB_OTG_HOST_BASE)) |
AnnaBridge | 172:65be27845400 | 373 | #define USBx_HC(i) ((USB_OTG_HostChannelTypeDef *)(USBx_BASE + USB_OTG_HOST_CHANNEL_BASE + ((i) * USB_OTG_HOST_CHANNEL_SIZE))) |
AnnaBridge | 172:65be27845400 | 374 | #define USBPHYC ((USBPHYC_GlobalTypeDef *)((uint32_t )USB_PHY_HS_CONTROLLER_BASE)) |
AnnaBridge | 172:65be27845400 | 375 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ |
AnnaBridge | 172:65be27845400 | 376 | |
AnnaBridge | 172:65be27845400 | 377 | #define EP_ADDR_MSK 0xFU |
AnnaBridge | 172:65be27845400 | 378 | /** |
AnnaBridge | 172:65be27845400 | 379 | * @} |
AnnaBridge | 172:65be27845400 | 380 | */ |
AnnaBridge | 172:65be27845400 | 381 | |
AnnaBridge | 172:65be27845400 | 382 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 383 | /** @defgroup USB_LL_Exported_Macros USB Low Layer Exported Macros |
AnnaBridge | 172:65be27845400 | 384 | * @{ |
AnnaBridge | 172:65be27845400 | 385 | */ |
AnnaBridge | 172:65be27845400 | 386 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) |
AnnaBridge | 172:65be27845400 | 387 | #define USB_MASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK &= ~(__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 388 | #define USB_UNMASK_INTERRUPT(__INSTANCE__, __INTERRUPT__) ((__INSTANCE__)->GINTMSK |= (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 389 | |
AnnaBridge | 172:65be27845400 | 390 | #define CLEAR_IN_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_INEP(__EPNUM__)->DIEPINT = (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 391 | #define CLEAR_OUT_EP_INTR(__EPNUM__, __INTERRUPT__) (USBx_OUTEP(__EPNUM__)->DOEPINT = (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 392 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ |
AnnaBridge | 172:65be27845400 | 393 | /** |
AnnaBridge | 172:65be27845400 | 394 | * @} |
AnnaBridge | 172:65be27845400 | 395 | */ |
AnnaBridge | 172:65be27845400 | 396 | |
AnnaBridge | 172:65be27845400 | 397 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 398 | /** @addtogroup USB_LL_Exported_Functions USB Low Layer Exported Functions |
AnnaBridge | 172:65be27845400 | 399 | * @{ |
AnnaBridge | 172:65be27845400 | 400 | */ |
AnnaBridge | 172:65be27845400 | 401 | #if defined (USB_OTG_FS) || defined (USB_OTG_HS) |
AnnaBridge | 172:65be27845400 | 402 | HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); |
AnnaBridge | 172:65be27845400 | 403 | HAL_StatusTypeDef USB_DevInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); |
AnnaBridge | 172:65be27845400 | 404 | HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 405 | HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 406 | HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx, USB_OTG_ModeTypeDef mode); |
AnnaBridge | 172:65be27845400 | 407 | HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx, uint8_t speed); |
AnnaBridge | 172:65be27845400 | 408 | HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 409 | HAL_StatusTypeDef USB_FlushTxFifo(USB_OTG_GlobalTypeDef *USBx, uint32_t num); |
AnnaBridge | 172:65be27845400 | 410 | HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
AnnaBridge | 172:65be27845400 | 411 | HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
AnnaBridge | 172:65be27845400 | 412 | HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
AnnaBridge | 172:65be27845400 | 413 | HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
AnnaBridge | 172:65be27845400 | 414 | HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma); |
AnnaBridge | 172:65be27845400 | 415 | HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep, uint8_t dma); |
AnnaBridge | 172:65be27845400 | 416 | HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *src, uint8_t ch_ep_num, uint16_t len, uint8_t dma); |
AnnaBridge | 172:65be27845400 | 417 | void *USB_ReadPacket(USB_OTG_GlobalTypeDef *USBx, uint8_t *dest, uint16_t len); |
AnnaBridge | 172:65be27845400 | 418 | HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
AnnaBridge | 172:65be27845400 | 419 | HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef *USBx, USB_OTG_EPTypeDef *ep); |
AnnaBridge | 172:65be27845400 | 420 | HAL_StatusTypeDef USB_SetDevAddress(USB_OTG_GlobalTypeDef *USBx, uint8_t address); |
AnnaBridge | 172:65be27845400 | 421 | HAL_StatusTypeDef USB_DevConnect(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 422 | HAL_StatusTypeDef USB_DevDisconnect(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 423 | HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 424 | HAL_StatusTypeDef USB_ActivateSetup(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 425 | HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef *USBx, uint8_t dma, uint8_t *psetup); |
AnnaBridge | 172:65be27845400 | 426 | uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 427 | uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 428 | uint32_t USB_ReadInterrupts(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 429 | uint32_t USB_ReadDevAllOutEpInterrupt(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 430 | uint32_t USB_ReadDevOutEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum); |
AnnaBridge | 172:65be27845400 | 431 | uint32_t USB_ReadDevAllInEpInterrupt(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 432 | uint32_t USB_ReadDevInEPInterrupt(USB_OTG_GlobalTypeDef *USBx, uint8_t epnum); |
AnnaBridge | 172:65be27845400 | 433 | void USB_ClearInterrupts(USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt); |
AnnaBridge | 172:65be27845400 | 434 | |
AnnaBridge | 172:65be27845400 | 435 | HAL_StatusTypeDef USB_HostInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg); |
AnnaBridge | 172:65be27845400 | 436 | HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx, uint8_t freq); |
AnnaBridge | 172:65be27845400 | 437 | HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 438 | HAL_StatusTypeDef USB_DriveVbus(USB_OTG_GlobalTypeDef *USBx, uint8_t state); |
AnnaBridge | 172:65be27845400 | 439 | uint32_t USB_GetHostSpeed(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 440 | uint32_t USB_GetCurrentFrame(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 441 | HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx, |
AnnaBridge | 172:65be27845400 | 442 | uint8_t ch_num, |
AnnaBridge | 172:65be27845400 | 443 | uint8_t epnum, |
AnnaBridge | 172:65be27845400 | 444 | uint8_t dev_address, |
AnnaBridge | 172:65be27845400 | 445 | uint8_t speed, |
AnnaBridge | 172:65be27845400 | 446 | uint8_t ep_type, |
AnnaBridge | 172:65be27845400 | 447 | uint16_t mps); |
AnnaBridge | 172:65be27845400 | 448 | HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef *USBx, USB_OTG_HCTypeDef *hc, uint8_t dma); |
AnnaBridge | 172:65be27845400 | 449 | uint32_t USB_HC_ReadInterrupt(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 450 | HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx, uint8_t hc_num); |
AnnaBridge | 172:65be27845400 | 451 | HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx, uint8_t ch_num); |
AnnaBridge | 172:65be27845400 | 452 | HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 453 | HAL_StatusTypeDef USB_ActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 454 | HAL_StatusTypeDef USB_DeActivateRemoteWakeup(USB_OTG_GlobalTypeDef *USBx); |
AnnaBridge | 172:65be27845400 | 455 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ |
AnnaBridge | 172:65be27845400 | 456 | |
AnnaBridge | 172:65be27845400 | 457 | /** |
AnnaBridge | 172:65be27845400 | 458 | * @} |
AnnaBridge | 172:65be27845400 | 459 | */ |
AnnaBridge | 172:65be27845400 | 460 | |
AnnaBridge | 172:65be27845400 | 461 | /** |
AnnaBridge | 172:65be27845400 | 462 | * @} |
AnnaBridge | 172:65be27845400 | 463 | */ |
AnnaBridge | 172:65be27845400 | 464 | |
AnnaBridge | 172:65be27845400 | 465 | /** |
AnnaBridge | 172:65be27845400 | 466 | * @} |
AnnaBridge | 172:65be27845400 | 467 | */ |
AnnaBridge | 172:65be27845400 | 468 | |
AnnaBridge | 172:65be27845400 | 469 | /** |
AnnaBridge | 172:65be27845400 | 470 | * @} |
AnnaBridge | 172:65be27845400 | 471 | */ |
AnnaBridge | 172:65be27845400 | 472 | #endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */ |
AnnaBridge | 172:65be27845400 | 473 | |
AnnaBridge | 172:65be27845400 | 474 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 475 | } |
AnnaBridge | 172:65be27845400 | 476 | #endif |
AnnaBridge | 172:65be27845400 | 477 | |
AnnaBridge | 172:65be27845400 | 478 | |
AnnaBridge | 172:65be27845400 | 479 | #endif /* STM32H7xx_LL_USB_H */ |
AnnaBridge | 172:65be27845400 | 480 | |
AnnaBridge | 172:65be27845400 | 481 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |