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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_ll_swpmi.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 172:65be27845400 | 1 | /** |
| AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_ll_swpmi.h |
| AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
| AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of SWPMI LL module. |
| AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 7 | * @attention |
| AnnaBridge | 172:65be27845400 | 8 | * |
| AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
| AnnaBridge | 172:65be27845400 | 11 | * |
| AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
| AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
| AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
| AnnaBridge | 172:65be27845400 | 16 | * |
| AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 18 | */ |
| AnnaBridge | 172:65be27845400 | 19 | |
| AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_LL_SWPMI_H |
| AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_LL_SWPMI_H |
| AnnaBridge | 172:65be27845400 | 23 | |
| AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
| AnnaBridge | 172:65be27845400 | 26 | #endif |
| AnnaBridge | 172:65be27845400 | 27 | |
| AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx.h" |
| AnnaBridge | 172:65be27845400 | 30 | |
| AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_LL_Driver |
| AnnaBridge | 172:65be27845400 | 32 | * @{ |
| AnnaBridge | 172:65be27845400 | 33 | */ |
| AnnaBridge | 172:65be27845400 | 34 | |
| AnnaBridge | 172:65be27845400 | 35 | |
| AnnaBridge | 172:65be27845400 | 36 | /** @defgroup SWPMI_LL SWPMI |
| AnnaBridge | 172:65be27845400 | 37 | * @{ |
| AnnaBridge | 172:65be27845400 | 38 | */ |
| AnnaBridge | 172:65be27845400 | 39 | |
| AnnaBridge | 172:65be27845400 | 40 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 41 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 42 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 43 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 44 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 172:65be27845400 | 45 | /** @defgroup SWPMI_LL_Private_Macros SWPMI Private Macros |
| AnnaBridge | 172:65be27845400 | 46 | * @{ |
| AnnaBridge | 172:65be27845400 | 47 | */ |
| AnnaBridge | 172:65be27845400 | 48 | /** |
| AnnaBridge | 172:65be27845400 | 49 | * @} |
| AnnaBridge | 172:65be27845400 | 50 | */ |
| AnnaBridge | 172:65be27845400 | 51 | #endif /*USE_FULL_LL_DRIVER*/ |
| AnnaBridge | 172:65be27845400 | 52 | |
| AnnaBridge | 172:65be27845400 | 53 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 54 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 172:65be27845400 | 55 | /** @defgroup SWPMI_LL_ES_INIT SWPMI Exported Init structure |
| AnnaBridge | 172:65be27845400 | 56 | * @{ |
| AnnaBridge | 172:65be27845400 | 57 | */ |
| AnnaBridge | 172:65be27845400 | 58 | |
| AnnaBridge | 172:65be27845400 | 59 | /** |
| AnnaBridge | 172:65be27845400 | 60 | * @brief SWPMI Init structures definition |
| AnnaBridge | 172:65be27845400 | 61 | */ |
| AnnaBridge | 172:65be27845400 | 62 | typedef struct |
| AnnaBridge | 172:65be27845400 | 63 | { |
| AnnaBridge | 172:65be27845400 | 64 | uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class. |
| AnnaBridge | 172:65be27845400 | 65 | This parameter can be a value of @ref SWPMI_LL_EC_VOLTAGE_CLASS |
| AnnaBridge | 172:65be27845400 | 66 | |
| AnnaBridge | 172:65be27845400 | 67 | This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetVoltageClass. */ |
| AnnaBridge | 172:65be27845400 | 68 | |
| AnnaBridge | 172:65be27845400 | 69 | uint32_t BitRatePrescaler; /*!< Specifies the SWPMI bitrate prescaler. |
| AnnaBridge | 172:65be27845400 | 70 | This parameter must be a number between Min_Data=0 and Max_Data=255U. |
| AnnaBridge | 172:65be27845400 | 71 | |
| AnnaBridge | 172:65be27845400 | 72 | The value can be calculated thanks to helper macro @ref __LL_SWPMI_CALC_BITRATE_PRESCALER |
| AnnaBridge | 172:65be27845400 | 73 | |
| AnnaBridge | 172:65be27845400 | 74 | This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetBitRatePrescaler. */ |
| AnnaBridge | 172:65be27845400 | 75 | |
| AnnaBridge | 172:65be27845400 | 76 | uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode. |
| AnnaBridge | 172:65be27845400 | 77 | This parameter can be a value of @ref SWPMI_LL_EC_SW_BUFFER_TX |
| AnnaBridge | 172:65be27845400 | 78 | |
| AnnaBridge | 172:65be27845400 | 79 | This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetTransmissionMode. */ |
| AnnaBridge | 172:65be27845400 | 80 | |
| AnnaBridge | 172:65be27845400 | 81 | uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode. |
| AnnaBridge | 172:65be27845400 | 82 | This parameter can be a value of @ref SWPMI_LL_EC_SW_BUFFER_RX |
| AnnaBridge | 172:65be27845400 | 83 | |
| AnnaBridge | 172:65be27845400 | 84 | This feature can be modified afterwards using unitary function @ref LL_SWPMI_SetReceptionMode. */ |
| AnnaBridge | 172:65be27845400 | 85 | } LL_SWPMI_InitTypeDef; |
| AnnaBridge | 172:65be27845400 | 86 | |
| AnnaBridge | 172:65be27845400 | 87 | /** |
| AnnaBridge | 172:65be27845400 | 88 | * @} |
| AnnaBridge | 172:65be27845400 | 89 | */ |
| AnnaBridge | 172:65be27845400 | 90 | #endif /* USE_FULL_LL_DRIVER */ |
| AnnaBridge | 172:65be27845400 | 91 | |
| AnnaBridge | 172:65be27845400 | 92 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 93 | /** @defgroup SWPMI_LL_Exported_Constants SWPMI Exported Constants |
| AnnaBridge | 172:65be27845400 | 94 | * @{ |
| AnnaBridge | 172:65be27845400 | 95 | */ |
| AnnaBridge | 172:65be27845400 | 96 | |
| AnnaBridge | 172:65be27845400 | 97 | /** @defgroup SWPMI_LL_EC_CLEAR_FLAG Clear Flags Defines |
| AnnaBridge | 172:65be27845400 | 98 | * @brief Flags defines which can be used with LL_SWPMI_WriteReg function |
| AnnaBridge | 172:65be27845400 | 99 | * @{ |
| AnnaBridge | 172:65be27845400 | 100 | */ |
| AnnaBridge | 172:65be27845400 | 101 | #define LL_SWPMI_ICR_CRXBFF SWPMI_ICR_CRXBFF /*!< Clear receive buffer full flag */ |
| AnnaBridge | 172:65be27845400 | 102 | #define LL_SWPMI_ICR_CTXBEF SWPMI_ICR_CTXBEF /*!< Clear transmit buffer empty flag */ |
| AnnaBridge | 172:65be27845400 | 103 | #define LL_SWPMI_ICR_CRXBERF SWPMI_ICR_CRXBERF /*!< Clear receive CRC error flag */ |
| AnnaBridge | 172:65be27845400 | 104 | #define LL_SWPMI_ICR_CRXOVRF SWPMI_ICR_CRXOVRF /*!< Clear receive overrun error flag */ |
| AnnaBridge | 172:65be27845400 | 105 | #define LL_SWPMI_ICR_CTXUNRF SWPMI_ICR_CTXUNRF /*!< Clear transmit underrun error flag */ |
| AnnaBridge | 172:65be27845400 | 106 | #define LL_SWPMI_ICR_CTCF SWPMI_ICR_CTCF /*!< Clear transfer complete flag */ |
| AnnaBridge | 172:65be27845400 | 107 | #define LL_SWPMI_ICR_CSRF SWPMI_ICR_CSRF /*!< Clear slave resume flag */ |
| AnnaBridge | 172:65be27845400 | 108 | /** |
| AnnaBridge | 172:65be27845400 | 109 | * @} |
| AnnaBridge | 172:65be27845400 | 110 | */ |
| AnnaBridge | 172:65be27845400 | 111 | |
| AnnaBridge | 172:65be27845400 | 112 | /** @defgroup SWPMI_LL_EC_GET_FLAG Get Flags Defines |
| AnnaBridge | 172:65be27845400 | 113 | * @brief Flags defines which can be used with LL_SWPMI_ReadReg function |
| AnnaBridge | 172:65be27845400 | 114 | * @{ |
| AnnaBridge | 172:65be27845400 | 115 | */ |
| AnnaBridge | 172:65be27845400 | 116 | #define LL_SWPMI_ISR_RXBFF SWPMI_ISR_RXBFF /*!< Receive buffer full flag */ |
| AnnaBridge | 172:65be27845400 | 117 | #define LL_SWPMI_ISR_TXBEF SWPMI_ISR_TXBEF /*!< Transmit buffer empty flag */ |
| AnnaBridge | 172:65be27845400 | 118 | #define LL_SWPMI_ISR_RXBERF SWPMI_ISR_RXBERF /*!< Receive CRC error flag */ |
| AnnaBridge | 172:65be27845400 | 119 | #define LL_SWPMI_ISR_RXOVRF SWPMI_ISR_RXOVRF /*!< Receive overrun error flag */ |
| AnnaBridge | 172:65be27845400 | 120 | #define LL_SWPMI_ISR_TXUNRF SWPMI_ISR_TXUNRF /*!< Transmit underrun error flag */ |
| AnnaBridge | 172:65be27845400 | 121 | #define LL_SWPMI_ISR_RXNE SWPMI_ISR_RXNE /*!< Receive data register not empty */ |
| AnnaBridge | 172:65be27845400 | 122 | #define LL_SWPMI_ISR_TXE SWPMI_ISR_TXE /*!< Transmit data register empty */ |
| AnnaBridge | 172:65be27845400 | 123 | #define LL_SWPMI_ISR_TCF SWPMI_ISR_TCF /*!< Transfer complete flag */ |
| AnnaBridge | 172:65be27845400 | 124 | #define LL_SWPMI_ISR_SRF SWPMI_ISR_SRF /*!< Slave resume flag */ |
| AnnaBridge | 172:65be27845400 | 125 | #define LL_SWPMI_ISR_SUSP SWPMI_ISR_SUSP /*!< SUSPEND flag */ |
| AnnaBridge | 172:65be27845400 | 126 | #define LL_SWPMI_ISR_DEACTF SWPMI_ISR_DEACTF /*!< DEACTIVATED flag */ |
| AnnaBridge | 172:65be27845400 | 127 | /** |
| AnnaBridge | 172:65be27845400 | 128 | * @} |
| AnnaBridge | 172:65be27845400 | 129 | */ |
| AnnaBridge | 172:65be27845400 | 130 | |
| AnnaBridge | 172:65be27845400 | 131 | /** @defgroup SWPMI_LL_EC_IT IT Defines |
| AnnaBridge | 172:65be27845400 | 132 | * @brief IT defines which can be used with LL_SWPMI_ReadReg and LL_SWPMI_WriteReg functions |
| AnnaBridge | 172:65be27845400 | 133 | * @{ |
| AnnaBridge | 172:65be27845400 | 134 | */ |
| AnnaBridge | 172:65be27845400 | 135 | #define LL_SWPMI_IER_SRIE SWPMI_IER_SRIE /*!< Slave resume interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 136 | #define LL_SWPMI_IER_TCIE SWPMI_IER_TCIE /*!< Transmit complete interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 137 | #define LL_SWPMI_IER_TIE SWPMI_IER_TIE /*!< Transmit interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 138 | #define LL_SWPMI_IER_RIE SWPMI_IER_RIE /*!< Receive interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 139 | #define LL_SWPMI_IER_TXUNRIE SWPMI_IER_TXUNRIE /*!< Transmit underrun error interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 140 | #define LL_SWPMI_IER_RXOVRIE SWPMI_IER_RXOVRIE /*!< Receive overrun error interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 141 | #define LL_SWPMI_IER_RXBERIE SWPMI_IER_RXBERIE /*!< Receive CRC error interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 142 | #define LL_SWPMI_IER_TXBEIE SWPMI_IER_TXBEIE /*!< Transmit buffer empty interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 143 | #define LL_SWPMI_IER_RXBFIE SWPMI_IER_RXBFIE /*!< Receive buffer full interrupt enable */ |
| AnnaBridge | 172:65be27845400 | 144 | /** |
| AnnaBridge | 172:65be27845400 | 145 | * @} |
| AnnaBridge | 172:65be27845400 | 146 | */ |
| AnnaBridge | 172:65be27845400 | 147 | |
| AnnaBridge | 172:65be27845400 | 148 | /** @defgroup SWPMI_LL_EC_SW_BUFFER_RX SW BUFFER RX |
| AnnaBridge | 172:65be27845400 | 149 | * @{ |
| AnnaBridge | 172:65be27845400 | 150 | */ |
| AnnaBridge | 172:65be27845400 | 151 | #define LL_SWPMI_SW_BUFFER_RX_SINGLE ((uint32_t)0x00000000) /*!< Single software buffer mode for reception */ |
| AnnaBridge | 172:65be27845400 | 152 | #define LL_SWPMI_SW_BUFFER_RX_MULTI SWPMI_CR_RXMODE /*!< Multi software buffermode for reception */ |
| AnnaBridge | 172:65be27845400 | 153 | /** |
| AnnaBridge | 172:65be27845400 | 154 | * @} |
| AnnaBridge | 172:65be27845400 | 155 | */ |
| AnnaBridge | 172:65be27845400 | 156 | |
| AnnaBridge | 172:65be27845400 | 157 | /** @defgroup SWPMI_LL_EC_SW_BUFFER_TX SW BUFFER TX |
| AnnaBridge | 172:65be27845400 | 158 | * @{ |
| AnnaBridge | 172:65be27845400 | 159 | */ |
| AnnaBridge | 172:65be27845400 | 160 | #define LL_SWPMI_SW_BUFFER_TX_SINGLE ((uint32_t)0x00000000) /*!< Single software buffer mode for transmission */ |
| AnnaBridge | 172:65be27845400 | 161 | #define LL_SWPMI_SW_BUFFER_TX_MULTI SWPMI_CR_TXMODE /*!< Multi software buffermode for transmission */ |
| AnnaBridge | 172:65be27845400 | 162 | /** |
| AnnaBridge | 172:65be27845400 | 163 | * @} |
| AnnaBridge | 172:65be27845400 | 164 | */ |
| AnnaBridge | 172:65be27845400 | 165 | |
| AnnaBridge | 172:65be27845400 | 166 | /** @defgroup SWPMI_LL_EC_VOLTAGE_CLASS VOLTAGE CLASS |
| AnnaBridge | 172:65be27845400 | 167 | * @{ |
| AnnaBridge | 172:65be27845400 | 168 | */ |
| AnnaBridge | 172:65be27845400 | 169 | #define LL_SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) /*!< SWPMI_IO uses directly VDD voltage to operate in class C */ |
| AnnaBridge | 172:65be27845400 | 170 | #define LL_SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS /*!< SWPMI_IO uses an internal voltage regulator to operate in class B */ |
| AnnaBridge | 172:65be27845400 | 171 | /** |
| AnnaBridge | 172:65be27845400 | 172 | * @} |
| AnnaBridge | 172:65be27845400 | 173 | */ |
| AnnaBridge | 172:65be27845400 | 174 | |
| AnnaBridge | 172:65be27845400 | 175 | /** @defgroup SWPMI_LL_EC_DMA_REG_DATA DMA register data |
| AnnaBridge | 172:65be27845400 | 176 | * @{ |
| AnnaBridge | 172:65be27845400 | 177 | */ |
| AnnaBridge | 172:65be27845400 | 178 | #define LL_SWPMI_DMA_REG_DATA_TRANSMIT (uint32_t)0 /*!< Get address of data register used for transmission */ |
| AnnaBridge | 172:65be27845400 | 179 | #define LL_SWPMI_DMA_REG_DATA_RECEIVE (uint32_t)1 /*!< Get address of data register used for reception */ |
| AnnaBridge | 172:65be27845400 | 180 | /** |
| AnnaBridge | 172:65be27845400 | 181 | * @} |
| AnnaBridge | 172:65be27845400 | 182 | */ |
| AnnaBridge | 172:65be27845400 | 183 | |
| AnnaBridge | 172:65be27845400 | 184 | /** |
| AnnaBridge | 172:65be27845400 | 185 | * @} |
| AnnaBridge | 172:65be27845400 | 186 | */ |
| AnnaBridge | 172:65be27845400 | 187 | |
| AnnaBridge | 172:65be27845400 | 188 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 189 | /** @defgroup SWPMI_LL_Exported_Macros SWPMI Exported Macros |
| AnnaBridge | 172:65be27845400 | 190 | * @{ |
| AnnaBridge | 172:65be27845400 | 191 | */ |
| AnnaBridge | 172:65be27845400 | 192 | |
| AnnaBridge | 172:65be27845400 | 193 | /** @defgroup SWPMI_LL_EM_WRITE_READ Common Write and read registers Macros |
| AnnaBridge | 172:65be27845400 | 194 | * @{ |
| AnnaBridge | 172:65be27845400 | 195 | */ |
| AnnaBridge | 172:65be27845400 | 196 | |
| AnnaBridge | 172:65be27845400 | 197 | /** |
| AnnaBridge | 172:65be27845400 | 198 | * @brief Write a value in SWPMI register |
| AnnaBridge | 172:65be27845400 | 199 | * @param __INSTANCE__ SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 200 | * @param __REG__ Register to be written |
| AnnaBridge | 172:65be27845400 | 201 | * @param __VALUE__ Value to be written in the register |
| AnnaBridge | 172:65be27845400 | 202 | * @retval None |
| AnnaBridge | 172:65be27845400 | 203 | */ |
| AnnaBridge | 172:65be27845400 | 204 | #define LL_SWPMI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
| AnnaBridge | 172:65be27845400 | 205 | |
| AnnaBridge | 172:65be27845400 | 206 | /** |
| AnnaBridge | 172:65be27845400 | 207 | * @brief Read a value in SWPMI register |
| AnnaBridge | 172:65be27845400 | 208 | * @param __INSTANCE__ SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 209 | * @param __REG__ Register to be read |
| AnnaBridge | 172:65be27845400 | 210 | * @retval Register value |
| AnnaBridge | 172:65be27845400 | 211 | */ |
| AnnaBridge | 172:65be27845400 | 212 | #define LL_SWPMI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
| AnnaBridge | 172:65be27845400 | 213 | /** |
| AnnaBridge | 172:65be27845400 | 214 | * @} |
| AnnaBridge | 172:65be27845400 | 215 | */ |
| AnnaBridge | 172:65be27845400 | 216 | |
| AnnaBridge | 172:65be27845400 | 217 | /** @defgroup SWPMI_LL_EM_BitRate Bit rate calculation helper Macros |
| AnnaBridge | 172:65be27845400 | 218 | * @{ |
| AnnaBridge | 172:65be27845400 | 219 | */ |
| AnnaBridge | 172:65be27845400 | 220 | |
| AnnaBridge | 172:65be27845400 | 221 | /** |
| AnnaBridge | 172:65be27845400 | 222 | * @brief Helper macro to calculate bit rate value to set in BRR register (@ref LL_SWPMI_SetBitRatePrescaler function) |
| AnnaBridge | 172:65be27845400 | 223 | * @note ex: @ref __LL_SWPMI_CALC_BITRATE_PRESCALER(2000000, 80000000); |
| AnnaBridge | 172:65be27845400 | 224 | * @param __FSWP__ Within the following range: from 100 Kbit/s up to 2Mbit/s (in bit/s) |
| AnnaBridge | 172:65be27845400 | 225 | * @param __FSWPCLK__ PCLK or HSI frequency (in Hz) |
| AnnaBridge | 172:65be27845400 | 226 | * @retval Bitrate prescaler (BRR register) |
| AnnaBridge | 172:65be27845400 | 227 | */ |
| AnnaBridge | 172:65be27845400 | 228 | #define __LL_SWPMI_CALC_BITRATE_PRESCALER(__FSWP__, __FSWPCLK__) ((uint32_t)(((__FSWPCLK__) / ((__FSWP__) * 4)) - 1)) |
| AnnaBridge | 172:65be27845400 | 229 | |
| AnnaBridge | 172:65be27845400 | 230 | /** |
| AnnaBridge | 172:65be27845400 | 231 | * @} |
| AnnaBridge | 172:65be27845400 | 232 | */ |
| AnnaBridge | 172:65be27845400 | 233 | |
| AnnaBridge | 172:65be27845400 | 234 | /** |
| AnnaBridge | 172:65be27845400 | 235 | * @} |
| AnnaBridge | 172:65be27845400 | 236 | */ |
| AnnaBridge | 172:65be27845400 | 237 | |
| AnnaBridge | 172:65be27845400 | 238 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 239 | /** @defgroup SWPMI_LL_Exported_Functions SWPMI Exported Functions |
| AnnaBridge | 172:65be27845400 | 240 | * @{ |
| AnnaBridge | 172:65be27845400 | 241 | */ |
| AnnaBridge | 172:65be27845400 | 242 | |
| AnnaBridge | 172:65be27845400 | 243 | /** @defgroup SWPMI_LL_EF_Configuration Configuration |
| AnnaBridge | 172:65be27845400 | 244 | * @{ |
| AnnaBridge | 172:65be27845400 | 245 | */ |
| AnnaBridge | 172:65be27845400 | 246 | |
| AnnaBridge | 172:65be27845400 | 247 | /** |
| AnnaBridge | 172:65be27845400 | 248 | * @brief Set Reception buffering mode |
| AnnaBridge | 172:65be27845400 | 249 | * @note If Multi software buffer mode is chosen, RXDMA bits must also be set. |
| AnnaBridge | 172:65be27845400 | 250 | * @rmtoll CR RXMODE LL_SWPMI_SetReceptionMode |
| AnnaBridge | 172:65be27845400 | 251 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 252 | * @param RxBufferingMode This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 253 | * @arg @ref LL_SWPMI_SW_BUFFER_RX_SINGLE |
| AnnaBridge | 172:65be27845400 | 254 | * @arg @ref LL_SWPMI_SW_BUFFER_RX_MULTI |
| AnnaBridge | 172:65be27845400 | 255 | * @retval None |
| AnnaBridge | 172:65be27845400 | 256 | */ |
| AnnaBridge | 172:65be27845400 | 257 | __STATIC_INLINE void LL_SWPMI_SetReceptionMode(SWPMI_TypeDef *SWPMIx, uint32_t RxBufferingMode) |
| AnnaBridge | 172:65be27845400 | 258 | { |
| AnnaBridge | 172:65be27845400 | 259 | MODIFY_REG(SWPMIx->CR, SWPMI_CR_RXMODE, RxBufferingMode); |
| AnnaBridge | 172:65be27845400 | 260 | } |
| AnnaBridge | 172:65be27845400 | 261 | |
| AnnaBridge | 172:65be27845400 | 262 | /** |
| AnnaBridge | 172:65be27845400 | 263 | * @brief Get Reception buffering mode |
| AnnaBridge | 172:65be27845400 | 264 | * @rmtoll CR RXMODE LL_SWPMI_GetReceptionMode |
| AnnaBridge | 172:65be27845400 | 265 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 266 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 267 | * @arg @ref LL_SWPMI_SW_BUFFER_RX_SINGLE |
| AnnaBridge | 172:65be27845400 | 268 | * @arg @ref LL_SWPMI_SW_BUFFER_RX_MULTI |
| AnnaBridge | 172:65be27845400 | 269 | */ |
| AnnaBridge | 172:65be27845400 | 270 | __STATIC_INLINE uint32_t LL_SWPMI_GetReceptionMode(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 271 | { |
| AnnaBridge | 172:65be27845400 | 272 | return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_RXMODE)); |
| AnnaBridge | 172:65be27845400 | 273 | } |
| AnnaBridge | 172:65be27845400 | 274 | |
| AnnaBridge | 172:65be27845400 | 275 | /** |
| AnnaBridge | 172:65be27845400 | 276 | * @brief Set Transmission buffering mode |
| AnnaBridge | 172:65be27845400 | 277 | * @note If Multi software buffer mode is chosen, TXDMA bits must also be set. |
| AnnaBridge | 172:65be27845400 | 278 | * @rmtoll CR TXMODE LL_SWPMI_SetTransmissionMode |
| AnnaBridge | 172:65be27845400 | 279 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 280 | * @param TxBufferingMode This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 281 | * @arg @ref LL_SWPMI_SW_BUFFER_TX_SINGLE |
| AnnaBridge | 172:65be27845400 | 282 | * @arg @ref LL_SWPMI_SW_BUFFER_TX_MULTI |
| AnnaBridge | 172:65be27845400 | 283 | * @retval None |
| AnnaBridge | 172:65be27845400 | 284 | */ |
| AnnaBridge | 172:65be27845400 | 285 | __STATIC_INLINE void LL_SWPMI_SetTransmissionMode(SWPMI_TypeDef *SWPMIx, uint32_t TxBufferingMode) |
| AnnaBridge | 172:65be27845400 | 286 | { |
| AnnaBridge | 172:65be27845400 | 287 | MODIFY_REG(SWPMIx->CR, SWPMI_CR_TXMODE, TxBufferingMode); |
| AnnaBridge | 172:65be27845400 | 288 | } |
| AnnaBridge | 172:65be27845400 | 289 | |
| AnnaBridge | 172:65be27845400 | 290 | /** |
| AnnaBridge | 172:65be27845400 | 291 | * @brief Get Transmission buffering mode |
| AnnaBridge | 172:65be27845400 | 292 | * @rmtoll CR TXMODE LL_SWPMI_GetTransmissionMode |
| AnnaBridge | 172:65be27845400 | 293 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 294 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 295 | * @arg @ref LL_SWPMI_SW_BUFFER_TX_SINGLE |
| AnnaBridge | 172:65be27845400 | 296 | * @arg @ref LL_SWPMI_SW_BUFFER_TX_MULTI |
| AnnaBridge | 172:65be27845400 | 297 | */ |
| AnnaBridge | 172:65be27845400 | 298 | __STATIC_INLINE uint32_t LL_SWPMI_GetTransmissionMode(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 299 | { |
| AnnaBridge | 172:65be27845400 | 300 | return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_TXMODE)); |
| AnnaBridge | 172:65be27845400 | 301 | } |
| AnnaBridge | 172:65be27845400 | 302 | |
| AnnaBridge | 172:65be27845400 | 303 | /** |
| AnnaBridge | 172:65be27845400 | 304 | * @brief Enable loopback mode |
| AnnaBridge | 172:65be27845400 | 305 | * @rmtoll CR LPBK LL_SWPMI_EnableLoopback |
| AnnaBridge | 172:65be27845400 | 306 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 307 | * @retval None |
| AnnaBridge | 172:65be27845400 | 308 | */ |
| AnnaBridge | 172:65be27845400 | 309 | __STATIC_INLINE void LL_SWPMI_EnableLoopback(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 310 | { |
| AnnaBridge | 172:65be27845400 | 311 | SET_BIT(SWPMIx->CR, SWPMI_CR_LPBK); |
| AnnaBridge | 172:65be27845400 | 312 | } |
| AnnaBridge | 172:65be27845400 | 313 | |
| AnnaBridge | 172:65be27845400 | 314 | /** |
| AnnaBridge | 172:65be27845400 | 315 | * @brief Disable loopback mode |
| AnnaBridge | 172:65be27845400 | 316 | * @rmtoll CR LPBK LL_SWPMI_DisableLoopback |
| AnnaBridge | 172:65be27845400 | 317 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 318 | * @retval None |
| AnnaBridge | 172:65be27845400 | 319 | */ |
| AnnaBridge | 172:65be27845400 | 320 | __STATIC_INLINE void LL_SWPMI_DisableLoopback(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 321 | { |
| AnnaBridge | 172:65be27845400 | 322 | CLEAR_BIT(SWPMIx->CR, SWPMI_CR_LPBK); |
| AnnaBridge | 172:65be27845400 | 323 | } |
| AnnaBridge | 172:65be27845400 | 324 | |
| AnnaBridge | 172:65be27845400 | 325 | /** |
| AnnaBridge | 172:65be27845400 | 326 | * @brief Enable SWPMI transceiver |
| AnnaBridge | 172:65be27845400 | 327 | * @note SWPMI_IO pin is controlled by SWPMI |
| AnnaBridge | 172:65be27845400 | 328 | * @rmtoll CR SWPEN LL_SWPMI_EnableTransceiver |
| AnnaBridge | 172:65be27845400 | 329 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 330 | * @retval None |
| AnnaBridge | 172:65be27845400 | 331 | */ |
| AnnaBridge | 172:65be27845400 | 332 | __STATIC_INLINE void LL_SWPMI_EnableTransceiver(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 333 | { |
| AnnaBridge | 172:65be27845400 | 334 | SET_BIT(SWPMIx->CR, SWPMI_CR_SWPEN); |
| AnnaBridge | 172:65be27845400 | 335 | } |
| AnnaBridge | 172:65be27845400 | 336 | |
| AnnaBridge | 172:65be27845400 | 337 | /** |
| AnnaBridge | 172:65be27845400 | 338 | * @brief Disable SWPMI transceiver |
| AnnaBridge | 172:65be27845400 | 339 | * @note SWPMI_IO pin is controlled by GPIO controller |
| AnnaBridge | 172:65be27845400 | 340 | * @rmtoll CR SWPEN LL_SWPMI_DisableTransceiver |
| AnnaBridge | 172:65be27845400 | 341 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 342 | * @retval None |
| AnnaBridge | 172:65be27845400 | 343 | */ |
| AnnaBridge | 172:65be27845400 | 344 | __STATIC_INLINE void LL_SWPMI_DisableTransceiver(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 345 | { |
| AnnaBridge | 172:65be27845400 | 346 | CLEAR_BIT(SWPMIx->CR, SWPMI_CR_SWPEN); |
| AnnaBridge | 172:65be27845400 | 347 | } |
| AnnaBridge | 172:65be27845400 | 348 | |
| AnnaBridge | 172:65be27845400 | 349 | /** |
| AnnaBridge | 172:65be27845400 | 350 | * @brief Check if SWPMI transceiver is enabled |
| AnnaBridge | 172:65be27845400 | 351 | * @rmtoll CR SWPEN LL_SWPMI_IsEnabledTransceiver |
| AnnaBridge | 172:65be27845400 | 352 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 353 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 354 | */ |
| AnnaBridge | 172:65be27845400 | 355 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledTransceiver(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 356 | { |
| AnnaBridge | 172:65be27845400 | 357 | return ((READ_BIT(SWPMIx->CR, SWPMI_CR_SWPEN) == (SWPMI_CR_SWPEN)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 358 | } |
| AnnaBridge | 172:65be27845400 | 359 | |
| AnnaBridge | 172:65be27845400 | 360 | /** |
| AnnaBridge | 172:65be27845400 | 361 | * @brief Activate Single wire protocol bus (SUSPENDED or ACTIVATED state) |
| AnnaBridge | 172:65be27845400 | 362 | * @note SWP bus stays in the ACTIVATED state as long as there is a communication |
| AnnaBridge | 172:65be27845400 | 363 | * with the slave, either in transmission or in reception. The SWP bus switches back |
| AnnaBridge | 172:65be27845400 | 364 | * to the SUSPENDED state as soon as there is no more transmission or reception |
| AnnaBridge | 172:65be27845400 | 365 | * activity, after 7 idle bits. |
| AnnaBridge | 172:65be27845400 | 366 | * @rmtoll CR SWPACT LL_SWPMI_Activate |
| AnnaBridge | 172:65be27845400 | 367 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 368 | * @retval None |
| AnnaBridge | 172:65be27845400 | 369 | */ |
| AnnaBridge | 172:65be27845400 | 370 | __STATIC_INLINE void LL_SWPMI_Activate(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 371 | { |
| AnnaBridge | 172:65be27845400 | 372 | /* In order to activate SWP again, the software must clear DEACT bit*/ |
| AnnaBridge | 172:65be27845400 | 373 | CLEAR_BIT(SWPMIx->CR, SWPMI_CR_DEACT); |
| AnnaBridge | 172:65be27845400 | 374 | |
| AnnaBridge | 172:65be27845400 | 375 | /* Set SWACT bit */ |
| AnnaBridge | 172:65be27845400 | 376 | SET_BIT(SWPMIx->CR, SWPMI_CR_SWPACT); |
| AnnaBridge | 172:65be27845400 | 377 | } |
| AnnaBridge | 172:65be27845400 | 378 | |
| AnnaBridge | 172:65be27845400 | 379 | /** |
| AnnaBridge | 172:65be27845400 | 380 | * @brief Check if Single wire protocol bus is in ACTIVATED state. |
| AnnaBridge | 172:65be27845400 | 381 | * @rmtoll CR SWPACT LL_SWPMI_Activate |
| AnnaBridge | 172:65be27845400 | 382 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 383 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 384 | */ |
| AnnaBridge | 172:65be27845400 | 385 | __STATIC_INLINE uint32_t LL_SWPMI_IsActivated(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 386 | { |
| AnnaBridge | 172:65be27845400 | 387 | return ((READ_BIT(SWPMIx->CR, SWPMI_CR_SWPACT) == (SWPMI_CR_SWPACT)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 388 | } |
| AnnaBridge | 172:65be27845400 | 389 | |
| AnnaBridge | 172:65be27845400 | 390 | /** |
| AnnaBridge | 172:65be27845400 | 391 | * @brief Deactivate immediately Single wire protocol bus (immediate transition to |
| AnnaBridge | 172:65be27845400 | 392 | * DEACTIVATED state) |
| AnnaBridge | 172:65be27845400 | 393 | * @rmtoll CR SWPACT LL_SWPMI_Deactivate |
| AnnaBridge | 172:65be27845400 | 394 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 395 | * @retval None |
| AnnaBridge | 172:65be27845400 | 396 | */ |
| AnnaBridge | 172:65be27845400 | 397 | __STATIC_INLINE void LL_SWPMI_Deactivate(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 398 | { |
| AnnaBridge | 172:65be27845400 | 399 | CLEAR_BIT(SWPMIx->CR, SWPMI_CR_SWPACT); |
| AnnaBridge | 172:65be27845400 | 400 | } |
| AnnaBridge | 172:65be27845400 | 401 | |
| AnnaBridge | 172:65be27845400 | 402 | /** |
| AnnaBridge | 172:65be27845400 | 403 | * @brief Request a deactivation of Single wire protocol bus (request to go in DEACTIVATED |
| AnnaBridge | 172:65be27845400 | 404 | * state if no resume from slave) |
| AnnaBridge | 172:65be27845400 | 405 | * @rmtoll CR DEACT LL_SWPMI_RequestDeactivation |
| AnnaBridge | 172:65be27845400 | 406 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 407 | * @retval None |
| AnnaBridge | 172:65be27845400 | 408 | */ |
| AnnaBridge | 172:65be27845400 | 409 | __STATIC_INLINE void LL_SWPMI_RequestDeactivation(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 410 | { |
| AnnaBridge | 172:65be27845400 | 411 | SET_BIT(SWPMIx->CR, SWPMI_CR_DEACT); |
| AnnaBridge | 172:65be27845400 | 412 | } |
| AnnaBridge | 172:65be27845400 | 413 | |
| AnnaBridge | 172:65be27845400 | 414 | /** |
| AnnaBridge | 172:65be27845400 | 415 | * @brief Set Bitrate prescaler SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4) |
| AnnaBridge | 172:65be27845400 | 416 | * @rmtoll BRR BR LL_SWPMI_SetBitRatePrescaler |
| AnnaBridge | 172:65be27845400 | 417 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 418 | * @param BitRatePrescaler A number between Min_Data=0 and Max_Data=255U |
| AnnaBridge | 172:65be27845400 | 419 | * @retval None |
| AnnaBridge | 172:65be27845400 | 420 | */ |
| AnnaBridge | 172:65be27845400 | 421 | __STATIC_INLINE void LL_SWPMI_SetBitRatePrescaler(SWPMI_TypeDef *SWPMIx, uint32_t BitRatePrescaler) |
| AnnaBridge | 172:65be27845400 | 422 | { |
| AnnaBridge | 172:65be27845400 | 423 | WRITE_REG(SWPMIx->BRR, BitRatePrescaler); |
| AnnaBridge | 172:65be27845400 | 424 | } |
| AnnaBridge | 172:65be27845400 | 425 | |
| AnnaBridge | 172:65be27845400 | 426 | /** |
| AnnaBridge | 172:65be27845400 | 427 | * @brief Get Bitrate prescaler |
| AnnaBridge | 172:65be27845400 | 428 | * @rmtoll BRR BR LL_SWPMI_GetBitRatePrescaler |
| AnnaBridge | 172:65be27845400 | 429 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 430 | * @retval A number between Min_Data=0 and Max_Data=255U |
| AnnaBridge | 172:65be27845400 | 431 | */ |
| AnnaBridge | 172:65be27845400 | 432 | __STATIC_INLINE uint32_t LL_SWPMI_GetBitRatePrescaler(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 433 | { |
| AnnaBridge | 172:65be27845400 | 434 | return (uint32_t)(READ_BIT(SWPMIx->BRR, SWPMI_BRR_BR)); |
| AnnaBridge | 172:65be27845400 | 435 | } |
| AnnaBridge | 172:65be27845400 | 436 | |
| AnnaBridge | 172:65be27845400 | 437 | /** |
| AnnaBridge | 172:65be27845400 | 438 | * @brief Set SWP Voltage Class |
| AnnaBridge | 172:65be27845400 | 439 | * @rmtoll OR CLASS LL_SWPMI_SetVoltageClass |
| AnnaBridge | 172:65be27845400 | 440 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 441 | * @param VoltageClass This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 442 | * @arg @ref LL_SWPMI_VOLTAGE_CLASS_C |
| AnnaBridge | 172:65be27845400 | 443 | * @arg @ref LL_SWPMI_VOLTAGE_CLASS_B |
| AnnaBridge | 172:65be27845400 | 444 | * @retval None |
| AnnaBridge | 172:65be27845400 | 445 | */ |
| AnnaBridge | 172:65be27845400 | 446 | __STATIC_INLINE void LL_SWPMI_SetVoltageClass(SWPMI_TypeDef *SWPMIx, uint32_t VoltageClass) |
| AnnaBridge | 172:65be27845400 | 447 | { |
| AnnaBridge | 172:65be27845400 | 448 | MODIFY_REG(SWPMIx->OR, SWPMI_OR_CLASS, VoltageClass); |
| AnnaBridge | 172:65be27845400 | 449 | } |
| AnnaBridge | 172:65be27845400 | 450 | |
| AnnaBridge | 172:65be27845400 | 451 | /** |
| AnnaBridge | 172:65be27845400 | 452 | * @brief Get SWP Voltage Class |
| AnnaBridge | 172:65be27845400 | 453 | * @rmtoll OR CLASS LL_SWPMI_GetVoltageClass |
| AnnaBridge | 172:65be27845400 | 454 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 455 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 456 | * @arg @ref LL_SWPMI_VOLTAGE_CLASS_C |
| AnnaBridge | 172:65be27845400 | 457 | * @arg @ref LL_SWPMI_VOLTAGE_CLASS_B |
| AnnaBridge | 172:65be27845400 | 458 | */ |
| AnnaBridge | 172:65be27845400 | 459 | __STATIC_INLINE uint32_t LL_SWPMI_GetVoltageClass(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 460 | { |
| AnnaBridge | 172:65be27845400 | 461 | return (uint32_t)(READ_BIT(SWPMIx->OR, SWPMI_OR_CLASS)); |
| AnnaBridge | 172:65be27845400 | 462 | } |
| AnnaBridge | 172:65be27845400 | 463 | |
| AnnaBridge | 172:65be27845400 | 464 | /** |
| AnnaBridge | 172:65be27845400 | 465 | * @} |
| AnnaBridge | 172:65be27845400 | 466 | */ |
| AnnaBridge | 172:65be27845400 | 467 | |
| AnnaBridge | 172:65be27845400 | 468 | /** @defgroup SWPMI_LL_EF_FLAG_Management FLAG_Management |
| AnnaBridge | 172:65be27845400 | 469 | * @{ |
| AnnaBridge | 172:65be27845400 | 470 | */ |
| AnnaBridge | 172:65be27845400 | 471 | |
| AnnaBridge | 172:65be27845400 | 472 | /** |
| AnnaBridge | 172:65be27845400 | 473 | * @brief Check if the last word of the frame under reception has arrived in SWPMI_RDR. |
| AnnaBridge | 172:65be27845400 | 474 | * @rmtoll ISR RXBFF LL_SWPMI_IsActiveFlag_RXBF |
| AnnaBridge | 172:65be27845400 | 475 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 476 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 477 | */ |
| AnnaBridge | 172:65be27845400 | 478 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBF(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 479 | { |
| AnnaBridge | 172:65be27845400 | 480 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBFF) == (SWPMI_ISR_RXBFF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 481 | } |
| AnnaBridge | 172:65be27845400 | 482 | |
| AnnaBridge | 172:65be27845400 | 483 | /** |
| AnnaBridge | 172:65be27845400 | 484 | * @brief Check if Frame transmission buffer has been emptied |
| AnnaBridge | 172:65be27845400 | 485 | * @rmtoll ISR TXBEF LL_SWPMI_IsActiveFlag_TXBE |
| AnnaBridge | 172:65be27845400 | 486 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 487 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 488 | */ |
| AnnaBridge | 172:65be27845400 | 489 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXBE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 490 | { |
| AnnaBridge | 172:65be27845400 | 491 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXBEF) == (SWPMI_ISR_TXBEF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 492 | } |
| AnnaBridge | 172:65be27845400 | 493 | |
| AnnaBridge | 172:65be27845400 | 494 | /** |
| AnnaBridge | 172:65be27845400 | 495 | * @brief Check if CRC error in reception has been detected |
| AnnaBridge | 172:65be27845400 | 496 | * @rmtoll ISR RXBERF LL_SWPMI_IsActiveFlag_RXBER |
| AnnaBridge | 172:65be27845400 | 497 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 498 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 499 | */ |
| AnnaBridge | 172:65be27845400 | 500 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBER(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 501 | { |
| AnnaBridge | 172:65be27845400 | 502 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBERF) == (SWPMI_ISR_RXBERF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 503 | } |
| AnnaBridge | 172:65be27845400 | 504 | |
| AnnaBridge | 172:65be27845400 | 505 | /** |
| AnnaBridge | 172:65be27845400 | 506 | * @brief Check if Overrun in reception has been detected |
| AnnaBridge | 172:65be27845400 | 507 | * @rmtoll ISR RXOVRF LL_SWPMI_IsActiveFlag_RXOVR |
| AnnaBridge | 172:65be27845400 | 508 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 509 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 510 | */ |
| AnnaBridge | 172:65be27845400 | 511 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXOVR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 512 | { |
| AnnaBridge | 172:65be27845400 | 513 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXOVRF) == (SWPMI_ISR_RXOVRF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 514 | } |
| AnnaBridge | 172:65be27845400 | 515 | |
| AnnaBridge | 172:65be27845400 | 516 | /** |
| AnnaBridge | 172:65be27845400 | 517 | * @brief Check if underrun error in transmission has been detected |
| AnnaBridge | 172:65be27845400 | 518 | * @rmtoll ISR TXUNRF LL_SWPMI_IsActiveFlag_TXUNR |
| AnnaBridge | 172:65be27845400 | 519 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 520 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 521 | */ |
| AnnaBridge | 172:65be27845400 | 522 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXUNR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 523 | { |
| AnnaBridge | 172:65be27845400 | 524 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXUNRF) == (SWPMI_ISR_TXUNRF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 525 | } |
| AnnaBridge | 172:65be27845400 | 526 | |
| AnnaBridge | 172:65be27845400 | 527 | /** |
| AnnaBridge | 172:65be27845400 | 528 | * @brief Check if Receive data register not empty (it means that Received data is ready |
| AnnaBridge | 172:65be27845400 | 529 | * to be read in the SWPMI_RDR register) |
| AnnaBridge | 172:65be27845400 | 530 | * @rmtoll ISR RXNE LL_SWPMI_IsActiveFlag_RXNE |
| AnnaBridge | 172:65be27845400 | 531 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 532 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 533 | */ |
| AnnaBridge | 172:65be27845400 | 534 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 535 | { |
| AnnaBridge | 172:65be27845400 | 536 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXNE) == (SWPMI_ISR_RXNE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 537 | } |
| AnnaBridge | 172:65be27845400 | 538 | |
| AnnaBridge | 172:65be27845400 | 539 | /** |
| AnnaBridge | 172:65be27845400 | 540 | * @brief Check if Transmit data register is empty (it means that Data written in transmit |
| AnnaBridge | 172:65be27845400 | 541 | * data register SWPMI_TDR has been transmitted and SWPMI_TDR can be written to again) |
| AnnaBridge | 172:65be27845400 | 542 | * @rmtoll ISR TXE LL_SWPMI_IsActiveFlag_TXE |
| AnnaBridge | 172:65be27845400 | 543 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 544 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 545 | */ |
| AnnaBridge | 172:65be27845400 | 546 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 547 | { |
| AnnaBridge | 172:65be27845400 | 548 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXE) == (SWPMI_ISR_TXE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 549 | } |
| AnnaBridge | 172:65be27845400 | 550 | |
| AnnaBridge | 172:65be27845400 | 551 | /** |
| AnnaBridge | 172:65be27845400 | 552 | * @brief Check if Both transmission and reception are completed and SWP is switched to |
| AnnaBridge | 172:65be27845400 | 553 | * the SUSPENDED state |
| AnnaBridge | 172:65be27845400 | 554 | * @rmtoll ISR TCF LL_SWPMI_IsActiveFlag_TC |
| AnnaBridge | 172:65be27845400 | 555 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 556 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 557 | */ |
| AnnaBridge | 172:65be27845400 | 558 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TC(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 559 | { |
| AnnaBridge | 172:65be27845400 | 560 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_TCF) == (SWPMI_ISR_TCF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 561 | } |
| AnnaBridge | 172:65be27845400 | 562 | |
| AnnaBridge | 172:65be27845400 | 563 | /** |
| AnnaBridge | 172:65be27845400 | 564 | * @brief Check if a Resume by slave state has been detected during the SWP bus SUSPENDED |
| AnnaBridge | 172:65be27845400 | 565 | * state |
| AnnaBridge | 172:65be27845400 | 566 | * @rmtoll ISR SRF LL_SWPMI_IsActiveFlag_SR |
| AnnaBridge | 172:65be27845400 | 567 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 568 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 569 | */ |
| AnnaBridge | 172:65be27845400 | 570 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 571 | { |
| AnnaBridge | 172:65be27845400 | 572 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_SRF) == (SWPMI_ISR_SRF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 573 | } |
| AnnaBridge | 172:65be27845400 | 574 | |
| AnnaBridge | 172:65be27845400 | 575 | /** |
| AnnaBridge | 172:65be27845400 | 576 | * @brief Check if SWP bus is in SUSPENDED or DEACTIVATED state |
| AnnaBridge | 172:65be27845400 | 577 | * @rmtoll ISR SUSP LL_SWPMI_IsActiveFlag_SUSP |
| AnnaBridge | 172:65be27845400 | 578 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 579 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 580 | */ |
| AnnaBridge | 172:65be27845400 | 581 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SUSP(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 582 | { |
| AnnaBridge | 172:65be27845400 | 583 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_SUSP) == (SWPMI_ISR_SUSP)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 584 | } |
| AnnaBridge | 172:65be27845400 | 585 | |
| AnnaBridge | 172:65be27845400 | 586 | /** |
| AnnaBridge | 172:65be27845400 | 587 | * @brief Check if SWP bus is in DEACTIVATED state |
| AnnaBridge | 172:65be27845400 | 588 | * @rmtoll ISR DEACTF LL_SWPMI_IsActiveFlag_DEACT |
| AnnaBridge | 172:65be27845400 | 589 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 590 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 591 | */ |
| AnnaBridge | 172:65be27845400 | 592 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_DEACT(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 593 | { |
| AnnaBridge | 172:65be27845400 | 594 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_DEACTF) == (SWPMI_ISR_DEACTF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 595 | } |
| AnnaBridge | 172:65be27845400 | 596 | |
| AnnaBridge | 172:65be27845400 | 597 | /** |
| AnnaBridge | 172:65be27845400 | 598 | * @brief Check if SWPMI transceiver is ready |
| AnnaBridge | 172:65be27845400 | 599 | * @rmtoll ISR RDYF LL_SWPMI_IsActiveFlag_RDYF |
| AnnaBridge | 172:65be27845400 | 600 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 601 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 602 | */ |
| AnnaBridge | 172:65be27845400 | 603 | __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RDYF(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 604 | { |
| AnnaBridge | 172:65be27845400 | 605 | return ((READ_BIT(SWPMIx->ISR, SWPMI_ISR_RDYF) == (SWPMI_ISR_RDYF)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 606 | } |
| AnnaBridge | 172:65be27845400 | 607 | |
| AnnaBridge | 172:65be27845400 | 608 | /** |
| AnnaBridge | 172:65be27845400 | 609 | * @brief Clear receive buffer full flag |
| AnnaBridge | 172:65be27845400 | 610 | * @rmtoll ICR CRXBFF LL_SWPMI_ClearFlag_RXBF |
| AnnaBridge | 172:65be27845400 | 611 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 612 | * @retval None |
| AnnaBridge | 172:65be27845400 | 613 | */ |
| AnnaBridge | 172:65be27845400 | 614 | __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBF(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 615 | { |
| AnnaBridge | 172:65be27845400 | 616 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBFF); |
| AnnaBridge | 172:65be27845400 | 617 | } |
| AnnaBridge | 172:65be27845400 | 618 | |
| AnnaBridge | 172:65be27845400 | 619 | /** |
| AnnaBridge | 172:65be27845400 | 620 | * @brief Clear transmit buffer empty flag |
| AnnaBridge | 172:65be27845400 | 621 | * @rmtoll ICR CTXBEF LL_SWPMI_ClearFlag_TXBE |
| AnnaBridge | 172:65be27845400 | 622 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 623 | * @retval None |
| AnnaBridge | 172:65be27845400 | 624 | */ |
| AnnaBridge | 172:65be27845400 | 625 | __STATIC_INLINE void LL_SWPMI_ClearFlag_TXBE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 626 | { |
| AnnaBridge | 172:65be27845400 | 627 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXBEF); |
| AnnaBridge | 172:65be27845400 | 628 | } |
| AnnaBridge | 172:65be27845400 | 629 | |
| AnnaBridge | 172:65be27845400 | 630 | /** |
| AnnaBridge | 172:65be27845400 | 631 | * @brief Clear receive CRC error flag |
| AnnaBridge | 172:65be27845400 | 632 | * @rmtoll ICR CRXBERF LL_SWPMI_ClearFlag_RXBER |
| AnnaBridge | 172:65be27845400 | 633 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 634 | * @retval None |
| AnnaBridge | 172:65be27845400 | 635 | */ |
| AnnaBridge | 172:65be27845400 | 636 | __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBER(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 637 | { |
| AnnaBridge | 172:65be27845400 | 638 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBERF); |
| AnnaBridge | 172:65be27845400 | 639 | } |
| AnnaBridge | 172:65be27845400 | 640 | |
| AnnaBridge | 172:65be27845400 | 641 | /** |
| AnnaBridge | 172:65be27845400 | 642 | * @brief Clear receive overrun error flag |
| AnnaBridge | 172:65be27845400 | 643 | * @rmtoll ICR CRXOVRF LL_SWPMI_ClearFlag_RXOVR |
| AnnaBridge | 172:65be27845400 | 644 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 645 | * @retval None |
| AnnaBridge | 172:65be27845400 | 646 | */ |
| AnnaBridge | 172:65be27845400 | 647 | __STATIC_INLINE void LL_SWPMI_ClearFlag_RXOVR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 648 | { |
| AnnaBridge | 172:65be27845400 | 649 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXOVRF); |
| AnnaBridge | 172:65be27845400 | 650 | } |
| AnnaBridge | 172:65be27845400 | 651 | |
| AnnaBridge | 172:65be27845400 | 652 | /** |
| AnnaBridge | 172:65be27845400 | 653 | * @brief Clear transmit underrun error flag |
| AnnaBridge | 172:65be27845400 | 654 | * @rmtoll ICR CTXUNRF LL_SWPMI_ClearFlag_TXUNR |
| AnnaBridge | 172:65be27845400 | 655 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 656 | * @retval None |
| AnnaBridge | 172:65be27845400 | 657 | */ |
| AnnaBridge | 172:65be27845400 | 658 | __STATIC_INLINE void LL_SWPMI_ClearFlag_TXUNR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 659 | { |
| AnnaBridge | 172:65be27845400 | 660 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXUNRF); |
| AnnaBridge | 172:65be27845400 | 661 | } |
| AnnaBridge | 172:65be27845400 | 662 | |
| AnnaBridge | 172:65be27845400 | 663 | /** |
| AnnaBridge | 172:65be27845400 | 664 | * @brief Clear transfer complete flag |
| AnnaBridge | 172:65be27845400 | 665 | * @rmtoll ICR CTCF LL_SWPMI_ClearFlag_TC |
| AnnaBridge | 172:65be27845400 | 666 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 667 | * @retval None |
| AnnaBridge | 172:65be27845400 | 668 | */ |
| AnnaBridge | 172:65be27845400 | 669 | __STATIC_INLINE void LL_SWPMI_ClearFlag_TC(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 670 | { |
| AnnaBridge | 172:65be27845400 | 671 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTCF); |
| AnnaBridge | 172:65be27845400 | 672 | } |
| AnnaBridge | 172:65be27845400 | 673 | |
| AnnaBridge | 172:65be27845400 | 674 | /** |
| AnnaBridge | 172:65be27845400 | 675 | * @brief Clear slave resume flag |
| AnnaBridge | 172:65be27845400 | 676 | * @rmtoll ICR CSRF LL_SWPMI_ClearFlag_SR |
| AnnaBridge | 172:65be27845400 | 677 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 678 | * @retval None |
| AnnaBridge | 172:65be27845400 | 679 | */ |
| AnnaBridge | 172:65be27845400 | 680 | __STATIC_INLINE void LL_SWPMI_ClearFlag_SR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 681 | { |
| AnnaBridge | 172:65be27845400 | 682 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CSRF); |
| AnnaBridge | 172:65be27845400 | 683 | } |
| AnnaBridge | 172:65be27845400 | 684 | |
| AnnaBridge | 172:65be27845400 | 685 | /** |
| AnnaBridge | 172:65be27845400 | 686 | * @brief Clear SWPMI transceiver ready flag |
| AnnaBridge | 172:65be27845400 | 687 | * @rmtoll ISR CRDYF LL_SWPMI_ClearFlag_RDY |
| AnnaBridge | 172:65be27845400 | 688 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 689 | * @retval None |
| AnnaBridge | 172:65be27845400 | 690 | */ |
| AnnaBridge | 172:65be27845400 | 691 | __STATIC_INLINE void LL_SWPMI_ClearFlag_RDY(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 692 | { |
| AnnaBridge | 172:65be27845400 | 693 | WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRDYF); |
| AnnaBridge | 172:65be27845400 | 694 | } |
| AnnaBridge | 172:65be27845400 | 695 | |
| AnnaBridge | 172:65be27845400 | 696 | /** |
| AnnaBridge | 172:65be27845400 | 697 | * @} |
| AnnaBridge | 172:65be27845400 | 698 | */ |
| AnnaBridge | 172:65be27845400 | 699 | |
| AnnaBridge | 172:65be27845400 | 700 | /** @defgroup SWPMI_LL_EF_IT_Management IT_Management |
| AnnaBridge | 172:65be27845400 | 701 | * @{ |
| AnnaBridge | 172:65be27845400 | 702 | */ |
| AnnaBridge | 172:65be27845400 | 703 | |
| AnnaBridge | 172:65be27845400 | 704 | /** |
| AnnaBridge | 172:65be27845400 | 705 | * @brief Enable SWPMI transceiver ready interrupt |
| AnnaBridge | 172:65be27845400 | 706 | * @rmtoll IER RDYIE LL_SWPMI_EnableIT_RDY |
| AnnaBridge | 172:65be27845400 | 707 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 708 | * @retval None |
| AnnaBridge | 172:65be27845400 | 709 | */ |
| AnnaBridge | 172:65be27845400 | 710 | __STATIC_INLINE void LL_SWPMI_EnableIT_RDY(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 711 | { |
| AnnaBridge | 172:65be27845400 | 712 | SET_BIT(SWPMIx->IER, SWPMI_IER_RDYIE); |
| AnnaBridge | 172:65be27845400 | 713 | } |
| AnnaBridge | 172:65be27845400 | 714 | |
| AnnaBridge | 172:65be27845400 | 715 | /** |
| AnnaBridge | 172:65be27845400 | 716 | * @brief Enable Slave resume interrupt |
| AnnaBridge | 172:65be27845400 | 717 | * @rmtoll IER SRIE LL_SWPMI_EnableIT_SR |
| AnnaBridge | 172:65be27845400 | 718 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 719 | * @retval None |
| AnnaBridge | 172:65be27845400 | 720 | */ |
| AnnaBridge | 172:65be27845400 | 721 | __STATIC_INLINE void LL_SWPMI_EnableIT_SR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 722 | { |
| AnnaBridge | 172:65be27845400 | 723 | SET_BIT(SWPMIx->IER, SWPMI_IER_SRIE); |
| AnnaBridge | 172:65be27845400 | 724 | } |
| AnnaBridge | 172:65be27845400 | 725 | |
| AnnaBridge | 172:65be27845400 | 726 | /** |
| AnnaBridge | 172:65be27845400 | 727 | * @brief Enable Transmit complete interrupt |
| AnnaBridge | 172:65be27845400 | 728 | * @rmtoll IER TCIE LL_SWPMI_EnableIT_TC |
| AnnaBridge | 172:65be27845400 | 729 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 730 | * @retval None |
| AnnaBridge | 172:65be27845400 | 731 | */ |
| AnnaBridge | 172:65be27845400 | 732 | __STATIC_INLINE void LL_SWPMI_EnableIT_TC(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 733 | { |
| AnnaBridge | 172:65be27845400 | 734 | SET_BIT(SWPMIx->IER, SWPMI_IER_TCIE); |
| AnnaBridge | 172:65be27845400 | 735 | } |
| AnnaBridge | 172:65be27845400 | 736 | |
| AnnaBridge | 172:65be27845400 | 737 | /** |
| AnnaBridge | 172:65be27845400 | 738 | * @brief Enable Transmit interrupt |
| AnnaBridge | 172:65be27845400 | 739 | * @rmtoll IER TIE LL_SWPMI_EnableIT_TX |
| AnnaBridge | 172:65be27845400 | 740 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 741 | * @retval None |
| AnnaBridge | 172:65be27845400 | 742 | */ |
| AnnaBridge | 172:65be27845400 | 743 | __STATIC_INLINE void LL_SWPMI_EnableIT_TX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 744 | { |
| AnnaBridge | 172:65be27845400 | 745 | SET_BIT(SWPMIx->IER, SWPMI_IER_TIE); |
| AnnaBridge | 172:65be27845400 | 746 | } |
| AnnaBridge | 172:65be27845400 | 747 | |
| AnnaBridge | 172:65be27845400 | 748 | /** |
| AnnaBridge | 172:65be27845400 | 749 | * @brief Enable Receive interrupt |
| AnnaBridge | 172:65be27845400 | 750 | * @rmtoll IER RIE LL_SWPMI_EnableIT_RX |
| AnnaBridge | 172:65be27845400 | 751 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 752 | * @retval None |
| AnnaBridge | 172:65be27845400 | 753 | */ |
| AnnaBridge | 172:65be27845400 | 754 | __STATIC_INLINE void LL_SWPMI_EnableIT_RX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 755 | { |
| AnnaBridge | 172:65be27845400 | 756 | SET_BIT(SWPMIx->IER, SWPMI_IER_RIE); |
| AnnaBridge | 172:65be27845400 | 757 | } |
| AnnaBridge | 172:65be27845400 | 758 | |
| AnnaBridge | 172:65be27845400 | 759 | /** |
| AnnaBridge | 172:65be27845400 | 760 | * @brief Enable Transmit underrun error interrupt |
| AnnaBridge | 172:65be27845400 | 761 | * @rmtoll IER TXUNRIE LL_SWPMI_EnableIT_TXUNR |
| AnnaBridge | 172:65be27845400 | 762 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 763 | * @retval None |
| AnnaBridge | 172:65be27845400 | 764 | */ |
| AnnaBridge | 172:65be27845400 | 765 | __STATIC_INLINE void LL_SWPMI_EnableIT_TXUNR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 766 | { |
| AnnaBridge | 172:65be27845400 | 767 | SET_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE); |
| AnnaBridge | 172:65be27845400 | 768 | } |
| AnnaBridge | 172:65be27845400 | 769 | |
| AnnaBridge | 172:65be27845400 | 770 | /** |
| AnnaBridge | 172:65be27845400 | 771 | * @brief Enable Receive overrun error interrupt |
| AnnaBridge | 172:65be27845400 | 772 | * @rmtoll IER RXOVRIE LL_SWPMI_EnableIT_RXOVR |
| AnnaBridge | 172:65be27845400 | 773 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 774 | * @retval None |
| AnnaBridge | 172:65be27845400 | 775 | */ |
| AnnaBridge | 172:65be27845400 | 776 | __STATIC_INLINE void LL_SWPMI_EnableIT_RXOVR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 777 | { |
| AnnaBridge | 172:65be27845400 | 778 | SET_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE); |
| AnnaBridge | 172:65be27845400 | 779 | } |
| AnnaBridge | 172:65be27845400 | 780 | |
| AnnaBridge | 172:65be27845400 | 781 | /** |
| AnnaBridge | 172:65be27845400 | 782 | * @brief Enable Receive CRC error interrupt |
| AnnaBridge | 172:65be27845400 | 783 | * @rmtoll IER RXBERIE LL_SWPMI_EnableIT_RXBER |
| AnnaBridge | 172:65be27845400 | 784 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 785 | * @retval None |
| AnnaBridge | 172:65be27845400 | 786 | */ |
| AnnaBridge | 172:65be27845400 | 787 | __STATIC_INLINE void LL_SWPMI_EnableIT_RXBER(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 788 | { |
| AnnaBridge | 172:65be27845400 | 789 | SET_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE); |
| AnnaBridge | 172:65be27845400 | 790 | } |
| AnnaBridge | 172:65be27845400 | 791 | |
| AnnaBridge | 172:65be27845400 | 792 | /** |
| AnnaBridge | 172:65be27845400 | 793 | * @brief Enable Transmit buffer empty interrupt |
| AnnaBridge | 172:65be27845400 | 794 | * @rmtoll IER TXBEIE LL_SWPMI_EnableIT_TXBE |
| AnnaBridge | 172:65be27845400 | 795 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 796 | * @retval None |
| AnnaBridge | 172:65be27845400 | 797 | */ |
| AnnaBridge | 172:65be27845400 | 798 | __STATIC_INLINE void LL_SWPMI_EnableIT_TXBE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 799 | { |
| AnnaBridge | 172:65be27845400 | 800 | SET_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE); |
| AnnaBridge | 172:65be27845400 | 801 | } |
| AnnaBridge | 172:65be27845400 | 802 | |
| AnnaBridge | 172:65be27845400 | 803 | /** |
| AnnaBridge | 172:65be27845400 | 804 | * @brief Enable Receive buffer full interrupt |
| AnnaBridge | 172:65be27845400 | 805 | * @rmtoll IER RXBFIE LL_SWPMI_EnableIT_RXBF |
| AnnaBridge | 172:65be27845400 | 806 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 807 | * @retval None |
| AnnaBridge | 172:65be27845400 | 808 | */ |
| AnnaBridge | 172:65be27845400 | 809 | __STATIC_INLINE void LL_SWPMI_EnableIT_RXBF(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 810 | { |
| AnnaBridge | 172:65be27845400 | 811 | SET_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE); |
| AnnaBridge | 172:65be27845400 | 812 | } |
| AnnaBridge | 172:65be27845400 | 813 | |
| AnnaBridge | 172:65be27845400 | 814 | /** |
| AnnaBridge | 172:65be27845400 | 815 | * @brief Disable SWPMI transceiver ready interrupt |
| AnnaBridge | 172:65be27845400 | 816 | * @rmtoll IER RDYIE LL_SWPMI_DisableIT_RDY |
| AnnaBridge | 172:65be27845400 | 817 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 818 | * @retval None |
| AnnaBridge | 172:65be27845400 | 819 | */ |
| AnnaBridge | 172:65be27845400 | 820 | __STATIC_INLINE void LL_SWPMI_DisableIT_RDY(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 821 | { |
| AnnaBridge | 172:65be27845400 | 822 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RDYIE); |
| AnnaBridge | 172:65be27845400 | 823 | } |
| AnnaBridge | 172:65be27845400 | 824 | |
| AnnaBridge | 172:65be27845400 | 825 | /** |
| AnnaBridge | 172:65be27845400 | 826 | * @brief Disable Slave resume interrupt |
| AnnaBridge | 172:65be27845400 | 827 | * @rmtoll IER SRIE LL_SWPMI_DisableIT_SR |
| AnnaBridge | 172:65be27845400 | 828 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 829 | * @retval None |
| AnnaBridge | 172:65be27845400 | 830 | */ |
| AnnaBridge | 172:65be27845400 | 831 | __STATIC_INLINE void LL_SWPMI_DisableIT_SR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 832 | { |
| AnnaBridge | 172:65be27845400 | 833 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_SRIE); |
| AnnaBridge | 172:65be27845400 | 834 | } |
| AnnaBridge | 172:65be27845400 | 835 | |
| AnnaBridge | 172:65be27845400 | 836 | /** |
| AnnaBridge | 172:65be27845400 | 837 | * @brief Disable Transmit complete interrupt |
| AnnaBridge | 172:65be27845400 | 838 | * @rmtoll IER TCIE LL_SWPMI_DisableIT_TC |
| AnnaBridge | 172:65be27845400 | 839 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 840 | * @retval None |
| AnnaBridge | 172:65be27845400 | 841 | */ |
| AnnaBridge | 172:65be27845400 | 842 | __STATIC_INLINE void LL_SWPMI_DisableIT_TC(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 843 | { |
| AnnaBridge | 172:65be27845400 | 844 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TCIE); |
| AnnaBridge | 172:65be27845400 | 845 | } |
| AnnaBridge | 172:65be27845400 | 846 | |
| AnnaBridge | 172:65be27845400 | 847 | /** |
| AnnaBridge | 172:65be27845400 | 848 | * @brief Disable Transmit interrupt |
| AnnaBridge | 172:65be27845400 | 849 | * @rmtoll IER TIE LL_SWPMI_DisableIT_TX |
| AnnaBridge | 172:65be27845400 | 850 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 851 | * @retval None |
| AnnaBridge | 172:65be27845400 | 852 | */ |
| AnnaBridge | 172:65be27845400 | 853 | __STATIC_INLINE void LL_SWPMI_DisableIT_TX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 854 | { |
| AnnaBridge | 172:65be27845400 | 855 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TIE); |
| AnnaBridge | 172:65be27845400 | 856 | } |
| AnnaBridge | 172:65be27845400 | 857 | |
| AnnaBridge | 172:65be27845400 | 858 | /** |
| AnnaBridge | 172:65be27845400 | 859 | * @brief Disable Receive interrupt |
| AnnaBridge | 172:65be27845400 | 860 | * @rmtoll IER RIE LL_SWPMI_DisableIT_RX |
| AnnaBridge | 172:65be27845400 | 861 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 862 | * @retval None |
| AnnaBridge | 172:65be27845400 | 863 | */ |
| AnnaBridge | 172:65be27845400 | 864 | __STATIC_INLINE void LL_SWPMI_DisableIT_RX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 865 | { |
| AnnaBridge | 172:65be27845400 | 866 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RIE); |
| AnnaBridge | 172:65be27845400 | 867 | } |
| AnnaBridge | 172:65be27845400 | 868 | |
| AnnaBridge | 172:65be27845400 | 869 | /** |
| AnnaBridge | 172:65be27845400 | 870 | * @brief Disable Transmit underrun error interrupt |
| AnnaBridge | 172:65be27845400 | 871 | * @rmtoll IER TXUNRIE LL_SWPMI_DisableIT_TXUNR |
| AnnaBridge | 172:65be27845400 | 872 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 873 | * @retval None |
| AnnaBridge | 172:65be27845400 | 874 | */ |
| AnnaBridge | 172:65be27845400 | 875 | __STATIC_INLINE void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 876 | { |
| AnnaBridge | 172:65be27845400 | 877 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE); |
| AnnaBridge | 172:65be27845400 | 878 | } |
| AnnaBridge | 172:65be27845400 | 879 | |
| AnnaBridge | 172:65be27845400 | 880 | /** |
| AnnaBridge | 172:65be27845400 | 881 | * @brief Disable Receive overrun error interrupt |
| AnnaBridge | 172:65be27845400 | 882 | * @rmtoll IER RXOVRIE LL_SWPMI_DisableIT_RXOVR |
| AnnaBridge | 172:65be27845400 | 883 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 884 | * @retval None |
| AnnaBridge | 172:65be27845400 | 885 | */ |
| AnnaBridge | 172:65be27845400 | 886 | __STATIC_INLINE void LL_SWPMI_DisableIT_RXOVR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 887 | { |
| AnnaBridge | 172:65be27845400 | 888 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE); |
| AnnaBridge | 172:65be27845400 | 889 | } |
| AnnaBridge | 172:65be27845400 | 890 | |
| AnnaBridge | 172:65be27845400 | 891 | /** |
| AnnaBridge | 172:65be27845400 | 892 | * @brief Disable Receive CRC error interrupt |
| AnnaBridge | 172:65be27845400 | 893 | * @rmtoll IER RXBERIE LL_SWPMI_DisableIT_RXBER |
| AnnaBridge | 172:65be27845400 | 894 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 895 | * @retval None |
| AnnaBridge | 172:65be27845400 | 896 | */ |
| AnnaBridge | 172:65be27845400 | 897 | __STATIC_INLINE void LL_SWPMI_DisableIT_RXBER(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 898 | { |
| AnnaBridge | 172:65be27845400 | 899 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE); |
| AnnaBridge | 172:65be27845400 | 900 | } |
| AnnaBridge | 172:65be27845400 | 901 | |
| AnnaBridge | 172:65be27845400 | 902 | /** |
| AnnaBridge | 172:65be27845400 | 903 | * @brief Disable Transmit buffer empty interrupt |
| AnnaBridge | 172:65be27845400 | 904 | * @rmtoll IER TXBEIE LL_SWPMI_DisableIT_TXBE |
| AnnaBridge | 172:65be27845400 | 905 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 906 | * @retval None |
| AnnaBridge | 172:65be27845400 | 907 | */ |
| AnnaBridge | 172:65be27845400 | 908 | __STATIC_INLINE void LL_SWPMI_DisableIT_TXBE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 909 | { |
| AnnaBridge | 172:65be27845400 | 910 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE); |
| AnnaBridge | 172:65be27845400 | 911 | } |
| AnnaBridge | 172:65be27845400 | 912 | |
| AnnaBridge | 172:65be27845400 | 913 | /** |
| AnnaBridge | 172:65be27845400 | 914 | * @brief Disable Receive buffer full interrupt |
| AnnaBridge | 172:65be27845400 | 915 | * @rmtoll IER RXBFIE LL_SWPMI_DisableIT_RXBF |
| AnnaBridge | 172:65be27845400 | 916 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 917 | * @retval None |
| AnnaBridge | 172:65be27845400 | 918 | */ |
| AnnaBridge | 172:65be27845400 | 919 | __STATIC_INLINE void LL_SWPMI_DisableIT_RXBF(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 920 | { |
| AnnaBridge | 172:65be27845400 | 921 | CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE); |
| AnnaBridge | 172:65be27845400 | 922 | } |
| AnnaBridge | 172:65be27845400 | 923 | |
| AnnaBridge | 172:65be27845400 | 924 | /** |
| AnnaBridge | 172:65be27845400 | 925 | * @brief Check if SWPMI transceiver ready interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 926 | * @rmtoll IER RDYIE LL_SWPMI_IsEnabledIT_RDY |
| AnnaBridge | 172:65be27845400 | 927 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 928 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 929 | */ |
| AnnaBridge | 172:65be27845400 | 930 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RDY(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 931 | { |
| AnnaBridge | 172:65be27845400 | 932 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RDYIE) == (SWPMI_IER_RDYIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 933 | } |
| AnnaBridge | 172:65be27845400 | 934 | |
| AnnaBridge | 172:65be27845400 | 935 | /** |
| AnnaBridge | 172:65be27845400 | 936 | * @brief Check if Slave resume interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 937 | * @rmtoll IER SRIE LL_SWPMI_IsEnabledIT_SR |
| AnnaBridge | 172:65be27845400 | 938 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 939 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 940 | */ |
| AnnaBridge | 172:65be27845400 | 941 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_SR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 942 | { |
| AnnaBridge | 172:65be27845400 | 943 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_SRIE) == (SWPMI_IER_SRIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 944 | } |
| AnnaBridge | 172:65be27845400 | 945 | |
| AnnaBridge | 172:65be27845400 | 946 | /** |
| AnnaBridge | 172:65be27845400 | 947 | * @brief Check if Transmit complete interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 948 | * @rmtoll IER TCIE LL_SWPMI_IsEnabledIT_TC |
| AnnaBridge | 172:65be27845400 | 949 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 950 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 951 | */ |
| AnnaBridge | 172:65be27845400 | 952 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TC(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 953 | { |
| AnnaBridge | 172:65be27845400 | 954 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TCIE) == (SWPMI_IER_TCIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 955 | } |
| AnnaBridge | 172:65be27845400 | 956 | |
| AnnaBridge | 172:65be27845400 | 957 | /** |
| AnnaBridge | 172:65be27845400 | 958 | * @brief Check if Transmit interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 959 | * @rmtoll IER TIE LL_SWPMI_IsEnabledIT_TX |
| AnnaBridge | 172:65be27845400 | 960 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 961 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 962 | */ |
| AnnaBridge | 172:65be27845400 | 963 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 964 | { |
| AnnaBridge | 172:65be27845400 | 965 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TIE) == (SWPMI_IER_TIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 966 | } |
| AnnaBridge | 172:65be27845400 | 967 | |
| AnnaBridge | 172:65be27845400 | 968 | /** |
| AnnaBridge | 172:65be27845400 | 969 | * @brief Check if Receive interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 970 | * @rmtoll IER RIE LL_SWPMI_IsEnabledIT_RX |
| AnnaBridge | 172:65be27845400 | 971 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 972 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 973 | */ |
| AnnaBridge | 172:65be27845400 | 974 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 975 | { |
| AnnaBridge | 172:65be27845400 | 976 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RIE) == (SWPMI_IER_RIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 977 | } |
| AnnaBridge | 172:65be27845400 | 978 | |
| AnnaBridge | 172:65be27845400 | 979 | /** |
| AnnaBridge | 172:65be27845400 | 980 | * @brief Check if Transmit underrun error interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 981 | * @rmtoll IER TXUNRIE LL_SWPMI_IsEnabledIT_TXUNR |
| AnnaBridge | 172:65be27845400 | 982 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 983 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 984 | */ |
| AnnaBridge | 172:65be27845400 | 985 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXUNR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 986 | { |
| AnnaBridge | 172:65be27845400 | 987 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE) == (SWPMI_IER_TXUNRIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 988 | } |
| AnnaBridge | 172:65be27845400 | 989 | |
| AnnaBridge | 172:65be27845400 | 990 | /** |
| AnnaBridge | 172:65be27845400 | 991 | * @brief Check if Receive overrun error interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 992 | * @rmtoll IER RXOVRIE LL_SWPMI_IsEnabledIT_RXOVR |
| AnnaBridge | 172:65be27845400 | 993 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 994 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 995 | */ |
| AnnaBridge | 172:65be27845400 | 996 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXOVR(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 997 | { |
| AnnaBridge | 172:65be27845400 | 998 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE) == (SWPMI_IER_RXOVRIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 999 | } |
| AnnaBridge | 172:65be27845400 | 1000 | |
| AnnaBridge | 172:65be27845400 | 1001 | /** |
| AnnaBridge | 172:65be27845400 | 1002 | * @brief Check if Receive CRC error interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 1003 | * @rmtoll IER RXBERIE LL_SWPMI_IsEnabledIT_RXBER |
| AnnaBridge | 172:65be27845400 | 1004 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1005 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 1006 | */ |
| AnnaBridge | 172:65be27845400 | 1007 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBER(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1008 | { |
| AnnaBridge | 172:65be27845400 | 1009 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE) == (SWPMI_IER_RXBERIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 1010 | } |
| AnnaBridge | 172:65be27845400 | 1011 | |
| AnnaBridge | 172:65be27845400 | 1012 | /** |
| AnnaBridge | 172:65be27845400 | 1013 | * @brief Check if Transmit buffer empty interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 1014 | * @rmtoll IER TXBEIE LL_SWPMI_IsEnabledIT_TXBE |
| AnnaBridge | 172:65be27845400 | 1015 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1016 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 1017 | */ |
| AnnaBridge | 172:65be27845400 | 1018 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXBE(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1019 | { |
| AnnaBridge | 172:65be27845400 | 1020 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE) == (SWPMI_IER_TXBEIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 1021 | } |
| AnnaBridge | 172:65be27845400 | 1022 | |
| AnnaBridge | 172:65be27845400 | 1023 | /** |
| AnnaBridge | 172:65be27845400 | 1024 | * @brief Check if Receive buffer full interrupt is enabled |
| AnnaBridge | 172:65be27845400 | 1025 | * @rmtoll IER RXBFIE LL_SWPMI_IsEnabledIT_RXBF |
| AnnaBridge | 172:65be27845400 | 1026 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1027 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 1028 | */ |
| AnnaBridge | 172:65be27845400 | 1029 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBF(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1030 | { |
| AnnaBridge | 172:65be27845400 | 1031 | return ((READ_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE) == (SWPMI_IER_RXBFIE)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 1032 | } |
| AnnaBridge | 172:65be27845400 | 1033 | |
| AnnaBridge | 172:65be27845400 | 1034 | /** |
| AnnaBridge | 172:65be27845400 | 1035 | * @} |
| AnnaBridge | 172:65be27845400 | 1036 | */ |
| AnnaBridge | 172:65be27845400 | 1037 | |
| AnnaBridge | 172:65be27845400 | 1038 | /** @defgroup SWPMI_LL_EF_DMA_Management DMA_Management |
| AnnaBridge | 172:65be27845400 | 1039 | * @{ |
| AnnaBridge | 172:65be27845400 | 1040 | */ |
| AnnaBridge | 172:65be27845400 | 1041 | |
| AnnaBridge | 172:65be27845400 | 1042 | /** |
| AnnaBridge | 172:65be27845400 | 1043 | * @brief Enable DMA mode for reception |
| AnnaBridge | 172:65be27845400 | 1044 | * @rmtoll CR RXDMA LL_SWPMI_EnableDMAReq_RX |
| AnnaBridge | 172:65be27845400 | 1045 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1046 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1047 | */ |
| AnnaBridge | 172:65be27845400 | 1048 | __STATIC_INLINE void LL_SWPMI_EnableDMAReq_RX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1049 | { |
| AnnaBridge | 172:65be27845400 | 1050 | SET_BIT(SWPMIx->CR, SWPMI_CR_RXDMA); |
| AnnaBridge | 172:65be27845400 | 1051 | } |
| AnnaBridge | 172:65be27845400 | 1052 | |
| AnnaBridge | 172:65be27845400 | 1053 | /** |
| AnnaBridge | 172:65be27845400 | 1054 | * @brief Disable DMA mode for reception |
| AnnaBridge | 172:65be27845400 | 1055 | * @rmtoll CR RXDMA LL_SWPMI_DisableDMAReq_RX |
| AnnaBridge | 172:65be27845400 | 1056 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1057 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1058 | */ |
| AnnaBridge | 172:65be27845400 | 1059 | __STATIC_INLINE void LL_SWPMI_DisableDMAReq_RX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1060 | { |
| AnnaBridge | 172:65be27845400 | 1061 | CLEAR_BIT(SWPMIx->CR, SWPMI_CR_RXDMA); |
| AnnaBridge | 172:65be27845400 | 1062 | } |
| AnnaBridge | 172:65be27845400 | 1063 | |
| AnnaBridge | 172:65be27845400 | 1064 | /** |
| AnnaBridge | 172:65be27845400 | 1065 | * @brief Check if DMA mode for reception is enabled |
| AnnaBridge | 172:65be27845400 | 1066 | * @rmtoll CR RXDMA LL_SWPMI_IsEnabledDMAReq_RX |
| AnnaBridge | 172:65be27845400 | 1067 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1068 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 1069 | */ |
| AnnaBridge | 172:65be27845400 | 1070 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_RX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1071 | { |
| AnnaBridge | 172:65be27845400 | 1072 | return ((READ_BIT(SWPMIx->CR, SWPMI_CR_RXDMA) == (SWPMI_CR_RXDMA)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 1073 | } |
| AnnaBridge | 172:65be27845400 | 1074 | |
| AnnaBridge | 172:65be27845400 | 1075 | /** |
| AnnaBridge | 172:65be27845400 | 1076 | * @brief Enable DMA mode for transmission |
| AnnaBridge | 172:65be27845400 | 1077 | * @rmtoll CR TXDMA LL_SWPMI_EnableDMAReq_TX |
| AnnaBridge | 172:65be27845400 | 1078 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1079 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1080 | */ |
| AnnaBridge | 172:65be27845400 | 1081 | __STATIC_INLINE void LL_SWPMI_EnableDMAReq_TX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1082 | { |
| AnnaBridge | 172:65be27845400 | 1083 | SET_BIT(SWPMIx->CR, SWPMI_CR_TXDMA); |
| AnnaBridge | 172:65be27845400 | 1084 | } |
| AnnaBridge | 172:65be27845400 | 1085 | |
| AnnaBridge | 172:65be27845400 | 1086 | /** |
| AnnaBridge | 172:65be27845400 | 1087 | * @brief Disable DMA mode for transmission |
| AnnaBridge | 172:65be27845400 | 1088 | * @rmtoll CR TXDMA LL_SWPMI_DisableDMAReq_TX |
| AnnaBridge | 172:65be27845400 | 1089 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1090 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1091 | */ |
| AnnaBridge | 172:65be27845400 | 1092 | __STATIC_INLINE void LL_SWPMI_DisableDMAReq_TX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1093 | { |
| AnnaBridge | 172:65be27845400 | 1094 | CLEAR_BIT(SWPMIx->CR, SWPMI_CR_TXDMA); |
| AnnaBridge | 172:65be27845400 | 1095 | } |
| AnnaBridge | 172:65be27845400 | 1096 | |
| AnnaBridge | 172:65be27845400 | 1097 | /** |
| AnnaBridge | 172:65be27845400 | 1098 | * @brief Check if DMA mode for transmission is enabled |
| AnnaBridge | 172:65be27845400 | 1099 | * @rmtoll CR TXDMA LL_SWPMI_IsEnabledDMAReq_TX |
| AnnaBridge | 172:65be27845400 | 1100 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1101 | * @retval State of bit (1 or 0). |
| AnnaBridge | 172:65be27845400 | 1102 | */ |
| AnnaBridge | 172:65be27845400 | 1103 | __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_TX(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1104 | { |
| AnnaBridge | 172:65be27845400 | 1105 | return ((READ_BIT(SWPMIx->CR, SWPMI_CR_TXDMA) == (SWPMI_CR_TXDMA)) ? 1UL : 0UL); |
| AnnaBridge | 172:65be27845400 | 1106 | } |
| AnnaBridge | 172:65be27845400 | 1107 | |
| AnnaBridge | 172:65be27845400 | 1108 | /** |
| AnnaBridge | 172:65be27845400 | 1109 | * @brief Get the data register address used for DMA transfer |
| AnnaBridge | 172:65be27845400 | 1110 | * @rmtoll TDR TD LL_SWPMI_DMA_GetRegAddr\n |
| AnnaBridge | 172:65be27845400 | 1111 | * RDR RD LL_SWPMI_DMA_GetRegAddr |
| AnnaBridge | 172:65be27845400 | 1112 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1113 | * @param Direction This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 1114 | * @arg @ref LL_SWPMI_DMA_REG_DATA_TRANSMIT |
| AnnaBridge | 172:65be27845400 | 1115 | * @arg @ref LL_SWPMI_DMA_REG_DATA_RECEIVE |
| AnnaBridge | 172:65be27845400 | 1116 | * @retval Address of data register |
| AnnaBridge | 172:65be27845400 | 1117 | */ |
| AnnaBridge | 172:65be27845400 | 1118 | __STATIC_INLINE uint32_t LL_SWPMI_DMA_GetRegAddr(SWPMI_TypeDef *SWPMIx, uint32_t Direction) |
| AnnaBridge | 172:65be27845400 | 1119 | { |
| AnnaBridge | 172:65be27845400 | 1120 | uint32_t data_reg_addr; |
| AnnaBridge | 172:65be27845400 | 1121 | |
| AnnaBridge | 172:65be27845400 | 1122 | if (Direction == LL_SWPMI_DMA_REG_DATA_TRANSMIT) |
| AnnaBridge | 172:65be27845400 | 1123 | { |
| AnnaBridge | 172:65be27845400 | 1124 | /* return address of TDR register */ |
| AnnaBridge | 172:65be27845400 | 1125 | data_reg_addr = (uint32_t)&(SWPMIx->TDR); |
| AnnaBridge | 172:65be27845400 | 1126 | } |
| AnnaBridge | 172:65be27845400 | 1127 | else |
| AnnaBridge | 172:65be27845400 | 1128 | { |
| AnnaBridge | 172:65be27845400 | 1129 | /* return address of RDR register */ |
| AnnaBridge | 172:65be27845400 | 1130 | data_reg_addr = (uint32_t)&(SWPMIx->RDR); |
| AnnaBridge | 172:65be27845400 | 1131 | } |
| AnnaBridge | 172:65be27845400 | 1132 | |
| AnnaBridge | 172:65be27845400 | 1133 | return data_reg_addr; |
| AnnaBridge | 172:65be27845400 | 1134 | } |
| AnnaBridge | 172:65be27845400 | 1135 | |
| AnnaBridge | 172:65be27845400 | 1136 | /** |
| AnnaBridge | 172:65be27845400 | 1137 | * @} |
| AnnaBridge | 172:65be27845400 | 1138 | */ |
| AnnaBridge | 172:65be27845400 | 1139 | |
| AnnaBridge | 172:65be27845400 | 1140 | /** @defgroup SWPMI_LL_EF_Data_Management Data_Management |
| AnnaBridge | 172:65be27845400 | 1141 | * @{ |
| AnnaBridge | 172:65be27845400 | 1142 | */ |
| AnnaBridge | 172:65be27845400 | 1143 | |
| AnnaBridge | 172:65be27845400 | 1144 | /** |
| AnnaBridge | 172:65be27845400 | 1145 | * @brief Retrieve number of data bytes present in payload of received frame |
| AnnaBridge | 172:65be27845400 | 1146 | * @rmtoll RFL RFL LL_SWPMI_GetReceiveFrameLength |
| AnnaBridge | 172:65be27845400 | 1147 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1148 | * @retval Value between Min_Data=0x00 and Max_Data=0x1F |
| AnnaBridge | 172:65be27845400 | 1149 | */ |
| AnnaBridge | 172:65be27845400 | 1150 | __STATIC_INLINE uint32_t LL_SWPMI_GetReceiveFrameLength(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1151 | { |
| AnnaBridge | 172:65be27845400 | 1152 | return (uint32_t)(READ_BIT(SWPMIx->RFL, SWPMI_RFL_RFL)); |
| AnnaBridge | 172:65be27845400 | 1153 | } |
| AnnaBridge | 172:65be27845400 | 1154 | |
| AnnaBridge | 172:65be27845400 | 1155 | /** |
| AnnaBridge | 172:65be27845400 | 1156 | * @brief Transmit Data Register |
| AnnaBridge | 172:65be27845400 | 1157 | * @rmtoll TDR TD LL_SWPMI_TransmitData32 |
| AnnaBridge | 172:65be27845400 | 1158 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1159 | * @param TxData Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 172:65be27845400 | 1160 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1161 | */ |
| AnnaBridge | 172:65be27845400 | 1162 | __STATIC_INLINE void LL_SWPMI_TransmitData32(SWPMI_TypeDef *SWPMIx, uint32_t TxData) |
| AnnaBridge | 172:65be27845400 | 1163 | { |
| AnnaBridge | 172:65be27845400 | 1164 | WRITE_REG(SWPMIx->TDR, TxData); |
| AnnaBridge | 172:65be27845400 | 1165 | } |
| AnnaBridge | 172:65be27845400 | 1166 | |
| AnnaBridge | 172:65be27845400 | 1167 | /** |
| AnnaBridge | 172:65be27845400 | 1168 | * @brief Receive Data Register |
| AnnaBridge | 172:65be27845400 | 1169 | * @rmtoll RDR RD LL_SWPMI_ReceiveData32 |
| AnnaBridge | 172:65be27845400 | 1170 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1171 | * @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF |
| AnnaBridge | 172:65be27845400 | 1172 | */ |
| AnnaBridge | 172:65be27845400 | 1173 | __STATIC_INLINE uint32_t LL_SWPMI_ReceiveData32(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1174 | { |
| AnnaBridge | 172:65be27845400 | 1175 | return (uint32_t)(READ_BIT(SWPMIx->RDR, SWPMI_RDR_RD)); |
| AnnaBridge | 172:65be27845400 | 1176 | } |
| AnnaBridge | 172:65be27845400 | 1177 | |
| AnnaBridge | 172:65be27845400 | 1178 | /** |
| AnnaBridge | 172:65be27845400 | 1179 | * @brief Enable SWP Transceiver Bypass |
| AnnaBridge | 172:65be27845400 | 1180 | * @note The external interface for SWPMI is SWPMI_IO |
| AnnaBridge | 172:65be27845400 | 1181 | * (SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are not available on GPIOs) |
| AnnaBridge | 172:65be27845400 | 1182 | * @rmtoll OR TBYP LL_SWPMI_EnableTXBypass |
| AnnaBridge | 172:65be27845400 | 1183 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1184 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1185 | */ |
| AnnaBridge | 172:65be27845400 | 1186 | __STATIC_INLINE void LL_SWPMI_EnableTXBypass(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1187 | { |
| AnnaBridge | 172:65be27845400 | 1188 | CLEAR_BIT(SWPMIx->OR, SWPMI_OR_TBYP); |
| AnnaBridge | 172:65be27845400 | 1189 | } |
| AnnaBridge | 172:65be27845400 | 1190 | |
| AnnaBridge | 172:65be27845400 | 1191 | /** |
| AnnaBridge | 172:65be27845400 | 1192 | * @brief Disable SWP Transceiver Bypass |
| AnnaBridge | 172:65be27845400 | 1193 | * @note SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are available as alternate |
| AnnaBridge | 172:65be27845400 | 1194 | * function on GPIOs. This configuration is selected to connect an external transceiver |
| AnnaBridge | 172:65be27845400 | 1195 | * @note In SWPMI_IO bypass mode, SWPEN bit in SWPMI_CR register must be kept cleared |
| AnnaBridge | 172:65be27845400 | 1196 | * @rmtoll OR TBYP LL_SWPMI_DisableTXBypass |
| AnnaBridge | 172:65be27845400 | 1197 | * @param SWPMIx SWPMI Instance |
| AnnaBridge | 172:65be27845400 | 1198 | * @retval None |
| AnnaBridge | 172:65be27845400 | 1199 | */ |
| AnnaBridge | 172:65be27845400 | 1200 | __STATIC_INLINE void LL_SWPMI_DisableTXBypass(SWPMI_TypeDef *SWPMIx) |
| AnnaBridge | 172:65be27845400 | 1201 | { |
| AnnaBridge | 172:65be27845400 | 1202 | SET_BIT(SWPMIx->OR, SWPMI_OR_TBYP); |
| AnnaBridge | 172:65be27845400 | 1203 | } |
| AnnaBridge | 172:65be27845400 | 1204 | |
| AnnaBridge | 172:65be27845400 | 1205 | /** |
| AnnaBridge | 172:65be27845400 | 1206 | * @} |
| AnnaBridge | 172:65be27845400 | 1207 | */ |
| AnnaBridge | 172:65be27845400 | 1208 | |
| AnnaBridge | 172:65be27845400 | 1209 | #if defined(USE_FULL_LL_DRIVER) |
| AnnaBridge | 172:65be27845400 | 1210 | /** @defgroup SWPMI_LL_EF_Init Initialization and de-initialization functions |
| AnnaBridge | 172:65be27845400 | 1211 | * @{ |
| AnnaBridge | 172:65be27845400 | 1212 | */ |
| AnnaBridge | 172:65be27845400 | 1213 | |
| AnnaBridge | 172:65be27845400 | 1214 | ErrorStatus LL_SWPMI_DeInit(SWPMI_TypeDef *SWPMIx); |
| AnnaBridge | 172:65be27845400 | 1215 | ErrorStatus LL_SWPMI_Init(SWPMI_TypeDef *SWPMIx, LL_SWPMI_InitTypeDef *SWPMI_InitStruct); |
| AnnaBridge | 172:65be27845400 | 1216 | void LL_SWPMI_StructInit(LL_SWPMI_InitTypeDef *SWPMI_InitStruct); |
| AnnaBridge | 172:65be27845400 | 1217 | |
| AnnaBridge | 172:65be27845400 | 1218 | /** |
| AnnaBridge | 172:65be27845400 | 1219 | * @} |
| AnnaBridge | 172:65be27845400 | 1220 | */ |
| AnnaBridge | 172:65be27845400 | 1221 | #endif /*USE_FULL_LL_DRIVER*/ |
| AnnaBridge | 172:65be27845400 | 1222 | |
| AnnaBridge | 172:65be27845400 | 1223 | /** |
| AnnaBridge | 172:65be27845400 | 1224 | * @} |
| AnnaBridge | 172:65be27845400 | 1225 | */ |
| AnnaBridge | 172:65be27845400 | 1226 | |
| AnnaBridge | 172:65be27845400 | 1227 | /** |
| AnnaBridge | 172:65be27845400 | 1228 | * @} |
| AnnaBridge | 172:65be27845400 | 1229 | */ |
| AnnaBridge | 172:65be27845400 | 1230 | |
| AnnaBridge | 172:65be27845400 | 1231 | |
| AnnaBridge | 172:65be27845400 | 1232 | /** |
| AnnaBridge | 172:65be27845400 | 1233 | * @} |
| AnnaBridge | 172:65be27845400 | 1234 | */ |
| AnnaBridge | 172:65be27845400 | 1235 | |
| AnnaBridge | 172:65be27845400 | 1236 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 1237 | } |
| AnnaBridge | 172:65be27845400 | 1238 | #endif |
| AnnaBridge | 172:65be27845400 | 1239 | |
| AnnaBridge | 172:65be27845400 | 1240 | #endif /* STM32H7xx_LL_SWPMI_H */ |
| AnnaBridge | 172:65be27845400 | 1241 | |
| AnnaBridge | 172:65be27845400 | 1242 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
