mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_nand.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32h7xx_hal_nand.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of NAND HAL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 172:65be27845400 10 *
AnnaBridge 172:65be27845400 11 * This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge 172:65be27845400 12 * the "License"; You may not use this file except in compliance with the
AnnaBridge 172:65be27845400 13 * License. You may obtain a copy of the License at:
AnnaBridge 172:65be27845400 14 * opensource.org/licenses/BSD-3-Clause
AnnaBridge 172:65be27845400 15 *
AnnaBridge 172:65be27845400 16 ******************************************************************************
AnnaBridge 172:65be27845400 17 */
AnnaBridge 172:65be27845400 18
AnnaBridge 172:65be27845400 19 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 20 #ifndef STM32H7xx_HAL_NAND_H
AnnaBridge 172:65be27845400 21 #define STM32H7xx_HAL_NAND_H
AnnaBridge 172:65be27845400 22
AnnaBridge 172:65be27845400 23 #ifdef __cplusplus
AnnaBridge 172:65be27845400 24 extern "C" {
AnnaBridge 172:65be27845400 25 #endif
AnnaBridge 172:65be27845400 26
AnnaBridge 172:65be27845400 27
AnnaBridge 172:65be27845400 28 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 29 #include "stm32h7xx_ll_fmc.h"
AnnaBridge 172:65be27845400 30
AnnaBridge 172:65be27845400 31 /** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge 172:65be27845400 32 * @{
AnnaBridge 172:65be27845400 33 */
AnnaBridge 172:65be27845400 34
AnnaBridge 172:65be27845400 35 /** @addtogroup NAND
AnnaBridge 172:65be27845400 36 * @{
AnnaBridge 172:65be27845400 37 */
AnnaBridge 172:65be27845400 38
AnnaBridge 172:65be27845400 39 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 172:65be27845400 40 /* Exported types ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 41 /** @defgroup NAND_Exported_Types NAND Exported Types
AnnaBridge 172:65be27845400 42 * @{
AnnaBridge 172:65be27845400 43 */
AnnaBridge 172:65be27845400 44
AnnaBridge 172:65be27845400 45 /**
AnnaBridge 172:65be27845400 46 * @brief HAL NAND State structures definition
AnnaBridge 172:65be27845400 47 */
AnnaBridge 172:65be27845400 48 typedef enum
AnnaBridge 172:65be27845400 49 {
AnnaBridge 172:65be27845400 50 HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
AnnaBridge 172:65be27845400 51 HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
AnnaBridge 172:65be27845400 52 HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
AnnaBridge 172:65be27845400 53 HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
AnnaBridge 172:65be27845400 54 } HAL_NAND_StateTypeDef;
AnnaBridge 172:65be27845400 55
AnnaBridge 172:65be27845400 56 /**
AnnaBridge 172:65be27845400 57 * @brief NAND Memory electronic signature Structure definition
AnnaBridge 172:65be27845400 58 */
AnnaBridge 172:65be27845400 59 typedef struct
AnnaBridge 172:65be27845400 60 {
AnnaBridge 172:65be27845400 61 /*<! NAND memory electronic signature maker and device IDs */
AnnaBridge 172:65be27845400 62
AnnaBridge 172:65be27845400 63 uint8_t Maker_Id;
AnnaBridge 172:65be27845400 64
AnnaBridge 172:65be27845400 65 uint8_t Device_Id;
AnnaBridge 172:65be27845400 66
AnnaBridge 172:65be27845400 67 uint8_t Third_Id;
AnnaBridge 172:65be27845400 68
AnnaBridge 172:65be27845400 69 uint8_t Fourth_Id;
AnnaBridge 172:65be27845400 70 } NAND_IDTypeDef;
AnnaBridge 172:65be27845400 71
AnnaBridge 172:65be27845400 72 /**
AnnaBridge 172:65be27845400 73 * @brief NAND Memory address Structure definition
AnnaBridge 172:65be27845400 74 */
AnnaBridge 172:65be27845400 75 typedef struct
AnnaBridge 172:65be27845400 76 {
AnnaBridge 172:65be27845400 77 uint16_t Page; /*!< NAND memory Page address */
AnnaBridge 172:65be27845400 78
AnnaBridge 172:65be27845400 79 uint16_t Plane; /*!< NAND memory Zone address */
AnnaBridge 172:65be27845400 80
AnnaBridge 172:65be27845400 81 uint16_t Block; /*!< NAND memory Block address */
AnnaBridge 172:65be27845400 82
AnnaBridge 172:65be27845400 83 } NAND_AddressTypeDef;
AnnaBridge 172:65be27845400 84
AnnaBridge 172:65be27845400 85 /**
AnnaBridge 172:65be27845400 86 * @brief NAND Memory info Structure definition
AnnaBridge 172:65be27845400 87 */
AnnaBridge 172:65be27845400 88 typedef struct
AnnaBridge 172:65be27845400 89 {
AnnaBridge 172:65be27845400 90 uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
AnnaBridge 172:65be27845400 91 for 8 bits adressing or words for 16 bits addressing */
AnnaBridge 172:65be27845400 92
AnnaBridge 172:65be27845400 93 uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
AnnaBridge 172:65be27845400 94 for 8 bits adressing or words for 16 bits addressing */
AnnaBridge 172:65be27845400 95
AnnaBridge 172:65be27845400 96 uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */
AnnaBridge 172:65be27845400 97
AnnaBridge 172:65be27845400 98 uint32_t BlockNbr; /*!< NAND memory number of total blocks */
AnnaBridge 172:65be27845400 99
AnnaBridge 172:65be27845400 100 uint32_t PlaneNbr; /*!< NAND memory number of planes */
AnnaBridge 172:65be27845400 101
AnnaBridge 172:65be27845400 102 uint32_t PlaneSize; /*!< NAND memory zone size measured in number of blocks */
AnnaBridge 172:65be27845400 103
AnnaBridge 172:65be27845400 104 FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
AnnaBridge 172:65be27845400 105 parameter is mandatory for some NAND parts after the read
AnnaBridge 172:65be27845400 106 command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
AnnaBridge 172:65be27845400 107 Example: Toshiba THTH58BYG3S0HBAI6.
AnnaBridge 172:65be27845400 108 This parameter could be ENABLE or DISABLE
AnnaBridge 172:65be27845400 109 Please check the Read Mode sequnece in the NAND device datasheet */
AnnaBridge 172:65be27845400 110 } NAND_DeviceConfigTypeDef;
AnnaBridge 172:65be27845400 111
AnnaBridge 172:65be27845400 112 /**
AnnaBridge 172:65be27845400 113 * @brief NAND handle Structure definition
AnnaBridge 172:65be27845400 114 */
AnnaBridge 172:65be27845400 115 #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 116 typedef struct __NAND_HandleTypeDef
AnnaBridge 172:65be27845400 117 #else
AnnaBridge 172:65be27845400 118 typedef struct
AnnaBridge 172:65be27845400 119 #endif /* USE_HAL_NAND_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 120 {
AnnaBridge 172:65be27845400 121 FMC_NAND_TypeDef *Instance; /*!< Register base address */
AnnaBridge 172:65be27845400 122
AnnaBridge 172:65be27845400 123 FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
AnnaBridge 172:65be27845400 124
AnnaBridge 172:65be27845400 125 HAL_LockTypeDef Lock; /*!< NAND locking object */
AnnaBridge 172:65be27845400 126
AnnaBridge 172:65be27845400 127 __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
AnnaBridge 172:65be27845400 128
AnnaBridge 172:65be27845400 129 NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
AnnaBridge 172:65be27845400 130
AnnaBridge 172:65be27845400 131 #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 132 void (* MspInitCallback) ( struct __NAND_HandleTypeDef * hnand); /*!< NAND Msp Init callback */
AnnaBridge 172:65be27845400 133 void (* MspDeInitCallback) ( struct __NAND_HandleTypeDef * hnand); /*!< NAND Msp DeInit callback */
AnnaBridge 172:65be27845400 134 void (* ItCallback) ( struct __NAND_HandleTypeDef * hnand); /*!< NAND IT callback */
AnnaBridge 172:65be27845400 135 #endif
AnnaBridge 172:65be27845400 136 } NAND_HandleTypeDef;
AnnaBridge 172:65be27845400 137
AnnaBridge 172:65be27845400 138 #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 139 /**
AnnaBridge 172:65be27845400 140 * @brief HAL NAND Callback ID enumeration definition
AnnaBridge 172:65be27845400 141 */
AnnaBridge 172:65be27845400 142 typedef enum
AnnaBridge 172:65be27845400 143 {
AnnaBridge 172:65be27845400 144 HAL_NAND_MSP_INIT_CB_ID = 0x00U, /*!< NAND MspInit Callback ID */
AnnaBridge 172:65be27845400 145 HAL_NAND_MSP_DEINIT_CB_ID = 0x01U, /*!< NAND MspDeInit Callback ID */
AnnaBridge 172:65be27845400 146 HAL_NAND_IT_CB_ID = 0x02U /*!< NAND IT Callback ID */
AnnaBridge 172:65be27845400 147 }HAL_NAND_CallbackIDTypeDef;
AnnaBridge 172:65be27845400 148
AnnaBridge 172:65be27845400 149 /**
AnnaBridge 172:65be27845400 150 * @brief HAL NAND Callback pointer definition
AnnaBridge 172:65be27845400 151 */
AnnaBridge 172:65be27845400 152 typedef void (*pNAND_CallbackTypeDef)(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 153 #endif
AnnaBridge 172:65be27845400 154
AnnaBridge 172:65be27845400 155 /**
AnnaBridge 172:65be27845400 156 * @}
AnnaBridge 172:65be27845400 157 */
AnnaBridge 172:65be27845400 158
AnnaBridge 172:65be27845400 159 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 160 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 161 /** @defgroup NAND_Exported_Macros NAND Exported Macros
AnnaBridge 172:65be27845400 162 * @{
AnnaBridge 172:65be27845400 163 */
AnnaBridge 172:65be27845400 164
AnnaBridge 172:65be27845400 165 /** @brief Reset NAND handle state
AnnaBridge 172:65be27845400 166 * @param __HANDLE__ specifies the NAND handle.
AnnaBridge 172:65be27845400 167 * @retval None
AnnaBridge 172:65be27845400 168 */
AnnaBridge 172:65be27845400 169 #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 170 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) do { \
AnnaBridge 172:65be27845400 171 (__HANDLE__)->State = HAL_NAND_STATE_RESET; \
AnnaBridge 172:65be27845400 172 (__HANDLE__)->MspInitCallback = NULL; \
AnnaBridge 172:65be27845400 173 (__HANDLE__)->MspDeInitCallback = NULL; \
AnnaBridge 172:65be27845400 174 } while(0)
AnnaBridge 172:65be27845400 175 #else
AnnaBridge 172:65be27845400 176 #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
AnnaBridge 172:65be27845400 177 #endif
AnnaBridge 172:65be27845400 178
AnnaBridge 172:65be27845400 179 /**
AnnaBridge 172:65be27845400 180 * @}
AnnaBridge 172:65be27845400 181 */
AnnaBridge 172:65be27845400 182
AnnaBridge 172:65be27845400 183 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 184 /** @addtogroup NAND_Exported_Functions NAND Exported Functions
AnnaBridge 172:65be27845400 185 * @{
AnnaBridge 172:65be27845400 186 */
AnnaBridge 172:65be27845400 187
AnnaBridge 172:65be27845400 188 /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 172:65be27845400 189 * @{
AnnaBridge 172:65be27845400 190 */
AnnaBridge 172:65be27845400 191
AnnaBridge 172:65be27845400 192 /* Initialization/de-initialization functions ********************************/
AnnaBridge 172:65be27845400 193 HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
AnnaBridge 172:65be27845400 194 HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 195
AnnaBridge 172:65be27845400 196 HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
AnnaBridge 172:65be27845400 197
AnnaBridge 172:65be27845400 198 HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
AnnaBridge 172:65be27845400 199
AnnaBridge 172:65be27845400 200 void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 201 void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 202 void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 203 void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 204
AnnaBridge 172:65be27845400 205 /**
AnnaBridge 172:65be27845400 206 * @}
AnnaBridge 172:65be27845400 207 */
AnnaBridge 172:65be27845400 208
AnnaBridge 172:65be27845400 209 /** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
AnnaBridge 172:65be27845400 210 * @{
AnnaBridge 172:65be27845400 211 */
AnnaBridge 172:65be27845400 212
AnnaBridge 172:65be27845400 213 /* IO operation functions ****************************************************/
AnnaBridge 172:65be27845400 214
AnnaBridge 172:65be27845400 215 HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 216
AnnaBridge 172:65be27845400 217 HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 172:65be27845400 218 HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 172:65be27845400 219 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 172:65be27845400 220 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 172:65be27845400 221
AnnaBridge 172:65be27845400 222 HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
AnnaBridge 172:65be27845400 223 HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
AnnaBridge 172:65be27845400 224 HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
AnnaBridge 172:65be27845400 225 HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
AnnaBridge 172:65be27845400 226
AnnaBridge 172:65be27845400 227 HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 172:65be27845400 228
AnnaBridge 172:65be27845400 229 uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
AnnaBridge 172:65be27845400 230
AnnaBridge 172:65be27845400 231 #if (USE_HAL_NAND_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 232 /* NAND callback registering/unregistering */
AnnaBridge 172:65be27845400 233 HAL_StatusTypeDef HAL_NAND_RegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId, pNAND_CallbackTypeDef pCallback);
AnnaBridge 172:65be27845400 234 HAL_StatusTypeDef HAL_NAND_UnRegisterCallback(NAND_HandleTypeDef *hnand, HAL_NAND_CallbackIDTypeDef CallbackId);
AnnaBridge 172:65be27845400 235 #endif
AnnaBridge 172:65be27845400 236
AnnaBridge 172:65be27845400 237 /**
AnnaBridge 172:65be27845400 238 * @}
AnnaBridge 172:65be27845400 239 */
AnnaBridge 172:65be27845400 240
AnnaBridge 172:65be27845400 241 /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 172:65be27845400 242 * @{
AnnaBridge 172:65be27845400 243 */
AnnaBridge 172:65be27845400 244
AnnaBridge 172:65be27845400 245 /* NAND Control functions ****************************************************/
AnnaBridge 172:65be27845400 246 HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 247 HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 248 HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
AnnaBridge 172:65be27845400 249
AnnaBridge 172:65be27845400 250 /**
AnnaBridge 172:65be27845400 251 * @}
AnnaBridge 172:65be27845400 252 */
AnnaBridge 172:65be27845400 253
AnnaBridge 172:65be27845400 254 /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 172:65be27845400 255 * @{
AnnaBridge 172:65be27845400 256 */
AnnaBridge 172:65be27845400 257 /* NAND State functions *******************************************************/
AnnaBridge 172:65be27845400 258 HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 259 uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
AnnaBridge 172:65be27845400 260 /**
AnnaBridge 172:65be27845400 261 * @}
AnnaBridge 172:65be27845400 262 */
AnnaBridge 172:65be27845400 263
AnnaBridge 172:65be27845400 264 /**
AnnaBridge 172:65be27845400 265 * @}
AnnaBridge 172:65be27845400 266 */
AnnaBridge 172:65be27845400 267 /* Private types -------------------------------------------------------------*/
AnnaBridge 172:65be27845400 268 /* Private variables ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 269 /* Private constants ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 270 /** @defgroup NAND_Private_Constants NAND Private Constants
AnnaBridge 172:65be27845400 271 * @{
AnnaBridge 172:65be27845400 272 */
AnnaBridge 172:65be27845400 273 #define NAND_DEVICE ((uint32_t)0x80000000U)
AnnaBridge 172:65be27845400 274 #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U)
AnnaBridge 172:65be27845400 275
AnnaBridge 172:65be27845400 276 #define CMD_AREA ((uint32_t)(1UL<<16U)) /* A16 = CLE high */
AnnaBridge 172:65be27845400 277 #define ADDR_AREA ((uint32_t)(1UL<<17U)) /* A17 = ALE high */
AnnaBridge 172:65be27845400 278
AnnaBridge 172:65be27845400 279 #define NAND_CMD_AREA_A ((uint8_t)0x00U)
AnnaBridge 172:65be27845400 280 #define NAND_CMD_AREA_B ((uint8_t)0x01U)
AnnaBridge 172:65be27845400 281 #define NAND_CMD_AREA_C ((uint8_t)0x50U)
AnnaBridge 172:65be27845400 282 #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U)
AnnaBridge 172:65be27845400 283
AnnaBridge 172:65be27845400 284 #define NAND_CMD_WRITE0 ((uint8_t)0x80U)
AnnaBridge 172:65be27845400 285 #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U)
AnnaBridge 172:65be27845400 286 #define NAND_CMD_ERASE0 ((uint8_t)0x60U)
AnnaBridge 172:65be27845400 287 #define NAND_CMD_ERASE1 ((uint8_t)0xD0U)
AnnaBridge 172:65be27845400 288 #define NAND_CMD_READID ((uint8_t)0x90U)
AnnaBridge 172:65be27845400 289 #define NAND_CMD_STATUS ((uint8_t)0x70U)
AnnaBridge 172:65be27845400 290 #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU)
AnnaBridge 172:65be27845400 291 #define NAND_CMD_RESET ((uint8_t)0xFFU)
AnnaBridge 172:65be27845400 292
AnnaBridge 172:65be27845400 293 /* NAND memory status */
AnnaBridge 172:65be27845400 294 #define NAND_VALID_ADDRESS ((uint32_t)0x00000100U)
AnnaBridge 172:65be27845400 295 #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U)
AnnaBridge 172:65be27845400 296 #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U)
AnnaBridge 172:65be27845400 297 #define NAND_BUSY ((uint32_t)0x00000000U)
AnnaBridge 172:65be27845400 298 #define NAND_ERROR ((uint32_t)0x00000001U)
AnnaBridge 172:65be27845400 299 #define NAND_READY ((uint32_t)0x00000040U)
AnnaBridge 172:65be27845400 300 /**
AnnaBridge 172:65be27845400 301 * @}
AnnaBridge 172:65be27845400 302 */
AnnaBridge 172:65be27845400 303
AnnaBridge 172:65be27845400 304 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 305 /** @defgroup NAND_Private_Macros NAND Private Macros
AnnaBridge 172:65be27845400 306 * @{
AnnaBridge 172:65be27845400 307 */
AnnaBridge 172:65be27845400 308
AnnaBridge 172:65be27845400 309 /**
AnnaBridge 172:65be27845400 310 * @brief NAND memory address computation.
AnnaBridge 172:65be27845400 311 * @param __ADDRESS__ NAND memory address.
AnnaBridge 172:65be27845400 312 * @param __HANDLE__ NAND handle.
AnnaBridge 172:65be27845400 313 * @retval NAND Raw address value
AnnaBridge 172:65be27845400 314 */
AnnaBridge 172:65be27845400 315 #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) ((__ADDRESS__)->Page + \
AnnaBridge 172:65be27845400 316 (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize)))
AnnaBridge 172:65be27845400 317
AnnaBridge 172:65be27845400 318 #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
AnnaBridge 172:65be27845400 319
AnnaBridge 172:65be27845400 320 /**
AnnaBridge 172:65be27845400 321 * @brief NAND memory address cycling.
AnnaBridge 172:65be27845400 322 * @param __ADDRESS__ NAND memory address.
AnnaBridge 172:65be27845400 323 * @retval NAND address cycling value.
AnnaBridge 172:65be27845400 324 */
AnnaBridge 172:65be27845400 325 #define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
AnnaBridge 172:65be27845400 326 #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
AnnaBridge 172:65be27845400 327 #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
AnnaBridge 172:65be27845400 328 #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
AnnaBridge 172:65be27845400 329
AnnaBridge 172:65be27845400 330 /**
AnnaBridge 172:65be27845400 331 * @brief NAND memory Columns cycling.
AnnaBridge 172:65be27845400 332 * @param __ADDRESS__ NAND memory address.
AnnaBridge 172:65be27845400 333 * @retval NAND Column address cycling value.
AnnaBridge 172:65be27845400 334 */
AnnaBridge 172:65be27845400 335 #define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
AnnaBridge 172:65be27845400 336 #define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
AnnaBridge 172:65be27845400 337
AnnaBridge 172:65be27845400 338 /**
AnnaBridge 172:65be27845400 339 * @}
AnnaBridge 172:65be27845400 340 */
AnnaBridge 172:65be27845400 341
AnnaBridge 172:65be27845400 342 /**
AnnaBridge 172:65be27845400 343 * @}
AnnaBridge 172:65be27845400 344 */
AnnaBridge 172:65be27845400 345
AnnaBridge 172:65be27845400 346 /**
AnnaBridge 172:65be27845400 347 * @}
AnnaBridge 172:65be27845400 348 */
AnnaBridge 172:65be27845400 349
AnnaBridge 172:65be27845400 350 /**
AnnaBridge 172:65be27845400 351 * @}
AnnaBridge 172:65be27845400 352 */
AnnaBridge 172:65be27845400 353
AnnaBridge 172:65be27845400 354
AnnaBridge 172:65be27845400 355 #ifdef __cplusplus
AnnaBridge 172:65be27845400 356 }
AnnaBridge 172:65be27845400 357 #endif
AnnaBridge 172:65be27845400 358
AnnaBridge 172:65be27845400 359 #endif /* STM32H7xx_HAL_NAND_H */
AnnaBridge 172:65be27845400 360
AnnaBridge 172:65be27845400 361 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/