The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_mmc.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_mmc.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of MMC HAL module. |
AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 7 | * @attention |
AnnaBridge | 172:65be27845400 | 8 | * |
AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
AnnaBridge | 172:65be27845400 | 10 | * |
AnnaBridge | 172:65be27845400 | 11 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 12 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 13 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 14 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 15 | * |
AnnaBridge | 172:65be27845400 | 16 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 17 | */ |
AnnaBridge | 172:65be27845400 | 18 | |
AnnaBridge | 172:65be27845400 | 19 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 20 | #ifndef STM32H7xx_HAL_MMC_H |
AnnaBridge | 172:65be27845400 | 21 | #define STM32H7xx_HAL_MMC_H |
AnnaBridge | 172:65be27845400 | 22 | |
AnnaBridge | 172:65be27845400 | 23 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 24 | extern "C" { |
AnnaBridge | 172:65be27845400 | 25 | #endif |
AnnaBridge | 172:65be27845400 | 26 | |
AnnaBridge | 172:65be27845400 | 27 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 28 | #include "stm32h7xx_ll_sdmmc.h" |
AnnaBridge | 172:65be27845400 | 29 | |
AnnaBridge | 172:65be27845400 | 30 | /** @addtogroup STM32H7xx_HAL_Driver |
AnnaBridge | 172:65be27845400 | 31 | * @{ |
AnnaBridge | 172:65be27845400 | 32 | */ |
AnnaBridge | 172:65be27845400 | 33 | |
AnnaBridge | 172:65be27845400 | 34 | /** @addtogroup MMC |
AnnaBridge | 172:65be27845400 | 35 | * @{ |
AnnaBridge | 172:65be27845400 | 36 | */ |
AnnaBridge | 172:65be27845400 | 37 | |
AnnaBridge | 172:65be27845400 | 38 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 39 | /** @defgroup MMC_Exported_Types MMC Exported Types |
AnnaBridge | 172:65be27845400 | 40 | * @{ |
AnnaBridge | 172:65be27845400 | 41 | */ |
AnnaBridge | 172:65be27845400 | 42 | |
AnnaBridge | 172:65be27845400 | 43 | /** @defgroup MMC_Exported_Types_Group1 MMC State enumeration structure |
AnnaBridge | 172:65be27845400 | 44 | * @{ |
AnnaBridge | 172:65be27845400 | 45 | */ |
AnnaBridge | 172:65be27845400 | 46 | typedef enum |
AnnaBridge | 172:65be27845400 | 47 | { |
AnnaBridge | 172:65be27845400 | 48 | HAL_MMC_STATE_RESET = ((uint32_t)0x00000000U), /*!< MMC not yet initialized or disabled */ |
AnnaBridge | 172:65be27845400 | 49 | HAL_MMC_STATE_READY = ((uint32_t)0x00000001U), /*!< MMC initialized and ready for use */ |
AnnaBridge | 172:65be27845400 | 50 | HAL_MMC_STATE_TIMEOUT = ((uint32_t)0x00000002U), /*!< MMC Timeout state */ |
AnnaBridge | 172:65be27845400 | 51 | HAL_MMC_STATE_BUSY = ((uint32_t)0x00000003U), /*!< MMC process ongoing */ |
AnnaBridge | 172:65be27845400 | 52 | HAL_MMC_STATE_PROGRAMMING = ((uint32_t)0x00000004U), /*!< MMC Programming State */ |
AnnaBridge | 172:65be27845400 | 53 | HAL_MMC_STATE_RECEIVING = ((uint32_t)0x00000005U), /*!< MMC Receinving State */ |
AnnaBridge | 172:65be27845400 | 54 | HAL_MMC_STATE_TRANSFER = ((uint32_t)0x00000006U), /*!< MMC Transfert State */ |
AnnaBridge | 172:65be27845400 | 55 | HAL_MMC_STATE_ERROR = ((uint32_t)0x0000000FU) /*!< MMC is in error state */ |
AnnaBridge | 172:65be27845400 | 56 | }HAL_MMC_StateTypeDef; |
AnnaBridge | 172:65be27845400 | 57 | /** |
AnnaBridge | 172:65be27845400 | 58 | * @} |
AnnaBridge | 172:65be27845400 | 59 | */ |
AnnaBridge | 172:65be27845400 | 60 | |
AnnaBridge | 172:65be27845400 | 61 | /** @defgroup MMC_Exported_Types_Group2 MMC Card State enumeration structure |
AnnaBridge | 172:65be27845400 | 62 | * @{ |
AnnaBridge | 172:65be27845400 | 63 | */ |
AnnaBridge | 172:65be27845400 | 64 | typedef uint32_t HAL_MMC_CardStateTypeDef; |
AnnaBridge | 172:65be27845400 | 65 | |
AnnaBridge | 172:65be27845400 | 66 | #define HAL_MMC_CARD_READY 0x00000001U /*!< Card state is ready */ |
AnnaBridge | 172:65be27845400 | 67 | #define HAL_MMC_CARD_IDENTIFICATION 0x00000002U /*!< Card is in identification state */ |
AnnaBridge | 172:65be27845400 | 68 | #define HAL_MMC_CARD_STANDBY 0x00000003U /*!< Card is in standby state */ |
AnnaBridge | 172:65be27845400 | 69 | #define HAL_MMC_CARD_TRANSFER 0x00000004U /*!< Card is in transfer state */ |
AnnaBridge | 172:65be27845400 | 70 | #define HAL_MMC_CARD_SENDING 0x00000005U /*!< Card is sending an operation */ |
AnnaBridge | 172:65be27845400 | 71 | #define HAL_MMC_CARD_RECEIVING 0x00000006U /*!< Card is receiving operation information */ |
AnnaBridge | 172:65be27845400 | 72 | #define HAL_MMC_CARD_PROGRAMMING 0x00000007U /*!< Card is in programming state */ |
AnnaBridge | 172:65be27845400 | 73 | #define HAL_MMC_CARD_DISCONNECTED 0x00000008U /*!< Card is disconnected */ |
AnnaBridge | 172:65be27845400 | 74 | #define HAL_MMC_CARD_ERROR 0x000000FFU /*!< Card response Error */ |
AnnaBridge | 172:65be27845400 | 75 | /** |
AnnaBridge | 172:65be27845400 | 76 | * @} |
AnnaBridge | 172:65be27845400 | 77 | */ |
AnnaBridge | 172:65be27845400 | 78 | |
AnnaBridge | 172:65be27845400 | 79 | /** @defgroup MMC_Exported_Types_Group3 MMC Handle Structure definition |
AnnaBridge | 172:65be27845400 | 80 | * @{ |
AnnaBridge | 172:65be27845400 | 81 | */ |
AnnaBridge | 172:65be27845400 | 82 | #define MMC_InitTypeDef SDMMC_InitTypeDef |
AnnaBridge | 172:65be27845400 | 83 | #define MMC_TypeDef SDMMC_TypeDef |
AnnaBridge | 172:65be27845400 | 84 | |
AnnaBridge | 172:65be27845400 | 85 | /** |
AnnaBridge | 172:65be27845400 | 86 | * @brief MMC Card Information Structure definition |
AnnaBridge | 172:65be27845400 | 87 | */ |
AnnaBridge | 172:65be27845400 | 88 | typedef struct |
AnnaBridge | 172:65be27845400 | 89 | { |
AnnaBridge | 172:65be27845400 | 90 | uint32_t CardType; /*!< Specifies the card Type */ |
AnnaBridge | 172:65be27845400 | 91 | |
AnnaBridge | 172:65be27845400 | 92 | uint32_t Class; /*!< Specifies the class of the card class */ |
AnnaBridge | 172:65be27845400 | 93 | |
AnnaBridge | 172:65be27845400 | 94 | uint32_t RelCardAdd; /*!< Specifies the Relative Card Address */ |
AnnaBridge | 172:65be27845400 | 95 | |
AnnaBridge | 172:65be27845400 | 96 | uint32_t BlockNbr; /*!< Specifies the Card Capacity in blocks */ |
AnnaBridge | 172:65be27845400 | 97 | |
AnnaBridge | 172:65be27845400 | 98 | uint32_t BlockSize; /*!< Specifies one block size in bytes */ |
AnnaBridge | 172:65be27845400 | 99 | |
AnnaBridge | 172:65be27845400 | 100 | uint32_t LogBlockNbr; /*!< Specifies the Card logical Capacity in blocks */ |
AnnaBridge | 172:65be27845400 | 101 | |
AnnaBridge | 172:65be27845400 | 102 | uint32_t LogBlockSize; /*!< Specifies logical block size in bytes */ |
AnnaBridge | 172:65be27845400 | 103 | |
AnnaBridge | 172:65be27845400 | 104 | }HAL_MMC_CardInfoTypeDef; |
AnnaBridge | 172:65be27845400 | 105 | |
AnnaBridge | 172:65be27845400 | 106 | /** |
AnnaBridge | 172:65be27845400 | 107 | * @brief MMC handle Structure definition |
AnnaBridge | 172:65be27845400 | 108 | */ |
AnnaBridge | 172:65be27845400 | 109 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
AnnaBridge | 172:65be27845400 | 110 | typedef struct __MMC_HandleTypeDef |
AnnaBridge | 172:65be27845400 | 111 | #else |
AnnaBridge | 172:65be27845400 | 112 | typedef struct |
AnnaBridge | 172:65be27845400 | 113 | #endif /* USE_HAL_MMC_REGISTER_CALLBACKS */ |
AnnaBridge | 172:65be27845400 | 114 | { |
AnnaBridge | 172:65be27845400 | 115 | MMC_TypeDef *Instance; /*!< MMC registers base address */ |
AnnaBridge | 172:65be27845400 | 116 | |
AnnaBridge | 172:65be27845400 | 117 | MMC_InitTypeDef Init; /*!< MMC required parameters */ |
AnnaBridge | 172:65be27845400 | 118 | |
AnnaBridge | 172:65be27845400 | 119 | HAL_LockTypeDef Lock; /*!< MMC locking object */ |
AnnaBridge | 172:65be27845400 | 120 | |
AnnaBridge | 172:65be27845400 | 121 | uint8_t *pTxBuffPtr; /*!< Pointer to MMC Tx transfer Buffer */ |
AnnaBridge | 172:65be27845400 | 122 | |
AnnaBridge | 172:65be27845400 | 123 | uint32_t TxXferSize; /*!< MMC Tx Transfer size */ |
AnnaBridge | 172:65be27845400 | 124 | |
AnnaBridge | 172:65be27845400 | 125 | uint8_t *pRxBuffPtr; /*!< Pointer to MMC Rx transfer Buffer */ |
AnnaBridge | 172:65be27845400 | 126 | |
AnnaBridge | 172:65be27845400 | 127 | uint32_t RxXferSize; /*!< MMC Rx Transfer size */ |
AnnaBridge | 172:65be27845400 | 128 | |
AnnaBridge | 172:65be27845400 | 129 | __IO uint32_t Context; /*!< MMC transfer context */ |
AnnaBridge | 172:65be27845400 | 130 | |
AnnaBridge | 172:65be27845400 | 131 | __IO HAL_MMC_StateTypeDef State; /*!< MMC card State */ |
AnnaBridge | 172:65be27845400 | 132 | |
AnnaBridge | 172:65be27845400 | 133 | __IO uint32_t ErrorCode; /*!< MMC Card Error codes */ |
AnnaBridge | 172:65be27845400 | 134 | |
AnnaBridge | 172:65be27845400 | 135 | HAL_MMC_CardInfoTypeDef MmcCard; /*!< MMC Card information */ |
AnnaBridge | 172:65be27845400 | 136 | |
AnnaBridge | 172:65be27845400 | 137 | uint32_t CSD[4]; /*!< MMC card specific data table */ |
AnnaBridge | 172:65be27845400 | 138 | |
AnnaBridge | 172:65be27845400 | 139 | uint32_t CID[4]; /*!< MMC card identification number table */ |
AnnaBridge | 172:65be27845400 | 140 | |
AnnaBridge | 172:65be27845400 | 141 | uint32_t Ext_CSD[128]; |
AnnaBridge | 172:65be27845400 | 142 | |
AnnaBridge | 172:65be27845400 | 143 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
AnnaBridge | 172:65be27845400 | 144 | void (* TxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 145 | void (* RxCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 146 | void (* ErrorCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 147 | void (* AbortCpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 148 | void (* Read_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 149 | void (* Read_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 150 | void (* Write_DMADblBuf0CpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 151 | void (* Write_DMADblBuf1CpltCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 152 | |
AnnaBridge | 172:65be27845400 | 153 | void (* MspInitCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 154 | void (* MspDeInitCallback) (struct __MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 155 | #endif |
AnnaBridge | 172:65be27845400 | 156 | }MMC_HandleTypeDef; |
AnnaBridge | 172:65be27845400 | 157 | |
AnnaBridge | 172:65be27845400 | 158 | |
AnnaBridge | 172:65be27845400 | 159 | /** |
AnnaBridge | 172:65be27845400 | 160 | * @} |
AnnaBridge | 172:65be27845400 | 161 | */ |
AnnaBridge | 172:65be27845400 | 162 | |
AnnaBridge | 172:65be27845400 | 163 | /** @defgroup MMC_Exported_Types_Group4 Card Specific Data: CSD Register |
AnnaBridge | 172:65be27845400 | 164 | * @{ |
AnnaBridge | 172:65be27845400 | 165 | */ |
AnnaBridge | 172:65be27845400 | 166 | typedef struct |
AnnaBridge | 172:65be27845400 | 167 | { |
AnnaBridge | 172:65be27845400 | 168 | __IO uint8_t CSDStruct; /*!< CSD structure */ |
AnnaBridge | 172:65be27845400 | 169 | __IO uint8_t SysSpecVersion; /*!< System specification version */ |
AnnaBridge | 172:65be27845400 | 170 | __IO uint8_t Reserved1; /*!< Reserved */ |
AnnaBridge | 172:65be27845400 | 171 | __IO uint8_t TAAC; /*!< Data read access time 1 */ |
AnnaBridge | 172:65be27845400 | 172 | __IO uint8_t NSAC; /*!< Data read access time 2 in CLK cycles */ |
AnnaBridge | 172:65be27845400 | 173 | __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ |
AnnaBridge | 172:65be27845400 | 174 | __IO uint16_t CardComdClasses; /*!< Card command classes */ |
AnnaBridge | 172:65be27845400 | 175 | __IO uint8_t RdBlockLen; /*!< Max. read data block length */ |
AnnaBridge | 172:65be27845400 | 176 | __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ |
AnnaBridge | 172:65be27845400 | 177 | __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ |
AnnaBridge | 172:65be27845400 | 178 | __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ |
AnnaBridge | 172:65be27845400 | 179 | __IO uint8_t DSRImpl; /*!< DSR implemented */ |
AnnaBridge | 172:65be27845400 | 180 | __IO uint8_t Reserved2; /*!< Reserved */ |
AnnaBridge | 172:65be27845400 | 181 | __IO uint32_t DeviceSize; /*!< Device Size */ |
AnnaBridge | 172:65be27845400 | 182 | __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ |
AnnaBridge | 172:65be27845400 | 183 | __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ |
AnnaBridge | 172:65be27845400 | 184 | __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ |
AnnaBridge | 172:65be27845400 | 185 | __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ |
AnnaBridge | 172:65be27845400 | 186 | __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ |
AnnaBridge | 172:65be27845400 | 187 | __IO uint8_t EraseGrSize; /*!< Erase group size */ |
AnnaBridge | 172:65be27845400 | 188 | __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ |
AnnaBridge | 172:65be27845400 | 189 | __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ |
AnnaBridge | 172:65be27845400 | 190 | __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ |
AnnaBridge | 172:65be27845400 | 191 | __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ |
AnnaBridge | 172:65be27845400 | 192 | __IO uint8_t WrSpeedFact; /*!< Write speed factor */ |
AnnaBridge | 172:65be27845400 | 193 | __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ |
AnnaBridge | 172:65be27845400 | 194 | __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ |
AnnaBridge | 172:65be27845400 | 195 | __IO uint8_t Reserved3; /*!< Reserved */ |
AnnaBridge | 172:65be27845400 | 196 | __IO uint8_t ContentProtectAppli; /*!< Content protection application */ |
AnnaBridge | 172:65be27845400 | 197 | __IO uint8_t FileFormatGroup; /*!< File format group */ |
AnnaBridge | 172:65be27845400 | 198 | __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ |
AnnaBridge | 172:65be27845400 | 199 | __IO uint8_t PermWrProtect; /*!< Permanent write protection */ |
AnnaBridge | 172:65be27845400 | 200 | __IO uint8_t TempWrProtect; /*!< Temporary write protection */ |
AnnaBridge | 172:65be27845400 | 201 | __IO uint8_t FileFormat; /*!< File format */ |
AnnaBridge | 172:65be27845400 | 202 | __IO uint8_t ECC; /*!< ECC code */ |
AnnaBridge | 172:65be27845400 | 203 | __IO uint8_t CSD_CRC; /*!< CSD CRC */ |
AnnaBridge | 172:65be27845400 | 204 | __IO uint8_t Reserved4; /*!< Always 1 */ |
AnnaBridge | 172:65be27845400 | 205 | |
AnnaBridge | 172:65be27845400 | 206 | }HAL_MMC_CardCSDTypeDef; |
AnnaBridge | 172:65be27845400 | 207 | /** |
AnnaBridge | 172:65be27845400 | 208 | * @} |
AnnaBridge | 172:65be27845400 | 209 | */ |
AnnaBridge | 172:65be27845400 | 210 | |
AnnaBridge | 172:65be27845400 | 211 | /** @defgroup MMC_Exported_Types_Group5 Card Identification Data: CID Register |
AnnaBridge | 172:65be27845400 | 212 | * @{ |
AnnaBridge | 172:65be27845400 | 213 | */ |
AnnaBridge | 172:65be27845400 | 214 | typedef struct |
AnnaBridge | 172:65be27845400 | 215 | { |
AnnaBridge | 172:65be27845400 | 216 | __IO uint8_t ManufacturerID; /*!< Manufacturer ID */ |
AnnaBridge | 172:65be27845400 | 217 | __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ |
AnnaBridge | 172:65be27845400 | 218 | __IO uint32_t ProdName1; /*!< Product Name part1 */ |
AnnaBridge | 172:65be27845400 | 219 | __IO uint8_t ProdName2; /*!< Product Name part2 */ |
AnnaBridge | 172:65be27845400 | 220 | __IO uint8_t ProdRev; /*!< Product Revision */ |
AnnaBridge | 172:65be27845400 | 221 | __IO uint32_t ProdSN; /*!< Product Serial Number */ |
AnnaBridge | 172:65be27845400 | 222 | __IO uint8_t Reserved1; /*!< Reserved1 */ |
AnnaBridge | 172:65be27845400 | 223 | __IO uint16_t ManufactDate; /*!< Manufacturing Date */ |
AnnaBridge | 172:65be27845400 | 224 | __IO uint8_t CID_CRC; /*!< CID CRC */ |
AnnaBridge | 172:65be27845400 | 225 | __IO uint8_t Reserved2; /*!< Always 1 */ |
AnnaBridge | 172:65be27845400 | 226 | |
AnnaBridge | 172:65be27845400 | 227 | }HAL_MMC_CardCIDTypeDef; |
AnnaBridge | 172:65be27845400 | 228 | /** |
AnnaBridge | 172:65be27845400 | 229 | * @} |
AnnaBridge | 172:65be27845400 | 230 | */ |
AnnaBridge | 172:65be27845400 | 231 | |
AnnaBridge | 172:65be27845400 | 232 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
AnnaBridge | 172:65be27845400 | 233 | /** @defgroup MMC_Exported_Types_Group6 MMC Callback ID enumeration definition |
AnnaBridge | 172:65be27845400 | 234 | * @{ |
AnnaBridge | 172:65be27845400 | 235 | */ |
AnnaBridge | 172:65be27845400 | 236 | typedef enum |
AnnaBridge | 172:65be27845400 | 237 | { |
AnnaBridge | 172:65be27845400 | 238 | HAL_MMC_TX_CPLT_CB_ID = 0x00U, /*!< MMC Tx Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 239 | HAL_MMC_RX_CPLT_CB_ID = 0x01U, /*!< MMC Rx Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 240 | HAL_MMC_ERROR_CB_ID = 0x02U, /*!< MMC Error Callback ID */ |
AnnaBridge | 172:65be27845400 | 241 | HAL_MMC_ABORT_CB_ID = 0x03U, /*!< MMC Abort Callback ID */ |
AnnaBridge | 172:65be27845400 | 242 | HAL_MMC_READ_DMA_DBL_BUF0_CPLT_CB_ID = 0x04U, /*!< MMC Rx DMA Double Buffer 0 Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 243 | HAL_MMC_READ_DMA_DBL_BUF1_CPLT_CB_ID = 0x05U, /*!< MMC Rx DMA Double Buffer 1 Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 244 | HAL_MMC_WRITE_DMA_DBL_BUF0_CPLT_CB_ID = 0x06U, /*!< MMC Tx DMA Double Buffer 0 Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 245 | HAL_MMC_WRITE_DMA_DBL_BUF1_CPLT_CB_ID = 0x07U, /*!< MMC Tx DMA Double Buffer 1 Complete Callback ID */ |
AnnaBridge | 172:65be27845400 | 246 | |
AnnaBridge | 172:65be27845400 | 247 | HAL_MMC_MSP_INIT_CB_ID = 0x10U, /*!< MMC MspInit Callback ID */ |
AnnaBridge | 172:65be27845400 | 248 | HAL_MMC_MSP_DEINIT_CB_ID = 0x11U /*!< MMC MspDeInit Callback ID */ |
AnnaBridge | 172:65be27845400 | 249 | }HAL_MMC_CallbackIDTypeDef; |
AnnaBridge | 172:65be27845400 | 250 | /** |
AnnaBridge | 172:65be27845400 | 251 | * @} |
AnnaBridge | 172:65be27845400 | 252 | */ |
AnnaBridge | 172:65be27845400 | 253 | |
AnnaBridge | 172:65be27845400 | 254 | /** @defgroup MMC_Exported_Types_Group7 MMC Callback pointer definition |
AnnaBridge | 172:65be27845400 | 255 | * @{ |
AnnaBridge | 172:65be27845400 | 256 | */ |
AnnaBridge | 172:65be27845400 | 257 | typedef void (*pMMC_CallbackTypeDef) (MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 258 | /** |
AnnaBridge | 172:65be27845400 | 259 | * @} |
AnnaBridge | 172:65be27845400 | 260 | */ |
AnnaBridge | 172:65be27845400 | 261 | #endif |
AnnaBridge | 172:65be27845400 | 262 | /** |
AnnaBridge | 172:65be27845400 | 263 | * @} |
AnnaBridge | 172:65be27845400 | 264 | */ |
AnnaBridge | 172:65be27845400 | 265 | |
AnnaBridge | 172:65be27845400 | 266 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 267 | /** @defgroup MMC_Exported_Constants Exported Constants |
AnnaBridge | 172:65be27845400 | 268 | * @{ |
AnnaBridge | 172:65be27845400 | 269 | */ |
AnnaBridge | 172:65be27845400 | 270 | |
AnnaBridge | 172:65be27845400 | 271 | #define MMC_BLOCKSIZE ((uint32_t)512U) /*!< Block size is 512 bytes */ |
AnnaBridge | 172:65be27845400 | 272 | |
AnnaBridge | 172:65be27845400 | 273 | /** @defgroup MMC_Exported_Constansts_Group1 MMC Error status enumeration Structure definition |
AnnaBridge | 172:65be27845400 | 274 | * @{ |
AnnaBridge | 172:65be27845400 | 275 | */ |
AnnaBridge | 172:65be27845400 | 276 | #define HAL_MMC_ERROR_NONE SDMMC_ERROR_NONE /*!< No error */ |
AnnaBridge | 172:65be27845400 | 277 | #define HAL_MMC_ERROR_CMD_CRC_FAIL SDMMC_ERROR_CMD_CRC_FAIL /*!< Command response received (but CRC check failed) */ |
AnnaBridge | 172:65be27845400 | 278 | #define HAL_MMC_ERROR_DATA_CRC_FAIL SDMMC_ERROR_DATA_CRC_FAIL /*!< Data block sent/received (CRC check failed) */ |
AnnaBridge | 172:65be27845400 | 279 | #define HAL_MMC_ERROR_CMD_RSP_TIMEOUT SDMMC_ERROR_CMD_RSP_TIMEOUT /*!< Command response timeout */ |
AnnaBridge | 172:65be27845400 | 280 | #define HAL_MMC_ERROR_DATA_TIMEOUT SDMMC_ERROR_DATA_TIMEOUT /*!< Data timeout */ |
AnnaBridge | 172:65be27845400 | 281 | #define HAL_MMC_ERROR_TX_UNDERRUN SDMMC_ERROR_TX_UNDERRUN /*!< Transmit FIFO underrun */ |
AnnaBridge | 172:65be27845400 | 282 | #define HAL_MMC_ERROR_RX_OVERRUN SDMMC_ERROR_RX_OVERRUN /*!< Receive FIFO overrun */ |
AnnaBridge | 172:65be27845400 | 283 | #define HAL_MMC_ERROR_ADDR_MISALIGNED SDMMC_ERROR_ADDR_MISALIGNED /*!< Misaligned address */ |
AnnaBridge | 172:65be27845400 | 284 | #define HAL_MMC_ERROR_BLOCK_LEN_ERR SDMMC_ERROR_BLOCK_LEN_ERR /*!< Transferred block length is not allowed for the card or the |
AnnaBridge | 172:65be27845400 | 285 | number of transferred bytes does not match the block length */ |
AnnaBridge | 172:65be27845400 | 286 | #define HAL_MMC_ERROR_ERASE_SEQ_ERR SDMMC_ERROR_ERASE_SEQ_ERR /*!< An error in the sequence of erase command occurs */ |
AnnaBridge | 172:65be27845400 | 287 | #define HAL_MMC_ERROR_BAD_ERASE_PARAM SDMMC_ERROR_BAD_ERASE_PARAM /*!< An invalid selection for erase groups */ |
AnnaBridge | 172:65be27845400 | 288 | #define HAL_MMC_ERROR_WRITE_PROT_VIOLATION SDMMC_ERROR_WRITE_PROT_VIOLATION /*!< Attempt to program a write protect block */ |
AnnaBridge | 172:65be27845400 | 289 | #define HAL_MMC_ERROR_LOCK_UNLOCK_FAILED SDMMC_ERROR_LOCK_UNLOCK_FAILED /*!< Sequence or password error has been detected in unlock |
AnnaBridge | 172:65be27845400 | 290 | command or if there was an attempt to access a locked card */ |
AnnaBridge | 172:65be27845400 | 291 | #define HAL_MMC_ERROR_COM_CRC_FAILED SDMMC_ERROR_COM_CRC_FAILED /*!< CRC check of the previous command failed */ |
AnnaBridge | 172:65be27845400 | 292 | #define HAL_MMC_ERROR_ILLEGAL_CMD SDMMC_ERROR_ILLEGAL_CMD /*!< Command is not legal for the card state */ |
AnnaBridge | 172:65be27845400 | 293 | #define HAL_MMC_ERROR_CARD_ECC_FAILED SDMMC_ERROR_CARD_ECC_FAILED /*!< Card internal ECC was applied but failed to correct the data */ |
AnnaBridge | 172:65be27845400 | 294 | #define HAL_MMC_ERROR_CC_ERR SDMMC_ERROR_CC_ERR /*!< Internal card controller error */ |
AnnaBridge | 172:65be27845400 | 295 | #define HAL_MMC_ERROR_GENERAL_UNKNOWN_ERR SDMMC_ERROR_GENERAL_UNKNOWN_ERR /*!< General or unknown error */ |
AnnaBridge | 172:65be27845400 | 296 | #define HAL_MMC_ERROR_STREAM_READ_UNDERRUN SDMMC_ERROR_STREAM_READ_UNDERRUN /*!< The card could not sustain data reading in stream rmode */ |
AnnaBridge | 172:65be27845400 | 297 | #define HAL_MMC_ERROR_STREAM_WRITE_OVERRUN SDMMC_ERROR_STREAM_WRITE_OVERRUN /*!< The card could not sustain data programming in stream mode */ |
AnnaBridge | 172:65be27845400 | 298 | #define HAL_MMC_ERROR_CID_CSD_OVERWRITE SDMMC_ERROR_CID_CSD_OVERWRITE /*!< CID/CSD overwrite error */ |
AnnaBridge | 172:65be27845400 | 299 | #define HAL_MMC_ERROR_WP_ERASE_SKIP SDMMC_ERROR_WP_ERASE_SKIP /*!< Only partial address space was erased */ |
AnnaBridge | 172:65be27845400 | 300 | #define HAL_MMC_ERROR_CARD_ECC_DISABLED SDMMC_ERROR_CARD_ECC_DISABLED /*!< Command has been executed without using internal ECC */ |
AnnaBridge | 172:65be27845400 | 301 | #define HAL_MMC_ERROR_ERASE_RESET SDMMC_ERROR_ERASE_RESET /*!< Erase sequence was cleared before executing because an out |
AnnaBridge | 172:65be27845400 | 302 | of erase sequence command was received */ |
AnnaBridge | 172:65be27845400 | 303 | #define HAL_MMC_ERROR_AKE_SEQ_ERR SDMMC_ERROR_AKE_SEQ_ERR /*!< Error in sequence of authentication */ |
AnnaBridge | 172:65be27845400 | 304 | #define HAL_MMC_ERROR_INVALID_VOLTRANGE SDMMC_ERROR_INVALID_VOLTRANGE /*!< Error in case of invalid voltage range */ |
AnnaBridge | 172:65be27845400 | 305 | #define HAL_MMC_ERROR_ADDR_OUT_OF_RANGE SDMMC_ERROR_ADDR_OUT_OF_RANGE /*!< Error when addressed block is out of range */ |
AnnaBridge | 172:65be27845400 | 306 | #define HAL_MMC_ERROR_REQUEST_NOT_APPLICABLE SDMMC_ERROR_REQUEST_NOT_APPLICABLE /*!< Error when command request is not applicable */ |
AnnaBridge | 172:65be27845400 | 307 | #define HAL_MMC_ERROR_PARAM SDMMC_ERROR_INVALID_PARAMETER /*!< the used parameter is not valid */ |
AnnaBridge | 172:65be27845400 | 308 | #define HAL_MMC_ERROR_UNSUPPORTED_FEATURE SDMMC_ERROR_UNSUPPORTED_FEATURE /*!< Error when feature is not insupported */ |
AnnaBridge | 172:65be27845400 | 309 | #define HAL_MMC_ERROR_BUSY SDMMC_ERROR_BUSY /*!< Error when transfer process is busy */ |
AnnaBridge | 172:65be27845400 | 310 | #define HAL_MMC_ERROR_DMA SDMMC_ERROR_DMA /*!< Error while DMA transfer */ |
AnnaBridge | 172:65be27845400 | 311 | #define HAL_MMC_ERROR_TIMEOUT SDMMC_ERROR_TIMEOUT /*!< Timeout error */ |
AnnaBridge | 172:65be27845400 | 312 | |
AnnaBridge | 172:65be27845400 | 313 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
AnnaBridge | 172:65be27845400 | 314 | #define HAL_MMC_ERROR_INVALID_CALLBACK SDMMC_ERROR_INVALID_PARAMETER /*!< Invalid callback error */ |
AnnaBridge | 172:65be27845400 | 315 | #endif |
AnnaBridge | 172:65be27845400 | 316 | /** |
AnnaBridge | 172:65be27845400 | 317 | * @} |
AnnaBridge | 172:65be27845400 | 318 | */ |
AnnaBridge | 172:65be27845400 | 319 | |
AnnaBridge | 172:65be27845400 | 320 | /** @defgroup MMC_Exported_Constansts_Group2 MMC context enumeration |
AnnaBridge | 172:65be27845400 | 321 | * @{ |
AnnaBridge | 172:65be27845400 | 322 | */ |
AnnaBridge | 172:65be27845400 | 323 | #define MMC_CONTEXT_NONE ((uint32_t)0x00000000U) /*!< None */ |
AnnaBridge | 172:65be27845400 | 324 | #define MMC_CONTEXT_READ_SINGLE_BLOCK ((uint32_t)0x00000001U) /*!< Read single block operation */ |
AnnaBridge | 172:65be27845400 | 325 | #define MMC_CONTEXT_READ_MULTIPLE_BLOCK ((uint32_t)0x00000002U) /*!< Read multiple blocks operation */ |
AnnaBridge | 172:65be27845400 | 326 | #define MMC_CONTEXT_WRITE_SINGLE_BLOCK ((uint32_t)0x00000010U) /*!< Write single block operation */ |
AnnaBridge | 172:65be27845400 | 327 | #define MMC_CONTEXT_WRITE_MULTIPLE_BLOCK ((uint32_t)0x00000020U) /*!< Write multiple blocks operation */ |
AnnaBridge | 172:65be27845400 | 328 | #define MMC_CONTEXT_IT ((uint32_t)0x00000008U) /*!< Process in Interrupt mode */ |
AnnaBridge | 172:65be27845400 | 329 | #define MMC_CONTEXT_DMA ((uint32_t)0x00000080U) /*!< Process in DMA mode */ |
AnnaBridge | 172:65be27845400 | 330 | |
AnnaBridge | 172:65be27845400 | 331 | /** |
AnnaBridge | 172:65be27845400 | 332 | * @} |
AnnaBridge | 172:65be27845400 | 333 | */ |
AnnaBridge | 172:65be27845400 | 334 | |
AnnaBridge | 172:65be27845400 | 335 | /** @defgroup MMC_Exported_Constansts_Group3 MMC Voltage mode |
AnnaBridge | 172:65be27845400 | 336 | * @{ |
AnnaBridge | 172:65be27845400 | 337 | */ |
AnnaBridge | 172:65be27845400 | 338 | /** |
AnnaBridge | 172:65be27845400 | 339 | * @brief |
AnnaBridge | 172:65be27845400 | 340 | */ |
AnnaBridge | 172:65be27845400 | 341 | #define MMC_HIGH_VOLTAGE_RANGE 0x80FF8000U /*!< VALUE OF ARGUMENT */ |
AnnaBridge | 172:65be27845400 | 342 | #define MMC_DUAL_VOLTAGE_RANGE 0x80FF8080U /*!< VALUE OF ARGUMENT */ |
AnnaBridge | 172:65be27845400 | 343 | #define eMMC_HIGH_VOLTAGE_RANGE 0xC0FF8000U /*!< for eMMC > 2Gb sector mode */ |
AnnaBridge | 172:65be27845400 | 344 | #define eMMC_DUAL_VOLTAGE_RANGE 0xC0FF8080U /*!< for eMMC > 2Gb sector mode */ |
AnnaBridge | 172:65be27845400 | 345 | #define MMC_INVALID_VOLTAGE_RANGE 0x0001FF01U |
AnnaBridge | 172:65be27845400 | 346 | /** |
AnnaBridge | 172:65be27845400 | 347 | * @} |
AnnaBridge | 172:65be27845400 | 348 | */ |
AnnaBridge | 172:65be27845400 | 349 | |
AnnaBridge | 172:65be27845400 | 350 | /** @defgroup MMC_Exported_Constansts_Group4 MMC Memory Cards |
AnnaBridge | 172:65be27845400 | 351 | * @{ |
AnnaBridge | 172:65be27845400 | 352 | */ |
AnnaBridge | 172:65be27845400 | 353 | #define MMC_LOW_CAPACITY_CARD ((uint32_t)0x00000000U) /*!< MMC Card Capacity <=2Gbytes */ |
AnnaBridge | 172:65be27845400 | 354 | #define MMC_HIGH_CAPACITY_CARD ((uint32_t)0x00000001U) /*!< MMC Card Capacity >2Gbytes and <2Tbytes */ |
AnnaBridge | 172:65be27845400 | 355 | |
AnnaBridge | 172:65be27845400 | 356 | /** |
AnnaBridge | 172:65be27845400 | 357 | * @} |
AnnaBridge | 172:65be27845400 | 358 | */ |
AnnaBridge | 172:65be27845400 | 359 | |
AnnaBridge | 172:65be27845400 | 360 | /** |
AnnaBridge | 172:65be27845400 | 361 | * @} |
AnnaBridge | 172:65be27845400 | 362 | */ |
AnnaBridge | 172:65be27845400 | 363 | |
AnnaBridge | 172:65be27845400 | 364 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 365 | /** @defgroup MMC_Exported_macros MMC Exported Macros |
AnnaBridge | 172:65be27845400 | 366 | * @brief macros to handle interrupts and specific clock configurations |
AnnaBridge | 172:65be27845400 | 367 | * @{ |
AnnaBridge | 172:65be27845400 | 368 | */ |
AnnaBridge | 172:65be27845400 | 369 | /** @brief Reset MMC handle state. |
AnnaBridge | 172:65be27845400 | 370 | * @param __HANDLE__ : MMC handle. |
AnnaBridge | 172:65be27845400 | 371 | * @retval None |
AnnaBridge | 172:65be27845400 | 372 | */ |
AnnaBridge | 172:65be27845400 | 373 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
AnnaBridge | 172:65be27845400 | 374 | #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) do { \ |
AnnaBridge | 172:65be27845400 | 375 | (__HANDLE__)->State = HAL_MMC_STATE_RESET; \ |
AnnaBridge | 172:65be27845400 | 376 | (__HANDLE__)->MspInitCallback = NULL; \ |
AnnaBridge | 172:65be27845400 | 377 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
AnnaBridge | 172:65be27845400 | 378 | } while(0) |
AnnaBridge | 172:65be27845400 | 379 | #else |
AnnaBridge | 172:65be27845400 | 380 | #define __HAL_MMC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_MMC_STATE_RESET) |
AnnaBridge | 172:65be27845400 | 381 | #endif |
AnnaBridge | 172:65be27845400 | 382 | |
AnnaBridge | 172:65be27845400 | 383 | /** |
AnnaBridge | 172:65be27845400 | 384 | * @brief Enable the MMC device interrupt. |
AnnaBridge | 172:65be27845400 | 385 | * @param __HANDLE__: MMC Handle |
AnnaBridge | 172:65be27845400 | 386 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be enabled. |
AnnaBridge | 172:65be27845400 | 387 | * This parameter can be one or a combination of the following values: |
AnnaBridge | 172:65be27845400 | 388 | * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 389 | * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 390 | * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt |
AnnaBridge | 172:65be27845400 | 391 | * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt |
AnnaBridge | 172:65be27845400 | 392 | * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
AnnaBridge | 172:65be27845400 | 393 | * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt |
AnnaBridge | 172:65be27845400 | 394 | * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 395 | * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt |
AnnaBridge | 172:65be27845400 | 396 | * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
AnnaBridge | 172:65be27845400 | 397 | * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt |
AnnaBridge | 172:65be27845400 | 398 | * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 399 | * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt |
AnnaBridge | 172:65be27845400 | 400 | * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
AnnaBridge | 172:65be27845400 | 401 | * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
AnnaBridge | 172:65be27845400 | 402 | * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt |
AnnaBridge | 172:65be27845400 | 403 | * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt |
AnnaBridge | 172:65be27845400 | 404 | * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt |
AnnaBridge | 172:65be27845400 | 405 | * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt |
AnnaBridge | 172:65be27845400 | 406 | * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt |
AnnaBridge | 172:65be27845400 | 407 | * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt |
AnnaBridge | 172:65be27845400 | 408 | * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt |
AnnaBridge | 172:65be27845400 | 409 | * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt |
AnnaBridge | 172:65be27845400 | 410 | * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt |
AnnaBridge | 172:65be27845400 | 411 | * @retval None |
AnnaBridge | 172:65be27845400 | 412 | */ |
AnnaBridge | 172:65be27845400 | 413 | #define __HAL_MMC_ENABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_ENABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 414 | |
AnnaBridge | 172:65be27845400 | 415 | /** |
AnnaBridge | 172:65be27845400 | 416 | * @brief Disable the MMC device interrupt. |
AnnaBridge | 172:65be27845400 | 417 | * @param __HANDLE__: MMC Handle |
AnnaBridge | 172:65be27845400 | 418 | * @param __INTERRUPT__: specifies the SDMMC interrupt sources to be disabled. |
AnnaBridge | 172:65be27845400 | 419 | * This parameter can be one or a combination of the following values: |
AnnaBridge | 172:65be27845400 | 420 | * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 421 | * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 422 | * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt |
AnnaBridge | 172:65be27845400 | 423 | * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt |
AnnaBridge | 172:65be27845400 | 424 | * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
AnnaBridge | 172:65be27845400 | 425 | * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt |
AnnaBridge | 172:65be27845400 | 426 | * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 427 | * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt |
AnnaBridge | 172:65be27845400 | 428 | * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
AnnaBridge | 172:65be27845400 | 429 | * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt |
AnnaBridge | 172:65be27845400 | 430 | * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 431 | * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt |
AnnaBridge | 172:65be27845400 | 432 | * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
AnnaBridge | 172:65be27845400 | 433 | * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
AnnaBridge | 172:65be27845400 | 434 | * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt |
AnnaBridge | 172:65be27845400 | 435 | * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt |
AnnaBridge | 172:65be27845400 | 436 | * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt |
AnnaBridge | 172:65be27845400 | 437 | * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt |
AnnaBridge | 172:65be27845400 | 438 | * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt |
AnnaBridge | 172:65be27845400 | 439 | * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt |
AnnaBridge | 172:65be27845400 | 440 | * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt |
AnnaBridge | 172:65be27845400 | 441 | * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt |
AnnaBridge | 172:65be27845400 | 442 | * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt |
AnnaBridge | 172:65be27845400 | 443 | * @retval None |
AnnaBridge | 172:65be27845400 | 444 | */ |
AnnaBridge | 172:65be27845400 | 445 | #define __HAL_MMC_DISABLE_IT(__HANDLE__, __INTERRUPT__) __SDMMC_DISABLE_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 446 | |
AnnaBridge | 172:65be27845400 | 447 | /** |
AnnaBridge | 172:65be27845400 | 448 | * @brief Check whether the specified MMC flag is set or not. |
AnnaBridge | 172:65be27845400 | 449 | * @param __HANDLE__: MMC Handle |
AnnaBridge | 172:65be27845400 | 450 | * @param __FLAG__: specifies the flag to check. |
AnnaBridge | 172:65be27845400 | 451 | * This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 452 | * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) |
AnnaBridge | 172:65be27845400 | 453 | * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
AnnaBridge | 172:65be27845400 | 454 | * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout |
AnnaBridge | 172:65be27845400 | 455 | * @arg SDMMC_FLAG_DTIMEOUT: Data timeout |
AnnaBridge | 172:65be27845400 | 456 | * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error |
AnnaBridge | 172:65be27845400 | 457 | * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error |
AnnaBridge | 172:65be27845400 | 458 | * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) |
AnnaBridge | 172:65be27845400 | 459 | * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) |
AnnaBridge | 172:65be27845400 | 460 | * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
AnnaBridge | 172:65be27845400 | 461 | * @arg SDMMC_FLAG_DHOLD: Data transfer Hold |
AnnaBridge | 172:65be27845400 | 462 | * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
AnnaBridge | 172:65be27845400 | 463 | * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 |
AnnaBridge | 172:65be27845400 | 464 | * @arg SDMMC_FLAG_CPSMACT: Command path state machine active |
AnnaBridge | 172:65be27845400 | 465 | * @arg SDMMC_FLAG_DPSMACT: Data path state machine active |
AnnaBridge | 172:65be27845400 | 466 | * @arg SDMMC_FLAG_TXFIFOHE: Transmit FIFO Half Empty |
AnnaBridge | 172:65be27845400 | 467 | * @arg SDMMC_FLAG_RXFIFOHF: Receive FIFO Half Full |
AnnaBridge | 172:65be27845400 | 468 | * @arg SDMMC_FLAG_TXFIFOF: Transmit FIFO full |
AnnaBridge | 172:65be27845400 | 469 | * @arg SDMMC_FLAG_RXFIFOF: Receive FIFO full |
AnnaBridge | 172:65be27845400 | 470 | * @arg SDMMC_FLAG_TXFIFOE: Transmit FIFO empty |
AnnaBridge | 172:65be27845400 | 471 | * @arg SDMMC_FLAG_RXFIFOE: Receive FIFO empty |
AnnaBridge | 172:65be27845400 | 472 | * @arg SDMMC_FLAG_BUSYD0: Inverted value of SDMMC_D0 line (Busy) |
AnnaBridge | 172:65be27845400 | 473 | * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected |
AnnaBridge | 172:65be27845400 | 474 | * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received |
AnnaBridge | 172:65be27845400 | 475 | * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received |
AnnaBridge | 172:65be27845400 | 476 | * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout |
AnnaBridge | 172:65be27845400 | 477 | * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion |
AnnaBridge | 172:65be27845400 | 478 | * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure |
AnnaBridge | 172:65be27845400 | 479 | * @arg SDMMC_FLAG_IDMATE: IDMA transfer error |
AnnaBridge | 172:65be27845400 | 480 | * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete |
AnnaBridge | 172:65be27845400 | 481 | * @retval The new state of MMC FLAG (SET or RESET). |
AnnaBridge | 172:65be27845400 | 482 | */ |
AnnaBridge | 172:65be27845400 | 483 | #define __HAL_MMC_GET_FLAG(__HANDLE__, __FLAG__) __SDMMC_GET_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
AnnaBridge | 172:65be27845400 | 484 | |
AnnaBridge | 172:65be27845400 | 485 | /** |
AnnaBridge | 172:65be27845400 | 486 | * @brief Clear the MMC's pending flags. |
AnnaBridge | 172:65be27845400 | 487 | * @param __HANDLE__: MMC Handle |
AnnaBridge | 172:65be27845400 | 488 | * @param __FLAG__: specifies the flag to clear. |
AnnaBridge | 172:65be27845400 | 489 | * This parameter can be one or a combination of the following values: |
AnnaBridge | 172:65be27845400 | 490 | * @arg SDMMC_FLAG_CCRCFAIL: Command response received (CRC check failed) |
AnnaBridge | 172:65be27845400 | 491 | * @arg SDMMC_FLAG_DCRCFAIL: Data block sent/received (CRC check failed) |
AnnaBridge | 172:65be27845400 | 492 | * @arg SDMMC_FLAG_CTIMEOUT: Command response timeout |
AnnaBridge | 172:65be27845400 | 493 | * @arg SDMMC_FLAG_DTIMEOUT: Data timeout |
AnnaBridge | 172:65be27845400 | 494 | * @arg SDMMC_FLAG_TXUNDERR: Transmit FIFO underrun error |
AnnaBridge | 172:65be27845400 | 495 | * @arg SDMMC_FLAG_RXOVERR: Received FIFO overrun error |
AnnaBridge | 172:65be27845400 | 496 | * @arg SDMMC_FLAG_CMDREND: Command response received (CRC check passed) |
AnnaBridge | 172:65be27845400 | 497 | * @arg SDMMC_FLAG_CMDSENT: Command sent (no response required) |
AnnaBridge | 172:65be27845400 | 498 | * @arg SDMMC_FLAG_DATAEND: Data end (data counter, DATACOUNT, is zero) |
AnnaBridge | 172:65be27845400 | 499 | * @arg SDMMC_FLAG_DHOLD: Data transfer Hold |
AnnaBridge | 172:65be27845400 | 500 | * @arg SDMMC_FLAG_DBCKEND: Data block sent/received (CRC check passed) |
AnnaBridge | 172:65be27845400 | 501 | * @arg SDMMC_FLAG_DABORT: Data transfer aborted by CMD12 |
AnnaBridge | 172:65be27845400 | 502 | * @arg SDMMC_FLAG_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected |
AnnaBridge | 172:65be27845400 | 503 | * @arg SDMMC_FLAG_SDIOIT: SD I/O interrupt received |
AnnaBridge | 172:65be27845400 | 504 | * @arg SDMMC_FLAG_ACKFAIL: Boot Acknowledgment received |
AnnaBridge | 172:65be27845400 | 505 | * @arg SDMMC_FLAG_ACKTIMEOUT: Boot Acknowledgment timeout |
AnnaBridge | 172:65be27845400 | 506 | * @arg SDMMC_FLAG_VSWEND: Voltage switch critical timing section completion |
AnnaBridge | 172:65be27845400 | 507 | * @arg SDMMC_FLAG_CKSTOP: SDMMC_CK stopped in Voltage switch procedure |
AnnaBridge | 172:65be27845400 | 508 | * @arg SDMMC_FLAG_IDMATE: IDMA transfer error |
AnnaBridge | 172:65be27845400 | 509 | * @arg SDMMC_FLAG_IDMABTC: IDMA buffer transfer complete |
AnnaBridge | 172:65be27845400 | 510 | * @retval None |
AnnaBridge | 172:65be27845400 | 511 | */ |
AnnaBridge | 172:65be27845400 | 512 | #define __HAL_MMC_CLEAR_FLAG(__HANDLE__, __FLAG__) __SDMMC_CLEAR_FLAG((__HANDLE__)->Instance, (__FLAG__)) |
AnnaBridge | 172:65be27845400 | 513 | |
AnnaBridge | 172:65be27845400 | 514 | /** |
AnnaBridge | 172:65be27845400 | 515 | * @brief Check whether the specified MMC interrupt has occurred or not. |
AnnaBridge | 172:65be27845400 | 516 | * @param __HANDLE__: MMC Handle |
AnnaBridge | 172:65be27845400 | 517 | * @param __INTERRUPT__: specifies the SDMMC interrupt source to check. |
AnnaBridge | 172:65be27845400 | 518 | * This parameter can be one of the following values: |
AnnaBridge | 172:65be27845400 | 519 | * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 520 | * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 521 | * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt |
AnnaBridge | 172:65be27845400 | 522 | * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt |
AnnaBridge | 172:65be27845400 | 523 | * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
AnnaBridge | 172:65be27845400 | 524 | * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt |
AnnaBridge | 172:65be27845400 | 525 | * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 526 | * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt |
AnnaBridge | 172:65be27845400 | 527 | * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
AnnaBridge | 172:65be27845400 | 528 | * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt |
AnnaBridge | 172:65be27845400 | 529 | * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 530 | * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt |
AnnaBridge | 172:65be27845400 | 531 | * @arg SDMMC_IT_DPSMACT: Data path state machine active interrupt |
AnnaBridge | 172:65be27845400 | 532 | * @arg SDMMC_IT_CPSMACT: Command path state machine active interrupt |
AnnaBridge | 172:65be27845400 | 533 | * @arg SDMMC_IT_TXFIFOHE: Transmit FIFO Half Empty interrupt |
AnnaBridge | 172:65be27845400 | 534 | * @arg SDMMC_IT_RXFIFOHF: Receive FIFO Half Full interrupt |
AnnaBridge | 172:65be27845400 | 535 | * @arg SDMMC_IT_TXFIFOF: Transmit FIFO full interrupt |
AnnaBridge | 172:65be27845400 | 536 | * @arg SDMMC_IT_RXFIFOF: Receive FIFO full interrupt |
AnnaBridge | 172:65be27845400 | 537 | * @arg SDMMC_IT_TXFIFOE: Transmit FIFO empty interrupt |
AnnaBridge | 172:65be27845400 | 538 | * @arg SDMMC_IT_RXFIFOE: Receive FIFO empty interrupt |
AnnaBridge | 172:65be27845400 | 539 | * @arg SDMMC_IT_BUSYD0: Inverted value of SDMMC_D0 line (Busy) |
AnnaBridge | 172:65be27845400 | 540 | * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt |
AnnaBridge | 172:65be27845400 | 541 | * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt |
AnnaBridge | 172:65be27845400 | 542 | * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt |
AnnaBridge | 172:65be27845400 | 543 | * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt |
AnnaBridge | 172:65be27845400 | 544 | * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt |
AnnaBridge | 172:65be27845400 | 545 | * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt |
AnnaBridge | 172:65be27845400 | 546 | * @arg SDMMC_IT_IDMATE: IDMA transfer error interrupt |
AnnaBridge | 172:65be27845400 | 547 | * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt |
AnnaBridge | 172:65be27845400 | 548 | * @retval The new state of MMC IT (SET or RESET). |
AnnaBridge | 172:65be27845400 | 549 | */ |
AnnaBridge | 172:65be27845400 | 550 | #define __HAL_MMC_GET_IT(__HANDLE__, __INTERRUPT__) __SDMMC_GET_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 551 | |
AnnaBridge | 172:65be27845400 | 552 | /** |
AnnaBridge | 172:65be27845400 | 553 | * @brief Clear the MMC's interrupt pending bits. |
AnnaBridge | 172:65be27845400 | 554 | * @param __HANDLE__: MMC Handle |
AnnaBridge | 172:65be27845400 | 555 | * @param __INTERRUPT__: specifies the interrupt pending bit to clear. |
AnnaBridge | 172:65be27845400 | 556 | * This parameter can be one or a combination of the following values: |
AnnaBridge | 172:65be27845400 | 557 | * @arg SDMMC_IT_CCRCFAIL: Command response received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 558 | * @arg SDMMC_IT_DCRCFAIL: Data block sent/received (CRC check failed) interrupt |
AnnaBridge | 172:65be27845400 | 559 | * @arg SDMMC_IT_CTIMEOUT: Command response timeout interrupt |
AnnaBridge | 172:65be27845400 | 560 | * @arg SDMMC_IT_DTIMEOUT: Data timeout interrupt |
AnnaBridge | 172:65be27845400 | 561 | * @arg SDMMC_IT_TXUNDERR: Transmit FIFO underrun error interrupt |
AnnaBridge | 172:65be27845400 | 562 | * @arg SDMMC_IT_RXOVERR: Received FIFO overrun error interrupt |
AnnaBridge | 172:65be27845400 | 563 | * @arg SDMMC_IT_CMDREND: Command response received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 564 | * @arg SDMMC_IT_CMDSENT: Command sent (no response required) interrupt |
AnnaBridge | 172:65be27845400 | 565 | * @arg SDMMC_IT_DATAEND: Data end (data counter, DATACOUNT, is zero) interrupt |
AnnaBridge | 172:65be27845400 | 566 | * @arg SDMMC_IT_DHOLD: Data transfer Hold interrupt |
AnnaBridge | 172:65be27845400 | 567 | * @arg SDMMC_IT_DBCKEND: Data block sent/received (CRC check passed) interrupt |
AnnaBridge | 172:65be27845400 | 568 | * @arg SDMMC_IT_DABORT: Data transfer aborted by CMD12 interrupt |
AnnaBridge | 172:65be27845400 | 569 | * @arg SDMMC_IT_BUSYD0END: End of SDMMC_D0 Busy following a CMD response detected interrupt |
AnnaBridge | 172:65be27845400 | 570 | * @arg SDMMC_IT_SDIOIT: SD I/O interrupt received interrupt |
AnnaBridge | 172:65be27845400 | 571 | * @arg SDMMC_IT_ACKFAIL: Boot Acknowledgment received interrupt |
AnnaBridge | 172:65be27845400 | 572 | * @arg SDMMC_IT_ACKTIMEOUT: Boot Acknowledgment timeout interrupt |
AnnaBridge | 172:65be27845400 | 573 | * @arg SDMMC_IT_VSWEND: Voltage switch critical timing section completion interrupt |
AnnaBridge | 172:65be27845400 | 574 | * @arg SDMMC_IT_CKSTOP: SDMMC_CK stopped in Voltage switch procedure interrupt |
AnnaBridge | 172:65be27845400 | 575 | * @arg SDMMC_IT_IDMATE: IDMA transfer error interrupt |
AnnaBridge | 172:65be27845400 | 576 | * @arg SDMMC_IT_IDMABTC: IDMA buffer transfer complete interrupt |
AnnaBridge | 172:65be27845400 | 577 | * @retval None |
AnnaBridge | 172:65be27845400 | 578 | */ |
AnnaBridge | 172:65be27845400 | 579 | #define __HAL_MMC_CLEAR_IT(__HANDLE__, __INTERRUPT__) __SDMMC_CLEAR_IT((__HANDLE__)->Instance, (__INTERRUPT__)) |
AnnaBridge | 172:65be27845400 | 580 | |
AnnaBridge | 172:65be27845400 | 581 | /** |
AnnaBridge | 172:65be27845400 | 582 | * @} |
AnnaBridge | 172:65be27845400 | 583 | */ |
AnnaBridge | 172:65be27845400 | 584 | |
AnnaBridge | 172:65be27845400 | 585 | /* Include MMC HAL Extension module */ |
AnnaBridge | 172:65be27845400 | 586 | #include "stm32h7xx_hal_mmc_ex.h" |
AnnaBridge | 172:65be27845400 | 587 | |
AnnaBridge | 172:65be27845400 | 588 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 589 | /** @defgroup MMC_Exported_Functions MMC Exported Functions |
AnnaBridge | 172:65be27845400 | 590 | * @{ |
AnnaBridge | 172:65be27845400 | 591 | */ |
AnnaBridge | 172:65be27845400 | 592 | |
AnnaBridge | 172:65be27845400 | 593 | /** @defgroup MMC_Exported_Functions_Group1 Initialization and de-initialization functions |
AnnaBridge | 172:65be27845400 | 594 | * @{ |
AnnaBridge | 172:65be27845400 | 595 | */ |
AnnaBridge | 172:65be27845400 | 596 | HAL_StatusTypeDef HAL_MMC_Init(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 597 | HAL_StatusTypeDef HAL_MMC_InitCard(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 598 | HAL_StatusTypeDef HAL_MMC_DeInit (MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 599 | void HAL_MMC_MspInit(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 600 | void HAL_MMC_MspDeInit(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 601 | |
AnnaBridge | 172:65be27845400 | 602 | /** |
AnnaBridge | 172:65be27845400 | 603 | * @} |
AnnaBridge | 172:65be27845400 | 604 | */ |
AnnaBridge | 172:65be27845400 | 605 | |
AnnaBridge | 172:65be27845400 | 606 | /** @defgroup MMC_Exported_Functions_Group2 Input and Output operation functions |
AnnaBridge | 172:65be27845400 | 607 | * @{ |
AnnaBridge | 172:65be27845400 | 608 | */ |
AnnaBridge | 172:65be27845400 | 609 | /* Blocking mode: Polling */ |
AnnaBridge | 172:65be27845400 | 610 | HAL_StatusTypeDef HAL_MMC_ReadBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
AnnaBridge | 172:65be27845400 | 611 | HAL_StatusTypeDef HAL_MMC_WriteBlocks(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks, uint32_t Timeout); |
AnnaBridge | 172:65be27845400 | 612 | HAL_StatusTypeDef HAL_MMC_Erase(MMC_HandleTypeDef *hmmc, uint32_t BlockStartAdd, uint32_t BlockEndAdd); |
AnnaBridge | 172:65be27845400 | 613 | /* Non-Blocking mode: IT */ |
AnnaBridge | 172:65be27845400 | 614 | HAL_StatusTypeDef HAL_MMC_ReadBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
AnnaBridge | 172:65be27845400 | 615 | HAL_StatusTypeDef HAL_MMC_WriteBlocks_IT(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
AnnaBridge | 172:65be27845400 | 616 | /* Non-Blocking mode: DMA */ |
AnnaBridge | 172:65be27845400 | 617 | HAL_StatusTypeDef HAL_MMC_ReadBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
AnnaBridge | 172:65be27845400 | 618 | HAL_StatusTypeDef HAL_MMC_WriteBlocks_DMA(MMC_HandleTypeDef *hmmc, uint8_t *pData, uint32_t BlockAdd, uint32_t NumberOfBlocks); |
AnnaBridge | 172:65be27845400 | 619 | |
AnnaBridge | 172:65be27845400 | 620 | void HAL_MMC_IRQHandler(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 621 | |
AnnaBridge | 172:65be27845400 | 622 | /* Callback in non blocking modes (DMA) */ |
AnnaBridge | 172:65be27845400 | 623 | void HAL_MMC_TxCpltCallback(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 624 | void HAL_MMC_RxCpltCallback(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 625 | void HAL_MMC_ErrorCallback(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 626 | void HAL_MMC_AbortCallback(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 627 | |
AnnaBridge | 172:65be27845400 | 628 | #if defined (USE_HAL_MMC_REGISTER_CALLBACKS) && (USE_HAL_MMC_REGISTER_CALLBACKS == 1U) |
AnnaBridge | 172:65be27845400 | 629 | /* MMC callback registering/unregistering */ |
AnnaBridge | 172:65be27845400 | 630 | HAL_StatusTypeDef HAL_MMC_RegisterCallback (MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId, pMMC_CallbackTypeDef pCallback); |
AnnaBridge | 172:65be27845400 | 631 | HAL_StatusTypeDef HAL_MMC_UnRegisterCallback(MMC_HandleTypeDef *hmmc, HAL_MMC_CallbackIDTypeDef CallbackId); |
AnnaBridge | 172:65be27845400 | 632 | #endif |
AnnaBridge | 172:65be27845400 | 633 | /** |
AnnaBridge | 172:65be27845400 | 634 | * @} |
AnnaBridge | 172:65be27845400 | 635 | */ |
AnnaBridge | 172:65be27845400 | 636 | |
AnnaBridge | 172:65be27845400 | 637 | /** @defgroup MMC_Exported_Functions_Group3 Peripheral Control functions |
AnnaBridge | 172:65be27845400 | 638 | * @{ |
AnnaBridge | 172:65be27845400 | 639 | */ |
AnnaBridge | 172:65be27845400 | 640 | HAL_StatusTypeDef HAL_MMC_ConfigWideBusOperation(MMC_HandleTypeDef *hmmc, uint32_t WideMode); |
AnnaBridge | 172:65be27845400 | 641 | /** |
AnnaBridge | 172:65be27845400 | 642 | * @} |
AnnaBridge | 172:65be27845400 | 643 | */ |
AnnaBridge | 172:65be27845400 | 644 | |
AnnaBridge | 172:65be27845400 | 645 | /** @defgroup MMC_Exported_Functions_Group4 MMC card related functions |
AnnaBridge | 172:65be27845400 | 646 | * @{ |
AnnaBridge | 172:65be27845400 | 647 | */ |
AnnaBridge | 172:65be27845400 | 648 | HAL_MMC_CardStateTypeDef HAL_MMC_GetCardState(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 649 | HAL_StatusTypeDef HAL_MMC_GetCardCID(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCIDTypeDef *pCID); |
AnnaBridge | 172:65be27845400 | 650 | HAL_StatusTypeDef HAL_MMC_GetCardCSD(MMC_HandleTypeDef *hmmc, HAL_MMC_CardCSDTypeDef *pCSD); |
AnnaBridge | 172:65be27845400 | 651 | HAL_StatusTypeDef HAL_MMC_GetCardInfo(MMC_HandleTypeDef *hmmc, HAL_MMC_CardInfoTypeDef *pCardInfo); |
AnnaBridge | 172:65be27845400 | 652 | /** |
AnnaBridge | 172:65be27845400 | 653 | * @} |
AnnaBridge | 172:65be27845400 | 654 | */ |
AnnaBridge | 172:65be27845400 | 655 | |
AnnaBridge | 172:65be27845400 | 656 | /** @defgroup MMC_Exported_Functions_Group5 Peripheral State and Errors functions |
AnnaBridge | 172:65be27845400 | 657 | * @{ |
AnnaBridge | 172:65be27845400 | 658 | */ |
AnnaBridge | 172:65be27845400 | 659 | HAL_MMC_StateTypeDef HAL_MMC_GetState(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 660 | uint32_t HAL_MMC_GetError(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 661 | /** |
AnnaBridge | 172:65be27845400 | 662 | * @} |
AnnaBridge | 172:65be27845400 | 663 | */ |
AnnaBridge | 172:65be27845400 | 664 | |
AnnaBridge | 172:65be27845400 | 665 | /** @defgroup MMC_Exported_Functions_Group6 Perioheral Abort management |
AnnaBridge | 172:65be27845400 | 666 | * @{ |
AnnaBridge | 172:65be27845400 | 667 | */ |
AnnaBridge | 172:65be27845400 | 668 | HAL_StatusTypeDef HAL_MMC_Abort(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 669 | HAL_StatusTypeDef HAL_MMC_Abort_IT(MMC_HandleTypeDef *hmmc); |
AnnaBridge | 172:65be27845400 | 670 | /** |
AnnaBridge | 172:65be27845400 | 671 | * @} |
AnnaBridge | 172:65be27845400 | 672 | */ |
AnnaBridge | 172:65be27845400 | 673 | |
AnnaBridge | 172:65be27845400 | 674 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 675 | /** @defgroup MMC_Private_Types MMC Private Types |
AnnaBridge | 172:65be27845400 | 676 | * @{ |
AnnaBridge | 172:65be27845400 | 677 | */ |
AnnaBridge | 172:65be27845400 | 678 | |
AnnaBridge | 172:65be27845400 | 679 | /** |
AnnaBridge | 172:65be27845400 | 680 | * @} |
AnnaBridge | 172:65be27845400 | 681 | */ |
AnnaBridge | 172:65be27845400 | 682 | |
AnnaBridge | 172:65be27845400 | 683 | /* Private defines -----------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 684 | /** @defgroup MMC_Private_Defines MMC Private Defines |
AnnaBridge | 172:65be27845400 | 685 | * @{ |
AnnaBridge | 172:65be27845400 | 686 | */ |
AnnaBridge | 172:65be27845400 | 687 | |
AnnaBridge | 172:65be27845400 | 688 | /** |
AnnaBridge | 172:65be27845400 | 689 | * @} |
AnnaBridge | 172:65be27845400 | 690 | */ |
AnnaBridge | 172:65be27845400 | 691 | |
AnnaBridge | 172:65be27845400 | 692 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 693 | /** @defgroup MMC_Private_Variables MMC Private Variables |
AnnaBridge | 172:65be27845400 | 694 | * @{ |
AnnaBridge | 172:65be27845400 | 695 | */ |
AnnaBridge | 172:65be27845400 | 696 | |
AnnaBridge | 172:65be27845400 | 697 | /** |
AnnaBridge | 172:65be27845400 | 698 | * @} |
AnnaBridge | 172:65be27845400 | 699 | */ |
AnnaBridge | 172:65be27845400 | 700 | |
AnnaBridge | 172:65be27845400 | 701 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 702 | /** @defgroup MMC_Private_Constants MMC Private Constants |
AnnaBridge | 172:65be27845400 | 703 | * @{ |
AnnaBridge | 172:65be27845400 | 704 | */ |
AnnaBridge | 172:65be27845400 | 705 | |
AnnaBridge | 172:65be27845400 | 706 | /** |
AnnaBridge | 172:65be27845400 | 707 | * @} |
AnnaBridge | 172:65be27845400 | 708 | */ |
AnnaBridge | 172:65be27845400 | 709 | |
AnnaBridge | 172:65be27845400 | 710 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 711 | /** @defgroup MMC_Private_Macros MMC Private Macros |
AnnaBridge | 172:65be27845400 | 712 | * @{ |
AnnaBridge | 172:65be27845400 | 713 | */ |
AnnaBridge | 172:65be27845400 | 714 | |
AnnaBridge | 172:65be27845400 | 715 | /** |
AnnaBridge | 172:65be27845400 | 716 | * @} |
AnnaBridge | 172:65be27845400 | 717 | */ |
AnnaBridge | 172:65be27845400 | 718 | |
AnnaBridge | 172:65be27845400 | 719 | /* Private functions prototypes ----------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 720 | /** @defgroup MMC_Private_Functions_Prototypes MMC Private Functions Prototypes |
AnnaBridge | 172:65be27845400 | 721 | * @{ |
AnnaBridge | 172:65be27845400 | 722 | */ |
AnnaBridge | 172:65be27845400 | 723 | |
AnnaBridge | 172:65be27845400 | 724 | /** |
AnnaBridge | 172:65be27845400 | 725 | * @} |
AnnaBridge | 172:65be27845400 | 726 | */ |
AnnaBridge | 172:65be27845400 | 727 | |
AnnaBridge | 172:65be27845400 | 728 | /* Private functions ---------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 729 | /** @defgroup MMC_Private_Functions MMC Private Functions |
AnnaBridge | 172:65be27845400 | 730 | * @{ |
AnnaBridge | 172:65be27845400 | 731 | */ |
AnnaBridge | 172:65be27845400 | 732 | |
AnnaBridge | 172:65be27845400 | 733 | /** |
AnnaBridge | 172:65be27845400 | 734 | * @} |
AnnaBridge | 172:65be27845400 | 735 | */ |
AnnaBridge | 172:65be27845400 | 736 | |
AnnaBridge | 172:65be27845400 | 737 | |
AnnaBridge | 172:65be27845400 | 738 | /** |
AnnaBridge | 172:65be27845400 | 739 | * @} |
AnnaBridge | 172:65be27845400 | 740 | */ |
AnnaBridge | 172:65be27845400 | 741 | |
AnnaBridge | 172:65be27845400 | 742 | /** |
AnnaBridge | 172:65be27845400 | 743 | * @} |
AnnaBridge | 172:65be27845400 | 744 | */ |
AnnaBridge | 172:65be27845400 | 745 | |
AnnaBridge | 172:65be27845400 | 746 | /** |
AnnaBridge | 172:65be27845400 | 747 | * @} |
AnnaBridge | 172:65be27845400 | 748 | */ |
AnnaBridge | 172:65be27845400 | 749 | |
AnnaBridge | 172:65be27845400 | 750 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 751 | } |
AnnaBridge | 172:65be27845400 | 752 | #endif |
AnnaBridge | 172:65be27845400 | 753 | |
AnnaBridge | 172:65be27845400 | 754 | |
AnnaBridge | 172:65be27845400 | 755 | #endif /* STM32H7xx_HAL_MMC_H */ |
AnnaBridge | 172:65be27845400 | 756 | |
AnnaBridge | 172:65be27845400 | 757 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |