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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_i2s.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 172:65be27845400 | 1 | /** |
| AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_i2s.h |
| AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
| AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of I2S HAL module. |
| AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 7 | * @attention |
| AnnaBridge | 172:65be27845400 | 8 | * |
| AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
| AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
| AnnaBridge | 172:65be27845400 | 11 | * |
| AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
| AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
| AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
| AnnaBridge | 172:65be27845400 | 16 | * |
| AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 18 | */ |
| AnnaBridge | 172:65be27845400 | 19 | |
| AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_I2S_H |
| AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_I2S_H |
| AnnaBridge | 172:65be27845400 | 23 | |
| AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
| AnnaBridge | 172:65be27845400 | 26 | #endif |
| AnnaBridge | 172:65be27845400 | 27 | |
| AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
| AnnaBridge | 172:65be27845400 | 30 | |
| AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
| AnnaBridge | 172:65be27845400 | 32 | * @{ |
| AnnaBridge | 172:65be27845400 | 33 | */ |
| AnnaBridge | 172:65be27845400 | 34 | |
| AnnaBridge | 172:65be27845400 | 35 | /** @addtogroup I2S |
| AnnaBridge | 172:65be27845400 | 36 | * @{ |
| AnnaBridge | 172:65be27845400 | 37 | */ |
| AnnaBridge | 172:65be27845400 | 38 | |
| AnnaBridge | 172:65be27845400 | 39 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 40 | /** @defgroup I2S_Exported_Types I2S Exported Types |
| AnnaBridge | 172:65be27845400 | 41 | * @{ |
| AnnaBridge | 172:65be27845400 | 42 | */ |
| AnnaBridge | 172:65be27845400 | 43 | |
| AnnaBridge | 172:65be27845400 | 44 | /** |
| AnnaBridge | 172:65be27845400 | 45 | * @brief I2S Init structure definition |
| AnnaBridge | 172:65be27845400 | 46 | */ |
| AnnaBridge | 172:65be27845400 | 47 | typedef struct |
| AnnaBridge | 172:65be27845400 | 48 | { |
| AnnaBridge | 172:65be27845400 | 49 | uint32_t Mode; /*!< Specifies the I2S operating mode. |
| AnnaBridge | 172:65be27845400 | 50 | This parameter can be a value of @ref I2S_Mode */ |
| AnnaBridge | 172:65be27845400 | 51 | |
| AnnaBridge | 172:65be27845400 | 52 | uint32_t Standard; /*!< Specifies the standard used for the I2S communication. |
| AnnaBridge | 172:65be27845400 | 53 | This parameter can be a value of @ref I2S_Standard */ |
| AnnaBridge | 172:65be27845400 | 54 | |
| AnnaBridge | 172:65be27845400 | 55 | uint32_t DataFormat; /*!< Specifies the data format for the I2S communication. |
| AnnaBridge | 172:65be27845400 | 56 | This parameter can be a value of @ref I2S_Data_Format */ |
| AnnaBridge | 172:65be27845400 | 57 | |
| AnnaBridge | 172:65be27845400 | 58 | uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not. |
| AnnaBridge | 172:65be27845400 | 59 | This parameter can be a value of @ref I2S_MCLK_Output */ |
| AnnaBridge | 172:65be27845400 | 60 | |
| AnnaBridge | 172:65be27845400 | 61 | uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication. |
| AnnaBridge | 172:65be27845400 | 62 | This parameter can be a value of @ref I2S_Audio_Frequency */ |
| AnnaBridge | 172:65be27845400 | 63 | |
| AnnaBridge | 172:65be27845400 | 64 | uint32_t CPOL; /*!< Specifies the idle state of the I2S clock. |
| AnnaBridge | 172:65be27845400 | 65 | This parameter can be a value of @ref I2S_Clock_Polarity */ |
| AnnaBridge | 172:65be27845400 | 66 | |
| AnnaBridge | 172:65be27845400 | 67 | uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit. |
| AnnaBridge | 172:65be27845400 | 68 | This parameter can be a value of @ref I2S_MSB_LSB_transmission */ |
| AnnaBridge | 172:65be27845400 | 69 | |
| AnnaBridge | 172:65be27845400 | 70 | uint32_t WSInversion; /*!< Control the Word Select Inversion. |
| AnnaBridge | 172:65be27845400 | 71 | This parameter can be a value of @ref I2S_WSInversion */ |
| AnnaBridge | 172:65be27845400 | 72 | |
| AnnaBridge | 172:65be27845400 | 73 | uint32_t IOSwap; /*!< Invert MISO/MOSI alternate functions |
| AnnaBridge | 172:65be27845400 | 74 | This parameter can be a value of @ref I2S_IO_Swap */ |
| AnnaBridge | 172:65be27845400 | 75 | |
| AnnaBridge | 172:65be27845400 | 76 | uint32_t Data24BitAlignment; /*!< Specifies the Data Padding for 24 bits data lenght |
| AnnaBridge | 172:65be27845400 | 77 | This parameter can be a value of @ref I2S_Data_24Bit_Alignment */ |
| AnnaBridge | 172:65be27845400 | 78 | |
| AnnaBridge | 172:65be27845400 | 79 | uint32_t FifoThreshold; /*!< Specifies the FIFO threshold level. |
| AnnaBridge | 172:65be27845400 | 80 | This parameter can be a value of @ref I2S_Fifo_Threshold */ |
| AnnaBridge | 172:65be27845400 | 81 | |
| AnnaBridge | 172:65be27845400 | 82 | uint32_t MasterKeepIOState; /*!< Control of Alternate function GPIOs state |
| AnnaBridge | 172:65be27845400 | 83 | This parameter can be a value of @ref I2S_Master_Keep_IO_State */ |
| AnnaBridge | 172:65be27845400 | 84 | |
| AnnaBridge | 172:65be27845400 | 85 | uint32_t SlaveExtendFREDetection; /*!< Control the channel length in SLAVE. |
| AnnaBridge | 172:65be27845400 | 86 | This parameter can be a value of @ref I2S_SlaveExtendFREDetection */ |
| AnnaBridge | 172:65be27845400 | 87 | |
| AnnaBridge | 172:65be27845400 | 88 | |
| AnnaBridge | 172:65be27845400 | 89 | } I2S_InitTypeDef; |
| AnnaBridge | 172:65be27845400 | 90 | |
| AnnaBridge | 172:65be27845400 | 91 | /** |
| AnnaBridge | 172:65be27845400 | 92 | * @brief HAL State structures definition |
| AnnaBridge | 172:65be27845400 | 93 | */ |
| AnnaBridge | 172:65be27845400 | 94 | typedef enum |
| AnnaBridge | 172:65be27845400 | 95 | { |
| AnnaBridge | 172:65be27845400 | 96 | HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */ |
| AnnaBridge | 172:65be27845400 | 97 | HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */ |
| AnnaBridge | 172:65be27845400 | 98 | HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 99 | HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 100 | HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 101 | HAL_I2S_STATE_BUSY_TX_RX = 0x05U, /*!< Data Transmission and Reception process is ongoing */ |
| AnnaBridge | 172:65be27845400 | 102 | HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */ |
| AnnaBridge | 172:65be27845400 | 103 | HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */ |
| AnnaBridge | 172:65be27845400 | 104 | } HAL_I2S_StateTypeDef; |
| AnnaBridge | 172:65be27845400 | 105 | |
| AnnaBridge | 172:65be27845400 | 106 | /** |
| AnnaBridge | 172:65be27845400 | 107 | * @brief I2S handle Structure definition |
| AnnaBridge | 172:65be27845400 | 108 | */ |
| AnnaBridge | 172:65be27845400 | 109 | typedef struct __I2S_HandleTypeDef |
| AnnaBridge | 172:65be27845400 | 110 | { |
| AnnaBridge | 172:65be27845400 | 111 | SPI_TypeDef *Instance; /*!< I2S registers base address */ |
| AnnaBridge | 172:65be27845400 | 112 | |
| AnnaBridge | 172:65be27845400 | 113 | I2S_InitTypeDef Init; /*!< I2S communication parameters */ |
| AnnaBridge | 172:65be27845400 | 114 | |
| AnnaBridge | 172:65be27845400 | 115 | uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */ |
| AnnaBridge | 172:65be27845400 | 116 | |
| AnnaBridge | 172:65be27845400 | 117 | __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */ |
| AnnaBridge | 172:65be27845400 | 118 | |
| AnnaBridge | 172:65be27845400 | 119 | __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */ |
| AnnaBridge | 172:65be27845400 | 120 | |
| AnnaBridge | 172:65be27845400 | 121 | uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */ |
| AnnaBridge | 172:65be27845400 | 122 | |
| AnnaBridge | 172:65be27845400 | 123 | __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */ |
| AnnaBridge | 172:65be27845400 | 124 | |
| AnnaBridge | 172:65be27845400 | 125 | __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter */ |
| AnnaBridge | 172:65be27845400 | 126 | |
| AnnaBridge | 172:65be27845400 | 127 | void (*RxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Rx ISR */ |
| AnnaBridge | 172:65be27845400 | 128 | |
| AnnaBridge | 172:65be27845400 | 129 | void (*TxISR)(struct __I2S_HandleTypeDef *hi2s); /*!< function pointer on Tx ISR */ |
| AnnaBridge | 172:65be27845400 | 130 | |
| AnnaBridge | 172:65be27845400 | 131 | DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */ |
| AnnaBridge | 172:65be27845400 | 132 | |
| AnnaBridge | 172:65be27845400 | 133 | DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */ |
| AnnaBridge | 172:65be27845400 | 134 | |
| AnnaBridge | 172:65be27845400 | 135 | __IO HAL_LockTypeDef Lock; /*!< I2S locking object */ |
| AnnaBridge | 172:65be27845400 | 136 | |
| AnnaBridge | 172:65be27845400 | 137 | __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */ |
| AnnaBridge | 172:65be27845400 | 138 | |
| AnnaBridge | 172:65be27845400 | 139 | __IO uint32_t ErrorCode; /*!< I2S Error code */ |
| AnnaBridge | 172:65be27845400 | 140 | |
| AnnaBridge | 172:65be27845400 | 141 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
| AnnaBridge | 172:65be27845400 | 142 | void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */ |
| AnnaBridge | 172:65be27845400 | 143 | void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */ |
| AnnaBridge | 172:65be27845400 | 144 | void (* TxRxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Completed callback */ |
| AnnaBridge | 172:65be27845400 | 145 | void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */ |
| AnnaBridge | 172:65be27845400 | 146 | void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */ |
| AnnaBridge | 172:65be27845400 | 147 | void (* TxRxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S TxRx Half Completed callback */ |
| AnnaBridge | 172:65be27845400 | 148 | void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */ |
| AnnaBridge | 172:65be27845400 | 149 | void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */ |
| AnnaBridge | 172:65be27845400 | 150 | void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */ |
| AnnaBridge | 172:65be27845400 | 151 | |
| AnnaBridge | 172:65be27845400 | 152 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 153 | } I2S_HandleTypeDef; |
| AnnaBridge | 172:65be27845400 | 154 | |
| AnnaBridge | 172:65be27845400 | 155 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
| AnnaBridge | 172:65be27845400 | 156 | /** |
| AnnaBridge | 172:65be27845400 | 157 | * @brief HAL I2S Callback ID enumeration definition |
| AnnaBridge | 172:65be27845400 | 158 | */ |
| AnnaBridge | 172:65be27845400 | 159 | typedef enum |
| AnnaBridge | 172:65be27845400 | 160 | { |
| AnnaBridge | 172:65be27845400 | 161 | HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 162 | HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 163 | HAL_I2S_TX_RX_COMPLETE_CB_ID = 0x02U, /*!< I2S TxRx Completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 164 | HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 165 | HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 166 | HAL_I2S_TX_RX_HALF_COMPLETE_CB_ID = 0x05U, /*!< I2S TxRx Half Completed callback ID */ |
| AnnaBridge | 172:65be27845400 | 167 | HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */ |
| AnnaBridge | 172:65be27845400 | 168 | HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */ |
| AnnaBridge | 172:65be27845400 | 169 | HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */ |
| AnnaBridge | 172:65be27845400 | 170 | |
| AnnaBridge | 172:65be27845400 | 171 | } HAL_I2S_CallbackIDTypeDef; |
| AnnaBridge | 172:65be27845400 | 172 | |
| AnnaBridge | 172:65be27845400 | 173 | /** |
| AnnaBridge | 172:65be27845400 | 174 | * @brief HAL I2S Callback pointer definition |
| AnnaBridge | 172:65be27845400 | 175 | */ |
| AnnaBridge | 172:65be27845400 | 176 | typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */ |
| AnnaBridge | 172:65be27845400 | 177 | |
| AnnaBridge | 172:65be27845400 | 178 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 179 | /** |
| AnnaBridge | 172:65be27845400 | 180 | * @} |
| AnnaBridge | 172:65be27845400 | 181 | */ |
| AnnaBridge | 172:65be27845400 | 182 | |
| AnnaBridge | 172:65be27845400 | 183 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 184 | /** @defgroup I2S_Exported_Constants I2S Exported Constants |
| AnnaBridge | 172:65be27845400 | 185 | * @{ |
| AnnaBridge | 172:65be27845400 | 186 | */ |
| AnnaBridge | 172:65be27845400 | 187 | |
| AnnaBridge | 172:65be27845400 | 188 | /** |
| AnnaBridge | 172:65be27845400 | 189 | * @defgroup I2S_Error_Defintion I2S Error Defintion |
| AnnaBridge | 172:65be27845400 | 190 | * @brief I2S Error Code |
| AnnaBridge | 172:65be27845400 | 191 | * @{ |
| AnnaBridge | 172:65be27845400 | 192 | */ |
| AnnaBridge | 172:65be27845400 | 193 | #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */ |
| AnnaBridge | 172:65be27845400 | 194 | #define HAL_I2S_ERROR_UDR (0x00000001U) /*!< I2S Underrun error */ |
| AnnaBridge | 172:65be27845400 | 195 | #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< I2S Overrun error */ |
| AnnaBridge | 172:65be27845400 | 196 | #define HAL_I2S_ERROR_FRE (0x00000004U) /*!< I2S Frame format error */ |
| AnnaBridge | 172:65be27845400 | 197 | #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */ |
| AnnaBridge | 172:65be27845400 | 198 | #define HAL_I2S_ERROR_TIMEOUT (0x00000010U) /*!< Timeout error */ |
| AnnaBridge | 172:65be27845400 | 199 | #define HAL_I2S_ERROR_PRESCALER (0x00000020U) /*!< Prescaler error */ |
| AnnaBridge | 172:65be27845400 | 200 | #define HAL_I2S_ERROR_NOT_SUPPORTED (0x00000040U) /*!< Requested operation not supported */ |
| AnnaBridge | 172:65be27845400 | 201 | #define HAL_I2S_ERROR_NO_TRANSFER (0x00000080U) /*!< No on going transfert */ |
| AnnaBridge | 172:65be27845400 | 202 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
| AnnaBridge | 172:65be27845400 | 203 | #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000100U) /*!< Invalid Callback error */ |
| AnnaBridge | 172:65be27845400 | 204 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 205 | /** |
| AnnaBridge | 172:65be27845400 | 206 | * @} |
| AnnaBridge | 172:65be27845400 | 207 | */ |
| AnnaBridge | 172:65be27845400 | 208 | |
| AnnaBridge | 172:65be27845400 | 209 | /** @defgroup I2S_Mode I2S Mode |
| AnnaBridge | 172:65be27845400 | 210 | * @{ |
| AnnaBridge | 172:65be27845400 | 211 | */ |
| AnnaBridge | 172:65be27845400 | 212 | #define I2S_MODE_SLAVE_TX (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 213 | #define I2S_MODE_SLAVE_RX (0x00000002U) |
| AnnaBridge | 172:65be27845400 | 214 | #define I2S_MODE_MASTER_TX (0x00000004U) |
| AnnaBridge | 172:65be27845400 | 215 | #define I2S_MODE_MASTER_RX (0x00000006U) |
| AnnaBridge | 172:65be27845400 | 216 | #define I2S_MODE_SLAVE_FD (0x00000008U) |
| AnnaBridge | 172:65be27845400 | 217 | #define I2S_MODE_MASTER_FD (0x0000000AU) |
| AnnaBridge | 172:65be27845400 | 218 | /** |
| AnnaBridge | 172:65be27845400 | 219 | * @} |
| AnnaBridge | 172:65be27845400 | 220 | */ |
| AnnaBridge | 172:65be27845400 | 221 | |
| AnnaBridge | 172:65be27845400 | 222 | /** @defgroup I2S_Standard I2S Standard |
| AnnaBridge | 172:65be27845400 | 223 | * @{ |
| AnnaBridge | 172:65be27845400 | 224 | */ |
| AnnaBridge | 172:65be27845400 | 225 | #define I2S_STANDARD_PHILIPS (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 226 | #define I2S_STANDARD_MSB (0x00000010U) |
| AnnaBridge | 172:65be27845400 | 227 | #define I2S_STANDARD_LSB (0x00000020U) |
| AnnaBridge | 172:65be27845400 | 228 | #define I2S_STANDARD_PCM_SHORT (0x00000030U) |
| AnnaBridge | 172:65be27845400 | 229 | #define I2S_STANDARD_PCM_LONG (0x000000B0U) |
| AnnaBridge | 172:65be27845400 | 230 | /** |
| AnnaBridge | 172:65be27845400 | 231 | * @} |
| AnnaBridge | 172:65be27845400 | 232 | */ |
| AnnaBridge | 172:65be27845400 | 233 | |
| AnnaBridge | 172:65be27845400 | 234 | /** @defgroup I2S_Data_Format I2S Data Format |
| AnnaBridge | 172:65be27845400 | 235 | * @{ |
| AnnaBridge | 172:65be27845400 | 236 | */ |
| AnnaBridge | 172:65be27845400 | 237 | #define I2S_DATAFORMAT_16B (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 238 | #define I2S_DATAFORMAT_16B_EXTENDED (0x00000400U) |
| AnnaBridge | 172:65be27845400 | 239 | #define I2S_DATAFORMAT_24B (0x00000500U) |
| AnnaBridge | 172:65be27845400 | 240 | #define I2S_DATAFORMAT_32B (0x00000600U) |
| AnnaBridge | 172:65be27845400 | 241 | /** |
| AnnaBridge | 172:65be27845400 | 242 | * @} |
| AnnaBridge | 172:65be27845400 | 243 | */ |
| AnnaBridge | 172:65be27845400 | 244 | |
| AnnaBridge | 172:65be27845400 | 245 | /** @defgroup I2S_MCLK_Output I2S MCLK Output |
| AnnaBridge | 172:65be27845400 | 246 | * @{ |
| AnnaBridge | 172:65be27845400 | 247 | */ |
| AnnaBridge | 172:65be27845400 | 248 | #define I2S_MCLKOUTPUT_ENABLE SPI_I2SCFGR_MCKOE |
| AnnaBridge | 172:65be27845400 | 249 | #define I2S_MCLKOUTPUT_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 250 | /** |
| AnnaBridge | 172:65be27845400 | 251 | * @} |
| AnnaBridge | 172:65be27845400 | 252 | */ |
| AnnaBridge | 172:65be27845400 | 253 | |
| AnnaBridge | 172:65be27845400 | 254 | /** @defgroup I2S_Audio_Frequency I2S Audio Frequency |
| AnnaBridge | 172:65be27845400 | 255 | * @{ |
| AnnaBridge | 172:65be27845400 | 256 | */ |
| AnnaBridge | 172:65be27845400 | 257 | #define I2S_AUDIOFREQ_192K (192000U) |
| AnnaBridge | 172:65be27845400 | 258 | #define I2S_AUDIOFREQ_96K (96000U) |
| AnnaBridge | 172:65be27845400 | 259 | #define I2S_AUDIOFREQ_48K (48000U) |
| AnnaBridge | 172:65be27845400 | 260 | #define I2S_AUDIOFREQ_44K (44100U) |
| AnnaBridge | 172:65be27845400 | 261 | #define I2S_AUDIOFREQ_32K (32000U) |
| AnnaBridge | 172:65be27845400 | 262 | #define I2S_AUDIOFREQ_22K (22050U) |
| AnnaBridge | 172:65be27845400 | 263 | #define I2S_AUDIOFREQ_16K (16000U) |
| AnnaBridge | 172:65be27845400 | 264 | #define I2S_AUDIOFREQ_11K (11025U) |
| AnnaBridge | 172:65be27845400 | 265 | #define I2S_AUDIOFREQ_8K (8000U) |
| AnnaBridge | 172:65be27845400 | 266 | #define I2S_AUDIOFREQ_DEFAULT (2U) |
| AnnaBridge | 172:65be27845400 | 267 | /** |
| AnnaBridge | 172:65be27845400 | 268 | * @} |
| AnnaBridge | 172:65be27845400 | 269 | */ |
| AnnaBridge | 172:65be27845400 | 270 | |
| AnnaBridge | 172:65be27845400 | 271 | /** @defgroup I2S_Clock_Polarity I2S Clock Polarity |
| AnnaBridge | 172:65be27845400 | 272 | * @{ |
| AnnaBridge | 172:65be27845400 | 273 | */ |
| AnnaBridge | 172:65be27845400 | 274 | #define I2S_CPOL_LOW (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 275 | #define I2S_CPOL_HIGH SPI_I2SCFGR_CKPOL |
| AnnaBridge | 172:65be27845400 | 276 | /** |
| AnnaBridge | 172:65be27845400 | 277 | * @} |
| AnnaBridge | 172:65be27845400 | 278 | */ |
| AnnaBridge | 172:65be27845400 | 279 | |
| AnnaBridge | 172:65be27845400 | 280 | /** @defgroup I2S_MSB_LSB_transmission I2S MSB LSB Transmission |
| AnnaBridge | 172:65be27845400 | 281 | * @{ |
| AnnaBridge | 172:65be27845400 | 282 | */ |
| AnnaBridge | 172:65be27845400 | 283 | #define I2S_FIRSTBIT_MSB (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 284 | #define I2S_FIRSTBIT_LSB SPI_CFG2_LSBFRST |
| AnnaBridge | 172:65be27845400 | 285 | /** |
| AnnaBridge | 172:65be27845400 | 286 | * @} |
| AnnaBridge | 172:65be27845400 | 287 | */ |
| AnnaBridge | 172:65be27845400 | 288 | |
| AnnaBridge | 172:65be27845400 | 289 | /** @defgroup I2S_WSInversion I2S Word Select Inversion |
| AnnaBridge | 172:65be27845400 | 290 | * @{ |
| AnnaBridge | 172:65be27845400 | 291 | */ |
| AnnaBridge | 172:65be27845400 | 292 | #define I2S_WS_INVERSION_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 293 | #define I2S_WS_INVERSION_ENABLE SPI_I2SCFGR_WSINV |
| AnnaBridge | 172:65be27845400 | 294 | /** |
| AnnaBridge | 172:65be27845400 | 295 | * @} |
| AnnaBridge | 172:65be27845400 | 296 | */ |
| AnnaBridge | 172:65be27845400 | 297 | |
| AnnaBridge | 172:65be27845400 | 298 | /** @defgroup I2S_IO_Swap Control I2S IO Swap |
| AnnaBridge | 172:65be27845400 | 299 | * @{ |
| AnnaBridge | 172:65be27845400 | 300 | */ |
| AnnaBridge | 172:65be27845400 | 301 | #define I2S_IO_SWAP_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 302 | #define I2S_IO_SWAP_ENABLE SPI_CFG2_IOSWP |
| AnnaBridge | 172:65be27845400 | 303 | /** |
| AnnaBridge | 172:65be27845400 | 304 | * @} |
| AnnaBridge | 172:65be27845400 | 305 | */ |
| AnnaBridge | 172:65be27845400 | 306 | |
| AnnaBridge | 172:65be27845400 | 307 | /** @defgroup I2S_Data_24Bit_Alignment Data Padding 24Bit |
| AnnaBridge | 172:65be27845400 | 308 | * @{ |
| AnnaBridge | 172:65be27845400 | 309 | */ |
| AnnaBridge | 172:65be27845400 | 310 | #define I2S_DATA_24BIT_ALIGNMENT_RIGHT (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 311 | #define I2S_DATA_24BIT_ALIGNMENT_LEFT SPI_I2SCFGR_DATFMT |
| AnnaBridge | 172:65be27845400 | 312 | /** |
| AnnaBridge | 172:65be27845400 | 313 | * @} |
| AnnaBridge | 172:65be27845400 | 314 | */ |
| AnnaBridge | 172:65be27845400 | 315 | |
| AnnaBridge | 172:65be27845400 | 316 | /** @defgroup I2S_Fifo_Threshold I2S Fifo Threshold |
| AnnaBridge | 172:65be27845400 | 317 | * @{ |
| AnnaBridge | 172:65be27845400 | 318 | */ |
| AnnaBridge | 172:65be27845400 | 319 | #define I2S_FIFO_THRESHOLD_01DATA (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 320 | #define I2S_FIFO_THRESHOLD_02DATA (0x00000020U) |
| AnnaBridge | 172:65be27845400 | 321 | #define I2S_FIFO_THRESHOLD_03DATA (0x00000040U) |
| AnnaBridge | 172:65be27845400 | 322 | #define I2S_FIFO_THRESHOLD_04DATA (0x00000060U) |
| AnnaBridge | 172:65be27845400 | 323 | #define I2S_FIFO_THRESHOLD_05DATA (0x00000080U) |
| AnnaBridge | 172:65be27845400 | 324 | #define I2S_FIFO_THRESHOLD_06DATA (0x000000A0U) |
| AnnaBridge | 172:65be27845400 | 325 | #define I2S_FIFO_THRESHOLD_07DATA (0x000000C0U) |
| AnnaBridge | 172:65be27845400 | 326 | #define I2S_FIFO_THRESHOLD_08DATA (0x000000E0U) |
| AnnaBridge | 172:65be27845400 | 327 | #define I2S_FIFO_THRESHOLD_09DATA (0x00000100U) |
| AnnaBridge | 172:65be27845400 | 328 | #define I2S_FIFO_THRESHOLD_10DATA (0x00000120U) |
| AnnaBridge | 172:65be27845400 | 329 | #define I2S_FIFO_THRESHOLD_11DATA (0x00000140U) |
| AnnaBridge | 172:65be27845400 | 330 | #define I2S_FIFO_THRESHOLD_12DATA (0x00000160U) |
| AnnaBridge | 172:65be27845400 | 331 | #define I2S_FIFO_THRESHOLD_13DATA (0x00000180U) |
| AnnaBridge | 172:65be27845400 | 332 | #define I2S_FIFO_THRESHOLD_14DATA (0x000001A0U) |
| AnnaBridge | 172:65be27845400 | 333 | #define I2S_FIFO_THRESHOLD_15DATA (0x000001C0U) |
| AnnaBridge | 172:65be27845400 | 334 | #define I2S_FIFO_THRESHOLD_16DATA (0x000001E0U) |
| AnnaBridge | 172:65be27845400 | 335 | /** |
| AnnaBridge | 172:65be27845400 | 336 | * @} |
| AnnaBridge | 172:65be27845400 | 337 | */ |
| AnnaBridge | 172:65be27845400 | 338 | |
| AnnaBridge | 172:65be27845400 | 339 | /** @defgroup I2S_Master_Keep_IO_State Keep IO State |
| AnnaBridge | 172:65be27845400 | 340 | * @{ |
| AnnaBridge | 172:65be27845400 | 341 | */ |
| AnnaBridge | 172:65be27845400 | 342 | #define I2S_MASTER_KEEP_IO_STATE_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 343 | #define I2S_MASTER_KEEP_IO_STATE_ENABLE SPI_CFG2_AFCNTR |
| AnnaBridge | 172:65be27845400 | 344 | /** |
| AnnaBridge | 172:65be27845400 | 345 | * @} |
| AnnaBridge | 172:65be27845400 | 346 | */ |
| AnnaBridge | 172:65be27845400 | 347 | |
| AnnaBridge | 172:65be27845400 | 348 | /** @defgroup I2S_SlaveExtendFREDetection Slave Extend FRE Detection |
| AnnaBridge | 172:65be27845400 | 349 | * @{ |
| AnnaBridge | 172:65be27845400 | 350 | */ |
| AnnaBridge | 172:65be27845400 | 351 | #define I2S_SLAVE_EXTEND_FRE_DETECTION_DISABLE (0x00000000U) |
| AnnaBridge | 172:65be27845400 | 352 | #define I2S_SLAVE_EXTEND_FRE_DETECTION_ENABLE SPI_I2SCFGR_FIXCH |
| AnnaBridge | 172:65be27845400 | 353 | /** |
| AnnaBridge | 172:65be27845400 | 354 | * @} |
| AnnaBridge | 172:65be27845400 | 355 | */ |
| AnnaBridge | 172:65be27845400 | 356 | |
| AnnaBridge | 172:65be27845400 | 357 | /** @defgroup I2S_Interrupt_definition I2S Interrupt definition |
| AnnaBridge | 172:65be27845400 | 358 | * @{ |
| AnnaBridge | 172:65be27845400 | 359 | */ |
| AnnaBridge | 172:65be27845400 | 360 | #define I2S_IT_TXP SPI_IER_TXPIE |
| AnnaBridge | 172:65be27845400 | 361 | #define I2S_IT_RXP SPI_IER_RXPIE |
| AnnaBridge | 172:65be27845400 | 362 | #define I2S_IT_OVR SPI_IER_OVRIE |
| AnnaBridge | 172:65be27845400 | 363 | #define I2S_IT_UDR SPI_IER_UDRIE |
| AnnaBridge | 172:65be27845400 | 364 | #define I2S_IT_TIFRE SPI_IER_TIFREIE |
| AnnaBridge | 172:65be27845400 | 365 | #define I2S_IT_ERR (SPI_IER_OVRIE | SPI_IER_UDRIE | SPI_IER_TIFREIE) |
| AnnaBridge | 172:65be27845400 | 366 | |
| AnnaBridge | 172:65be27845400 | 367 | /** |
| AnnaBridge | 172:65be27845400 | 368 | * @} |
| AnnaBridge | 172:65be27845400 | 369 | */ |
| AnnaBridge | 172:65be27845400 | 370 | |
| AnnaBridge | 172:65be27845400 | 371 | /** @defgroup I2S_Flag_definition I2S Flag definition |
| AnnaBridge | 172:65be27845400 | 372 | * @{ |
| AnnaBridge | 172:65be27845400 | 373 | */ |
| AnnaBridge | 172:65be27845400 | 374 | #define I2S_FLAG_TXP SPI_SR_TXP /* I2S status flag: Tx-Packet space available */ |
| AnnaBridge | 172:65be27845400 | 375 | #define I2S_FLAG_RXP SPI_SR_RXP /* I2S status flag: Rx-Packet available */ |
| AnnaBridge | 172:65be27845400 | 376 | #define I2S_FLAG_UDR SPI_SR_UDR /* I2S Error flag: Underrun flag */ |
| AnnaBridge | 172:65be27845400 | 377 | #define I2S_FLAG_RXWNE SPI_SR_RXWNE /* I2S RxFIFO Word Not Empty */ |
| AnnaBridge | 172:65be27845400 | 378 | #define I2S_FLAG_OVR SPI_SR_OVR /* I2S Error flag: Overrun flag */ |
| AnnaBridge | 172:65be27845400 | 379 | #define I2S_FLAG_TIFRE SPI_SR_TIFRE /* I2S Error flag: TI mode frame format error flag */ |
| AnnaBridge | 172:65be27845400 | 380 | /** |
| AnnaBridge | 172:65be27845400 | 381 | * @} |
| AnnaBridge | 172:65be27845400 | 382 | */ |
| AnnaBridge | 172:65be27845400 | 383 | |
| AnnaBridge | 172:65be27845400 | 384 | /** |
| AnnaBridge | 172:65be27845400 | 385 | * @} |
| AnnaBridge | 172:65be27845400 | 386 | */ |
| AnnaBridge | 172:65be27845400 | 387 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 388 | /** @defgroup I2S_Exported_Macros I2S Exported Macros |
| AnnaBridge | 172:65be27845400 | 389 | * @{ |
| AnnaBridge | 172:65be27845400 | 390 | */ |
| AnnaBridge | 172:65be27845400 | 391 | |
| AnnaBridge | 172:65be27845400 | 392 | /** @brief Reset I2S handle state |
| AnnaBridge | 172:65be27845400 | 393 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 394 | * @retval None |
| AnnaBridge | 172:65be27845400 | 395 | */ |
| AnnaBridge | 172:65be27845400 | 396 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
| AnnaBridge | 172:65be27845400 | 397 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 172:65be27845400 | 398 | (__HANDLE__)->State = HAL_I2S_STATE_RESET; \ |
| AnnaBridge | 172:65be27845400 | 399 | (__HANDLE__)->MspInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 400 | (__HANDLE__)->MspDeInitCallback = NULL; \ |
| AnnaBridge | 172:65be27845400 | 401 | } while(0) |
| AnnaBridge | 172:65be27845400 | 402 | #else |
| AnnaBridge | 172:65be27845400 | 403 | #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET) |
| AnnaBridge | 172:65be27845400 | 404 | #endif |
| AnnaBridge | 172:65be27845400 | 405 | |
| AnnaBridge | 172:65be27845400 | 406 | /** @brief Enable the specified SPI peripheral (in I2S mode). |
| AnnaBridge | 172:65be27845400 | 407 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 408 | * @retval None |
| AnnaBridge | 172:65be27845400 | 409 | */ |
| AnnaBridge | 172:65be27845400 | 410 | #define __HAL_I2S_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
| AnnaBridge | 172:65be27845400 | 411 | |
| AnnaBridge | 172:65be27845400 | 412 | /** @brief Disable the specified SPI peripheral (in I2S mode). |
| AnnaBridge | 172:65be27845400 | 413 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 414 | * @retval None |
| AnnaBridge | 172:65be27845400 | 415 | */ |
| AnnaBridge | 172:65be27845400 | 416 | #define __HAL_I2S_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE) |
| AnnaBridge | 172:65be27845400 | 417 | |
| AnnaBridge | 172:65be27845400 | 418 | /** @brief Enable the specified I2S interrupts. |
| AnnaBridge | 172:65be27845400 | 419 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 420 | * @param __INTERRUPT__: specifies the interrupt source to enable. |
| AnnaBridge | 172:65be27845400 | 421 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 422 | * @arg I2S_IT_TXP : Tx-Packet space available interrupt |
| AnnaBridge | 172:65be27845400 | 423 | * @arg I2S_IT_RXP : Rx-Packet available interrupt |
| AnnaBridge | 172:65be27845400 | 424 | * @arg I2S_IT_OVR : Overrun interrupt |
| AnnaBridge | 172:65be27845400 | 425 | * @arg I2S_IT_UDR : Underrun interrupt |
| AnnaBridge | 172:65be27845400 | 426 | * @arg I2S_IT_TIFRE: TI mode frame format error interrupt |
| AnnaBridge | 172:65be27845400 | 427 | * @arg I2S_IT_ERR: Error interrupt |
| AnnaBridge | 172:65be27845400 | 428 | * @retval None |
| AnnaBridge | 172:65be27845400 | 429 | */ |
| AnnaBridge | 172:65be27845400 | 430 | #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->IER,(__INTERRUPT__))) |
| AnnaBridge | 172:65be27845400 | 431 | |
| AnnaBridge | 172:65be27845400 | 432 | /** @brief Disable the specified I2S interrupts. |
| AnnaBridge | 172:65be27845400 | 433 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 434 | * @param __INTERRUPT__: specifies the interrupt source to disable. |
| AnnaBridge | 172:65be27845400 | 435 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 436 | * @arg I2S_IT_TXP : Tx-Packet space available interrupt |
| AnnaBridge | 172:65be27845400 | 437 | * @arg I2S_IT_RXP : Rx-Packet available interrupt |
| AnnaBridge | 172:65be27845400 | 438 | * @arg I2S_IT_OVR : Overrun interrupt |
| AnnaBridge | 172:65be27845400 | 439 | * @arg I2S_IT_UDR : Underrun interrupt |
| AnnaBridge | 172:65be27845400 | 440 | * @arg I2S_IT_TIFRE: TI mode frame format error interrupt |
| AnnaBridge | 172:65be27845400 | 441 | * @arg I2S_IT_ERR : Error interrupt |
| AnnaBridge | 172:65be27845400 | 442 | * @retval None |
| AnnaBridge | 172:65be27845400 | 443 | */ |
| AnnaBridge | 172:65be27845400 | 444 | #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->IER,(__INTERRUPT__))) |
| AnnaBridge | 172:65be27845400 | 445 | |
| AnnaBridge | 172:65be27845400 | 446 | /** @brief Checks if the specified I2S interrupt source is enabled or disabled. |
| AnnaBridge | 172:65be27845400 | 447 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 448 | * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral. |
| AnnaBridge | 172:65be27845400 | 449 | * @param __INTERRUPT__: specifies the I2S interrupt source to check. |
| AnnaBridge | 172:65be27845400 | 450 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 451 | * @arg I2S_IT_TXP : Tx-Packet space available interrupt |
| AnnaBridge | 172:65be27845400 | 452 | * @arg I2S_IT_RXP : Rx-Packet available interrupt |
| AnnaBridge | 172:65be27845400 | 453 | * @arg I2S_IT_OVR : Overrun interrupt |
| AnnaBridge | 172:65be27845400 | 454 | * @arg I2S_IT_UDR : Underrun interrupt |
| AnnaBridge | 172:65be27845400 | 455 | * @arg I2S_IT_TIFRE: TI mode frame format error interrupt |
| AnnaBridge | 172:65be27845400 | 456 | * @arg I2S_IT_ERR : Error interrupt |
| AnnaBridge | 172:65be27845400 | 457 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 172:65be27845400 | 458 | */ |
| AnnaBridge | 172:65be27845400 | 459 | #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 172:65be27845400 | 460 | |
| AnnaBridge | 172:65be27845400 | 461 | /** @brief Checks whether the specified I2S flag is set or not. |
| AnnaBridge | 172:65be27845400 | 462 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 463 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 172:65be27845400 | 464 | * This parameter can be one of the following values: |
| AnnaBridge | 172:65be27845400 | 465 | * @arg I2S_FLAG_TXP : Tx-Packet space available flag |
| AnnaBridge | 172:65be27845400 | 466 | * @arg I2S_FLAG_RXP : Rx-Packet available flag |
| AnnaBridge | 172:65be27845400 | 467 | * @arg I2S_FLAG_UDR : Underrun flag |
| AnnaBridge | 172:65be27845400 | 468 | * @arg I2S_FLAG_RXWNE: RxFIFO Word Not Empty flag |
| AnnaBridge | 172:65be27845400 | 469 | * @arg I2S_FLAG_OVR : Overrun flag |
| AnnaBridge | 172:65be27845400 | 470 | * @arg I2S_FLAG_TIFRE: TI mode frame format error flag |
| AnnaBridge | 172:65be27845400 | 471 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 172:65be27845400 | 472 | */ |
| AnnaBridge | 172:65be27845400 | 473 | #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 474 | |
| AnnaBridge | 172:65be27845400 | 475 | /** @brief Clears the I2S UDR pending flag. |
| AnnaBridge | 172:65be27845400 | 476 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 477 | * @retval None |
| AnnaBridge | 172:65be27845400 | 478 | */ |
| AnnaBridge | 172:65be27845400 | 479 | #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_UDRC) |
| AnnaBridge | 172:65be27845400 | 480 | |
| AnnaBridge | 172:65be27845400 | 481 | /** @brief Clears the I2S OVR pending flag. |
| AnnaBridge | 172:65be27845400 | 482 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 483 | * @retval None |
| AnnaBridge | 172:65be27845400 | 484 | */ |
| AnnaBridge | 172:65be27845400 | 485 | #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_OVRC) |
| AnnaBridge | 172:65be27845400 | 486 | |
| AnnaBridge | 172:65be27845400 | 487 | /** @brief Clear the I2S TIFRE pending flag. |
| AnnaBridge | 172:65be27845400 | 488 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 489 | * @retval None |
| AnnaBridge | 172:65be27845400 | 490 | */ |
| AnnaBridge | 172:65be27845400 | 491 | #define __HAL_I2S_CLEAR_TIFREFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_TIFREC) |
| AnnaBridge | 172:65be27845400 | 492 | |
| AnnaBridge | 172:65be27845400 | 493 | /** @brief Clear the I2S SUSP pending flag. |
| AnnaBridge | 172:65be27845400 | 494 | * @param __HANDLE__: specifies the I2S Handle. |
| AnnaBridge | 172:65be27845400 | 495 | * @retval None |
| AnnaBridge | 172:65be27845400 | 496 | */ |
| AnnaBridge | 172:65be27845400 | 497 | #define __HAL_I2S_CLEAR_SUSPFLAG(__HANDLE__) SET_BIT((__HANDLE__)->Instance->IFCR , SPI_IFCR_SUSPC) |
| AnnaBridge | 172:65be27845400 | 498 | |
| AnnaBridge | 172:65be27845400 | 499 | /* Include I2S HAL Extended module */ |
| AnnaBridge | 172:65be27845400 | 500 | #include "stm32h7xx_hal_i2s_ex.h" |
| AnnaBridge | 172:65be27845400 | 501 | |
| AnnaBridge | 172:65be27845400 | 502 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 503 | /** @defgroup I2S_Exported_Functions I2S Exported Functions |
| AnnaBridge | 172:65be27845400 | 504 | * @{ |
| AnnaBridge | 172:65be27845400 | 505 | */ |
| AnnaBridge | 172:65be27845400 | 506 | |
| AnnaBridge | 172:65be27845400 | 507 | /** @defgroup I2S_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 172:65be27845400 | 508 | * @{ |
| AnnaBridge | 172:65be27845400 | 509 | */ |
| AnnaBridge | 172:65be27845400 | 510 | /* Initialization/de-initialization functions ********************************/ |
| AnnaBridge | 172:65be27845400 | 511 | HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 512 | HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 513 | void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 514 | void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 515 | |
| AnnaBridge | 172:65be27845400 | 516 | /* Callbacks Register/UnRegister functions ***********************************/ |
| AnnaBridge | 172:65be27845400 | 517 | #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U) |
| AnnaBridge | 172:65be27845400 | 518 | HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hspi, HAL_I2S_CallbackIDTypeDef CallbackID, pI2S_CallbackTypeDef pCallback); |
| AnnaBridge | 172:65be27845400 | 519 | HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hspi, HAL_I2S_CallbackIDTypeDef CallbackID); |
| AnnaBridge | 172:65be27845400 | 520 | #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */ |
| AnnaBridge | 172:65be27845400 | 521 | /** |
| AnnaBridge | 172:65be27845400 | 522 | * @} |
| AnnaBridge | 172:65be27845400 | 523 | */ |
| AnnaBridge | 172:65be27845400 | 524 | |
| AnnaBridge | 172:65be27845400 | 525 | /** @defgroup I2S_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 172:65be27845400 | 526 | * @{ |
| AnnaBridge | 172:65be27845400 | 527 | */ |
| AnnaBridge | 172:65be27845400 | 528 | /* I/O operation functions ***************************************************/ |
| AnnaBridge | 172:65be27845400 | 529 | /* Blocking mode: Polling */ |
| AnnaBridge | 172:65be27845400 | 530 | HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 172:65be27845400 | 531 | HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 172:65be27845400 | 532 | |
| AnnaBridge | 172:65be27845400 | 533 | /* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 172:65be27845400 | 534 | HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 172:65be27845400 | 535 | HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 172:65be27845400 | 536 | |
| AnnaBridge | 172:65be27845400 | 537 | void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 538 | |
| AnnaBridge | 172:65be27845400 | 539 | /* Non-Blocking mode: DMA */ |
| AnnaBridge | 172:65be27845400 | 540 | HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 172:65be27845400 | 541 | HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size); |
| AnnaBridge | 172:65be27845400 | 542 | |
| AnnaBridge | 172:65be27845400 | 543 | HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 544 | HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 545 | HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 546 | |
| AnnaBridge | 172:65be27845400 | 547 | /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/ |
| AnnaBridge | 172:65be27845400 | 548 | void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 549 | void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 550 | void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 551 | void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 552 | void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 553 | /** |
| AnnaBridge | 172:65be27845400 | 554 | * @} |
| AnnaBridge | 172:65be27845400 | 555 | */ |
| AnnaBridge | 172:65be27845400 | 556 | |
| AnnaBridge | 172:65be27845400 | 557 | /** @addtogroup I2S_Exported_Functions_Group3 Peripheral State and Errors functions |
| AnnaBridge | 172:65be27845400 | 558 | * @{ |
| AnnaBridge | 172:65be27845400 | 559 | */ |
| AnnaBridge | 172:65be27845400 | 560 | /* Peripheral Control and State functions ************************************/ |
| AnnaBridge | 172:65be27845400 | 561 | HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 562 | uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s); |
| AnnaBridge | 172:65be27845400 | 563 | /** |
| AnnaBridge | 172:65be27845400 | 564 | * @} |
| AnnaBridge | 172:65be27845400 | 565 | */ |
| AnnaBridge | 172:65be27845400 | 566 | |
| AnnaBridge | 172:65be27845400 | 567 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 568 | /** @defgroup I2S_Private I2S Private |
| AnnaBridge | 172:65be27845400 | 569 | * @{ |
| AnnaBridge | 172:65be27845400 | 570 | */ |
| AnnaBridge | 172:65be27845400 | 571 | #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
| AnnaBridge | 172:65be27845400 | 572 | ((MODE) == I2S_MODE_SLAVE_RX) || \ |
| AnnaBridge | 172:65be27845400 | 573 | ((MODE) == I2S_MODE_MASTER_TX) || \ |
| AnnaBridge | 172:65be27845400 | 574 | ((MODE) == I2S_MODE_MASTER_RX) || \ |
| AnnaBridge | 172:65be27845400 | 575 | ((MODE) == I2S_MODE_SLAVE_FD) || \ |
| AnnaBridge | 172:65be27845400 | 576 | ((MODE) == I2S_MODE_MASTER_FD)) |
| AnnaBridge | 172:65be27845400 | 577 | |
| AnnaBridge | 172:65be27845400 | 578 | #define IS_I2S_FD_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_FD) || \ |
| AnnaBridge | 172:65be27845400 | 579 | ((MODE) == I2S_MODE_MASTER_FD)) |
| AnnaBridge | 172:65be27845400 | 580 | |
| AnnaBridge | 172:65be27845400 | 581 | #define IS_I2S_MASTER(MODE) (((MODE) == I2S_MODE_MASTER_TX) || \ |
| AnnaBridge | 172:65be27845400 | 582 | ((MODE) == I2S_MODE_MASTER_RX) || \ |
| AnnaBridge | 172:65be27845400 | 583 | ((MODE) == I2S_MODE_MASTER_FD)) |
| AnnaBridge | 172:65be27845400 | 584 | |
| AnnaBridge | 172:65be27845400 | 585 | #define IS_I2S_TX_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \ |
| AnnaBridge | 172:65be27845400 | 586 | ((MODE) == I2S_MODE_MASTER_TX) || \ |
| AnnaBridge | 172:65be27845400 | 587 | ((MODE) == I2S_MODE_SLAVE_FD) || \ |
| AnnaBridge | 172:65be27845400 | 588 | ((MODE) == I2S_MODE_MASTER_FD)) |
| AnnaBridge | 172:65be27845400 | 589 | |
| AnnaBridge | 172:65be27845400 | 590 | #define IS_I2S_RX_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_RX) || \ |
| AnnaBridge | 172:65be27845400 | 591 | ((MODE) == I2S_MODE_MASTER_RX) || \ |
| AnnaBridge | 172:65be27845400 | 592 | ((MODE) == I2S_MODE_SLAVE_FD) || \ |
| AnnaBridge | 172:65be27845400 | 593 | ((MODE) == I2S_MODE_MASTER_FD)) |
| AnnaBridge | 172:65be27845400 | 594 | |
| AnnaBridge | 172:65be27845400 | 595 | #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILIPS) || \ |
| AnnaBridge | 172:65be27845400 | 596 | ((STANDARD) == I2S_STANDARD_MSB) || \ |
| AnnaBridge | 172:65be27845400 | 597 | ((STANDARD) == I2S_STANDARD_LSB) || \ |
| AnnaBridge | 172:65be27845400 | 598 | ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \ |
| AnnaBridge | 172:65be27845400 | 599 | ((STANDARD) == I2S_STANDARD_PCM_LONG)) |
| AnnaBridge | 172:65be27845400 | 600 | |
| AnnaBridge | 172:65be27845400 | 601 | #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \ |
| AnnaBridge | 172:65be27845400 | 602 | ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \ |
| AnnaBridge | 172:65be27845400 | 603 | ((FORMAT) == I2S_DATAFORMAT_24B) || \ |
| AnnaBridge | 172:65be27845400 | 604 | ((FORMAT) == I2S_DATAFORMAT_32B)) |
| AnnaBridge | 172:65be27845400 | 605 | |
| AnnaBridge | 172:65be27845400 | 606 | #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \ |
| AnnaBridge | 172:65be27845400 | 607 | ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE)) |
| AnnaBridge | 172:65be27845400 | 608 | |
| AnnaBridge | 172:65be27845400 | 609 | #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \ |
| AnnaBridge | 172:65be27845400 | 610 | ((FREQ) <= I2S_AUDIOFREQ_192K)) || \ |
| AnnaBridge | 172:65be27845400 | 611 | ((FREQ) == I2S_AUDIOFREQ_DEFAULT)) |
| AnnaBridge | 172:65be27845400 | 612 | |
| AnnaBridge | 172:65be27845400 | 613 | #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \ |
| AnnaBridge | 172:65be27845400 | 614 | ((CPOL) == I2S_CPOL_HIGH)) |
| AnnaBridge | 172:65be27845400 | 615 | |
| AnnaBridge | 172:65be27845400 | 616 | #define IS_I2S_FIRST_BIT(FIRSTBIT) (((FIRSTBIT) == I2S_FIRSTBIT_MSB) || \ |
| AnnaBridge | 172:65be27845400 | 617 | ((FIRSTBIT) == I2S_FIRSTBIT_LSB)) |
| AnnaBridge | 172:65be27845400 | 618 | |
| AnnaBridge | 172:65be27845400 | 619 | #define IS_I2S_WS_INVERSION(WSINV) (((WSINV) == I2S_WS_INVERSION_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 620 | ((WSINV) == I2S_WS_INVERSION_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 621 | |
| AnnaBridge | 172:65be27845400 | 622 | #define IS_I2S_IO_SWAP(IOSWAP) (((IOSWAP) == I2S_IO_SWAP_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 623 | ((IOSWAP) == I2S_IO_SWAP_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 624 | |
| AnnaBridge | 172:65be27845400 | 625 | #define IS_I2S_DATA_24BIT_ALIGNMENT(ALIGNMENT) (((ALIGNMENT) == I2S_DATA_24BIT_ALIGNMENT_RIGHT) || \ |
| AnnaBridge | 172:65be27845400 | 626 | ((ALIGNMENT) == I2S_DATA_24BIT_ALIGNMENT_LEFT)) |
| AnnaBridge | 172:65be27845400 | 627 | |
| AnnaBridge | 172:65be27845400 | 628 | #define IS_I2S_FIFO_THRESHOLD(FTHLV) (((FTHLV) == I2S_FIFO_THRESHOLD_01DATA) || \ |
| AnnaBridge | 172:65be27845400 | 629 | ((FTHLV) == I2S_FIFO_THRESHOLD_02DATA) || \ |
| AnnaBridge | 172:65be27845400 | 630 | ((FTHLV) == I2S_FIFO_THRESHOLD_03DATA) || \ |
| AnnaBridge | 172:65be27845400 | 631 | ((FTHLV) == I2S_FIFO_THRESHOLD_04DATA) || \ |
| AnnaBridge | 172:65be27845400 | 632 | ((FTHLV) == I2S_FIFO_THRESHOLD_05DATA) || \ |
| AnnaBridge | 172:65be27845400 | 633 | ((FTHLV) == I2S_FIFO_THRESHOLD_06DATA) || \ |
| AnnaBridge | 172:65be27845400 | 634 | ((FTHLV) == I2S_FIFO_THRESHOLD_07DATA) || \ |
| AnnaBridge | 172:65be27845400 | 635 | ((FTHLV) == I2S_FIFO_THRESHOLD_08DATA)) |
| AnnaBridge | 172:65be27845400 | 636 | |
| AnnaBridge | 172:65be27845400 | 637 | #define IS_I2S_MASTER_KEEP_IO_STATE(AFCNTR) (((AFCNTR) == I2S_MASTER_KEEP_IO_STATE_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 638 | ((AFCNTR) == I2S_MASTER_KEEP_IO_STATE_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 639 | |
| AnnaBridge | 172:65be27845400 | 640 | #define IS_I2S_SLAVE_EXTEND_FRE_DETECTION(FIXCH) (((FIXCH) == I2S_SLAVE_EXTEND_FRE_DETECTION_DISABLE) || \ |
| AnnaBridge | 172:65be27845400 | 641 | ((FIXCH) == I2S_SLAVE_EXTEND_FRE_DETECTION_ENABLE)) |
| AnnaBridge | 172:65be27845400 | 642 | |
| AnnaBridge | 172:65be27845400 | 643 | /** |
| AnnaBridge | 172:65be27845400 | 644 | * @} |
| AnnaBridge | 172:65be27845400 | 645 | */ |
| AnnaBridge | 172:65be27845400 | 646 | |
| AnnaBridge | 172:65be27845400 | 647 | /* Define the private group ***************************************************/ |
| AnnaBridge | 172:65be27845400 | 648 | /******************************************************************************/ |
| AnnaBridge | 172:65be27845400 | 649 | /** @defgroup I2S_Private I2S Private |
| AnnaBridge | 172:65be27845400 | 650 | * @{ |
| AnnaBridge | 172:65be27845400 | 651 | */ |
| AnnaBridge | 172:65be27845400 | 652 | /** |
| AnnaBridge | 172:65be27845400 | 653 | * @} |
| AnnaBridge | 172:65be27845400 | 654 | */ |
| AnnaBridge | 172:65be27845400 | 655 | /******************************************************************************/ |
| AnnaBridge | 172:65be27845400 | 656 | /** |
| AnnaBridge | 172:65be27845400 | 657 | * @} |
| AnnaBridge | 172:65be27845400 | 658 | */ |
| AnnaBridge | 172:65be27845400 | 659 | |
| AnnaBridge | 172:65be27845400 | 660 | /** |
| AnnaBridge | 172:65be27845400 | 661 | * @} |
| AnnaBridge | 172:65be27845400 | 662 | */ |
| AnnaBridge | 172:65be27845400 | 663 | |
| AnnaBridge | 172:65be27845400 | 664 | /** |
| AnnaBridge | 172:65be27845400 | 665 | * @} |
| AnnaBridge | 172:65be27845400 | 666 | */ |
| AnnaBridge | 172:65be27845400 | 667 | |
| AnnaBridge | 172:65be27845400 | 668 | /** |
| AnnaBridge | 172:65be27845400 | 669 | * @} |
| AnnaBridge | 172:65be27845400 | 670 | */ |
| AnnaBridge | 172:65be27845400 | 671 | |
| AnnaBridge | 172:65be27845400 | 672 | |
| AnnaBridge | 172:65be27845400 | 673 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 674 | } |
| AnnaBridge | 172:65be27845400 | 675 | #endif |
| AnnaBridge | 172:65be27845400 | 676 | |
| AnnaBridge | 172:65be27845400 | 677 | |
| AnnaBridge | 172:65be27845400 | 678 | |
| AnnaBridge | 172:65be27845400 | 679 | #endif /* STM32H7xx_HAL_I2S_H */ |
| AnnaBridge | 172:65be27845400 | 680 | |
| AnnaBridge | 172:65be27845400 | 681 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
