mbed official
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_flash.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 172:65be27845400 | 1 | /** |
| AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_flash.h |
| AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
| AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of FLASH HAL module. |
| AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 7 | * @attention |
| AnnaBridge | 172:65be27845400 | 8 | * |
| AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics. |
| AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
| AnnaBridge | 172:65be27845400 | 11 | * |
| AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
| AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
| AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
| AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
| AnnaBridge | 172:65be27845400 | 16 | * |
| AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
| AnnaBridge | 172:65be27845400 | 18 | */ |
| AnnaBridge | 172:65be27845400 | 19 | |
| AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_FLASH_H |
| AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_FLASH_H |
| AnnaBridge | 172:65be27845400 | 23 | |
| AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
| AnnaBridge | 172:65be27845400 | 26 | #endif |
| AnnaBridge | 172:65be27845400 | 27 | |
| AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
| AnnaBridge | 172:65be27845400 | 30 | |
| AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
| AnnaBridge | 172:65be27845400 | 32 | * @{ |
| AnnaBridge | 172:65be27845400 | 33 | */ |
| AnnaBridge | 172:65be27845400 | 34 | |
| AnnaBridge | 172:65be27845400 | 35 | /** @addtogroup FLASH |
| AnnaBridge | 172:65be27845400 | 36 | * @{ |
| AnnaBridge | 172:65be27845400 | 37 | */ |
| AnnaBridge | 172:65be27845400 | 38 | |
| AnnaBridge | 172:65be27845400 | 39 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 40 | /** @defgroup FLASH_Exported_Types FLASH Exported Types |
| AnnaBridge | 172:65be27845400 | 41 | * @{ |
| AnnaBridge | 172:65be27845400 | 42 | */ |
| AnnaBridge | 172:65be27845400 | 43 | |
| AnnaBridge | 172:65be27845400 | 44 | /** |
| AnnaBridge | 172:65be27845400 | 45 | * @brief FLASH Procedure structure definition |
| AnnaBridge | 172:65be27845400 | 46 | */ |
| AnnaBridge | 172:65be27845400 | 47 | typedef enum |
| AnnaBridge | 172:65be27845400 | 48 | { |
| AnnaBridge | 172:65be27845400 | 49 | FLASH_PROC_NONE = 0U, |
| AnnaBridge | 172:65be27845400 | 50 | FLASH_PROC_SECTERASE_BANK1, |
| AnnaBridge | 172:65be27845400 | 51 | FLASH_PROC_MASSERASE_BANK1, |
| AnnaBridge | 172:65be27845400 | 52 | FLASH_PROC_PROGRAM_BANK1, |
| AnnaBridge | 172:65be27845400 | 53 | FLASH_PROC_SECTERASE_BANK2, |
| AnnaBridge | 172:65be27845400 | 54 | FLASH_PROC_MASSERASE_BANK2, |
| AnnaBridge | 172:65be27845400 | 55 | FLASH_PROC_PROGRAM_BANK2, |
| AnnaBridge | 172:65be27845400 | 56 | FLASH_PROC_ALLBANK_MASSERASE |
| AnnaBridge | 172:65be27845400 | 57 | } FLASH_ProcedureTypeDef; |
| AnnaBridge | 172:65be27845400 | 58 | |
| AnnaBridge | 172:65be27845400 | 59 | |
| AnnaBridge | 172:65be27845400 | 60 | /** |
| AnnaBridge | 172:65be27845400 | 61 | * @brief FLASH handle Structure definition |
| AnnaBridge | 172:65be27845400 | 62 | */ |
| AnnaBridge | 172:65be27845400 | 63 | typedef struct |
| AnnaBridge | 172:65be27845400 | 64 | { |
| AnnaBridge | 172:65be27845400 | 65 | __IO FLASH_ProcedureTypeDef ProcedureOnGoing; /*!< Internal variable to indicate which procedure is ongoing or not in IT context */ |
| AnnaBridge | 172:65be27845400 | 66 | |
| AnnaBridge | 172:65be27845400 | 67 | __IO uint32_t NbSectorsToErase; /*!< Internal variable to save the remaining sectors to erase in IT context */ |
| AnnaBridge | 172:65be27845400 | 68 | |
| AnnaBridge | 172:65be27845400 | 69 | __IO uint32_t VoltageForErase; /*!< Internal variable to provide voltage range selected by user in IT context */ |
| AnnaBridge | 172:65be27845400 | 70 | |
| AnnaBridge | 172:65be27845400 | 71 | __IO uint32_t Sector; /*!< Internal variable to define the current sector which is erasing */ |
| AnnaBridge | 172:65be27845400 | 72 | |
| AnnaBridge | 172:65be27845400 | 73 | __IO uint32_t Address; /*!< Internal variable to save address selected for program */ |
| AnnaBridge | 172:65be27845400 | 74 | |
| AnnaBridge | 172:65be27845400 | 75 | HAL_LockTypeDef Lock; /*!< FLASH locking object */ |
| AnnaBridge | 172:65be27845400 | 76 | |
| AnnaBridge | 172:65be27845400 | 77 | __IO uint32_t ErrorCode; /*!< FLASH error code */ |
| AnnaBridge | 172:65be27845400 | 78 | |
| AnnaBridge | 172:65be27845400 | 79 | }FLASH_ProcessTypeDef; |
| AnnaBridge | 172:65be27845400 | 80 | |
| AnnaBridge | 172:65be27845400 | 81 | /** |
| AnnaBridge | 172:65be27845400 | 82 | * @} |
| AnnaBridge | 172:65be27845400 | 83 | */ |
| AnnaBridge | 172:65be27845400 | 84 | |
| AnnaBridge | 172:65be27845400 | 85 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 86 | /** @defgroup FLASH_Exported_Constants FLASH Exported Constants |
| AnnaBridge | 172:65be27845400 | 87 | * @{ |
| AnnaBridge | 172:65be27845400 | 88 | */ |
| AnnaBridge | 172:65be27845400 | 89 | |
| AnnaBridge | 172:65be27845400 | 90 | /** @defgroup FLASH_Error_Code FLASH Error Code |
| AnnaBridge | 172:65be27845400 | 91 | * @brief FLASH Error Code |
| AnnaBridge | 172:65be27845400 | 92 | * @{ |
| AnnaBridge | 172:65be27845400 | 93 | */ |
| AnnaBridge | 172:65be27845400 | 94 | #define HAL_FLASH_ERROR_NONE 0x00000000U /*!< No error */ |
| AnnaBridge | 172:65be27845400 | 95 | |
| AnnaBridge | 172:65be27845400 | 96 | #define HAL_FLASH_ERROR_WRP FLASH_FLAG_WRPERR /*!< Write Protection Error */ |
| AnnaBridge | 172:65be27845400 | 97 | #define HAL_FLASH_ERROR_PGS FLASH_FLAG_PGSERR /*!< Program Sequence Error */ |
| AnnaBridge | 172:65be27845400 | 98 | #define HAL_FLASH_ERROR_STRB FLASH_FLAG_STRBERR /*!< Strobe Error */ |
| AnnaBridge | 172:65be27845400 | 99 | #define HAL_FLASH_ERROR_INC FLASH_FLAG_INCERR /*!< Inconsistency Error */ |
| AnnaBridge | 172:65be27845400 | 100 | #define HAL_FLASH_ERROR_OPE FLASH_FLAG_OPERR /*!< Operation Error */ |
| AnnaBridge | 172:65be27845400 | 101 | #define HAL_FLASH_ERROR_RDP FLASH_FLAG_RDPERR /*!< Read Protection Error */ |
| AnnaBridge | 172:65be27845400 | 102 | #define HAL_FLASH_ERROR_RDS FLASH_FLAG_RDSERR /*!< Read Secured Error */ |
| AnnaBridge | 172:65be27845400 | 103 | #define HAL_FLASH_ERROR_SNECC FLASH_FLAG_SNECCERR /*!< ECC Single Correction Error */ |
| AnnaBridge | 172:65be27845400 | 104 | #define HAL_FLASH_ERROR_DBECC FLASH_FLAG_DBECCERR /*!< ECC Double Detection Error */ |
| AnnaBridge | 172:65be27845400 | 105 | #define HAL_FLASH_ERROR_CRCRD FLASH_FLAG_CRCRDERR /*!< CRC Read Error */ |
| AnnaBridge | 172:65be27845400 | 106 | |
| AnnaBridge | 172:65be27845400 | 107 | #define HAL_FLASH_ERROR_WRP_BANK1 FLASH_FLAG_WRPERR_BANK1 /*!< Write Protection Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 108 | #define HAL_FLASH_ERROR_PGS_BANK1 FLASH_FLAG_PGSERR_BANK1 /*!< Program Sequence Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 109 | #define HAL_FLASH_ERROR_STRB_BANK1 FLASH_FLAG_STRBERR_BANK1 /*!< Strobe Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 110 | #define HAL_FLASH_ERROR_INC_BANK1 FLASH_FLAG_INCERR_BANK1 /*!< Inconsistency Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 111 | #define HAL_FLASH_ERROR_OPE_BANK1 FLASH_FLAG_OPERR_BANK1 /*!< Operation Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 112 | #define HAL_FLASH_ERROR_RDP_BANK1 FLASH_FLAG_RDPERR_BANK1 /*!< Read Protection Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 113 | #define HAL_FLASH_ERROR_RDS_BANK1 FLASH_FLAG_RDSERR_BANK1 /*!< Read Secured Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 114 | #define HAL_FLASH_ERROR_SNECC_BANK1 FLASH_FLAG_SNECCERR_BANK1 /*!< ECC Single Correction Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 115 | #define HAL_FLASH_ERROR_DBECC_BANK1 FLASH_FLAG_DBECCERR_BANK1 /*!< ECC Double Detection Error on Bank 1 */ |
| AnnaBridge | 172:65be27845400 | 116 | #define HAL_FLASH_ERROR_CRCRD_BANK1 FLASH_FLAG_CRCRDERR_BANK1 /*!< CRC Read Error on Bank1 */ |
| AnnaBridge | 172:65be27845400 | 117 | |
| AnnaBridge | 172:65be27845400 | 118 | #define HAL_FLASH_ERROR_WRP_BANK2 FLASH_FLAG_WRPERR_BANK2 /*!< Write Protection Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 119 | #define HAL_FLASH_ERROR_PGS_BANK2 FLASH_FLAG_PGSERR_BANK2 /*!< Program Sequence Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 120 | #define HAL_FLASH_ERROR_STRB_BANK2 FLASH_FLAG_STRBERR_BANK2 /*!< Strobe Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 121 | #define HAL_FLASH_ERROR_INC_BANK2 FLASH_FLAG_INCERR_BANK2 /*!< Inconsistency Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 122 | #define HAL_FLASH_ERROR_OPE_BANK2 FLASH_FLAG_OPERR_BANK2 /*!< Operation Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 123 | #define HAL_FLASH_ERROR_RDP_BANK2 FLASH_FLAG_RDPERR_BANK2 /*!< Read Protection Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 124 | #define HAL_FLASH_ERROR_RDS_BANK2 FLASH_FLAG_RDSERR_BANK2 /*!< Read Secured Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 125 | #define HAL_FLASH_ERROR_SNECC_BANK2 FLASH_FLAG_SNECCERR_BANK2 /*!< ECC Single Correction Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 126 | #define HAL_FLASH_ERROR_DBECC_BANK2 FLASH_FLAG_DBECCERR_BANK2 /*!< ECC Double Detection Error on Bank 2 */ |
| AnnaBridge | 172:65be27845400 | 127 | #define HAL_FLASH_ERROR_CRCRD_BANK2 FLASH_FLAG_CRCRDERR_BANK2 /*!< CRC Read Error on Bank2 */ |
| AnnaBridge | 172:65be27845400 | 128 | |
| AnnaBridge | 172:65be27845400 | 129 | #define HAL_FLASH_ERROR_OB_CHANGE FLASH_OPTSR_OPTCHANGEERR /*!< Option Byte Change Error */ |
| AnnaBridge | 172:65be27845400 | 130 | /** |
| AnnaBridge | 172:65be27845400 | 131 | * @} |
| AnnaBridge | 172:65be27845400 | 132 | */ |
| AnnaBridge | 172:65be27845400 | 133 | |
| AnnaBridge | 172:65be27845400 | 134 | /** @defgroup FLASH_Type_Program FLASH Type Program |
| AnnaBridge | 172:65be27845400 | 135 | * @{ |
| AnnaBridge | 172:65be27845400 | 136 | */ |
| AnnaBridge | 172:65be27845400 | 137 | #define FLASH_TYPEPROGRAM_FLASHWORD 0x03U /*!< Program a flash word (256-bit) at a specified address */ |
| AnnaBridge | 172:65be27845400 | 138 | /** |
| AnnaBridge | 172:65be27845400 | 139 | * @} |
| AnnaBridge | 172:65be27845400 | 140 | */ |
| AnnaBridge | 172:65be27845400 | 141 | |
| AnnaBridge | 172:65be27845400 | 142 | /** @defgroup FLASH_Flag_definition FLASH Flag definition |
| AnnaBridge | 172:65be27845400 | 143 | * @brief Flag definition |
| AnnaBridge | 172:65be27845400 | 144 | * @{ |
| AnnaBridge | 172:65be27845400 | 145 | */ |
| AnnaBridge | 172:65be27845400 | 146 | #define FLASH_FLAG_BSY FLASH_SR_BSY /*!< FLASH Busy flag */ |
| AnnaBridge | 172:65be27845400 | 147 | #define FLASH_FLAG_WDW FLASH_SR_WDW /*!< Waiting for Data to Write on flag */ |
| AnnaBridge | 172:65be27845400 | 148 | #define FLASH_FLAG_QW FLASH_SR_QW /*!< Write Waiting in Operation Queue on flag */ |
| AnnaBridge | 172:65be27845400 | 149 | #define FLASH_FLAG_CRC_BUSY FLASH_SR_CRC_BUSY /*!< CRC module is working on flag */ |
| AnnaBridge | 172:65be27845400 | 150 | #define FLASH_FLAG_EOP FLASH_SR_EOP /*!< End Of Program on flag */ |
| AnnaBridge | 172:65be27845400 | 151 | #define FLASH_FLAG_WRPERR FLASH_SR_WRPERR /*!< Write Protection Error on flag */ |
| AnnaBridge | 172:65be27845400 | 152 | #define FLASH_FLAG_PGSERR FLASH_SR_PGSERR /*!< Program Sequence Error on flag */ |
| AnnaBridge | 172:65be27845400 | 153 | #define FLASH_FLAG_STRBERR FLASH_SR_STRBERR /*!< strobe Error on flag */ |
| AnnaBridge | 172:65be27845400 | 154 | #define FLASH_FLAG_INCERR FLASH_SR_INCERR /*!< Inconsistency Error on flag */ |
| AnnaBridge | 172:65be27845400 | 155 | #define FLASH_FLAG_OPERR FLASH_SR_OPERR /*!< Operation Error on flag */ |
| AnnaBridge | 172:65be27845400 | 156 | #define FLASH_FLAG_RDPERR FLASH_SR_RDPERR /*!< Read Protection Error on flag */ |
| AnnaBridge | 172:65be27845400 | 157 | #define FLASH_FLAG_RDSERR FLASH_SR_RDSERR /*!< Read Secured Error on flag */ |
| AnnaBridge | 172:65be27845400 | 158 | #define FLASH_FLAG_SNECCERR FLASH_SR_SNECCERR /*!< Single ECC Error Correction on flag */ |
| AnnaBridge | 172:65be27845400 | 159 | #define FLASH_FLAG_DBECCERR FLASH_SR_DBECCERR /*!< Double Detection ECC Error on flag */ |
| AnnaBridge | 172:65be27845400 | 160 | #define FLASH_FLAG_CRCEND FLASH_SR_CRCEND /*!< CRC module completes on bank flag */ |
| AnnaBridge | 172:65be27845400 | 161 | #define FLASH_FLAG_CRCRDERR FLASH_SR_CRCRDERR /*!< CRC Read Error on bank flag */ |
| AnnaBridge | 172:65be27845400 | 162 | |
| AnnaBridge | 172:65be27845400 | 163 | #define FLASH_FLAG_BSY_BANK1 FLASH_SR_BSY /*!< FLASH Bank 1 Busy flag */ |
| AnnaBridge | 172:65be27845400 | 164 | #define FLASH_FLAG_WBNE_BANK1 FLASH_SR_WBNE /*!< Waiting for Data to Write on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 165 | #define FLASH_FLAG_QW_BANK1 FLASH_SR_QW /*!< Write Waiting in Operation Queue on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 166 | #define FLASH_FLAG_CRC_BUSY_BANK1 FLASH_SR_CRC_BUSY /*!< CRC module is working on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 167 | #define FLASH_FLAG_EOP_BANK1 FLASH_SR_EOP /*!< End Of Program on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 168 | #define FLASH_FLAG_WRPERR_BANK1 FLASH_SR_WRPERR /*!< Write Protection Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 169 | #define FLASH_FLAG_PGSERR_BANK1 FLASH_SR_PGSERR /*!< Program Sequence Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 170 | #define FLASH_FLAG_STRBERR_BANK1 FLASH_SR_STRBERR /*!< strobe Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 171 | #define FLASH_FLAG_INCERR_BANK1 FLASH_SR_INCERR /*!< Inconsistency Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 172 | #define FLASH_FLAG_OPERR_BANK1 FLASH_SR_OPERR /*!< Operation Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 173 | #define FLASH_FLAG_RDPERR_BANK1 FLASH_SR_RDPERR /*!< Read Protection Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 174 | #define FLASH_FLAG_RDSERR_BANK1 FLASH_SR_RDSERR /*!< Read Secured Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 175 | #define FLASH_FLAG_SNECCERR_BANK1 FLASH_SR_SNECCERR /*!< Single ECC Error Correction on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 176 | #define FLASH_FLAG_DBECCERR_BANK1 FLASH_SR_DBECCERR /*!< Double Detection ECC Error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 177 | #define FLASH_FLAG_CRCEND_BANK1 FLASH_SR_CRCEND /*!< CRC module completes on bank Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 178 | #define FLASH_FLAG_CRCRDERR_BANK1 FLASH_SR_CRCRDERR /*!< CRC Read error on Bank 1 flag */ |
| AnnaBridge | 172:65be27845400 | 179 | |
| AnnaBridge | 172:65be27845400 | 180 | #define FLASH_FLAG_ALL_ERRORS_BANK1 (FLASH_FLAG_WRPERR_BANK1 | FLASH_FLAG_PGSERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 181 | FLASH_FLAG_STRBERR_BANK1 | FLASH_FLAG_INCERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 182 | FLASH_FLAG_OPERR_BANK1 | FLASH_FLAG_RDPERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 183 | FLASH_FLAG_RDSERR_BANK1 | FLASH_FLAG_SNECCERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 184 | FLASH_FLAG_DBECCERR_BANK1 | FLASH_FLAG_CRCRDERR_BANK1) |
| AnnaBridge | 172:65be27845400 | 185 | |
| AnnaBridge | 172:65be27845400 | 186 | #define FLASH_FLAG_ALL_BANK1 (FLASH_FLAG_BSY_BANK1 | FLASH_FLAG_WBNE_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 187 | FLASH_FLAG_QW_BANK1 | FLASH_FLAG_CRC_BUSY_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 188 | FLASH_FLAG_EOP_BANK1 | FLASH_FLAG_CRCEND_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 189 | FLASH_FLAG_ALL_ERRORS_BANK1) |
| AnnaBridge | 172:65be27845400 | 190 | |
| AnnaBridge | 172:65be27845400 | 191 | #define FLASH_FLAG_BSY_BANK2 (FLASH_SR_BSY | 0x80000000U) /*!< FLASH Bank 2 Busy flag */ |
| AnnaBridge | 172:65be27845400 | 192 | #define FLASH_FLAG_WBNE_BANK2 (FLASH_SR_WBNE | 0x80000000U) /*!< Waiting for Data to Write on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 193 | #define FLASH_FLAG_QW_BANK2 (FLASH_SR_QW | 0x80000000U) /*!< Write Waiting in Operation Queue on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 194 | #define FLASH_FLAG_CRC_BUSY_BANK2 (FLASH_SR_CRC_BUSY | 0x80000000U) /*!< CRC module is working on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 195 | #define FLASH_FLAG_EOP_BANK2 (FLASH_SR_EOP | 0x80000000U) /*!< End Of Program on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 196 | #define FLASH_FLAG_WRPERR_BANK2 (FLASH_SR_WRPERR | 0x80000000U) /*!< Write Protection Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 197 | #define FLASH_FLAG_PGSERR_BANK2 (FLASH_SR_PGSERR | 0x80000000U) /*!< Program Sequence Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 198 | #define FLASH_FLAG_STRBERR_BANK2 (FLASH_SR_STRBERR | 0x80000000U) /*!< Strobe Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 199 | #define FLASH_FLAG_INCERR_BANK2 (FLASH_SR_INCERR | 0x80000000U) /*!< Inconsistency Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 200 | #define FLASH_FLAG_OPERR_BANK2 (FLASH_SR_OPERR | 0x80000000U) /*!< Operation Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 201 | #define FLASH_FLAG_RDPERR_BANK2 (FLASH_SR_RDPERR | 0x80000000U) /*!< Read Protection Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 202 | #define FLASH_FLAG_RDSERR_BANK2 (FLASH_SR_RDSERR | 0x80000000U) /*!< Read Secured Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 203 | #define FLASH_FLAG_SNECCERR_BANK2 (FLASH_SR_SNECCERR | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 204 | #define FLASH_FLAG_DBECCERR_BANK2 (FLASH_SR_DBECCERR | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 205 | #define FLASH_FLAG_CRCEND_BANK2 (FLASH_SR_CRCEND | 0x80000000U) /*!< CRC module completes on bank Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 206 | #define FLASH_FLAG_CRCRDERR_BANK2 (FLASH_SR_CRCRDERR | 0x80000000U) /*!< CRC Read error on Bank 2 flag */ |
| AnnaBridge | 172:65be27845400 | 207 | |
| AnnaBridge | 172:65be27845400 | 208 | #define FLASH_FLAG_ALL_ERRORS_BANK2 (FLASH_FLAG_WRPERR_BANK2 | FLASH_FLAG_PGSERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 209 | FLASH_FLAG_STRBERR_BANK2 | FLASH_FLAG_INCERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 210 | FLASH_FLAG_OPERR_BANK2 | FLASH_FLAG_RDPERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 211 | FLASH_FLAG_RDSERR_BANK2 | FLASH_FLAG_SNECCERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 212 | FLASH_FLAG_DBECCERR_BANK2 | FLASH_FLAG_CRCRDERR_BANK2) |
| AnnaBridge | 172:65be27845400 | 213 | |
| AnnaBridge | 172:65be27845400 | 214 | #define FLASH_FLAG_ALL_BANK2 (FLASH_FLAG_BSY_BANK2 | FLASH_FLAG_WBNE_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 215 | FLASH_FLAG_QW_BANK2 | FLASH_FLAG_CRC_BUSY_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 216 | FLASH_FLAG_EOP_BANK2 | FLASH_FLAG_CRCEND_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 217 | FLASH_FLAG_ALL_ERRORS_BANK2) |
| AnnaBridge | 172:65be27845400 | 218 | /** |
| AnnaBridge | 172:65be27845400 | 219 | * @} |
| AnnaBridge | 172:65be27845400 | 220 | */ |
| AnnaBridge | 172:65be27845400 | 221 | |
| AnnaBridge | 172:65be27845400 | 222 | /** @defgroup FLASH_Interrupt_definition FLASH Interrupt definition |
| AnnaBridge | 172:65be27845400 | 223 | * @brief FLASH Interrupt definition |
| AnnaBridge | 172:65be27845400 | 224 | * @{ |
| AnnaBridge | 172:65be27845400 | 225 | */ |
| AnnaBridge | 172:65be27845400 | 226 | #define FLASH_IT_EOP_BANK1 FLASH_CR_EOPIE /*!< End of FLASH Bank 1 Operation Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 227 | #define FLASH_IT_WRPERR_BANK1 FLASH_CR_WRPERRIE /*!< Write Protection Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 228 | #define FLASH_IT_PGSERR_BANK1 FLASH_CR_PGSERRIE /*!< Program Sequence Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 229 | #define FLASH_IT_STRBERR_BANK1 FLASH_CR_STRBERRIE /*!< Strobe Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 230 | #define FLASH_IT_INCERR_BANK1 FLASH_CR_INCERRIE /*!< Inconsistency Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 231 | #define FLASH_IT_OPERR_BANK1 FLASH_CR_OPERRIE /*!< Operation Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 232 | #define FLASH_IT_RDPERR_BANK1 FLASH_CR_RDPERRIE /*!< Read protection Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 233 | #define FLASH_IT_RDSERR_BANK1 FLASH_CR_RDSERRIE /*!< Read Secured Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 234 | #define FLASH_IT_SNECCERR_BANK1 FLASH_CR_SNECCERRIE /*!< Single ECC Error Correction on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 235 | #define FLASH_IT_DBECCERR_BANK1 FLASH_CR_DBECCERRIE /*!< Double Detection ECC Error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 236 | #define FLASH_IT_CRCEND_BANK1 FLASH_CR_CRCENDIE /*!< CRC End on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 237 | #define FLASH_IT_CRCRDERR_BANK1 FLASH_CR_CRCRDERRIE /*!< CRC Read error on Bank 1 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 238 | |
| AnnaBridge | 172:65be27845400 | 239 | #define FLASH_IT_ALL_BANK1 (FLASH_IT_EOP_BANK1 | FLASH_IT_WRPERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 240 | FLASH_IT_PGSERR_BANK1 | FLASH_IT_STRBERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 241 | FLASH_IT_INCERR_BANK1 | FLASH_IT_OPERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 242 | FLASH_IT_RDPERR_BANK1 | FLASH_IT_RDSERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 243 | FLASH_IT_SNECCERR_BANK1 | FLASH_IT_DBECCERR_BANK1 | \ |
| AnnaBridge | 172:65be27845400 | 244 | FLASH_IT_CRCEND_BANK1 | FLASH_IT_CRCRDERR_BANK1) |
| AnnaBridge | 172:65be27845400 | 245 | |
| AnnaBridge | 172:65be27845400 | 246 | #define FLASH_IT_EOP_BANK2 (FLASH_CR_EOPIE | 0x80000000U) /*!< End of FLASH Bank 2 Operation Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 247 | #define FLASH_IT_WRPERR_BANK2 (FLASH_CR_WRPERRIE | 0x80000000U) /*!< Write Protection Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 248 | #define FLASH_IT_PGSERR_BANK2 (FLASH_CR_PGSERRIE | 0x80000000U) /*!< Program Sequence Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 249 | #define FLASH_IT_STRBERR_BANK2 (FLASH_CR_STRBERRIE | 0x80000000U) /*!< Strobe Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 250 | #define FLASH_IT_INCERR_BANK2 (FLASH_CR_INCERRIE | 0x80000000U) /*!< Inconsistency Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 251 | #define FLASH_IT_OPERR_BANK2 (FLASH_CR_OPERRIE | 0x80000000U) /*!< Operation Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 252 | #define FLASH_IT_RDPERR_BANK2 (FLASH_CR_RDPERRIE | 0x80000000U) /*!< Read protection Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 253 | #define FLASH_IT_RDSERR_BANK2 (FLASH_CR_RDSERRIE | 0x80000000U) /*!< Read Secured Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 254 | #define FLASH_IT_SNECCERR_BANK2 (FLASH_CR_SNECCERRIE | 0x80000000U) /*!< Single ECC Error Correction on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 255 | #define FLASH_IT_DBECCERR_BANK2 (FLASH_CR_DBECCERRIE | 0x80000000U) /*!< Double Detection ECC Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 256 | #define FLASH_IT_CRCEND_BANK2 (FLASH_CR_CRCENDIE | 0x80000000U) /*!< CRC End on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 257 | #define FLASH_IT_CRCRDERR_BANK2 (FLASH_CR_CRCRDERRIE | 0x80000000U) /*!< CRC Read Error on Bank 2 Interrupt source */ |
| AnnaBridge | 172:65be27845400 | 258 | |
| AnnaBridge | 172:65be27845400 | 259 | #define FLASH_IT_ALL_BANK2 (FLASH_IT_EOP_BANK2 | FLASH_IT_WRPERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 260 | FLASH_IT_PGSERR_BANK2 | FLASH_IT_STRBERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 261 | FLASH_IT_INCERR_BANK2 | FLASH_IT_OPERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 262 | FLASH_IT_RDPERR_BANK2 | FLASH_IT_RDSERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 263 | FLASH_IT_SNECCERR_BANK2 | FLASH_IT_DBECCERR_BANK2 | \ |
| AnnaBridge | 172:65be27845400 | 264 | FLASH_IT_CRCEND_BANK2 | FLASH_IT_CRCRDERR_BANK2) |
| AnnaBridge | 172:65be27845400 | 265 | /** |
| AnnaBridge | 172:65be27845400 | 266 | * @} |
| AnnaBridge | 172:65be27845400 | 267 | */ |
| AnnaBridge | 172:65be27845400 | 268 | |
| AnnaBridge | 172:65be27845400 | 269 | /** @defgroup FLASH_Program_Parallelism FLASH Program Parallelism |
| AnnaBridge | 172:65be27845400 | 270 | * @{ |
| AnnaBridge | 172:65be27845400 | 271 | */ |
| AnnaBridge | 172:65be27845400 | 272 | #define FLASH_PSIZE_BYTE 0x00000000U /*!< Flash program/erase by 8 bits */ |
| AnnaBridge | 172:65be27845400 | 273 | #define FLASH_PSIZE_HALF_WORD FLASH_CR_PSIZE_0 /*!< Flash program/erase by 16 bits */ |
| AnnaBridge | 172:65be27845400 | 274 | #define FLASH_PSIZE_WORD FLASH_CR_PSIZE_1 /*!< Flash program/erase by 32 bits */ |
| AnnaBridge | 172:65be27845400 | 275 | #define FLASH_PSIZE_DOUBLE_WORD FLASH_CR_PSIZE /*!< Flash program/erase by 64 bits */ |
| AnnaBridge | 172:65be27845400 | 276 | /** |
| AnnaBridge | 172:65be27845400 | 277 | * @} |
| AnnaBridge | 172:65be27845400 | 278 | */ |
| AnnaBridge | 172:65be27845400 | 279 | |
| AnnaBridge | 172:65be27845400 | 280 | |
| AnnaBridge | 172:65be27845400 | 281 | /** @defgroup FLASH_Keys FLASH Keys |
| AnnaBridge | 172:65be27845400 | 282 | * @{ |
| AnnaBridge | 172:65be27845400 | 283 | */ |
| AnnaBridge | 172:65be27845400 | 284 | #define FLASH_KEY1 0x45670123U |
| AnnaBridge | 172:65be27845400 | 285 | #define FLASH_KEY2 0xCDEF89ABU |
| AnnaBridge | 172:65be27845400 | 286 | #define FLASH_OPT_KEY1 0x08192A3BU |
| AnnaBridge | 172:65be27845400 | 287 | #define FLASH_OPT_KEY2 0x4C5D6E7FU |
| AnnaBridge | 172:65be27845400 | 288 | /** |
| AnnaBridge | 172:65be27845400 | 289 | * @} |
| AnnaBridge | 172:65be27845400 | 290 | */ |
| AnnaBridge | 172:65be27845400 | 291 | |
| AnnaBridge | 172:65be27845400 | 292 | /** @defgroup FLASH_Sectors FLASH Sectors |
| AnnaBridge | 172:65be27845400 | 293 | * @{ |
| AnnaBridge | 172:65be27845400 | 294 | */ |
| AnnaBridge | 172:65be27845400 | 295 | #define FLASH_SECTOR_0 0U /*!< Sector Number 0 */ |
| AnnaBridge | 172:65be27845400 | 296 | #define FLASH_SECTOR_1 1U /*!< Sector Number 1 */ |
| AnnaBridge | 172:65be27845400 | 297 | #define FLASH_SECTOR_2 2U /*!< Sector Number 2 */ |
| AnnaBridge | 172:65be27845400 | 298 | #define FLASH_SECTOR_3 3U /*!< Sector Number 3 */ |
| AnnaBridge | 172:65be27845400 | 299 | #define FLASH_SECTOR_4 4U /*!< Sector Number 4 */ |
| AnnaBridge | 172:65be27845400 | 300 | #define FLASH_SECTOR_5 5U /*!< Sector Number 5 */ |
| AnnaBridge | 172:65be27845400 | 301 | #define FLASH_SECTOR_6 6U /*!< Sector Number 6 */ |
| AnnaBridge | 172:65be27845400 | 302 | #define FLASH_SECTOR_7 7U /*!< Sector Number 7 */ |
| AnnaBridge | 172:65be27845400 | 303 | /** |
| AnnaBridge | 172:65be27845400 | 304 | * @} |
| AnnaBridge | 172:65be27845400 | 305 | */ |
| AnnaBridge | 172:65be27845400 | 306 | |
| AnnaBridge | 172:65be27845400 | 307 | /** |
| AnnaBridge | 172:65be27845400 | 308 | * @} |
| AnnaBridge | 172:65be27845400 | 309 | */ |
| AnnaBridge | 172:65be27845400 | 310 | |
| AnnaBridge | 172:65be27845400 | 311 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 312 | /** @defgroup FLASH_Exported_Macros FLASH Exported Macros |
| AnnaBridge | 172:65be27845400 | 313 | * @{ |
| AnnaBridge | 172:65be27845400 | 314 | */ |
| AnnaBridge | 172:65be27845400 | 315 | /** |
| AnnaBridge | 172:65be27845400 | 316 | * @brief Set the FLASH Latency. |
| AnnaBridge | 172:65be27845400 | 317 | * @param __LATENCY__: FLASH Latency |
| AnnaBridge | 172:65be27845400 | 318 | * The value of this parameter depend on device used within the same series |
| AnnaBridge | 172:65be27845400 | 319 | * @retval none |
| AnnaBridge | 172:65be27845400 | 320 | */ |
| AnnaBridge | 172:65be27845400 | 321 | #define __HAL_FLASH_SET_LATENCY(__LATENCY__) \ |
| AnnaBridge | 172:65be27845400 | 322 | MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, (uint32_t)(__LATENCY__)) |
| AnnaBridge | 172:65be27845400 | 323 | |
| AnnaBridge | 172:65be27845400 | 324 | /** |
| AnnaBridge | 172:65be27845400 | 325 | * @brief Get the FLASH Latency. |
| AnnaBridge | 172:65be27845400 | 326 | * @retval FLASH Latency |
| AnnaBridge | 172:65be27845400 | 327 | * The value of this parameter depend on device used within the same series |
| AnnaBridge | 172:65be27845400 | 328 | */ |
| AnnaBridge | 172:65be27845400 | 329 | #define __HAL_FLASH_GET_LATENCY() (READ_BIT((FLASH->ACR), FLASH_ACR_LATENCY)) |
| AnnaBridge | 172:65be27845400 | 330 | |
| AnnaBridge | 172:65be27845400 | 331 | /** |
| AnnaBridge | 172:65be27845400 | 332 | * @brief Enable the specified FLASH interrupt. |
| AnnaBridge | 172:65be27845400 | 333 | * @param __INTERRUPT__ : FLASH interrupt |
| AnnaBridge | 172:65be27845400 | 334 | * In case of Bank 1 This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 335 | * @arg FLASH_IT_EOP_BANK1 : End of FLASH Bank 1 Operation Interrupt source |
| AnnaBridge | 172:65be27845400 | 336 | * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 337 | * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 338 | * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 339 | * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 340 | * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 341 | * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 342 | * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 343 | * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 344 | * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 345 | * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 346 | * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 347 | |
| AnnaBridge | 172:65be27845400 | 348 | * In case of Bank 2, this parameter can be any combination of the following values: * |
| AnnaBridge | 172:65be27845400 | 349 | * @arg FLASH_IT_EOP_BANK2 : End of FLASH Bank 2 Operation Interrupt source |
| AnnaBridge | 172:65be27845400 | 350 | * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 351 | * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 352 | * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 353 | * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 354 | * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 355 | * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 356 | * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 357 | * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 358 | * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 359 | * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 360 | * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 361 | * @retval none |
| AnnaBridge | 172:65be27845400 | 362 | */ |
| AnnaBridge | 172:65be27845400 | 363 | |
| AnnaBridge | 172:65be27845400 | 364 | #define __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) (FLASH->CR1 |= (__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 365 | |
| AnnaBridge | 172:65be27845400 | 366 | #define __HAL_FLASH_ENABLE_IT_BANK2(__INTERRUPT__) (FLASH->CR2 |= ((__INTERRUPT__) & 0x7FFFFFFFU)) |
| AnnaBridge | 172:65be27845400 | 367 | |
| AnnaBridge | 172:65be27845400 | 368 | #define __HAL_FLASH_ENABLE_IT(__INTERRUPT__) (IS_FLASH_IT_BANK1(__INTERRUPT__) ? \ |
| AnnaBridge | 172:65be27845400 | 369 | __HAL_FLASH_ENABLE_IT_BANK1(__INTERRUPT__) : \ |
| AnnaBridge | 172:65be27845400 | 370 | __HAL_FLASH_ENABLE_IT_BANK2(__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 371 | |
| AnnaBridge | 172:65be27845400 | 372 | |
| AnnaBridge | 172:65be27845400 | 373 | /** |
| AnnaBridge | 172:65be27845400 | 374 | * @brief Disable the specified FLASH interrupt. |
| AnnaBridge | 172:65be27845400 | 375 | * @param __INTERRUPT__ : FLASH interrupt |
| AnnaBridge | 172:65be27845400 | 376 | * In case of Bank 1 This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 377 | * @arg FLASH_IT_EOP_BANK1 : End of FLASH Bank 1 Operation Interrupt source |
| AnnaBridge | 172:65be27845400 | 378 | * @arg FLASH_IT_WRPERR_BANK1 : Write Protection Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 379 | * @arg FLASH_IT_PGSERR_BANK1 : Program Sequence Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 380 | * @arg FLASH_IT_STRBERR_BANK1 : Strobe Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 381 | * @arg FLASH_IT_INCERR_BANK1 : Inconsistency Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 382 | * @arg FLASH_IT_OPERR_BANK1 : Operation Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 383 | * @arg FLASH_IT_RDPERR_BANK1 : Read protection Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 384 | * @arg FLASH_IT_RDSERR_BANK1 : Read secure Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 385 | * @arg FLASH_IT_SNECCERR_BANK1 : Single ECC Error Correction on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 386 | * @arg FLASH_IT_DBECCERR_BANK1 : Double Detection ECC Error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 387 | * @arg FLASH_IT_CRCEND_BANK1 : CRC End on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 388 | * @arg FLASH_IT_CRCRDERR_BANK1 : CRC Read error on Bank 1 Interrupt source |
| AnnaBridge | 172:65be27845400 | 389 | |
| AnnaBridge | 172:65be27845400 | 390 | * In case of Bank 2, this parameter can be any combination of the following values: * |
| AnnaBridge | 172:65be27845400 | 391 | * @arg FLASH_IT_EOP_BANK2 : End of FLASH Bank 2 Operation Interrupt source |
| AnnaBridge | 172:65be27845400 | 392 | * @arg FLASH_IT_WRPERR_BANK2 : Write Protection Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 393 | * @arg FLASH_IT_PGSERR_BANK2 : Program Sequence Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 394 | * @arg FLASH_IT_STRBERR_BANK2 : Strobe Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 395 | * @arg FLASH_IT_INCERR_BANK2 : Inconsistency Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 396 | * @arg FLASH_IT_OPERR_BANK2 : Operation Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 397 | * @arg FLASH_IT_RDPERR_BANK2 : Read protection Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 398 | * @arg FLASH_IT_RDSERR_BANK2 : Read secure Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 399 | * @arg FLASH_IT_SNECCERR_BANK2 : Single ECC Error Correction on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 400 | * @arg FLASH_IT_DBECCERR_BANK2 : Double Detection ECC Error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 401 | * @arg FLASH_IT_CRCEND_BANK2 : CRC End on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 402 | * @arg FLASH_IT_CRCRDERR_BANK2 : CRC Read error on Bank 2 Interrupt source |
| AnnaBridge | 172:65be27845400 | 403 | * @retval none |
| AnnaBridge | 172:65be27845400 | 404 | */ |
| AnnaBridge | 172:65be27845400 | 405 | |
| AnnaBridge | 172:65be27845400 | 406 | #define __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) (FLASH->CR1 &= ~(uint32_t)(__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 407 | |
| AnnaBridge | 172:65be27845400 | 408 | #define __HAL_FLASH_DISABLE_IT_BANK2(__INTERRUPT__) (FLASH->CR2 &= ~(uint32_t)((__INTERRUPT__) & 0x7FFFFFFFU)) |
| AnnaBridge | 172:65be27845400 | 409 | |
| AnnaBridge | 172:65be27845400 | 410 | #define __HAL_FLASH_DISABLE_IT(__INTERRUPT__) (IS_FLASH_IT_BANK1(__INTERRUPT__) ? \ |
| AnnaBridge | 172:65be27845400 | 411 | __HAL_FLASH_DISABLE_IT_BANK1(__INTERRUPT__) : \ |
| AnnaBridge | 172:65be27845400 | 412 | __HAL_FLASH_DISABLE_IT_BANK2(__INTERRUPT__)) |
| AnnaBridge | 172:65be27845400 | 413 | |
| AnnaBridge | 172:65be27845400 | 414 | |
| AnnaBridge | 172:65be27845400 | 415 | /** |
| AnnaBridge | 172:65be27845400 | 416 | * @brief Checks whether the specified FLASH flag is set or not. |
| AnnaBridge | 172:65be27845400 | 417 | * @param __FLAG__: specifies the FLASH flag to check. |
| AnnaBridge | 172:65be27845400 | 418 | * In case of Bank 1 This parameter can be any combination of the following values : |
| AnnaBridge | 172:65be27845400 | 419 | * @arg FLASH_FLAG_BSY_BANK1 : FLASH Bank 1 Busy flag |
| AnnaBridge | 172:65be27845400 | 420 | * @arg FLASH_FLAG_WBNE_BANK1 : Waiting for Data to Write on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 421 | * @arg FLASH_FLAG_QW_BANK1 : Write Waiting in Operation Queue on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 422 | * @arg FLASH_FLAG_CRC_BUSY_BANK1 : CRC module is working on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 423 | * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 424 | * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 425 | * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 426 | * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 427 | * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 428 | * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 429 | * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 430 | * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 431 | * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 432 | * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 433 | * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 434 | * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 435 | * |
| AnnaBridge | 172:65be27845400 | 436 | * In case of Bank 2 This parameter can be any combination of the following values : |
| AnnaBridge | 172:65be27845400 | 437 | * @arg FLASH_FLAG_BSY_BANK2 : FLASH Bank 2 Busy flag |
| AnnaBridge | 172:65be27845400 | 438 | * @arg FLASH_FLAG_WBNE_BANK2 : Waiting for Data to Write on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 439 | * @arg FLASH_FLAG_QW_BANK2 : Write Waiting in Operation Queue on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 440 | * @arg FLASH_FLAG_CRC_BUSY_BANK2 : CRC module is working on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 441 | * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 442 | * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 443 | * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 444 | * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 445 | * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 446 | * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 447 | * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 448 | * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 449 | * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 450 | * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 451 | * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 452 | * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 453 | * @retval The new state of FLASH_FLAG (SET or RESET). |
| AnnaBridge | 172:65be27845400 | 454 | */ |
| AnnaBridge | 172:65be27845400 | 455 | #define __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) (READ_BIT(FLASH->SR1, (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 456 | |
| AnnaBridge | 172:65be27845400 | 457 | #define __HAL_FLASH_GET_FLAG_BANK2(__FLAG__) (READ_BIT(FLASH->SR2, ((__FLAG__) & 0x7FFFFFFFU)) == (((__FLAG__) & 0x7FFFFFFFU))) |
| AnnaBridge | 172:65be27845400 | 458 | |
| AnnaBridge | 172:65be27845400 | 459 | #define __HAL_FLASH_GET_FLAG(__FLAG__) (IS_FLASH_FLAG_BANK1(__FLAG__) ? __HAL_FLASH_GET_FLAG_BANK1(__FLAG__) : \ |
| AnnaBridge | 172:65be27845400 | 460 | __HAL_FLASH_GET_FLAG_BANK2(__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 461 | |
| AnnaBridge | 172:65be27845400 | 462 | |
| AnnaBridge | 172:65be27845400 | 463 | /** |
| AnnaBridge | 172:65be27845400 | 464 | * @brief Clear the specified FLASH flag. |
| AnnaBridge | 172:65be27845400 | 465 | * @param __FLAG__: specifies the FLASH flags to clear. |
| AnnaBridge | 172:65be27845400 | 466 | * This parameter can be any combination of the following values: |
| AnnaBridge | 172:65be27845400 | 467 | * @arg FLASH_FLAG_EOP_BANK1 : End Of Program on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 468 | * @arg FLASH_FLAG_WRPERR_BANK1 : Write Protection Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 469 | * @arg FLASH_FLAG_PGSERR_BANK1 : Program Sequence Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 470 | * @arg FLASH_FLAG_STRBER_BANK1 : Program Alignment Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 471 | * @arg FLASH_FLAG_INCERR_BANK1 : Inconsistency Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 472 | * @arg FLASH_FLAG_OPERR_BANK1 : Operation Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 473 | * @arg FLASH_FLAG_RDPERR_BANK1 : Read Protection Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 474 | * @arg FLASH_FLAG_RDSERR_BANK1 : Read secure Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 475 | * @arg FLASH_FLAG_SNECCE_BANK1 : Single ECC Error Correction on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 476 | * @arg FLASH_FLAG_DBECCE_BANK1 : Double Detection ECC Error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 477 | * @arg FLASH_FLAG_CRCEND_BANK1 : CRC End on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 478 | * @arg FLASH_FLAG_CRCRDERR_BANK1 : CRC Read error on Bank 1 flag |
| AnnaBridge | 172:65be27845400 | 479 | * |
| AnnaBridge | 172:65be27845400 | 480 | * In case of Bank 2 This parameter can be any combination of the following values : |
| AnnaBridge | 172:65be27845400 | 481 | * @arg FLASH_FLAG_EOP_BANK2 : End Of Program on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 482 | * @arg FLASH_FLAG_WRPERR_BANK2 : Write Protection Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 483 | * @arg FLASH_FLAG_PGSERR_BANK2 : Program Sequence Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 484 | * @arg FLASH_FLAG_STRBER_BANK2 : Program Alignment Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 485 | * @arg FLASH_FLAG_INCERR_BANK2 : Inconsistency Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 486 | * @arg FLASH_FLAG_OPERR_BANK2 : Operation Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 487 | * @arg FLASH_FLAG_RDPERR_BANK2 : Read Protection Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 488 | * @arg FLASH_FLAG_RDSERR_BANK2 : Read secure Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 489 | * @arg FLASH_FLAG_SNECCE_BANK2 : Single ECC Error Correction on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 490 | * @arg FLASH_FLAG_DBECCE_BANK2 : Double Detection ECC Error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 491 | * @arg FLASH_FLAG_CRCEND_BANK2 : CRC End on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 492 | * @arg FLASH_FLAG_CRCRDERR_BANK2 : CRC Read error on Bank 2 flag |
| AnnaBridge | 172:65be27845400 | 493 | * @retval none |
| AnnaBridge | 172:65be27845400 | 494 | */ |
| AnnaBridge | 172:65be27845400 | 495 | |
| AnnaBridge | 172:65be27845400 | 496 | #define __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) WRITE_REG(FLASH->CCR1, (__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 497 | |
| AnnaBridge | 172:65be27845400 | 498 | #define __HAL_FLASH_CLEAR_FLAG_BANK2(__FLAG__) WRITE_REG(FLASH->CCR2, ((__FLAG__) & 0x7FFFFFFFU)) |
| AnnaBridge | 172:65be27845400 | 499 | |
| AnnaBridge | 172:65be27845400 | 500 | #define __HAL_FLASH_CLEAR_FLAG(__FLAG__) (IS_FLASH_FLAG_BANK1(__FLAG__) ? __HAL_FLASH_CLEAR_FLAG_BANK1(__FLAG__) : \ |
| AnnaBridge | 172:65be27845400 | 501 | __HAL_FLASH_CLEAR_FLAG_BANK2(__FLAG__)) |
| AnnaBridge | 172:65be27845400 | 502 | |
| AnnaBridge | 172:65be27845400 | 503 | /** |
| AnnaBridge | 172:65be27845400 | 504 | * @} |
| AnnaBridge | 172:65be27845400 | 505 | */ |
| AnnaBridge | 172:65be27845400 | 506 | |
| AnnaBridge | 172:65be27845400 | 507 | /* Include FLASH HAL Extension module */ |
| AnnaBridge | 172:65be27845400 | 508 | #include "stm32h7xx_hal_flash_ex.h" |
| AnnaBridge | 172:65be27845400 | 509 | |
| AnnaBridge | 172:65be27845400 | 510 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 511 | /** @addtogroup FLASH_Exported_Functions |
| AnnaBridge | 172:65be27845400 | 512 | * @{ |
| AnnaBridge | 172:65be27845400 | 513 | */ |
| AnnaBridge | 172:65be27845400 | 514 | /** @addtogroup FLASH_Exported_Functions_Group1 |
| AnnaBridge | 172:65be27845400 | 515 | * @{ |
| AnnaBridge | 172:65be27845400 | 516 | */ |
| AnnaBridge | 172:65be27845400 | 517 | /* Program operation functions ***********************************************/ |
| AnnaBridge | 172:65be27845400 | 518 | HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t FlashAddress, uint32_t DataAddress); |
| AnnaBridge | 172:65be27845400 | 519 | HAL_StatusTypeDef HAL_FLASH_Program_IT(uint32_t TypeProgram, uint32_t FlashAddress, uint32_t DataAddress); |
| AnnaBridge | 172:65be27845400 | 520 | /* FLASH IRQ handler method */ |
| AnnaBridge | 172:65be27845400 | 521 | void HAL_FLASH_IRQHandler(void); |
| AnnaBridge | 172:65be27845400 | 522 | /* Callbacks in non blocking modes */ |
| AnnaBridge | 172:65be27845400 | 523 | void HAL_FLASH_EndOfOperationCallback(uint32_t ReturnValue); |
| AnnaBridge | 172:65be27845400 | 524 | void HAL_FLASH_OperationErrorCallback(uint32_t ReturnValue); |
| AnnaBridge | 172:65be27845400 | 525 | /** |
| AnnaBridge | 172:65be27845400 | 526 | * @} |
| AnnaBridge | 172:65be27845400 | 527 | */ |
| AnnaBridge | 172:65be27845400 | 528 | |
| AnnaBridge | 172:65be27845400 | 529 | /** @addtogroup FLASH_Exported_Functions_Group2 |
| AnnaBridge | 172:65be27845400 | 530 | * @{ |
| AnnaBridge | 172:65be27845400 | 531 | */ |
| AnnaBridge | 172:65be27845400 | 532 | /* Peripheral Control functions **********************************************/ |
| AnnaBridge | 172:65be27845400 | 533 | HAL_StatusTypeDef HAL_FLASH_Unlock(void); |
| AnnaBridge | 172:65be27845400 | 534 | HAL_StatusTypeDef HAL_FLASH_Lock(void); |
| AnnaBridge | 172:65be27845400 | 535 | HAL_StatusTypeDef HAL_FLASH_OB_Unlock(void); |
| AnnaBridge | 172:65be27845400 | 536 | HAL_StatusTypeDef HAL_FLASH_OB_Lock(void); |
| AnnaBridge | 172:65be27845400 | 537 | /* Option bytes control */ |
| AnnaBridge | 172:65be27845400 | 538 | HAL_StatusTypeDef HAL_FLASH_OB_Launch(void); |
| AnnaBridge | 172:65be27845400 | 539 | /** |
| AnnaBridge | 172:65be27845400 | 540 | * @} |
| AnnaBridge | 172:65be27845400 | 541 | */ |
| AnnaBridge | 172:65be27845400 | 542 | |
| AnnaBridge | 172:65be27845400 | 543 | /** @addtogroup FLASH_Exported_Functions_Group3 |
| AnnaBridge | 172:65be27845400 | 544 | * @{ |
| AnnaBridge | 172:65be27845400 | 545 | */ |
| AnnaBridge | 172:65be27845400 | 546 | /* Peripheral State functions ************************************************/ |
| AnnaBridge | 172:65be27845400 | 547 | uint32_t HAL_FLASH_GetError(void); |
| AnnaBridge | 172:65be27845400 | 548 | /** |
| AnnaBridge | 172:65be27845400 | 549 | * @} |
| AnnaBridge | 172:65be27845400 | 550 | */ |
| AnnaBridge | 172:65be27845400 | 551 | |
| AnnaBridge | 172:65be27845400 | 552 | /** |
| AnnaBridge | 172:65be27845400 | 553 | * @} |
| AnnaBridge | 172:65be27845400 | 554 | */ |
| AnnaBridge | 172:65be27845400 | 555 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 556 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 557 | /** @defgroup FLASH_Private_Variables FLASH Private Variables |
| AnnaBridge | 172:65be27845400 | 558 | * @{ |
| AnnaBridge | 172:65be27845400 | 559 | */ |
| AnnaBridge | 172:65be27845400 | 560 | extern FLASH_ProcessTypeDef pFlash; |
| AnnaBridge | 172:65be27845400 | 561 | /** |
| AnnaBridge | 172:65be27845400 | 562 | * @} |
| AnnaBridge | 172:65be27845400 | 563 | */ |
| AnnaBridge | 172:65be27845400 | 564 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 565 | /** @defgroup FLASH_Private_Constants FLASH Private Constants |
| AnnaBridge | 172:65be27845400 | 566 | * @{ |
| AnnaBridge | 172:65be27845400 | 567 | */ |
| AnnaBridge | 172:65be27845400 | 568 | |
| AnnaBridge | 172:65be27845400 | 569 | /** |
| AnnaBridge | 172:65be27845400 | 570 | * @} |
| AnnaBridge | 172:65be27845400 | 571 | */ |
| AnnaBridge | 172:65be27845400 | 572 | |
| AnnaBridge | 172:65be27845400 | 573 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 574 | /** @defgroup FLASH_Private_Macros FLASH Private Macros |
| AnnaBridge | 172:65be27845400 | 575 | * @{ |
| AnnaBridge | 172:65be27845400 | 576 | */ |
| AnnaBridge | 172:65be27845400 | 577 | |
| AnnaBridge | 172:65be27845400 | 578 | /** @defgroup FLASH_IS_FLASH_Definitions FLASH Definitions |
| AnnaBridge | 172:65be27845400 | 579 | * @{ |
| AnnaBridge | 172:65be27845400 | 580 | */ |
| AnnaBridge | 172:65be27845400 | 581 | #define IS_FLASH_TYPEPROGRAM(VALUE) ((VALUE) == FLASH_TYPEPROGRAM_FLASHWORD) |
| AnnaBridge | 172:65be27845400 | 582 | /** |
| AnnaBridge | 172:65be27845400 | 583 | * @} |
| AnnaBridge | 172:65be27845400 | 584 | */ |
| AnnaBridge | 172:65be27845400 | 585 | /** @defgroup FLASH_IS_BANK_IT_Definitions FLASH BANK IT Definitions |
| AnnaBridge | 172:65be27845400 | 586 | * @{ |
| AnnaBridge | 172:65be27845400 | 587 | */ |
| AnnaBridge | 172:65be27845400 | 588 | |
| AnnaBridge | 172:65be27845400 | 589 | #define IS_FLASH_IT_BANK1(IT) (((IT) & FLASH_IT_ALL_BANK1) == (IT)) |
| AnnaBridge | 172:65be27845400 | 590 | |
| AnnaBridge | 172:65be27845400 | 591 | #define IS_FLASH_IT_BANK2(IT) (((IT) & FLASH_IT_ALL_BANK2) == (IT)) |
| AnnaBridge | 172:65be27845400 | 592 | |
| AnnaBridge | 172:65be27845400 | 593 | /** |
| AnnaBridge | 172:65be27845400 | 594 | * @} |
| AnnaBridge | 172:65be27845400 | 595 | */ |
| AnnaBridge | 172:65be27845400 | 596 | |
| AnnaBridge | 172:65be27845400 | 597 | #define IS_FLASH_FLAG_BANK1(FLAG) (((FLAG) & FLASH_FLAG_ALL_BANK1) == (FLAG)) |
| AnnaBridge | 172:65be27845400 | 598 | |
| AnnaBridge | 172:65be27845400 | 599 | #define IS_FLASH_FLAG_BANK2(FLAG) (((FLAG) & FLASH_FLAG_ALL_BANK2) == (FLAG)) |
| AnnaBridge | 172:65be27845400 | 600 | |
| AnnaBridge | 172:65be27845400 | 601 | /** @defgroup FLASH_Address FLASH Address |
| AnnaBridge | 172:65be27845400 | 602 | * @{ |
| AnnaBridge | 172:65be27845400 | 603 | */ |
| AnnaBridge | 172:65be27845400 | 604 | |
| AnnaBridge | 172:65be27845400 | 605 | #define IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) (((ADDRESS) >= FLASH_BANK1_BASE) && ((ADDRESS) < FLASH_BANK2_BASE)) |
| AnnaBridge | 172:65be27845400 | 606 | #define IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS) (((ADDRESS) >= FLASH_BANK2_BASE ) && ((ADDRESS) <= FLASH_END)) |
| AnnaBridge | 172:65be27845400 | 607 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (IS_FLASH_PROGRAM_ADDRESS_BANK1(ADDRESS) || IS_FLASH_PROGRAM_ADDRESS_BANK2(ADDRESS)) |
| AnnaBridge | 172:65be27845400 | 608 | |
| AnnaBridge | 172:65be27845400 | 609 | #define IS_BOOT_ADDRESS(ADDRESS) ((ADDRESS) <= (0x3FFF0000U)) |
| AnnaBridge | 172:65be27845400 | 610 | |
| AnnaBridge | 172:65be27845400 | 611 | #define IS_FLASH_BANK(BANK) (((BANK) == FLASH_BANK_1) || \ |
| AnnaBridge | 172:65be27845400 | 612 | ((BANK) == FLASH_BANK_2) || \ |
| AnnaBridge | 172:65be27845400 | 613 | ((BANK) == FLASH_BANK_BOTH)) |
| AnnaBridge | 172:65be27845400 | 614 | |
| AnnaBridge | 172:65be27845400 | 615 | #define IS_FLASH_BANK_EXCLUSIVE(BANK) (((BANK) == FLASH_BANK_1) || \ |
| AnnaBridge | 172:65be27845400 | 616 | ((BANK) == FLASH_BANK_2)) |
| AnnaBridge | 172:65be27845400 | 617 | |
| AnnaBridge | 172:65be27845400 | 618 | /** |
| AnnaBridge | 172:65be27845400 | 619 | * @} |
| AnnaBridge | 172:65be27845400 | 620 | */ |
| AnnaBridge | 172:65be27845400 | 621 | |
| AnnaBridge | 172:65be27845400 | 622 | /** |
| AnnaBridge | 172:65be27845400 | 623 | * @} |
| AnnaBridge | 172:65be27845400 | 624 | */ |
| AnnaBridge | 172:65be27845400 | 625 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 172:65be27845400 | 626 | /** @defgroup FLASH_Private_Functions FLASH Private functions |
| AnnaBridge | 172:65be27845400 | 627 | * @{ |
| AnnaBridge | 172:65be27845400 | 628 | */ |
| AnnaBridge | 172:65be27845400 | 629 | HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout, uint32_t Bank); |
| AnnaBridge | 172:65be27845400 | 630 | HAL_StatusTypeDef FLASH_OB_WaitForLastOperation(uint32_t Timeout); |
| AnnaBridge | 172:65be27845400 | 631 | HAL_StatusTypeDef FLASH_CRC_WaitForLastOperation(uint32_t Timeout, uint32_t Bank); |
| AnnaBridge | 172:65be27845400 | 632 | /** |
| AnnaBridge | 172:65be27845400 | 633 | * @} |
| AnnaBridge | 172:65be27845400 | 634 | */ |
| AnnaBridge | 172:65be27845400 | 635 | |
| AnnaBridge | 172:65be27845400 | 636 | /** |
| AnnaBridge | 172:65be27845400 | 637 | * @} |
| AnnaBridge | 172:65be27845400 | 638 | */ |
| AnnaBridge | 172:65be27845400 | 639 | |
| AnnaBridge | 172:65be27845400 | 640 | /** |
| AnnaBridge | 172:65be27845400 | 641 | * @} |
| AnnaBridge | 172:65be27845400 | 642 | */ |
| AnnaBridge | 172:65be27845400 | 643 | |
| AnnaBridge | 172:65be27845400 | 644 | #ifdef __cplusplus |
| AnnaBridge | 172:65be27845400 | 645 | } |
| AnnaBridge | 172:65be27845400 | 646 | #endif |
| AnnaBridge | 172:65be27845400 | 647 | |
| AnnaBridge | 172:65be27845400 | 648 | #endif /* STM32H7xx_HAL_FLASH_H */ |
| AnnaBridge | 172:65be27845400 | 649 | |
| AnnaBridge | 172:65be27845400 | 650 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
