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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_exti.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:65be27845400 | 1 | /** |
AnnaBridge | 172:65be27845400 | 2 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 3 | * @file stm32h7xx_hal_exti.h |
AnnaBridge | 172:65be27845400 | 4 | * @author MCD Application Team |
AnnaBridge | 172:65be27845400 | 5 | * @brief Header file of EXTI HAL module. |
AnnaBridge | 172:65be27845400 | 6 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 7 | * @attention |
AnnaBridge | 172:65be27845400 | 8 | * |
AnnaBridge | 172:65be27845400 | 9 | * <h2><center>© Copyright (c) 2017 STMicroelectronics. |
AnnaBridge | 172:65be27845400 | 10 | * All rights reserved.</center></h2> |
AnnaBridge | 172:65be27845400 | 11 | * |
AnnaBridge | 172:65be27845400 | 12 | * This software component is licensed by ST under BSD 3-Clause license, |
AnnaBridge | 172:65be27845400 | 13 | * the "License"; You may not use this file except in compliance with the |
AnnaBridge | 172:65be27845400 | 14 | * License. You may obtain a copy of the License at: |
AnnaBridge | 172:65be27845400 | 15 | * opensource.org/licenses/BSD-3-Clause |
AnnaBridge | 172:65be27845400 | 16 | * |
AnnaBridge | 172:65be27845400 | 17 | ****************************************************************************** |
AnnaBridge | 172:65be27845400 | 18 | */ |
AnnaBridge | 172:65be27845400 | 19 | |
AnnaBridge | 172:65be27845400 | 20 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 21 | #ifndef STM32H7xx_HAL_EXTI_H |
AnnaBridge | 172:65be27845400 | 22 | #define STM32H7xx_HAL_EXTI_H |
AnnaBridge | 172:65be27845400 | 23 | |
AnnaBridge | 172:65be27845400 | 24 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 25 | extern "C" { |
AnnaBridge | 172:65be27845400 | 26 | #endif |
AnnaBridge | 172:65be27845400 | 27 | |
AnnaBridge | 172:65be27845400 | 28 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 29 | #include "stm32h7xx_hal_def.h" |
AnnaBridge | 172:65be27845400 | 30 | |
AnnaBridge | 172:65be27845400 | 31 | /** @addtogroup STM32H7xx_HAL_Driver |
AnnaBridge | 172:65be27845400 | 32 | * @{ |
AnnaBridge | 172:65be27845400 | 33 | */ |
AnnaBridge | 172:65be27845400 | 34 | |
AnnaBridge | 172:65be27845400 | 35 | /** @defgroup EXTI EXTI |
AnnaBridge | 172:65be27845400 | 36 | * @brief EXTI HAL module driver |
AnnaBridge | 172:65be27845400 | 37 | * @{ |
AnnaBridge | 172:65be27845400 | 38 | */ |
AnnaBridge | 172:65be27845400 | 39 | |
AnnaBridge | 172:65be27845400 | 40 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 41 | |
AnnaBridge | 172:65be27845400 | 42 | /** @defgroup EXTI_Exported_Types EXTI Exported Types |
AnnaBridge | 172:65be27845400 | 43 | * @{ |
AnnaBridge | 172:65be27845400 | 44 | */ |
AnnaBridge | 172:65be27845400 | 45 | typedef enum |
AnnaBridge | 172:65be27845400 | 46 | { |
AnnaBridge | 172:65be27845400 | 47 | HAL_EXTI_COMMON_CB_ID = 0x00U, |
AnnaBridge | 172:65be27845400 | 48 | } EXTI_CallbackIDTypeDef; |
AnnaBridge | 172:65be27845400 | 49 | |
AnnaBridge | 172:65be27845400 | 50 | |
AnnaBridge | 172:65be27845400 | 51 | /** |
AnnaBridge | 172:65be27845400 | 52 | * @brief EXTI Handle structure definition |
AnnaBridge | 172:65be27845400 | 53 | */ |
AnnaBridge | 172:65be27845400 | 54 | typedef struct |
AnnaBridge | 172:65be27845400 | 55 | { |
AnnaBridge | 172:65be27845400 | 56 | uint32_t Line; /*!< Exti line number */ |
AnnaBridge | 172:65be27845400 | 57 | void (* PendingCallback)(void); /*!< Exti pending callback */ |
AnnaBridge | 172:65be27845400 | 58 | } EXTI_HandleTypeDef; |
AnnaBridge | 172:65be27845400 | 59 | |
AnnaBridge | 172:65be27845400 | 60 | /** |
AnnaBridge | 172:65be27845400 | 61 | * @brief EXTI Configuration structure definition |
AnnaBridge | 172:65be27845400 | 62 | */ |
AnnaBridge | 172:65be27845400 | 63 | typedef struct |
AnnaBridge | 172:65be27845400 | 64 | { |
AnnaBridge | 172:65be27845400 | 65 | uint32_t Line; /*!< The Exti line to be configured. This parameter |
AnnaBridge | 172:65be27845400 | 66 | can be a value of @ref EXTI_Line */ |
AnnaBridge | 172:65be27845400 | 67 | uint32_t Mode; /*!< The Exit Mode to be configured for a core. |
AnnaBridge | 172:65be27845400 | 68 | This parameter can be a combination of @ref EXTI_Mode */ |
AnnaBridge | 172:65be27845400 | 69 | uint32_t Trigger; /*!< The Exti Trigger to be configured. This parameter |
AnnaBridge | 172:65be27845400 | 70 | can be a value of @ref EXTI_Trigger */ |
AnnaBridge | 172:65be27845400 | 71 | uint32_t GPIOSel; /*!< The Exti GPIO multiplexer selection to be configured. |
AnnaBridge | 172:65be27845400 | 72 | This parameter is only possible for line 0 to 15. It |
AnnaBridge | 172:65be27845400 | 73 | can be a value of @ref EXTI_GPIOSel */ |
AnnaBridge | 172:65be27845400 | 74 | |
AnnaBridge | 172:65be27845400 | 75 | uint32_t PendClearSource; /*!< Specifies the event pending clear source for D3/SRD |
AnnaBridge | 172:65be27845400 | 76 | domain. This parameter can be a value of @ref |
AnnaBridge | 172:65be27845400 | 77 | EXTI_PendClear_Source */ |
AnnaBridge | 172:65be27845400 | 78 | |
AnnaBridge | 172:65be27845400 | 79 | } EXTI_ConfigTypeDef; |
AnnaBridge | 172:65be27845400 | 80 | |
AnnaBridge | 172:65be27845400 | 81 | /** |
AnnaBridge | 172:65be27845400 | 82 | * @} |
AnnaBridge | 172:65be27845400 | 83 | */ |
AnnaBridge | 172:65be27845400 | 84 | |
AnnaBridge | 172:65be27845400 | 85 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 86 | /** @defgroup EXTI_Exported_Constants EXTI Exported Constants |
AnnaBridge | 172:65be27845400 | 87 | * @{ |
AnnaBridge | 172:65be27845400 | 88 | */ |
AnnaBridge | 172:65be27845400 | 89 | |
AnnaBridge | 172:65be27845400 | 90 | /** @defgroup EXTI_Line EXTI Line |
AnnaBridge | 172:65be27845400 | 91 | * @{ |
AnnaBridge | 172:65be27845400 | 92 | */ |
AnnaBridge | 172:65be27845400 | 93 | #define EXTI_LINE_0 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x00U) |
AnnaBridge | 172:65be27845400 | 94 | #define EXTI_LINE_1 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x01U) |
AnnaBridge | 172:65be27845400 | 95 | #define EXTI_LINE_2 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x02U) |
AnnaBridge | 172:65be27845400 | 96 | #define EXTI_LINE_3 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x03U) |
AnnaBridge | 172:65be27845400 | 97 | #define EXTI_LINE_4 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x04U) |
AnnaBridge | 172:65be27845400 | 98 | #define EXTI_LINE_5 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x05U) |
AnnaBridge | 172:65be27845400 | 99 | #define EXTI_LINE_6 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x06U) |
AnnaBridge | 172:65be27845400 | 100 | #define EXTI_LINE_7 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x07U) |
AnnaBridge | 172:65be27845400 | 101 | #define EXTI_LINE_8 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x08U) |
AnnaBridge | 172:65be27845400 | 102 | #define EXTI_LINE_9 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x09U) |
AnnaBridge | 172:65be27845400 | 103 | #define EXTI_LINE_10 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0AU) |
AnnaBridge | 172:65be27845400 | 104 | #define EXTI_LINE_11 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0BU) |
AnnaBridge | 172:65be27845400 | 105 | #define EXTI_LINE_12 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0CU) |
AnnaBridge | 172:65be27845400 | 106 | #define EXTI_LINE_13 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0DU) |
AnnaBridge | 172:65be27845400 | 107 | #define EXTI_LINE_14 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0EU) |
AnnaBridge | 172:65be27845400 | 108 | #define EXTI_LINE_15 (EXTI_GPIO | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x0FU) |
AnnaBridge | 172:65be27845400 | 109 | #define EXTI_LINE_16 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x10U) |
AnnaBridge | 172:65be27845400 | 110 | #define EXTI_LINE_17 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x11U) |
AnnaBridge | 172:65be27845400 | 111 | #define EXTI_LINE_18 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x12U) |
AnnaBridge | 172:65be27845400 | 112 | #define EXTI_LINE_19 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x13U) |
AnnaBridge | 172:65be27845400 | 113 | #define EXTI_LINE_20 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x14U) |
AnnaBridge | 172:65be27845400 | 114 | #define EXTI_LINE_21 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x15U) |
AnnaBridge | 172:65be27845400 | 115 | #define EXTI_LINE_22 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x16U) |
AnnaBridge | 172:65be27845400 | 116 | #define EXTI_LINE_23 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x17U) |
AnnaBridge | 172:65be27845400 | 117 | #define EXTI_LINE_24 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x18U) |
AnnaBridge | 172:65be27845400 | 118 | #define EXTI_LINE_25 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL | 0x19U) |
AnnaBridge | 172:65be27845400 | 119 | #define EXTI_LINE_26 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU) |
AnnaBridge | 172:65be27845400 | 120 | #define EXTI_LINE_27 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU) |
AnnaBridge | 172:65be27845400 | 121 | #define EXTI_LINE_28 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1CU) |
AnnaBridge | 172:65be27845400 | 122 | #define EXTI_LINE_29 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1DU) |
AnnaBridge | 172:65be27845400 | 123 | #define EXTI_LINE_30 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1EU) |
AnnaBridge | 172:65be27845400 | 124 | #define EXTI_LINE_31 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG1 | EXTI_TARGET_MSK_ALL_CPU | 0x1FU) |
AnnaBridge | 172:65be27845400 | 125 | #define EXTI_LINE_32 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x00U) |
AnnaBridge | 172:65be27845400 | 126 | #define EXTI_LINE_33 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x01U) |
AnnaBridge | 172:65be27845400 | 127 | #define EXTI_LINE_34 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x02U) |
AnnaBridge | 172:65be27845400 | 128 | #define EXTI_LINE_35 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x03U) |
AnnaBridge | 172:65be27845400 | 129 | #define EXTI_LINE_36 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x04U) |
AnnaBridge | 172:65be27845400 | 130 | #define EXTI_LINE_37 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x05U) |
AnnaBridge | 172:65be27845400 | 131 | #define EXTI_LINE_38 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x06U) |
AnnaBridge | 172:65be27845400 | 132 | #define EXTI_LINE_39 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x07U) |
AnnaBridge | 172:65be27845400 | 133 | #define EXTI_LINE_40 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x08U) |
AnnaBridge | 172:65be27845400 | 134 | #define EXTI_LINE_41 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x09U) |
AnnaBridge | 172:65be27845400 | 135 | #define EXTI_LINE_42 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0AU) |
AnnaBridge | 172:65be27845400 | 136 | #define EXTI_LINE_43 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0BU) |
AnnaBridge | 172:65be27845400 | 137 | #define EXTI_LINE_44 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0CU) |
AnnaBridge | 172:65be27845400 | 138 | #define EXTI_LINE_45 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_NONE | 0x0DU) |
AnnaBridge | 172:65be27845400 | 139 | #define EXTI_LINE_46 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0EU) |
AnnaBridge | 172:65be27845400 | 140 | #define EXTI_LINE_47 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x0FU) |
AnnaBridge | 172:65be27845400 | 141 | #define EXTI_LINE_48 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x10U) |
AnnaBridge | 172:65be27845400 | 142 | #define EXTI_LINE_49 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x11U) |
AnnaBridge | 172:65be27845400 | 143 | #define EXTI_LINE_50 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x12U) |
AnnaBridge | 172:65be27845400 | 144 | #define EXTI_LINE_51 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x13U) |
AnnaBridge | 172:65be27845400 | 145 | #define EXTI_LINE_52 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x14U) |
AnnaBridge | 172:65be27845400 | 146 | #define EXTI_LINE_53 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL | 0x15U) |
AnnaBridge | 172:65be27845400 | 147 | #define EXTI_LINE_54 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x16U) |
AnnaBridge | 172:65be27845400 | 148 | #define EXTI_LINE_55 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x17U) |
AnnaBridge | 172:65be27845400 | 149 | #define EXTI_LINE_56 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x18U) |
AnnaBridge | 172:65be27845400 | 150 | #define EXTI_LINE_57 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x19U) |
AnnaBridge | 172:65be27845400 | 151 | #define EXTI_LINE_58 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1AU) |
AnnaBridge | 172:65be27845400 | 152 | #define EXTI_LINE_59 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1BU) |
AnnaBridge | 172:65be27845400 | 153 | #define EXTI_LINE_60 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1CU) |
AnnaBridge | 172:65be27845400 | 154 | #define EXTI_LINE_61 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1DU) |
AnnaBridge | 172:65be27845400 | 155 | #define EXTI_LINE_62 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1EU) |
AnnaBridge | 172:65be27845400 | 156 | #define EXTI_LINE_63 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG2 | EXTI_TARGET_MSK_ALL_CPU | 0x1FU) |
AnnaBridge | 172:65be27845400 | 157 | #define EXTI_LINE_64 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x00U) |
AnnaBridge | 172:65be27845400 | 158 | #define EXTI_LINE_65 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x01U) |
AnnaBridge | 172:65be27845400 | 159 | #define EXTI_LINE_66 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x02U) |
AnnaBridge | 172:65be27845400 | 160 | #define EXTI_LINE_67 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x03U) |
AnnaBridge | 172:65be27845400 | 161 | #define EXTI_LINE_68 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x04U) |
AnnaBridge | 172:65be27845400 | 162 | #define EXTI_LINE_69 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x05U) |
AnnaBridge | 172:65be27845400 | 163 | #define EXTI_LINE_70 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x06U) |
AnnaBridge | 172:65be27845400 | 164 | #define EXTI_LINE_71 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x07U) |
AnnaBridge | 172:65be27845400 | 165 | #define EXTI_LINE_72 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x08U) |
AnnaBridge | 172:65be27845400 | 166 | #define EXTI_LINE_73 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x09U) |
AnnaBridge | 172:65be27845400 | 167 | #define EXTI_LINE_74 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0AU) |
AnnaBridge | 172:65be27845400 | 168 | #define EXTI_LINE_75 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0BU) |
AnnaBridge | 172:65be27845400 | 169 | #define EXTI_LINE_76 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x0CU) |
AnnaBridge | 172:65be27845400 | 170 | #define EXTI_LINE_77 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x0DU) |
AnnaBridge | 172:65be27845400 | 171 | |
AnnaBridge | 172:65be27845400 | 172 | #define EXTI_LINE_78 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x0EU) |
AnnaBridge | 172:65be27845400 | 173 | |
AnnaBridge | 172:65be27845400 | 174 | #define EXTI_LINE_79 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x0FU) |
AnnaBridge | 172:65be27845400 | 175 | |
AnnaBridge | 172:65be27845400 | 176 | #define EXTI_LINE_80 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x10U) |
AnnaBridge | 172:65be27845400 | 177 | |
AnnaBridge | 172:65be27845400 | 178 | #define EXTI_LINE_81 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x11U) |
AnnaBridge | 172:65be27845400 | 179 | |
AnnaBridge | 172:65be27845400 | 180 | #define EXTI_LINE_82 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x12U) |
AnnaBridge | 172:65be27845400 | 181 | |
AnnaBridge | 172:65be27845400 | 182 | #define EXTI_LINE_83 (EXTI_RESERVED | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_NONE| 0x13U) |
AnnaBridge | 172:65be27845400 | 183 | #define EXTI_LINE_84 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_CPU1| 0x14U) |
AnnaBridge | 172:65be27845400 | 184 | #define EXTI_LINE_85 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x15U) |
AnnaBridge | 172:65be27845400 | 185 | #define EXTI_LINE_86 (EXTI_CONFIG | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x16U) |
AnnaBridge | 172:65be27845400 | 186 | #define EXTI_LINE_87 (EXTI_DIRECT | EXTI_EVENT | EXTI_REG3 | EXTI_TARGET_MSK_ALL_CPU | 0x17U) |
AnnaBridge | 172:65be27845400 | 187 | |
AnnaBridge | 172:65be27845400 | 188 | /** |
AnnaBridge | 172:65be27845400 | 189 | * @} |
AnnaBridge | 172:65be27845400 | 190 | */ |
AnnaBridge | 172:65be27845400 | 191 | |
AnnaBridge | 172:65be27845400 | 192 | /** @defgroup EXTI_Mode EXTI Mode |
AnnaBridge | 172:65be27845400 | 193 | * @{ |
AnnaBridge | 172:65be27845400 | 194 | */ |
AnnaBridge | 172:65be27845400 | 195 | #define EXTI_MODE_NONE 0x00000000U |
AnnaBridge | 172:65be27845400 | 196 | #define EXTI_MODE_INTERRUPT 0x00000001U |
AnnaBridge | 172:65be27845400 | 197 | #define EXTI_MODE_EVENT 0x00000002U |
AnnaBridge | 172:65be27845400 | 198 | /** |
AnnaBridge | 172:65be27845400 | 199 | * @} |
AnnaBridge | 172:65be27845400 | 200 | */ |
AnnaBridge | 172:65be27845400 | 201 | |
AnnaBridge | 172:65be27845400 | 202 | /** @defgroup EXTI_Trigger EXTI Trigger |
AnnaBridge | 172:65be27845400 | 203 | * @{ |
AnnaBridge | 172:65be27845400 | 204 | */ |
AnnaBridge | 172:65be27845400 | 205 | #define EXTI_TRIGGER_NONE 0x00000000U |
AnnaBridge | 172:65be27845400 | 206 | #define EXTI_TRIGGER_RISING 0x00000001U |
AnnaBridge | 172:65be27845400 | 207 | #define EXTI_TRIGGER_FALLING 0x00000002U |
AnnaBridge | 172:65be27845400 | 208 | #define EXTI_TRIGGER_RISING_FALLING (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING) |
AnnaBridge | 172:65be27845400 | 209 | /** |
AnnaBridge | 172:65be27845400 | 210 | * @} |
AnnaBridge | 172:65be27845400 | 211 | */ |
AnnaBridge | 172:65be27845400 | 212 | |
AnnaBridge | 172:65be27845400 | 213 | /** @defgroup EXTI_GPIOSel EXTI GPIOSel |
AnnaBridge | 172:65be27845400 | 214 | * @brief |
AnnaBridge | 172:65be27845400 | 215 | * @{ |
AnnaBridge | 172:65be27845400 | 216 | */ |
AnnaBridge | 172:65be27845400 | 217 | #define EXTI_GPIOA 0x00000000U |
AnnaBridge | 172:65be27845400 | 218 | #define EXTI_GPIOB 0x00000001U |
AnnaBridge | 172:65be27845400 | 219 | #define EXTI_GPIOC 0x00000002U |
AnnaBridge | 172:65be27845400 | 220 | #define EXTI_GPIOD 0x00000003U |
AnnaBridge | 172:65be27845400 | 221 | #define EXTI_GPIOE 0x00000004U |
AnnaBridge | 172:65be27845400 | 222 | #define EXTI_GPIOF 0x00000005U |
AnnaBridge | 172:65be27845400 | 223 | #define EXTI_GPIOG 0x00000006U |
AnnaBridge | 172:65be27845400 | 224 | #define EXTI_GPIOH 0x00000007U |
AnnaBridge | 172:65be27845400 | 225 | #define EXTI_GPIOI 0x00000008U |
AnnaBridge | 172:65be27845400 | 226 | #define EXTI_GPIOJ 0x00000009U |
AnnaBridge | 172:65be27845400 | 227 | #define EXTI_GPIOK 0x0000000AU |
AnnaBridge | 172:65be27845400 | 228 | |
AnnaBridge | 172:65be27845400 | 229 | /** |
AnnaBridge | 172:65be27845400 | 230 | * @} |
AnnaBridge | 172:65be27845400 | 231 | */ |
AnnaBridge | 172:65be27845400 | 232 | |
AnnaBridge | 172:65be27845400 | 233 | /** @defgroup EXTI_PendClear_Source EXTI PendClear Source |
AnnaBridge | 172:65be27845400 | 234 | * @brief |
AnnaBridge | 172:65be27845400 | 235 | * @{ |
AnnaBridge | 172:65be27845400 | 236 | */ |
AnnaBridge | 172:65be27845400 | 237 | #define EXTI_D3_PENDCLR_SRC_NONE 0x00000000U /*!< No D3 domain pendclear source , PMRx register to be set to zero */ |
AnnaBridge | 172:65be27845400 | 238 | #define EXTI_D3_PENDCLR_SRC_DMACH6 0x00000001U /*!< DMA ch6 event selected as D3 domain pendclear source, PMRx register to be set to 1 */ |
AnnaBridge | 172:65be27845400 | 239 | #define EXTI_D3_PENDCLR_SRC_DMACH7 0x00000002U /*!< DMA ch7 event selected as D3 domain pendclear source, PMRx register to be set to 1*/ |
AnnaBridge | 172:65be27845400 | 240 | #define EXTI_D3_PENDCLR_SRC_LPTIM4 0x00000003U /*!< LPTIM4 out selected as D3 domain pendclear source, PMRx register to be set to 1 */ |
AnnaBridge | 172:65be27845400 | 241 | #define EXTI_D3_PENDCLR_SRC_LPTIM5 0x00000004U /*!< LPTIM4 out selected as D3 domain pendclear source, PMRx register to be set to 1 */ |
AnnaBridge | 172:65be27845400 | 242 | /** |
AnnaBridge | 172:65be27845400 | 243 | * @} |
AnnaBridge | 172:65be27845400 | 244 | */ |
AnnaBridge | 172:65be27845400 | 245 | |
AnnaBridge | 172:65be27845400 | 246 | /** |
AnnaBridge | 172:65be27845400 | 247 | * @} |
AnnaBridge | 172:65be27845400 | 248 | */ |
AnnaBridge | 172:65be27845400 | 249 | |
AnnaBridge | 172:65be27845400 | 250 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 251 | /** @defgroup EXTI_Exported_Macros EXTI Exported Macros |
AnnaBridge | 172:65be27845400 | 252 | * @{ |
AnnaBridge | 172:65be27845400 | 253 | */ |
AnnaBridge | 172:65be27845400 | 254 | |
AnnaBridge | 172:65be27845400 | 255 | /** |
AnnaBridge | 172:65be27845400 | 256 | * @} |
AnnaBridge | 172:65be27845400 | 257 | */ |
AnnaBridge | 172:65be27845400 | 258 | |
AnnaBridge | 172:65be27845400 | 259 | /* Private constants --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 260 | /** @defgroup EXTI_Private_Constants EXTI Private Constants |
AnnaBridge | 172:65be27845400 | 261 | * @{ |
AnnaBridge | 172:65be27845400 | 262 | */ |
AnnaBridge | 172:65be27845400 | 263 | /** |
AnnaBridge | 172:65be27845400 | 264 | * @brief EXTI Line property definition |
AnnaBridge | 172:65be27845400 | 265 | */ |
AnnaBridge | 172:65be27845400 | 266 | #define EXTI_PROPERTY_SHIFT 24U |
AnnaBridge | 172:65be27845400 | 267 | #define EXTI_DIRECT (0x01UL << EXTI_PROPERTY_SHIFT) |
AnnaBridge | 172:65be27845400 | 268 | #define EXTI_CONFIG (0x02UL << EXTI_PROPERTY_SHIFT) |
AnnaBridge | 172:65be27845400 | 269 | #define EXTI_GPIO ((0x04UL << EXTI_PROPERTY_SHIFT) | EXTI_CONFIG) |
AnnaBridge | 172:65be27845400 | 270 | #define EXTI_RESERVED (0x08UL << EXTI_PROPERTY_SHIFT) |
AnnaBridge | 172:65be27845400 | 271 | #define EXTI_PROPERTY_MASK (EXTI_DIRECT | EXTI_CONFIG | EXTI_GPIO) |
AnnaBridge | 172:65be27845400 | 272 | |
AnnaBridge | 172:65be27845400 | 273 | /** |
AnnaBridge | 172:65be27845400 | 274 | * @brief EXTI Event presence definition |
AnnaBridge | 172:65be27845400 | 275 | */ |
AnnaBridge | 172:65be27845400 | 276 | #define EXTI_EVENT_PRESENCE_SHIFT 28U |
AnnaBridge | 172:65be27845400 | 277 | #define EXTI_EVENT (0x01UL << EXTI_EVENT_PRESENCE_SHIFT) |
AnnaBridge | 172:65be27845400 | 278 | #define EXTI_EVENT_PRESENCE_MASK (EXTI_EVENT) |
AnnaBridge | 172:65be27845400 | 279 | |
AnnaBridge | 172:65be27845400 | 280 | /** |
AnnaBridge | 172:65be27845400 | 281 | * @brief EXTI Register and bit usage |
AnnaBridge | 172:65be27845400 | 282 | */ |
AnnaBridge | 172:65be27845400 | 283 | #define EXTI_REG_SHIFT 16U |
AnnaBridge | 172:65be27845400 | 284 | #define EXTI_REG1 (0x00UL << EXTI_REG_SHIFT) |
AnnaBridge | 172:65be27845400 | 285 | #define EXTI_REG2 (0x01UL << EXTI_REG_SHIFT) |
AnnaBridge | 172:65be27845400 | 286 | #define EXTI_REG3 (0x02UL << EXTI_REG_SHIFT) |
AnnaBridge | 172:65be27845400 | 287 | #define EXTI_REG_MASK (EXTI_REG1 | EXTI_REG2 | EXTI_REG3) |
AnnaBridge | 172:65be27845400 | 288 | #define EXTI_PIN_MASK 0x0000001FUL |
AnnaBridge | 172:65be27845400 | 289 | |
AnnaBridge | 172:65be27845400 | 290 | /** |
AnnaBridge | 172:65be27845400 | 291 | * @brief EXTI Target and bit usage |
AnnaBridge | 172:65be27845400 | 292 | */ |
AnnaBridge | 172:65be27845400 | 293 | #define EXTI_TARGET_SHIFT 20U |
AnnaBridge | 172:65be27845400 | 294 | #define EXTI_TARGET_MSK_NONE (0x00UL << EXTI_TARGET_SHIFT) |
AnnaBridge | 172:65be27845400 | 295 | #define EXTI_TARGET_MSK_D3SRD (0x01UL << EXTI_TARGET_SHIFT) |
AnnaBridge | 172:65be27845400 | 296 | #define EXTI_TARGET_MSK_CPU1 (0x02UL << EXTI_TARGET_SHIFT) |
AnnaBridge | 172:65be27845400 | 297 | #define EXTI_TARGET_MASK (EXTI_TARGET_MSK_D3SRD | EXTI_TARGET_MSK_CPU1) |
AnnaBridge | 172:65be27845400 | 298 | #define EXTI_TARGET_MSK_ALL_CPU EXTI_TARGET_MSK_CPU1 |
AnnaBridge | 172:65be27845400 | 299 | #define EXTI_TARGET_MSK_ALL EXTI_TARGET_MASK |
AnnaBridge | 172:65be27845400 | 300 | |
AnnaBridge | 172:65be27845400 | 301 | /** |
AnnaBridge | 172:65be27845400 | 302 | * @brief EXTI Mask for interrupt & event mode |
AnnaBridge | 172:65be27845400 | 303 | */ |
AnnaBridge | 172:65be27845400 | 304 | #define EXTI_MODE_MASK (EXTI_MODE_EVENT | EXTI_MODE_INTERRUPT) |
AnnaBridge | 172:65be27845400 | 305 | |
AnnaBridge | 172:65be27845400 | 306 | /** |
AnnaBridge | 172:65be27845400 | 307 | * @brief EXTI Mask for trigger possibilities |
AnnaBridge | 172:65be27845400 | 308 | */ |
AnnaBridge | 172:65be27845400 | 309 | #define EXTI_TRIGGER_MASK (EXTI_TRIGGER_RISING | EXTI_TRIGGER_FALLING) |
AnnaBridge | 172:65be27845400 | 310 | |
AnnaBridge | 172:65be27845400 | 311 | /** |
AnnaBridge | 172:65be27845400 | 312 | * @brief EXTI Line number |
AnnaBridge | 172:65be27845400 | 313 | */ |
AnnaBridge | 172:65be27845400 | 314 | #define EXTI_LINE_NB 88UL |
AnnaBridge | 172:65be27845400 | 315 | |
AnnaBridge | 172:65be27845400 | 316 | /** |
AnnaBridge | 172:65be27845400 | 317 | * @} |
AnnaBridge | 172:65be27845400 | 318 | */ |
AnnaBridge | 172:65be27845400 | 319 | |
AnnaBridge | 172:65be27845400 | 320 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 321 | /** @defgroup EXTI_Private_Macros EXTI Private Macros |
AnnaBridge | 172:65be27845400 | 322 | * @{ |
AnnaBridge | 172:65be27845400 | 323 | */ |
AnnaBridge | 172:65be27845400 | 324 | #define IS_EXTI_PROPERTY(__LINE__) ((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \ |
AnnaBridge | 172:65be27845400 | 325 | (((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \ |
AnnaBridge | 172:65be27845400 | 326 | (((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) |
AnnaBridge | 172:65be27845400 | 327 | #define IS_EXTI_TARGET(__LINE__) ((((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_CPU1) || \ |
AnnaBridge | 172:65be27845400 | 328 | (((__LINE__) & EXTI_TARGET_MASK) == EXTI_TARGET_MSK_ALL)) |
AnnaBridge | 172:65be27845400 | 329 | |
AnnaBridge | 172:65be27845400 | 330 | #define IS_EXTI_LINE(__LINE__) ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_EVENT_PRESENCE_MASK | EXTI_REG_MASK | EXTI_PIN_MASK | EXTI_TARGET_MASK)) == 0x00UL) && \ |
AnnaBridge | 172:65be27845400 | 331 | IS_EXTI_PROPERTY(__LINE__) && IS_EXTI_TARGET(__LINE__) && \ |
AnnaBridge | 172:65be27845400 | 332 | (((__LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \ |
AnnaBridge | 172:65be27845400 | 333 | (((EXTI_LINE_NB / 32UL) << EXTI_REG_SHIFT) | (EXTI_LINE_NB % 32UL)))) |
AnnaBridge | 172:65be27845400 | 334 | |
AnnaBridge | 172:65be27845400 | 335 | #define IS_EXTI_MODE(__MODE__) (((__MODE__) & ~EXTI_MODE_MASK) == 0x00UL) |
AnnaBridge | 172:65be27845400 | 336 | |
AnnaBridge | 172:65be27845400 | 337 | #define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00UL) |
AnnaBridge | 172:65be27845400 | 338 | |
AnnaBridge | 172:65be27845400 | 339 | #define IS_EXTI_PENDING_EDGE(__LINE__) (((__LINE__) == EXTI_TRIGGER_RISING) || \ |
AnnaBridge | 172:65be27845400 | 340 | ((__LINE__) == EXTI_TRIGGER_FALLING)|| \ |
AnnaBridge | 172:65be27845400 | 341 | ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)) |
AnnaBridge | 172:65be27845400 | 342 | |
AnnaBridge | 172:65be27845400 | 343 | #define IS_EXTI_CONFIG_LINE(__LINE__) (((__LINE__) & EXTI_CONFIG) != 0x00UL) |
AnnaBridge | 172:65be27845400 | 344 | |
AnnaBridge | 172:65be27845400 | 345 | #define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \ |
AnnaBridge | 172:65be27845400 | 346 | ((__PORT__) == EXTI_GPIOB) || \ |
AnnaBridge | 172:65be27845400 | 347 | ((__PORT__) == EXTI_GPIOC) || \ |
AnnaBridge | 172:65be27845400 | 348 | ((__PORT__) == EXTI_GPIOD) || \ |
AnnaBridge | 172:65be27845400 | 349 | ((__PORT__) == EXTI_GPIOE) || \ |
AnnaBridge | 172:65be27845400 | 350 | ((__PORT__) == EXTI_GPIOF) || \ |
AnnaBridge | 172:65be27845400 | 351 | ((__PORT__) == EXTI_GPIOG) || \ |
AnnaBridge | 172:65be27845400 | 352 | ((__PORT__) == EXTI_GPIOH) || \ |
AnnaBridge | 172:65be27845400 | 353 | ((__PORT__) == EXTI_GPIOI) || \ |
AnnaBridge | 172:65be27845400 | 354 | ((__PORT__) == EXTI_GPIOJ) || \ |
AnnaBridge | 172:65be27845400 | 355 | ((__PORT__) == EXTI_GPIOK)) |
AnnaBridge | 172:65be27845400 | 356 | |
AnnaBridge | 172:65be27845400 | 357 | #define IS_EXTI_GPIO_PIN(__PIN__) ((__PIN__) < 16UL) |
AnnaBridge | 172:65be27845400 | 358 | |
AnnaBridge | 172:65be27845400 | 359 | #define IS_EXTI_D3_PENDCLR_SRC(__SRC__) (((__SRC__) == EXTI_D3_PENDCLR_SRC_NONE) || \ |
AnnaBridge | 172:65be27845400 | 360 | ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH6) || \ |
AnnaBridge | 172:65be27845400 | 361 | ((__SRC__) == EXTI_D3_PENDCLR_SRC_DMACH7) || \ |
AnnaBridge | 172:65be27845400 | 362 | ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM4) || \ |
AnnaBridge | 172:65be27845400 | 363 | ((__SRC__) == EXTI_D3_PENDCLR_SRC_LPTIM5)) |
AnnaBridge | 172:65be27845400 | 364 | |
AnnaBridge | 172:65be27845400 | 365 | /** |
AnnaBridge | 172:65be27845400 | 366 | * @} |
AnnaBridge | 172:65be27845400 | 367 | */ |
AnnaBridge | 172:65be27845400 | 368 | |
AnnaBridge | 172:65be27845400 | 369 | |
AnnaBridge | 172:65be27845400 | 370 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 172:65be27845400 | 371 | /** @defgroup EXTI_Exported_Functions EXTI Exported Functions |
AnnaBridge | 172:65be27845400 | 372 | * @brief EXTI Exported Functions |
AnnaBridge | 172:65be27845400 | 373 | * @{ |
AnnaBridge | 172:65be27845400 | 374 | */ |
AnnaBridge | 172:65be27845400 | 375 | |
AnnaBridge | 172:65be27845400 | 376 | /** @defgroup EXTI_Exported_Functions_Group1 Configuration functions |
AnnaBridge | 172:65be27845400 | 377 | * @brief Configuration functions |
AnnaBridge | 172:65be27845400 | 378 | * @{ |
AnnaBridge | 172:65be27845400 | 379 | */ |
AnnaBridge | 172:65be27845400 | 380 | /* Configuration functions ****************************************************/ |
AnnaBridge | 172:65be27845400 | 381 | HAL_StatusTypeDef HAL_EXTI_SetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig); |
AnnaBridge | 172:65be27845400 | 382 | HAL_StatusTypeDef HAL_EXTI_GetConfigLine(EXTI_HandleTypeDef *hexti, EXTI_ConfigTypeDef *pExtiConfig); |
AnnaBridge | 172:65be27845400 | 383 | HAL_StatusTypeDef HAL_EXTI_ClearConfigLine(EXTI_HandleTypeDef *hexti); |
AnnaBridge | 172:65be27845400 | 384 | HAL_StatusTypeDef HAL_EXTI_RegisterCallback(EXTI_HandleTypeDef *hexti, EXTI_CallbackIDTypeDef CallbackID, void (*pPendingCbfn)(void)); |
AnnaBridge | 172:65be27845400 | 385 | HAL_StatusTypeDef HAL_EXTI_GetHandle(EXTI_HandleTypeDef *hexti, uint32_t ExtiLine); |
AnnaBridge | 172:65be27845400 | 386 | /** |
AnnaBridge | 172:65be27845400 | 387 | * @} |
AnnaBridge | 172:65be27845400 | 388 | */ |
AnnaBridge | 172:65be27845400 | 389 | |
AnnaBridge | 172:65be27845400 | 390 | /** @defgroup EXTI_Exported_Functions_Group2 IO operation functions |
AnnaBridge | 172:65be27845400 | 391 | * @brief IO operation functions |
AnnaBridge | 172:65be27845400 | 392 | * @{ |
AnnaBridge | 172:65be27845400 | 393 | */ |
AnnaBridge | 172:65be27845400 | 394 | /* IO operation functions *****************************************************/ |
AnnaBridge | 172:65be27845400 | 395 | void HAL_EXTI_IRQHandler(EXTI_HandleTypeDef *hexti); |
AnnaBridge | 172:65be27845400 | 396 | uint32_t HAL_EXTI_GetPending(EXTI_HandleTypeDef *hexti, uint32_t Edge); |
AnnaBridge | 172:65be27845400 | 397 | void HAL_EXTI_ClearPending(EXTI_HandleTypeDef *hexti, uint32_t Edge); |
AnnaBridge | 172:65be27845400 | 398 | void HAL_EXTI_GenerateSWI(EXTI_HandleTypeDef *hexti); |
AnnaBridge | 172:65be27845400 | 399 | |
AnnaBridge | 172:65be27845400 | 400 | /** |
AnnaBridge | 172:65be27845400 | 401 | * @} |
AnnaBridge | 172:65be27845400 | 402 | */ |
AnnaBridge | 172:65be27845400 | 403 | |
AnnaBridge | 172:65be27845400 | 404 | /** |
AnnaBridge | 172:65be27845400 | 405 | * @} |
AnnaBridge | 172:65be27845400 | 406 | */ |
AnnaBridge | 172:65be27845400 | 407 | |
AnnaBridge | 172:65be27845400 | 408 | /** |
AnnaBridge | 172:65be27845400 | 409 | * @} |
AnnaBridge | 172:65be27845400 | 410 | */ |
AnnaBridge | 172:65be27845400 | 411 | |
AnnaBridge | 172:65be27845400 | 412 | /** |
AnnaBridge | 172:65be27845400 | 413 | * @} |
AnnaBridge | 172:65be27845400 | 414 | */ |
AnnaBridge | 172:65be27845400 | 415 | |
AnnaBridge | 172:65be27845400 | 416 | #ifdef __cplusplus |
AnnaBridge | 172:65be27845400 | 417 | } |
AnnaBridge | 172:65be27845400 | 418 | #endif |
AnnaBridge | 172:65be27845400 | 419 | |
AnnaBridge | 172:65be27845400 | 420 | #endif /* STM32H7xx_HAL_EXTI_H */ |
AnnaBridge | 172:65be27845400 | 421 | |
AnnaBridge | 172:65be27845400 | 422 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |