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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_dma_ex.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32h7xx_hal_dma_ex.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of DMA HAL extension module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics.
AnnaBridge 172:65be27845400 10 * All rights reserved.</center></h2>
AnnaBridge 172:65be27845400 11 *
AnnaBridge 172:65be27845400 12 * This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge 172:65be27845400 13 * the "License"; You may not use this file except in compliance with the
AnnaBridge 172:65be27845400 14 * License. You may obtain a copy of the License at:
AnnaBridge 172:65be27845400 15 * opensource.org/licenses/BSD-3-Clause
AnnaBridge 172:65be27845400 16 *
AnnaBridge 172:65be27845400 17 ******************************************************************************
AnnaBridge 172:65be27845400 18 */
AnnaBridge 172:65be27845400 19
AnnaBridge 172:65be27845400 20 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 21 #ifndef STM32H7xx_HAL_DMA_EX_H
AnnaBridge 172:65be27845400 22 #define STM32H7xx_HAL_DMA_EX_H
AnnaBridge 172:65be27845400 23
AnnaBridge 172:65be27845400 24 #ifdef __cplusplus
AnnaBridge 172:65be27845400 25 extern "C" {
AnnaBridge 172:65be27845400 26 #endif
AnnaBridge 172:65be27845400 27
AnnaBridge 172:65be27845400 28 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 29 #include "stm32h7xx_hal_def.h"
AnnaBridge 172:65be27845400 30
AnnaBridge 172:65be27845400 31 /** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge 172:65be27845400 32 * @{
AnnaBridge 172:65be27845400 33 */
AnnaBridge 172:65be27845400 34
AnnaBridge 172:65be27845400 35 /** @addtogroup DMAEx
AnnaBridge 172:65be27845400 36 * @{
AnnaBridge 172:65be27845400 37 */
AnnaBridge 172:65be27845400 38
AnnaBridge 172:65be27845400 39 /* Exported types ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 40 /** @defgroup DMAEx_Exported_Types DMAEx Exported Types
AnnaBridge 172:65be27845400 41 * @brief DMAEx Exported types
AnnaBridge 172:65be27845400 42 * @{
AnnaBridge 172:65be27845400 43 */
AnnaBridge 172:65be27845400 44
AnnaBridge 172:65be27845400 45 /**
AnnaBridge 172:65be27845400 46 * @brief HAL DMA Memory definition
AnnaBridge 172:65be27845400 47 */
AnnaBridge 172:65be27845400 48 typedef enum
AnnaBridge 172:65be27845400 49 {
AnnaBridge 172:65be27845400 50 MEMORY0 = 0x00U, /*!< Memory 0 */
AnnaBridge 172:65be27845400 51 MEMORY1 = 0x01U, /*!< Memory 1 */
AnnaBridge 172:65be27845400 52
AnnaBridge 172:65be27845400 53 }HAL_DMA_MemoryTypeDef;
AnnaBridge 172:65be27845400 54
AnnaBridge 172:65be27845400 55 /**
AnnaBridge 172:65be27845400 56 * @brief HAL DMAMUX Synchronization configuration structure definition
AnnaBridge 172:65be27845400 57 */
AnnaBridge 172:65be27845400 58 typedef struct
AnnaBridge 172:65be27845400 59 {
AnnaBridge 172:65be27845400 60 uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode.
AnnaBridge 172:65be27845400 61 This parameter can be a value of @ref DMAEx_MUX_SyncSignalID_selection */
AnnaBridge 172:65be27845400 62
AnnaBridge 172:65be27845400 63 uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized.
AnnaBridge 172:65be27845400 64 This parameter can be a value of @ref DMAEx_MUX_SyncPolarity_selection */
AnnaBridge 172:65be27845400 65
AnnaBridge 172:65be27845400 66 FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled
AnnaBridge 172:65be27845400 67 This parameter can take the value ENABLE or DISABLE*/
AnnaBridge 172:65be27845400 68
AnnaBridge 172:65be27845400 69
AnnaBridge 172:65be27845400 70 FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached.
AnnaBridge 172:65be27845400 71 This parameter can take the value ENABLE or DISABLE */
AnnaBridge 172:65be27845400 72
AnnaBridge 172:65be27845400 73 uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event.
AnnaBridge 172:65be27845400 74 This parameters can be in the range 1 to 32 */
AnnaBridge 172:65be27845400 75
AnnaBridge 172:65be27845400 76 }HAL_DMA_MuxSyncConfigTypeDef;
AnnaBridge 172:65be27845400 77
AnnaBridge 172:65be27845400 78
AnnaBridge 172:65be27845400 79 /**
AnnaBridge 172:65be27845400 80 * @brief HAL DMAMUX request generator parameters structure definition
AnnaBridge 172:65be27845400 81 */
AnnaBridge 172:65be27845400 82 typedef struct
AnnaBridge 172:65be27845400 83 {
AnnaBridge 172:65be27845400 84 uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator
AnnaBridge 172:65be27845400 85 This parameter can be a value of @ref DMAEx_MUX_SignalGeneratorID_selection */
AnnaBridge 172:65be27845400 86
AnnaBridge 172:65be27845400 87 uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated.
AnnaBridge 172:65be27845400 88 This parameter can be a value of @ref DMAEx_MUX_RequestGeneneratorPolarity_selection */
AnnaBridge 172:65be27845400 89
AnnaBridge 172:65be27845400 90 uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event.
AnnaBridge 172:65be27845400 91 This parameters can be in the range 1 to 32 */
AnnaBridge 172:65be27845400 92
AnnaBridge 172:65be27845400 93 }HAL_DMA_MuxRequestGeneratorConfigTypeDef;
AnnaBridge 172:65be27845400 94
AnnaBridge 172:65be27845400 95 /**
AnnaBridge 172:65be27845400 96 * @}
AnnaBridge 172:65be27845400 97 */
AnnaBridge 172:65be27845400 98
AnnaBridge 172:65be27845400 99 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 100
AnnaBridge 172:65be27845400 101 /** @defgroup DMAEx_Exported_Constants DMA Exported Constants
AnnaBridge 172:65be27845400 102 * @brief DMAEx Exported constants
AnnaBridge 172:65be27845400 103 * @{
AnnaBridge 172:65be27845400 104 */
AnnaBridge 172:65be27845400 105
AnnaBridge 172:65be27845400 106 /** @defgroup DMAEx_MUX_SyncSignalID_selection DMAEx MUX SyncSignalID selection
AnnaBridge 172:65be27845400 107 * @brief DMAEx MUX SyncSignalID selection
AnnaBridge 172:65be27845400 108 * @{
AnnaBridge 172:65be27845400 109 */
AnnaBridge 172:65be27845400 110 #define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 0U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel0 Event */
AnnaBridge 172:65be27845400 111 #define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 1U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel1 Event */
AnnaBridge 172:65be27845400 112 #define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 2U /*!< DMAMUX1 synchronization Signal is DMAMUX1 Channel2 Event */
AnnaBridge 172:65be27845400 113 #define HAL_DMAMUX1_SYNC_LPTIM1_OUT 3U /*!< DMAMUX1 synchronization Signal is LPTIM1 OUT */
AnnaBridge 172:65be27845400 114 #define HAL_DMAMUX1_SYNC_LPTIM2_OUT 4U /*!< DMAMUX1 synchronization Signal is LPTIM2 OUT */
AnnaBridge 172:65be27845400 115 #define HAL_DMAMUX1_SYNC_LPTIM3_OUT 5U /*!< DMAMUX1 synchronization Signal is LPTIM3 OUT */
AnnaBridge 172:65be27845400 116 #define HAL_DMAMUX1_SYNC_EXTI0 6U /*!< DMAMUX1 synchronization Signal is EXTI0 IT */
AnnaBridge 172:65be27845400 117 #define HAL_DMAMUX1_SYNC_TIM12_TRGO 7U /*!< DMAMUX1 synchronization Signal is TIM12 TRGO */
AnnaBridge 172:65be27845400 118
AnnaBridge 172:65be27845400 119 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH0_EVT 0U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel0 Event */
AnnaBridge 172:65be27845400 120 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH1_EVT 1U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel1 Event */
AnnaBridge 172:65be27845400 121 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH2_EVT 2U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel2 Event */
AnnaBridge 172:65be27845400 122 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH3_EVT 3U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel3 Event */
AnnaBridge 172:65be27845400 123 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH4_EVT 4U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel4 Event */
AnnaBridge 172:65be27845400 124 #define HAL_DMAMUX2_SYNC_DMAMUX2_CH5_EVT 5U /*!< DMAMUX2 synchronization Signal is DMAMUX2 Channel5 Event */
AnnaBridge 172:65be27845400 125 #define HAL_DMAMUX2_SYNC_LPUART1_RX_WKUP 6U /*!< DMAMUX2 synchronization Signal is LPUART1 RX Wakeup */
AnnaBridge 172:65be27845400 126 #define HAL_DMAMUX2_SYNC_LPUART1_TX_WKUP 7U /*!< DMAMUX2 synchronization Signal is LPUART1 TX Wakeup */
AnnaBridge 172:65be27845400 127 #define HAL_DMAMUX2_SYNC_LPTIM2_OUT 8U /*!< DMAMUX2 synchronization Signal is LPTIM2 output */
AnnaBridge 172:65be27845400 128 #define HAL_DMAMUX2_SYNC_LPTIM3_OUT 9U /*!< DMAMUX2 synchronization Signal is LPTIM3 output */
AnnaBridge 172:65be27845400 129 #define HAL_DMAMUX2_SYNC_I2C4_WKUP 10U /*!< DMAMUX2 synchronization Signal is I2C4 Wakeup */
AnnaBridge 172:65be27845400 130 #define HAL_DMAMUX2_SYNC_SPI6_WKUP 11U /*!< DMAMUX2 synchronization Signal is SPI6 Wakeup */
AnnaBridge 172:65be27845400 131 #define HAL_DMAMUX2_SYNC_COMP1_OUT 12U /*!< DMAMUX2 synchronization Signal is Comparator 1 output */
AnnaBridge 172:65be27845400 132 #define HAL_DMAMUX2_SYNC_RTC_WKUP 13U /*!< DMAMUX2 synchronization Signal is RTC Wakeup */
AnnaBridge 172:65be27845400 133 #define HAL_DMAMUX2_SYNC_EXTI0 14U /*!< DMAMUX2 synchronization Signal is EXTI0 IT */
AnnaBridge 172:65be27845400 134 #define HAL_DMAMUX2_SYNC_EXTI2 15U /*!< DMAMUX2 synchronization Signal is EXTI2 IT */
AnnaBridge 172:65be27845400 135
AnnaBridge 172:65be27845400 136 /**
AnnaBridge 172:65be27845400 137 * @}
AnnaBridge 172:65be27845400 138 */
AnnaBridge 172:65be27845400 139
AnnaBridge 172:65be27845400 140 /** @defgroup DMAEx_MUX_SyncPolarity_selection DMAEx MUX SyncPolarity selection
AnnaBridge 172:65be27845400 141 * @brief DMAEx MUX SyncPolarity selection
AnnaBridge 172:65be27845400 142 * @{
AnnaBridge 172:65be27845400 143 */
AnnaBridge 172:65be27845400 144 #define HAL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< block synchronization events */
AnnaBridge 172:65be27845400 145 #define HAL_DMAMUX_SYNC_RISING DMAMUX_CxCR_SPOL_0 /*!< synchronize with rising edge events */
AnnaBridge 172:65be27845400 146 #define HAL_DMAMUX_SYNC_FALLING DMAMUX_CxCR_SPOL_1 /*!< synchronize with falling edge events */
AnnaBridge 172:65be27845400 147 #define HAL_DMAMUX_SYNC_RISING_FALLING DMAMUX_CxCR_SPOL /*!< synchronize with rising and falling edge events */
AnnaBridge 172:65be27845400 148
AnnaBridge 172:65be27845400 149 /**
AnnaBridge 172:65be27845400 150 * @}
AnnaBridge 172:65be27845400 151 */
AnnaBridge 172:65be27845400 152
AnnaBridge 172:65be27845400 153
AnnaBridge 172:65be27845400 154 /** @defgroup DMAEx_MUX_SignalGeneratorID_selection DMAEx MUX SignalGeneratorID selection
AnnaBridge 172:65be27845400 155 * @brief DMAEx MUX SignalGeneratorID selection
AnnaBridge 172:65be27845400 156 * @{
AnnaBridge 172:65be27845400 157 */
AnnaBridge 172:65be27845400 158 #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 0U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel0 Event */
AnnaBridge 172:65be27845400 159 #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 1U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel1 Event */
AnnaBridge 172:65be27845400 160 #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 2U /*!< DMAMUX1 Request generator Signal is DMAMUX1 Channel2 Event */
AnnaBridge 172:65be27845400 161 #define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 3U /*!< DMAMUX1 Request generator Signal is LPTIM1 OUT */
AnnaBridge 172:65be27845400 162 #define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 4U /*!< DMAMUX1 Request generator Signal is LPTIM2 OUT */
AnnaBridge 172:65be27845400 163 #define HAL_DMAMUX1_REQ_GEN_LPTIM3_OUT 5U /*!< DMAMUX1 Request generator Signal is LPTIM3 OUT */
AnnaBridge 172:65be27845400 164 #define HAL_DMAMUX1_REQ_GEN_EXTI0 6U /*!< DMAMUX1 Request generator Signal is EXTI0 IT */
AnnaBridge 172:65be27845400 165 #define HAL_DMAMUX1_REQ_GEN_TIM12_TRGO 7U /*!< DMAMUX1 Request generator Signal is TIM12 TRGO */
AnnaBridge 172:65be27845400 166
AnnaBridge 172:65be27845400 167 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH0_EVT 0U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel0 Event */
AnnaBridge 172:65be27845400 168 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH1_EVT 1U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel1 Event */
AnnaBridge 172:65be27845400 169 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH2_EVT 2U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel2 Event */
AnnaBridge 172:65be27845400 170 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH3_EVT 3U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel3 Event */
AnnaBridge 172:65be27845400 171 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH4_EVT 4U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel4 Event */
AnnaBridge 172:65be27845400 172 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH5_EVT 5U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel5 Event */
AnnaBridge 172:65be27845400 173 #define HAL_DMAMUX2_REQ_GEN_DMAMUX2_CH6_EVT 6U /*!< DMAMUX2 Request generator Signal is DMAMUX2 Channel6 Event */
AnnaBridge 172:65be27845400 174 #define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_WKUP 7U /*!< DMAMUX2 Request generator Signal is LPUART1 RX Wakeup */
AnnaBridge 172:65be27845400 175 #define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_WKUP 8U /*!< DMAMUX2 Request generator Signal is LPUART1 TX Wakeup */
AnnaBridge 172:65be27845400 176 #define HAL_DMAMUX2_REQ_GEN_LPTIM2_WKUP 9U /*!< DMAMUX2 Request generator Signal is LPTIM2 Wakeup */
AnnaBridge 172:65be27845400 177 #define HAL_DMAMUX2_REQ_GEN_LPTIM2_OUT 10U /*!< DMAMUX2 Request generator Signal is LPTIM2 OUT */
AnnaBridge 172:65be27845400 178 #define HAL_DMAMUX2_REQ_GEN_LPTIM3_WKUP 11U /*!< DMAMUX2 Request generator Signal is LPTIM3 Wakeup */
AnnaBridge 172:65be27845400 179 #define HAL_DMAMUX2_REQ_GEN_LPTIM3_OUT 12U /*!< DMAMUX2 Request generator Signal is LPTIM3 OUT */
AnnaBridge 172:65be27845400 180 #define HAL_DMAMUX2_REQ_GEN_LPTIM4_WKUP 13U /*!< DMAMUX2 Request generator Signal is LPTIM4 Wakeup */
AnnaBridge 172:65be27845400 181 #define HAL_DMAMUX2_REQ_GEN_LPTIM5_WKUP 14U /*!< DMAMUX2 Request generator Signal is LPTIM5 Wakeup */
AnnaBridge 172:65be27845400 182 #define HAL_DMAMUX2_REQ_GEN_I2C4_WKUP 15U /*!< DMAMUX2 Request generator Signal is I2C4 Wakeup */
AnnaBridge 172:65be27845400 183 #define HAL_DMAMUX2_REQ_GEN_SPI6_WKUP 16U /*!< DMAMUX2 Request generator Signal is SPI6 Wakeup */
AnnaBridge 172:65be27845400 184 #define HAL_DMAMUX2_REQ_GEN_COMP1_OUT 17U /*!< DMAMUX2 Request generator Signal is Comparator 1 output */
AnnaBridge 172:65be27845400 185 #define HAL_DMAMUX2_REQ_GEN_COMP2_OUT 18U /*!< DMAMUX2 Request generator Signal is Comparator 2 output */
AnnaBridge 172:65be27845400 186 #define HAL_DMAMUX2_REQ_GEN_RTC_WKUP 19U /*!< DMAMUX2 Request generator Signal is RTC Wakeup */
AnnaBridge 172:65be27845400 187 #define HAL_DMAMUX2_REQ_GEN_EXTI0 20U /*!< DMAMUX2 Request generator Signal is EXTI0 */
AnnaBridge 172:65be27845400 188 #define HAL_DMAMUX2_REQ_GEN_EXTI2 21U /*!< DMAMUX2 Request generator Signal is EXTI2 */
AnnaBridge 172:65be27845400 189 #define HAL_DMAMUX2_REQ_GEN_I2C4_IT_EVT 22U /*!< DMAMUX2 Request generator Signal is I2C4 IT Event */
AnnaBridge 172:65be27845400 190 #define HAL_DMAMUX2_REQ_GEN_SPI6_IT 23U /*!< DMAMUX2 Request generator Signal is SPI6 IT */
AnnaBridge 172:65be27845400 191 #define HAL_DMAMUX2_REQ_GEN_LPUART1_TX_IT 24U /*!< DMAMUX2 Request generator Signal is LPUART1 Tx IT */
AnnaBridge 172:65be27845400 192 #define HAL_DMAMUX2_REQ_GEN_LPUART1_RX_IT 25U /*!< DMAMUX2 Request generator Signal is LPUART1 Rx IT */
AnnaBridge 172:65be27845400 193 #define HAL_DMAMUX2_REQ_GEN_ADC3_IT 26U /*!< DMAMUX2 Request generator Signal is ADC3 IT */
AnnaBridge 172:65be27845400 194 #define HAL_DMAMUX2_REQ_GEN_ADC3_AWD1_OUT 27U /*!< DMAMUX2 Request generator Signal is ADC3 Analog Watchdog 1 output */
AnnaBridge 172:65be27845400 195 #define HAL_DMAMUX2_REQ_GEN_BDMA_CH0_IT 28U /*!< DMAMUX2 Request generator Signal is BDMA Channel 0 IT */
AnnaBridge 172:65be27845400 196 #define HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT 29U /*!< DMAMUX2 Request generator Signal is BDMA Channel 1 IT */
AnnaBridge 172:65be27845400 197
AnnaBridge 172:65be27845400 198
AnnaBridge 172:65be27845400 199 /**
AnnaBridge 172:65be27845400 200 * @}
AnnaBridge 172:65be27845400 201 */
AnnaBridge 172:65be27845400 202
AnnaBridge 172:65be27845400 203 /** @defgroup DMAEx_MUX_RequestGeneneratorPolarity_selection DMAEx MUX RequestGeneneratorPolarity selection
AnnaBridge 172:65be27845400 204 * @brief DMAEx MUX RequestGeneneratorPolarity selection
AnnaBridge 172:65be27845400 205 * @{
AnnaBridge 172:65be27845400 206 */
AnnaBridge 172:65be27845400 207 #define HAL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< block request generator events */
AnnaBridge 172:65be27845400 208 #define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */
AnnaBridge 172:65be27845400 209 #define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */
AnnaBridge 172:65be27845400 210 #define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */
AnnaBridge 172:65be27845400 211
AnnaBridge 172:65be27845400 212 /**
AnnaBridge 172:65be27845400 213 * @}
AnnaBridge 172:65be27845400 214 */
AnnaBridge 172:65be27845400 215
AnnaBridge 172:65be27845400 216 /**
AnnaBridge 172:65be27845400 217 * @}
AnnaBridge 172:65be27845400 218 */
AnnaBridge 172:65be27845400 219
AnnaBridge 172:65be27845400 220 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 221 /** @defgroup DMAEx_Exported_Functions DMAEx Exported Functions
AnnaBridge 172:65be27845400 222 * @brief DMAEx Exported functions
AnnaBridge 172:65be27845400 223 * @{
AnnaBridge 172:65be27845400 224 */
AnnaBridge 172:65be27845400 225
AnnaBridge 172:65be27845400 226 /** @defgroup DMAEx_Exported_Functions_Group1 Extended features functions
AnnaBridge 172:65be27845400 227 * @brief Extended features functions
AnnaBridge 172:65be27845400 228 * @{
AnnaBridge 172:65be27845400 229 */
AnnaBridge 172:65be27845400 230
AnnaBridge 172:65be27845400 231 /* IO operation functions *******************************************************/
AnnaBridge 172:65be27845400 232 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
AnnaBridge 172:65be27845400 233 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength);
AnnaBridge 172:65be27845400 234 HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory);
AnnaBridge 172:65be27845400 235 HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
AnnaBridge 172:65be27845400 236 HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
AnnaBridge 172:65be27845400 237 HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
AnnaBridge 172:65be27845400 238 HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
AnnaBridge 172:65be27845400 239
AnnaBridge 172:65be27845400 240 void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma);
AnnaBridge 172:65be27845400 241 /**
AnnaBridge 172:65be27845400 242 * @}
AnnaBridge 172:65be27845400 243 */
AnnaBridge 172:65be27845400 244 /**
AnnaBridge 172:65be27845400 245 * @}
AnnaBridge 172:65be27845400 246 */
AnnaBridge 172:65be27845400 247
AnnaBridge 172:65be27845400 248 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 249 /** @defgroup DMAEx_Private_Macros DMA Private Macros
AnnaBridge 172:65be27845400 250 * @brief DMAEx private macros
AnnaBridge 172:65be27845400 251 * @{
AnnaBridge 172:65be27845400 252 */
AnnaBridge 172:65be27845400 253
AnnaBridge 172:65be27845400 254 #define IS_DMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_TIM12_TRGO)
AnnaBridge 172:65be27845400 255 #define IS_BDMA_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_SYNC_EXTI2)
AnnaBridge 172:65be27845400 256
AnnaBridge 172:65be27845400 257 #define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
AnnaBridge 172:65be27845400 258
AnnaBridge 172:65be27845400 259 #define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
AnnaBridge 172:65be27845400 260 ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
AnnaBridge 172:65be27845400 261 ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
AnnaBridge 172:65be27845400 262 ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
AnnaBridge 172:65be27845400 263
AnnaBridge 172:65be27845400 264 #define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
AnnaBridge 172:65be27845400 265
AnnaBridge 172:65be27845400 266 #define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
AnnaBridge 172:65be27845400 267 ((EVENT) == ENABLE))
AnnaBridge 172:65be27845400 268
AnnaBridge 172:65be27845400 269 #define IS_DMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_TIM12_TRGO)
AnnaBridge 172:65be27845400 270 #define IS_BDMA_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX2_REQ_GEN_BDMA_CH1_IT)
AnnaBridge 172:65be27845400 271
AnnaBridge 172:65be27845400 272 #define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0U) && ((REQUEST_NUMBER) <= 32U))
AnnaBridge 172:65be27845400 273
AnnaBridge 172:65be27845400 274 #define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQ_GEN_NO_EVENT) || \
AnnaBridge 172:65be27845400 275 ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING) || \
AnnaBridge 172:65be27845400 276 ((POLARITY) == HAL_DMAMUX_REQ_GEN_FALLING) || \
AnnaBridge 172:65be27845400 277 ((POLARITY) == HAL_DMAMUX_REQ_GEN_RISING_FALLING))
AnnaBridge 172:65be27845400 278
AnnaBridge 172:65be27845400 279 /**
AnnaBridge 172:65be27845400 280 * @}
AnnaBridge 172:65be27845400 281 */
AnnaBridge 172:65be27845400 282
AnnaBridge 172:65be27845400 283 /* Private functions ---------------------------------------------------------*/
AnnaBridge 172:65be27845400 284 /** @defgroup DMAEx_Private_Functions DMAEx Private Functions
AnnaBridge 172:65be27845400 285 * @brief DMAEx Private functions
AnnaBridge 172:65be27845400 286 * @{
AnnaBridge 172:65be27845400 287 */
AnnaBridge 172:65be27845400 288 /**
AnnaBridge 172:65be27845400 289 * @}
AnnaBridge 172:65be27845400 290 */
AnnaBridge 172:65be27845400 291
AnnaBridge 172:65be27845400 292 /**
AnnaBridge 172:65be27845400 293 * @}
AnnaBridge 172:65be27845400 294 */
AnnaBridge 172:65be27845400 295
AnnaBridge 172:65be27845400 296 /**
AnnaBridge 172:65be27845400 297 * @}
AnnaBridge 172:65be27845400 298 */
AnnaBridge 172:65be27845400 299
AnnaBridge 172:65be27845400 300 #ifdef __cplusplus
AnnaBridge 172:65be27845400 301 }
AnnaBridge 172:65be27845400 302 #endif
AnnaBridge 172:65be27845400 303
AnnaBridge 172:65be27845400 304 #endif /* STM32H7xx_HAL_DMA_H */
AnnaBridge 172:65be27845400 305
AnnaBridge 172:65be27845400 306 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/