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TARGET_NUCLEO_H743ZI/TOOLCHAIN_ARM_MICRO/stm32h7xx_hal_dfsdm.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 172:65be27845400 1 /**
AnnaBridge 172:65be27845400 2 ******************************************************************************
AnnaBridge 172:65be27845400 3 * @file stm32h7xx_hal_dfsdm.h
AnnaBridge 172:65be27845400 4 * @author MCD Application Team
AnnaBridge 172:65be27845400 5 * @brief Header file of DFSDM HAL module.
AnnaBridge 172:65be27845400 6 ******************************************************************************
AnnaBridge 172:65be27845400 7 * @attention
AnnaBridge 172:65be27845400 8 *
AnnaBridge 172:65be27845400 9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
AnnaBridge 172:65be27845400 10 * All rights reserved.</center></h2>
AnnaBridge 172:65be27845400 11 *
AnnaBridge 172:65be27845400 12 * This software component is licensed by ST under BSD 3-Clause license,
AnnaBridge 172:65be27845400 13 * the "License"; You may not use this file except in compliance with the
AnnaBridge 172:65be27845400 14 * License. You may obtain a copy of the License at:
AnnaBridge 172:65be27845400 15 * opensource.org/licenses/BSD-3-Clause
AnnaBridge 172:65be27845400 16 *
AnnaBridge 172:65be27845400 17 ******************************************************************************
AnnaBridge 172:65be27845400 18 */
AnnaBridge 172:65be27845400 19
AnnaBridge 172:65be27845400 20 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 172:65be27845400 21 #ifndef STM32H7xx_HAL_DFSDM_H
AnnaBridge 172:65be27845400 22 #define STM32H7xx_HAL_DFSDM_H
AnnaBridge 172:65be27845400 23
AnnaBridge 172:65be27845400 24 #ifdef __cplusplus
AnnaBridge 172:65be27845400 25 extern "C" {
AnnaBridge 172:65be27845400 26 #endif
AnnaBridge 172:65be27845400 27
AnnaBridge 172:65be27845400 28 /* Includes ------------------------------------------------------------------*/
AnnaBridge 172:65be27845400 29 #include "stm32h7xx_hal_def.h"
AnnaBridge 172:65be27845400 30
AnnaBridge 172:65be27845400 31 /** @addtogroup STM32H7xx_HAL_Driver
AnnaBridge 172:65be27845400 32 * @{
AnnaBridge 172:65be27845400 33 */
AnnaBridge 172:65be27845400 34
AnnaBridge 172:65be27845400 35 /** @addtogroup DFSDM
AnnaBridge 172:65be27845400 36 * @{
AnnaBridge 172:65be27845400 37 */
AnnaBridge 172:65be27845400 38
AnnaBridge 172:65be27845400 39 /* Exported types ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 40 /** @defgroup DFSDM_Exported_Types DFSDM Exported Types
AnnaBridge 172:65be27845400 41 * @{
AnnaBridge 172:65be27845400 42 */
AnnaBridge 172:65be27845400 43
AnnaBridge 172:65be27845400 44 /**
AnnaBridge 172:65be27845400 45 * @brief HAL DFSDM Channel states definition
AnnaBridge 172:65be27845400 46 */
AnnaBridge 172:65be27845400 47 typedef enum
AnnaBridge 172:65be27845400 48 {
AnnaBridge 172:65be27845400 49 HAL_DFSDM_CHANNEL_STATE_RESET = 0x00U, /*!< DFSDM channel not initialized */
AnnaBridge 172:65be27845400 50 HAL_DFSDM_CHANNEL_STATE_READY = 0x01U, /*!< DFSDM channel initialized and ready for use */
AnnaBridge 172:65be27845400 51 HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFFU /*!< DFSDM channel state error */
AnnaBridge 172:65be27845400 52 }HAL_DFSDM_Channel_StateTypeDef;
AnnaBridge 172:65be27845400 53
AnnaBridge 172:65be27845400 54 /**
AnnaBridge 172:65be27845400 55 * @brief DFSDM channel output clock structure definition
AnnaBridge 172:65be27845400 56 */
AnnaBridge 172:65be27845400 57 typedef struct
AnnaBridge 172:65be27845400 58 {
AnnaBridge 172:65be27845400 59 FunctionalState Activation; /*!< Output clock enable/disable */
AnnaBridge 172:65be27845400 60 uint32_t Selection; /*!< Output clock is system clock or audio clock.
AnnaBridge 172:65be27845400 61 This parameter can be a value of @ref DFSDM_Channel_OuputClock */
AnnaBridge 172:65be27845400 62 uint32_t Divider; /*!< Output clock divider.
AnnaBridge 172:65be27845400 63 This parameter must be a number between Min_Data = 2 and Max_Data = 256 */
AnnaBridge 172:65be27845400 64 }DFSDM_Channel_OutputClockTypeDef;
AnnaBridge 172:65be27845400 65
AnnaBridge 172:65be27845400 66 /**
AnnaBridge 172:65be27845400 67 * @brief DFSDM channel input structure definition
AnnaBridge 172:65be27845400 68 */
AnnaBridge 172:65be27845400 69 typedef struct
AnnaBridge 172:65be27845400 70 {
AnnaBridge 172:65be27845400 71 uint32_t Multiplexer; /*!< Input is external serial inputs ,internal register or ADC output.
AnnaBridge 172:65be27845400 72 This parameter can be a value of @ref DFSDM_Channel_InputMultiplexer */
AnnaBridge 172:65be27845400 73 uint32_t DataPacking; /*!< Standard, interleaved or dual mode for internal register.
AnnaBridge 172:65be27845400 74 This parameter can be a value of @ref DFSDM_Channel_DataPacking */
AnnaBridge 172:65be27845400 75 uint32_t Pins; /*!< Input pins are taken from same or following channel.
AnnaBridge 172:65be27845400 76 This parameter can be a value of @ref DFSDM_Channel_InputPins */
AnnaBridge 172:65be27845400 77 }DFSDM_Channel_InputTypeDef;
AnnaBridge 172:65be27845400 78
AnnaBridge 172:65be27845400 79 /**
AnnaBridge 172:65be27845400 80 * @brief DFSDM channel serial interface structure definition
AnnaBridge 172:65be27845400 81 */
AnnaBridge 172:65be27845400 82 typedef struct
AnnaBridge 172:65be27845400 83 {
AnnaBridge 172:65be27845400 84 uint32_t Type; /*!< SPI or Manchester modes.
AnnaBridge 172:65be27845400 85 This parameter can be a value of @ref DFSDM_Channel_SerialInterfaceType */
AnnaBridge 172:65be27845400 86 uint32_t SpiClock; /*!< SPI clock select (external or internal with different sampling point).
AnnaBridge 172:65be27845400 87 This parameter can be a value of @ref DFSDM_Channel_SpiClock */
AnnaBridge 172:65be27845400 88 }DFSDM_Channel_SerialInterfaceTypeDef;
AnnaBridge 172:65be27845400 89
AnnaBridge 172:65be27845400 90 /**
AnnaBridge 172:65be27845400 91 * @brief DFSDM channel analog watchdog structure definition
AnnaBridge 172:65be27845400 92 */
AnnaBridge 172:65be27845400 93 typedef struct
AnnaBridge 172:65be27845400 94 {
AnnaBridge 172:65be27845400 95 uint32_t FilterOrder; /*!< Analog watchdog Sinc filter order.
AnnaBridge 172:65be27845400 96 This parameter can be a value of @ref DFSDM_Channel_AwdFilterOrder */
AnnaBridge 172:65be27845400 97 uint32_t Oversampling; /*!< Analog watchdog filter oversampling ratio.
AnnaBridge 172:65be27845400 98 This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
AnnaBridge 172:65be27845400 99 }DFSDM_Channel_AwdTypeDef;
AnnaBridge 172:65be27845400 100
AnnaBridge 172:65be27845400 101 /**
AnnaBridge 172:65be27845400 102 * @brief DFSDM channel init structure definition
AnnaBridge 172:65be27845400 103 */
AnnaBridge 172:65be27845400 104 typedef struct
AnnaBridge 172:65be27845400 105 {
AnnaBridge 172:65be27845400 106 DFSDM_Channel_OutputClockTypeDef OutputClock; /*!< DFSDM channel output clock parameters */
AnnaBridge 172:65be27845400 107 DFSDM_Channel_InputTypeDef Input; /*!< DFSDM channel input parameters */
AnnaBridge 172:65be27845400 108 DFSDM_Channel_SerialInterfaceTypeDef SerialInterface; /*!< DFSDM channel serial interface parameters */
AnnaBridge 172:65be27845400 109 DFSDM_Channel_AwdTypeDef Awd; /*!< DFSDM channel analog watchdog parameters */
AnnaBridge 172:65be27845400 110 int32_t Offset; /*!< DFSDM channel offset.
AnnaBridge 172:65be27845400 111 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
AnnaBridge 172:65be27845400 112 uint32_t RightBitShift; /*!< DFSDM channel right bit shift.
AnnaBridge 172:65be27845400 113 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F */
AnnaBridge 172:65be27845400 114 }DFSDM_Channel_InitTypeDef;
AnnaBridge 172:65be27845400 115
AnnaBridge 172:65be27845400 116 /**
AnnaBridge 172:65be27845400 117 * @brief DFSDM channel handle structure definition
AnnaBridge 172:65be27845400 118 */
AnnaBridge 172:65be27845400 119 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 120 typedef struct __DFSDM_Channel_HandleTypeDef
AnnaBridge 172:65be27845400 121 #else
AnnaBridge 172:65be27845400 122 typedef struct
AnnaBridge 172:65be27845400 123 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 124 {
AnnaBridge 172:65be27845400 125 DFSDM_Channel_TypeDef *Instance; /*!< DFSDM channel instance */
AnnaBridge 172:65be27845400 126 DFSDM_Channel_InitTypeDef Init; /*!< DFSDM channel init parameters */
AnnaBridge 172:65be27845400 127 HAL_DFSDM_Channel_StateTypeDef State; /*!< DFSDM channel state */
AnnaBridge 172:65be27845400 128 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 129 void (*CkabCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel); /*!< DFSDM channel clock absence detection callback */
AnnaBridge 172:65be27845400 130 void (*ScdCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel); /*!< DFSDM channel short circuit detection callback */
AnnaBridge 172:65be27845400 131 void (*MspInitCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel); /*!< DFSDM channel MSP init callback */
AnnaBridge 172:65be27845400 132 void (*MspDeInitCallback) (struct __DFSDM_Channel_HandleTypeDef *hdfsdm_channel); /*!< DFSDM channel MSP de-init callback */
AnnaBridge 172:65be27845400 133 #endif
AnnaBridge 172:65be27845400 134 }DFSDM_Channel_HandleTypeDef;
AnnaBridge 172:65be27845400 135
AnnaBridge 172:65be27845400 136 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 137 /**
AnnaBridge 172:65be27845400 138 * @brief DFSDM channel callback ID enumeration definition
AnnaBridge 172:65be27845400 139 */
AnnaBridge 172:65be27845400 140 typedef enum
AnnaBridge 172:65be27845400 141 {
AnnaBridge 172:65be27845400 142 HAL_DFSDM_CHANNEL_CKAB_CB_ID = 0x00U, /*!< DFSDM channel clock absence detection callback ID */
AnnaBridge 172:65be27845400 143 HAL_DFSDM_CHANNEL_SCD_CB_ID = 0x01U, /*!< DFSDM channel short circuit detection callback ID */
AnnaBridge 172:65be27845400 144 HAL_DFSDM_CHANNEL_MSPINIT_CB_ID = 0x02U, /*!< DFSDM channel MSP init callback ID */
AnnaBridge 172:65be27845400 145 HAL_DFSDM_CHANNEL_MSPDEINIT_CB_ID = 0x03U /*!< DFSDM channel MSP de-init callback ID */
AnnaBridge 172:65be27845400 146 }HAL_DFSDM_Channel_CallbackIDTypeDef;
AnnaBridge 172:65be27845400 147
AnnaBridge 172:65be27845400 148 /**
AnnaBridge 172:65be27845400 149 * @brief DFSDM channel callback pointer definition
AnnaBridge 172:65be27845400 150 */
AnnaBridge 172:65be27845400 151 typedef void (*pDFSDM_Channel_CallbackTypeDef)(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 152 #endif
AnnaBridge 172:65be27845400 153
AnnaBridge 172:65be27845400 154 /**
AnnaBridge 172:65be27845400 155 * @brief HAL DFSDM Filter states definition
AnnaBridge 172:65be27845400 156 */
AnnaBridge 172:65be27845400 157 typedef enum
AnnaBridge 172:65be27845400 158 {
AnnaBridge 172:65be27845400 159 HAL_DFSDM_FILTER_STATE_RESET = 0x00U, /*!< DFSDM filter not initialized */
AnnaBridge 172:65be27845400 160 HAL_DFSDM_FILTER_STATE_READY = 0x01U, /*!< DFSDM filter initialized and ready for use */
AnnaBridge 172:65be27845400 161 HAL_DFSDM_FILTER_STATE_REG = 0x02U, /*!< DFSDM filter regular conversion in progress */
AnnaBridge 172:65be27845400 162 HAL_DFSDM_FILTER_STATE_INJ = 0x03U, /*!< DFSDM filter injected conversion in progress */
AnnaBridge 172:65be27845400 163 HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04U, /*!< DFSDM filter regular and injected conversions in progress */
AnnaBridge 172:65be27845400 164 HAL_DFSDM_FILTER_STATE_ERROR = 0xFFU /*!< DFSDM filter state error */
AnnaBridge 172:65be27845400 165 }HAL_DFSDM_Filter_StateTypeDef;
AnnaBridge 172:65be27845400 166
AnnaBridge 172:65be27845400 167 /**
AnnaBridge 172:65be27845400 168 * @brief DFSDM filter regular conversion parameters structure definition
AnnaBridge 172:65be27845400 169 */
AnnaBridge 172:65be27845400 170 typedef struct
AnnaBridge 172:65be27845400 171 {
AnnaBridge 172:65be27845400 172 uint32_t Trigger; /*!< Trigger used to start regular conversion: software or synchronous.
AnnaBridge 172:65be27845400 173 This parameter can be a value of @ref DFSDM_Filter_Trigger */
AnnaBridge 172:65be27845400 174 FunctionalState FastMode; /*!< Enable/disable fast mode for regular conversion */
AnnaBridge 172:65be27845400 175 FunctionalState DmaMode; /*!< Enable/disable DMA for regular conversion */
AnnaBridge 172:65be27845400 176 }DFSDM_Filter_RegularParamTypeDef;
AnnaBridge 172:65be27845400 177
AnnaBridge 172:65be27845400 178 /**
AnnaBridge 172:65be27845400 179 * @brief DFSDM filter injected conversion parameters structure definition
AnnaBridge 172:65be27845400 180 */
AnnaBridge 172:65be27845400 181 typedef struct
AnnaBridge 172:65be27845400 182 {
AnnaBridge 172:65be27845400 183 uint32_t Trigger; /*!< Trigger used to start injected conversion: software, external or synchronous.
AnnaBridge 172:65be27845400 184 This parameter can be a value of @ref DFSDM_Filter_Trigger */
AnnaBridge 172:65be27845400 185 FunctionalState ScanMode; /*!< Enable/disable scanning mode for injected conversion */
AnnaBridge 172:65be27845400 186 FunctionalState DmaMode; /*!< Enable/disable DMA for injected conversion */
AnnaBridge 172:65be27845400 187 uint32_t ExtTrigger; /*!< External trigger.
AnnaBridge 172:65be27845400 188 This parameter can be a value of @ref DFSDM_Filter_ExtTrigger */
AnnaBridge 172:65be27845400 189 uint32_t ExtTriggerEdge; /*!< External trigger edge: rising, falling or both.
AnnaBridge 172:65be27845400 190 This parameter can be a value of @ref DFSDM_Filter_ExtTriggerEdge */
AnnaBridge 172:65be27845400 191 }DFSDM_Filter_InjectedParamTypeDef;
AnnaBridge 172:65be27845400 192
AnnaBridge 172:65be27845400 193 /**
AnnaBridge 172:65be27845400 194 * @brief DFSDM filter parameters structure definition
AnnaBridge 172:65be27845400 195 */
AnnaBridge 172:65be27845400 196 typedef struct
AnnaBridge 172:65be27845400 197 {
AnnaBridge 172:65be27845400 198 uint32_t SincOrder; /*!< Sinc filter order.
AnnaBridge 172:65be27845400 199 This parameter can be a value of @ref DFSDM_Filter_SincOrder */
AnnaBridge 172:65be27845400 200 uint32_t Oversampling; /*!< Filter oversampling ratio.
AnnaBridge 172:65be27845400 201 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
AnnaBridge 172:65be27845400 202 uint32_t IntOversampling; /*!< Integrator oversampling ratio.
AnnaBridge 172:65be27845400 203 This parameter must be a number between Min_Data = 1 and Max_Data = 256 */
AnnaBridge 172:65be27845400 204 }DFSDM_Filter_FilterParamTypeDef;
AnnaBridge 172:65be27845400 205
AnnaBridge 172:65be27845400 206 /**
AnnaBridge 172:65be27845400 207 * @brief DFSDM filter init structure definition
AnnaBridge 172:65be27845400 208 */
AnnaBridge 172:65be27845400 209 typedef struct
AnnaBridge 172:65be27845400 210 {
AnnaBridge 172:65be27845400 211 DFSDM_Filter_RegularParamTypeDef RegularParam; /*!< DFSDM regular conversion parameters */
AnnaBridge 172:65be27845400 212 DFSDM_Filter_InjectedParamTypeDef InjectedParam; /*!< DFSDM injected conversion parameters */
AnnaBridge 172:65be27845400 213 DFSDM_Filter_FilterParamTypeDef FilterParam; /*!< DFSDM filter parameters */
AnnaBridge 172:65be27845400 214 }DFSDM_Filter_InitTypeDef;
AnnaBridge 172:65be27845400 215
AnnaBridge 172:65be27845400 216 /**
AnnaBridge 172:65be27845400 217 * @brief DFSDM filter handle structure definition
AnnaBridge 172:65be27845400 218 */
AnnaBridge 172:65be27845400 219 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 220 typedef struct __DFSDM_Filter_HandleTypeDef
AnnaBridge 172:65be27845400 221 #else
AnnaBridge 172:65be27845400 222 typedef struct
AnnaBridge 172:65be27845400 223 #endif /* USE_HAL_DFSDM_REGISTER_CALLBACKS */
AnnaBridge 172:65be27845400 224 {
AnnaBridge 172:65be27845400 225 DFSDM_Filter_TypeDef *Instance; /*!< DFSDM filter instance */
AnnaBridge 172:65be27845400 226 DFSDM_Filter_InitTypeDef Init; /*!< DFSDM filter init parameters */
AnnaBridge 172:65be27845400 227 DMA_HandleTypeDef *hdmaReg; /*!< Pointer on DMA handler for regular conversions */
AnnaBridge 172:65be27845400 228 DMA_HandleTypeDef *hdmaInj; /*!< Pointer on DMA handler for injected conversions */
AnnaBridge 172:65be27845400 229 uint32_t RegularContMode; /*!< Regular conversion continuous mode */
AnnaBridge 172:65be27845400 230 uint32_t RegularTrigger; /*!< Trigger used for regular conversion */
AnnaBridge 172:65be27845400 231 uint32_t InjectedTrigger; /*!< Trigger used for injected conversion */
AnnaBridge 172:65be27845400 232 uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */
AnnaBridge 172:65be27845400 233 FunctionalState InjectedScanMode; /*!< Injected scanning mode */
AnnaBridge 172:65be27845400 234 uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */
AnnaBridge 172:65be27845400 235 uint32_t InjConvRemaining; /*!< Injected conversions remaining */
AnnaBridge 172:65be27845400 236 HAL_DFSDM_Filter_StateTypeDef State; /*!< DFSDM filter state */
AnnaBridge 172:65be27845400 237 uint32_t ErrorCode; /*!< DFSDM filter error code */
AnnaBridge 172:65be27845400 238 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 239 void (*AwdCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 240 uint32_t Channel, uint32_t Threshold); /*!< DFSDM filter analog watchdog callback */
AnnaBridge 172:65be27845400 241 void (*RegConvCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter regular conversion complete callback */
AnnaBridge 172:65be27845400 242 void (*RegConvHalfCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter half regular conversion complete callback */
AnnaBridge 172:65be27845400 243 void (*InjConvCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter injected conversion complete callback */
AnnaBridge 172:65be27845400 244 void (*InjConvHalfCpltCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter half injected conversion complete callback */
AnnaBridge 172:65be27845400 245 void (*ErrorCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter error callback */
AnnaBridge 172:65be27845400 246 void (*MspInitCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter MSP init callback */
AnnaBridge 172:65be27845400 247 void (*MspDeInitCallback) (struct __DFSDM_Filter_HandleTypeDef *hdfsdm_filter); /*!< DFSDM filter MSP de-init callback */
AnnaBridge 172:65be27845400 248 #endif
AnnaBridge 172:65be27845400 249 }DFSDM_Filter_HandleTypeDef;
AnnaBridge 172:65be27845400 250
AnnaBridge 172:65be27845400 251 /**
AnnaBridge 172:65be27845400 252 * @brief DFSDM filter analog watchdog parameters structure definition
AnnaBridge 172:65be27845400 253 */
AnnaBridge 172:65be27845400 254 typedef struct
AnnaBridge 172:65be27845400 255 {
AnnaBridge 172:65be27845400 256 uint32_t DataSource; /*!< Values from digital filter or from channel watchdog filter.
AnnaBridge 172:65be27845400 257 This parameter can be a value of @ref DFSDM_Filter_AwdDataSource */
AnnaBridge 172:65be27845400 258 uint32_t Channel; /*!< Analog watchdog channel selection.
AnnaBridge 172:65be27845400 259 This parameter can be a values combination of @ref DFSDM_Channel_Selection */
AnnaBridge 172:65be27845400 260 int32_t HighThreshold; /*!< High threshold for the analog watchdog.
AnnaBridge 172:65be27845400 261 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
AnnaBridge 172:65be27845400 262 int32_t LowThreshold; /*!< Low threshold for the analog watchdog.
AnnaBridge 172:65be27845400 263 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
AnnaBridge 172:65be27845400 264 uint32_t HighBreakSignal; /*!< Break signal assigned to analog watchdog high threshold event.
AnnaBridge 172:65be27845400 265 This parameter can be a values combination of @ref DFSDM_BreakSignals */
AnnaBridge 172:65be27845400 266 uint32_t LowBreakSignal; /*!< Break signal assigned to analog watchdog low threshold event.
AnnaBridge 172:65be27845400 267 This parameter can be a values combination of @ref DFSDM_BreakSignals */
AnnaBridge 172:65be27845400 268 }DFSDM_Filter_AwdParamTypeDef;
AnnaBridge 172:65be27845400 269
AnnaBridge 172:65be27845400 270 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 271 /**
AnnaBridge 172:65be27845400 272 * @brief DFSDM filter callback ID enumeration definition
AnnaBridge 172:65be27845400 273 */
AnnaBridge 172:65be27845400 274 typedef enum
AnnaBridge 172:65be27845400 275 {
AnnaBridge 172:65be27845400 276 HAL_DFSDM_FILTER_REGCONV_COMPLETE_CB_ID = 0x00U, /*!< DFSDM filter regular conversion complete callback ID */
AnnaBridge 172:65be27845400 277 HAL_DFSDM_FILTER_REGCONV_HALFCOMPLETE_CB_ID = 0x01U, /*!< DFSDM filter half regular conversion complete callback ID */
AnnaBridge 172:65be27845400 278 HAL_DFSDM_FILTER_INJCONV_COMPLETE_CB_ID = 0x02U, /*!< DFSDM filter injected conversion complete callback ID */
AnnaBridge 172:65be27845400 279 HAL_DFSDM_FILTER_INJCONV_HALFCOMPLETE_CB_ID = 0x03U, /*!< DFSDM filter half injected conversion complete callback ID */
AnnaBridge 172:65be27845400 280 HAL_DFSDM_FILTER_ERROR_CB_ID = 0x04U, /*!< DFSDM filter error callback ID */
AnnaBridge 172:65be27845400 281 HAL_DFSDM_FILTER_MSPINIT_CB_ID = 0x05U, /*!< DFSDM filter MSP init callback ID */
AnnaBridge 172:65be27845400 282 HAL_DFSDM_FILTER_MSPDEINIT_CB_ID = 0x06U /*!< DFSDM filter MSP de-init callback ID */
AnnaBridge 172:65be27845400 283 }HAL_DFSDM_Filter_CallbackIDTypeDef;
AnnaBridge 172:65be27845400 284
AnnaBridge 172:65be27845400 285 /**
AnnaBridge 172:65be27845400 286 * @brief DFSDM filter callback pointer definition
AnnaBridge 172:65be27845400 287 */
AnnaBridge 172:65be27845400 288 typedef void (*pDFSDM_Filter_CallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 289 typedef void (*pDFSDM_Filter_AwdCallbackTypeDef)(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
AnnaBridge 172:65be27845400 290 #endif
AnnaBridge 172:65be27845400 291
AnnaBridge 172:65be27845400 292 /**
AnnaBridge 172:65be27845400 293 * @}
AnnaBridge 172:65be27845400 294 */
AnnaBridge 172:65be27845400 295 /* End of exported types -----------------------------------------------------*/
AnnaBridge 172:65be27845400 296
AnnaBridge 172:65be27845400 297 /* Exported constants --------------------------------------------------------*/
AnnaBridge 172:65be27845400 298 /** @defgroup DFSDM_Exported_Constants DFSDM Exported Constants
AnnaBridge 172:65be27845400 299 * @{
AnnaBridge 172:65be27845400 300 */
AnnaBridge 172:65be27845400 301
AnnaBridge 172:65be27845400 302 /** @defgroup DFSDM_Channel_OuputClock DFSDM channel output clock selection
AnnaBridge 172:65be27845400 303 * @{
AnnaBridge 172:65be27845400 304 */
AnnaBridge 172:65be27845400 305 #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM 0x00000000U /*!< Source for ouput clock is system clock */
AnnaBridge 172:65be27845400 306 #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC /*!< Source for ouput clock is audio clock */
AnnaBridge 172:65be27845400 307 /**
AnnaBridge 172:65be27845400 308 * @}
AnnaBridge 172:65be27845400 309 */
AnnaBridge 172:65be27845400 310
AnnaBridge 172:65be27845400 311 /** @defgroup DFSDM_Channel_InputMultiplexer DFSDM channel input multiplexer
AnnaBridge 172:65be27845400 312 * @{
AnnaBridge 172:65be27845400 313 */
AnnaBridge 172:65be27845400 314 #define DFSDM_CHANNEL_EXTERNAL_INPUTS 0x00000000U /*!< Data are taken from external inputs */
AnnaBridge 172:65be27845400 315 #define DFSDM_CHANNEL_ADC_OUTPUT DFSDM_CHCFGR1_DATMPX_0 /*!< Data are taken from ADC output */
AnnaBridge 172:65be27845400 316 #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1 /*!< Data are taken from internal register */
AnnaBridge 172:65be27845400 317 /**
AnnaBridge 172:65be27845400 318 * @}
AnnaBridge 172:65be27845400 319 */
AnnaBridge 172:65be27845400 320
AnnaBridge 172:65be27845400 321 /** @defgroup DFSDM_Channel_DataPacking DFSDM channel input data packing
AnnaBridge 172:65be27845400 322 * @{
AnnaBridge 172:65be27845400 323 */
AnnaBridge 172:65be27845400 324 #define DFSDM_CHANNEL_STANDARD_MODE 0x00000000U /*!< Standard data packing mode */
AnnaBridge 172:65be27845400 325 #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0 /*!< Interleaved data packing mode */
AnnaBridge 172:65be27845400 326 #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1 /*!< Dual data packing mode */
AnnaBridge 172:65be27845400 327 /**
AnnaBridge 172:65be27845400 328 * @}
AnnaBridge 172:65be27845400 329 */
AnnaBridge 172:65be27845400 330
AnnaBridge 172:65be27845400 331 /** @defgroup DFSDM_Channel_InputPins DFSDM channel input pins
AnnaBridge 172:65be27845400 332 * @{
AnnaBridge 172:65be27845400 333 */
AnnaBridge 172:65be27845400 334 #define DFSDM_CHANNEL_SAME_CHANNEL_PINS 0x00000000U /*!< Input from pins on same channel */
AnnaBridge 172:65be27845400 335 #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL /*!< Input from pins on following channel */
AnnaBridge 172:65be27845400 336 /**
AnnaBridge 172:65be27845400 337 * @}
AnnaBridge 172:65be27845400 338 */
AnnaBridge 172:65be27845400 339
AnnaBridge 172:65be27845400 340 /** @defgroup DFSDM_Channel_SerialInterfaceType DFSDM channel serial interface type
AnnaBridge 172:65be27845400 341 * @{
AnnaBridge 172:65be27845400 342 */
AnnaBridge 172:65be27845400 343 #define DFSDM_CHANNEL_SPI_RISING 0x00000000U /*!< SPI with rising edge */
AnnaBridge 172:65be27845400 344 #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0 /*!< SPI with falling edge */
AnnaBridge 172:65be27845400 345 #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1 /*!< Manchester with rising edge */
AnnaBridge 172:65be27845400 346 #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP /*!< Manchester with falling edge */
AnnaBridge 172:65be27845400 347 /**
AnnaBridge 172:65be27845400 348 * @}
AnnaBridge 172:65be27845400 349 */
AnnaBridge 172:65be27845400 350
AnnaBridge 172:65be27845400 351 /** @defgroup DFSDM_Channel_SpiClock DFSDM channel SPI clock selection
AnnaBridge 172:65be27845400 352 * @{
AnnaBridge 172:65be27845400 353 */
AnnaBridge 172:65be27845400 354 #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL 0x00000000U /*!< External SPI clock */
AnnaBridge 172:65be27845400 355 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0 /*!< Internal SPI clock */
AnnaBridge 172:65be27845400 356 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1 /*!< Internal SPI clock divided by 2, falling edge */
AnnaBridge 172:65be27845400 357 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL /*!< Internal SPI clock divided by 2, rising edge */
AnnaBridge 172:65be27845400 358 /**
AnnaBridge 172:65be27845400 359 * @}
AnnaBridge 172:65be27845400 360 */
AnnaBridge 172:65be27845400 361
AnnaBridge 172:65be27845400 362 /** @defgroup DFSDM_Channel_AwdFilterOrder DFSDM channel analog watchdog filter order
AnnaBridge 172:65be27845400 363 * @{
AnnaBridge 172:65be27845400 364 */
AnnaBridge 172:65be27845400 365 #define DFSDM_CHANNEL_FASTSINC_ORDER 0x00000000U /*!< FastSinc filter type */
AnnaBridge 172:65be27845400 366 #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_CHAWSCDR_AWFORD_0 /*!< Sinc 1 filter type */
AnnaBridge 172:65be27845400 367 #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_CHAWSCDR_AWFORD_1 /*!< Sinc 2 filter type */
AnnaBridge 172:65be27845400 368 #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_CHAWSCDR_AWFORD /*!< Sinc 3 filter type */
AnnaBridge 172:65be27845400 369 /**
AnnaBridge 172:65be27845400 370 * @}
AnnaBridge 172:65be27845400 371 */
AnnaBridge 172:65be27845400 372
AnnaBridge 172:65be27845400 373 /** @defgroup DFSDM_Filter_Trigger DFSDM filter conversion trigger
AnnaBridge 172:65be27845400 374 * @{
AnnaBridge 172:65be27845400 375 */
AnnaBridge 172:65be27845400 376 #define DFSDM_FILTER_SW_TRIGGER 0x00000000U /*!< Software trigger */
AnnaBridge 172:65be27845400 377 #define DFSDM_FILTER_SYNC_TRIGGER 0x00000001U /*!< Synchronous with DFSDM_FLT0 */
AnnaBridge 172:65be27845400 378 #define DFSDM_FILTER_EXT_TRIGGER 0x00000002U /*!< External trigger (only for injected conversion) */
AnnaBridge 172:65be27845400 379 /**
AnnaBridge 172:65be27845400 380 * @}
AnnaBridge 172:65be27845400 381 */
AnnaBridge 172:65be27845400 382
AnnaBridge 172:65be27845400 383 /** @defgroup DFSDM_Filter_ExtTrigger DFSDM filter external trigger
AnnaBridge 172:65be27845400 384 * @{
AnnaBridge 172:65be27845400 385 */
AnnaBridge 172:65be27845400 386 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO 0x00000000U /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 387 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_FLTCR1_JEXTSEL_0 /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 388 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_FLTCR1_JEXTSEL_1 /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 389 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2 (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM 0, 1 and 2 */
AnnaBridge 172:65be27845400 390 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO DFSDM_FLTCR1_JEXTSEL_2 /*!< For DFSDM 3 */
AnnaBridge 172:65be27845400 391 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM 0, 1 and 2 */
AnnaBridge 172:65be27845400 392 #define DFSDM_FILTER_EXT_TRIG_TIM16_OC1 (DFSDM_FLTCR1_JEXTSEL_2 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM 3 */
AnnaBridge 172:65be27845400 393 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_FLTCR1_JEXTSEL_0 | DFSDM_FLTCR1_JEXTSEL_2 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM 0 and 1 */
AnnaBridge 172:65be27845400 394 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO DFSDM_FLTCR1_JEXTSEL_3 /*!< For DFSDM 2 and 3 */
AnnaBridge 172:65be27845400 395 #define DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG1 (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_0)
AnnaBridge 172:65be27845400 396 #define DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG3 (DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1)
AnnaBridge 172:65be27845400 397 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3) /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 398 #define DFSDM_FILTER_EXT_TRIG_EXTI15 (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_0) /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 399 #define DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1) /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 400 #define DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_1 | DFSDM_FLTCR1_JEXTSEL_0) /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 401 #define DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT (DFSDM_FLTCR1_JEXTSEL_4 | DFSDM_FLTCR1_JEXTSEL_3 | DFSDM_FLTCR1_JEXTSEL_2) /*!< For DFSDM 0, 1, 2 and 3 */
AnnaBridge 172:65be27845400 402 /**
AnnaBridge 172:65be27845400 403 * @}
AnnaBridge 172:65be27845400 404 */
AnnaBridge 172:65be27845400 405
AnnaBridge 172:65be27845400 406 /** @defgroup DFSDM_Filter_ExtTriggerEdge DFSDM filter external trigger edge
AnnaBridge 172:65be27845400 407 * @{
AnnaBridge 172:65be27845400 408 */
AnnaBridge 172:65be27845400 409 #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_FLTCR1_JEXTEN_0 /*!< External rising edge */
AnnaBridge 172:65be27845400 410 #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_FLTCR1_JEXTEN_1 /*!< External falling edge */
AnnaBridge 172:65be27845400 411 #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_FLTCR1_JEXTEN /*!< External rising and falling edges */
AnnaBridge 172:65be27845400 412 /**
AnnaBridge 172:65be27845400 413 * @}
AnnaBridge 172:65be27845400 414 */
AnnaBridge 172:65be27845400 415
AnnaBridge 172:65be27845400 416 /** @defgroup DFSDM_Filter_SincOrder DFSDM filter sinc order
AnnaBridge 172:65be27845400 417 * @{
AnnaBridge 172:65be27845400 418 */
AnnaBridge 172:65be27845400 419 #define DFSDM_FILTER_FASTSINC_ORDER 0x00000000U /*!< FastSinc filter type */
AnnaBridge 172:65be27845400 420 #define DFSDM_FILTER_SINC1_ORDER DFSDM_FLTFCR_FORD_0 /*!< Sinc 1 filter type */
AnnaBridge 172:65be27845400 421 #define DFSDM_FILTER_SINC2_ORDER DFSDM_FLTFCR_FORD_1 /*!< Sinc 2 filter type */
AnnaBridge 172:65be27845400 422 #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_1) /*!< Sinc 3 filter type */
AnnaBridge 172:65be27845400 423 #define DFSDM_FILTER_SINC4_ORDER DFSDM_FLTFCR_FORD_2 /*!< Sinc 4 filter type */
AnnaBridge 172:65be27845400 424 #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FLTFCR_FORD_0 | DFSDM_FLTFCR_FORD_2) /*!< Sinc 5 filter type */
AnnaBridge 172:65be27845400 425 /**
AnnaBridge 172:65be27845400 426 * @}
AnnaBridge 172:65be27845400 427 */
AnnaBridge 172:65be27845400 428
AnnaBridge 172:65be27845400 429 /** @defgroup DFSDM_Filter_AwdDataSource DFSDM filter analog watchdog data source
AnnaBridge 172:65be27845400 430 * @{
AnnaBridge 172:65be27845400 431 */
AnnaBridge 172:65be27845400 432 #define DFSDM_FILTER_AWD_FILTER_DATA 0x00000000U /*!< From digital filter */
AnnaBridge 172:65be27845400 433 #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_FLTCR1_AWFSEL /*!< From analog watchdog channel */
AnnaBridge 172:65be27845400 434 /**
AnnaBridge 172:65be27845400 435 * @}
AnnaBridge 172:65be27845400 436 */
AnnaBridge 172:65be27845400 437
AnnaBridge 172:65be27845400 438 /** @defgroup DFSDM_Filter_ErrorCode DFSDM filter error code
AnnaBridge 172:65be27845400 439 * @{
AnnaBridge 172:65be27845400 440 */
AnnaBridge 172:65be27845400 441 #define DFSDM_FILTER_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 172:65be27845400 442 #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN 0x00000001U /*!< Overrun occurs during regular conversion */
AnnaBridge 172:65be27845400 443 #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN 0x00000002U /*!< Overrun occurs during injected conversion */
AnnaBridge 172:65be27845400 444 #define DFSDM_FILTER_ERROR_DMA 0x00000003U /*!< DMA error occurs */
AnnaBridge 172:65be27845400 445 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 446 #define DFSDM_FILTER_ERROR_INVALID_CALLBACK 0x00000004U /*!< Invalid callback error occurs */
AnnaBridge 172:65be27845400 447 #endif
AnnaBridge 172:65be27845400 448 /**
AnnaBridge 172:65be27845400 449 * @}
AnnaBridge 172:65be27845400 450 */
AnnaBridge 172:65be27845400 451
AnnaBridge 172:65be27845400 452 /** @defgroup DFSDM_BreakSignals DFSDM break signals
AnnaBridge 172:65be27845400 453 * @{
AnnaBridge 172:65be27845400 454 */
AnnaBridge 172:65be27845400 455 #define DFSDM_NO_BREAK_SIGNAL 0x00000000U /*!< No break signal */
AnnaBridge 172:65be27845400 456 #define DFSDM_BREAK_SIGNAL_0 0x00000001U /*!< Break signal 0 */
AnnaBridge 172:65be27845400 457 #define DFSDM_BREAK_SIGNAL_1 0x00000002U /*!< Break signal 1 */
AnnaBridge 172:65be27845400 458 #define DFSDM_BREAK_SIGNAL_2 0x00000004U /*!< Break signal 2 */
AnnaBridge 172:65be27845400 459 #define DFSDM_BREAK_SIGNAL_3 0x00000008U /*!< Break signal 3 */
AnnaBridge 172:65be27845400 460 /**
AnnaBridge 172:65be27845400 461 * @}
AnnaBridge 172:65be27845400 462 */
AnnaBridge 172:65be27845400 463
AnnaBridge 172:65be27845400 464 /** @defgroup DFSDM_Channel_Selection DFSDM Channel Selection
AnnaBridge 172:65be27845400 465 * @{
AnnaBridge 172:65be27845400 466 */
AnnaBridge 172:65be27845400 467 /* DFSDM Channels ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 468 /* The DFSDM channels are defined as follows:
AnnaBridge 172:65be27845400 469 - in 16-bit LSB the channel mask is set
AnnaBridge 172:65be27845400 470 - in 16-bit MSB the channel number is set
AnnaBridge 172:65be27845400 471 e.g. for channel 5 definition:
AnnaBridge 172:65be27845400 472 - the channel mask is 0x00000020 (bit 5 is set)
AnnaBridge 172:65be27845400 473 - the channel number 5 is 0x00050000
AnnaBridge 172:65be27845400 474 --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */
AnnaBridge 172:65be27845400 475 #define DFSDM_CHANNEL_0 0x00000001U
AnnaBridge 172:65be27845400 476 #define DFSDM_CHANNEL_1 0x00010002U
AnnaBridge 172:65be27845400 477 #define DFSDM_CHANNEL_2 0x00020004U
AnnaBridge 172:65be27845400 478 #define DFSDM_CHANNEL_3 0x00030008U
AnnaBridge 172:65be27845400 479 #define DFSDM_CHANNEL_4 0x00040010U
AnnaBridge 172:65be27845400 480 #define DFSDM_CHANNEL_5 0x00050020U
AnnaBridge 172:65be27845400 481 #define DFSDM_CHANNEL_6 0x00060040U
AnnaBridge 172:65be27845400 482 #define DFSDM_CHANNEL_7 0x00070080U
AnnaBridge 172:65be27845400 483 /**
AnnaBridge 172:65be27845400 484 * @}
AnnaBridge 172:65be27845400 485 */
AnnaBridge 172:65be27845400 486
AnnaBridge 172:65be27845400 487 /** @defgroup DFSDM_ContinuousMode DFSDM Continuous Mode
AnnaBridge 172:65be27845400 488 * @{
AnnaBridge 172:65be27845400 489 */
AnnaBridge 172:65be27845400 490 #define DFSDM_CONTINUOUS_CONV_OFF 0x00000000U /*!< Conversion are not continuous */
AnnaBridge 172:65be27845400 491 #define DFSDM_CONTINUOUS_CONV_ON 0x00000001U /*!< Conversion are continuous */
AnnaBridge 172:65be27845400 492 /**
AnnaBridge 172:65be27845400 493 * @}
AnnaBridge 172:65be27845400 494 */
AnnaBridge 172:65be27845400 495
AnnaBridge 172:65be27845400 496 /** @defgroup DFSDM_AwdThreshold DFSDM analog watchdog threshold
AnnaBridge 172:65be27845400 497 * @{
AnnaBridge 172:65be27845400 498 */
AnnaBridge 172:65be27845400 499 #define DFSDM_AWD_HIGH_THRESHOLD 0x00000000U /*!< Analog watchdog high threshold */
AnnaBridge 172:65be27845400 500 #define DFSDM_AWD_LOW_THRESHOLD 0x00000001U /*!< Analog watchdog low threshold */
AnnaBridge 172:65be27845400 501 /**
AnnaBridge 172:65be27845400 502 * @}
AnnaBridge 172:65be27845400 503 */
AnnaBridge 172:65be27845400 504
AnnaBridge 172:65be27845400 505 /**
AnnaBridge 172:65be27845400 506 * @}
AnnaBridge 172:65be27845400 507 */
AnnaBridge 172:65be27845400 508 /* End of exported constants -------------------------------------------------*/
AnnaBridge 172:65be27845400 509
AnnaBridge 172:65be27845400 510 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 172:65be27845400 511 /** @defgroup DFSDM_Exported_Macros DFSDM Exported Macros
AnnaBridge 172:65be27845400 512 * @{
AnnaBridge 172:65be27845400 513 */
AnnaBridge 172:65be27845400 514
AnnaBridge 172:65be27845400 515 /** @brief Reset DFSDM channel handle state.
AnnaBridge 172:65be27845400 516 * @param __HANDLE__ DFSDM channel handle.
AnnaBridge 172:65be27845400 517 * @retval None
AnnaBridge 172:65be27845400 518 */
AnnaBridge 172:65be27845400 519 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 520 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 172:65be27845400 521 (__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET; \
AnnaBridge 172:65be27845400 522 (__HANDLE__)->MspInitCallback = NULL; \
AnnaBridge 172:65be27845400 523 (__HANDLE__)->MspDeInitCallback = NULL; \
AnnaBridge 172:65be27845400 524 } while(0)
AnnaBridge 172:65be27845400 525 #else
AnnaBridge 172:65be27845400 526 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
AnnaBridge 172:65be27845400 527 #endif
AnnaBridge 172:65be27845400 528
AnnaBridge 172:65be27845400 529 /** @brief Reset DFSDM filter handle state.
AnnaBridge 172:65be27845400 530 * @param __HANDLE__ DFSDM filter handle.
AnnaBridge 172:65be27845400 531 * @retval None
AnnaBridge 172:65be27845400 532 */
AnnaBridge 172:65be27845400 533 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 534 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 172:65be27845400 535 (__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET; \
AnnaBridge 172:65be27845400 536 (__HANDLE__)->MspInitCallback = NULL; \
AnnaBridge 172:65be27845400 537 (__HANDLE__)->MspDeInitCallback = NULL; \
AnnaBridge 172:65be27845400 538 } while(0)
AnnaBridge 172:65be27845400 539 #else
AnnaBridge 172:65be27845400 540 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)
AnnaBridge 172:65be27845400 541 #endif
AnnaBridge 172:65be27845400 542
AnnaBridge 172:65be27845400 543 /**
AnnaBridge 172:65be27845400 544 * @}
AnnaBridge 172:65be27845400 545 */
AnnaBridge 172:65be27845400 546 /* End of exported macros ----------------------------------------------------*/
AnnaBridge 172:65be27845400 547
AnnaBridge 172:65be27845400 548 /* Exported functions --------------------------------------------------------*/
AnnaBridge 172:65be27845400 549 /** @addtogroup DFSDM_Exported_Functions DFSDM Exported Functions
AnnaBridge 172:65be27845400 550 * @{
AnnaBridge 172:65be27845400 551 */
AnnaBridge 172:65be27845400 552
AnnaBridge 172:65be27845400 553 /** @addtogroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
AnnaBridge 172:65be27845400 554 * @{
AnnaBridge 172:65be27845400 555 */
AnnaBridge 172:65be27845400 556 /* Channel initialization and de-initialization functions *********************/
AnnaBridge 172:65be27845400 557 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 558 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 559 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 560 void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 561
AnnaBridge 172:65be27845400 562 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 563 /* Channel callbacks register/unregister functions ****************************/
AnnaBridge 172:65be27845400 564 HAL_StatusTypeDef HAL_DFSDM_Channel_RegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
AnnaBridge 172:65be27845400 565 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID,
AnnaBridge 172:65be27845400 566 pDFSDM_Channel_CallbackTypeDef pCallback);
AnnaBridge 172:65be27845400 567 HAL_StatusTypeDef HAL_DFSDM_Channel_UnRegisterCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel,
AnnaBridge 172:65be27845400 568 HAL_DFSDM_Channel_CallbackIDTypeDef CallbackID);
AnnaBridge 172:65be27845400 569 #endif
AnnaBridge 172:65be27845400 570 /**
AnnaBridge 172:65be27845400 571 * @}
AnnaBridge 172:65be27845400 572 */
AnnaBridge 172:65be27845400 573
AnnaBridge 172:65be27845400 574 /** @addtogroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
AnnaBridge 172:65be27845400 575 * @{
AnnaBridge 172:65be27845400 576 */
AnnaBridge 172:65be27845400 577 /* Channel operation functions ************************************************/
AnnaBridge 172:65be27845400 578 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 579 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 580 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 581 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 582
AnnaBridge 172:65be27845400 583 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
AnnaBridge 172:65be27845400 584 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
AnnaBridge 172:65be27845400 585 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 586 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 587
AnnaBridge 172:65be27845400 588 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 589 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset);
AnnaBridge 172:65be27845400 590
AnnaBridge 172:65be27845400 591 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
AnnaBridge 172:65be27845400 592 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
AnnaBridge 172:65be27845400 593
AnnaBridge 172:65be27845400 594 void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 595 void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 596 /**
AnnaBridge 172:65be27845400 597 * @}
AnnaBridge 172:65be27845400 598 */
AnnaBridge 172:65be27845400 599
AnnaBridge 172:65be27845400 600 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
AnnaBridge 172:65be27845400 601 * @{
AnnaBridge 172:65be27845400 602 */
AnnaBridge 172:65be27845400 603 /* Channel state function *****************************************************/
AnnaBridge 172:65be27845400 604 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
AnnaBridge 172:65be27845400 605 /**
AnnaBridge 172:65be27845400 606 * @}
AnnaBridge 172:65be27845400 607 */
AnnaBridge 172:65be27845400 608
AnnaBridge 172:65be27845400 609 /** @addtogroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
AnnaBridge 172:65be27845400 610 * @{
AnnaBridge 172:65be27845400 611 */
AnnaBridge 172:65be27845400 612 /* Filter initialization and de-initialization functions *********************/
AnnaBridge 172:65be27845400 613 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 614 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 615 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 616 void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 617
AnnaBridge 172:65be27845400 618 #if (USE_HAL_DFSDM_REGISTER_CALLBACKS == 1)
AnnaBridge 172:65be27845400 619 /* Filter callbacks register/unregister functions ****************************/
AnnaBridge 172:65be27845400 620 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 621 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID,
AnnaBridge 172:65be27845400 622 pDFSDM_Filter_CallbackTypeDef pCallback);
AnnaBridge 172:65be27845400 623 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 624 HAL_DFSDM_Filter_CallbackIDTypeDef CallbackID);
AnnaBridge 172:65be27845400 625 HAL_StatusTypeDef HAL_DFSDM_Filter_RegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 626 pDFSDM_Filter_AwdCallbackTypeDef pCallback);
AnnaBridge 172:65be27845400 627 HAL_StatusTypeDef HAL_DFSDM_Filter_UnRegisterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 628 #endif
AnnaBridge 172:65be27845400 629 /**
AnnaBridge 172:65be27845400 630 * @}
AnnaBridge 172:65be27845400 631 */
AnnaBridge 172:65be27845400 632
AnnaBridge 172:65be27845400 633 /** @addtogroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
AnnaBridge 172:65be27845400 634 * @{
AnnaBridge 172:65be27845400 635 */
AnnaBridge 172:65be27845400 636 /* Filter control functions *********************/
AnnaBridge 172:65be27845400 637 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 638 uint32_t Channel,
AnnaBridge 172:65be27845400 639 uint32_t ContinuousMode);
AnnaBridge 172:65be27845400 640 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 641 uint32_t Channel);
AnnaBridge 172:65be27845400 642 /**
AnnaBridge 172:65be27845400 643 * @}
AnnaBridge 172:65be27845400 644 */
AnnaBridge 172:65be27845400 645
AnnaBridge 172:65be27845400 646 /** @addtogroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
AnnaBridge 172:65be27845400 647 * @{
AnnaBridge 172:65be27845400 648 */
AnnaBridge 172:65be27845400 649 /* Filter operation functions *********************/
AnnaBridge 172:65be27845400 650 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 651 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 652 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
AnnaBridge 172:65be27845400 653 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
AnnaBridge 172:65be27845400 654 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 655 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 656 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 657 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 658 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 659 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
AnnaBridge 172:65be27845400 660 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
AnnaBridge 172:65be27845400 661 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 662 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 663 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 664 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
AnnaBridge 172:65be27845400 665 DFSDM_Filter_AwdParamTypeDef* awdParam);
AnnaBridge 172:65be27845400 666 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 667 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel);
AnnaBridge 172:65be27845400 668 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 669
AnnaBridge 172:65be27845400 670 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
AnnaBridge 172:65be27845400 671 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
AnnaBridge 172:65be27845400 672 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
AnnaBridge 172:65be27845400 673 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
AnnaBridge 172:65be27845400 674 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 675
AnnaBridge 172:65be27845400 676 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 677
AnnaBridge 172:65be27845400 678 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
AnnaBridge 172:65be27845400 679 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
AnnaBridge 172:65be27845400 680
AnnaBridge 172:65be27845400 681 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 682 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 683 void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 684 void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 685 void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
AnnaBridge 172:65be27845400 686 void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 687 /**
AnnaBridge 172:65be27845400 688 * @}
AnnaBridge 172:65be27845400 689 */
AnnaBridge 172:65be27845400 690
AnnaBridge 172:65be27845400 691 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
AnnaBridge 172:65be27845400 692 * @{
AnnaBridge 172:65be27845400 693 */
AnnaBridge 172:65be27845400 694 /* Filter state functions *****************************************************/
AnnaBridge 172:65be27845400 695 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 696 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
AnnaBridge 172:65be27845400 697 /**
AnnaBridge 172:65be27845400 698 * @}
AnnaBridge 172:65be27845400 699 */
AnnaBridge 172:65be27845400 700
AnnaBridge 172:65be27845400 701 /**
AnnaBridge 172:65be27845400 702 * @}
AnnaBridge 172:65be27845400 703 */
AnnaBridge 172:65be27845400 704 /* End of exported functions -------------------------------------------------*/
AnnaBridge 172:65be27845400 705
AnnaBridge 172:65be27845400 706 /* Private macros ------------------------------------------------------------*/
AnnaBridge 172:65be27845400 707 /** @defgroup DFSDM_Private_Macros DFSDM Private Macros
AnnaBridge 172:65be27845400 708 * @{
AnnaBridge 172:65be27845400 709 */
AnnaBridge 172:65be27845400 710 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \
AnnaBridge 172:65be27845400 711 ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO))
AnnaBridge 172:65be27845400 712 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2U <= (DIVIDER)) && ((DIVIDER) <= 256U))
AnnaBridge 172:65be27845400 713 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
AnnaBridge 172:65be27845400 714 ((INPUT) == DFSDM_CHANNEL_ADC_OUTPUT) || \
AnnaBridge 172:65be27845400 715 ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
AnnaBridge 172:65be27845400 716 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \
AnnaBridge 172:65be27845400 717 ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
AnnaBridge 172:65be27845400 718 ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
AnnaBridge 172:65be27845400 719 #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \
AnnaBridge 172:65be27845400 720 ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS))
AnnaBridge 172:65be27845400 721 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \
AnnaBridge 172:65be27845400 722 ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
AnnaBridge 172:65be27845400 723 ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
AnnaBridge 172:65be27845400 724 ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
AnnaBridge 172:65be27845400 725 #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \
AnnaBridge 172:65be27845400 726 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \
AnnaBridge 172:65be27845400 727 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \
AnnaBridge 172:65be27845400 728 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING))
AnnaBridge 172:65be27845400 729 #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \
AnnaBridge 172:65be27845400 730 ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \
AnnaBridge 172:65be27845400 731 ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \
AnnaBridge 172:65be27845400 732 ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER))
AnnaBridge 172:65be27845400 733 #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 32U))
AnnaBridge 172:65be27845400 734 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
AnnaBridge 172:65be27845400 735 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1FU)
AnnaBridge 172:65be27845400 736 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFFU)
AnnaBridge 172:65be27845400 737 #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
AnnaBridge 172:65be27845400 738 ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER))
AnnaBridge 172:65be27845400 739 #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
AnnaBridge 172:65be27845400 740 ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \
AnnaBridge 172:65be27845400 741 ((TRIG) == DFSDM_FILTER_EXT_TRIGGER))
AnnaBridge 172:65be27845400 742 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
AnnaBridge 172:65be27845400 743 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
AnnaBridge 172:65be27845400 744 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
AnnaBridge 172:65be27845400 745 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
AnnaBridge 172:65be27845400 746 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
AnnaBridge 172:65be27845400 747 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
AnnaBridge 172:65be27845400 748 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
AnnaBridge 172:65be27845400 749 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
AnnaBridge 172:65be27845400 750 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
AnnaBridge 172:65be27845400 751 ((TRIG) == DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG1) || \
AnnaBridge 172:65be27845400 752 ((TRIG) == DFSDM_FILTER_EXT_TRIG_HRTIM1_ADCTRG3) || \
AnnaBridge 172:65be27845400 753 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
AnnaBridge 172:65be27845400 754 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15) || \
AnnaBridge 172:65be27845400 755 ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM1_OUT) || \
AnnaBridge 172:65be27845400 756 ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT) || \
AnnaBridge 172:65be27845400 757 ((TRIG) == DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT))
AnnaBridge 172:65be27845400 758 #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \
AnnaBridge 172:65be27845400 759 ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \
AnnaBridge 172:65be27845400 760 ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES))
AnnaBridge 172:65be27845400 761 #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \
AnnaBridge 172:65be27845400 762 ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \
AnnaBridge 172:65be27845400 763 ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \
AnnaBridge 172:65be27845400 764 ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \
AnnaBridge 172:65be27845400 765 ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \
AnnaBridge 172:65be27845400 766 ((ORDER) == DFSDM_FILTER_SINC5_ORDER))
AnnaBridge 172:65be27845400 767 #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 1024U))
AnnaBridge 172:65be27845400 768 #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1U <= (RATIO)) && ((RATIO) <= 256U))
AnnaBridge 172:65be27845400 769 #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \
AnnaBridge 172:65be27845400 770 ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA))
AnnaBridge 172:65be27845400 771 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
AnnaBridge 172:65be27845400 772 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0xFU)
AnnaBridge 172:65be27845400 773 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
AnnaBridge 172:65be27845400 774 ((CHANNEL) == DFSDM_CHANNEL_1) || \
AnnaBridge 172:65be27845400 775 ((CHANNEL) == DFSDM_CHANNEL_2) || \
AnnaBridge 172:65be27845400 776 ((CHANNEL) == DFSDM_CHANNEL_3) || \
AnnaBridge 172:65be27845400 777 ((CHANNEL) == DFSDM_CHANNEL_4) || \
AnnaBridge 172:65be27845400 778 ((CHANNEL) == DFSDM_CHANNEL_5) || \
AnnaBridge 172:65be27845400 779 ((CHANNEL) == DFSDM_CHANNEL_6) || \
AnnaBridge 172:65be27845400 780 ((CHANNEL) == DFSDM_CHANNEL_7))
AnnaBridge 172:65be27845400 781 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0U) && ((CHANNEL) <= 0x000F00FFU))
AnnaBridge 172:65be27845400 782 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \
AnnaBridge 172:65be27845400 783 ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
AnnaBridge 172:65be27845400 784 /**
AnnaBridge 172:65be27845400 785 * @}
AnnaBridge 172:65be27845400 786 */
AnnaBridge 172:65be27845400 787 /* End of private macros -----------------------------------------------------*/
AnnaBridge 172:65be27845400 788
AnnaBridge 172:65be27845400 789 /**
AnnaBridge 172:65be27845400 790 * @}
AnnaBridge 172:65be27845400 791 */
AnnaBridge 172:65be27845400 792
AnnaBridge 172:65be27845400 793 /**
AnnaBridge 172:65be27845400 794 * @}
AnnaBridge 172:65be27845400 795 */
AnnaBridge 172:65be27845400 796
AnnaBridge 172:65be27845400 797 #ifdef __cplusplus
AnnaBridge 172:65be27845400 798 }
AnnaBridge 172:65be27845400 799 #endif
AnnaBridge 172:65be27845400 800
AnnaBridge 172:65be27845400 801 #endif /* STM32H7xx_HAL_DFSDM_H */
AnnaBridge 172:65be27845400 802
AnnaBridge 172:65be27845400 803 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/