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TARGET_NUCLEO_F767ZI/TOOLCHAIN_ARM_MICRO/stm32f7xx_hal_pcd.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f7xx_hal_pcd.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of PCD HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F7xx_HAL_PCD_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F7xx_HAL_PCD_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f7xx_ll_usb.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F7xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /** @addtogroup PCD
AnnaBridge 171:3a7713b1edbc 52 * @{
AnnaBridge 171:3a7713b1edbc 53 */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 56 /** @defgroup PCD_Exported_Types PCD Exported Types
AnnaBridge 171:3a7713b1edbc 57 * @{
AnnaBridge 171:3a7713b1edbc 58 */
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /**
AnnaBridge 171:3a7713b1edbc 61 * @brief PCD State structure definition
AnnaBridge 171:3a7713b1edbc 62 */
AnnaBridge 171:3a7713b1edbc 63 typedef enum
AnnaBridge 171:3a7713b1edbc 64 {
AnnaBridge 171:3a7713b1edbc 65 HAL_PCD_STATE_RESET = 0x00U,
AnnaBridge 171:3a7713b1edbc 66 HAL_PCD_STATE_READY = 0x01U,
AnnaBridge 171:3a7713b1edbc 67 HAL_PCD_STATE_ERROR = 0x02U,
AnnaBridge 171:3a7713b1edbc 68 HAL_PCD_STATE_BUSY = 0x03U,
AnnaBridge 171:3a7713b1edbc 69 HAL_PCD_STATE_TIMEOUT = 0x04U
AnnaBridge 171:3a7713b1edbc 70 } PCD_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 /* Device LPM suspend state */
AnnaBridge 171:3a7713b1edbc 73 typedef enum
AnnaBridge 171:3a7713b1edbc 74 {
AnnaBridge 171:3a7713b1edbc 75 LPM_L0 = 0x00U, /* on */
AnnaBridge 171:3a7713b1edbc 76 LPM_L1 = 0x01U, /* LPM L1 sleep */
AnnaBridge 171:3a7713b1edbc 77 LPM_L2 = 0x02U, /* suspend */
AnnaBridge 171:3a7713b1edbc 78 LPM_L3 = 0x03U, /* off */
AnnaBridge 171:3a7713b1edbc 79 }PCD_LPM_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 typedef USB_OTG_GlobalTypeDef PCD_TypeDef;
AnnaBridge 171:3a7713b1edbc 82 typedef USB_OTG_CfgTypeDef PCD_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 83 typedef USB_OTG_EPTypeDef PCD_EPTypeDef ;
AnnaBridge 171:3a7713b1edbc 84 typedef struct
AnnaBridge 171:3a7713b1edbc 85 {
AnnaBridge 171:3a7713b1edbc 86 HAL_LockTypeDef Lock;
AnnaBridge 171:3a7713b1edbc 87 } PCD_EPLockDef;
AnnaBridge 171:3a7713b1edbc 88 /**
AnnaBridge 171:3a7713b1edbc 89 * @brief PCD Handle Structure definition
AnnaBridge 171:3a7713b1edbc 90 */
AnnaBridge 171:3a7713b1edbc 91 typedef struct
AnnaBridge 171:3a7713b1edbc 92 {
AnnaBridge 171:3a7713b1edbc 93 PCD_TypeDef *Instance; /*!< Register base address */
AnnaBridge 171:3a7713b1edbc 94 PCD_InitTypeDef Init; /*!< PCD required parameters */
AnnaBridge 171:3a7713b1edbc 95 PCD_EPTypeDef IN_ep[16]; /*!< IN endpoint parameters */
AnnaBridge 171:3a7713b1edbc 96 PCD_EPTypeDef OUT_ep[16]; /*!< OUT endpoint parameters */
AnnaBridge 171:3a7713b1edbc 97 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
AnnaBridge 171:3a7713b1edbc 98 PCD_EPLockDef EPLock[15];
AnnaBridge 171:3a7713b1edbc 99 __IO PCD_StateTypeDef State; /*!< PCD communication state */
AnnaBridge 171:3a7713b1edbc 100 uint32_t Setup[12]; /*!< Setup packet buffer */
AnnaBridge 171:3a7713b1edbc 101 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
AnnaBridge 171:3a7713b1edbc 102 uint32_t BESL;
AnnaBridge 171:3a7713b1edbc 103 uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
AnnaBridge 171:3a7713b1edbc 104 This parameter can be set to ENABLE or DISABLE */
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
AnnaBridge 171:3a7713b1edbc 107 This parameter can be set to ENABLE or DISABLE */
AnnaBridge 171:3a7713b1edbc 108 void *pData; /*!< Pointer to upper stack Handler */
AnnaBridge 171:3a7713b1edbc 109 } PCD_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 /**
AnnaBridge 171:3a7713b1edbc 112 * @}
AnnaBridge 171:3a7713b1edbc 113 */
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 /* Include PCD HAL Extension module */
AnnaBridge 171:3a7713b1edbc 116 #include "stm32f7xx_hal_pcd_ex.h"
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 119 /** @defgroup PCD_Exported_Constants PCD Exported Constants
AnnaBridge 171:3a7713b1edbc 120 * @{
AnnaBridge 171:3a7713b1edbc 121 */
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 /** @defgroup PCD_Speed PCD Speed
AnnaBridge 171:3a7713b1edbc 124 * @{
AnnaBridge 171:3a7713b1edbc 125 */
AnnaBridge 171:3a7713b1edbc 126 #define PCD_SPEED_HIGH 0U
AnnaBridge 171:3a7713b1edbc 127 #define PCD_SPEED_HIGH_IN_FULL 1U
AnnaBridge 171:3a7713b1edbc 128 #define PCD_SPEED_FULL 2U
AnnaBridge 171:3a7713b1edbc 129 /**
AnnaBridge 171:3a7713b1edbc 130 * @}
AnnaBridge 171:3a7713b1edbc 131 */
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 /** @defgroup PCD_PHY_Module PCD PHY Module
AnnaBridge 171:3a7713b1edbc 134 * @{
AnnaBridge 171:3a7713b1edbc 135 */
AnnaBridge 171:3a7713b1edbc 136 #define PCD_PHY_ULPI 1U
AnnaBridge 171:3a7713b1edbc 137 #define PCD_PHY_EMBEDDED 2U
AnnaBridge 171:3a7713b1edbc 138 #define PCD_PHY_UTMI 3U
AnnaBridge 171:3a7713b1edbc 139 /**
AnnaBridge 171:3a7713b1edbc 140 * @}
AnnaBridge 171:3a7713b1edbc 141 */
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 /** @defgroup PCD_Turnaround_Timeout Turnaround Timeout Value
AnnaBridge 171:3a7713b1edbc 144 * @{
AnnaBridge 171:3a7713b1edbc 145 */
AnnaBridge 171:3a7713b1edbc 146 #ifndef USBD_HS_TRDT_VALUE
AnnaBridge 171:3a7713b1edbc 147 #define USBD_HS_TRDT_VALUE 9U
AnnaBridge 171:3a7713b1edbc 148 #endif /* USBD_HS_TRDT_VALUE */
AnnaBridge 171:3a7713b1edbc 149 #ifndef USBD_FS_TRDT_VALUE
AnnaBridge 171:3a7713b1edbc 150 #define USBD_FS_TRDT_VALUE 5U
AnnaBridge 171:3a7713b1edbc 151 #endif /* USBD_HS_TRDT_VALUE */
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /**
AnnaBridge 171:3a7713b1edbc 154 * @}
AnnaBridge 171:3a7713b1edbc 155 */
AnnaBridge 171:3a7713b1edbc 156
AnnaBridge 171:3a7713b1edbc 157 /**
AnnaBridge 171:3a7713b1edbc 158 * @}
AnnaBridge 171:3a7713b1edbc 159 */
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 162 /** @defgroup PCD_Exported_Macros PCD Exported Macros
AnnaBridge 171:3a7713b1edbc 163 * @brief macros to handle interrupts and specific clock configurations
AnnaBridge 171:3a7713b1edbc 164 * @{
AnnaBridge 171:3a7713b1edbc 165 */
AnnaBridge 171:3a7713b1edbc 166 #define __HAL_PCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 167 #define __HAL_PCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 170 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 171 #define __HAL_PCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0)
AnnaBridge 171:3a7713b1edbc 172
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 #define __HAL_PCD_UNGATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) &= \
AnnaBridge 171:3a7713b1edbc 175 ~(USB_OTG_PCGCCTL_STOPCLK)
AnnaBridge 171:3a7713b1edbc 176
AnnaBridge 171:3a7713b1edbc 177 #define __HAL_PCD_GATE_PHYCLOCK(__HANDLE__) *(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE) |= USB_OTG_PCGCCTL_STOPCLK
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179 #define __HAL_PCD_IS_PHY_SUSPENDED(__HANDLE__) ((*(__IO uint32_t *)((uint32_t)((__HANDLE__)->Instance) + USB_OTG_PCGCCTL_BASE))&0x10)
AnnaBridge 171:3a7713b1edbc 180
AnnaBridge 171:3a7713b1edbc 181 #define USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08U)
AnnaBridge 171:3a7713b1edbc 182 #define USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0CU)
AnnaBridge 171:3a7713b1edbc 183 #define USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10U)
AnnaBridge 171:3a7713b1edbc 184
AnnaBridge 171:3a7713b1edbc 185 #define USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE ((uint32_t)0x08U)
AnnaBridge 171:3a7713b1edbc 186 #define USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE ((uint32_t)0x0CU)
AnnaBridge 171:3a7713b1edbc 187 #define USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE ((uint32_t)0x10U)
AnnaBridge 171:3a7713b1edbc 188
AnnaBridge 171:3a7713b1edbc 189 #define USB_OTG_HS_WAKEUP_EXTI_LINE ((uint32_t)0x00100000U) /*!< External interrupt line 20 Connected to the USB HS EXTI Line */
AnnaBridge 171:3a7713b1edbc 190 #define USB_OTG_FS_WAKEUP_EXTI_LINE ((uint32_t)0x00040000U) /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
AnnaBridge 171:3a7713b1edbc 191
AnnaBridge 171:3a7713b1edbc 192 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= (USB_OTG_HS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 193 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 194 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_HS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 195 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = (USB_OTG_HS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 198 EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
AnnaBridge 171:3a7713b1edbc 199 }while(0)
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_HS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 202 EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 203 }while(0)
AnnaBridge 171:3a7713b1edbc 204 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 205 EXTI->FTSR &= ~(USB_OTG_HS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 206 EXTI->RTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
AnnaBridge 171:3a7713b1edbc 207 EXTI->FTSR |= USB_OTG_HS_WAKEUP_EXTI_LINE;\
AnnaBridge 171:3a7713b1edbc 208 }while(0)
AnnaBridge 171:3a7713b1edbc 209
AnnaBridge 171:3a7713b1edbc 210 #define __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 211
AnnaBridge 171:3a7713b1edbc 212 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR |= USB_OTG_FS_WAKEUP_EXTI_LINE
AnnaBridge 171:3a7713b1edbc 213 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 214 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG() EXTI->PR & (USB_OTG_FS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 215 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR = USB_OTG_FS_WAKEUP_EXTI_LINE
AnnaBridge 171:3a7713b1edbc 216
AnnaBridge 171:3a7713b1edbc 217 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE() do{EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 218 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
AnnaBridge 171:3a7713b1edbc 219 }while(0)
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE() do{EXTI->FTSR |= (USB_OTG_FS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 222 EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 223 }while(0)
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do{EXTI->RTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 226 EXTI->FTSR &= ~(USB_OTG_FS_WAKEUP_EXTI_LINE);\
AnnaBridge 171:3a7713b1edbc 227 EXTI->RTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
AnnaBridge 171:3a7713b1edbc 228 EXTI->FTSR |= USB_OTG_FS_WAKEUP_EXTI_LINE;\
AnnaBridge 171:3a7713b1edbc 229 }while(0)
AnnaBridge 171:3a7713b1edbc 230
AnnaBridge 171:3a7713b1edbc 231
AnnaBridge 171:3a7713b1edbc 232 #define __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT() (EXTI->SWIER |= USB_OTG_FS_WAKEUP_EXTI_LINE)
AnnaBridge 171:3a7713b1edbc 233 /**
AnnaBridge 171:3a7713b1edbc 234 * @}
AnnaBridge 171:3a7713b1edbc 235 */
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 238 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
AnnaBridge 171:3a7713b1edbc 239 * @{
AnnaBridge 171:3a7713b1edbc 240 */
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242 /* Initialization/de-initialization functions ********************************/
AnnaBridge 171:3a7713b1edbc 243 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 244 * @{
AnnaBridge 171:3a7713b1edbc 245 */
AnnaBridge 171:3a7713b1edbc 246 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 247 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 248 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 249 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 250 /**
AnnaBridge 171:3a7713b1edbc 251 * @}
AnnaBridge 171:3a7713b1edbc 252 */
AnnaBridge 171:3a7713b1edbc 253
AnnaBridge 171:3a7713b1edbc 254 /* I/O operation functions ***************************************************/
AnnaBridge 171:3a7713b1edbc 255 /* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 256 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
AnnaBridge 171:3a7713b1edbc 257 * @{
AnnaBridge 171:3a7713b1edbc 258 */
AnnaBridge 171:3a7713b1edbc 259 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 260 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 261 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 262
AnnaBridge 171:3a7713b1edbc 263 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
AnnaBridge 171:3a7713b1edbc 264 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
AnnaBridge 171:3a7713b1edbc 265 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 266 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 267 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 268 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 269 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 270 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
AnnaBridge 171:3a7713b1edbc 271 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
AnnaBridge 171:3a7713b1edbc 272 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 273 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 274 /**
AnnaBridge 171:3a7713b1edbc 275 * @}
AnnaBridge 171:3a7713b1edbc 276 */
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 /* Peripheral Control functions **********************************************/
AnnaBridge 171:3a7713b1edbc 279 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 280 * @{
AnnaBridge 171:3a7713b1edbc 281 */
AnnaBridge 171:3a7713b1edbc 282 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 283 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 284 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
AnnaBridge 171:3a7713b1edbc 285 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
AnnaBridge 171:3a7713b1edbc 286 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
AnnaBridge 171:3a7713b1edbc 287 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
AnnaBridge 171:3a7713b1edbc 288 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
AnnaBridge 171:3a7713b1edbc 289 uint16_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
AnnaBridge 171:3a7713b1edbc 290 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
AnnaBridge 171:3a7713b1edbc 291 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
AnnaBridge 171:3a7713b1edbc 292 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
AnnaBridge 171:3a7713b1edbc 293 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 294 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 295 /**
AnnaBridge 171:3a7713b1edbc 296 * @}
AnnaBridge 171:3a7713b1edbc 297 */
AnnaBridge 171:3a7713b1edbc 298
AnnaBridge 171:3a7713b1edbc 299 /* Peripheral State functions ************************************************/
AnnaBridge 171:3a7713b1edbc 300 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 171:3a7713b1edbc 301 * @{
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
AnnaBridge 171:3a7713b1edbc 304 /**
AnnaBridge 171:3a7713b1edbc 305 * @}
AnnaBridge 171:3a7713b1edbc 306 */
AnnaBridge 171:3a7713b1edbc 307
AnnaBridge 171:3a7713b1edbc 308 /**
AnnaBridge 171:3a7713b1edbc 309 * @}
AnnaBridge 171:3a7713b1edbc 310 */
AnnaBridge 171:3a7713b1edbc 311
AnnaBridge 171:3a7713b1edbc 312 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 313 /** @defgroup PCD_Private_Macros PCD Private Macros
AnnaBridge 171:3a7713b1edbc 314 * @{
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316 /** @defgroup PCD_Instance_definition PCD Instance definition
AnnaBridge 171:3a7713b1edbc 317 * @{
AnnaBridge 171:3a7713b1edbc 318 */
AnnaBridge 171:3a7713b1edbc 319 #define IS_PCD_ALL_INSTANCE(INSTANCE) (((INSTANCE) == USB_OTG_FS) || \
AnnaBridge 171:3a7713b1edbc 320 ((INSTANCE) == USB_OTG_HS))
AnnaBridge 171:3a7713b1edbc 321 /**
AnnaBridge 171:3a7713b1edbc 322 * @}
AnnaBridge 171:3a7713b1edbc 323 */
AnnaBridge 171:3a7713b1edbc 324
AnnaBridge 171:3a7713b1edbc 325 /**
AnnaBridge 171:3a7713b1edbc 326 * @}
AnnaBridge 171:3a7713b1edbc 327 */
AnnaBridge 171:3a7713b1edbc 328
AnnaBridge 171:3a7713b1edbc 329 /**
AnnaBridge 171:3a7713b1edbc 330 * @}
AnnaBridge 171:3a7713b1edbc 331 */
AnnaBridge 171:3a7713b1edbc 332
AnnaBridge 171:3a7713b1edbc 333 /**
AnnaBridge 171:3a7713b1edbc 334 * @}
AnnaBridge 171:3a7713b1edbc 335 */
AnnaBridge 171:3a7713b1edbc 336
AnnaBridge 171:3a7713b1edbc 337 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 338 }
AnnaBridge 171:3a7713b1edbc 339 #endif
AnnaBridge 171:3a7713b1edbc 340
AnnaBridge 171:3a7713b1edbc 341
AnnaBridge 171:3a7713b1edbc 342 #endif /* __STM32F7xx_HAL_PCD_H */
AnnaBridge 171:3a7713b1edbc 343
AnnaBridge 171:3a7713b1edbc 344 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/