The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUCLEO_F756ZG/TOOLCHAIN_ARM_MICRO/stm32f7xx_ll_dma2d.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /** |
AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f7xx_ll_dma2d.h |
AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of DMA2D LL module. |
AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
AnnaBridge | 171:3a7713b1edbc | 8 | * |
AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
AnnaBridge | 171:3a7713b1edbc | 10 | * |
AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
AnnaBridge | 171:3a7713b1edbc | 21 | * |
AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 171:3a7713b1edbc | 32 | * |
AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 34 | */ |
AnnaBridge | 171:3a7713b1edbc | 35 | |
AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F7xx_LL_DMA2D_H |
AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F7xx_LL_DMA2D_H |
AnnaBridge | 171:3a7713b1edbc | 39 | |
AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
AnnaBridge | 171:3a7713b1edbc | 43 | |
AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f7xx.h" |
AnnaBridge | 171:3a7713b1edbc | 46 | |
AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F7xx_LL_Driver |
AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 49 | */ |
AnnaBridge | 171:3a7713b1edbc | 50 | |
AnnaBridge | 171:3a7713b1edbc | 51 | #if defined (DMA2D) |
AnnaBridge | 171:3a7713b1edbc | 52 | |
AnnaBridge | 171:3a7713b1edbc | 53 | /** @defgroup DMA2D_LL DMA2D |
AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 55 | */ |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /* Private types -------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 58 | /* Private variables ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 59 | /* Private constants ---------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 60 | /* Private macros ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 61 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 171:3a7713b1edbc | 62 | /** @defgroup DMA2D_LL_Private_Macros DMA2D Private Macros |
AnnaBridge | 171:3a7713b1edbc | 63 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 64 | */ |
AnnaBridge | 171:3a7713b1edbc | 65 | |
AnnaBridge | 171:3a7713b1edbc | 66 | /** |
AnnaBridge | 171:3a7713b1edbc | 67 | * @} |
AnnaBridge | 171:3a7713b1edbc | 68 | */ |
AnnaBridge | 171:3a7713b1edbc | 69 | #endif /*USE_FULL_LL_DRIVER*/ |
AnnaBridge | 171:3a7713b1edbc | 70 | |
AnnaBridge | 171:3a7713b1edbc | 71 | /* Exported types ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 72 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 171:3a7713b1edbc | 73 | /** @defgroup DMA2D_LL_ES_Init_Struct DMA2D Exported Init structures |
AnnaBridge | 171:3a7713b1edbc | 74 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 75 | */ |
AnnaBridge | 171:3a7713b1edbc | 76 | |
AnnaBridge | 171:3a7713b1edbc | 77 | /** |
AnnaBridge | 171:3a7713b1edbc | 78 | * @brief LL DMA2D Init Structure Definition |
AnnaBridge | 171:3a7713b1edbc | 79 | */ |
AnnaBridge | 171:3a7713b1edbc | 80 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 81 | { |
AnnaBridge | 171:3a7713b1edbc | 82 | uint32_t Mode; /*!< Specifies the DMA2D transfer mode. |
AnnaBridge | 171:3a7713b1edbc | 83 | - This parameter can be one value of @ref DMA2D_LL_EC_MODE. |
AnnaBridge | 171:3a7713b1edbc | 84 | |
AnnaBridge | 171:3a7713b1edbc | 85 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetMode().*/ |
AnnaBridge | 171:3a7713b1edbc | 86 | |
AnnaBridge | 171:3a7713b1edbc | 87 | uint32_t ColorMode; /*!< Specifies the color format of the output image. |
AnnaBridge | 171:3a7713b1edbc | 88 | - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. |
AnnaBridge | 171:3a7713b1edbc | 89 | |
AnnaBridge | 171:3a7713b1edbc | 90 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ |
AnnaBridge | 171:3a7713b1edbc | 91 | |
AnnaBridge | 171:3a7713b1edbc | 92 | uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. |
AnnaBridge | 171:3a7713b1edbc | 93 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 94 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 95 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 96 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 97 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 98 | |
AnnaBridge | 171:3a7713b1edbc | 99 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 100 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 101 | |
AnnaBridge | 171:3a7713b1edbc | 102 | uint32_t OutputGreen; /*!< Specifies the Green value of the output image. |
AnnaBridge | 171:3a7713b1edbc | 103 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 104 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 105 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 106 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 107 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 108 | |
AnnaBridge | 171:3a7713b1edbc | 109 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 110 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 111 | |
AnnaBridge | 171:3a7713b1edbc | 112 | uint32_t OutputRed; /*!< Specifies the Red value of the output image. |
AnnaBridge | 171:3a7713b1edbc | 113 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 114 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 115 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 116 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 117 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 118 | |
AnnaBridge | 171:3a7713b1edbc | 119 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 120 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 121 | |
AnnaBridge | 171:3a7713b1edbc | 122 | uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. |
AnnaBridge | 171:3a7713b1edbc | 123 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 124 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 125 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 126 | - This parameter is not considered if RGB888 or RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 127 | |
AnnaBridge | 171:3a7713b1edbc | 128 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 129 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 130 | |
AnnaBridge | 171:3a7713b1edbc | 131 | uint32_t OutputMemoryAddress; /*!< Specifies the memory address. |
AnnaBridge | 171:3a7713b1edbc | 132 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. |
AnnaBridge | 171:3a7713b1edbc | 133 | |
AnnaBridge | 171:3a7713b1edbc | 134 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputMemAddr(). */ |
AnnaBridge | 171:3a7713b1edbc | 135 | |
AnnaBridge | 171:3a7713b1edbc | 136 | uint32_t LineOffset; /*!< Specifies the output line offset value. |
AnnaBridge | 171:3a7713b1edbc | 137 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. |
AnnaBridge | 171:3a7713b1edbc | 138 | |
AnnaBridge | 171:3a7713b1edbc | 139 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetLineOffset(). */ |
AnnaBridge | 171:3a7713b1edbc | 140 | |
AnnaBridge | 171:3a7713b1edbc | 141 | uint32_t NbrOfLines; /*!< Specifies the number of lines of the area to be transferred. |
AnnaBridge | 171:3a7713b1edbc | 142 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. |
AnnaBridge | 171:3a7713b1edbc | 143 | |
AnnaBridge | 171:3a7713b1edbc | 144 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfLines(). */ |
AnnaBridge | 171:3a7713b1edbc | 145 | |
AnnaBridge | 171:3a7713b1edbc | 146 | uint32_t NbrOfPixelsPerLines; /*!< Specifies the number of pixels per lines of the area to be transfered. |
AnnaBridge | 171:3a7713b1edbc | 147 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. |
AnnaBridge | 171:3a7713b1edbc | 148 | |
AnnaBridge | 171:3a7713b1edbc | 149 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetNbrOfPixelsPerLines(). */ |
AnnaBridge | 171:3a7713b1edbc | 150 | |
AnnaBridge | 171:3a7713b1edbc | 151 | #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT) |
AnnaBridge | 171:3a7713b1edbc | 152 | uint32_t AlphaInversionMode; /*!< Specifies the output alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 153 | - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. |
AnnaBridge | 171:3a7713b1edbc | 154 | |
AnnaBridge | 171:3a7713b1edbc | 155 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputAlphaInvMode(). */ |
AnnaBridge | 171:3a7713b1edbc | 156 | |
AnnaBridge | 171:3a7713b1edbc | 157 | uint32_t RBSwapMode; /*!< Specifies the output Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 158 | - This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP. |
AnnaBridge | 171:3a7713b1edbc | 159 | |
AnnaBridge | 171:3a7713b1edbc | 160 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputRBSwapMode(). */ |
AnnaBridge | 171:3a7713b1edbc | 161 | #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */ |
AnnaBridge | 171:3a7713b1edbc | 162 | |
AnnaBridge | 171:3a7713b1edbc | 163 | } LL_DMA2D_InitTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 164 | |
AnnaBridge | 171:3a7713b1edbc | 165 | /** |
AnnaBridge | 171:3a7713b1edbc | 166 | * @brief LL DMA2D Layer Configuration Structure Definition |
AnnaBridge | 171:3a7713b1edbc | 167 | */ |
AnnaBridge | 171:3a7713b1edbc | 168 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 169 | { |
AnnaBridge | 171:3a7713b1edbc | 170 | uint32_t MemoryAddress; /*!< Specifies the foreground or background memory address. |
AnnaBridge | 171:3a7713b1edbc | 171 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. |
AnnaBridge | 171:3a7713b1edbc | 172 | |
AnnaBridge | 171:3a7713b1edbc | 173 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 174 | - @ref LL_DMA2D_FGND_SetMemAddr() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 175 | - @ref LL_DMA2D_BGND_SetMemAddr() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 176 | |
AnnaBridge | 171:3a7713b1edbc | 177 | uint32_t LineOffset; /*!< Specifies the foreground or background line offset value. |
AnnaBridge | 171:3a7713b1edbc | 178 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0x3FFF. |
AnnaBridge | 171:3a7713b1edbc | 179 | |
AnnaBridge | 171:3a7713b1edbc | 180 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 181 | - @ref LL_DMA2D_FGND_SetLineOffset() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 182 | - @ref LL_DMA2D_BGND_SetLineOffset() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 183 | |
AnnaBridge | 171:3a7713b1edbc | 184 | uint32_t ColorMode; /*!< Specifies the foreground or background color mode. |
AnnaBridge | 171:3a7713b1edbc | 185 | - This parameter can be one value of @ref DMA2D_LL_EC_INPUT_COLOR_MODE. |
AnnaBridge | 171:3a7713b1edbc | 186 | |
AnnaBridge | 171:3a7713b1edbc | 187 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 188 | - @ref LL_DMA2D_FGND_SetColorMode() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 189 | - @ref LL_DMA2D_BGND_SetColorMode() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 190 | |
AnnaBridge | 171:3a7713b1edbc | 191 | uint32_t CLUTColorMode; /*!< Specifies the foreground or background CLUT color mode. |
AnnaBridge | 171:3a7713b1edbc | 192 | - This parameter can be one value of @ref DMA2D_LL_EC_CLUT_COLOR_MODE. |
AnnaBridge | 171:3a7713b1edbc | 193 | |
AnnaBridge | 171:3a7713b1edbc | 194 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 195 | - @ref LL_DMA2D_FGND_SetCLUTColorMode() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 196 | - @ref LL_DMA2D_BGND_SetCLUTColorMode() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 197 | |
AnnaBridge | 171:3a7713b1edbc | 198 | uint32_t CLUTSize; /*!< Specifies the foreground or background CLUT size. |
AnnaBridge | 171:3a7713b1edbc | 199 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
AnnaBridge | 171:3a7713b1edbc | 200 | |
AnnaBridge | 171:3a7713b1edbc | 201 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 202 | - @ref LL_DMA2D_FGND_SetCLUTSize() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 203 | - @ref LL_DMA2D_BGND_SetCLUTSize() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 204 | |
AnnaBridge | 171:3a7713b1edbc | 205 | uint32_t AlphaMode; /*!< Specifies the foreground or background alpha mode. |
AnnaBridge | 171:3a7713b1edbc | 206 | - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_MODE. |
AnnaBridge | 171:3a7713b1edbc | 207 | |
AnnaBridge | 171:3a7713b1edbc | 208 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 209 | - @ref LL_DMA2D_FGND_SetAlphaMode() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 210 | - @ref LL_DMA2D_BGND_SetAlphaMode() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 211 | |
AnnaBridge | 171:3a7713b1edbc | 212 | uint32_t Alpha; /*!< Specifies the foreground or background Alpha value. |
AnnaBridge | 171:3a7713b1edbc | 213 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
AnnaBridge | 171:3a7713b1edbc | 214 | |
AnnaBridge | 171:3a7713b1edbc | 215 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 216 | - @ref LL_DMA2D_FGND_SetAlpha() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 217 | - @ref LL_DMA2D_BGND_SetAlpha() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 218 | |
AnnaBridge | 171:3a7713b1edbc | 219 | uint32_t Blue; /*!< Specifies the foreground or background Blue color value. |
AnnaBridge | 171:3a7713b1edbc | 220 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
AnnaBridge | 171:3a7713b1edbc | 221 | |
AnnaBridge | 171:3a7713b1edbc | 222 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 223 | - @ref LL_DMA2D_FGND_SetBlueColor() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 224 | - @ref LL_DMA2D_BGND_SetBlueColor() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 225 | |
AnnaBridge | 171:3a7713b1edbc | 226 | uint32_t Green; /*!< Specifies the foreground or background Green color value. |
AnnaBridge | 171:3a7713b1edbc | 227 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
AnnaBridge | 171:3a7713b1edbc | 228 | |
AnnaBridge | 171:3a7713b1edbc | 229 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 230 | - @ref LL_DMA2D_FGND_SetGreenColor() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 231 | - @ref LL_DMA2D_BGND_SetGreenColor() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 232 | |
AnnaBridge | 171:3a7713b1edbc | 233 | uint32_t Red; /*!< Specifies the foreground or background Red color value. |
AnnaBridge | 171:3a7713b1edbc | 234 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF. |
AnnaBridge | 171:3a7713b1edbc | 235 | |
AnnaBridge | 171:3a7713b1edbc | 236 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 237 | - @ref LL_DMA2D_FGND_SetRedColor() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 238 | - @ref LL_DMA2D_BGND_SetRedColor() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 239 | |
AnnaBridge | 171:3a7713b1edbc | 240 | uint32_t CLUTMemoryAddress; /*!< Specifies the foreground or background CLUT memory address. |
AnnaBridge | 171:3a7713b1edbc | 241 | - This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFFFFFF. |
AnnaBridge | 171:3a7713b1edbc | 242 | |
AnnaBridge | 171:3a7713b1edbc | 243 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 244 | - @ref LL_DMA2D_FGND_SetCLUTMemAddr() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 245 | - @ref LL_DMA2D_BGND_SetCLUTMemAddr() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 246 | |
AnnaBridge | 171:3a7713b1edbc | 247 | #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT) |
AnnaBridge | 171:3a7713b1edbc | 248 | uint32_t AlphaInversionMode; /*!< Specifies the foreground or background alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 249 | - This parameter can be one value of @ref DMA2D_LL_EC_ALPHA_INVERSION. |
AnnaBridge | 171:3a7713b1edbc | 250 | |
AnnaBridge | 171:3a7713b1edbc | 251 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 252 | - @ref LL_DMA2D_FGND_SetAlphaInvMode() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 253 | - @ref LL_DMA2D_BGND_SetAlphaInvMode() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 254 | |
AnnaBridge | 171:3a7713b1edbc | 255 | uint32_t RBSwapMode; /*!< Specifies the foreground or background Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 256 | This parameter can be one value of @ref DMA2D_LL_EC_RED_BLUE_SWAP . |
AnnaBridge | 171:3a7713b1edbc | 257 | |
AnnaBridge | 171:3a7713b1edbc | 258 | This parameter can be modified afterwards using unitary functions |
AnnaBridge | 171:3a7713b1edbc | 259 | - @ref LL_DMA2D_FGND_SetRBSwapMode() for foreground layer, |
AnnaBridge | 171:3a7713b1edbc | 260 | - @ref LL_DMA2D_BGND_SetRBSwapMode() for background layer. */ |
AnnaBridge | 171:3a7713b1edbc | 261 | #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */ |
AnnaBridge | 171:3a7713b1edbc | 262 | |
AnnaBridge | 171:3a7713b1edbc | 263 | } LL_DMA2D_LayerCfgTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 264 | |
AnnaBridge | 171:3a7713b1edbc | 265 | /** |
AnnaBridge | 171:3a7713b1edbc | 266 | * @brief LL DMA2D Output Color Structure Definition |
AnnaBridge | 171:3a7713b1edbc | 267 | */ |
AnnaBridge | 171:3a7713b1edbc | 268 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 269 | { |
AnnaBridge | 171:3a7713b1edbc | 270 | uint32_t ColorMode; /*!< Specifies the color format of the output image. |
AnnaBridge | 171:3a7713b1edbc | 271 | - This parameter can be one value of @ref DMA2D_LL_EC_OUTPUT_COLOR_MODE. |
AnnaBridge | 171:3a7713b1edbc | 272 | |
AnnaBridge | 171:3a7713b1edbc | 273 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColorMode(). */ |
AnnaBridge | 171:3a7713b1edbc | 274 | |
AnnaBridge | 171:3a7713b1edbc | 275 | uint32_t OutputBlue; /*!< Specifies the Blue value of the output image. |
AnnaBridge | 171:3a7713b1edbc | 276 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 277 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 278 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 279 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 280 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 281 | |
AnnaBridge | 171:3a7713b1edbc | 282 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 283 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 284 | |
AnnaBridge | 171:3a7713b1edbc | 285 | uint32_t OutputGreen; /*!< Specifies the Green value of the output image. |
AnnaBridge | 171:3a7713b1edbc | 286 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 287 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 288 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x3F if RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 289 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 290 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 291 | |
AnnaBridge | 171:3a7713b1edbc | 292 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 293 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 294 | |
AnnaBridge | 171:3a7713b1edbc | 295 | uint32_t OutputRed; /*!< Specifies the Red value of the output image. |
AnnaBridge | 171:3a7713b1edbc | 296 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 297 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if RGB888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 298 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 299 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 300 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 301 | |
AnnaBridge | 171:3a7713b1edbc | 302 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 303 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 304 | |
AnnaBridge | 171:3a7713b1edbc | 305 | uint32_t OutputAlpha; /*!< Specifies the Alpha channel of the output image. |
AnnaBridge | 171:3a7713b1edbc | 306 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF if ARGB8888 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 307 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x01 if ARGB1555 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 308 | - This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x0F if ARGB4444 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 309 | - This parameter is not considered if RGB888 or RGB565 color mode is selected. |
AnnaBridge | 171:3a7713b1edbc | 310 | |
AnnaBridge | 171:3a7713b1edbc | 311 | This parameter can be modified afterwards using unitary function @ref LL_DMA2D_SetOutputColor() or configuration |
AnnaBridge | 171:3a7713b1edbc | 312 | function @ref LL_DMA2D_ConfigOutputColor(). */ |
AnnaBridge | 171:3a7713b1edbc | 313 | |
AnnaBridge | 171:3a7713b1edbc | 314 | } LL_DMA2D_ColorTypeDef; |
AnnaBridge | 171:3a7713b1edbc | 315 | |
AnnaBridge | 171:3a7713b1edbc | 316 | /** |
AnnaBridge | 171:3a7713b1edbc | 317 | * @} |
AnnaBridge | 171:3a7713b1edbc | 318 | */ |
AnnaBridge | 171:3a7713b1edbc | 319 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 171:3a7713b1edbc | 320 | |
AnnaBridge | 171:3a7713b1edbc | 321 | /* Exported constants --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 322 | /** @defgroup DMA2D_LL_Exported_Constants DMA2D Exported Constants |
AnnaBridge | 171:3a7713b1edbc | 323 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 324 | */ |
AnnaBridge | 171:3a7713b1edbc | 325 | |
AnnaBridge | 171:3a7713b1edbc | 326 | /** @defgroup DMA2D_LL_EC_GET_FLAG Get Flags Defines |
AnnaBridge | 171:3a7713b1edbc | 327 | * @brief Flags defines which can be used with LL_DMA2D_ReadReg function |
AnnaBridge | 171:3a7713b1edbc | 328 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 329 | */ |
AnnaBridge | 171:3a7713b1edbc | 330 | #define LL_DMA2D_FLAG_CEIF DMA2D_ISR_CEIF /*!< Configuration Error Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 331 | #define LL_DMA2D_FLAG_CTCIF DMA2D_ISR_CTCIF /*!< CLUT Transfer Complete Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 332 | #define LL_DMA2D_FLAG_CAEIF DMA2D_ISR_CAEIF /*!< CLUT Access Error Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 333 | #define LL_DMA2D_FLAG_TWIF DMA2D_ISR_TWIF /*!< Transfer Watermark Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 334 | #define LL_DMA2D_FLAG_TCIF DMA2D_ISR_TCIF /*!< Transfer Complete Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 335 | #define LL_DMA2D_FLAG_TEIF DMA2D_ISR_TEIF /*!< Transfer Error Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 336 | /** |
AnnaBridge | 171:3a7713b1edbc | 337 | * @} |
AnnaBridge | 171:3a7713b1edbc | 338 | */ |
AnnaBridge | 171:3a7713b1edbc | 339 | |
AnnaBridge | 171:3a7713b1edbc | 340 | /** @defgroup DMA2D_LL_EC_IT IT Defines |
AnnaBridge | 171:3a7713b1edbc | 341 | * @brief IT defines which can be used with LL_DMA2D_ReadReg and LL_DMA2D_WriteReg functions |
AnnaBridge | 171:3a7713b1edbc | 342 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 343 | */ |
AnnaBridge | 171:3a7713b1edbc | 344 | #define LL_DMA2D_IT_CEIE DMA2D_CR_CEIE /*!< Configuration Error Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 345 | #define LL_DMA2D_IT_CTCIE DMA2D_CR_CTCIE /*!< CLUT Transfer Complete Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 346 | #define LL_DMA2D_IT_CAEIE DMA2D_CR_CAEIE /*!< CLUT Access Error Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 347 | #define LL_DMA2D_IT_TWIE DMA2D_CR_TWIE /*!< Transfer Watermark Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 348 | #define LL_DMA2D_IT_TCIE DMA2D_CR_TCIE /*!< Transfer Complete Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 349 | #define LL_DMA2D_IT_TEIE DMA2D_CR_TEIE /*!< Transfer Error Interrupt */ |
AnnaBridge | 171:3a7713b1edbc | 350 | /** |
AnnaBridge | 171:3a7713b1edbc | 351 | * @} |
AnnaBridge | 171:3a7713b1edbc | 352 | */ |
AnnaBridge | 171:3a7713b1edbc | 353 | |
AnnaBridge | 171:3a7713b1edbc | 354 | /** @defgroup DMA2D_LL_EC_MODE Mode |
AnnaBridge | 171:3a7713b1edbc | 355 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 356 | */ |
AnnaBridge | 171:3a7713b1edbc | 357 | #define LL_DMA2D_MODE_M2M 0x00000000U /*!< DMA2D memory to memory transfer mode */ |
AnnaBridge | 171:3a7713b1edbc | 358 | #define LL_DMA2D_MODE_M2M_PFC DMA2D_CR_MODE_0 /*!< DMA2D memory to memory with pixel format conversion transfer mode */ |
AnnaBridge | 171:3a7713b1edbc | 359 | #define LL_DMA2D_MODE_M2M_BLEND DMA2D_CR_MODE_1 /*!< DMA2D memory to memory with blending transfer mode */ |
AnnaBridge | 171:3a7713b1edbc | 360 | #define LL_DMA2D_MODE_R2M DMA2D_CR_MODE /*!< DMA2D register to memory transfer mode */ |
AnnaBridge | 171:3a7713b1edbc | 361 | /** |
AnnaBridge | 171:3a7713b1edbc | 362 | * @} |
AnnaBridge | 171:3a7713b1edbc | 363 | */ |
AnnaBridge | 171:3a7713b1edbc | 364 | |
AnnaBridge | 171:3a7713b1edbc | 365 | /** @defgroup DMA2D_LL_EC_OUTPUT_COLOR_MODE Output Color Mode |
AnnaBridge | 171:3a7713b1edbc | 366 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 367 | */ |
AnnaBridge | 171:3a7713b1edbc | 368 | #define LL_DMA2D_OUTPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ |
AnnaBridge | 171:3a7713b1edbc | 369 | #define LL_DMA2D_OUTPUT_MODE_RGB888 DMA2D_OPFCCR_CM_0 /*!< RGB888 */ |
AnnaBridge | 171:3a7713b1edbc | 370 | #define LL_DMA2D_OUTPUT_MODE_RGB565 DMA2D_OPFCCR_CM_1 /*!< RGB565 */ |
AnnaBridge | 171:3a7713b1edbc | 371 | #define LL_DMA2D_OUTPUT_MODE_ARGB1555 (DMA2D_OPFCCR_CM_0|DMA2D_OPFCCR_CM_1) /*!< ARGB1555 */ |
AnnaBridge | 171:3a7713b1edbc | 372 | #define LL_DMA2D_OUTPUT_MODE_ARGB4444 DMA2D_OPFCCR_CM_2 /*!< ARGB4444 */ |
AnnaBridge | 171:3a7713b1edbc | 373 | /** |
AnnaBridge | 171:3a7713b1edbc | 374 | * @} |
AnnaBridge | 171:3a7713b1edbc | 375 | */ |
AnnaBridge | 171:3a7713b1edbc | 376 | |
AnnaBridge | 171:3a7713b1edbc | 377 | /** @defgroup DMA2D_LL_EC_INPUT_COLOR_MODE Input Color Mode |
AnnaBridge | 171:3a7713b1edbc | 378 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 379 | */ |
AnnaBridge | 171:3a7713b1edbc | 380 | #define LL_DMA2D_INPUT_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ |
AnnaBridge | 171:3a7713b1edbc | 381 | #define LL_DMA2D_INPUT_MODE_RGB888 DMA2D_FGPFCCR_CM_0 /*!< RGB888 */ |
AnnaBridge | 171:3a7713b1edbc | 382 | #define LL_DMA2D_INPUT_MODE_RGB565 DMA2D_FGPFCCR_CM_1 /*!< RGB565 */ |
AnnaBridge | 171:3a7713b1edbc | 383 | #define LL_DMA2D_INPUT_MODE_ARGB1555 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1) /*!< ARGB1555 */ |
AnnaBridge | 171:3a7713b1edbc | 384 | #define LL_DMA2D_INPUT_MODE_ARGB4444 DMA2D_FGPFCCR_CM_2 /*!< ARGB4444 */ |
AnnaBridge | 171:3a7713b1edbc | 385 | #define LL_DMA2D_INPUT_MODE_L8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_2) /*!< L8 */ |
AnnaBridge | 171:3a7713b1edbc | 386 | #define LL_DMA2D_INPUT_MODE_AL44 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL44 */ |
AnnaBridge | 171:3a7713b1edbc | 387 | #define LL_DMA2D_INPUT_MODE_AL88 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_2) /*!< AL88 */ |
AnnaBridge | 171:3a7713b1edbc | 388 | #define LL_DMA2D_INPUT_MODE_L4 DMA2D_FGPFCCR_CM_3 /*!< L4 */ |
AnnaBridge | 171:3a7713b1edbc | 389 | #define LL_DMA2D_INPUT_MODE_A8 (DMA2D_FGPFCCR_CM_0|DMA2D_FGPFCCR_CM_3) /*!< A8 */ |
AnnaBridge | 171:3a7713b1edbc | 390 | #define LL_DMA2D_INPUT_MODE_A4 (DMA2D_FGPFCCR_CM_1|DMA2D_FGPFCCR_CM_3) /*!< A4 */ |
AnnaBridge | 171:3a7713b1edbc | 391 | /** |
AnnaBridge | 171:3a7713b1edbc | 392 | * @} |
AnnaBridge | 171:3a7713b1edbc | 393 | */ |
AnnaBridge | 171:3a7713b1edbc | 394 | |
AnnaBridge | 171:3a7713b1edbc | 395 | /** @defgroup DMA2D_LL_EC_ALPHA_MODE Alpha Mode |
AnnaBridge | 171:3a7713b1edbc | 396 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 397 | */ |
AnnaBridge | 171:3a7713b1edbc | 398 | #define LL_DMA2D_ALPHA_MODE_NO_MODIF 0x00000000U /*!< No modification of the alpha channel value */ |
AnnaBridge | 171:3a7713b1edbc | 399 | #define LL_DMA2D_ALPHA_MODE_REPLACE DMA2D_FGPFCCR_AM_0 /*!< Replace original alpha channel value by programmed alpha value */ |
AnnaBridge | 171:3a7713b1edbc | 400 | #define LL_DMA2D_ALPHA_MODE_COMBINE DMA2D_FGPFCCR_AM_1 /*!< Replace original alpha channel value by programmed alpha value |
AnnaBridge | 171:3a7713b1edbc | 401 | with original alpha channel value */ |
AnnaBridge | 171:3a7713b1edbc | 402 | /** |
AnnaBridge | 171:3a7713b1edbc | 403 | * @} |
AnnaBridge | 171:3a7713b1edbc | 404 | */ |
AnnaBridge | 171:3a7713b1edbc | 405 | |
AnnaBridge | 171:3a7713b1edbc | 406 | #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT) |
AnnaBridge | 171:3a7713b1edbc | 407 | /** @defgroup DMA2D_LL_EC_RED_BLUE_SWAP Red Blue Swap |
AnnaBridge | 171:3a7713b1edbc | 408 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 409 | */ |
AnnaBridge | 171:3a7713b1edbc | 410 | #define LL_DMA2D_RB_MODE_REGULAR 0x00000000U /*!< RGB or ARGB */ |
AnnaBridge | 171:3a7713b1edbc | 411 | #define LL_DMA2D_RB_MODE_SWAP DMA2D_FGPFCCR_RBS /*!< BGR or ABGR */ |
AnnaBridge | 171:3a7713b1edbc | 412 | /** |
AnnaBridge | 171:3a7713b1edbc | 413 | * @} |
AnnaBridge | 171:3a7713b1edbc | 414 | */ |
AnnaBridge | 171:3a7713b1edbc | 415 | |
AnnaBridge | 171:3a7713b1edbc | 416 | /** @defgroup DMA2D_LL_EC_ALPHA_INVERSION Alpha Inversion |
AnnaBridge | 171:3a7713b1edbc | 417 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 418 | */ |
AnnaBridge | 171:3a7713b1edbc | 419 | #define LL_DMA2D_ALPHA_REGULAR 0x00000000U /*!< Regular alpha */ |
AnnaBridge | 171:3a7713b1edbc | 420 | #define LL_DMA2D_ALPHA_INVERTED DMA2D_FGPFCCR_AI /*!< Inverted alpha */ |
AnnaBridge | 171:3a7713b1edbc | 421 | /** |
AnnaBridge | 171:3a7713b1edbc | 422 | * @} |
AnnaBridge | 171:3a7713b1edbc | 423 | */ |
AnnaBridge | 171:3a7713b1edbc | 424 | |
AnnaBridge | 171:3a7713b1edbc | 425 | #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */ |
AnnaBridge | 171:3a7713b1edbc | 426 | /** @defgroup DMA2D_LL_EC_CLUT_COLOR_MODE CLUT Color Mode |
AnnaBridge | 171:3a7713b1edbc | 427 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 428 | */ |
AnnaBridge | 171:3a7713b1edbc | 429 | #define LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 0x00000000U /*!< ARGB8888 */ |
AnnaBridge | 171:3a7713b1edbc | 430 | #define LL_DMA2D_CLUT_COLOR_MODE_RGB888 DMA2D_FGPFCCR_CCM /*!< RGB888 */ |
AnnaBridge | 171:3a7713b1edbc | 431 | /** |
AnnaBridge | 171:3a7713b1edbc | 432 | * @} |
AnnaBridge | 171:3a7713b1edbc | 433 | */ |
AnnaBridge | 171:3a7713b1edbc | 434 | |
AnnaBridge | 171:3a7713b1edbc | 435 | /** |
AnnaBridge | 171:3a7713b1edbc | 436 | * @} |
AnnaBridge | 171:3a7713b1edbc | 437 | */ |
AnnaBridge | 171:3a7713b1edbc | 438 | |
AnnaBridge | 171:3a7713b1edbc | 439 | /* Exported macro ------------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 440 | /** @defgroup DMA2D_LL_Exported_Macros DMA2D Exported Macros |
AnnaBridge | 171:3a7713b1edbc | 441 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 442 | */ |
AnnaBridge | 171:3a7713b1edbc | 443 | |
AnnaBridge | 171:3a7713b1edbc | 444 | /** @defgroup DMA2D_LL_EM_WRITE_READ Common Write and read registers Macros |
AnnaBridge | 171:3a7713b1edbc | 445 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 446 | */ |
AnnaBridge | 171:3a7713b1edbc | 447 | |
AnnaBridge | 171:3a7713b1edbc | 448 | /** |
AnnaBridge | 171:3a7713b1edbc | 449 | * @brief Write a value in DMA2D register. |
AnnaBridge | 171:3a7713b1edbc | 450 | * @param __INSTANCE__ DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 451 | * @param __REG__ Register to be written |
AnnaBridge | 171:3a7713b1edbc | 452 | * @param __VALUE__ Value to be written in the register |
AnnaBridge | 171:3a7713b1edbc | 453 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 454 | */ |
AnnaBridge | 171:3a7713b1edbc | 455 | #define LL_DMA2D_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
AnnaBridge | 171:3a7713b1edbc | 456 | |
AnnaBridge | 171:3a7713b1edbc | 457 | /** |
AnnaBridge | 171:3a7713b1edbc | 458 | * @brief Read a value in DMA2D register. |
AnnaBridge | 171:3a7713b1edbc | 459 | * @param __INSTANCE__ DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 460 | * @param __REG__ Register to be read |
AnnaBridge | 171:3a7713b1edbc | 461 | * @retval Register value |
AnnaBridge | 171:3a7713b1edbc | 462 | */ |
AnnaBridge | 171:3a7713b1edbc | 463 | #define LL_DMA2D_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
AnnaBridge | 171:3a7713b1edbc | 464 | /** |
AnnaBridge | 171:3a7713b1edbc | 465 | * @} |
AnnaBridge | 171:3a7713b1edbc | 466 | */ |
AnnaBridge | 171:3a7713b1edbc | 467 | |
AnnaBridge | 171:3a7713b1edbc | 468 | /** |
AnnaBridge | 171:3a7713b1edbc | 469 | * @} |
AnnaBridge | 171:3a7713b1edbc | 470 | */ |
AnnaBridge | 171:3a7713b1edbc | 471 | |
AnnaBridge | 171:3a7713b1edbc | 472 | /* Exported functions --------------------------------------------------------*/ |
AnnaBridge | 171:3a7713b1edbc | 473 | /** @defgroup DMA2D_LL_Exported_Functions DMA2D Exported Functions |
AnnaBridge | 171:3a7713b1edbc | 474 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 475 | */ |
AnnaBridge | 171:3a7713b1edbc | 476 | |
AnnaBridge | 171:3a7713b1edbc | 477 | /** @defgroup DMA2D_LL_EF_Configuration Configuration Functions |
AnnaBridge | 171:3a7713b1edbc | 478 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 479 | */ |
AnnaBridge | 171:3a7713b1edbc | 480 | |
AnnaBridge | 171:3a7713b1edbc | 481 | /** |
AnnaBridge | 171:3a7713b1edbc | 482 | * @brief Start a DMA2D transfer. |
AnnaBridge | 171:3a7713b1edbc | 483 | * @rmtoll CR START LL_DMA2D_Start |
AnnaBridge | 171:3a7713b1edbc | 484 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 485 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 486 | */ |
AnnaBridge | 171:3a7713b1edbc | 487 | __STATIC_INLINE void LL_DMA2D_Start(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 488 | { |
AnnaBridge | 171:3a7713b1edbc | 489 | SET_BIT(DMA2Dx->CR, DMA2D_CR_START); |
AnnaBridge | 171:3a7713b1edbc | 490 | } |
AnnaBridge | 171:3a7713b1edbc | 491 | |
AnnaBridge | 171:3a7713b1edbc | 492 | /** |
AnnaBridge | 171:3a7713b1edbc | 493 | * @brief Indicate if a DMA2D transfer is ongoing. |
AnnaBridge | 171:3a7713b1edbc | 494 | * @rmtoll CR START LL_DMA2D_IsTransferOngoing |
AnnaBridge | 171:3a7713b1edbc | 495 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 496 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 497 | */ |
AnnaBridge | 171:3a7713b1edbc | 498 | __STATIC_INLINE uint32_t LL_DMA2D_IsTransferOngoing(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 499 | { |
AnnaBridge | 171:3a7713b1edbc | 500 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_START) == (DMA2D_CR_START)); |
AnnaBridge | 171:3a7713b1edbc | 501 | } |
AnnaBridge | 171:3a7713b1edbc | 502 | |
AnnaBridge | 171:3a7713b1edbc | 503 | /** |
AnnaBridge | 171:3a7713b1edbc | 504 | * @brief Suspend DMA2D transfer. |
AnnaBridge | 171:3a7713b1edbc | 505 | * @note This API can be used to suspend automatic foreground or background CLUT loading. |
AnnaBridge | 171:3a7713b1edbc | 506 | * @rmtoll CR SUSP LL_DMA2D_Suspend |
AnnaBridge | 171:3a7713b1edbc | 507 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 508 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 509 | */ |
AnnaBridge | 171:3a7713b1edbc | 510 | __STATIC_INLINE void LL_DMA2D_Suspend(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 511 | { |
AnnaBridge | 171:3a7713b1edbc | 512 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START, DMA2D_CR_SUSP); |
AnnaBridge | 171:3a7713b1edbc | 513 | } |
AnnaBridge | 171:3a7713b1edbc | 514 | |
AnnaBridge | 171:3a7713b1edbc | 515 | /** |
AnnaBridge | 171:3a7713b1edbc | 516 | * @brief Resume DMA2D transfer. |
AnnaBridge | 171:3a7713b1edbc | 517 | * @note This API can be used to resume automatic foreground or background CLUT loading. |
AnnaBridge | 171:3a7713b1edbc | 518 | * @rmtoll CR SUSP LL_DMA2D_Resume |
AnnaBridge | 171:3a7713b1edbc | 519 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 520 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 521 | */ |
AnnaBridge | 171:3a7713b1edbc | 522 | __STATIC_INLINE void LL_DMA2D_Resume(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 523 | { |
AnnaBridge | 171:3a7713b1edbc | 524 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_SUSP | DMA2D_CR_START); |
AnnaBridge | 171:3a7713b1edbc | 525 | } |
AnnaBridge | 171:3a7713b1edbc | 526 | |
AnnaBridge | 171:3a7713b1edbc | 527 | /** |
AnnaBridge | 171:3a7713b1edbc | 528 | * @brief Indicate if DMA2D transfer is suspended. |
AnnaBridge | 171:3a7713b1edbc | 529 | * @note This API can be used to indicate whether or not automatic foreground or |
AnnaBridge | 171:3a7713b1edbc | 530 | * background CLUT loading is suspended. |
AnnaBridge | 171:3a7713b1edbc | 531 | * @rmtoll CR SUSP LL_DMA2D_IsSuspended |
AnnaBridge | 171:3a7713b1edbc | 532 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 533 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 534 | */ |
AnnaBridge | 171:3a7713b1edbc | 535 | __STATIC_INLINE uint32_t LL_DMA2D_IsSuspended(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 536 | { |
AnnaBridge | 171:3a7713b1edbc | 537 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_SUSP) == (DMA2D_CR_SUSP)); |
AnnaBridge | 171:3a7713b1edbc | 538 | } |
AnnaBridge | 171:3a7713b1edbc | 539 | |
AnnaBridge | 171:3a7713b1edbc | 540 | /** |
AnnaBridge | 171:3a7713b1edbc | 541 | * @brief Abort DMA2D transfer. |
AnnaBridge | 171:3a7713b1edbc | 542 | * @note This API can be used to abort automatic foreground or background CLUT loading. |
AnnaBridge | 171:3a7713b1edbc | 543 | * @rmtoll CR ABORT LL_DMA2D_Abort |
AnnaBridge | 171:3a7713b1edbc | 544 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 545 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 546 | */ |
AnnaBridge | 171:3a7713b1edbc | 547 | __STATIC_INLINE void LL_DMA2D_Abort(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 548 | { |
AnnaBridge | 171:3a7713b1edbc | 549 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_ABORT | DMA2D_CR_START, DMA2D_CR_ABORT); |
AnnaBridge | 171:3a7713b1edbc | 550 | } |
AnnaBridge | 171:3a7713b1edbc | 551 | |
AnnaBridge | 171:3a7713b1edbc | 552 | /** |
AnnaBridge | 171:3a7713b1edbc | 553 | * @brief Indicate if DMA2D transfer is aborted. |
AnnaBridge | 171:3a7713b1edbc | 554 | * @note This API can be used to indicate whether or not automatic foreground or |
AnnaBridge | 171:3a7713b1edbc | 555 | * background CLUT loading is aborted. |
AnnaBridge | 171:3a7713b1edbc | 556 | * @rmtoll CR ABORT LL_DMA2D_IsAborted |
AnnaBridge | 171:3a7713b1edbc | 557 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 558 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 559 | */ |
AnnaBridge | 171:3a7713b1edbc | 560 | __STATIC_INLINE uint32_t LL_DMA2D_IsAborted(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 561 | { |
AnnaBridge | 171:3a7713b1edbc | 562 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_ABORT) == (DMA2D_CR_ABORT)); |
AnnaBridge | 171:3a7713b1edbc | 563 | } |
AnnaBridge | 171:3a7713b1edbc | 564 | |
AnnaBridge | 171:3a7713b1edbc | 565 | /** |
AnnaBridge | 171:3a7713b1edbc | 566 | * @brief Set DMA2D mode. |
AnnaBridge | 171:3a7713b1edbc | 567 | * @rmtoll CR MODE LL_DMA2D_SetMode |
AnnaBridge | 171:3a7713b1edbc | 568 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 569 | * @param Mode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 570 | * @arg @ref LL_DMA2D_MODE_M2M |
AnnaBridge | 171:3a7713b1edbc | 571 | * @arg @ref LL_DMA2D_MODE_M2M_PFC |
AnnaBridge | 171:3a7713b1edbc | 572 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND |
AnnaBridge | 171:3a7713b1edbc | 573 | * @arg @ref LL_DMA2D_MODE_R2M |
AnnaBridge | 171:3a7713b1edbc | 574 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 575 | */ |
AnnaBridge | 171:3a7713b1edbc | 576 | __STATIC_INLINE void LL_DMA2D_SetMode(DMA2D_TypeDef *DMA2Dx, uint32_t Mode) |
AnnaBridge | 171:3a7713b1edbc | 577 | { |
AnnaBridge | 171:3a7713b1edbc | 578 | MODIFY_REG(DMA2Dx->CR, DMA2D_CR_MODE, Mode); |
AnnaBridge | 171:3a7713b1edbc | 579 | } |
AnnaBridge | 171:3a7713b1edbc | 580 | |
AnnaBridge | 171:3a7713b1edbc | 581 | /** |
AnnaBridge | 171:3a7713b1edbc | 582 | * @brief Return DMA2D mode |
AnnaBridge | 171:3a7713b1edbc | 583 | * @rmtoll CR MODE LL_DMA2D_GetMode |
AnnaBridge | 171:3a7713b1edbc | 584 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 585 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 586 | * @arg @ref LL_DMA2D_MODE_M2M |
AnnaBridge | 171:3a7713b1edbc | 587 | * @arg @ref LL_DMA2D_MODE_M2M_PFC |
AnnaBridge | 171:3a7713b1edbc | 588 | * @arg @ref LL_DMA2D_MODE_M2M_BLEND |
AnnaBridge | 171:3a7713b1edbc | 589 | * @arg @ref LL_DMA2D_MODE_R2M |
AnnaBridge | 171:3a7713b1edbc | 590 | */ |
AnnaBridge | 171:3a7713b1edbc | 591 | __STATIC_INLINE uint32_t LL_DMA2D_GetMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 592 | { |
AnnaBridge | 171:3a7713b1edbc | 593 | return (uint32_t)(READ_BIT(DMA2Dx->CR, DMA2D_CR_MODE)); |
AnnaBridge | 171:3a7713b1edbc | 594 | } |
AnnaBridge | 171:3a7713b1edbc | 595 | |
AnnaBridge | 171:3a7713b1edbc | 596 | /** |
AnnaBridge | 171:3a7713b1edbc | 597 | * @brief Set DMA2D output color mode. |
AnnaBridge | 171:3a7713b1edbc | 598 | * @rmtoll OPFCCR CM LL_DMA2D_SetOutputColorMode |
AnnaBridge | 171:3a7713b1edbc | 599 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 600 | * @param ColorMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 601 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 602 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 603 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
AnnaBridge | 171:3a7713b1edbc | 604 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
AnnaBridge | 171:3a7713b1edbc | 605 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
AnnaBridge | 171:3a7713b1edbc | 606 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 607 | */ |
AnnaBridge | 171:3a7713b1edbc | 608 | __STATIC_INLINE void LL_DMA2D_SetOutputColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
AnnaBridge | 171:3a7713b1edbc | 609 | { |
AnnaBridge | 171:3a7713b1edbc | 610 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM, ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 611 | } |
AnnaBridge | 171:3a7713b1edbc | 612 | |
AnnaBridge | 171:3a7713b1edbc | 613 | /** |
AnnaBridge | 171:3a7713b1edbc | 614 | * @brief Return DMA2D output color mode. |
AnnaBridge | 171:3a7713b1edbc | 615 | * @rmtoll OPFCCR CM LL_DMA2D_GetOutputColorMode |
AnnaBridge | 171:3a7713b1edbc | 616 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 617 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 618 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 619 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 620 | * @arg @ref LL_DMA2D_OUTPUT_MODE_RGB565 |
AnnaBridge | 171:3a7713b1edbc | 621 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB1555 |
AnnaBridge | 171:3a7713b1edbc | 622 | * @arg @ref LL_DMA2D_OUTPUT_MODE_ARGB4444 |
AnnaBridge | 171:3a7713b1edbc | 623 | */ |
AnnaBridge | 171:3a7713b1edbc | 624 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColorMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 625 | { |
AnnaBridge | 171:3a7713b1edbc | 626 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_CM)); |
AnnaBridge | 171:3a7713b1edbc | 627 | } |
AnnaBridge | 171:3a7713b1edbc | 628 | |
AnnaBridge | 171:3a7713b1edbc | 629 | #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT) |
AnnaBridge | 171:3a7713b1edbc | 630 | /** |
AnnaBridge | 171:3a7713b1edbc | 631 | * @brief Set DMA2D output Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 632 | * @rmtoll OPFCCR RBS LL_DMA2D_SetOutputRBSwapMode |
AnnaBridge | 171:3a7713b1edbc | 633 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 634 | * @param RBSwapMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 635 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 636 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
AnnaBridge | 171:3a7713b1edbc | 637 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 638 | */ |
AnnaBridge | 171:3a7713b1edbc | 639 | __STATIC_INLINE void LL_DMA2D_SetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) |
AnnaBridge | 171:3a7713b1edbc | 640 | { |
AnnaBridge | 171:3a7713b1edbc | 641 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS, RBSwapMode); |
AnnaBridge | 171:3a7713b1edbc | 642 | } |
AnnaBridge | 171:3a7713b1edbc | 643 | |
AnnaBridge | 171:3a7713b1edbc | 644 | /** |
AnnaBridge | 171:3a7713b1edbc | 645 | * @brief Return DMA2D output Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 646 | * @rmtoll OPFCCR RBS LL_DMA2D_GetOutputRBSwapMode |
AnnaBridge | 171:3a7713b1edbc | 647 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 648 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 649 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 650 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
AnnaBridge | 171:3a7713b1edbc | 651 | */ |
AnnaBridge | 171:3a7713b1edbc | 652 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputRBSwapMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 653 | { |
AnnaBridge | 171:3a7713b1edbc | 654 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_RBS)); |
AnnaBridge | 171:3a7713b1edbc | 655 | } |
AnnaBridge | 171:3a7713b1edbc | 656 | |
AnnaBridge | 171:3a7713b1edbc | 657 | /** |
AnnaBridge | 171:3a7713b1edbc | 658 | * @brief Set DMA2D output alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 659 | * @rmtoll OPFCCR AI LL_DMA2D_SetOutputAlphaInvMode |
AnnaBridge | 171:3a7713b1edbc | 660 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 661 | * @param AlphaInversionMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 662 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 663 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
AnnaBridge | 171:3a7713b1edbc | 664 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 665 | */ |
AnnaBridge | 171:3a7713b1edbc | 666 | __STATIC_INLINE void LL_DMA2D_SetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) |
AnnaBridge | 171:3a7713b1edbc | 667 | { |
AnnaBridge | 171:3a7713b1edbc | 668 | MODIFY_REG(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI, AlphaInversionMode); |
AnnaBridge | 171:3a7713b1edbc | 669 | } |
AnnaBridge | 171:3a7713b1edbc | 670 | |
AnnaBridge | 171:3a7713b1edbc | 671 | /** |
AnnaBridge | 171:3a7713b1edbc | 672 | * @brief Return DMA2D output alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 673 | * @rmtoll OPFCCR AI LL_DMA2D_GetOutputAlphaInvMode |
AnnaBridge | 171:3a7713b1edbc | 674 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 675 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 676 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 677 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
AnnaBridge | 171:3a7713b1edbc | 678 | */ |
AnnaBridge | 171:3a7713b1edbc | 679 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputAlphaInvMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 680 | { |
AnnaBridge | 171:3a7713b1edbc | 681 | return (uint32_t)(READ_BIT(DMA2Dx->OPFCCR, DMA2D_OPFCCR_AI)); |
AnnaBridge | 171:3a7713b1edbc | 682 | } |
AnnaBridge | 171:3a7713b1edbc | 683 | |
AnnaBridge | 171:3a7713b1edbc | 684 | #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */ |
AnnaBridge | 171:3a7713b1edbc | 685 | |
AnnaBridge | 171:3a7713b1edbc | 686 | /** |
AnnaBridge | 171:3a7713b1edbc | 687 | * @brief Set DMA2D line offset, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 688 | * @rmtoll OOR LO LL_DMA2D_SetLineOffset |
AnnaBridge | 171:3a7713b1edbc | 689 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 690 | * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FFF |
AnnaBridge | 171:3a7713b1edbc | 691 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 692 | */ |
AnnaBridge | 171:3a7713b1edbc | 693 | __STATIC_INLINE void LL_DMA2D_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) |
AnnaBridge | 171:3a7713b1edbc | 694 | { |
AnnaBridge | 171:3a7713b1edbc | 695 | MODIFY_REG(DMA2Dx->OOR, DMA2D_OOR_LO, LineOffset); |
AnnaBridge | 171:3a7713b1edbc | 696 | } |
AnnaBridge | 171:3a7713b1edbc | 697 | |
AnnaBridge | 171:3a7713b1edbc | 698 | /** |
AnnaBridge | 171:3a7713b1edbc | 699 | * @brief Return DMA2D line offset, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 700 | * @rmtoll OOR LO LL_DMA2D_GetLineOffset |
AnnaBridge | 171:3a7713b1edbc | 701 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 702 | * @retval Line offset value between Min_Data=0 and Max_Data=0x3FFF |
AnnaBridge | 171:3a7713b1edbc | 703 | */ |
AnnaBridge | 171:3a7713b1edbc | 704 | __STATIC_INLINE uint32_t LL_DMA2D_GetLineOffset(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 705 | { |
AnnaBridge | 171:3a7713b1edbc | 706 | return (uint32_t)(READ_BIT(DMA2Dx->OOR, DMA2D_OOR_LO)); |
AnnaBridge | 171:3a7713b1edbc | 707 | } |
AnnaBridge | 171:3a7713b1edbc | 708 | |
AnnaBridge | 171:3a7713b1edbc | 709 | /** |
AnnaBridge | 171:3a7713b1edbc | 710 | * @brief Set DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 711 | * @rmtoll NLR PL LL_DMA2D_SetNbrOfPixelsPerLines |
AnnaBridge | 171:3a7713b1edbc | 712 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 713 | * @param NbrOfPixelsPerLines Value between Min_Data=0 and Max_Data=0x3FFF |
AnnaBridge | 171:3a7713b1edbc | 714 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 715 | */ |
AnnaBridge | 171:3a7713b1edbc | 716 | __STATIC_INLINE void LL_DMA2D_SetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfPixelsPerLines) |
AnnaBridge | 171:3a7713b1edbc | 717 | { |
AnnaBridge | 171:3a7713b1edbc | 718 | MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_PL, (NbrOfPixelsPerLines << DMA2D_NLR_PL_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 719 | } |
AnnaBridge | 171:3a7713b1edbc | 720 | |
AnnaBridge | 171:3a7713b1edbc | 721 | /** |
AnnaBridge | 171:3a7713b1edbc | 722 | * @brief Return DMA2D number of pixels per lines, expressed on 14 bits ([13:0] bits) |
AnnaBridge | 171:3a7713b1edbc | 723 | * @rmtoll NLR PL LL_DMA2D_GetNbrOfPixelsPerLines |
AnnaBridge | 171:3a7713b1edbc | 724 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 725 | * @retval Number of pixels per lines value between Min_Data=0 and Max_Data=0x3FFF |
AnnaBridge | 171:3a7713b1edbc | 726 | */ |
AnnaBridge | 171:3a7713b1edbc | 727 | __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfPixelsPerLines(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 728 | { |
AnnaBridge | 171:3a7713b1edbc | 729 | return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_PL) >> DMA2D_NLR_PL_Pos); |
AnnaBridge | 171:3a7713b1edbc | 730 | } |
AnnaBridge | 171:3a7713b1edbc | 731 | |
AnnaBridge | 171:3a7713b1edbc | 732 | /** |
AnnaBridge | 171:3a7713b1edbc | 733 | * @brief Set DMA2D number of lines, expressed on 16 bits ([15:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 734 | * @rmtoll NLR NL LL_DMA2D_SetNbrOfLines |
AnnaBridge | 171:3a7713b1edbc | 735 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 736 | * @param NbrOfLines Value between Min_Data=0 and Max_Data=0xFFFF |
AnnaBridge | 171:3a7713b1edbc | 737 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 738 | */ |
AnnaBridge | 171:3a7713b1edbc | 739 | __STATIC_INLINE void LL_DMA2D_SetNbrOfLines(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines) |
AnnaBridge | 171:3a7713b1edbc | 740 | { |
AnnaBridge | 171:3a7713b1edbc | 741 | MODIFY_REG(DMA2Dx->NLR, DMA2D_NLR_NL, NbrOfLines); |
AnnaBridge | 171:3a7713b1edbc | 742 | } |
AnnaBridge | 171:3a7713b1edbc | 743 | |
AnnaBridge | 171:3a7713b1edbc | 744 | /** |
AnnaBridge | 171:3a7713b1edbc | 745 | * @brief Return DMA2D number of lines, expressed on 16 bits ([15:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 746 | * @rmtoll NLR NL LL_DMA2D_GetNbrOfLines |
AnnaBridge | 171:3a7713b1edbc | 747 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 748 | * @retval Number of lines value between Min_Data=0 and Max_Data=0xFFFF |
AnnaBridge | 171:3a7713b1edbc | 749 | */ |
AnnaBridge | 171:3a7713b1edbc | 750 | __STATIC_INLINE uint32_t LL_DMA2D_GetNbrOfLines(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 751 | { |
AnnaBridge | 171:3a7713b1edbc | 752 | return (uint32_t)(READ_BIT(DMA2Dx->NLR, DMA2D_NLR_NL)); |
AnnaBridge | 171:3a7713b1edbc | 753 | } |
AnnaBridge | 171:3a7713b1edbc | 754 | |
AnnaBridge | 171:3a7713b1edbc | 755 | /** |
AnnaBridge | 171:3a7713b1edbc | 756 | * @brief Set DMA2D output memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 757 | * @rmtoll OMAR MA LL_DMA2D_SetOutputMemAddr |
AnnaBridge | 171:3a7713b1edbc | 758 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 759 | * @param OutputMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 760 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 761 | */ |
AnnaBridge | 171:3a7713b1edbc | 762 | __STATIC_INLINE void LL_DMA2D_SetOutputMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t OutputMemoryAddress) |
AnnaBridge | 171:3a7713b1edbc | 763 | { |
AnnaBridge | 171:3a7713b1edbc | 764 | LL_DMA2D_WriteReg(DMA2Dx, OMAR, OutputMemoryAddress); |
AnnaBridge | 171:3a7713b1edbc | 765 | } |
AnnaBridge | 171:3a7713b1edbc | 766 | |
AnnaBridge | 171:3a7713b1edbc | 767 | /** |
AnnaBridge | 171:3a7713b1edbc | 768 | * @brief Get DMA2D output memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 769 | * @rmtoll OMAR MA LL_DMA2D_GetOutputMemAddr |
AnnaBridge | 171:3a7713b1edbc | 770 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 771 | * @retval Output memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 772 | */ |
AnnaBridge | 171:3a7713b1edbc | 773 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputMemAddr(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 774 | { |
AnnaBridge | 171:3a7713b1edbc | 775 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, OMAR)); |
AnnaBridge | 171:3a7713b1edbc | 776 | } |
AnnaBridge | 171:3a7713b1edbc | 777 | |
AnnaBridge | 171:3a7713b1edbc | 778 | /** |
AnnaBridge | 171:3a7713b1edbc | 779 | * @brief Set DMA2D output color, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 780 | * @note Output color format depends on output color mode, ARGB8888, RGB888, |
AnnaBridge | 171:3a7713b1edbc | 781 | * RGB565, ARGB1555 or ARGB4444. |
AnnaBridge | 171:3a7713b1edbc | 782 | * @note LL_DMA2D_ConfigOutputColor() API may be used instead if colors values formatting |
AnnaBridge | 171:3a7713b1edbc | 783 | * with respect to color mode is not done by the user code. |
AnnaBridge | 171:3a7713b1edbc | 784 | * @rmtoll OCOLR BLUE LL_DMA2D_SetOutputColor\n |
AnnaBridge | 171:3a7713b1edbc | 785 | * OCOLR GREEN LL_DMA2D_SetOutputColor\n |
AnnaBridge | 171:3a7713b1edbc | 786 | * OCOLR RED LL_DMA2D_SetOutputColor\n |
AnnaBridge | 171:3a7713b1edbc | 787 | * OCOLR ALPHA LL_DMA2D_SetOutputColor |
AnnaBridge | 171:3a7713b1edbc | 788 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 789 | * @param OutputColor Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 790 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 791 | */ |
AnnaBridge | 171:3a7713b1edbc | 792 | __STATIC_INLINE void LL_DMA2D_SetOutputColor(DMA2D_TypeDef *DMA2Dx, uint32_t OutputColor) |
AnnaBridge | 171:3a7713b1edbc | 793 | { |
AnnaBridge | 171:3a7713b1edbc | 794 | MODIFY_REG(DMA2Dx->OCOLR, (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1), \ |
AnnaBridge | 171:3a7713b1edbc | 795 | OutputColor); |
AnnaBridge | 171:3a7713b1edbc | 796 | } |
AnnaBridge | 171:3a7713b1edbc | 797 | |
AnnaBridge | 171:3a7713b1edbc | 798 | /** |
AnnaBridge | 171:3a7713b1edbc | 799 | * @brief Get DMA2D output color, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 800 | * @note Alpha channel and red, green, blue color values must be retrieved from the returned |
AnnaBridge | 171:3a7713b1edbc | 801 | * value based on the output color mode (ARGB8888, RGB888, RGB565, ARGB1555 or ARGB4444) |
AnnaBridge | 171:3a7713b1edbc | 802 | * as set by @ref LL_DMA2D_SetOutputColorMode. |
AnnaBridge | 171:3a7713b1edbc | 803 | * @rmtoll OCOLR BLUE LL_DMA2D_GetOutputColor\n |
AnnaBridge | 171:3a7713b1edbc | 804 | * OCOLR GREEN LL_DMA2D_GetOutputColor\n |
AnnaBridge | 171:3a7713b1edbc | 805 | * OCOLR RED LL_DMA2D_GetOutputColor\n |
AnnaBridge | 171:3a7713b1edbc | 806 | * OCOLR ALPHA LL_DMA2D_GetOutputColor |
AnnaBridge | 171:3a7713b1edbc | 807 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 808 | * @retval Output color value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 809 | */ |
AnnaBridge | 171:3a7713b1edbc | 810 | __STATIC_INLINE uint32_t LL_DMA2D_GetOutputColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 811 | { |
AnnaBridge | 171:3a7713b1edbc | 812 | return (uint32_t)(READ_BIT(DMA2Dx->OCOLR, \ |
AnnaBridge | 171:3a7713b1edbc | 813 | (DMA2D_OCOLR_BLUE_1 | DMA2D_OCOLR_GREEN_1 | DMA2D_OCOLR_RED_1 | DMA2D_OCOLR_ALPHA_1))); |
AnnaBridge | 171:3a7713b1edbc | 814 | } |
AnnaBridge | 171:3a7713b1edbc | 815 | |
AnnaBridge | 171:3a7713b1edbc | 816 | /** |
AnnaBridge | 171:3a7713b1edbc | 817 | * @brief Set DMA2D line watermark, expressed on 16 bits ([15:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 818 | * @rmtoll LWR LW LL_DMA2D_SetLineWatermark |
AnnaBridge | 171:3a7713b1edbc | 819 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 820 | * @param LineWatermark Value between Min_Data=0 and Max_Data=0xFFFF |
AnnaBridge | 171:3a7713b1edbc | 821 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 822 | */ |
AnnaBridge | 171:3a7713b1edbc | 823 | __STATIC_INLINE void LL_DMA2D_SetLineWatermark(DMA2D_TypeDef *DMA2Dx, uint32_t LineWatermark) |
AnnaBridge | 171:3a7713b1edbc | 824 | { |
AnnaBridge | 171:3a7713b1edbc | 825 | MODIFY_REG(DMA2Dx->LWR, DMA2D_LWR_LW, LineWatermark); |
AnnaBridge | 171:3a7713b1edbc | 826 | } |
AnnaBridge | 171:3a7713b1edbc | 827 | |
AnnaBridge | 171:3a7713b1edbc | 828 | /** |
AnnaBridge | 171:3a7713b1edbc | 829 | * @brief Return DMA2D line watermark, expressed on 16 bits ([15:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 830 | * @rmtoll LWR LW LL_DMA2D_GetLineWatermark |
AnnaBridge | 171:3a7713b1edbc | 831 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 832 | * @retval Line watermark value between Min_Data=0 and Max_Data=0xFFFF |
AnnaBridge | 171:3a7713b1edbc | 833 | */ |
AnnaBridge | 171:3a7713b1edbc | 834 | __STATIC_INLINE uint32_t LL_DMA2D_GetLineWatermark(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 835 | { |
AnnaBridge | 171:3a7713b1edbc | 836 | return (uint32_t)(READ_BIT(DMA2Dx->LWR, DMA2D_LWR_LW)); |
AnnaBridge | 171:3a7713b1edbc | 837 | } |
AnnaBridge | 171:3a7713b1edbc | 838 | |
AnnaBridge | 171:3a7713b1edbc | 839 | /** |
AnnaBridge | 171:3a7713b1edbc | 840 | * @brief Set DMA2D dead time, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 841 | * @rmtoll AMTCR DT LL_DMA2D_SetDeadTime |
AnnaBridge | 171:3a7713b1edbc | 842 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 843 | * @param DeadTime Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 844 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 845 | */ |
AnnaBridge | 171:3a7713b1edbc | 846 | __STATIC_INLINE void LL_DMA2D_SetDeadTime(DMA2D_TypeDef *DMA2Dx, uint32_t DeadTime) |
AnnaBridge | 171:3a7713b1edbc | 847 | { |
AnnaBridge | 171:3a7713b1edbc | 848 | MODIFY_REG(DMA2Dx->AMTCR, DMA2D_AMTCR_DT, (DeadTime << DMA2D_AMTCR_DT_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 849 | } |
AnnaBridge | 171:3a7713b1edbc | 850 | |
AnnaBridge | 171:3a7713b1edbc | 851 | /** |
AnnaBridge | 171:3a7713b1edbc | 852 | * @brief Return DMA2D dead time, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 853 | * @rmtoll AMTCR DT LL_DMA2D_GetDeadTime |
AnnaBridge | 171:3a7713b1edbc | 854 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 855 | * @retval Dead time value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 856 | */ |
AnnaBridge | 171:3a7713b1edbc | 857 | __STATIC_INLINE uint32_t LL_DMA2D_GetDeadTime(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 858 | { |
AnnaBridge | 171:3a7713b1edbc | 859 | return (uint32_t)(READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_DT) >> DMA2D_AMTCR_DT_Pos); |
AnnaBridge | 171:3a7713b1edbc | 860 | } |
AnnaBridge | 171:3a7713b1edbc | 861 | |
AnnaBridge | 171:3a7713b1edbc | 862 | /** |
AnnaBridge | 171:3a7713b1edbc | 863 | * @brief Enable DMA2D dead time functionality. |
AnnaBridge | 171:3a7713b1edbc | 864 | * @rmtoll AMTCR EN LL_DMA2D_EnableDeadTime |
AnnaBridge | 171:3a7713b1edbc | 865 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 866 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 867 | */ |
AnnaBridge | 171:3a7713b1edbc | 868 | __STATIC_INLINE void LL_DMA2D_EnableDeadTime(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 869 | { |
AnnaBridge | 171:3a7713b1edbc | 870 | SET_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); |
AnnaBridge | 171:3a7713b1edbc | 871 | } |
AnnaBridge | 171:3a7713b1edbc | 872 | |
AnnaBridge | 171:3a7713b1edbc | 873 | /** |
AnnaBridge | 171:3a7713b1edbc | 874 | * @brief Disable DMA2D dead time functionality. |
AnnaBridge | 171:3a7713b1edbc | 875 | * @rmtoll AMTCR EN LL_DMA2D_DisableDeadTime |
AnnaBridge | 171:3a7713b1edbc | 876 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 877 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 878 | */ |
AnnaBridge | 171:3a7713b1edbc | 879 | __STATIC_INLINE void LL_DMA2D_DisableDeadTime(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 880 | { |
AnnaBridge | 171:3a7713b1edbc | 881 | CLEAR_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN); |
AnnaBridge | 171:3a7713b1edbc | 882 | } |
AnnaBridge | 171:3a7713b1edbc | 883 | |
AnnaBridge | 171:3a7713b1edbc | 884 | /** |
AnnaBridge | 171:3a7713b1edbc | 885 | * @brief Indicate if DMA2D dead time functionality is enabled. |
AnnaBridge | 171:3a7713b1edbc | 886 | * @rmtoll AMTCR EN LL_DMA2D_IsEnabledDeadTime |
AnnaBridge | 171:3a7713b1edbc | 887 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 888 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 889 | */ |
AnnaBridge | 171:3a7713b1edbc | 890 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledDeadTime(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 891 | { |
AnnaBridge | 171:3a7713b1edbc | 892 | return (READ_BIT(DMA2Dx->AMTCR, DMA2D_AMTCR_EN) == (DMA2D_AMTCR_EN)); |
AnnaBridge | 171:3a7713b1edbc | 893 | } |
AnnaBridge | 171:3a7713b1edbc | 894 | |
AnnaBridge | 171:3a7713b1edbc | 895 | /** @defgroup DMA2D_LL_EF_FGND_Configuration Foreground Configuration Functions |
AnnaBridge | 171:3a7713b1edbc | 896 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 897 | */ |
AnnaBridge | 171:3a7713b1edbc | 898 | |
AnnaBridge | 171:3a7713b1edbc | 899 | /** |
AnnaBridge | 171:3a7713b1edbc | 900 | * @brief Set DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 901 | * @rmtoll FGMAR MA LL_DMA2D_FGND_SetMemAddr |
AnnaBridge | 171:3a7713b1edbc | 902 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 903 | * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 904 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 905 | */ |
AnnaBridge | 171:3a7713b1edbc | 906 | __STATIC_INLINE void LL_DMA2D_FGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) |
AnnaBridge | 171:3a7713b1edbc | 907 | { |
AnnaBridge | 171:3a7713b1edbc | 908 | LL_DMA2D_WriteReg(DMA2Dx, FGMAR, MemoryAddress); |
AnnaBridge | 171:3a7713b1edbc | 909 | } |
AnnaBridge | 171:3a7713b1edbc | 910 | |
AnnaBridge | 171:3a7713b1edbc | 911 | /** |
AnnaBridge | 171:3a7713b1edbc | 912 | * @brief Get DMA2D foreground memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 913 | * @rmtoll FGMAR MA LL_DMA2D_FGND_GetMemAddr |
AnnaBridge | 171:3a7713b1edbc | 914 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 915 | * @retval Foreground memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 916 | */ |
AnnaBridge | 171:3a7713b1edbc | 917 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 918 | { |
AnnaBridge | 171:3a7713b1edbc | 919 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGMAR)); |
AnnaBridge | 171:3a7713b1edbc | 920 | } |
AnnaBridge | 171:3a7713b1edbc | 921 | |
AnnaBridge | 171:3a7713b1edbc | 922 | /** |
AnnaBridge | 171:3a7713b1edbc | 923 | * @brief Enable DMA2D foreground CLUT loading. |
AnnaBridge | 171:3a7713b1edbc | 924 | * @rmtoll FGPFCCR START LL_DMA2D_FGND_EnableCLUTLoad |
AnnaBridge | 171:3a7713b1edbc | 925 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 926 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 927 | */ |
AnnaBridge | 171:3a7713b1edbc | 928 | __STATIC_INLINE void LL_DMA2D_FGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 929 | { |
AnnaBridge | 171:3a7713b1edbc | 930 | SET_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START); |
AnnaBridge | 171:3a7713b1edbc | 931 | } |
AnnaBridge | 171:3a7713b1edbc | 932 | |
AnnaBridge | 171:3a7713b1edbc | 933 | /** |
AnnaBridge | 171:3a7713b1edbc | 934 | * @brief Indicate if DMA2D foreground CLUT loading is enabled. |
AnnaBridge | 171:3a7713b1edbc | 935 | * @rmtoll FGPFCCR START LL_DMA2D_FGND_IsEnabledCLUTLoad |
AnnaBridge | 171:3a7713b1edbc | 936 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 937 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 938 | */ |
AnnaBridge | 171:3a7713b1edbc | 939 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 940 | { |
AnnaBridge | 171:3a7713b1edbc | 941 | return (READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_START) == (DMA2D_FGPFCCR_START)); |
AnnaBridge | 171:3a7713b1edbc | 942 | } |
AnnaBridge | 171:3a7713b1edbc | 943 | |
AnnaBridge | 171:3a7713b1edbc | 944 | /** |
AnnaBridge | 171:3a7713b1edbc | 945 | * @brief Set DMA2D foreground color mode. |
AnnaBridge | 171:3a7713b1edbc | 946 | * @rmtoll FGPFCCR CM LL_DMA2D_FGND_SetColorMode |
AnnaBridge | 171:3a7713b1edbc | 947 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 948 | * @param ColorMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 949 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 950 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 951 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
AnnaBridge | 171:3a7713b1edbc | 952 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
AnnaBridge | 171:3a7713b1edbc | 953 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
AnnaBridge | 171:3a7713b1edbc | 954 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
AnnaBridge | 171:3a7713b1edbc | 955 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
AnnaBridge | 171:3a7713b1edbc | 956 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
AnnaBridge | 171:3a7713b1edbc | 957 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
AnnaBridge | 171:3a7713b1edbc | 958 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
AnnaBridge | 171:3a7713b1edbc | 959 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
AnnaBridge | 171:3a7713b1edbc | 960 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 961 | */ |
AnnaBridge | 171:3a7713b1edbc | 962 | __STATIC_INLINE void LL_DMA2D_FGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
AnnaBridge | 171:3a7713b1edbc | 963 | { |
AnnaBridge | 171:3a7713b1edbc | 964 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM, ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 965 | } |
AnnaBridge | 171:3a7713b1edbc | 966 | |
AnnaBridge | 171:3a7713b1edbc | 967 | /** |
AnnaBridge | 171:3a7713b1edbc | 968 | * @brief Return DMA2D foreground color mode. |
AnnaBridge | 171:3a7713b1edbc | 969 | * @rmtoll FGPFCCR CM LL_DMA2D_FGND_GetColorMode |
AnnaBridge | 171:3a7713b1edbc | 970 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 971 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 972 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 973 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 974 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
AnnaBridge | 171:3a7713b1edbc | 975 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
AnnaBridge | 171:3a7713b1edbc | 976 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
AnnaBridge | 171:3a7713b1edbc | 977 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
AnnaBridge | 171:3a7713b1edbc | 978 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
AnnaBridge | 171:3a7713b1edbc | 979 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
AnnaBridge | 171:3a7713b1edbc | 980 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
AnnaBridge | 171:3a7713b1edbc | 981 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
AnnaBridge | 171:3a7713b1edbc | 982 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
AnnaBridge | 171:3a7713b1edbc | 983 | */ |
AnnaBridge | 171:3a7713b1edbc | 984 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 985 | { |
AnnaBridge | 171:3a7713b1edbc | 986 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CM)); |
AnnaBridge | 171:3a7713b1edbc | 987 | } |
AnnaBridge | 171:3a7713b1edbc | 988 | |
AnnaBridge | 171:3a7713b1edbc | 989 | /** |
AnnaBridge | 171:3a7713b1edbc | 990 | * @brief Set DMA2D foreground alpha mode. |
AnnaBridge | 171:3a7713b1edbc | 991 | * @rmtoll FGPFCCR AM LL_DMA2D_FGND_SetAlphaMode |
AnnaBridge | 171:3a7713b1edbc | 992 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 993 | * @param AphaMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 994 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
AnnaBridge | 171:3a7713b1edbc | 995 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
AnnaBridge | 171:3a7713b1edbc | 996 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
AnnaBridge | 171:3a7713b1edbc | 997 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 998 | */ |
AnnaBridge | 171:3a7713b1edbc | 999 | __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) |
AnnaBridge | 171:3a7713b1edbc | 1000 | { |
AnnaBridge | 171:3a7713b1edbc | 1001 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM, AphaMode); |
AnnaBridge | 171:3a7713b1edbc | 1002 | } |
AnnaBridge | 171:3a7713b1edbc | 1003 | |
AnnaBridge | 171:3a7713b1edbc | 1004 | /** |
AnnaBridge | 171:3a7713b1edbc | 1005 | * @brief Return DMA2D foreground alpha mode. |
AnnaBridge | 171:3a7713b1edbc | 1006 | * @rmtoll FGPFCCR AM LL_DMA2D_FGND_GetAlphaMode |
AnnaBridge | 171:3a7713b1edbc | 1007 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1008 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1009 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
AnnaBridge | 171:3a7713b1edbc | 1010 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
AnnaBridge | 171:3a7713b1edbc | 1011 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
AnnaBridge | 171:3a7713b1edbc | 1012 | */ |
AnnaBridge | 171:3a7713b1edbc | 1013 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1014 | { |
AnnaBridge | 171:3a7713b1edbc | 1015 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AM)); |
AnnaBridge | 171:3a7713b1edbc | 1016 | } |
AnnaBridge | 171:3a7713b1edbc | 1017 | |
AnnaBridge | 171:3a7713b1edbc | 1018 | /** |
AnnaBridge | 171:3a7713b1edbc | 1019 | * @brief Set DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1020 | * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_SetAlpha |
AnnaBridge | 171:3a7713b1edbc | 1021 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1022 | * @param Alpha Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1023 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1024 | */ |
AnnaBridge | 171:3a7713b1edbc | 1025 | __STATIC_INLINE void LL_DMA2D_FGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) |
AnnaBridge | 171:3a7713b1edbc | 1026 | { |
AnnaBridge | 171:3a7713b1edbc | 1027 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA, (Alpha << DMA2D_FGPFCCR_ALPHA_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1028 | } |
AnnaBridge | 171:3a7713b1edbc | 1029 | |
AnnaBridge | 171:3a7713b1edbc | 1030 | /** |
AnnaBridge | 171:3a7713b1edbc | 1031 | * @brief Return DMA2D foreground alpha value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1032 | * @rmtoll FGPFCCR ALPHA LL_DMA2D_FGND_GetAlpha |
AnnaBridge | 171:3a7713b1edbc | 1033 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1034 | * @retval Alpha value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1035 | */ |
AnnaBridge | 171:3a7713b1edbc | 1036 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1037 | { |
AnnaBridge | 171:3a7713b1edbc | 1038 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_ALPHA) >> DMA2D_FGPFCCR_ALPHA_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1039 | } |
AnnaBridge | 171:3a7713b1edbc | 1040 | |
AnnaBridge | 171:3a7713b1edbc | 1041 | #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT) |
AnnaBridge | 171:3a7713b1edbc | 1042 | /** |
AnnaBridge | 171:3a7713b1edbc | 1043 | * @brief Set DMA2D foreground Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 1044 | * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_SetRBSwapMode |
AnnaBridge | 171:3a7713b1edbc | 1045 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1046 | * @param RBSwapMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1047 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1048 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
AnnaBridge | 171:3a7713b1edbc | 1049 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1050 | */ |
AnnaBridge | 171:3a7713b1edbc | 1051 | __STATIC_INLINE void LL_DMA2D_FGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) |
AnnaBridge | 171:3a7713b1edbc | 1052 | { |
AnnaBridge | 171:3a7713b1edbc | 1053 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS, RBSwapMode); |
AnnaBridge | 171:3a7713b1edbc | 1054 | } |
AnnaBridge | 171:3a7713b1edbc | 1055 | |
AnnaBridge | 171:3a7713b1edbc | 1056 | /** |
AnnaBridge | 171:3a7713b1edbc | 1057 | * @brief Return DMA2D foreground Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 1058 | * @rmtoll FGPFCCR RBS LL_DMA2D_FGND_GetRBSwapMode |
AnnaBridge | 171:3a7713b1edbc | 1059 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1060 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1061 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1062 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
AnnaBridge | 171:3a7713b1edbc | 1063 | */ |
AnnaBridge | 171:3a7713b1edbc | 1064 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1065 | { |
AnnaBridge | 171:3a7713b1edbc | 1066 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_RBS)); |
AnnaBridge | 171:3a7713b1edbc | 1067 | } |
AnnaBridge | 171:3a7713b1edbc | 1068 | |
AnnaBridge | 171:3a7713b1edbc | 1069 | /** |
AnnaBridge | 171:3a7713b1edbc | 1070 | * @brief Set DMA2D foreground alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 1071 | * @rmtoll FGPFCCR AI LL_DMA2D_FGND_SetAlphaInvMode |
AnnaBridge | 171:3a7713b1edbc | 1072 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1073 | * @param AlphaInversionMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1074 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1075 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
AnnaBridge | 171:3a7713b1edbc | 1076 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1077 | */ |
AnnaBridge | 171:3a7713b1edbc | 1078 | __STATIC_INLINE void LL_DMA2D_FGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) |
AnnaBridge | 171:3a7713b1edbc | 1079 | { |
AnnaBridge | 171:3a7713b1edbc | 1080 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI, AlphaInversionMode); |
AnnaBridge | 171:3a7713b1edbc | 1081 | } |
AnnaBridge | 171:3a7713b1edbc | 1082 | |
AnnaBridge | 171:3a7713b1edbc | 1083 | /** |
AnnaBridge | 171:3a7713b1edbc | 1084 | * @brief Return DMA2D foreground alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 1085 | * @rmtoll FGPFCCR AI LL_DMA2D_FGND_GetAlphaInvMode |
AnnaBridge | 171:3a7713b1edbc | 1086 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1087 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1088 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1089 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
AnnaBridge | 171:3a7713b1edbc | 1090 | */ |
AnnaBridge | 171:3a7713b1edbc | 1091 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1092 | { |
AnnaBridge | 171:3a7713b1edbc | 1093 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_AI)); |
AnnaBridge | 171:3a7713b1edbc | 1094 | } |
AnnaBridge | 171:3a7713b1edbc | 1095 | |
AnnaBridge | 171:3a7713b1edbc | 1096 | #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */ |
AnnaBridge | 171:3a7713b1edbc | 1097 | |
AnnaBridge | 171:3a7713b1edbc | 1098 | /** |
AnnaBridge | 171:3a7713b1edbc | 1099 | * @brief Set DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1100 | * @rmtoll FGOR LO LL_DMA2D_FGND_SetLineOffset |
AnnaBridge | 171:3a7713b1edbc | 1101 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1102 | * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF |
AnnaBridge | 171:3a7713b1edbc | 1103 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1104 | */ |
AnnaBridge | 171:3a7713b1edbc | 1105 | __STATIC_INLINE void LL_DMA2D_FGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) |
AnnaBridge | 171:3a7713b1edbc | 1106 | { |
AnnaBridge | 171:3a7713b1edbc | 1107 | MODIFY_REG(DMA2Dx->FGOR, DMA2D_FGOR_LO, LineOffset); |
AnnaBridge | 171:3a7713b1edbc | 1108 | } |
AnnaBridge | 171:3a7713b1edbc | 1109 | |
AnnaBridge | 171:3a7713b1edbc | 1110 | /** |
AnnaBridge | 171:3a7713b1edbc | 1111 | * @brief Return DMA2D foreground line offset, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1112 | * @rmtoll FGOR LO LL_DMA2D_FGND_GetLineOffset |
AnnaBridge | 171:3a7713b1edbc | 1113 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1114 | * @retval Foreground line offset value between Min_Data=0 and Max_Data=0x3FF |
AnnaBridge | 171:3a7713b1edbc | 1115 | */ |
AnnaBridge | 171:3a7713b1edbc | 1116 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1117 | { |
AnnaBridge | 171:3a7713b1edbc | 1118 | return (uint32_t)(READ_BIT(DMA2Dx->FGOR, DMA2D_FGOR_LO)); |
AnnaBridge | 171:3a7713b1edbc | 1119 | } |
AnnaBridge | 171:3a7713b1edbc | 1120 | |
AnnaBridge | 171:3a7713b1edbc | 1121 | /** |
AnnaBridge | 171:3a7713b1edbc | 1122 | * @brief Set DMA2D foreground color values, expressed on 24 bits ([23:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1123 | * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetColor |
AnnaBridge | 171:3a7713b1edbc | 1124 | * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetColor |
AnnaBridge | 171:3a7713b1edbc | 1125 | * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetColor |
AnnaBridge | 171:3a7713b1edbc | 1126 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1127 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1128 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1129 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1130 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1131 | */ |
AnnaBridge | 171:3a7713b1edbc | 1132 | __STATIC_INLINE void LL_DMA2D_FGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) |
AnnaBridge | 171:3a7713b1edbc | 1133 | { |
AnnaBridge | 171:3a7713b1edbc | 1134 | MODIFY_REG(DMA2Dx->FGCOLR, (DMA2D_FGCOLR_RED | DMA2D_FGCOLR_GREEN | DMA2D_FGCOLR_BLUE), \ |
AnnaBridge | 171:3a7713b1edbc | 1135 | ((Red << DMA2D_FGCOLR_RED_Pos) | (Green << DMA2D_FGCOLR_GREEN_Pos) | Blue)); |
AnnaBridge | 171:3a7713b1edbc | 1136 | } |
AnnaBridge | 171:3a7713b1edbc | 1137 | |
AnnaBridge | 171:3a7713b1edbc | 1138 | /** |
AnnaBridge | 171:3a7713b1edbc | 1139 | * @brief Set DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1140 | * @rmtoll FGCOLR RED LL_DMA2D_FGND_SetRedColor |
AnnaBridge | 171:3a7713b1edbc | 1141 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1142 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1143 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1144 | */ |
AnnaBridge | 171:3a7713b1edbc | 1145 | __STATIC_INLINE void LL_DMA2D_FGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) |
AnnaBridge | 171:3a7713b1edbc | 1146 | { |
AnnaBridge | 171:3a7713b1edbc | 1147 | MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED, (Red << DMA2D_FGCOLR_RED_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1148 | } |
AnnaBridge | 171:3a7713b1edbc | 1149 | |
AnnaBridge | 171:3a7713b1edbc | 1150 | /** |
AnnaBridge | 171:3a7713b1edbc | 1151 | * @brief Return DMA2D foreground red color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1152 | * @rmtoll FGCOLR RED LL_DMA2D_FGND_GetRedColor |
AnnaBridge | 171:3a7713b1edbc | 1153 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1154 | * @retval Red color value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1155 | */ |
AnnaBridge | 171:3a7713b1edbc | 1156 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1157 | { |
AnnaBridge | 171:3a7713b1edbc | 1158 | return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_RED) >> DMA2D_FGCOLR_RED_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1159 | } |
AnnaBridge | 171:3a7713b1edbc | 1160 | |
AnnaBridge | 171:3a7713b1edbc | 1161 | /** |
AnnaBridge | 171:3a7713b1edbc | 1162 | * @brief Set DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1163 | * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_SetGreenColor |
AnnaBridge | 171:3a7713b1edbc | 1164 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1165 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1166 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1167 | */ |
AnnaBridge | 171:3a7713b1edbc | 1168 | __STATIC_INLINE void LL_DMA2D_FGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) |
AnnaBridge | 171:3a7713b1edbc | 1169 | { |
AnnaBridge | 171:3a7713b1edbc | 1170 | MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN, (Green << DMA2D_FGCOLR_GREEN_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1171 | } |
AnnaBridge | 171:3a7713b1edbc | 1172 | |
AnnaBridge | 171:3a7713b1edbc | 1173 | /** |
AnnaBridge | 171:3a7713b1edbc | 1174 | * @brief Return DMA2D foreground green color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1175 | * @rmtoll FGCOLR GREEN LL_DMA2D_FGND_GetGreenColor |
AnnaBridge | 171:3a7713b1edbc | 1176 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1177 | * @retval Green color value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1178 | */ |
AnnaBridge | 171:3a7713b1edbc | 1179 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1180 | { |
AnnaBridge | 171:3a7713b1edbc | 1181 | return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_GREEN) >> DMA2D_FGCOLR_GREEN_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1182 | } |
AnnaBridge | 171:3a7713b1edbc | 1183 | |
AnnaBridge | 171:3a7713b1edbc | 1184 | /** |
AnnaBridge | 171:3a7713b1edbc | 1185 | * @brief Set DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1186 | * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_SetBlueColor |
AnnaBridge | 171:3a7713b1edbc | 1187 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1188 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1189 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1190 | */ |
AnnaBridge | 171:3a7713b1edbc | 1191 | __STATIC_INLINE void LL_DMA2D_FGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) |
AnnaBridge | 171:3a7713b1edbc | 1192 | { |
AnnaBridge | 171:3a7713b1edbc | 1193 | MODIFY_REG(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE, Blue); |
AnnaBridge | 171:3a7713b1edbc | 1194 | } |
AnnaBridge | 171:3a7713b1edbc | 1195 | |
AnnaBridge | 171:3a7713b1edbc | 1196 | /** |
AnnaBridge | 171:3a7713b1edbc | 1197 | * @brief Return DMA2D foreground blue color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1198 | * @rmtoll FGCOLR BLUE LL_DMA2D_FGND_GetBlueColor |
AnnaBridge | 171:3a7713b1edbc | 1199 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1200 | * @retval Blue color value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1201 | */ |
AnnaBridge | 171:3a7713b1edbc | 1202 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1203 | { |
AnnaBridge | 171:3a7713b1edbc | 1204 | return (uint32_t)(READ_BIT(DMA2Dx->FGCOLR, DMA2D_FGCOLR_BLUE)); |
AnnaBridge | 171:3a7713b1edbc | 1205 | } |
AnnaBridge | 171:3a7713b1edbc | 1206 | |
AnnaBridge | 171:3a7713b1edbc | 1207 | /** |
AnnaBridge | 171:3a7713b1edbc | 1208 | * @brief Set DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1209 | * @rmtoll FGCMAR MA LL_DMA2D_FGND_SetCLUTMemAddr |
AnnaBridge | 171:3a7713b1edbc | 1210 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1211 | * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 1212 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1213 | */ |
AnnaBridge | 171:3a7713b1edbc | 1214 | __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) |
AnnaBridge | 171:3a7713b1edbc | 1215 | { |
AnnaBridge | 171:3a7713b1edbc | 1216 | LL_DMA2D_WriteReg(DMA2Dx, FGCMAR, CLUTMemoryAddress); |
AnnaBridge | 171:3a7713b1edbc | 1217 | } |
AnnaBridge | 171:3a7713b1edbc | 1218 | |
AnnaBridge | 171:3a7713b1edbc | 1219 | /** |
AnnaBridge | 171:3a7713b1edbc | 1220 | * @brief Get DMA2D foreground CLUT memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1221 | * @rmtoll FGCMAR MA LL_DMA2D_FGND_GetCLUTMemAddr |
AnnaBridge | 171:3a7713b1edbc | 1222 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1223 | * @retval Foreground CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 1224 | */ |
AnnaBridge | 171:3a7713b1edbc | 1225 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1226 | { |
AnnaBridge | 171:3a7713b1edbc | 1227 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, FGCMAR)); |
AnnaBridge | 171:3a7713b1edbc | 1228 | } |
AnnaBridge | 171:3a7713b1edbc | 1229 | |
AnnaBridge | 171:3a7713b1edbc | 1230 | /** |
AnnaBridge | 171:3a7713b1edbc | 1231 | * @brief Set DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1232 | * @rmtoll FGPFCCR CS LL_DMA2D_FGND_SetCLUTSize |
AnnaBridge | 171:3a7713b1edbc | 1233 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1234 | * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1235 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1236 | */ |
AnnaBridge | 171:3a7713b1edbc | 1237 | __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) |
AnnaBridge | 171:3a7713b1edbc | 1238 | { |
AnnaBridge | 171:3a7713b1edbc | 1239 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS, (CLUTSize << DMA2D_FGPFCCR_CS_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1240 | } |
AnnaBridge | 171:3a7713b1edbc | 1241 | |
AnnaBridge | 171:3a7713b1edbc | 1242 | /** |
AnnaBridge | 171:3a7713b1edbc | 1243 | * @brief Get DMA2D foreground CLUT size, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1244 | * @rmtoll FGPFCCR CS LL_DMA2D_FGND_GetCLUTSize |
AnnaBridge | 171:3a7713b1edbc | 1245 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1246 | * @retval Foreground CLUT size value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1247 | */ |
AnnaBridge | 171:3a7713b1edbc | 1248 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1249 | { |
AnnaBridge | 171:3a7713b1edbc | 1250 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CS) >> DMA2D_FGPFCCR_CS_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1251 | } |
AnnaBridge | 171:3a7713b1edbc | 1252 | |
AnnaBridge | 171:3a7713b1edbc | 1253 | /** |
AnnaBridge | 171:3a7713b1edbc | 1254 | * @brief Set DMA2D foreground CLUT color mode. |
AnnaBridge | 171:3a7713b1edbc | 1255 | * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_SetCLUTColorMode |
AnnaBridge | 171:3a7713b1edbc | 1256 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1257 | * @param CLUTColorMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1258 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 1259 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 1260 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1261 | */ |
AnnaBridge | 171:3a7713b1edbc | 1262 | __STATIC_INLINE void LL_DMA2D_FGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) |
AnnaBridge | 171:3a7713b1edbc | 1263 | { |
AnnaBridge | 171:3a7713b1edbc | 1264 | MODIFY_REG(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM, CLUTColorMode); |
AnnaBridge | 171:3a7713b1edbc | 1265 | } |
AnnaBridge | 171:3a7713b1edbc | 1266 | |
AnnaBridge | 171:3a7713b1edbc | 1267 | /** |
AnnaBridge | 171:3a7713b1edbc | 1268 | * @brief Return DMA2D foreground CLUT color mode. |
AnnaBridge | 171:3a7713b1edbc | 1269 | * @rmtoll FGPFCCR CCM LL_DMA2D_FGND_GetCLUTColorMode |
AnnaBridge | 171:3a7713b1edbc | 1270 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1271 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1272 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 1273 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 1274 | */ |
AnnaBridge | 171:3a7713b1edbc | 1275 | __STATIC_INLINE uint32_t LL_DMA2D_FGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1276 | { |
AnnaBridge | 171:3a7713b1edbc | 1277 | return (uint32_t)(READ_BIT(DMA2Dx->FGPFCCR, DMA2D_FGPFCCR_CCM)); |
AnnaBridge | 171:3a7713b1edbc | 1278 | } |
AnnaBridge | 171:3a7713b1edbc | 1279 | |
AnnaBridge | 171:3a7713b1edbc | 1280 | /** |
AnnaBridge | 171:3a7713b1edbc | 1281 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1282 | */ |
AnnaBridge | 171:3a7713b1edbc | 1283 | |
AnnaBridge | 171:3a7713b1edbc | 1284 | /** @defgroup DMA2D_LL_EF_BGND_Configuration Background Configuration Functions |
AnnaBridge | 171:3a7713b1edbc | 1285 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 1286 | */ |
AnnaBridge | 171:3a7713b1edbc | 1287 | |
AnnaBridge | 171:3a7713b1edbc | 1288 | /** |
AnnaBridge | 171:3a7713b1edbc | 1289 | * @brief Set DMA2D background memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1290 | * @rmtoll BGMAR MA LL_DMA2D_BGND_SetMemAddr |
AnnaBridge | 171:3a7713b1edbc | 1291 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1292 | * @param MemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 1293 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1294 | */ |
AnnaBridge | 171:3a7713b1edbc | 1295 | __STATIC_INLINE void LL_DMA2D_BGND_SetMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t MemoryAddress) |
AnnaBridge | 171:3a7713b1edbc | 1296 | { |
AnnaBridge | 171:3a7713b1edbc | 1297 | LL_DMA2D_WriteReg(DMA2Dx, BGMAR, MemoryAddress); |
AnnaBridge | 171:3a7713b1edbc | 1298 | } |
AnnaBridge | 171:3a7713b1edbc | 1299 | |
AnnaBridge | 171:3a7713b1edbc | 1300 | /** |
AnnaBridge | 171:3a7713b1edbc | 1301 | * @brief Get DMA2D background memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1302 | * @rmtoll BGMAR MA LL_DMA2D_BGND_GetMemAddr |
AnnaBridge | 171:3a7713b1edbc | 1303 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1304 | * @retval Background memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 1305 | */ |
AnnaBridge | 171:3a7713b1edbc | 1306 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetMemAddr(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1307 | { |
AnnaBridge | 171:3a7713b1edbc | 1308 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGMAR)); |
AnnaBridge | 171:3a7713b1edbc | 1309 | } |
AnnaBridge | 171:3a7713b1edbc | 1310 | |
AnnaBridge | 171:3a7713b1edbc | 1311 | /** |
AnnaBridge | 171:3a7713b1edbc | 1312 | * @brief Enable DMA2D background CLUT loading. |
AnnaBridge | 171:3a7713b1edbc | 1313 | * @rmtoll BGPFCCR START LL_DMA2D_BGND_EnableCLUTLoad |
AnnaBridge | 171:3a7713b1edbc | 1314 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1315 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1316 | */ |
AnnaBridge | 171:3a7713b1edbc | 1317 | __STATIC_INLINE void LL_DMA2D_BGND_EnableCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1318 | { |
AnnaBridge | 171:3a7713b1edbc | 1319 | SET_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START); |
AnnaBridge | 171:3a7713b1edbc | 1320 | } |
AnnaBridge | 171:3a7713b1edbc | 1321 | |
AnnaBridge | 171:3a7713b1edbc | 1322 | /** |
AnnaBridge | 171:3a7713b1edbc | 1323 | * @brief Indicate if DMA2D background CLUT loading is enabled. |
AnnaBridge | 171:3a7713b1edbc | 1324 | * @rmtoll BGPFCCR START LL_DMA2D_BGND_IsEnabledCLUTLoad |
AnnaBridge | 171:3a7713b1edbc | 1325 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1326 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1327 | */ |
AnnaBridge | 171:3a7713b1edbc | 1328 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_IsEnabledCLUTLoad(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1329 | { |
AnnaBridge | 171:3a7713b1edbc | 1330 | return (READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_START) == (DMA2D_BGPFCCR_START)); |
AnnaBridge | 171:3a7713b1edbc | 1331 | } |
AnnaBridge | 171:3a7713b1edbc | 1332 | |
AnnaBridge | 171:3a7713b1edbc | 1333 | /** |
AnnaBridge | 171:3a7713b1edbc | 1334 | * @brief Set DMA2D background color mode. |
AnnaBridge | 171:3a7713b1edbc | 1335 | * @rmtoll BGPFCCR CM LL_DMA2D_BGND_SetColorMode |
AnnaBridge | 171:3a7713b1edbc | 1336 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1337 | * @param ColorMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1338 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 1339 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 1340 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
AnnaBridge | 171:3a7713b1edbc | 1341 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
AnnaBridge | 171:3a7713b1edbc | 1342 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
AnnaBridge | 171:3a7713b1edbc | 1343 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
AnnaBridge | 171:3a7713b1edbc | 1344 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
AnnaBridge | 171:3a7713b1edbc | 1345 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
AnnaBridge | 171:3a7713b1edbc | 1346 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
AnnaBridge | 171:3a7713b1edbc | 1347 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
AnnaBridge | 171:3a7713b1edbc | 1348 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
AnnaBridge | 171:3a7713b1edbc | 1349 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1350 | */ |
AnnaBridge | 171:3a7713b1edbc | 1351 | __STATIC_INLINE void LL_DMA2D_BGND_SetColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode) |
AnnaBridge | 171:3a7713b1edbc | 1352 | { |
AnnaBridge | 171:3a7713b1edbc | 1353 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM, ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 1354 | } |
AnnaBridge | 171:3a7713b1edbc | 1355 | |
AnnaBridge | 171:3a7713b1edbc | 1356 | /** |
AnnaBridge | 171:3a7713b1edbc | 1357 | * @brief Return DMA2D background color mode. |
AnnaBridge | 171:3a7713b1edbc | 1358 | * @rmtoll BGPFCCR CM LL_DMA2D_BGND_GetColorMode |
AnnaBridge | 171:3a7713b1edbc | 1359 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1360 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1361 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 1362 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 1363 | * @arg @ref LL_DMA2D_INPUT_MODE_RGB565 |
AnnaBridge | 171:3a7713b1edbc | 1364 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB1555 |
AnnaBridge | 171:3a7713b1edbc | 1365 | * @arg @ref LL_DMA2D_INPUT_MODE_ARGB4444 |
AnnaBridge | 171:3a7713b1edbc | 1366 | * @arg @ref LL_DMA2D_INPUT_MODE_L8 |
AnnaBridge | 171:3a7713b1edbc | 1367 | * @arg @ref LL_DMA2D_INPUT_MODE_AL44 |
AnnaBridge | 171:3a7713b1edbc | 1368 | * @arg @ref LL_DMA2D_INPUT_MODE_AL88 |
AnnaBridge | 171:3a7713b1edbc | 1369 | * @arg @ref LL_DMA2D_INPUT_MODE_L4 |
AnnaBridge | 171:3a7713b1edbc | 1370 | * @arg @ref LL_DMA2D_INPUT_MODE_A8 |
AnnaBridge | 171:3a7713b1edbc | 1371 | * @arg @ref LL_DMA2D_INPUT_MODE_A4 |
AnnaBridge | 171:3a7713b1edbc | 1372 | */ |
AnnaBridge | 171:3a7713b1edbc | 1373 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetColorMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1374 | { |
AnnaBridge | 171:3a7713b1edbc | 1375 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CM)); |
AnnaBridge | 171:3a7713b1edbc | 1376 | } |
AnnaBridge | 171:3a7713b1edbc | 1377 | |
AnnaBridge | 171:3a7713b1edbc | 1378 | /** |
AnnaBridge | 171:3a7713b1edbc | 1379 | * @brief Set DMA2D background alpha mode. |
AnnaBridge | 171:3a7713b1edbc | 1380 | * @rmtoll BGPFCCR AM LL_DMA2D_BGND_SetAlphaMode |
AnnaBridge | 171:3a7713b1edbc | 1381 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1382 | * @param AphaMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1383 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
AnnaBridge | 171:3a7713b1edbc | 1384 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
AnnaBridge | 171:3a7713b1edbc | 1385 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
AnnaBridge | 171:3a7713b1edbc | 1386 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1387 | */ |
AnnaBridge | 171:3a7713b1edbc | 1388 | __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaMode(DMA2D_TypeDef *DMA2Dx, uint32_t AphaMode) |
AnnaBridge | 171:3a7713b1edbc | 1389 | { |
AnnaBridge | 171:3a7713b1edbc | 1390 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM, AphaMode); |
AnnaBridge | 171:3a7713b1edbc | 1391 | } |
AnnaBridge | 171:3a7713b1edbc | 1392 | |
AnnaBridge | 171:3a7713b1edbc | 1393 | /** |
AnnaBridge | 171:3a7713b1edbc | 1394 | * @brief Return DMA2D background alpha mode. |
AnnaBridge | 171:3a7713b1edbc | 1395 | * @rmtoll BGPFCCR AM LL_DMA2D_BGND_GetAlphaMode |
AnnaBridge | 171:3a7713b1edbc | 1396 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1397 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1398 | * @arg @ref LL_DMA2D_ALPHA_MODE_NO_MODIF |
AnnaBridge | 171:3a7713b1edbc | 1399 | * @arg @ref LL_DMA2D_ALPHA_MODE_REPLACE |
AnnaBridge | 171:3a7713b1edbc | 1400 | * @arg @ref LL_DMA2D_ALPHA_MODE_COMBINE |
AnnaBridge | 171:3a7713b1edbc | 1401 | */ |
AnnaBridge | 171:3a7713b1edbc | 1402 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1403 | { |
AnnaBridge | 171:3a7713b1edbc | 1404 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AM)); |
AnnaBridge | 171:3a7713b1edbc | 1405 | } |
AnnaBridge | 171:3a7713b1edbc | 1406 | |
AnnaBridge | 171:3a7713b1edbc | 1407 | /** |
AnnaBridge | 171:3a7713b1edbc | 1408 | * @brief Set DMA2D background alpha value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1409 | * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_SetAlpha |
AnnaBridge | 171:3a7713b1edbc | 1410 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1411 | * @param Alpha Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1412 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1413 | */ |
AnnaBridge | 171:3a7713b1edbc | 1414 | __STATIC_INLINE void LL_DMA2D_BGND_SetAlpha(DMA2D_TypeDef *DMA2Dx, uint32_t Alpha) |
AnnaBridge | 171:3a7713b1edbc | 1415 | { |
AnnaBridge | 171:3a7713b1edbc | 1416 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA, (Alpha << DMA2D_BGPFCCR_ALPHA_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1417 | } |
AnnaBridge | 171:3a7713b1edbc | 1418 | |
AnnaBridge | 171:3a7713b1edbc | 1419 | /** |
AnnaBridge | 171:3a7713b1edbc | 1420 | * @brief Return DMA2D background alpha value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1421 | * @rmtoll BGPFCCR ALPHA LL_DMA2D_BGND_GetAlpha |
AnnaBridge | 171:3a7713b1edbc | 1422 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1423 | * @retval Alpha value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1424 | */ |
AnnaBridge | 171:3a7713b1edbc | 1425 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlpha(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1426 | { |
AnnaBridge | 171:3a7713b1edbc | 1427 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_ALPHA) >> DMA2D_BGPFCCR_ALPHA_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1428 | } |
AnnaBridge | 171:3a7713b1edbc | 1429 | |
AnnaBridge | 171:3a7713b1edbc | 1430 | #if defined(DMA2D_ALPHA_INV_RB_SWAP_SUPPORT) |
AnnaBridge | 171:3a7713b1edbc | 1431 | /** |
AnnaBridge | 171:3a7713b1edbc | 1432 | * @brief Set DMA2D background Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 1433 | * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_SetRBSwapMode |
AnnaBridge | 171:3a7713b1edbc | 1434 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1435 | * @param RBSwapMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1436 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1437 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
AnnaBridge | 171:3a7713b1edbc | 1438 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1439 | */ |
AnnaBridge | 171:3a7713b1edbc | 1440 | __STATIC_INLINE void LL_DMA2D_BGND_SetRBSwapMode(DMA2D_TypeDef *DMA2Dx, uint32_t RBSwapMode) |
AnnaBridge | 171:3a7713b1edbc | 1441 | { |
AnnaBridge | 171:3a7713b1edbc | 1442 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS, RBSwapMode); |
AnnaBridge | 171:3a7713b1edbc | 1443 | } |
AnnaBridge | 171:3a7713b1edbc | 1444 | |
AnnaBridge | 171:3a7713b1edbc | 1445 | /** |
AnnaBridge | 171:3a7713b1edbc | 1446 | * @brief Return DMA2D background Red Blue swap mode. |
AnnaBridge | 171:3a7713b1edbc | 1447 | * @rmtoll BGPFCCR RBS LL_DMA2D_BGND_GetRBSwapMode |
AnnaBridge | 171:3a7713b1edbc | 1448 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1449 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1450 | * @arg @ref LL_DMA2D_RB_MODE_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1451 | * @arg @ref LL_DMA2D_RB_MODE_SWAP |
AnnaBridge | 171:3a7713b1edbc | 1452 | */ |
AnnaBridge | 171:3a7713b1edbc | 1453 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRBSwapMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1454 | { |
AnnaBridge | 171:3a7713b1edbc | 1455 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_RBS)); |
AnnaBridge | 171:3a7713b1edbc | 1456 | } |
AnnaBridge | 171:3a7713b1edbc | 1457 | |
AnnaBridge | 171:3a7713b1edbc | 1458 | /** |
AnnaBridge | 171:3a7713b1edbc | 1459 | * @brief Set DMA2D background alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 1460 | * @rmtoll BGPFCCR AI LL_DMA2D_BGND_SetAlphaInvMode |
AnnaBridge | 171:3a7713b1edbc | 1461 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1462 | * @param AlphaInversionMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1463 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1464 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
AnnaBridge | 171:3a7713b1edbc | 1465 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1466 | */ |
AnnaBridge | 171:3a7713b1edbc | 1467 | __STATIC_INLINE void LL_DMA2D_BGND_SetAlphaInvMode(DMA2D_TypeDef *DMA2Dx, uint32_t AlphaInversionMode) |
AnnaBridge | 171:3a7713b1edbc | 1468 | { |
AnnaBridge | 171:3a7713b1edbc | 1469 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI, AlphaInversionMode); |
AnnaBridge | 171:3a7713b1edbc | 1470 | } |
AnnaBridge | 171:3a7713b1edbc | 1471 | |
AnnaBridge | 171:3a7713b1edbc | 1472 | /** |
AnnaBridge | 171:3a7713b1edbc | 1473 | * @brief Return DMA2D background alpha inversion mode. |
AnnaBridge | 171:3a7713b1edbc | 1474 | * @rmtoll BGPFCCR AI LL_DMA2D_BGND_GetAlphaInvMode |
AnnaBridge | 171:3a7713b1edbc | 1475 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1476 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1477 | * @arg @ref LL_DMA2D_ALPHA_REGULAR |
AnnaBridge | 171:3a7713b1edbc | 1478 | * @arg @ref LL_DMA2D_ALPHA_INVERTED |
AnnaBridge | 171:3a7713b1edbc | 1479 | */ |
AnnaBridge | 171:3a7713b1edbc | 1480 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetAlphaInvMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1481 | { |
AnnaBridge | 171:3a7713b1edbc | 1482 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_AI)); |
AnnaBridge | 171:3a7713b1edbc | 1483 | } |
AnnaBridge | 171:3a7713b1edbc | 1484 | |
AnnaBridge | 171:3a7713b1edbc | 1485 | #endif /* DMA2D_ALPHA_INV_RB_SWAP_SUPPORT */ |
AnnaBridge | 171:3a7713b1edbc | 1486 | |
AnnaBridge | 171:3a7713b1edbc | 1487 | /** |
AnnaBridge | 171:3a7713b1edbc | 1488 | * @brief Set DMA2D background line offset, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1489 | * @rmtoll BGOR LO LL_DMA2D_BGND_SetLineOffset |
AnnaBridge | 171:3a7713b1edbc | 1490 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1491 | * @param LineOffset Value between Min_Data=0 and Max_Data=0x3FF |
AnnaBridge | 171:3a7713b1edbc | 1492 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1493 | */ |
AnnaBridge | 171:3a7713b1edbc | 1494 | __STATIC_INLINE void LL_DMA2D_BGND_SetLineOffset(DMA2D_TypeDef *DMA2Dx, uint32_t LineOffset) |
AnnaBridge | 171:3a7713b1edbc | 1495 | { |
AnnaBridge | 171:3a7713b1edbc | 1496 | MODIFY_REG(DMA2Dx->BGOR, DMA2D_BGOR_LO, LineOffset); |
AnnaBridge | 171:3a7713b1edbc | 1497 | } |
AnnaBridge | 171:3a7713b1edbc | 1498 | |
AnnaBridge | 171:3a7713b1edbc | 1499 | /** |
AnnaBridge | 171:3a7713b1edbc | 1500 | * @brief Return DMA2D background line offset, expressed on 14 bits ([13:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1501 | * @rmtoll BGOR LO LL_DMA2D_BGND_GetLineOffset |
AnnaBridge | 171:3a7713b1edbc | 1502 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1503 | * @retval Background line offset value between Min_Data=0 and Max_Data=0x3FF |
AnnaBridge | 171:3a7713b1edbc | 1504 | */ |
AnnaBridge | 171:3a7713b1edbc | 1505 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetLineOffset(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1506 | { |
AnnaBridge | 171:3a7713b1edbc | 1507 | return (uint32_t)(READ_BIT(DMA2Dx->BGOR, DMA2D_BGOR_LO)); |
AnnaBridge | 171:3a7713b1edbc | 1508 | } |
AnnaBridge | 171:3a7713b1edbc | 1509 | |
AnnaBridge | 171:3a7713b1edbc | 1510 | /** |
AnnaBridge | 171:3a7713b1edbc | 1511 | * @brief Set DMA2D background color values, expressed on 24 bits ([23:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1512 | * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetColor |
AnnaBridge | 171:3a7713b1edbc | 1513 | * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetColor |
AnnaBridge | 171:3a7713b1edbc | 1514 | * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetColor |
AnnaBridge | 171:3a7713b1edbc | 1515 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1516 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1517 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1518 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1519 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1520 | */ |
AnnaBridge | 171:3a7713b1edbc | 1521 | __STATIC_INLINE void LL_DMA2D_BGND_SetColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red, uint32_t Green, uint32_t Blue) |
AnnaBridge | 171:3a7713b1edbc | 1522 | { |
AnnaBridge | 171:3a7713b1edbc | 1523 | MODIFY_REG(DMA2Dx->BGCOLR, (DMA2D_BGCOLR_RED | DMA2D_BGCOLR_GREEN | DMA2D_BGCOLR_BLUE), \ |
AnnaBridge | 171:3a7713b1edbc | 1524 | ((Red << DMA2D_BGCOLR_RED_Pos) | (Green << DMA2D_BGCOLR_GREEN_Pos) | Blue)); |
AnnaBridge | 171:3a7713b1edbc | 1525 | } |
AnnaBridge | 171:3a7713b1edbc | 1526 | |
AnnaBridge | 171:3a7713b1edbc | 1527 | /** |
AnnaBridge | 171:3a7713b1edbc | 1528 | * @brief Set DMA2D background red color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1529 | * @rmtoll BGCOLR RED LL_DMA2D_BGND_SetRedColor |
AnnaBridge | 171:3a7713b1edbc | 1530 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1531 | * @param Red Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1532 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1533 | */ |
AnnaBridge | 171:3a7713b1edbc | 1534 | __STATIC_INLINE void LL_DMA2D_BGND_SetRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t Red) |
AnnaBridge | 171:3a7713b1edbc | 1535 | { |
AnnaBridge | 171:3a7713b1edbc | 1536 | MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED, (Red << DMA2D_BGCOLR_RED_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1537 | } |
AnnaBridge | 171:3a7713b1edbc | 1538 | |
AnnaBridge | 171:3a7713b1edbc | 1539 | /** |
AnnaBridge | 171:3a7713b1edbc | 1540 | * @brief Return DMA2D background red color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1541 | * @rmtoll BGCOLR RED LL_DMA2D_BGND_GetRedColor |
AnnaBridge | 171:3a7713b1edbc | 1542 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1543 | * @retval Red color value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1544 | */ |
AnnaBridge | 171:3a7713b1edbc | 1545 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetRedColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1546 | { |
AnnaBridge | 171:3a7713b1edbc | 1547 | return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_RED) >> DMA2D_BGCOLR_RED_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1548 | } |
AnnaBridge | 171:3a7713b1edbc | 1549 | |
AnnaBridge | 171:3a7713b1edbc | 1550 | /** |
AnnaBridge | 171:3a7713b1edbc | 1551 | * @brief Set DMA2D background green color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1552 | * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_SetGreenColor |
AnnaBridge | 171:3a7713b1edbc | 1553 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1554 | * @param Green Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1555 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1556 | */ |
AnnaBridge | 171:3a7713b1edbc | 1557 | __STATIC_INLINE void LL_DMA2D_BGND_SetGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t Green) |
AnnaBridge | 171:3a7713b1edbc | 1558 | { |
AnnaBridge | 171:3a7713b1edbc | 1559 | MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN, (Green << DMA2D_BGCOLR_GREEN_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1560 | } |
AnnaBridge | 171:3a7713b1edbc | 1561 | |
AnnaBridge | 171:3a7713b1edbc | 1562 | /** |
AnnaBridge | 171:3a7713b1edbc | 1563 | * @brief Return DMA2D background green color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1564 | * @rmtoll BGCOLR GREEN LL_DMA2D_BGND_GetGreenColor |
AnnaBridge | 171:3a7713b1edbc | 1565 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1566 | * @retval Green color value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1567 | */ |
AnnaBridge | 171:3a7713b1edbc | 1568 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetGreenColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1569 | { |
AnnaBridge | 171:3a7713b1edbc | 1570 | return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_GREEN) >> DMA2D_BGCOLR_GREEN_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1571 | } |
AnnaBridge | 171:3a7713b1edbc | 1572 | |
AnnaBridge | 171:3a7713b1edbc | 1573 | /** |
AnnaBridge | 171:3a7713b1edbc | 1574 | * @brief Set DMA2D background blue color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1575 | * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_SetBlueColor |
AnnaBridge | 171:3a7713b1edbc | 1576 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1577 | * @param Blue Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1578 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1579 | */ |
AnnaBridge | 171:3a7713b1edbc | 1580 | __STATIC_INLINE void LL_DMA2D_BGND_SetBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t Blue) |
AnnaBridge | 171:3a7713b1edbc | 1581 | { |
AnnaBridge | 171:3a7713b1edbc | 1582 | MODIFY_REG(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE, Blue); |
AnnaBridge | 171:3a7713b1edbc | 1583 | } |
AnnaBridge | 171:3a7713b1edbc | 1584 | |
AnnaBridge | 171:3a7713b1edbc | 1585 | /** |
AnnaBridge | 171:3a7713b1edbc | 1586 | * @brief Return DMA2D background blue color value, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1587 | * @rmtoll BGCOLR BLUE LL_DMA2D_BGND_GetBlueColor |
AnnaBridge | 171:3a7713b1edbc | 1588 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1589 | * @retval Blue color value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1590 | */ |
AnnaBridge | 171:3a7713b1edbc | 1591 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetBlueColor(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1592 | { |
AnnaBridge | 171:3a7713b1edbc | 1593 | return (uint32_t)(READ_BIT(DMA2Dx->BGCOLR, DMA2D_BGCOLR_BLUE)); |
AnnaBridge | 171:3a7713b1edbc | 1594 | } |
AnnaBridge | 171:3a7713b1edbc | 1595 | |
AnnaBridge | 171:3a7713b1edbc | 1596 | /** |
AnnaBridge | 171:3a7713b1edbc | 1597 | * @brief Set DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1598 | * @rmtoll BGCMAR MA LL_DMA2D_BGND_SetCLUTMemAddr |
AnnaBridge | 171:3a7713b1edbc | 1599 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1600 | * @param CLUTMemoryAddress Value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 1601 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1602 | */ |
AnnaBridge | 171:3a7713b1edbc | 1603 | __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTMemoryAddress) |
AnnaBridge | 171:3a7713b1edbc | 1604 | { |
AnnaBridge | 171:3a7713b1edbc | 1605 | LL_DMA2D_WriteReg(DMA2Dx, BGCMAR, CLUTMemoryAddress); |
AnnaBridge | 171:3a7713b1edbc | 1606 | } |
AnnaBridge | 171:3a7713b1edbc | 1607 | |
AnnaBridge | 171:3a7713b1edbc | 1608 | /** |
AnnaBridge | 171:3a7713b1edbc | 1609 | * @brief Get DMA2D background CLUT memory address, expressed on 32 bits ([31:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1610 | * @rmtoll BGCMAR MA LL_DMA2D_BGND_GetCLUTMemAddr |
AnnaBridge | 171:3a7713b1edbc | 1611 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1612 | * @retval Background CLUT memory address value between Min_Data=0 and Max_Data=0xFFFFFFFF |
AnnaBridge | 171:3a7713b1edbc | 1613 | */ |
AnnaBridge | 171:3a7713b1edbc | 1614 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTMemAddr(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1615 | { |
AnnaBridge | 171:3a7713b1edbc | 1616 | return (uint32_t)(LL_DMA2D_ReadReg(DMA2Dx, BGCMAR)); |
AnnaBridge | 171:3a7713b1edbc | 1617 | } |
AnnaBridge | 171:3a7713b1edbc | 1618 | |
AnnaBridge | 171:3a7713b1edbc | 1619 | /** |
AnnaBridge | 171:3a7713b1edbc | 1620 | * @brief Set DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1621 | * @rmtoll BGPFCCR CS LL_DMA2D_BGND_SetCLUTSize |
AnnaBridge | 171:3a7713b1edbc | 1622 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1623 | * @param CLUTSize Value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1624 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1625 | */ |
AnnaBridge | 171:3a7713b1edbc | 1626 | __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTSize(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTSize) |
AnnaBridge | 171:3a7713b1edbc | 1627 | { |
AnnaBridge | 171:3a7713b1edbc | 1628 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS, (CLUTSize << DMA2D_BGPFCCR_CS_Pos)); |
AnnaBridge | 171:3a7713b1edbc | 1629 | } |
AnnaBridge | 171:3a7713b1edbc | 1630 | |
AnnaBridge | 171:3a7713b1edbc | 1631 | /** |
AnnaBridge | 171:3a7713b1edbc | 1632 | * @brief Get DMA2D background CLUT size, expressed on 8 bits ([7:0] bits). |
AnnaBridge | 171:3a7713b1edbc | 1633 | * @rmtoll BGPFCCR CS LL_DMA2D_BGND_GetCLUTSize |
AnnaBridge | 171:3a7713b1edbc | 1634 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1635 | * @retval Background CLUT size value between Min_Data=0 and Max_Data=0xFF |
AnnaBridge | 171:3a7713b1edbc | 1636 | */ |
AnnaBridge | 171:3a7713b1edbc | 1637 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTSize(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1638 | { |
AnnaBridge | 171:3a7713b1edbc | 1639 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CS) >> DMA2D_BGPFCCR_CS_Pos); |
AnnaBridge | 171:3a7713b1edbc | 1640 | } |
AnnaBridge | 171:3a7713b1edbc | 1641 | |
AnnaBridge | 171:3a7713b1edbc | 1642 | /** |
AnnaBridge | 171:3a7713b1edbc | 1643 | * @brief Set DMA2D background CLUT color mode. |
AnnaBridge | 171:3a7713b1edbc | 1644 | * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_SetCLUTColorMode |
AnnaBridge | 171:3a7713b1edbc | 1645 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1646 | * @param CLUTColorMode This parameter can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1647 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 1648 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 1649 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1650 | */ |
AnnaBridge | 171:3a7713b1edbc | 1651 | __STATIC_INLINE void LL_DMA2D_BGND_SetCLUTColorMode(DMA2D_TypeDef *DMA2Dx, uint32_t CLUTColorMode) |
AnnaBridge | 171:3a7713b1edbc | 1652 | { |
AnnaBridge | 171:3a7713b1edbc | 1653 | MODIFY_REG(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM, CLUTColorMode); |
AnnaBridge | 171:3a7713b1edbc | 1654 | } |
AnnaBridge | 171:3a7713b1edbc | 1655 | |
AnnaBridge | 171:3a7713b1edbc | 1656 | /** |
AnnaBridge | 171:3a7713b1edbc | 1657 | * @brief Return DMA2D background CLUT color mode. |
AnnaBridge | 171:3a7713b1edbc | 1658 | * @rmtoll BGPFCCR CCM LL_DMA2D_BGND_GetCLUTColorMode |
AnnaBridge | 171:3a7713b1edbc | 1659 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1660 | * @retval Returned value can be one of the following values: |
AnnaBridge | 171:3a7713b1edbc | 1661 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_ARGB8888 |
AnnaBridge | 171:3a7713b1edbc | 1662 | * @arg @ref LL_DMA2D_CLUT_COLOR_MODE_RGB888 |
AnnaBridge | 171:3a7713b1edbc | 1663 | */ |
AnnaBridge | 171:3a7713b1edbc | 1664 | __STATIC_INLINE uint32_t LL_DMA2D_BGND_GetCLUTColorMode(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1665 | { |
AnnaBridge | 171:3a7713b1edbc | 1666 | return (uint32_t)(READ_BIT(DMA2Dx->BGPFCCR, DMA2D_BGPFCCR_CCM)); |
AnnaBridge | 171:3a7713b1edbc | 1667 | } |
AnnaBridge | 171:3a7713b1edbc | 1668 | |
AnnaBridge | 171:3a7713b1edbc | 1669 | /** |
AnnaBridge | 171:3a7713b1edbc | 1670 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1671 | */ |
AnnaBridge | 171:3a7713b1edbc | 1672 | |
AnnaBridge | 171:3a7713b1edbc | 1673 | /** |
AnnaBridge | 171:3a7713b1edbc | 1674 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1675 | */ |
AnnaBridge | 171:3a7713b1edbc | 1676 | |
AnnaBridge | 171:3a7713b1edbc | 1677 | |
AnnaBridge | 171:3a7713b1edbc | 1678 | /** @defgroup DMA2D_LL_EF_FLAG_MANAGEMENT Flag Management |
AnnaBridge | 171:3a7713b1edbc | 1679 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 1680 | */ |
AnnaBridge | 171:3a7713b1edbc | 1681 | |
AnnaBridge | 171:3a7713b1edbc | 1682 | /** |
AnnaBridge | 171:3a7713b1edbc | 1683 | * @brief Check if the DMA2D Configuration Error Interrupt Flag is set or not |
AnnaBridge | 171:3a7713b1edbc | 1684 | * @rmtoll ISR CEIF LL_DMA2D_IsActiveFlag_CE |
AnnaBridge | 171:3a7713b1edbc | 1685 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1686 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1687 | */ |
AnnaBridge | 171:3a7713b1edbc | 1688 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1689 | { |
AnnaBridge | 171:3a7713b1edbc | 1690 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CEIF) == (DMA2D_ISR_CEIF)); |
AnnaBridge | 171:3a7713b1edbc | 1691 | } |
AnnaBridge | 171:3a7713b1edbc | 1692 | |
AnnaBridge | 171:3a7713b1edbc | 1693 | /** |
AnnaBridge | 171:3a7713b1edbc | 1694 | * @brief Check if the DMA2D CLUT Transfer Complete Interrupt Flag is set or not |
AnnaBridge | 171:3a7713b1edbc | 1695 | * @rmtoll ISR CTCIF LL_DMA2D_IsActiveFlag_CTC |
AnnaBridge | 171:3a7713b1edbc | 1696 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1697 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1698 | */ |
AnnaBridge | 171:3a7713b1edbc | 1699 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CTC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1700 | { |
AnnaBridge | 171:3a7713b1edbc | 1701 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CTCIF) == (DMA2D_ISR_CTCIF)); |
AnnaBridge | 171:3a7713b1edbc | 1702 | } |
AnnaBridge | 171:3a7713b1edbc | 1703 | |
AnnaBridge | 171:3a7713b1edbc | 1704 | /** |
AnnaBridge | 171:3a7713b1edbc | 1705 | * @brief Check if the DMA2D CLUT Access Error Interrupt Flag is set or not |
AnnaBridge | 171:3a7713b1edbc | 1706 | * @rmtoll ISR CAEIF LL_DMA2D_IsActiveFlag_CAE |
AnnaBridge | 171:3a7713b1edbc | 1707 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1708 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1709 | */ |
AnnaBridge | 171:3a7713b1edbc | 1710 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_CAE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1711 | { |
AnnaBridge | 171:3a7713b1edbc | 1712 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_CAEIF) == (DMA2D_ISR_CAEIF)); |
AnnaBridge | 171:3a7713b1edbc | 1713 | } |
AnnaBridge | 171:3a7713b1edbc | 1714 | |
AnnaBridge | 171:3a7713b1edbc | 1715 | /** |
AnnaBridge | 171:3a7713b1edbc | 1716 | * @brief Check if the DMA2D Transfer Watermark Interrupt Flag is set or not |
AnnaBridge | 171:3a7713b1edbc | 1717 | * @rmtoll ISR TWIF LL_DMA2D_IsActiveFlag_TW |
AnnaBridge | 171:3a7713b1edbc | 1718 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1719 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1720 | */ |
AnnaBridge | 171:3a7713b1edbc | 1721 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TW(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1722 | { |
AnnaBridge | 171:3a7713b1edbc | 1723 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TWIF) == (DMA2D_ISR_TWIF)); |
AnnaBridge | 171:3a7713b1edbc | 1724 | } |
AnnaBridge | 171:3a7713b1edbc | 1725 | |
AnnaBridge | 171:3a7713b1edbc | 1726 | /** |
AnnaBridge | 171:3a7713b1edbc | 1727 | * @brief Check if the DMA2D Transfer Complete Interrupt Flag is set or not |
AnnaBridge | 171:3a7713b1edbc | 1728 | * @rmtoll ISR TCIF LL_DMA2D_IsActiveFlag_TC |
AnnaBridge | 171:3a7713b1edbc | 1729 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1730 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1731 | */ |
AnnaBridge | 171:3a7713b1edbc | 1732 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1733 | { |
AnnaBridge | 171:3a7713b1edbc | 1734 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TCIF) == (DMA2D_ISR_TCIF)); |
AnnaBridge | 171:3a7713b1edbc | 1735 | } |
AnnaBridge | 171:3a7713b1edbc | 1736 | |
AnnaBridge | 171:3a7713b1edbc | 1737 | /** |
AnnaBridge | 171:3a7713b1edbc | 1738 | * @brief Check if the DMA2D Transfer Error Interrupt Flag is set or not |
AnnaBridge | 171:3a7713b1edbc | 1739 | * @rmtoll ISR TEIF LL_DMA2D_IsActiveFlag_TE |
AnnaBridge | 171:3a7713b1edbc | 1740 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1741 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1742 | */ |
AnnaBridge | 171:3a7713b1edbc | 1743 | __STATIC_INLINE uint32_t LL_DMA2D_IsActiveFlag_TE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1744 | { |
AnnaBridge | 171:3a7713b1edbc | 1745 | return (READ_BIT(DMA2Dx->ISR, DMA2D_ISR_TEIF) == (DMA2D_ISR_TEIF)); |
AnnaBridge | 171:3a7713b1edbc | 1746 | } |
AnnaBridge | 171:3a7713b1edbc | 1747 | |
AnnaBridge | 171:3a7713b1edbc | 1748 | /** |
AnnaBridge | 171:3a7713b1edbc | 1749 | * @brief Clear DMA2D Configuration Error Interrupt Flag |
AnnaBridge | 171:3a7713b1edbc | 1750 | * @rmtoll IFCR CCEIF LL_DMA2D_ClearFlag_CE |
AnnaBridge | 171:3a7713b1edbc | 1751 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1752 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1753 | */ |
AnnaBridge | 171:3a7713b1edbc | 1754 | __STATIC_INLINE void LL_DMA2D_ClearFlag_CE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1755 | { |
AnnaBridge | 171:3a7713b1edbc | 1756 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCEIF); |
AnnaBridge | 171:3a7713b1edbc | 1757 | } |
AnnaBridge | 171:3a7713b1edbc | 1758 | |
AnnaBridge | 171:3a7713b1edbc | 1759 | /** |
AnnaBridge | 171:3a7713b1edbc | 1760 | * @brief Clear DMA2D CLUT Transfer Complete Interrupt Flag |
AnnaBridge | 171:3a7713b1edbc | 1761 | * @rmtoll IFCR CCTCIF LL_DMA2D_ClearFlag_CTC |
AnnaBridge | 171:3a7713b1edbc | 1762 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1763 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1764 | */ |
AnnaBridge | 171:3a7713b1edbc | 1765 | __STATIC_INLINE void LL_DMA2D_ClearFlag_CTC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1766 | { |
AnnaBridge | 171:3a7713b1edbc | 1767 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CCTCIF); |
AnnaBridge | 171:3a7713b1edbc | 1768 | } |
AnnaBridge | 171:3a7713b1edbc | 1769 | |
AnnaBridge | 171:3a7713b1edbc | 1770 | /** |
AnnaBridge | 171:3a7713b1edbc | 1771 | * @brief Clear DMA2D CLUT Access Error Interrupt Flag |
AnnaBridge | 171:3a7713b1edbc | 1772 | * @rmtoll IFCR CAECIF LL_DMA2D_ClearFlag_CAE |
AnnaBridge | 171:3a7713b1edbc | 1773 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1774 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1775 | */ |
AnnaBridge | 171:3a7713b1edbc | 1776 | __STATIC_INLINE void LL_DMA2D_ClearFlag_CAE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1777 | { |
AnnaBridge | 171:3a7713b1edbc | 1778 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CAECIF); |
AnnaBridge | 171:3a7713b1edbc | 1779 | } |
AnnaBridge | 171:3a7713b1edbc | 1780 | |
AnnaBridge | 171:3a7713b1edbc | 1781 | /** |
AnnaBridge | 171:3a7713b1edbc | 1782 | * @brief Clear DMA2D Transfer Watermark Interrupt Flag |
AnnaBridge | 171:3a7713b1edbc | 1783 | * @rmtoll IFCR CTWIF LL_DMA2D_ClearFlag_TW |
AnnaBridge | 171:3a7713b1edbc | 1784 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1785 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1786 | */ |
AnnaBridge | 171:3a7713b1edbc | 1787 | __STATIC_INLINE void LL_DMA2D_ClearFlag_TW(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1788 | { |
AnnaBridge | 171:3a7713b1edbc | 1789 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTWIF); |
AnnaBridge | 171:3a7713b1edbc | 1790 | } |
AnnaBridge | 171:3a7713b1edbc | 1791 | |
AnnaBridge | 171:3a7713b1edbc | 1792 | /** |
AnnaBridge | 171:3a7713b1edbc | 1793 | * @brief Clear DMA2D Transfer Complete Interrupt Flag |
AnnaBridge | 171:3a7713b1edbc | 1794 | * @rmtoll IFCR CTCIF LL_DMA2D_ClearFlag_TC |
AnnaBridge | 171:3a7713b1edbc | 1795 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1796 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1797 | */ |
AnnaBridge | 171:3a7713b1edbc | 1798 | __STATIC_INLINE void LL_DMA2D_ClearFlag_TC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1799 | { |
AnnaBridge | 171:3a7713b1edbc | 1800 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTCIF); |
AnnaBridge | 171:3a7713b1edbc | 1801 | } |
AnnaBridge | 171:3a7713b1edbc | 1802 | |
AnnaBridge | 171:3a7713b1edbc | 1803 | /** |
AnnaBridge | 171:3a7713b1edbc | 1804 | * @brief Clear DMA2D Transfer Error Interrupt Flag |
AnnaBridge | 171:3a7713b1edbc | 1805 | * @rmtoll IFCR CTEIF LL_DMA2D_ClearFlag_TE |
AnnaBridge | 171:3a7713b1edbc | 1806 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1807 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1808 | */ |
AnnaBridge | 171:3a7713b1edbc | 1809 | __STATIC_INLINE void LL_DMA2D_ClearFlag_TE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1810 | { |
AnnaBridge | 171:3a7713b1edbc | 1811 | WRITE_REG(DMA2Dx->IFCR, DMA2D_IFCR_CTEIF); |
AnnaBridge | 171:3a7713b1edbc | 1812 | } |
AnnaBridge | 171:3a7713b1edbc | 1813 | |
AnnaBridge | 171:3a7713b1edbc | 1814 | /** |
AnnaBridge | 171:3a7713b1edbc | 1815 | * @} |
AnnaBridge | 171:3a7713b1edbc | 1816 | */ |
AnnaBridge | 171:3a7713b1edbc | 1817 | |
AnnaBridge | 171:3a7713b1edbc | 1818 | /** @defgroup DMA2D_LL_EF_IT_MANAGEMENT Interruption Management |
AnnaBridge | 171:3a7713b1edbc | 1819 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 1820 | */ |
AnnaBridge | 171:3a7713b1edbc | 1821 | |
AnnaBridge | 171:3a7713b1edbc | 1822 | /** |
AnnaBridge | 171:3a7713b1edbc | 1823 | * @brief Enable Configuration Error Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1824 | * @rmtoll CR CEIE LL_DMA2D_EnableIT_CE |
AnnaBridge | 171:3a7713b1edbc | 1825 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1826 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1827 | */ |
AnnaBridge | 171:3a7713b1edbc | 1828 | __STATIC_INLINE void LL_DMA2D_EnableIT_CE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1829 | { |
AnnaBridge | 171:3a7713b1edbc | 1830 | SET_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); |
AnnaBridge | 171:3a7713b1edbc | 1831 | } |
AnnaBridge | 171:3a7713b1edbc | 1832 | |
AnnaBridge | 171:3a7713b1edbc | 1833 | /** |
AnnaBridge | 171:3a7713b1edbc | 1834 | * @brief Enable CLUT Transfer Complete Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1835 | * @rmtoll CR CTCIE LL_DMA2D_EnableIT_CTC |
AnnaBridge | 171:3a7713b1edbc | 1836 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1837 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1838 | */ |
AnnaBridge | 171:3a7713b1edbc | 1839 | __STATIC_INLINE void LL_DMA2D_EnableIT_CTC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1840 | { |
AnnaBridge | 171:3a7713b1edbc | 1841 | SET_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); |
AnnaBridge | 171:3a7713b1edbc | 1842 | } |
AnnaBridge | 171:3a7713b1edbc | 1843 | |
AnnaBridge | 171:3a7713b1edbc | 1844 | /** |
AnnaBridge | 171:3a7713b1edbc | 1845 | * @brief Enable CLUT Access Error Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1846 | * @rmtoll CR CAEIE LL_DMA2D_EnableIT_CAE |
AnnaBridge | 171:3a7713b1edbc | 1847 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1848 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1849 | */ |
AnnaBridge | 171:3a7713b1edbc | 1850 | __STATIC_INLINE void LL_DMA2D_EnableIT_CAE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1851 | { |
AnnaBridge | 171:3a7713b1edbc | 1852 | SET_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); |
AnnaBridge | 171:3a7713b1edbc | 1853 | } |
AnnaBridge | 171:3a7713b1edbc | 1854 | |
AnnaBridge | 171:3a7713b1edbc | 1855 | /** |
AnnaBridge | 171:3a7713b1edbc | 1856 | * @brief Enable Transfer Watermark Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1857 | * @rmtoll CR TWIE LL_DMA2D_EnableIT_TW |
AnnaBridge | 171:3a7713b1edbc | 1858 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1859 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1860 | */ |
AnnaBridge | 171:3a7713b1edbc | 1861 | __STATIC_INLINE void LL_DMA2D_EnableIT_TW(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1862 | { |
AnnaBridge | 171:3a7713b1edbc | 1863 | SET_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); |
AnnaBridge | 171:3a7713b1edbc | 1864 | } |
AnnaBridge | 171:3a7713b1edbc | 1865 | |
AnnaBridge | 171:3a7713b1edbc | 1866 | /** |
AnnaBridge | 171:3a7713b1edbc | 1867 | * @brief Enable Transfer Complete Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1868 | * @rmtoll CR TCIE LL_DMA2D_EnableIT_TC |
AnnaBridge | 171:3a7713b1edbc | 1869 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1870 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1871 | */ |
AnnaBridge | 171:3a7713b1edbc | 1872 | __STATIC_INLINE void LL_DMA2D_EnableIT_TC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1873 | { |
AnnaBridge | 171:3a7713b1edbc | 1874 | SET_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); |
AnnaBridge | 171:3a7713b1edbc | 1875 | } |
AnnaBridge | 171:3a7713b1edbc | 1876 | |
AnnaBridge | 171:3a7713b1edbc | 1877 | /** |
AnnaBridge | 171:3a7713b1edbc | 1878 | * @brief Enable Transfer Error Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1879 | * @rmtoll CR TEIE LL_DMA2D_EnableIT_TE |
AnnaBridge | 171:3a7713b1edbc | 1880 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1881 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1882 | */ |
AnnaBridge | 171:3a7713b1edbc | 1883 | __STATIC_INLINE void LL_DMA2D_EnableIT_TE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1884 | { |
AnnaBridge | 171:3a7713b1edbc | 1885 | SET_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); |
AnnaBridge | 171:3a7713b1edbc | 1886 | } |
AnnaBridge | 171:3a7713b1edbc | 1887 | |
AnnaBridge | 171:3a7713b1edbc | 1888 | /** |
AnnaBridge | 171:3a7713b1edbc | 1889 | * @brief Disable Configuration Error Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1890 | * @rmtoll CR CEIE LL_DMA2D_DisableIT_CE |
AnnaBridge | 171:3a7713b1edbc | 1891 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1892 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1893 | */ |
AnnaBridge | 171:3a7713b1edbc | 1894 | __STATIC_INLINE void LL_DMA2D_DisableIT_CE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1895 | { |
AnnaBridge | 171:3a7713b1edbc | 1896 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CEIE); |
AnnaBridge | 171:3a7713b1edbc | 1897 | } |
AnnaBridge | 171:3a7713b1edbc | 1898 | |
AnnaBridge | 171:3a7713b1edbc | 1899 | /** |
AnnaBridge | 171:3a7713b1edbc | 1900 | * @brief Disable CLUT Transfer Complete Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1901 | * @rmtoll CR CTCIE LL_DMA2D_DisableIT_CTC |
AnnaBridge | 171:3a7713b1edbc | 1902 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1903 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1904 | */ |
AnnaBridge | 171:3a7713b1edbc | 1905 | __STATIC_INLINE void LL_DMA2D_DisableIT_CTC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1906 | { |
AnnaBridge | 171:3a7713b1edbc | 1907 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE); |
AnnaBridge | 171:3a7713b1edbc | 1908 | } |
AnnaBridge | 171:3a7713b1edbc | 1909 | |
AnnaBridge | 171:3a7713b1edbc | 1910 | /** |
AnnaBridge | 171:3a7713b1edbc | 1911 | * @brief Disable CLUT Access Error Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1912 | * @rmtoll CR CAEIE LL_DMA2D_DisableIT_CAE |
AnnaBridge | 171:3a7713b1edbc | 1913 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1914 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1915 | */ |
AnnaBridge | 171:3a7713b1edbc | 1916 | __STATIC_INLINE void LL_DMA2D_DisableIT_CAE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1917 | { |
AnnaBridge | 171:3a7713b1edbc | 1918 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE); |
AnnaBridge | 171:3a7713b1edbc | 1919 | } |
AnnaBridge | 171:3a7713b1edbc | 1920 | |
AnnaBridge | 171:3a7713b1edbc | 1921 | /** |
AnnaBridge | 171:3a7713b1edbc | 1922 | * @brief Disable Transfer Watermark Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1923 | * @rmtoll CR TWIE LL_DMA2D_DisableIT_TW |
AnnaBridge | 171:3a7713b1edbc | 1924 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1925 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1926 | */ |
AnnaBridge | 171:3a7713b1edbc | 1927 | __STATIC_INLINE void LL_DMA2D_DisableIT_TW(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1928 | { |
AnnaBridge | 171:3a7713b1edbc | 1929 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TWIE); |
AnnaBridge | 171:3a7713b1edbc | 1930 | } |
AnnaBridge | 171:3a7713b1edbc | 1931 | |
AnnaBridge | 171:3a7713b1edbc | 1932 | /** |
AnnaBridge | 171:3a7713b1edbc | 1933 | * @brief Disable Transfer Complete Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1934 | * @rmtoll CR TCIE LL_DMA2D_DisableIT_TC |
AnnaBridge | 171:3a7713b1edbc | 1935 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1936 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1937 | */ |
AnnaBridge | 171:3a7713b1edbc | 1938 | __STATIC_INLINE void LL_DMA2D_DisableIT_TC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1939 | { |
AnnaBridge | 171:3a7713b1edbc | 1940 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TCIE); |
AnnaBridge | 171:3a7713b1edbc | 1941 | } |
AnnaBridge | 171:3a7713b1edbc | 1942 | |
AnnaBridge | 171:3a7713b1edbc | 1943 | /** |
AnnaBridge | 171:3a7713b1edbc | 1944 | * @brief Disable Transfer Error Interrupt |
AnnaBridge | 171:3a7713b1edbc | 1945 | * @rmtoll CR TEIE LL_DMA2D_DisableIT_TE |
AnnaBridge | 171:3a7713b1edbc | 1946 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1947 | * @retval None |
AnnaBridge | 171:3a7713b1edbc | 1948 | */ |
AnnaBridge | 171:3a7713b1edbc | 1949 | __STATIC_INLINE void LL_DMA2D_DisableIT_TE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1950 | { |
AnnaBridge | 171:3a7713b1edbc | 1951 | CLEAR_BIT(DMA2Dx->CR, DMA2D_CR_TEIE); |
AnnaBridge | 171:3a7713b1edbc | 1952 | } |
AnnaBridge | 171:3a7713b1edbc | 1953 | |
AnnaBridge | 171:3a7713b1edbc | 1954 | /** |
AnnaBridge | 171:3a7713b1edbc | 1955 | * @brief Check if the DMA2D Configuration Error interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1956 | * @rmtoll CR CEIE LL_DMA2D_IsEnabledIT_CE |
AnnaBridge | 171:3a7713b1edbc | 1957 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1958 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1959 | */ |
AnnaBridge | 171:3a7713b1edbc | 1960 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1961 | { |
AnnaBridge | 171:3a7713b1edbc | 1962 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CEIE) == (DMA2D_CR_CEIE)); |
AnnaBridge | 171:3a7713b1edbc | 1963 | } |
AnnaBridge | 171:3a7713b1edbc | 1964 | |
AnnaBridge | 171:3a7713b1edbc | 1965 | /** |
AnnaBridge | 171:3a7713b1edbc | 1966 | * @brief Check if the DMA2D CLUT Transfer Complete interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1967 | * @rmtoll CR CTCIE LL_DMA2D_IsEnabledIT_CTC |
AnnaBridge | 171:3a7713b1edbc | 1968 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1969 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1970 | */ |
AnnaBridge | 171:3a7713b1edbc | 1971 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CTC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1972 | { |
AnnaBridge | 171:3a7713b1edbc | 1973 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CTCIE) == (DMA2D_CR_CTCIE)); |
AnnaBridge | 171:3a7713b1edbc | 1974 | } |
AnnaBridge | 171:3a7713b1edbc | 1975 | |
AnnaBridge | 171:3a7713b1edbc | 1976 | /** |
AnnaBridge | 171:3a7713b1edbc | 1977 | * @brief Check if the DMA2D CLUT Access Error interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1978 | * @rmtoll CR CAEIE LL_DMA2D_IsEnabledIT_CAE |
AnnaBridge | 171:3a7713b1edbc | 1979 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1980 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1981 | */ |
AnnaBridge | 171:3a7713b1edbc | 1982 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_CAE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1983 | { |
AnnaBridge | 171:3a7713b1edbc | 1984 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_CAEIE) == (DMA2D_CR_CAEIE)); |
AnnaBridge | 171:3a7713b1edbc | 1985 | } |
AnnaBridge | 171:3a7713b1edbc | 1986 | |
AnnaBridge | 171:3a7713b1edbc | 1987 | /** |
AnnaBridge | 171:3a7713b1edbc | 1988 | * @brief Check if the DMA2D Transfer Watermark interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 1989 | * @rmtoll CR TWIE LL_DMA2D_IsEnabledIT_TW |
AnnaBridge | 171:3a7713b1edbc | 1990 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 1991 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 1992 | */ |
AnnaBridge | 171:3a7713b1edbc | 1993 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TW(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 1994 | { |
AnnaBridge | 171:3a7713b1edbc | 1995 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TWIE) == (DMA2D_CR_TWIE)); |
AnnaBridge | 171:3a7713b1edbc | 1996 | } |
AnnaBridge | 171:3a7713b1edbc | 1997 | |
AnnaBridge | 171:3a7713b1edbc | 1998 | /** |
AnnaBridge | 171:3a7713b1edbc | 1999 | * @brief Check if the DMA2D Transfer Complete interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 2000 | * @rmtoll CR TCIE LL_DMA2D_IsEnabledIT_TC |
AnnaBridge | 171:3a7713b1edbc | 2001 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 2002 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 2003 | */ |
AnnaBridge | 171:3a7713b1edbc | 2004 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TC(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 2005 | { |
AnnaBridge | 171:3a7713b1edbc | 2006 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TCIE) == (DMA2D_CR_TCIE)); |
AnnaBridge | 171:3a7713b1edbc | 2007 | } |
AnnaBridge | 171:3a7713b1edbc | 2008 | |
AnnaBridge | 171:3a7713b1edbc | 2009 | /** |
AnnaBridge | 171:3a7713b1edbc | 2010 | * @brief Check if the DMA2D Transfer Error interrupt source is enabled or disabled. |
AnnaBridge | 171:3a7713b1edbc | 2011 | * @rmtoll CR TEIE LL_DMA2D_IsEnabledIT_TE |
AnnaBridge | 171:3a7713b1edbc | 2012 | * @param DMA2Dx DMA2D Instance |
AnnaBridge | 171:3a7713b1edbc | 2013 | * @retval State of bit (1 or 0). |
AnnaBridge | 171:3a7713b1edbc | 2014 | */ |
AnnaBridge | 171:3a7713b1edbc | 2015 | __STATIC_INLINE uint32_t LL_DMA2D_IsEnabledIT_TE(DMA2D_TypeDef *DMA2Dx) |
AnnaBridge | 171:3a7713b1edbc | 2016 | { |
AnnaBridge | 171:3a7713b1edbc | 2017 | return (READ_BIT(DMA2Dx->CR, DMA2D_CR_TEIE) == (DMA2D_CR_TEIE)); |
AnnaBridge | 171:3a7713b1edbc | 2018 | } |
AnnaBridge | 171:3a7713b1edbc | 2019 | |
AnnaBridge | 171:3a7713b1edbc | 2020 | |
AnnaBridge | 171:3a7713b1edbc | 2021 | |
AnnaBridge | 171:3a7713b1edbc | 2022 | /** |
AnnaBridge | 171:3a7713b1edbc | 2023 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2024 | */ |
AnnaBridge | 171:3a7713b1edbc | 2025 | |
AnnaBridge | 171:3a7713b1edbc | 2026 | #if defined(USE_FULL_LL_DRIVER) |
AnnaBridge | 171:3a7713b1edbc | 2027 | /** @defgroup DMA2D_LL_EF_Init_Functions Initialization and De-initialization Functions |
AnnaBridge | 171:3a7713b1edbc | 2028 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 2029 | */ |
AnnaBridge | 171:3a7713b1edbc | 2030 | |
AnnaBridge | 171:3a7713b1edbc | 2031 | ErrorStatus LL_DMA2D_DeInit(DMA2D_TypeDef *DMA2Dx); |
AnnaBridge | 171:3a7713b1edbc | 2032 | ErrorStatus LL_DMA2D_Init(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_InitTypeDef *DMA2D_InitStruct); |
AnnaBridge | 171:3a7713b1edbc | 2033 | void LL_DMA2D_StructInit(LL_DMA2D_InitTypeDef *DMA2D_InitStruct); |
AnnaBridge | 171:3a7713b1edbc | 2034 | void LL_DMA2D_ConfigLayer(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg, uint32_t LayerIdx); |
AnnaBridge | 171:3a7713b1edbc | 2035 | void LL_DMA2D_LayerCfgStructInit(LL_DMA2D_LayerCfgTypeDef *DMA2D_LayerCfg); |
AnnaBridge | 171:3a7713b1edbc | 2036 | void LL_DMA2D_ConfigOutputColor(DMA2D_TypeDef *DMA2Dx, LL_DMA2D_ColorTypeDef *DMA2D_ColorStruct); |
AnnaBridge | 171:3a7713b1edbc | 2037 | uint32_t LL_DMA2D_GetOutputBlueColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 2038 | uint32_t LL_DMA2D_GetOutputGreenColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 2039 | uint32_t LL_DMA2D_GetOutputRedColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 2040 | uint32_t LL_DMA2D_GetOutputAlphaColor(DMA2D_TypeDef *DMA2Dx, uint32_t ColorMode); |
AnnaBridge | 171:3a7713b1edbc | 2041 | void LL_DMA2D_ConfigSize(DMA2D_TypeDef *DMA2Dx, uint32_t NbrOfLines, uint32_t NbrOfPixelsPerLines); |
AnnaBridge | 171:3a7713b1edbc | 2042 | |
AnnaBridge | 171:3a7713b1edbc | 2043 | /** |
AnnaBridge | 171:3a7713b1edbc | 2044 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2045 | */ |
AnnaBridge | 171:3a7713b1edbc | 2046 | #endif /* USE_FULL_LL_DRIVER */ |
AnnaBridge | 171:3a7713b1edbc | 2047 | |
AnnaBridge | 171:3a7713b1edbc | 2048 | /** |
AnnaBridge | 171:3a7713b1edbc | 2049 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2050 | */ |
AnnaBridge | 171:3a7713b1edbc | 2051 | |
AnnaBridge | 171:3a7713b1edbc | 2052 | /** |
AnnaBridge | 171:3a7713b1edbc | 2053 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2054 | */ |
AnnaBridge | 171:3a7713b1edbc | 2055 | |
AnnaBridge | 171:3a7713b1edbc | 2056 | #endif /* defined (DMA2D) */ |
AnnaBridge | 171:3a7713b1edbc | 2057 | |
AnnaBridge | 171:3a7713b1edbc | 2058 | /** |
AnnaBridge | 171:3a7713b1edbc | 2059 | * @} |
AnnaBridge | 171:3a7713b1edbc | 2060 | */ |
AnnaBridge | 171:3a7713b1edbc | 2061 | |
AnnaBridge | 171:3a7713b1edbc | 2062 | #ifdef __cplusplus |
AnnaBridge | 171:3a7713b1edbc | 2063 | } |
AnnaBridge | 171:3a7713b1edbc | 2064 | #endif |
AnnaBridge | 171:3a7713b1edbc | 2065 | |
AnnaBridge | 171:3a7713b1edbc | 2066 | #endif /* __STM32F7xx_LL_DMA2D_H */ |
AnnaBridge | 171:3a7713b1edbc | 2067 | |
AnnaBridge | 171:3a7713b1edbc | 2068 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |