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TARGET_NUCLEO_F207ZG/TOOLCHAIN_GCC_ARM/stm32f2xx_ll_system.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 145:64910690c574 | 1 | /** |
| AnnaBridge | 145:64910690c574 | 2 | ****************************************************************************** |
| AnnaBridge | 145:64910690c574 | 3 | * @file stm32f2xx_ll_system.h |
| AnnaBridge | 145:64910690c574 | 4 | * @author MCD Application Team |
| AnnaBridge | 145:64910690c574 | 5 | * @version V1.2.1 |
| AnnaBridge | 145:64910690c574 | 6 | * @date 14-April-2017 |
| AnnaBridge | 145:64910690c574 | 7 | * @brief Header file of SYSTEM LL module. |
| AnnaBridge | 145:64910690c574 | 8 | @verbatim |
| AnnaBridge | 145:64910690c574 | 9 | ============================================================================== |
| AnnaBridge | 145:64910690c574 | 10 | ##### How to use this driver ##### |
| AnnaBridge | 145:64910690c574 | 11 | ============================================================================== |
| AnnaBridge | 145:64910690c574 | 12 | [..] |
| AnnaBridge | 145:64910690c574 | 13 | The LL SYSTEM driver contains a set of generic APIs that can be |
| AnnaBridge | 145:64910690c574 | 14 | used by user: |
| AnnaBridge | 145:64910690c574 | 15 | (+) Some of the FLASH features need to be handled in the SYSTEM file. |
| AnnaBridge | 145:64910690c574 | 16 | (+) Access to DBGCMU registers |
| AnnaBridge | 145:64910690c574 | 17 | (+) Access to SYSCFG registers |
| AnnaBridge | 145:64910690c574 | 18 | |
| AnnaBridge | 145:64910690c574 | 19 | @endverbatim |
| AnnaBridge | 145:64910690c574 | 20 | ****************************************************************************** |
| AnnaBridge | 145:64910690c574 | 21 | * @attention |
| AnnaBridge | 145:64910690c574 | 22 | * |
| AnnaBridge | 145:64910690c574 | 23 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 145:64910690c574 | 24 | * |
| AnnaBridge | 145:64910690c574 | 25 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 145:64910690c574 | 26 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 145:64910690c574 | 27 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 145:64910690c574 | 28 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 145:64910690c574 | 29 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 145:64910690c574 | 30 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 145:64910690c574 | 31 | * and/or other materials provided with the distribution. |
| AnnaBridge | 145:64910690c574 | 32 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 145:64910690c574 | 33 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 145:64910690c574 | 34 | * without specific prior written permission. |
| AnnaBridge | 145:64910690c574 | 35 | * |
| AnnaBridge | 145:64910690c574 | 36 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 145:64910690c574 | 37 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 145:64910690c574 | 38 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 145:64910690c574 | 39 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 145:64910690c574 | 40 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 145:64910690c574 | 41 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 145:64910690c574 | 42 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 145:64910690c574 | 43 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 145:64910690c574 | 44 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 145:64910690c574 | 45 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 145:64910690c574 | 46 | * |
| AnnaBridge | 145:64910690c574 | 47 | ****************************************************************************** |
| AnnaBridge | 145:64910690c574 | 48 | */ |
| AnnaBridge | 145:64910690c574 | 49 | |
| AnnaBridge | 145:64910690c574 | 50 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 51 | #ifndef __STM32F2xx_LL_SYSTEM_H |
| AnnaBridge | 145:64910690c574 | 52 | #define __STM32F2xx_LL_SYSTEM_H |
| AnnaBridge | 145:64910690c574 | 53 | |
| AnnaBridge | 145:64910690c574 | 54 | #ifdef __cplusplus |
| AnnaBridge | 145:64910690c574 | 55 | extern "C" { |
| AnnaBridge | 145:64910690c574 | 56 | #endif |
| AnnaBridge | 145:64910690c574 | 57 | |
| AnnaBridge | 145:64910690c574 | 58 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 59 | #include "stm32f2xx.h" |
| AnnaBridge | 145:64910690c574 | 60 | |
| AnnaBridge | 145:64910690c574 | 61 | /** @addtogroup STM32F2xx_LL_Driver |
| AnnaBridge | 145:64910690c574 | 62 | * @{ |
| AnnaBridge | 145:64910690c574 | 63 | */ |
| AnnaBridge | 145:64910690c574 | 64 | |
| AnnaBridge | 145:64910690c574 | 65 | #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) |
| AnnaBridge | 145:64910690c574 | 66 | |
| AnnaBridge | 145:64910690c574 | 67 | /** @defgroup SYSTEM_LL SYSTEM |
| AnnaBridge | 145:64910690c574 | 68 | * @{ |
| AnnaBridge | 145:64910690c574 | 69 | */ |
| AnnaBridge | 145:64910690c574 | 70 | |
| AnnaBridge | 145:64910690c574 | 71 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 72 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 73 | |
| AnnaBridge | 145:64910690c574 | 74 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 75 | /** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants |
| AnnaBridge | 145:64910690c574 | 76 | * @{ |
| AnnaBridge | 145:64910690c574 | 77 | */ |
| AnnaBridge | 145:64910690c574 | 78 | |
| AnnaBridge | 145:64910690c574 | 79 | /** |
| AnnaBridge | 145:64910690c574 | 80 | * @} |
| AnnaBridge | 145:64910690c574 | 81 | */ |
| AnnaBridge | 145:64910690c574 | 82 | |
| AnnaBridge | 145:64910690c574 | 83 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 84 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 85 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 86 | /** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants |
| AnnaBridge | 145:64910690c574 | 87 | * @{ |
| AnnaBridge | 145:64910690c574 | 88 | */ |
| AnnaBridge | 145:64910690c574 | 89 | |
| AnnaBridge | 145:64910690c574 | 90 | /** @defgroup SYSTEM_LL_EC_REMAP SYSCFG REMAP |
| AnnaBridge | 145:64910690c574 | 91 | * @{ |
| AnnaBridge | 145:64910690c574 | 92 | */ |
| AnnaBridge | 145:64910690c574 | 93 | #define LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000 /*!< Main Flash memory mapped at 0x00000000 */ |
| AnnaBridge | 145:64910690c574 | 94 | #define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_MEMRMP_MEM_MODE_0 /*!< System Flash memory mapped at 0x00000000 */ |
| AnnaBridge | 145:64910690c574 | 95 | #define LL_SYSCFG_REMAP_FSMC SYSCFG_MEMRMP_MEM_MODE_1 /*!< FSMC(NOR/PSRAM 1 and 2) mapped at 0x00000000 */ |
| AnnaBridge | 145:64910690c574 | 96 | #define LL_SYSCFG_REMAP_SRAM (SYSCFG_MEMRMP_MEM_MODE_1 | SYSCFG_MEMRMP_MEM_MODE_0) /*!< SRAM1 mapped at 0x00000000 */ |
| AnnaBridge | 145:64910690c574 | 97 | /** |
| AnnaBridge | 145:64910690c574 | 98 | * @} |
| AnnaBridge | 145:64910690c574 | 99 | */ |
| AnnaBridge | 145:64910690c574 | 100 | |
| AnnaBridge | 145:64910690c574 | 101 | #if defined(SYSCFG_PMC_MII_RMII_SEL) |
| AnnaBridge | 145:64910690c574 | 102 | /** @defgroup SYSTEM_LL_EC_PMC SYSCFG PMC |
| AnnaBridge | 145:64910690c574 | 103 | * @{ |
| AnnaBridge | 145:64910690c574 | 104 | */ |
| AnnaBridge | 145:64910690c574 | 105 | #define LL_SYSCFG_PMC_ETHMII (uint32_t)0x00000000 /*!< ETH Media MII interface */ |
| AnnaBridge | 145:64910690c574 | 106 | #define LL_SYSCFG_PMC_ETHRMII (uint32_t)SYSCFG_PMC_MII_RMII_SEL /*!< ETH Media RMII interface */ |
| AnnaBridge | 145:64910690c574 | 107 | |
| AnnaBridge | 145:64910690c574 | 108 | /** |
| AnnaBridge | 145:64910690c574 | 109 | * @} |
| AnnaBridge | 145:64910690c574 | 110 | */ |
| AnnaBridge | 145:64910690c574 | 111 | #endif /* SYSCFG_PMC_MII_RMII_SEL */ |
| AnnaBridge | 145:64910690c574 | 112 | |
| AnnaBridge | 145:64910690c574 | 113 | |
| AnnaBridge | 145:64910690c574 | 114 | |
| AnnaBridge | 145:64910690c574 | 115 | /** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS |
| AnnaBridge | 145:64910690c574 | 116 | * @{ |
| AnnaBridge | 145:64910690c574 | 117 | */ |
| AnnaBridge | 145:64910690c574 | 118 | /** |
| AnnaBridge | 145:64910690c574 | 119 | * @} |
| AnnaBridge | 145:64910690c574 | 120 | */ |
| AnnaBridge | 145:64910690c574 | 121 | |
| AnnaBridge | 145:64910690c574 | 122 | /** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI PORT |
| AnnaBridge | 145:64910690c574 | 123 | * @{ |
| AnnaBridge | 145:64910690c574 | 124 | */ |
| AnnaBridge | 145:64910690c574 | 125 | #define LL_SYSCFG_EXTI_PORTA (uint32_t)0 /*!< EXTI PORT A */ |
| AnnaBridge | 145:64910690c574 | 126 | #define LL_SYSCFG_EXTI_PORTB (uint32_t)1 /*!< EXTI PORT B */ |
| AnnaBridge | 145:64910690c574 | 127 | #define LL_SYSCFG_EXTI_PORTC (uint32_t)2 /*!< EXTI PORT C */ |
| AnnaBridge | 145:64910690c574 | 128 | #define LL_SYSCFG_EXTI_PORTD (uint32_t)3 /*!< EXTI PORT D */ |
| AnnaBridge | 145:64910690c574 | 129 | #define LL_SYSCFG_EXTI_PORTE (uint32_t)4 /*!< EXTI PORT E */ |
| AnnaBridge | 145:64910690c574 | 130 | #if defined(GPIOF) |
| AnnaBridge | 145:64910690c574 | 131 | #define LL_SYSCFG_EXTI_PORTF (uint32_t)5 /*!< EXTI PORT F */ |
| AnnaBridge | 145:64910690c574 | 132 | #endif /* GPIOF */ |
| AnnaBridge | 145:64910690c574 | 133 | #if defined(GPIOG) |
| AnnaBridge | 145:64910690c574 | 134 | #define LL_SYSCFG_EXTI_PORTG (uint32_t)6 /*!< EXTI PORT G */ |
| AnnaBridge | 145:64910690c574 | 135 | #endif /* GPIOG */ |
| AnnaBridge | 145:64910690c574 | 136 | #define LL_SYSCFG_EXTI_PORTH (uint32_t)7 /*!< EXTI PORT H */ |
| AnnaBridge | 145:64910690c574 | 137 | #if defined(GPIOI) |
| AnnaBridge | 145:64910690c574 | 138 | #define LL_SYSCFG_EXTI_PORTI (uint32_t)8 /*!< EXTI PORT I */ |
| AnnaBridge | 145:64910690c574 | 139 | #endif /* GPIOI */ |
| AnnaBridge | 145:64910690c574 | 140 | #if defined(GPIOJ) |
| AnnaBridge | 145:64910690c574 | 141 | #define LL_SYSCFG_EXTI_PORTJ (uint32_t)9 /*!< EXTI PORT J */ |
| AnnaBridge | 145:64910690c574 | 142 | #endif /* GPIOJ */ |
| AnnaBridge | 145:64910690c574 | 143 | #if defined(GPIOK) |
| AnnaBridge | 145:64910690c574 | 144 | #define LL_SYSCFG_EXTI_PORTK (uint32_t)10 /*!< EXTI PORT k */ |
| AnnaBridge | 145:64910690c574 | 145 | #endif /* GPIOK */ |
| AnnaBridge | 145:64910690c574 | 146 | /** |
| AnnaBridge | 145:64910690c574 | 147 | * @} |
| AnnaBridge | 145:64910690c574 | 148 | */ |
| AnnaBridge | 145:64910690c574 | 149 | |
| AnnaBridge | 145:64910690c574 | 150 | /** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI LINE |
| AnnaBridge | 145:64910690c574 | 151 | * @{ |
| AnnaBridge | 145:64910690c574 | 152 | */ |
| AnnaBridge | 145:64910690c574 | 153 | #define LL_SYSCFG_EXTI_LINE0 (uint32_t)(0x000FU << 16 | 0) /*!< EXTI_POSITION_0 | EXTICR[0] */ |
| AnnaBridge | 145:64910690c574 | 154 | #define LL_SYSCFG_EXTI_LINE1 (uint32_t)(0x00F0U << 16 | 0) /*!< EXTI_POSITION_4 | EXTICR[0] */ |
| AnnaBridge | 145:64910690c574 | 155 | #define LL_SYSCFG_EXTI_LINE2 (uint32_t)(0x0F00U << 16 | 0) /*!< EXTI_POSITION_8 | EXTICR[0] */ |
| AnnaBridge | 145:64910690c574 | 156 | #define LL_SYSCFG_EXTI_LINE3 (uint32_t)(0xF000U << 16 | 0) /*!< EXTI_POSITION_12 | EXTICR[0] */ |
| AnnaBridge | 145:64910690c574 | 157 | #define LL_SYSCFG_EXTI_LINE4 (uint32_t)(0x000FU << 16 | 1) /*!< EXTI_POSITION_0 | EXTICR[1] */ |
| AnnaBridge | 145:64910690c574 | 158 | #define LL_SYSCFG_EXTI_LINE5 (uint32_t)(0x00F0U << 16 | 1) /*!< EXTI_POSITION_4 | EXTICR[1] */ |
| AnnaBridge | 145:64910690c574 | 159 | #define LL_SYSCFG_EXTI_LINE6 (uint32_t)(0x0F00U << 16 | 1) /*!< EXTI_POSITION_8 | EXTICR[1] */ |
| AnnaBridge | 145:64910690c574 | 160 | #define LL_SYSCFG_EXTI_LINE7 (uint32_t)(0xF000U << 16 | 1) /*!< EXTI_POSITION_12 | EXTICR[1] */ |
| AnnaBridge | 145:64910690c574 | 161 | #define LL_SYSCFG_EXTI_LINE8 (uint32_t)(0x000FU << 16 | 2) /*!< EXTI_POSITION_0 | EXTICR[2] */ |
| AnnaBridge | 145:64910690c574 | 162 | #define LL_SYSCFG_EXTI_LINE9 (uint32_t)(0x00F0U << 16 | 2) /*!< EXTI_POSITION_4 | EXTICR[2] */ |
| AnnaBridge | 145:64910690c574 | 163 | #define LL_SYSCFG_EXTI_LINE10 (uint32_t)(0x0F00U << 16 | 2) /*!< EXTI_POSITION_8 | EXTICR[2] */ |
| AnnaBridge | 145:64910690c574 | 164 | #define LL_SYSCFG_EXTI_LINE11 (uint32_t)(0xF000U << 16 | 2) /*!< EXTI_POSITION_12 | EXTICR[2] */ |
| AnnaBridge | 145:64910690c574 | 165 | #define LL_SYSCFG_EXTI_LINE12 (uint32_t)(0x000FU << 16 | 3) /*!< EXTI_POSITION_0 | EXTICR[3] */ |
| AnnaBridge | 145:64910690c574 | 166 | #define LL_SYSCFG_EXTI_LINE13 (uint32_t)(0x00F0U << 16 | 3) /*!< EXTI_POSITION_4 | EXTICR[3] */ |
| AnnaBridge | 145:64910690c574 | 167 | #define LL_SYSCFG_EXTI_LINE14 (uint32_t)(0x0F00U << 16 | 3) /*!< EXTI_POSITION_8 | EXTICR[3] */ |
| AnnaBridge | 145:64910690c574 | 168 | #define LL_SYSCFG_EXTI_LINE15 (uint32_t)(0xF000U << 16 | 3) /*!< EXTI_POSITION_12 | EXTICR[3] */ |
| AnnaBridge | 145:64910690c574 | 169 | /** |
| AnnaBridge | 145:64910690c574 | 170 | * @} |
| AnnaBridge | 145:64910690c574 | 171 | */ |
| AnnaBridge | 145:64910690c574 | 172 | |
| AnnaBridge | 145:64910690c574 | 173 | /** @defgroup SYSTEM_LL_EC_TRACE DBGMCU TRACE Pin Assignment |
| AnnaBridge | 145:64910690c574 | 174 | * @{ |
| AnnaBridge | 145:64910690c574 | 175 | */ |
| AnnaBridge | 145:64910690c574 | 176 | #define LL_DBGMCU_TRACE_NONE 0x00000000U /*!< TRACE pins not assigned (default state) */ |
| AnnaBridge | 145:64910690c574 | 177 | #define LL_DBGMCU_TRACE_ASYNCH DBGMCU_CR_TRACE_IOEN /*!< TRACE pin assignment for Asynchronous Mode */ |
| AnnaBridge | 145:64910690c574 | 178 | #define LL_DBGMCU_TRACE_SYNCH_SIZE1 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_0) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 1 */ |
| AnnaBridge | 145:64910690c574 | 179 | #define LL_DBGMCU_TRACE_SYNCH_SIZE2 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE_1) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 2 */ |
| AnnaBridge | 145:64910690c574 | 180 | #define LL_DBGMCU_TRACE_SYNCH_SIZE4 (DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE) /*!< TRACE pin assignment for Synchronous Mode with a TRACEDATA size of 4 */ |
| AnnaBridge | 145:64910690c574 | 181 | /** |
| AnnaBridge | 145:64910690c574 | 182 | * @} |
| AnnaBridge | 145:64910690c574 | 183 | */ |
| AnnaBridge | 145:64910690c574 | 184 | |
| AnnaBridge | 145:64910690c574 | 185 | /** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP |
| AnnaBridge | 145:64910690c574 | 186 | * @{ |
| AnnaBridge | 145:64910690c574 | 187 | */ |
| AnnaBridge | 145:64910690c574 | 188 | #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 189 | #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 190 | #define LL_DBGMCU_APB1_GRP1_TIM4_STOP DBGMCU_APB1_FZ_DBG_TIM4_STOP /*!< TIM4 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 191 | #define LL_DBGMCU_APB1_GRP1_TIM5_STOP DBGMCU_APB1_FZ_DBG_TIM5_STOP /*!< TIM5 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 192 | #define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP /*!< TIM6 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 193 | #define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< TIM7 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 194 | #define LL_DBGMCU_APB1_GRP1_TIM12_STOP DBGMCU_APB1_FZ_DBG_TIM12_STOP /*!< TIM12 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 195 | #define LL_DBGMCU_APB1_GRP1_TIM13_STOP DBGMCU_APB1_FZ_DBG_TIM13_STOP /*!< TIM13 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 196 | #define LL_DBGMCU_APB1_GRP1_TIM14_STOP DBGMCU_APB1_FZ_DBG_TIM14_STOP /*!< TIM14 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 197 | #define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP /*!< RTC counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 198 | #define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP /*!< Debug Window Watchdog stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 199 | #define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP /*!< Debug Independent Watchdog stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 200 | #define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1_FZ_DBG_I2C1_SMBUS_TIMEOUT /*!< I2C1 SMBUS timeout mode stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 201 | #define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1_FZ_DBG_I2C2_SMBUS_TIMEOUT /*!< I2C2 SMBUS timeout mode stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 202 | #define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1_FZ_DBG_I2C3_SMBUS_TIMEOUT /*!< I2C3 SMBUS timeout mode stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 203 | #define LL_DBGMCU_APB1_GRP1_CAN1_STOP DBGMCU_APB1_FZ_DBG_CAN1_STOP /*!< CAN1 debug stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 204 | #define LL_DBGMCU_APB1_GRP1_CAN2_STOP DBGMCU_APB1_FZ_DBG_CAN2_STOP /*!< CAN2 debug stopped when Core is halted */ |
| AnnaBridge | 145:64910690c574 | 205 | /** |
| AnnaBridge | 145:64910690c574 | 206 | * @} |
| AnnaBridge | 145:64910690c574 | 207 | */ |
| AnnaBridge | 145:64910690c574 | 208 | |
| AnnaBridge | 145:64910690c574 | 209 | /** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP |
| AnnaBridge | 145:64910690c574 | 210 | * @{ |
| AnnaBridge | 145:64910690c574 | 211 | */ |
| AnnaBridge | 145:64910690c574 | 212 | #define LL_DBGMCU_APB2_GRP1_TIM1_STOP DBGMCU_APB2_FZ_DBG_TIM1_STOP /*!< TIM1 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 213 | #define LL_DBGMCU_APB2_GRP1_TIM8_STOP DBGMCU_APB2_FZ_DBG_TIM8_STOP /*!< TIM8 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 214 | #define LL_DBGMCU_APB2_GRP1_TIM9_STOP DBGMCU_APB2_FZ_DBG_TIM9_STOP /*!< TIM9 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 215 | #define LL_DBGMCU_APB2_GRP1_TIM10_STOP DBGMCU_APB2_FZ_DBG_TIM10_STOP /*!< TIM10 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 216 | #define LL_DBGMCU_APB2_GRP1_TIM11_STOP DBGMCU_APB2_FZ_DBG_TIM11_STOP /*!< TIM11 counter stopped when core is halted */ |
| AnnaBridge | 145:64910690c574 | 217 | /** |
| AnnaBridge | 145:64910690c574 | 218 | * @} |
| AnnaBridge | 145:64910690c574 | 219 | */ |
| AnnaBridge | 145:64910690c574 | 220 | |
| AnnaBridge | 145:64910690c574 | 221 | /** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY |
| AnnaBridge | 145:64910690c574 | 222 | * @{ |
| AnnaBridge | 145:64910690c574 | 223 | */ |
| AnnaBridge | 145:64910690c574 | 224 | #define LL_FLASH_LATENCY_0 FLASH_ACR_LATENCY_0WS /*!< FLASH Zero wait state */ |
| AnnaBridge | 145:64910690c574 | 225 | #define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY_1WS /*!< FLASH One wait state */ |
| AnnaBridge | 145:64910690c574 | 226 | #define LL_FLASH_LATENCY_2 FLASH_ACR_LATENCY_2WS /*!< FLASH Two wait states */ |
| AnnaBridge | 145:64910690c574 | 227 | #define LL_FLASH_LATENCY_3 FLASH_ACR_LATENCY_3WS /*!< FLASH Three wait states */ |
| AnnaBridge | 145:64910690c574 | 228 | #define LL_FLASH_LATENCY_4 FLASH_ACR_LATENCY_4WS /*!< FLASH Four wait states */ |
| AnnaBridge | 145:64910690c574 | 229 | #define LL_FLASH_LATENCY_5 FLASH_ACR_LATENCY_5WS /*!< FLASH five wait state */ |
| AnnaBridge | 145:64910690c574 | 230 | #define LL_FLASH_LATENCY_6 FLASH_ACR_LATENCY_6WS /*!< FLASH six wait state */ |
| AnnaBridge | 145:64910690c574 | 231 | #define LL_FLASH_LATENCY_7 FLASH_ACR_LATENCY_7WS /*!< FLASH seven wait states */ |
| AnnaBridge | 145:64910690c574 | 232 | /** |
| AnnaBridge | 145:64910690c574 | 233 | * @} |
| AnnaBridge | 145:64910690c574 | 234 | */ |
| AnnaBridge | 145:64910690c574 | 235 | |
| AnnaBridge | 145:64910690c574 | 236 | /** |
| AnnaBridge | 145:64910690c574 | 237 | * @} |
| AnnaBridge | 145:64910690c574 | 238 | */ |
| AnnaBridge | 145:64910690c574 | 239 | |
| AnnaBridge | 145:64910690c574 | 240 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 241 | |
| AnnaBridge | 145:64910690c574 | 242 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 145:64910690c574 | 243 | /** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions |
| AnnaBridge | 145:64910690c574 | 244 | * @{ |
| AnnaBridge | 145:64910690c574 | 245 | */ |
| AnnaBridge | 145:64910690c574 | 246 | |
| AnnaBridge | 145:64910690c574 | 247 | /** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG |
| AnnaBridge | 145:64910690c574 | 248 | * @{ |
| AnnaBridge | 145:64910690c574 | 249 | */ |
| AnnaBridge | 145:64910690c574 | 250 | /** |
| AnnaBridge | 145:64910690c574 | 251 | * @brief Set memory mapping at address 0x00000000 |
| AnnaBridge | 145:64910690c574 | 252 | * @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_SetRemapMemory |
| AnnaBridge | 145:64910690c574 | 253 | * @param Memory This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 254 | * @arg @ref LL_SYSCFG_REMAP_FLASH |
| AnnaBridge | 145:64910690c574 | 255 | * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH |
| AnnaBridge | 145:64910690c574 | 256 | * @arg @ref LL_SYSCFG_REMAP_FSMC |
| AnnaBridge | 145:64910690c574 | 257 | * @arg @ref LL_SYSCFG_REMAP_SRAM |
| AnnaBridge | 145:64910690c574 | 258 | * @retval None |
| AnnaBridge | 145:64910690c574 | 259 | */ |
| AnnaBridge | 145:64910690c574 | 260 | __STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory) |
| AnnaBridge | 145:64910690c574 | 261 | { |
| AnnaBridge | 145:64910690c574 | 262 | MODIFY_REG(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE, Memory); |
| AnnaBridge | 145:64910690c574 | 263 | } |
| AnnaBridge | 145:64910690c574 | 264 | |
| AnnaBridge | 145:64910690c574 | 265 | /** |
| AnnaBridge | 145:64910690c574 | 266 | * @brief Get memory mapping at address 0x00000000 |
| AnnaBridge | 145:64910690c574 | 267 | * @rmtoll SYSCFG_MEMRMP MEM_MODE LL_SYSCFG_GetRemapMemory |
| AnnaBridge | 145:64910690c574 | 268 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 269 | * @arg @ref LL_SYSCFG_REMAP_FLASH |
| AnnaBridge | 145:64910690c574 | 270 | * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH |
| AnnaBridge | 145:64910690c574 | 271 | * @arg @ref LL_SYSCFG_REMAP_SRAM |
| AnnaBridge | 145:64910690c574 | 272 | * @arg @ref LL_SYSCFG_REMAP_FSMC |
| AnnaBridge | 145:64910690c574 | 273 | */ |
| AnnaBridge | 145:64910690c574 | 274 | __STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void) |
| AnnaBridge | 145:64910690c574 | 275 | { |
| AnnaBridge | 145:64910690c574 | 276 | return (uint32_t)(READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_MEM_MODE)); |
| AnnaBridge | 145:64910690c574 | 277 | } |
| AnnaBridge | 145:64910690c574 | 278 | |
| AnnaBridge | 145:64910690c574 | 279 | /** |
| AnnaBridge | 145:64910690c574 | 280 | * @brief Enables the Compensation cell Power Down |
| AnnaBridge | 145:64910690c574 | 281 | * @rmtoll SYSCFG_CMPCR CMP_PD LL_SYSCFG_EnableCompensationCell |
| AnnaBridge | 145:64910690c574 | 282 | * @note The I/O compensation cell can be used only when the device supply |
| AnnaBridge | 145:64910690c574 | 283 | * voltage ranges from 2.4 to 3.6 V |
| AnnaBridge | 145:64910690c574 | 284 | * @retval None |
| AnnaBridge | 145:64910690c574 | 285 | */ |
| AnnaBridge | 145:64910690c574 | 286 | __STATIC_INLINE void LL_SYSCFG_EnableCompensationCell(void) |
| AnnaBridge | 145:64910690c574 | 287 | { |
| AnnaBridge | 145:64910690c574 | 288 | SET_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_CMP_PD); |
| AnnaBridge | 145:64910690c574 | 289 | } |
| AnnaBridge | 145:64910690c574 | 290 | |
| AnnaBridge | 145:64910690c574 | 291 | /** |
| AnnaBridge | 145:64910690c574 | 292 | * @brief Disables the Compensation cell Power Down |
| AnnaBridge | 145:64910690c574 | 293 | * @rmtoll SYSCFG_CMPCR CMP_PD LL_SYSCFG_DisableCompensationCell |
| AnnaBridge | 145:64910690c574 | 294 | * @note The I/O compensation cell can be used only when the device supply |
| AnnaBridge | 145:64910690c574 | 295 | * voltage ranges from 2.4 to 3.6 V |
| AnnaBridge | 145:64910690c574 | 296 | * @retval None |
| AnnaBridge | 145:64910690c574 | 297 | */ |
| AnnaBridge | 145:64910690c574 | 298 | __STATIC_INLINE void LL_SYSCFG_DisableCompensationCell(void) |
| AnnaBridge | 145:64910690c574 | 299 | { |
| AnnaBridge | 145:64910690c574 | 300 | CLEAR_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_CMP_PD); |
| AnnaBridge | 145:64910690c574 | 301 | } |
| AnnaBridge | 145:64910690c574 | 302 | |
| AnnaBridge | 145:64910690c574 | 303 | /** |
| AnnaBridge | 145:64910690c574 | 304 | * @brief Get Compensation Cell ready Flag |
| AnnaBridge | 145:64910690c574 | 305 | * @rmtoll SYSCFG_CMPCR READY LL_SYSCFG_IsActiveFlag_CMPCR |
| AnnaBridge | 145:64910690c574 | 306 | * @retval State of bit (1 or 0). |
| AnnaBridge | 145:64910690c574 | 307 | */ |
| AnnaBridge | 145:64910690c574 | 308 | __STATIC_INLINE uint32_t LL_SYSCFG_IsActiveFlag_CMPCR(void) |
| AnnaBridge | 145:64910690c574 | 309 | { |
| AnnaBridge | 145:64910690c574 | 310 | return (READ_BIT(SYSCFG->CMPCR, SYSCFG_CMPCR_READY) == (SYSCFG_CMPCR_READY)); |
| AnnaBridge | 145:64910690c574 | 311 | } |
| AnnaBridge | 145:64910690c574 | 312 | #if defined(SYSCFG_PMC_MII_RMII_SEL) |
| AnnaBridge | 145:64910690c574 | 313 | /** |
| AnnaBridge | 145:64910690c574 | 314 | * @brief Select Ethernet PHY interface |
| AnnaBridge | 145:64910690c574 | 315 | * @rmtoll SYSCFG_PMC MII_RMII_SEL LL_SYSCFG_SetPHYInterface |
| AnnaBridge | 145:64910690c574 | 316 | * @param Interface This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 317 | * @arg @ref LL_SYSCFG_PMC_ETHMII |
| AnnaBridge | 145:64910690c574 | 318 | * @arg @ref LL_SYSCFG_PMC_ETHRMII |
| AnnaBridge | 145:64910690c574 | 319 | * @retval None |
| AnnaBridge | 145:64910690c574 | 320 | */ |
| AnnaBridge | 145:64910690c574 | 321 | __STATIC_INLINE void LL_SYSCFG_SetPHYInterface(uint32_t Interface) |
| AnnaBridge | 145:64910690c574 | 322 | { |
| AnnaBridge | 145:64910690c574 | 323 | MODIFY_REG(SYSCFG->PMC, SYSCFG_PMC_MII_RMII_SEL, Interface); |
| AnnaBridge | 145:64910690c574 | 324 | } |
| AnnaBridge | 145:64910690c574 | 325 | |
| AnnaBridge | 145:64910690c574 | 326 | /** |
| AnnaBridge | 145:64910690c574 | 327 | * @brief Get Ethernet PHY interface |
| AnnaBridge | 145:64910690c574 | 328 | * @rmtoll SYSCFG_PMC MII_RMII_SEL LL_SYSCFG_GetPHYInterface |
| AnnaBridge | 145:64910690c574 | 329 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 330 | * @arg @ref LL_SYSCFG_PMC_ETHMII |
| AnnaBridge | 145:64910690c574 | 331 | * @arg @ref LL_SYSCFG_PMC_ETHRMII |
| AnnaBridge | 145:64910690c574 | 332 | * @retval None |
| AnnaBridge | 145:64910690c574 | 333 | */ |
| AnnaBridge | 145:64910690c574 | 334 | __STATIC_INLINE uint32_t LL_SYSCFG_GetPHYInterface(void) |
| AnnaBridge | 145:64910690c574 | 335 | { |
| AnnaBridge | 145:64910690c574 | 336 | return (uint32_t)(READ_BIT(SYSCFG->PMC, SYSCFG_PMC_MII_RMII_SEL)); |
| AnnaBridge | 145:64910690c574 | 337 | } |
| AnnaBridge | 145:64910690c574 | 338 | #endif /* SYSCFG_PMC_MII_RMII_SEL */ |
| AnnaBridge | 145:64910690c574 | 339 | |
| AnnaBridge | 145:64910690c574 | 340 | |
| AnnaBridge | 145:64910690c574 | 341 | |
| AnnaBridge | 145:64910690c574 | 342 | /** |
| AnnaBridge | 145:64910690c574 | 343 | * @brief Configure source input for the EXTI external interrupt. |
| AnnaBridge | 145:64910690c574 | 344 | * @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_SetEXTISource\n |
| AnnaBridge | 145:64910690c574 | 345 | * SYSCFG_EXTICR2 EXTIx LL_SYSCFG_SetEXTISource\n |
| AnnaBridge | 145:64910690c574 | 346 | * SYSCFG_EXTICR3 EXTIx LL_SYSCFG_SetEXTISource\n |
| AnnaBridge | 145:64910690c574 | 347 | * SYSCFG_EXTICR4 EXTIx LL_SYSCFG_SetEXTISource |
| AnnaBridge | 145:64910690c574 | 348 | * @param Port This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 349 | * @arg @ref LL_SYSCFG_EXTI_PORTA |
| AnnaBridge | 145:64910690c574 | 350 | * @arg @ref LL_SYSCFG_EXTI_PORTB |
| AnnaBridge | 145:64910690c574 | 351 | * @arg @ref LL_SYSCFG_EXTI_PORTC |
| AnnaBridge | 145:64910690c574 | 352 | * @arg @ref LL_SYSCFG_EXTI_PORTD |
| AnnaBridge | 145:64910690c574 | 353 | * @arg @ref LL_SYSCFG_EXTI_PORTE |
| AnnaBridge | 145:64910690c574 | 354 | * @arg @ref LL_SYSCFG_EXTI_PORTF (*) |
| AnnaBridge | 145:64910690c574 | 355 | * @arg @ref LL_SYSCFG_EXTI_PORTG (*) |
| AnnaBridge | 145:64910690c574 | 356 | * @arg @ref LL_SYSCFG_EXTI_PORTH |
| AnnaBridge | 145:64910690c574 | 357 | * |
| AnnaBridge | 145:64910690c574 | 358 | * (*) value not defined in all devices |
| AnnaBridge | 145:64910690c574 | 359 | * @param Line This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 360 | * @arg @ref LL_SYSCFG_EXTI_LINE0 |
| AnnaBridge | 145:64910690c574 | 361 | * @arg @ref LL_SYSCFG_EXTI_LINE1 |
| AnnaBridge | 145:64910690c574 | 362 | * @arg @ref LL_SYSCFG_EXTI_LINE2 |
| AnnaBridge | 145:64910690c574 | 363 | * @arg @ref LL_SYSCFG_EXTI_LINE3 |
| AnnaBridge | 145:64910690c574 | 364 | * @arg @ref LL_SYSCFG_EXTI_LINE4 |
| AnnaBridge | 145:64910690c574 | 365 | * @arg @ref LL_SYSCFG_EXTI_LINE5 |
| AnnaBridge | 145:64910690c574 | 366 | * @arg @ref LL_SYSCFG_EXTI_LINE6 |
| AnnaBridge | 145:64910690c574 | 367 | * @arg @ref LL_SYSCFG_EXTI_LINE7 |
| AnnaBridge | 145:64910690c574 | 368 | * @arg @ref LL_SYSCFG_EXTI_LINE8 |
| AnnaBridge | 145:64910690c574 | 369 | * @arg @ref LL_SYSCFG_EXTI_LINE9 |
| AnnaBridge | 145:64910690c574 | 370 | * @arg @ref LL_SYSCFG_EXTI_LINE10 |
| AnnaBridge | 145:64910690c574 | 371 | * @arg @ref LL_SYSCFG_EXTI_LINE11 |
| AnnaBridge | 145:64910690c574 | 372 | * @arg @ref LL_SYSCFG_EXTI_LINE12 |
| AnnaBridge | 145:64910690c574 | 373 | * @arg @ref LL_SYSCFG_EXTI_LINE13 |
| AnnaBridge | 145:64910690c574 | 374 | * @arg @ref LL_SYSCFG_EXTI_LINE14 |
| AnnaBridge | 145:64910690c574 | 375 | * @arg @ref LL_SYSCFG_EXTI_LINE15 |
| AnnaBridge | 145:64910690c574 | 376 | * @retval None |
| AnnaBridge | 145:64910690c574 | 377 | */ |
| AnnaBridge | 145:64910690c574 | 378 | __STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line) |
| AnnaBridge | 145:64910690c574 | 379 | { |
| AnnaBridge | 145:64910690c574 | 380 | MODIFY_REG(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16), Port << POSITION_VAL((Line >> 16))); |
| AnnaBridge | 145:64910690c574 | 381 | } |
| AnnaBridge | 145:64910690c574 | 382 | |
| AnnaBridge | 145:64910690c574 | 383 | /** |
| AnnaBridge | 145:64910690c574 | 384 | * @brief Get the configured defined for specific EXTI Line |
| AnnaBridge | 145:64910690c574 | 385 | * @rmtoll SYSCFG_EXTICR1 EXTIx LL_SYSCFG_GetEXTISource\n |
| AnnaBridge | 145:64910690c574 | 386 | * SYSCFG_EXTICR2 EXTIx LL_SYSCFG_GetEXTISource\n |
| AnnaBridge | 145:64910690c574 | 387 | * SYSCFG_EXTICR3 EXTIx LL_SYSCFG_GetEXTISource\n |
| AnnaBridge | 145:64910690c574 | 388 | * SYSCFG_EXTICR4 EXTIx LL_SYSCFG_GetEXTISource |
| AnnaBridge | 145:64910690c574 | 389 | * @param Line This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 390 | * @arg @ref LL_SYSCFG_EXTI_LINE0 |
| AnnaBridge | 145:64910690c574 | 391 | * @arg @ref LL_SYSCFG_EXTI_LINE1 |
| AnnaBridge | 145:64910690c574 | 392 | * @arg @ref LL_SYSCFG_EXTI_LINE2 |
| AnnaBridge | 145:64910690c574 | 393 | * @arg @ref LL_SYSCFG_EXTI_LINE3 |
| AnnaBridge | 145:64910690c574 | 394 | * @arg @ref LL_SYSCFG_EXTI_LINE4 |
| AnnaBridge | 145:64910690c574 | 395 | * @arg @ref LL_SYSCFG_EXTI_LINE5 |
| AnnaBridge | 145:64910690c574 | 396 | * @arg @ref LL_SYSCFG_EXTI_LINE6 |
| AnnaBridge | 145:64910690c574 | 397 | * @arg @ref LL_SYSCFG_EXTI_LINE7 |
| AnnaBridge | 145:64910690c574 | 398 | * @arg @ref LL_SYSCFG_EXTI_LINE8 |
| AnnaBridge | 145:64910690c574 | 399 | * @arg @ref LL_SYSCFG_EXTI_LINE9 |
| AnnaBridge | 145:64910690c574 | 400 | * @arg @ref LL_SYSCFG_EXTI_LINE10 |
| AnnaBridge | 145:64910690c574 | 401 | * @arg @ref LL_SYSCFG_EXTI_LINE11 |
| AnnaBridge | 145:64910690c574 | 402 | * @arg @ref LL_SYSCFG_EXTI_LINE12 |
| AnnaBridge | 145:64910690c574 | 403 | * @arg @ref LL_SYSCFG_EXTI_LINE13 |
| AnnaBridge | 145:64910690c574 | 404 | * @arg @ref LL_SYSCFG_EXTI_LINE14 |
| AnnaBridge | 145:64910690c574 | 405 | * @arg @ref LL_SYSCFG_EXTI_LINE15 |
| AnnaBridge | 145:64910690c574 | 406 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 407 | * @arg @ref LL_SYSCFG_EXTI_PORTA |
| AnnaBridge | 145:64910690c574 | 408 | * @arg @ref LL_SYSCFG_EXTI_PORTB |
| AnnaBridge | 145:64910690c574 | 409 | * @arg @ref LL_SYSCFG_EXTI_PORTC |
| AnnaBridge | 145:64910690c574 | 410 | * @arg @ref LL_SYSCFG_EXTI_PORTD |
| AnnaBridge | 145:64910690c574 | 411 | * @arg @ref LL_SYSCFG_EXTI_PORTE |
| AnnaBridge | 145:64910690c574 | 412 | * @arg @ref LL_SYSCFG_EXTI_PORTF (*) |
| AnnaBridge | 145:64910690c574 | 413 | * @arg @ref LL_SYSCFG_EXTI_PORTG (*) |
| AnnaBridge | 145:64910690c574 | 414 | * @arg @ref LL_SYSCFG_EXTI_PORTH |
| AnnaBridge | 145:64910690c574 | 415 | * (*) value not defined in all devices |
| AnnaBridge | 145:64910690c574 | 416 | */ |
| AnnaBridge | 145:64910690c574 | 417 | __STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line) |
| AnnaBridge | 145:64910690c574 | 418 | { |
| AnnaBridge | 145:64910690c574 | 419 | return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFF], (Line >> 16)) >> POSITION_VAL(Line >> 16)); |
| AnnaBridge | 145:64910690c574 | 420 | } |
| AnnaBridge | 145:64910690c574 | 421 | |
| AnnaBridge | 145:64910690c574 | 422 | /** |
| AnnaBridge | 145:64910690c574 | 423 | * @} |
| AnnaBridge | 145:64910690c574 | 424 | */ |
| AnnaBridge | 145:64910690c574 | 425 | |
| AnnaBridge | 145:64910690c574 | 426 | |
| AnnaBridge | 145:64910690c574 | 427 | /** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU |
| AnnaBridge | 145:64910690c574 | 428 | * @{ |
| AnnaBridge | 145:64910690c574 | 429 | */ |
| AnnaBridge | 145:64910690c574 | 430 | |
| AnnaBridge | 145:64910690c574 | 431 | /** |
| AnnaBridge | 145:64910690c574 | 432 | * @brief Return the device identifier |
| AnnaBridge | 145:64910690c574 | 433 | * @note For STM32F2xxxx ,the device ID is 0x411 |
| AnnaBridge | 145:64910690c574 | 434 | * @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID |
| AnnaBridge | 145:64910690c574 | 435 | * @retval Values between Min_Data=0x00 and Max_Data=0xFFF |
| AnnaBridge | 145:64910690c574 | 436 | */ |
| AnnaBridge | 145:64910690c574 | 437 | __STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void) |
| AnnaBridge | 145:64910690c574 | 438 | { |
| AnnaBridge | 145:64910690c574 | 439 | return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID)); |
| AnnaBridge | 145:64910690c574 | 440 | } |
| AnnaBridge | 145:64910690c574 | 441 | |
| AnnaBridge | 145:64910690c574 | 442 | /** |
| AnnaBridge | 145:64910690c574 | 443 | * @brief Return the device revision identifier |
| AnnaBridge | 145:64910690c574 | 444 | * @note This field indicates the revision of the device. |
| AnnaBridge | 145:64910690c574 | 445 | For example, it is read as revA -> 0x1000,revZ -> 0x1001, revB -> 0x2000, revY -> 0x2001, revX -> 0x2003, rev1 -> 0x2007, revV -> 0x200F, rev2 -> 0x201F |
| AnnaBridge | 145:64910690c574 | 446 | * @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID |
| AnnaBridge | 145:64910690c574 | 447 | * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF |
| AnnaBridge | 145:64910690c574 | 448 | */ |
| AnnaBridge | 145:64910690c574 | 449 | __STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void) |
| AnnaBridge | 145:64910690c574 | 450 | { |
| AnnaBridge | 145:64910690c574 | 451 | return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_IDCODE_REV_ID_Pos); |
| AnnaBridge | 145:64910690c574 | 452 | } |
| AnnaBridge | 145:64910690c574 | 453 | |
| AnnaBridge | 145:64910690c574 | 454 | /** |
| AnnaBridge | 145:64910690c574 | 455 | * @brief Enable the Debug Module during SLEEP mode |
| AnnaBridge | 145:64910690c574 | 456 | * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode |
| AnnaBridge | 145:64910690c574 | 457 | * @retval None |
| AnnaBridge | 145:64910690c574 | 458 | */ |
| AnnaBridge | 145:64910690c574 | 459 | __STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void) |
| AnnaBridge | 145:64910690c574 | 460 | { |
| AnnaBridge | 145:64910690c574 | 461 | SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); |
| AnnaBridge | 145:64910690c574 | 462 | } |
| AnnaBridge | 145:64910690c574 | 463 | |
| AnnaBridge | 145:64910690c574 | 464 | /** |
| AnnaBridge | 145:64910690c574 | 465 | * @brief Disable the Debug Module during SLEEP mode |
| AnnaBridge | 145:64910690c574 | 466 | * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode |
| AnnaBridge | 145:64910690c574 | 467 | * @retval None |
| AnnaBridge | 145:64910690c574 | 468 | */ |
| AnnaBridge | 145:64910690c574 | 469 | __STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void) |
| AnnaBridge | 145:64910690c574 | 470 | { |
| AnnaBridge | 145:64910690c574 | 471 | CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP); |
| AnnaBridge | 145:64910690c574 | 472 | } |
| AnnaBridge | 145:64910690c574 | 473 | |
| AnnaBridge | 145:64910690c574 | 474 | /** |
| AnnaBridge | 145:64910690c574 | 475 | * @brief Enable the Debug Module during STOP mode |
| AnnaBridge | 145:64910690c574 | 476 | * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode |
| AnnaBridge | 145:64910690c574 | 477 | * @retval None |
| AnnaBridge | 145:64910690c574 | 478 | */ |
| AnnaBridge | 145:64910690c574 | 479 | __STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void) |
| AnnaBridge | 145:64910690c574 | 480 | { |
| AnnaBridge | 145:64910690c574 | 481 | SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); |
| AnnaBridge | 145:64910690c574 | 482 | } |
| AnnaBridge | 145:64910690c574 | 483 | |
| AnnaBridge | 145:64910690c574 | 484 | /** |
| AnnaBridge | 145:64910690c574 | 485 | * @brief Disable the Debug Module during STOP mode |
| AnnaBridge | 145:64910690c574 | 486 | * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode |
| AnnaBridge | 145:64910690c574 | 487 | * @retval None |
| AnnaBridge | 145:64910690c574 | 488 | */ |
| AnnaBridge | 145:64910690c574 | 489 | __STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void) |
| AnnaBridge | 145:64910690c574 | 490 | { |
| AnnaBridge | 145:64910690c574 | 491 | CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP); |
| AnnaBridge | 145:64910690c574 | 492 | } |
| AnnaBridge | 145:64910690c574 | 493 | |
| AnnaBridge | 145:64910690c574 | 494 | /** |
| AnnaBridge | 145:64910690c574 | 495 | * @brief Enable the Debug Module during STANDBY mode |
| AnnaBridge | 145:64910690c574 | 496 | * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode |
| AnnaBridge | 145:64910690c574 | 497 | * @retval None |
| AnnaBridge | 145:64910690c574 | 498 | */ |
| AnnaBridge | 145:64910690c574 | 499 | __STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void) |
| AnnaBridge | 145:64910690c574 | 500 | { |
| AnnaBridge | 145:64910690c574 | 501 | SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); |
| AnnaBridge | 145:64910690c574 | 502 | } |
| AnnaBridge | 145:64910690c574 | 503 | |
| AnnaBridge | 145:64910690c574 | 504 | /** |
| AnnaBridge | 145:64910690c574 | 505 | * @brief Disable the Debug Module during STANDBY mode |
| AnnaBridge | 145:64910690c574 | 506 | * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode |
| AnnaBridge | 145:64910690c574 | 507 | * @retval None |
| AnnaBridge | 145:64910690c574 | 508 | */ |
| AnnaBridge | 145:64910690c574 | 509 | __STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void) |
| AnnaBridge | 145:64910690c574 | 510 | { |
| AnnaBridge | 145:64910690c574 | 511 | CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY); |
| AnnaBridge | 145:64910690c574 | 512 | } |
| AnnaBridge | 145:64910690c574 | 513 | |
| AnnaBridge | 145:64910690c574 | 514 | /** |
| AnnaBridge | 145:64910690c574 | 515 | * @brief Set Trace pin assignment control |
| AnnaBridge | 145:64910690c574 | 516 | * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_SetTracePinAssignment\n |
| AnnaBridge | 145:64910690c574 | 517 | * DBGMCU_CR TRACE_MODE LL_DBGMCU_SetTracePinAssignment |
| AnnaBridge | 145:64910690c574 | 518 | * @param PinAssignment This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 519 | * @arg @ref LL_DBGMCU_TRACE_NONE |
| AnnaBridge | 145:64910690c574 | 520 | * @arg @ref LL_DBGMCU_TRACE_ASYNCH |
| AnnaBridge | 145:64910690c574 | 521 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1 |
| AnnaBridge | 145:64910690c574 | 522 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2 |
| AnnaBridge | 145:64910690c574 | 523 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4 |
| AnnaBridge | 145:64910690c574 | 524 | * @retval None |
| AnnaBridge | 145:64910690c574 | 525 | */ |
| AnnaBridge | 145:64910690c574 | 526 | __STATIC_INLINE void LL_DBGMCU_SetTracePinAssignment(uint32_t PinAssignment) |
| AnnaBridge | 145:64910690c574 | 527 | { |
| AnnaBridge | 145:64910690c574 | 528 | MODIFY_REG(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE, PinAssignment); |
| AnnaBridge | 145:64910690c574 | 529 | } |
| AnnaBridge | 145:64910690c574 | 530 | |
| AnnaBridge | 145:64910690c574 | 531 | /** |
| AnnaBridge | 145:64910690c574 | 532 | * @brief Get Trace pin assignment control |
| AnnaBridge | 145:64910690c574 | 533 | * @rmtoll DBGMCU_CR TRACE_IOEN LL_DBGMCU_GetTracePinAssignment\n |
| AnnaBridge | 145:64910690c574 | 534 | * DBGMCU_CR TRACE_MODE LL_DBGMCU_GetTracePinAssignment |
| AnnaBridge | 145:64910690c574 | 535 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 536 | * @arg @ref LL_DBGMCU_TRACE_NONE |
| AnnaBridge | 145:64910690c574 | 537 | * @arg @ref LL_DBGMCU_TRACE_ASYNCH |
| AnnaBridge | 145:64910690c574 | 538 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE1 |
| AnnaBridge | 145:64910690c574 | 539 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE2 |
| AnnaBridge | 145:64910690c574 | 540 | * @arg @ref LL_DBGMCU_TRACE_SYNCH_SIZE4 |
| AnnaBridge | 145:64910690c574 | 541 | */ |
| AnnaBridge | 145:64910690c574 | 542 | __STATIC_INLINE uint32_t LL_DBGMCU_GetTracePinAssignment(void) |
| AnnaBridge | 145:64910690c574 | 543 | { |
| AnnaBridge | 145:64910690c574 | 544 | return (uint32_t)(READ_BIT(DBGMCU->CR, DBGMCU_CR_TRACE_IOEN | DBGMCU_CR_TRACE_MODE)); |
| AnnaBridge | 145:64910690c574 | 545 | } |
| AnnaBridge | 145:64910690c574 | 546 | |
| AnnaBridge | 145:64910690c574 | 547 | /** |
| AnnaBridge | 145:64910690c574 | 548 | * @brief Freeze APB1 peripherals (group1 peripherals) |
| AnnaBridge | 145:64910690c574 | 549 | * @rmtoll DBGMCU_APB1_FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 550 | * DBGMCU_APB1_FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 551 | * DBGMCU_APB1_FZ DBG_TIM4_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 552 | * DBGMCU_APB1_FZ DBG_TIM5_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 553 | * DBGMCU_APB1_FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 554 | * DBGMCU_APB1_FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 555 | * DBGMCU_APB1_FZ DBG_TIM12_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 556 | * DBGMCU_APB1_FZ DBG_TIM13_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 557 | * DBGMCU_APB1_FZ DBG_TIM14_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 558 | * DBGMCU_APB1_FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 559 | * DBGMCU_APB1_FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 560 | * DBGMCU_APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 561 | * DBGMCU_APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 562 | * DBGMCU_APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 563 | * DBGMCU_APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 564 | * DBGMCU_APB1_FZ DBG_CAN1_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 565 | * DBGMCU_APB1_FZ DBG_CAN2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph |
| AnnaBridge | 145:64910690c574 | 566 | * @param Periphs This parameter can be a combination of the following values: |
| AnnaBridge | 145:64910690c574 | 567 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP |
| AnnaBridge | 145:64910690c574 | 568 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP |
| AnnaBridge | 145:64910690c574 | 569 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP |
| AnnaBridge | 145:64910690c574 | 570 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP |
| AnnaBridge | 145:64910690c574 | 571 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP |
| AnnaBridge | 145:64910690c574 | 572 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP |
| AnnaBridge | 145:64910690c574 | 573 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP |
| AnnaBridge | 145:64910690c574 | 574 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP |
| AnnaBridge | 145:64910690c574 | 575 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP |
| AnnaBridge | 145:64910690c574 | 576 | * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP |
| AnnaBridge | 145:64910690c574 | 577 | * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP |
| AnnaBridge | 145:64910690c574 | 578 | * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP |
| AnnaBridge | 145:64910690c574 | 579 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP |
| AnnaBridge | 145:64910690c574 | 580 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP |
| AnnaBridge | 145:64910690c574 | 581 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP |
| AnnaBridge | 145:64910690c574 | 582 | * @arg @ref LL_DBGMCU_APB1_GRP1_CAN1_STOP |
| AnnaBridge | 145:64910690c574 | 583 | * @arg @ref LL_DBGMCU_APB1_GRP1_CAN2_STOP |
| AnnaBridge | 145:64910690c574 | 584 | * |
| AnnaBridge | 145:64910690c574 | 585 | * (*) value not defined in all devices. |
| AnnaBridge | 145:64910690c574 | 586 | * @retval None |
| AnnaBridge | 145:64910690c574 | 587 | */ |
| AnnaBridge | 145:64910690c574 | 588 | __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs) |
| AnnaBridge | 145:64910690c574 | 589 | { |
| AnnaBridge | 145:64910690c574 | 590 | SET_BIT(DBGMCU->APB1FZ, Periphs); |
| AnnaBridge | 145:64910690c574 | 591 | } |
| AnnaBridge | 145:64910690c574 | 592 | |
| AnnaBridge | 145:64910690c574 | 593 | /** |
| AnnaBridge | 145:64910690c574 | 594 | * @brief Unfreeze APB1 peripherals (group1 peripherals) |
| AnnaBridge | 145:64910690c574 | 595 | * @rmtoll DBGMCU_APB1_FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 596 | * DBGMCU_APB1_FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 597 | * DBGMCU_APB1_FZ DBG_TIM4_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 598 | * DBGMCU_APB1_FZ DBG_TIM5_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 599 | * DBGMCU_APB1_FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 600 | * DBGMCU_APB1_FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 601 | * DBGMCU_APB1_FZ DBG_TIM12_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 602 | * DBGMCU_APB1_FZ DBG_TIM13_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 603 | * DBGMCU_APB1_FZ DBG_TIM14_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 604 | * DBGMCU_APB1_FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 605 | * DBGMCU_APB1_FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 606 | * DBGMCU_APB1_FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 607 | * DBGMCU_APB1_FZ DBG_I2C1_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 608 | * DBGMCU_APB1_FZ DBG_I2C2_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 609 | * DBGMCU_APB1_FZ DBG_I2C3_SMBUS_TIMEOUT LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 610 | * DBGMCU_APB1_FZ DBG_CAN1_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 611 | * DBGMCU_APB1_FZ DBG_CAN2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph |
| AnnaBridge | 145:64910690c574 | 612 | * @param Periphs This parameter can be a combination of the following values: |
| AnnaBridge | 145:64910690c574 | 613 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP |
| AnnaBridge | 145:64910690c574 | 614 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP |
| AnnaBridge | 145:64910690c574 | 615 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM4_STOP |
| AnnaBridge | 145:64910690c574 | 616 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM5_STOP |
| AnnaBridge | 145:64910690c574 | 617 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP |
| AnnaBridge | 145:64910690c574 | 618 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP |
| AnnaBridge | 145:64910690c574 | 619 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM12_STOP |
| AnnaBridge | 145:64910690c574 | 620 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM13_STOP |
| AnnaBridge | 145:64910690c574 | 621 | * @arg @ref LL_DBGMCU_APB1_GRP1_TIM14_STOP |
| AnnaBridge | 145:64910690c574 | 622 | * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP |
| AnnaBridge | 145:64910690c574 | 623 | * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP |
| AnnaBridge | 145:64910690c574 | 624 | * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP |
| AnnaBridge | 145:64910690c574 | 625 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP |
| AnnaBridge | 145:64910690c574 | 626 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP |
| AnnaBridge | 145:64910690c574 | 627 | * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP |
| AnnaBridge | 145:64910690c574 | 628 | * @arg @ref LL_DBGMCU_APB1_GRP1_CAN1_STOP |
| AnnaBridge | 145:64910690c574 | 629 | * @arg @ref LL_DBGMCU_APB1_GRP1_CAN2_STOP |
| AnnaBridge | 145:64910690c574 | 630 | * |
| AnnaBridge | 145:64910690c574 | 631 | * (*) value not defined in all devices. |
| AnnaBridge | 145:64910690c574 | 632 | * @retval None |
| AnnaBridge | 145:64910690c574 | 633 | */ |
| AnnaBridge | 145:64910690c574 | 634 | __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs) |
| AnnaBridge | 145:64910690c574 | 635 | { |
| AnnaBridge | 145:64910690c574 | 636 | CLEAR_BIT(DBGMCU->APB1FZ, Periphs); |
| AnnaBridge | 145:64910690c574 | 637 | } |
| AnnaBridge | 145:64910690c574 | 638 | |
| AnnaBridge | 145:64910690c574 | 639 | /** |
| AnnaBridge | 145:64910690c574 | 640 | * @brief Freeze APB2 peripherals |
| AnnaBridge | 145:64910690c574 | 641 | * @rmtoll DBGMCU_APB2_FZ DBG_TIM1_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 642 | * DBGMCU_APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 643 | * DBGMCU_APB2_FZ DBG_TIM9_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 644 | * DBGMCU_APB2_FZ DBG_TIM10_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 645 | * DBGMCU_APB2_FZ DBG_TIM11_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph |
| AnnaBridge | 145:64910690c574 | 646 | * @param Periphs This parameter can be a combination of the following values: |
| AnnaBridge | 145:64910690c574 | 647 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP |
| AnnaBridge | 145:64910690c574 | 648 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP |
| AnnaBridge | 145:64910690c574 | 649 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM9_STOP |
| AnnaBridge | 145:64910690c574 | 650 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM10_STOP |
| AnnaBridge | 145:64910690c574 | 651 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM11_STOP |
| AnnaBridge | 145:64910690c574 | 652 | * |
| AnnaBridge | 145:64910690c574 | 653 | * (*) value not defined in all devices. |
| AnnaBridge | 145:64910690c574 | 654 | * @retval None |
| AnnaBridge | 145:64910690c574 | 655 | */ |
| AnnaBridge | 145:64910690c574 | 656 | __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs) |
| AnnaBridge | 145:64910690c574 | 657 | { |
| AnnaBridge | 145:64910690c574 | 658 | SET_BIT(DBGMCU->APB2FZ, Periphs); |
| AnnaBridge | 145:64910690c574 | 659 | } |
| AnnaBridge | 145:64910690c574 | 660 | |
| AnnaBridge | 145:64910690c574 | 661 | /** |
| AnnaBridge | 145:64910690c574 | 662 | * @brief Unfreeze APB2 peripherals |
| AnnaBridge | 145:64910690c574 | 663 | * @rmtoll DBGMCU_APB2_FZ DBG_TIM1_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 664 | * DBGMCU_APB2_FZ DBG_TIM8_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 665 | * DBGMCU_APB2_FZ DBG_TIM9_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 666 | * DBGMCU_APB2_FZ DBG_TIM10_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n |
| AnnaBridge | 145:64910690c574 | 667 | * DBGMCU_APB2_FZ DBG_TIM11_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph |
| AnnaBridge | 145:64910690c574 | 668 | * @param Periphs This parameter can be a combination of the following values: |
| AnnaBridge | 145:64910690c574 | 669 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM1_STOP |
| AnnaBridge | 145:64910690c574 | 670 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM8_STOP |
| AnnaBridge | 145:64910690c574 | 671 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM9_STOP |
| AnnaBridge | 145:64910690c574 | 672 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM10_STOP |
| AnnaBridge | 145:64910690c574 | 673 | * @arg @ref LL_DBGMCU_APB2_GRP1_TIM11_STOP |
| AnnaBridge | 145:64910690c574 | 674 | * |
| AnnaBridge | 145:64910690c574 | 675 | * (*) value not defined in all devices. |
| AnnaBridge | 145:64910690c574 | 676 | * @retval None |
| AnnaBridge | 145:64910690c574 | 677 | */ |
| AnnaBridge | 145:64910690c574 | 678 | __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs) |
| AnnaBridge | 145:64910690c574 | 679 | { |
| AnnaBridge | 145:64910690c574 | 680 | CLEAR_BIT(DBGMCU->APB2FZ, Periphs); |
| AnnaBridge | 145:64910690c574 | 681 | } |
| AnnaBridge | 145:64910690c574 | 682 | /** |
| AnnaBridge | 145:64910690c574 | 683 | * @} |
| AnnaBridge | 145:64910690c574 | 684 | */ |
| AnnaBridge | 145:64910690c574 | 685 | |
| AnnaBridge | 145:64910690c574 | 686 | /** @defgroup SYSTEM_LL_EF_FLASH FLASH |
| AnnaBridge | 145:64910690c574 | 687 | * @{ |
| AnnaBridge | 145:64910690c574 | 688 | */ |
| AnnaBridge | 145:64910690c574 | 689 | |
| AnnaBridge | 145:64910690c574 | 690 | /** |
| AnnaBridge | 145:64910690c574 | 691 | * @brief Set FLASH Latency |
| AnnaBridge | 145:64910690c574 | 692 | * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency |
| AnnaBridge | 145:64910690c574 | 693 | * @param Latency This parameter can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 694 | * @arg @ref LL_FLASH_LATENCY_0 |
| AnnaBridge | 145:64910690c574 | 695 | * @arg @ref LL_FLASH_LATENCY_1 |
| AnnaBridge | 145:64910690c574 | 696 | * @arg @ref LL_FLASH_LATENCY_2 |
| AnnaBridge | 145:64910690c574 | 697 | * @arg @ref LL_FLASH_LATENCY_3 |
| AnnaBridge | 145:64910690c574 | 698 | * @arg @ref LL_FLASH_LATENCY_4 |
| AnnaBridge | 145:64910690c574 | 699 | * @arg @ref LL_FLASH_LATENCY_5 |
| AnnaBridge | 145:64910690c574 | 700 | * @arg @ref LL_FLASH_LATENCY_6 |
| AnnaBridge | 145:64910690c574 | 701 | * @arg @ref LL_FLASH_LATENCY_7 |
| AnnaBridge | 145:64910690c574 | 702 | * @retval None |
| AnnaBridge | 145:64910690c574 | 703 | */ |
| AnnaBridge | 145:64910690c574 | 704 | __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency) |
| AnnaBridge | 145:64910690c574 | 705 | { |
| AnnaBridge | 145:64910690c574 | 706 | MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency); |
| AnnaBridge | 145:64910690c574 | 707 | } |
| AnnaBridge | 145:64910690c574 | 708 | |
| AnnaBridge | 145:64910690c574 | 709 | /** |
| AnnaBridge | 145:64910690c574 | 710 | * @brief Get FLASH Latency |
| AnnaBridge | 145:64910690c574 | 711 | * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency |
| AnnaBridge | 145:64910690c574 | 712 | * @retval Returned value can be one of the following values: |
| AnnaBridge | 145:64910690c574 | 713 | * @arg @ref LL_FLASH_LATENCY_0 |
| AnnaBridge | 145:64910690c574 | 714 | * @arg @ref LL_FLASH_LATENCY_1 |
| AnnaBridge | 145:64910690c574 | 715 | * @arg @ref LL_FLASH_LATENCY_2 |
| AnnaBridge | 145:64910690c574 | 716 | * @arg @ref LL_FLASH_LATENCY_3 |
| AnnaBridge | 145:64910690c574 | 717 | * @arg @ref LL_FLASH_LATENCY_4 |
| AnnaBridge | 145:64910690c574 | 718 | * @arg @ref LL_FLASH_LATENCY_5 |
| AnnaBridge | 145:64910690c574 | 719 | * @arg @ref LL_FLASH_LATENCY_6 |
| AnnaBridge | 145:64910690c574 | 720 | * @arg @ref LL_FLASH_LATENCY_7 |
| AnnaBridge | 145:64910690c574 | 721 | */ |
| AnnaBridge | 145:64910690c574 | 722 | __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void) |
| AnnaBridge | 145:64910690c574 | 723 | { |
| AnnaBridge | 145:64910690c574 | 724 | return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY)); |
| AnnaBridge | 145:64910690c574 | 725 | } |
| AnnaBridge | 145:64910690c574 | 726 | |
| AnnaBridge | 145:64910690c574 | 727 | /** |
| AnnaBridge | 145:64910690c574 | 728 | * @brief Enable Prefetch |
| AnnaBridge | 145:64910690c574 | 729 | * @rmtoll FLASH_ACR PRFTEN LL_FLASH_EnablePrefetch |
| AnnaBridge | 145:64910690c574 | 730 | * @retval None |
| AnnaBridge | 145:64910690c574 | 731 | */ |
| AnnaBridge | 145:64910690c574 | 732 | __STATIC_INLINE void LL_FLASH_EnablePrefetch(void) |
| AnnaBridge | 145:64910690c574 | 733 | { |
| AnnaBridge | 145:64910690c574 | 734 | SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN); |
| AnnaBridge | 145:64910690c574 | 735 | } |
| AnnaBridge | 145:64910690c574 | 736 | |
| AnnaBridge | 145:64910690c574 | 737 | /** |
| AnnaBridge | 145:64910690c574 | 738 | * @brief Disable Prefetch |
| AnnaBridge | 145:64910690c574 | 739 | * @rmtoll FLASH_ACR PRFTEN LL_FLASH_DisablePrefetch |
| AnnaBridge | 145:64910690c574 | 740 | * @retval None |
| AnnaBridge | 145:64910690c574 | 741 | */ |
| AnnaBridge | 145:64910690c574 | 742 | __STATIC_INLINE void LL_FLASH_DisablePrefetch(void) |
| AnnaBridge | 145:64910690c574 | 743 | { |
| AnnaBridge | 145:64910690c574 | 744 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN); |
| AnnaBridge | 145:64910690c574 | 745 | } |
| AnnaBridge | 145:64910690c574 | 746 | |
| AnnaBridge | 145:64910690c574 | 747 | /** |
| AnnaBridge | 145:64910690c574 | 748 | * @brief Check if Prefetch buffer is enabled |
| AnnaBridge | 145:64910690c574 | 749 | * @rmtoll FLASH_ACR PRFTEN LL_FLASH_IsPrefetchEnabled |
| AnnaBridge | 145:64910690c574 | 750 | * @retval State of bit (1 or 0). |
| AnnaBridge | 145:64910690c574 | 751 | */ |
| AnnaBridge | 145:64910690c574 | 752 | __STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void) |
| AnnaBridge | 145:64910690c574 | 753 | { |
| AnnaBridge | 145:64910690c574 | 754 | return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN)); |
| AnnaBridge | 145:64910690c574 | 755 | } |
| AnnaBridge | 145:64910690c574 | 756 | |
| AnnaBridge | 145:64910690c574 | 757 | /** |
| AnnaBridge | 145:64910690c574 | 758 | * @brief Enable Instruction cache |
| AnnaBridge | 145:64910690c574 | 759 | * @rmtoll FLASH_ACR ICEN LL_FLASH_EnableInstCache |
| AnnaBridge | 145:64910690c574 | 760 | * @retval None |
| AnnaBridge | 145:64910690c574 | 761 | */ |
| AnnaBridge | 145:64910690c574 | 762 | __STATIC_INLINE void LL_FLASH_EnableInstCache(void) |
| AnnaBridge | 145:64910690c574 | 763 | { |
| AnnaBridge | 145:64910690c574 | 764 | SET_BIT(FLASH->ACR, FLASH_ACR_ICEN); |
| AnnaBridge | 145:64910690c574 | 765 | } |
| AnnaBridge | 145:64910690c574 | 766 | |
| AnnaBridge | 145:64910690c574 | 767 | /** |
| AnnaBridge | 145:64910690c574 | 768 | * @brief Disable Instruction cache |
| AnnaBridge | 145:64910690c574 | 769 | * @rmtoll FLASH_ACR ICEN LL_FLASH_DisableInstCache |
| AnnaBridge | 145:64910690c574 | 770 | * @retval None |
| AnnaBridge | 145:64910690c574 | 771 | */ |
| AnnaBridge | 145:64910690c574 | 772 | __STATIC_INLINE void LL_FLASH_DisableInstCache(void) |
| AnnaBridge | 145:64910690c574 | 773 | { |
| AnnaBridge | 145:64910690c574 | 774 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICEN); |
| AnnaBridge | 145:64910690c574 | 775 | } |
| AnnaBridge | 145:64910690c574 | 776 | |
| AnnaBridge | 145:64910690c574 | 777 | /** |
| AnnaBridge | 145:64910690c574 | 778 | * @brief Enable Data cache |
| AnnaBridge | 145:64910690c574 | 779 | * @rmtoll FLASH_ACR DCEN LL_FLASH_EnableDataCache |
| AnnaBridge | 145:64910690c574 | 780 | * @retval None |
| AnnaBridge | 145:64910690c574 | 781 | */ |
| AnnaBridge | 145:64910690c574 | 782 | __STATIC_INLINE void LL_FLASH_EnableDataCache(void) |
| AnnaBridge | 145:64910690c574 | 783 | { |
| AnnaBridge | 145:64910690c574 | 784 | SET_BIT(FLASH->ACR, FLASH_ACR_DCEN); |
| AnnaBridge | 145:64910690c574 | 785 | } |
| AnnaBridge | 145:64910690c574 | 786 | |
| AnnaBridge | 145:64910690c574 | 787 | /** |
| AnnaBridge | 145:64910690c574 | 788 | * @brief Disable Data cache |
| AnnaBridge | 145:64910690c574 | 789 | * @rmtoll FLASH_ACR DCEN LL_FLASH_DisableDataCache |
| AnnaBridge | 145:64910690c574 | 790 | * @retval None |
| AnnaBridge | 145:64910690c574 | 791 | */ |
| AnnaBridge | 145:64910690c574 | 792 | __STATIC_INLINE void LL_FLASH_DisableDataCache(void) |
| AnnaBridge | 145:64910690c574 | 793 | { |
| AnnaBridge | 145:64910690c574 | 794 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCEN); |
| AnnaBridge | 145:64910690c574 | 795 | } |
| AnnaBridge | 145:64910690c574 | 796 | |
| AnnaBridge | 145:64910690c574 | 797 | /** |
| AnnaBridge | 145:64910690c574 | 798 | * @brief Enable Instruction cache reset |
| AnnaBridge | 145:64910690c574 | 799 | * @note bit can be written only when the instruction cache is disabled |
| AnnaBridge | 145:64910690c574 | 800 | * @rmtoll FLASH_ACR ICRST LL_FLASH_EnableInstCacheReset |
| AnnaBridge | 145:64910690c574 | 801 | * @retval None |
| AnnaBridge | 145:64910690c574 | 802 | */ |
| AnnaBridge | 145:64910690c574 | 803 | __STATIC_INLINE void LL_FLASH_EnableInstCacheReset(void) |
| AnnaBridge | 145:64910690c574 | 804 | { |
| AnnaBridge | 145:64910690c574 | 805 | SET_BIT(FLASH->ACR, FLASH_ACR_ICRST); |
| AnnaBridge | 145:64910690c574 | 806 | } |
| AnnaBridge | 145:64910690c574 | 807 | |
| AnnaBridge | 145:64910690c574 | 808 | /** |
| AnnaBridge | 145:64910690c574 | 809 | * @brief Disable Instruction cache reset |
| AnnaBridge | 145:64910690c574 | 810 | * @rmtoll FLASH_ACR ICRST LL_FLASH_DisableInstCacheReset |
| AnnaBridge | 145:64910690c574 | 811 | * @retval None |
| AnnaBridge | 145:64910690c574 | 812 | */ |
| AnnaBridge | 145:64910690c574 | 813 | __STATIC_INLINE void LL_FLASH_DisableInstCacheReset(void) |
| AnnaBridge | 145:64910690c574 | 814 | { |
| AnnaBridge | 145:64910690c574 | 815 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_ICRST); |
| AnnaBridge | 145:64910690c574 | 816 | } |
| AnnaBridge | 145:64910690c574 | 817 | |
| AnnaBridge | 145:64910690c574 | 818 | /** |
| AnnaBridge | 145:64910690c574 | 819 | * @brief Enable Data cache reset |
| AnnaBridge | 145:64910690c574 | 820 | * @note bit can be written only when the data cache is disabled |
| AnnaBridge | 145:64910690c574 | 821 | * @rmtoll FLASH_ACR DCRST LL_FLASH_EnableDataCacheReset |
| AnnaBridge | 145:64910690c574 | 822 | * @retval None |
| AnnaBridge | 145:64910690c574 | 823 | */ |
| AnnaBridge | 145:64910690c574 | 824 | __STATIC_INLINE void LL_FLASH_EnableDataCacheReset(void) |
| AnnaBridge | 145:64910690c574 | 825 | { |
| AnnaBridge | 145:64910690c574 | 826 | SET_BIT(FLASH->ACR, FLASH_ACR_DCRST); |
| AnnaBridge | 145:64910690c574 | 827 | } |
| AnnaBridge | 145:64910690c574 | 828 | |
| AnnaBridge | 145:64910690c574 | 829 | /** |
| AnnaBridge | 145:64910690c574 | 830 | * @brief Disable Data cache reset |
| AnnaBridge | 145:64910690c574 | 831 | * @rmtoll FLASH_ACR DCRST LL_FLASH_DisableDataCacheReset |
| AnnaBridge | 145:64910690c574 | 832 | * @retval None |
| AnnaBridge | 145:64910690c574 | 833 | */ |
| AnnaBridge | 145:64910690c574 | 834 | __STATIC_INLINE void LL_FLASH_DisableDataCacheReset(void) |
| AnnaBridge | 145:64910690c574 | 835 | { |
| AnnaBridge | 145:64910690c574 | 836 | CLEAR_BIT(FLASH->ACR, FLASH_ACR_DCRST); |
| AnnaBridge | 145:64910690c574 | 837 | } |
| AnnaBridge | 145:64910690c574 | 838 | |
| AnnaBridge | 145:64910690c574 | 839 | |
| AnnaBridge | 145:64910690c574 | 840 | /** |
| AnnaBridge | 145:64910690c574 | 841 | * @} |
| AnnaBridge | 145:64910690c574 | 842 | */ |
| AnnaBridge | 145:64910690c574 | 843 | |
| AnnaBridge | 145:64910690c574 | 844 | /** |
| AnnaBridge | 145:64910690c574 | 845 | * @} |
| AnnaBridge | 145:64910690c574 | 846 | */ |
| AnnaBridge | 145:64910690c574 | 847 | |
| AnnaBridge | 145:64910690c574 | 848 | /** |
| AnnaBridge | 145:64910690c574 | 849 | * @} |
| AnnaBridge | 145:64910690c574 | 850 | */ |
| AnnaBridge | 145:64910690c574 | 851 | |
| AnnaBridge | 145:64910690c574 | 852 | #endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) */ |
| AnnaBridge | 145:64910690c574 | 853 | |
| AnnaBridge | 145:64910690c574 | 854 | /** |
| AnnaBridge | 145:64910690c574 | 855 | * @} |
| AnnaBridge | 145:64910690c574 | 856 | */ |
| AnnaBridge | 145:64910690c574 | 857 | |
| AnnaBridge | 145:64910690c574 | 858 | #ifdef __cplusplus |
| AnnaBridge | 145:64910690c574 | 859 | } |
| AnnaBridge | 145:64910690c574 | 860 | #endif |
| AnnaBridge | 145:64910690c574 | 861 | |
| AnnaBridge | 145:64910690c574 | 862 | #endif /* __STM32F2xx_LL_SYSTEM_H */ |
| AnnaBridge | 145:64910690c574 | 863 | |
| AnnaBridge | 145:64910690c574 | 864 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
