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TARGET_NUCLEO_F207ZG/TOOLCHAIN_GCC_ARM/stm32f2xx_hal_uart.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f2xx_hal_uart.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @version V1.2.1 |
| AnnaBridge | 171:3a7713b1edbc | 6 | * @date 14-April-2017 |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @brief Header file of UART HAL module. |
| AnnaBridge | 171:3a7713b1edbc | 8 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 9 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 12 | * |
| AnnaBridge | 171:3a7713b1edbc | 13 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 18 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 19 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 21 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 22 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 23 | * |
| AnnaBridge | 171:3a7713b1edbc | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 34 | * |
| AnnaBridge | 171:3a7713b1edbc | 35 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 36 | */ |
| AnnaBridge | 171:3a7713b1edbc | 37 | |
| AnnaBridge | 171:3a7713b1edbc | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 39 | #ifndef __STM32F2xx_HAL_UART_H |
| AnnaBridge | 171:3a7713b1edbc | 40 | #define __STM32F2xx_HAL_UART_H |
| AnnaBridge | 171:3a7713b1edbc | 41 | |
| AnnaBridge | 171:3a7713b1edbc | 42 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 43 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 44 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 45 | |
| AnnaBridge | 171:3a7713b1edbc | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 47 | #include "stm32f2xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 48 | |
| AnnaBridge | 171:3a7713b1edbc | 49 | /** @addtogroup STM32F2xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 50 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 51 | */ |
| AnnaBridge | 171:3a7713b1edbc | 52 | |
| AnnaBridge | 171:3a7713b1edbc | 53 | /** @addtogroup UART |
| AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 55 | */ |
| AnnaBridge | 171:3a7713b1edbc | 56 | |
| AnnaBridge | 171:3a7713b1edbc | 57 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 58 | /** @defgroup UART_Exported_Types UART Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 59 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 60 | */ |
| AnnaBridge | 171:3a7713b1edbc | 61 | |
| AnnaBridge | 171:3a7713b1edbc | 62 | /** |
| AnnaBridge | 171:3a7713b1edbc | 63 | * @brief UART Init Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 64 | */ |
| AnnaBridge | 171:3a7713b1edbc | 65 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 66 | { |
| AnnaBridge | 171:3a7713b1edbc | 67 | uint32_t BaudRate; /*!< This member configures the UART communication baud rate. |
| AnnaBridge | 171:3a7713b1edbc | 68 | The baud rate is computed using the following formula: |
| AnnaBridge | 171:3a7713b1edbc | 69 | - IntegerDivider = ((PCLKx) / (8 * (OVR8+1) * (huart->Init.BaudRate))) |
| AnnaBridge | 171:3a7713b1edbc | 70 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8 * (OVR8+1)) + 0.5 |
| AnnaBridge | 171:3a7713b1edbc | 71 | Where OVR8 is the "oversampling by 8 mode" configuration bit in the CR1 register. */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | |
| AnnaBridge | 171:3a7713b1edbc | 73 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| AnnaBridge | 171:3a7713b1edbc | 74 | This parameter can be a value of @ref UART_Word_Length */ |
| AnnaBridge | 171:3a7713b1edbc | 75 | |
| AnnaBridge | 171:3a7713b1edbc | 76 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
| AnnaBridge | 171:3a7713b1edbc | 77 | This parameter can be a value of @ref UART_Stop_Bits */ |
| AnnaBridge | 171:3a7713b1edbc | 78 | |
| AnnaBridge | 171:3a7713b1edbc | 79 | uint32_t Parity; /*!< Specifies the parity mode. |
| AnnaBridge | 171:3a7713b1edbc | 80 | This parameter can be a value of @ref UART_Parity |
| AnnaBridge | 171:3a7713b1edbc | 81 | @note When parity is enabled, the computed parity is inserted |
| AnnaBridge | 171:3a7713b1edbc | 82 | at the MSB position of the transmitted data (9th bit when |
| AnnaBridge | 171:3a7713b1edbc | 83 | the word length is set to 9 data bits; 8th bit when the |
| AnnaBridge | 171:3a7713b1edbc | 84 | word length is set to 8 data bits). */ |
| AnnaBridge | 171:3a7713b1edbc | 85 | |
| AnnaBridge | 171:3a7713b1edbc | 86 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
| AnnaBridge | 171:3a7713b1edbc | 87 | This parameter can be a value of @ref UART_Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 88 | |
| AnnaBridge | 171:3a7713b1edbc | 89 | uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled |
| AnnaBridge | 171:3a7713b1edbc | 90 | or disabled. |
| AnnaBridge | 171:3a7713b1edbc | 91 | This parameter can be a value of @ref UART_Hardware_Flow_Control */ |
| AnnaBridge | 171:3a7713b1edbc | 92 | |
| AnnaBridge | 171:3a7713b1edbc | 93 | uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to fPCLK/8). |
| AnnaBridge | 171:3a7713b1edbc | 94 | This parameter can be a value of @ref UART_Over_Sampling */ |
| AnnaBridge | 171:3a7713b1edbc | 95 | }UART_InitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 96 | |
| AnnaBridge | 171:3a7713b1edbc | 97 | /** |
| AnnaBridge | 171:3a7713b1edbc | 98 | * @brief HAL UART State structures definition |
| AnnaBridge | 171:3a7713b1edbc | 99 | * @note HAL UART State value is a combination of 2 different substates: gState and RxState. |
| AnnaBridge | 171:3a7713b1edbc | 100 | * - gState contains UART state information related to global Handle management |
| AnnaBridge | 171:3a7713b1edbc | 101 | * and also information related to Tx operations. |
| AnnaBridge | 171:3a7713b1edbc | 102 | * gState value coding follow below described bitmap : |
| AnnaBridge | 171:3a7713b1edbc | 103 | * b7-b6 Error information |
| AnnaBridge | 171:3a7713b1edbc | 104 | * 00 : No Error |
| AnnaBridge | 171:3a7713b1edbc | 105 | * 01 : (Not Used) |
| AnnaBridge | 171:3a7713b1edbc | 106 | * 10 : Timeout |
| AnnaBridge | 171:3a7713b1edbc | 107 | * 11 : Error |
| AnnaBridge | 171:3a7713b1edbc | 108 | * b5 IP initilisation status |
| AnnaBridge | 171:3a7713b1edbc | 109 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 171:3a7713b1edbc | 110 | * 1 : Init done (IP not initialized. HAL UART Init function already called) |
| AnnaBridge | 171:3a7713b1edbc | 111 | * b4-b3 (not used) |
| AnnaBridge | 171:3a7713b1edbc | 112 | * xx : Should be set to 00 |
| AnnaBridge | 171:3a7713b1edbc | 113 | * b2 Intrinsic process state |
| AnnaBridge | 171:3a7713b1edbc | 114 | * 0 : Ready |
| AnnaBridge | 171:3a7713b1edbc | 115 | * 1 : Busy (IP busy with some configuration or internal operations) |
| AnnaBridge | 171:3a7713b1edbc | 116 | * b1 (not used) |
| AnnaBridge | 171:3a7713b1edbc | 117 | * x : Should be set to 0 |
| AnnaBridge | 171:3a7713b1edbc | 118 | * b0 Tx state |
| AnnaBridge | 171:3a7713b1edbc | 119 | * 0 : Ready (no Tx operation ongoing) |
| AnnaBridge | 171:3a7713b1edbc | 120 | * 1 : Busy (Tx operation ongoing) |
| AnnaBridge | 171:3a7713b1edbc | 121 | * - RxState contains information related to Rx operations. |
| AnnaBridge | 171:3a7713b1edbc | 122 | * RxState value coding follow below described bitmap : |
| AnnaBridge | 171:3a7713b1edbc | 123 | * b7-b6 (not used) |
| AnnaBridge | 171:3a7713b1edbc | 124 | * xx : Should be set to 00 |
| AnnaBridge | 171:3a7713b1edbc | 125 | * b5 IP initilisation status |
| AnnaBridge | 171:3a7713b1edbc | 126 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 171:3a7713b1edbc | 127 | * 1 : Init done (IP not initialized) |
| AnnaBridge | 171:3a7713b1edbc | 128 | * b4-b2 (not used) |
| AnnaBridge | 171:3a7713b1edbc | 129 | * xxx : Should be set to 000 |
| AnnaBridge | 171:3a7713b1edbc | 130 | * b1 Rx state |
| AnnaBridge | 171:3a7713b1edbc | 131 | * 0 : Ready (no Rx operation ongoing) |
| AnnaBridge | 171:3a7713b1edbc | 132 | * 1 : Busy (Rx operation ongoing) |
| AnnaBridge | 171:3a7713b1edbc | 133 | * b0 (not used) |
| AnnaBridge | 171:3a7713b1edbc | 134 | * x : Should be set to 0. |
| AnnaBridge | 171:3a7713b1edbc | 135 | */ |
| AnnaBridge | 171:3a7713b1edbc | 136 | typedef enum |
| AnnaBridge | 171:3a7713b1edbc | 137 | { |
| AnnaBridge | 171:3a7713b1edbc | 138 | HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized |
| AnnaBridge | 171:3a7713b1edbc | 139 | Value is allowed for gState and RxState */ |
| AnnaBridge | 171:3a7713b1edbc | 140 | HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
| AnnaBridge | 171:3a7713b1edbc | 141 | Value is allowed for gState and RxState */ |
| AnnaBridge | 171:3a7713b1edbc | 142 | HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
| AnnaBridge | 171:3a7713b1edbc | 143 | Value is allowed for gState only */ |
| AnnaBridge | 171:3a7713b1edbc | 144 | HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
| AnnaBridge | 171:3a7713b1edbc | 145 | Value is allowed for gState only */ |
| AnnaBridge | 171:3a7713b1edbc | 146 | HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
| AnnaBridge | 171:3a7713b1edbc | 147 | Value is allowed for RxState only */ |
| AnnaBridge | 171:3a7713b1edbc | 148 | HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
| AnnaBridge | 171:3a7713b1edbc | 149 | Not to be used for neither gState nor RxState. |
| AnnaBridge | 171:3a7713b1edbc | 150 | Value is result of combination (Or) between gState and RxState values */ |
| AnnaBridge | 171:3a7713b1edbc | 151 | HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
| AnnaBridge | 171:3a7713b1edbc | 152 | Value is allowed for gState only */ |
| AnnaBridge | 171:3a7713b1edbc | 153 | HAL_UART_STATE_ERROR = 0xE0U /*!< Error |
| AnnaBridge | 171:3a7713b1edbc | 154 | Value is allowed for gState only */ |
| AnnaBridge | 171:3a7713b1edbc | 155 | }HAL_UART_StateTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 156 | |
| AnnaBridge | 171:3a7713b1edbc | 157 | /** |
| AnnaBridge | 171:3a7713b1edbc | 158 | * @brief UART handle Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 159 | */ |
| AnnaBridge | 171:3a7713b1edbc | 160 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 161 | { |
| AnnaBridge | 171:3a7713b1edbc | 162 | USART_TypeDef *Instance; /*!< UART registers base address */ |
| AnnaBridge | 171:3a7713b1edbc | 163 | |
| AnnaBridge | 171:3a7713b1edbc | 164 | UART_InitTypeDef Init; /*!< UART communication parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 165 | |
| AnnaBridge | 171:3a7713b1edbc | 166 | uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 167 | |
| AnnaBridge | 171:3a7713b1edbc | 168 | uint16_t TxXferSize; /*!< UART Tx Transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | |
| AnnaBridge | 171:3a7713b1edbc | 170 | __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */ |
| AnnaBridge | 171:3a7713b1edbc | 171 | |
| AnnaBridge | 171:3a7713b1edbc | 172 | uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | |
| AnnaBridge | 171:3a7713b1edbc | 174 | uint16_t RxXferSize; /*!< UART Rx Transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 175 | |
| AnnaBridge | 171:3a7713b1edbc | 176 | __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */ |
| AnnaBridge | 171:3a7713b1edbc | 177 | |
| AnnaBridge | 171:3a7713b1edbc | 178 | DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 179 | |
| AnnaBridge | 171:3a7713b1edbc | 180 | DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 181 | |
| AnnaBridge | 171:3a7713b1edbc | 182 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| AnnaBridge | 171:3a7713b1edbc | 183 | |
| AnnaBridge | 171:3a7713b1edbc | 184 | __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management |
| AnnaBridge | 171:3a7713b1edbc | 185 | and also related to Tx operations. |
| AnnaBridge | 171:3a7713b1edbc | 186 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
| AnnaBridge | 171:3a7713b1edbc | 187 | |
| AnnaBridge | 171:3a7713b1edbc | 188 | __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations. |
| AnnaBridge | 171:3a7713b1edbc | 189 | This parameter can be a value of @ref HAL_UART_StateTypeDef */ |
| AnnaBridge | 171:3a7713b1edbc | 190 | |
| AnnaBridge | 171:3a7713b1edbc | 191 | __IO uint32_t ErrorCode; /*!< UART Error code */ |
| AnnaBridge | 171:3a7713b1edbc | 192 | |
| AnnaBridge | 171:3a7713b1edbc | 193 | }UART_HandleTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 194 | /** |
| AnnaBridge | 171:3a7713b1edbc | 195 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 196 | */ |
| AnnaBridge | 171:3a7713b1edbc | 197 | |
| AnnaBridge | 171:3a7713b1edbc | 198 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 199 | /** @defgroup UART_Exported_Constants UART Exported constants |
| AnnaBridge | 171:3a7713b1edbc | 200 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 201 | */ |
| AnnaBridge | 171:3a7713b1edbc | 202 | |
| AnnaBridge | 171:3a7713b1edbc | 203 | /** @defgroup UART_Error_Code UART Error Code |
| AnnaBridge | 171:3a7713b1edbc | 204 | * @brief UART Error Code |
| AnnaBridge | 171:3a7713b1edbc | 205 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 206 | */ |
| AnnaBridge | 171:3a7713b1edbc | 207 | #define HAL_UART_ERROR_NONE 0x00000000U /*!< No error */ |
| AnnaBridge | 171:3a7713b1edbc | 208 | #define HAL_UART_ERROR_PE 0x00000001U /*!< Parity error */ |
| AnnaBridge | 171:3a7713b1edbc | 209 | #define HAL_UART_ERROR_NE 0x00000002U /*!< Noise error */ |
| AnnaBridge | 171:3a7713b1edbc | 210 | #define HAL_UART_ERROR_FE 0x00000004U /*!< Frame error */ |
| AnnaBridge | 171:3a7713b1edbc | 211 | #define HAL_UART_ERROR_ORE 0x00000008U /*!< Overrun error */ |
| AnnaBridge | 171:3a7713b1edbc | 212 | #define HAL_UART_ERROR_DMA 0x00000010U /*!< DMA transfer error */ |
| AnnaBridge | 171:3a7713b1edbc | 213 | /** |
| AnnaBridge | 171:3a7713b1edbc | 214 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 215 | */ |
| AnnaBridge | 171:3a7713b1edbc | 216 | |
| AnnaBridge | 171:3a7713b1edbc | 217 | /** @defgroup UART_Word_Length UART Word Length |
| AnnaBridge | 171:3a7713b1edbc | 218 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 219 | */ |
| AnnaBridge | 171:3a7713b1edbc | 220 | #define UART_WORDLENGTH_8B 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 221 | #define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
| AnnaBridge | 171:3a7713b1edbc | 222 | /** |
| AnnaBridge | 171:3a7713b1edbc | 223 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 224 | */ |
| AnnaBridge | 171:3a7713b1edbc | 225 | |
| AnnaBridge | 171:3a7713b1edbc | 226 | /** @defgroup UART_Stop_Bits UART Number of Stop Bits |
| AnnaBridge | 171:3a7713b1edbc | 227 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 228 | */ |
| AnnaBridge | 171:3a7713b1edbc | 229 | #define UART_STOPBITS_1 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 230 | #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
| AnnaBridge | 171:3a7713b1edbc | 231 | /** |
| AnnaBridge | 171:3a7713b1edbc | 232 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 233 | */ |
| AnnaBridge | 171:3a7713b1edbc | 234 | |
| AnnaBridge | 171:3a7713b1edbc | 235 | /** @defgroup UART_Parity UART Parity |
| AnnaBridge | 171:3a7713b1edbc | 236 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 237 | */ |
| AnnaBridge | 171:3a7713b1edbc | 238 | #define UART_PARITY_NONE 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 239 | #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
| AnnaBridge | 171:3a7713b1edbc | 240 | #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
| AnnaBridge | 171:3a7713b1edbc | 241 | /** |
| AnnaBridge | 171:3a7713b1edbc | 242 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 243 | */ |
| AnnaBridge | 171:3a7713b1edbc | 244 | |
| AnnaBridge | 171:3a7713b1edbc | 245 | /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control |
| AnnaBridge | 171:3a7713b1edbc | 246 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 247 | */ |
| AnnaBridge | 171:3a7713b1edbc | 248 | #define UART_HWCONTROL_NONE 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 249 | #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) |
| AnnaBridge | 171:3a7713b1edbc | 250 | #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) |
| AnnaBridge | 171:3a7713b1edbc | 251 | #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) |
| AnnaBridge | 171:3a7713b1edbc | 252 | /** |
| AnnaBridge | 171:3a7713b1edbc | 253 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 254 | */ |
| AnnaBridge | 171:3a7713b1edbc | 255 | |
| AnnaBridge | 171:3a7713b1edbc | 256 | /** @defgroup UART_Mode UART Transfer Mode |
| AnnaBridge | 171:3a7713b1edbc | 257 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 258 | */ |
| AnnaBridge | 171:3a7713b1edbc | 259 | #define UART_MODE_RX ((uint32_t)USART_CR1_RE) |
| AnnaBridge | 171:3a7713b1edbc | 260 | #define UART_MODE_TX ((uint32_t)USART_CR1_TE) |
| AnnaBridge | 171:3a7713b1edbc | 261 | #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
| AnnaBridge | 171:3a7713b1edbc | 262 | /** |
| AnnaBridge | 171:3a7713b1edbc | 263 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 264 | */ |
| AnnaBridge | 171:3a7713b1edbc | 265 | |
| AnnaBridge | 171:3a7713b1edbc | 266 | /** @defgroup UART_State UART State |
| AnnaBridge | 171:3a7713b1edbc | 267 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 268 | */ |
| AnnaBridge | 171:3a7713b1edbc | 269 | #define UART_STATE_DISABLE 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 270 | #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) |
| AnnaBridge | 171:3a7713b1edbc | 271 | /** |
| AnnaBridge | 171:3a7713b1edbc | 272 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 273 | */ |
| AnnaBridge | 171:3a7713b1edbc | 274 | |
| AnnaBridge | 171:3a7713b1edbc | 275 | /** @defgroup UART_Over_Sampling UART Over Sampling |
| AnnaBridge | 171:3a7713b1edbc | 276 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 277 | */ |
| AnnaBridge | 171:3a7713b1edbc | 278 | #define UART_OVERSAMPLING_16 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 279 | #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) |
| AnnaBridge | 171:3a7713b1edbc | 280 | /** |
| AnnaBridge | 171:3a7713b1edbc | 281 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 282 | */ |
| AnnaBridge | 171:3a7713b1edbc | 283 | |
| AnnaBridge | 171:3a7713b1edbc | 284 | /** @defgroup UART_LIN_Break_Detection_Length UART LIN Break Detection Length |
| AnnaBridge | 171:3a7713b1edbc | 285 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 286 | */ |
| AnnaBridge | 171:3a7713b1edbc | 287 | #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 288 | #define UART_LINBREAKDETECTLENGTH_11B 0x00000020U |
| AnnaBridge | 171:3a7713b1edbc | 289 | /** |
| AnnaBridge | 171:3a7713b1edbc | 290 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 291 | */ |
| AnnaBridge | 171:3a7713b1edbc | 292 | |
| AnnaBridge | 171:3a7713b1edbc | 293 | /** @defgroup UART_WakeUp_functions UART Wakeup Functions |
| AnnaBridge | 171:3a7713b1edbc | 294 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 295 | */ |
| AnnaBridge | 171:3a7713b1edbc | 296 | #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 297 | #define UART_WAKEUPMETHOD_ADDRESSMARK 0x00000800U |
| AnnaBridge | 171:3a7713b1edbc | 298 | /** |
| AnnaBridge | 171:3a7713b1edbc | 299 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 300 | */ |
| AnnaBridge | 171:3a7713b1edbc | 301 | |
| AnnaBridge | 171:3a7713b1edbc | 302 | /** @defgroup UART_Flags UART FLags |
| AnnaBridge | 171:3a7713b1edbc | 303 | * Elements values convention: 0xXXXX |
| AnnaBridge | 171:3a7713b1edbc | 304 | * - 0xXXXX : Flag mask in the SR register |
| AnnaBridge | 171:3a7713b1edbc | 305 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 306 | */ |
| AnnaBridge | 171:3a7713b1edbc | 307 | #define UART_FLAG_CTS ((uint32_t)USART_SR_CTS) |
| AnnaBridge | 171:3a7713b1edbc | 308 | #define UART_FLAG_LBD ((uint32_t)USART_SR_LBD) |
| AnnaBridge | 171:3a7713b1edbc | 309 | #define UART_FLAG_TXE ((uint32_t)USART_SR_TXE) |
| AnnaBridge | 171:3a7713b1edbc | 310 | #define UART_FLAG_TC ((uint32_t)USART_SR_TC) |
| AnnaBridge | 171:3a7713b1edbc | 311 | #define UART_FLAG_RXNE ((uint32_t)USART_SR_RXNE) |
| AnnaBridge | 171:3a7713b1edbc | 312 | #define UART_FLAG_IDLE ((uint32_t)USART_SR_IDLE) |
| AnnaBridge | 171:3a7713b1edbc | 313 | #define UART_FLAG_ORE ((uint32_t)USART_SR_ORE) |
| AnnaBridge | 171:3a7713b1edbc | 314 | #define UART_FLAG_NE ((uint32_t)USART_SR_NE) |
| AnnaBridge | 171:3a7713b1edbc | 315 | #define UART_FLAG_FE ((uint32_t)USART_SR_FE) |
| AnnaBridge | 171:3a7713b1edbc | 316 | #define UART_FLAG_PE ((uint32_t)USART_SR_PE) |
| AnnaBridge | 171:3a7713b1edbc | 317 | /** |
| AnnaBridge | 171:3a7713b1edbc | 318 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 319 | */ |
| AnnaBridge | 171:3a7713b1edbc | 320 | |
| AnnaBridge | 171:3a7713b1edbc | 321 | /** @defgroup UART_Interrupt_definition UART Interrupt Definitions |
| AnnaBridge | 171:3a7713b1edbc | 322 | * Elements values convention: 0xY000XXXX |
| AnnaBridge | 171:3a7713b1edbc | 323 | * - XXXX : Interrupt mask (16 bits) in the Y register |
| AnnaBridge | 171:3a7713b1edbc | 324 | * - Y : Interrupt source register (2bits) |
| AnnaBridge | 171:3a7713b1edbc | 325 | * - 0001: CR1 register |
| AnnaBridge | 171:3a7713b1edbc | 326 | * - 0010: CR2 register |
| AnnaBridge | 171:3a7713b1edbc | 327 | * - 0011: CR3 register |
| AnnaBridge | 171:3a7713b1edbc | 328 | * |
| AnnaBridge | 171:3a7713b1edbc | 329 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 330 | */ |
| AnnaBridge | 171:3a7713b1edbc | 331 | |
| AnnaBridge | 171:3a7713b1edbc | 332 | #define UART_IT_PE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_PEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 333 | #define UART_IT_TXE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TXEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 334 | #define UART_IT_TC ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_TCIE)) |
| AnnaBridge | 171:3a7713b1edbc | 335 | #define UART_IT_RXNE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_RXNEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 336 | #define UART_IT_IDLE ((uint32_t)(UART_CR1_REG_INDEX << 28U | USART_CR1_IDLEIE)) |
| AnnaBridge | 171:3a7713b1edbc | 337 | |
| AnnaBridge | 171:3a7713b1edbc | 338 | #define UART_IT_LBD ((uint32_t)(UART_CR2_REG_INDEX << 28U | USART_CR2_LBDIE)) |
| AnnaBridge | 171:3a7713b1edbc | 339 | |
| AnnaBridge | 171:3a7713b1edbc | 340 | #define UART_IT_CTS ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_CTSIE)) |
| AnnaBridge | 171:3a7713b1edbc | 341 | #define UART_IT_ERR ((uint32_t)(UART_CR3_REG_INDEX << 28U | USART_CR3_EIE)) |
| AnnaBridge | 171:3a7713b1edbc | 342 | /** |
| AnnaBridge | 171:3a7713b1edbc | 343 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 344 | */ |
| AnnaBridge | 171:3a7713b1edbc | 345 | |
| AnnaBridge | 171:3a7713b1edbc | 346 | /** |
| AnnaBridge | 171:3a7713b1edbc | 347 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 348 | */ |
| AnnaBridge | 171:3a7713b1edbc | 349 | |
| AnnaBridge | 171:3a7713b1edbc | 350 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 351 | /** @defgroup UART_Exported_Macros UART Exported Macros |
| AnnaBridge | 171:3a7713b1edbc | 352 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 353 | */ |
| AnnaBridge | 171:3a7713b1edbc | 354 | |
| AnnaBridge | 171:3a7713b1edbc | 355 | /** @brief Reset UART handle gstate & RxState |
| AnnaBridge | 171:3a7713b1edbc | 356 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 357 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 358 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 359 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 360 | */ |
| AnnaBridge | 171:3a7713b1edbc | 361 | #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 362 | (__HANDLE__)->gState = HAL_UART_STATE_RESET; \ |
| AnnaBridge | 171:3a7713b1edbc | 363 | (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \ |
| AnnaBridge | 171:3a7713b1edbc | 364 | } while(0U) |
| AnnaBridge | 171:3a7713b1edbc | 365 | |
| AnnaBridge | 171:3a7713b1edbc | 366 | /** @brief Flushes the UART DR register |
| AnnaBridge | 171:3a7713b1edbc | 367 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 368 | */ |
| AnnaBridge | 171:3a7713b1edbc | 369 | #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) ((__HANDLE__)->Instance->DR) |
| AnnaBridge | 171:3a7713b1edbc | 370 | |
| AnnaBridge | 171:3a7713b1edbc | 371 | /** @brief Checks whether the specified UART flag is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 372 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 373 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 374 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 375 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 171:3a7713b1edbc | 376 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 377 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5) |
| AnnaBridge | 171:3a7713b1edbc | 378 | * @arg UART_FLAG_LBD: LIN Break detection flag |
| AnnaBridge | 171:3a7713b1edbc | 379 | * @arg UART_FLAG_TXE: Transmit data register empty flag |
| AnnaBridge | 171:3a7713b1edbc | 380 | * @arg UART_FLAG_TC: Transmission Complete flag |
| AnnaBridge | 171:3a7713b1edbc | 381 | * @arg UART_FLAG_RXNE: Receive data register not empty flag |
| AnnaBridge | 171:3a7713b1edbc | 382 | * @arg UART_FLAG_IDLE: Idle Line detection flag |
| AnnaBridge | 171:3a7713b1edbc | 383 | * @arg UART_FLAG_ORE: Overrun Error flag |
| AnnaBridge | 171:3a7713b1edbc | 384 | * @arg UART_FLAG_NE: Noise Error flag |
| AnnaBridge | 171:3a7713b1edbc | 385 | * @arg UART_FLAG_FE: Framing Error flag |
| AnnaBridge | 171:3a7713b1edbc | 386 | * @arg UART_FLAG_PE: Parity Error flag |
| AnnaBridge | 171:3a7713b1edbc | 387 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 171:3a7713b1edbc | 388 | */ |
| AnnaBridge | 171:3a7713b1edbc | 389 | |
| AnnaBridge | 171:3a7713b1edbc | 390 | #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 391 | |
| AnnaBridge | 171:3a7713b1edbc | 392 | /** @brief Clears the specified UART pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 393 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 394 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 395 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 396 | * @param __FLAG__: specifies the flag to check. |
| AnnaBridge | 171:3a7713b1edbc | 397 | * This parameter can be any combination of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 398 | * @arg UART_FLAG_CTS: CTS Change flag (not available for UART4 and UART5). |
| AnnaBridge | 171:3a7713b1edbc | 399 | * @arg UART_FLAG_LBD: LIN Break detection flag. |
| AnnaBridge | 171:3a7713b1edbc | 400 | * @arg UART_FLAG_TC: Transmission Complete flag. |
| AnnaBridge | 171:3a7713b1edbc | 401 | * @arg UART_FLAG_RXNE: Receive data register not empty flag. |
| AnnaBridge | 171:3a7713b1edbc | 402 | * |
| AnnaBridge | 171:3a7713b1edbc | 403 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (Overrun |
| AnnaBridge | 171:3a7713b1edbc | 404 | * error) and IDLE (Idle line detected) flags are cleared by software |
| AnnaBridge | 171:3a7713b1edbc | 405 | * sequence: a read operation to USART_SR register followed by a read |
| AnnaBridge | 171:3a7713b1edbc | 406 | * operation to USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 407 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 408 | * @note TC flag can be also cleared by software sequence: a read operation to |
| AnnaBridge | 171:3a7713b1edbc | 409 | * USART_SR register followed by a write operation to USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 410 | * @note TXE flag is cleared only by a write to the USART_DR register. |
| AnnaBridge | 171:3a7713b1edbc | 411 | * |
| AnnaBridge | 171:3a7713b1edbc | 412 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 413 | */ |
| AnnaBridge | 171:3a7713b1edbc | 414 | #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) |
| AnnaBridge | 171:3a7713b1edbc | 415 | |
| AnnaBridge | 171:3a7713b1edbc | 416 | /** @brief Clear the UART PE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 417 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 418 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 419 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 420 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 421 | */ |
| AnnaBridge | 171:3a7713b1edbc | 422 | #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 423 | do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 424 | __IO uint32_t tmpreg_pe = 0x00U; \ |
| AnnaBridge | 171:3a7713b1edbc | 425 | tmpreg_pe = (__HANDLE__)->Instance->SR; \ |
| AnnaBridge | 171:3a7713b1edbc | 426 | tmpreg_pe = (__HANDLE__)->Instance->DR; \ |
| AnnaBridge | 171:3a7713b1edbc | 427 | UNUSED(tmpreg_pe); \ |
| AnnaBridge | 171:3a7713b1edbc | 428 | } while(0) |
| AnnaBridge | 171:3a7713b1edbc | 429 | |
| AnnaBridge | 171:3a7713b1edbc | 430 | /** @brief Clear the UART FE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 431 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 432 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 433 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 434 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 435 | */ |
| AnnaBridge | 171:3a7713b1edbc | 436 | #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 437 | |
| AnnaBridge | 171:3a7713b1edbc | 438 | /** @brief Clear the UART NE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 439 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 440 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 441 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 442 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 443 | */ |
| AnnaBridge | 171:3a7713b1edbc | 444 | #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 445 | |
| AnnaBridge | 171:3a7713b1edbc | 446 | /** @brief Clear the UART ORE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 447 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 448 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 449 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 450 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 451 | */ |
| AnnaBridge | 171:3a7713b1edbc | 452 | #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 453 | |
| AnnaBridge | 171:3a7713b1edbc | 454 | /** @brief Clear the UART IDLE pending flag. |
| AnnaBridge | 171:3a7713b1edbc | 455 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 456 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 457 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 458 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 459 | */ |
| AnnaBridge | 171:3a7713b1edbc | 460 | #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_PEFLAG(__HANDLE__) |
| AnnaBridge | 171:3a7713b1edbc | 461 | |
| AnnaBridge | 171:3a7713b1edbc | 462 | /** @brief Enable the specified UART interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 463 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 464 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 465 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 466 | * @param __INTERRUPT__: specifies the UART interrupt source to enable. |
| AnnaBridge | 171:3a7713b1edbc | 467 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 468 | * @arg UART_IT_CTS: CTS change interrupt |
| AnnaBridge | 171:3a7713b1edbc | 469 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 470 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 471 | * @arg UART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 171:3a7713b1edbc | 472 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 473 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 474 | * @arg UART_IT_PE: Parity Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 475 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 171:3a7713b1edbc | 476 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 477 | */ |
| AnnaBridge | 171:3a7713b1edbc | 478 | #define UART_IT_MASK 0x0000FFFFU |
| AnnaBridge | 171:3a7713b1edbc | 479 | #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 480 | (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 481 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & UART_IT_MASK))) |
| AnnaBridge | 171:3a7713b1edbc | 482 | /** @brief Disable the specified UART interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 483 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 484 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 485 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 486 | * @param __INTERRUPT__: specifies the UART interrupt source to disable. |
| AnnaBridge | 171:3a7713b1edbc | 487 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 488 | * @arg UART_IT_CTS: CTS change interrupt |
| AnnaBridge | 171:3a7713b1edbc | 489 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 490 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 491 | * @arg UART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 171:3a7713b1edbc | 492 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 493 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 494 | * @arg UART_IT_PE: Parity Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 495 | * @arg UART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 171:3a7713b1edbc | 496 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 497 | */ |
| AnnaBridge | 171:3a7713b1edbc | 498 | #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 499 | (((__INTERRUPT__) >> 28U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ |
| AnnaBridge | 171:3a7713b1edbc | 500 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) |
| AnnaBridge | 171:3a7713b1edbc | 501 | |
| AnnaBridge | 171:3a7713b1edbc | 502 | /** @brief Checks whether the specified UART interrupt has occurred or not. |
| AnnaBridge | 171:3a7713b1edbc | 503 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 504 | * This parameter can be UARTx where x: 1, 2, 3, 4, 5, 6, 7 or 8 to select the USART or |
| AnnaBridge | 171:3a7713b1edbc | 505 | * UART peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 506 | * @param __IT__: specifies the UART interrupt source to check. |
| AnnaBridge | 171:3a7713b1edbc | 507 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 508 | * @arg UART_IT_CTS: CTS change interrupt (not available for UART4 and UART5) |
| AnnaBridge | 171:3a7713b1edbc | 509 | * @arg UART_IT_LBD: LIN Break detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 510 | * @arg UART_IT_TXE: Transmit Data Register empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 511 | * @arg UART_IT_TC: Transmission complete interrupt |
| AnnaBridge | 171:3a7713b1edbc | 512 | * @arg UART_IT_RXNE: Receive Data register not empty interrupt |
| AnnaBridge | 171:3a7713b1edbc | 513 | * @arg UART_IT_IDLE: Idle line detection interrupt |
| AnnaBridge | 171:3a7713b1edbc | 514 | * @arg USART_IT_ERR: Error interrupt |
| AnnaBridge | 171:3a7713b1edbc | 515 | * @retval The new state of __IT__ (TRUE or FALSE). |
| AnnaBridge | 171:3a7713b1edbc | 516 | */ |
| AnnaBridge | 171:3a7713b1edbc | 517 | #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28U) == 2U)? \ |
| AnnaBridge | 171:3a7713b1edbc | 518 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & UART_IT_MASK)) |
| AnnaBridge | 171:3a7713b1edbc | 519 | |
| AnnaBridge | 171:3a7713b1edbc | 520 | /** @brief Enable CTS flow control |
| AnnaBridge | 171:3a7713b1edbc | 521 | * This macro allows to enable CTS hardware flow control for a given UART instance, |
| AnnaBridge | 171:3a7713b1edbc | 522 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 171:3a7713b1edbc | 523 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 171:3a7713b1edbc | 524 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
| AnnaBridge | 171:3a7713b1edbc | 525 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 171:3a7713b1edbc | 526 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 171:3a7713b1edbc | 527 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 171:3a7713b1edbc | 528 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 171:3a7713b1edbc | 529 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 530 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 171:3a7713b1edbc | 531 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 532 | */ |
| AnnaBridge | 171:3a7713b1edbc | 533 | #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 534 | do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 535 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
| AnnaBridge | 171:3a7713b1edbc | 536 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \ |
| AnnaBridge | 171:3a7713b1edbc | 537 | } while(0U) |
| AnnaBridge | 171:3a7713b1edbc | 538 | |
| AnnaBridge | 171:3a7713b1edbc | 539 | /** @brief Disable CTS flow control |
| AnnaBridge | 171:3a7713b1edbc | 540 | * This macro allows to disable CTS hardware flow control for a given UART instance, |
| AnnaBridge | 171:3a7713b1edbc | 541 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 171:3a7713b1edbc | 542 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 171:3a7713b1edbc | 543 | * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need |
| AnnaBridge | 171:3a7713b1edbc | 544 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 171:3a7713b1edbc | 545 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 171:3a7713b1edbc | 546 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 171:3a7713b1edbc | 547 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 171:3a7713b1edbc | 548 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 549 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 171:3a7713b1edbc | 550 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 551 | */ |
| AnnaBridge | 171:3a7713b1edbc | 552 | #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 553 | do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 554 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \ |
| AnnaBridge | 171:3a7713b1edbc | 555 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \ |
| AnnaBridge | 171:3a7713b1edbc | 556 | } while(0U) |
| AnnaBridge | 171:3a7713b1edbc | 557 | |
| AnnaBridge | 171:3a7713b1edbc | 558 | /** @brief Enable RTS flow control |
| AnnaBridge | 171:3a7713b1edbc | 559 | * This macro allows to enable RTS hardware flow control for a given UART instance, |
| AnnaBridge | 171:3a7713b1edbc | 560 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 171:3a7713b1edbc | 561 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 171:3a7713b1edbc | 562 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
| AnnaBridge | 171:3a7713b1edbc | 563 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 171:3a7713b1edbc | 564 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 171:3a7713b1edbc | 565 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 171:3a7713b1edbc | 566 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 171:3a7713b1edbc | 567 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 568 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 171:3a7713b1edbc | 569 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 570 | */ |
| AnnaBridge | 171:3a7713b1edbc | 571 | #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 572 | do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 573 | SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \ |
| AnnaBridge | 171:3a7713b1edbc | 574 | (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \ |
| AnnaBridge | 171:3a7713b1edbc | 575 | } while(0U) |
| AnnaBridge | 171:3a7713b1edbc | 576 | |
| AnnaBridge | 171:3a7713b1edbc | 577 | /** @brief Disable RTS flow control |
| AnnaBridge | 171:3a7713b1edbc | 578 | * This macro allows to disable RTS hardware flow control for a given UART instance, |
| AnnaBridge | 171:3a7713b1edbc | 579 | * without need to call HAL_UART_Init() function. |
| AnnaBridge | 171:3a7713b1edbc | 580 | * As involving direct access to UART registers, usage of this macro should be fully endorsed by user. |
| AnnaBridge | 171:3a7713b1edbc | 581 | * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need |
| AnnaBridge | 171:3a7713b1edbc | 582 | * for USART instance Deinit/Init, following conditions for macro call should be fulfilled : |
| AnnaBridge | 171:3a7713b1edbc | 583 | * - UART instance should have already been initialised (through call of HAL_UART_Init() ) |
| AnnaBridge | 171:3a7713b1edbc | 584 | * - macro could only be called when corresponding UART instance is disabled (i.e __HAL_UART_DISABLE(__HANDLE__)) |
| AnnaBridge | 171:3a7713b1edbc | 585 | * and should be followed by an Enable macro (i.e __HAL_UART_ENABLE(__HANDLE__)). |
| AnnaBridge | 171:3a7713b1edbc | 586 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 587 | * The Handle Instance can be USART1, USART2 or LPUART. |
| AnnaBridge | 171:3a7713b1edbc | 588 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 589 | */ |
| AnnaBridge | 171:3a7713b1edbc | 590 | #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 591 | do{ \ |
| AnnaBridge | 171:3a7713b1edbc | 592 | CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\ |
| AnnaBridge | 171:3a7713b1edbc | 593 | (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \ |
| AnnaBridge | 171:3a7713b1edbc | 594 | } while(0U) |
| AnnaBridge | 171:3a7713b1edbc | 595 | |
| AnnaBridge | 171:3a7713b1edbc | 596 | /** @brief macros to enables the UART's one bit sample method |
| AnnaBridge | 171:3a7713b1edbc | 597 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 598 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 599 | */ |
| AnnaBridge | 171:3a7713b1edbc | 600 | #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
| AnnaBridge | 171:3a7713b1edbc | 601 | |
| AnnaBridge | 171:3a7713b1edbc | 602 | /** @brief macros to disables the UART's one bit sample method |
| AnnaBridge | 171:3a7713b1edbc | 603 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 604 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 605 | */ |
| AnnaBridge | 171:3a7713b1edbc | 606 | #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint16_t)~((uint16_t)USART_CR3_ONEBIT)) |
| AnnaBridge | 171:3a7713b1edbc | 607 | |
| AnnaBridge | 171:3a7713b1edbc | 608 | /** @brief Enable UART |
| AnnaBridge | 171:3a7713b1edbc | 609 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 610 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 611 | */ |
| AnnaBridge | 171:3a7713b1edbc | 612 | #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| AnnaBridge | 171:3a7713b1edbc | 613 | |
| AnnaBridge | 171:3a7713b1edbc | 614 | /** @brief Disable UART |
| AnnaBridge | 171:3a7713b1edbc | 615 | * @param __HANDLE__: specifies the UART Handle. |
| AnnaBridge | 171:3a7713b1edbc | 616 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 617 | */ |
| AnnaBridge | 171:3a7713b1edbc | 618 | #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| AnnaBridge | 171:3a7713b1edbc | 619 | /** |
| AnnaBridge | 171:3a7713b1edbc | 620 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 621 | */ |
| AnnaBridge | 171:3a7713b1edbc | 622 | |
| AnnaBridge | 171:3a7713b1edbc | 623 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 624 | /** @addtogroup UART_Exported_Functions |
| AnnaBridge | 171:3a7713b1edbc | 625 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 626 | */ |
| AnnaBridge | 171:3a7713b1edbc | 627 | |
| AnnaBridge | 171:3a7713b1edbc | 628 | /** @addtogroup UART_Exported_Functions_Group1 |
| AnnaBridge | 171:3a7713b1edbc | 629 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 630 | */ |
| AnnaBridge | 171:3a7713b1edbc | 631 | /* Initialization/de-initialization functions **********************************/ |
| AnnaBridge | 171:3a7713b1edbc | 632 | HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 633 | HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 634 | HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength); |
| AnnaBridge | 171:3a7713b1edbc | 635 | HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod); |
| AnnaBridge | 171:3a7713b1edbc | 636 | HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 637 | void HAL_UART_MspInit(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 638 | void HAL_UART_MspDeInit(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 639 | /** |
| AnnaBridge | 171:3a7713b1edbc | 640 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 641 | */ |
| AnnaBridge | 171:3a7713b1edbc | 642 | |
| AnnaBridge | 171:3a7713b1edbc | 643 | /** @addtogroup UART_Exported_Functions_Group2 |
| AnnaBridge | 171:3a7713b1edbc | 644 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 645 | */ |
| AnnaBridge | 171:3a7713b1edbc | 646 | /* IO operation functions *******************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 647 | HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 648 | HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 649 | HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 650 | HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 651 | HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 652 | HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 653 | HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 654 | HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 655 | HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 656 | /* Transfer Abort functions */ |
| AnnaBridge | 171:3a7713b1edbc | 657 | HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 658 | HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 659 | HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 660 | HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 661 | HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 662 | HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 663 | |
| AnnaBridge | 171:3a7713b1edbc | 664 | void HAL_UART_IRQHandler(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 665 | void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 666 | void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 667 | void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 668 | void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 669 | void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 670 | void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 671 | void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 672 | void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 673 | /** |
| AnnaBridge | 171:3a7713b1edbc | 674 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 675 | */ |
| AnnaBridge | 171:3a7713b1edbc | 676 | |
| AnnaBridge | 171:3a7713b1edbc | 677 | /** @addtogroup UART_Exported_Functions_Group3 |
| AnnaBridge | 171:3a7713b1edbc | 678 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 679 | */ |
| AnnaBridge | 171:3a7713b1edbc | 680 | /* Peripheral Control functions ************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 681 | HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 682 | HAL_StatusTypeDef HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 683 | HAL_StatusTypeDef HAL_MultiProcessor_ExitMuteMode(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 684 | HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 685 | HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 686 | /** |
| AnnaBridge | 171:3a7713b1edbc | 687 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 688 | */ |
| AnnaBridge | 171:3a7713b1edbc | 689 | |
| AnnaBridge | 171:3a7713b1edbc | 690 | /** @addtogroup UART_Exported_Functions_Group4 |
| AnnaBridge | 171:3a7713b1edbc | 691 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 692 | */ |
| AnnaBridge | 171:3a7713b1edbc | 693 | /* Peripheral State functions **************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 694 | HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 695 | uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart); |
| AnnaBridge | 171:3a7713b1edbc | 696 | /** |
| AnnaBridge | 171:3a7713b1edbc | 697 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 698 | */ |
| AnnaBridge | 171:3a7713b1edbc | 699 | |
| AnnaBridge | 171:3a7713b1edbc | 700 | /** |
| AnnaBridge | 171:3a7713b1edbc | 701 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 702 | */ |
| AnnaBridge | 171:3a7713b1edbc | 703 | /* Private types -------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 704 | /* Private variables ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 705 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 706 | /** @defgroup UART_Private_Constants UART Private Constants |
| AnnaBridge | 171:3a7713b1edbc | 707 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 708 | */ |
| AnnaBridge | 171:3a7713b1edbc | 709 | /** @brief UART interruptions flag mask |
| AnnaBridge | 171:3a7713b1edbc | 710 | * |
| AnnaBridge | 171:3a7713b1edbc | 711 | */ |
| AnnaBridge | 171:3a7713b1edbc | 712 | #define UART_CR1_REG_INDEX 1U |
| AnnaBridge | 171:3a7713b1edbc | 713 | #define UART_CR2_REG_INDEX 2U |
| AnnaBridge | 171:3a7713b1edbc | 714 | #define UART_CR3_REG_INDEX 3U |
| AnnaBridge | 171:3a7713b1edbc | 715 | /** |
| AnnaBridge | 171:3a7713b1edbc | 716 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 717 | */ |
| AnnaBridge | 171:3a7713b1edbc | 718 | |
| AnnaBridge | 171:3a7713b1edbc | 719 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 720 | /** @defgroup UART_Private_Macros UART Private Macros |
| AnnaBridge | 171:3a7713b1edbc | 721 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 722 | */ |
| AnnaBridge | 171:3a7713b1edbc | 723 | #define IS_UART_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B) || \ |
| AnnaBridge | 171:3a7713b1edbc | 724 | ((LENGTH) == UART_WORDLENGTH_9B)) |
| AnnaBridge | 171:3a7713b1edbc | 725 | #define IS_UART_LIN_WORD_LENGTH(LENGTH) (((LENGTH) == UART_WORDLENGTH_8B)) |
| AnnaBridge | 171:3a7713b1edbc | 726 | #define IS_UART_STOPBITS(STOPBITS) (((STOPBITS) == UART_STOPBITS_1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 727 | ((STOPBITS) == UART_STOPBITS_2)) |
| AnnaBridge | 171:3a7713b1edbc | 728 | #define IS_UART_PARITY(PARITY) (((PARITY) == UART_PARITY_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 729 | ((PARITY) == UART_PARITY_EVEN) || \ |
| AnnaBridge | 171:3a7713b1edbc | 730 | ((PARITY) == UART_PARITY_ODD)) |
| AnnaBridge | 171:3a7713b1edbc | 731 | #define IS_UART_HARDWARE_FLOW_CONTROL(CONTROL)\ |
| AnnaBridge | 171:3a7713b1edbc | 732 | (((CONTROL) == UART_HWCONTROL_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 733 | ((CONTROL) == UART_HWCONTROL_RTS) || \ |
| AnnaBridge | 171:3a7713b1edbc | 734 | ((CONTROL) == UART_HWCONTROL_CTS) || \ |
| AnnaBridge | 171:3a7713b1edbc | 735 | ((CONTROL) == UART_HWCONTROL_RTS_CTS)) |
| AnnaBridge | 171:3a7713b1edbc | 736 | #define IS_UART_MODE(MODE) ((((MODE) & 0x0000FFF3U) == 0x00U) && ((MODE) != 0x00U)) |
| AnnaBridge | 171:3a7713b1edbc | 737 | #define IS_UART_STATE(STATE) (((STATE) == UART_STATE_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 738 | ((STATE) == UART_STATE_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 739 | #define IS_UART_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16) || \ |
| AnnaBridge | 171:3a7713b1edbc | 740 | ((SAMPLING) == UART_OVERSAMPLING_8)) |
| AnnaBridge | 171:3a7713b1edbc | 741 | #define IS_UART_LIN_OVERSAMPLING(SAMPLING) (((SAMPLING) == UART_OVERSAMPLING_16)) |
| AnnaBridge | 171:3a7713b1edbc | 742 | #define IS_UART_LIN_BREAK_DETECT_LENGTH(LENGTH) (((LENGTH) == UART_LINBREAKDETECTLENGTH_10B) || \ |
| AnnaBridge | 171:3a7713b1edbc | 743 | ((LENGTH) == UART_LINBREAKDETECTLENGTH_11B)) |
| AnnaBridge | 171:3a7713b1edbc | 744 | #define IS_UART_WAKEUPMETHOD(WAKEUP) (((WAKEUP) == UART_WAKEUPMETHOD_IDLELINE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 745 | ((WAKEUP) == UART_WAKEUPMETHOD_ADDRESSMARK)) |
| AnnaBridge | 171:3a7713b1edbc | 746 | #define IS_UART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001U) |
| AnnaBridge | 171:3a7713b1edbc | 747 | #define IS_UART_ADDRESS(ADDRESS) ((ADDRESS) <= 0x0FU) |
| AnnaBridge | 171:3a7713b1edbc | 748 | |
| AnnaBridge | 171:3a7713b1edbc | 749 | #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) |
| AnnaBridge | 171:3a7713b1edbc | 750 | #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) |
| AnnaBridge | 171:3a7713b1edbc | 751 | #define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) |
| AnnaBridge | 171:3a7713b1edbc | 752 | /* UART BRR = mantissa + overflow + fraction |
| AnnaBridge | 171:3a7713b1edbc | 753 | = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ |
| AnnaBridge | 171:3a7713b1edbc | 754 | #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ |
| AnnaBridge | 171:3a7713b1edbc | 755 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0xF0U)) + \ |
| AnnaBridge | 171:3a7713b1edbc | 756 | (UART_DIVFRAQ_SAMPLING16((_PCLK_), (_BAUD_)) & 0x0FU)) |
| AnnaBridge | 171:3a7713b1edbc | 757 | |
| AnnaBridge | 171:3a7713b1edbc | 758 | #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) |
| AnnaBridge | 171:3a7713b1edbc | 759 | #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) |
| AnnaBridge | 171:3a7713b1edbc | 760 | #define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) |
| AnnaBridge | 171:3a7713b1edbc | 761 | /* UART BRR = mantissa + overflow + fraction |
| AnnaBridge | 171:3a7713b1edbc | 762 | = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ |
| AnnaBridge | 171:3a7713b1edbc | 763 | #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \ |
| AnnaBridge | 171:3a7713b1edbc | 764 | ((UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0xF8U) << 1U)) + \ |
| AnnaBridge | 171:3a7713b1edbc | 765 | (UART_DIVFRAQ_SAMPLING8((_PCLK_), (_BAUD_)) & 0x07U)) |
| AnnaBridge | 171:3a7713b1edbc | 766 | |
| AnnaBridge | 171:3a7713b1edbc | 767 | /** |
| AnnaBridge | 171:3a7713b1edbc | 768 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 769 | */ |
| AnnaBridge | 171:3a7713b1edbc | 770 | |
| AnnaBridge | 171:3a7713b1edbc | 771 | /* Private functions ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 772 | /** @defgroup UART_Private_Functions UART Private Functions |
| AnnaBridge | 171:3a7713b1edbc | 773 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 774 | */ |
| AnnaBridge | 171:3a7713b1edbc | 775 | |
| AnnaBridge | 171:3a7713b1edbc | 776 | /** |
| AnnaBridge | 171:3a7713b1edbc | 777 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 778 | */ |
| AnnaBridge | 171:3a7713b1edbc | 779 | |
| AnnaBridge | 171:3a7713b1edbc | 780 | /** |
| AnnaBridge | 171:3a7713b1edbc | 781 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 782 | */ |
| AnnaBridge | 171:3a7713b1edbc | 783 | |
| AnnaBridge | 171:3a7713b1edbc | 784 | /** |
| AnnaBridge | 171:3a7713b1edbc | 785 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 786 | */ |
| AnnaBridge | 171:3a7713b1edbc | 787 | |
| AnnaBridge | 171:3a7713b1edbc | 788 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 789 | } |
| AnnaBridge | 171:3a7713b1edbc | 790 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 791 | |
| AnnaBridge | 171:3a7713b1edbc | 792 | #endif /* __STM32F2xx_HAL_UART_H */ |
| AnnaBridge | 171:3a7713b1edbc | 793 | |
| AnnaBridge | 171:3a7713b1edbc | 794 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
