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TARGET_NUCLEO_F207ZG/TOOLCHAIN_GCC_ARM/stm32f2xx_hal_tim_ex.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f2xx_hal_tim_ex.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @version V1.2.1
AnnaBridge 171:3a7713b1edbc 6 * @date 14-April-2017
AnnaBridge 171:3a7713b1edbc 7 * @brief Header file of TIM HAL Extension module.
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 * @attention
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 12 *
AnnaBridge 171:3a7713b1edbc 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 14 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 19 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 21 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 22 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 23 *
AnnaBridge 171:3a7713b1edbc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 34 *
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 36 */
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 39 #ifndef __STM32F2xx_HAL_TIM_EX_H
AnnaBridge 171:3a7713b1edbc 40 #define __STM32F2xx_HAL_TIM_EX_H
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 #include "stm32f2xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /** @addtogroup STM32F2xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 50 * @{
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @addtogroup TIMEx
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /** @defgroup TIMEx_Exported_Types TIM Exported Types
AnnaBridge 171:3a7713b1edbc 59 * @{
AnnaBridge 171:3a7713b1edbc 60 */
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /**
AnnaBridge 171:3a7713b1edbc 63 * @brief TIM Hall sensor Configuration Structure definition
AnnaBridge 171:3a7713b1edbc 64 */
AnnaBridge 171:3a7713b1edbc 65
AnnaBridge 171:3a7713b1edbc 66 typedef struct
AnnaBridge 171:3a7713b1edbc 67 {
AnnaBridge 171:3a7713b1edbc 68
AnnaBridge 171:3a7713b1edbc 69 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
AnnaBridge 171:3a7713b1edbc 70 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
AnnaBridge 171:3a7713b1edbc 71
AnnaBridge 171:3a7713b1edbc 72 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
AnnaBridge 171:3a7713b1edbc 73 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 uint32_t IC1Filter; /*!< Specifies the input capture filter.
AnnaBridge 171:3a7713b1edbc 76 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
AnnaBridge 171:3a7713b1edbc 77 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
AnnaBridge 171:3a7713b1edbc 78 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
AnnaBridge 171:3a7713b1edbc 79 } TIM_HallSensor_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 /**
AnnaBridge 171:3a7713b1edbc 82 * @brief TIM Master configuration Structure definition
AnnaBridge 171:3a7713b1edbc 83 */
AnnaBridge 171:3a7713b1edbc 84 typedef struct {
AnnaBridge 171:3a7713b1edbc 85 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
AnnaBridge 171:3a7713b1edbc 86 This parameter can be a value of @ref TIM_Master_Mode_Selection */
AnnaBridge 171:3a7713b1edbc 87 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
AnnaBridge 171:3a7713b1edbc 88 This parameter can be a value of @ref TIM_Master_Slave_Mode */
AnnaBridge 171:3a7713b1edbc 89 }TIM_MasterConfigTypeDef;
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 /**
AnnaBridge 171:3a7713b1edbc 92 * @brief TIM Break and Dead time configuration Structure definition
AnnaBridge 171:3a7713b1edbc 93 */
AnnaBridge 171:3a7713b1edbc 94 typedef struct
AnnaBridge 171:3a7713b1edbc 95 {
AnnaBridge 171:3a7713b1edbc 96 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
AnnaBridge 171:3a7713b1edbc 97 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
AnnaBridge 171:3a7713b1edbc 98 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
AnnaBridge 171:3a7713b1edbc 99 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
AnnaBridge 171:3a7713b1edbc 100 uint32_t LockLevel; /*!< TIM Lock level.
AnnaBridge 171:3a7713b1edbc 101 This parameter can be a value of @ref TIM_Lock_level */
AnnaBridge 171:3a7713b1edbc 102 uint32_t DeadTime; /*!< TIM dead Time.
AnnaBridge 171:3a7713b1edbc 103 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
AnnaBridge 171:3a7713b1edbc 104 uint32_t BreakState; /*!< TIM Break State.
AnnaBridge 171:3a7713b1edbc 105 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
AnnaBridge 171:3a7713b1edbc 106 uint32_t BreakPolarity; /*!< TIM Break input polarity.
AnnaBridge 171:3a7713b1edbc 107 This parameter can be a value of @ref TIM_Break_Polarity */
AnnaBridge 171:3a7713b1edbc 108 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
AnnaBridge 171:3a7713b1edbc 109 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
AnnaBridge 171:3a7713b1edbc 110 }TIM_BreakDeadTimeConfigTypeDef;
AnnaBridge 171:3a7713b1edbc 111 /**
AnnaBridge 171:3a7713b1edbc 112 * @}
AnnaBridge 171:3a7713b1edbc 113 */
AnnaBridge 171:3a7713b1edbc 114
AnnaBridge 171:3a7713b1edbc 115 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 116 /** @defgroup TIMEx_Exported_Constants TIM Exported Constants
AnnaBridge 171:3a7713b1edbc 117 * @{
AnnaBridge 171:3a7713b1edbc 118 */
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 /** @defgroup TIMEx_Remap TIM Remap
AnnaBridge 171:3a7713b1edbc 121 * @{
AnnaBridge 171:3a7713b1edbc 122 */
AnnaBridge 171:3a7713b1edbc 123 #define TIM_TIM2_TIM8_TRGO 0x00000000U
AnnaBridge 171:3a7713b1edbc 124 #define TIM_TIM2_ETH_PTP 0x00000400U
AnnaBridge 171:3a7713b1edbc 125 #define TIM_TIM2_USBFS_SOF 0x00000800U
AnnaBridge 171:3a7713b1edbc 126 #define TIM_TIM2_USBHS_SOF 0x00000C00U
AnnaBridge 171:3a7713b1edbc 127 #define TIM_TIM5_GPIO 0x00000000U
AnnaBridge 171:3a7713b1edbc 128 #define TIM_TIM5_LSI 0x00000040U
AnnaBridge 171:3a7713b1edbc 129 #define TIM_TIM5_LSE 0x00000080U
AnnaBridge 171:3a7713b1edbc 130 #define TIM_TIM5_RTC 0x000000C0U
AnnaBridge 171:3a7713b1edbc 131 #define TIM_TIM11_GPIO 0x00000000U
AnnaBridge 171:3a7713b1edbc 132 #define TIM_TIM11_HSE 0x00000002U
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 /**
AnnaBridge 171:3a7713b1edbc 135 * @}
AnnaBridge 171:3a7713b1edbc 136 */
AnnaBridge 171:3a7713b1edbc 137
AnnaBridge 171:3a7713b1edbc 138 /**
AnnaBridge 171:3a7713b1edbc 139 * @}
AnnaBridge 171:3a7713b1edbc 140 */
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 143 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 144 /** @addtogroup TIMEx_Exported_Functions
AnnaBridge 171:3a7713b1edbc 145 * @{
AnnaBridge 171:3a7713b1edbc 146 */
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 /** @addtogroup TIMEx_Exported_Functions_Group1
AnnaBridge 171:3a7713b1edbc 149 * @{
AnnaBridge 171:3a7713b1edbc 150 */
AnnaBridge 171:3a7713b1edbc 151 /* Timer Hall Sensor functions **********************************************/
AnnaBridge 171:3a7713b1edbc 152 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
AnnaBridge 171:3a7713b1edbc 153 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 156 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 159 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 160 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 161 /* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 162 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 163 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 164 /* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 165 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
AnnaBridge 171:3a7713b1edbc 166 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 167 /**
AnnaBridge 171:3a7713b1edbc 168 * @}
AnnaBridge 171:3a7713b1edbc 169 */
AnnaBridge 171:3a7713b1edbc 170
AnnaBridge 171:3a7713b1edbc 171 /** @addtogroup TIMEx_Exported_Functions_Group2
AnnaBridge 171:3a7713b1edbc 172 * @{
AnnaBridge 171:3a7713b1edbc 173 */
AnnaBridge 171:3a7713b1edbc 174 /* Timer Complementary Output Compare functions *****************************/
AnnaBridge 171:3a7713b1edbc 175 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 176 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 177 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 178
AnnaBridge 171:3a7713b1edbc 179 /* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 180 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 181 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 182
AnnaBridge 171:3a7713b1edbc 183 /* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 184 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
AnnaBridge 171:3a7713b1edbc 185 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 186 /**
AnnaBridge 171:3a7713b1edbc 187 * @}
AnnaBridge 171:3a7713b1edbc 188 */
AnnaBridge 171:3a7713b1edbc 189
AnnaBridge 171:3a7713b1edbc 190 /** @addtogroup TIMEx_Exported_Functions_Group3
AnnaBridge 171:3a7713b1edbc 191 * @{
AnnaBridge 171:3a7713b1edbc 192 */
AnnaBridge 171:3a7713b1edbc 193 /* Timer Complementary PWM functions ****************************************/
AnnaBridge 171:3a7713b1edbc 194 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 195 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 196 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 197
AnnaBridge 171:3a7713b1edbc 198 /* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 199 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 200 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 201 /* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 202 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
AnnaBridge 171:3a7713b1edbc 203 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 204 /**
AnnaBridge 171:3a7713b1edbc 205 * @}
AnnaBridge 171:3a7713b1edbc 206 */
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /** @addtogroup TIMEx_Exported_Functions_Group4
AnnaBridge 171:3a7713b1edbc 209 * @{
AnnaBridge 171:3a7713b1edbc 210 */
AnnaBridge 171:3a7713b1edbc 211 /* Timer Complementary One Pulse functions **********************************/
AnnaBridge 171:3a7713b1edbc 212 /* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 213 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge 171:3a7713b1edbc 214 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 217 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge 171:3a7713b1edbc 218 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
AnnaBridge 171:3a7713b1edbc 219 /**
AnnaBridge 171:3a7713b1edbc 220 * @}
AnnaBridge 171:3a7713b1edbc 221 */
AnnaBridge 171:3a7713b1edbc 222
AnnaBridge 171:3a7713b1edbc 223 /** @addtogroup TIMEx_Exported_Functions_Group5
AnnaBridge 171:3a7713b1edbc 224 * @{
AnnaBridge 171:3a7713b1edbc 225 */
AnnaBridge 171:3a7713b1edbc 226 /* Extension Control functions ************************************************/
AnnaBridge 171:3a7713b1edbc 227 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge 171:3a7713b1edbc 228 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge 171:3a7713b1edbc 229 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
AnnaBridge 171:3a7713b1edbc 230 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
AnnaBridge 171:3a7713b1edbc 231 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
AnnaBridge 171:3a7713b1edbc 232 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
AnnaBridge 171:3a7713b1edbc 233 /**
AnnaBridge 171:3a7713b1edbc 234 * @}
AnnaBridge 171:3a7713b1edbc 235 */
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /** @addtogroup TIMEx_Exported_Functions_Group6
AnnaBridge 171:3a7713b1edbc 238 * @{
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240 /* Extension Callback *********************************************************/
AnnaBridge 171:3a7713b1edbc 241 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 242 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 243 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
AnnaBridge 171:3a7713b1edbc 244 /**
AnnaBridge 171:3a7713b1edbc 245 * @}
AnnaBridge 171:3a7713b1edbc 246 */
AnnaBridge 171:3a7713b1edbc 247
AnnaBridge 171:3a7713b1edbc 248 /** @addtogroup TIMEx_Exported_Functions_Group7
AnnaBridge 171:3a7713b1edbc 249 * @{
AnnaBridge 171:3a7713b1edbc 250 */
AnnaBridge 171:3a7713b1edbc 251 /* Extension Peripheral State functions **************************************/
AnnaBridge 171:3a7713b1edbc 252 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
AnnaBridge 171:3a7713b1edbc 253 /**
AnnaBridge 171:3a7713b1edbc 254 * @}
AnnaBridge 171:3a7713b1edbc 255 */
AnnaBridge 171:3a7713b1edbc 256
AnnaBridge 171:3a7713b1edbc 257 /**
AnnaBridge 171:3a7713b1edbc 258 * @}
AnnaBridge 171:3a7713b1edbc 259 */
AnnaBridge 171:3a7713b1edbc 260
AnnaBridge 171:3a7713b1edbc 261 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 262 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 263 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 264 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 265 /** @defgroup TIMEx_Private_Macros TIM Private Macros
AnnaBridge 171:3a7713b1edbc 266 * @{
AnnaBridge 171:3a7713b1edbc 267 */
AnnaBridge 171:3a7713b1edbc 268 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
AnnaBridge 171:3a7713b1edbc 269 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
AnnaBridge 171:3a7713b1edbc 270 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
AnnaBridge 171:3a7713b1edbc 271 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
AnnaBridge 171:3a7713b1edbc 272 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
AnnaBridge 171:3a7713b1edbc 273 ((TIM_REMAP) == TIM_TIM5_LSI)||\
AnnaBridge 171:3a7713b1edbc 274 ((TIM_REMAP) == TIM_TIM5_LSE)||\
AnnaBridge 171:3a7713b1edbc 275 ((TIM_REMAP) == TIM_TIM5_RTC)||\
AnnaBridge 171:3a7713b1edbc 276 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
AnnaBridge 171:3a7713b1edbc 277 ((TIM_REMAP) == TIM_TIM11_HSE))
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU)
AnnaBridge 171:3a7713b1edbc 280
AnnaBridge 171:3a7713b1edbc 281 /**
AnnaBridge 171:3a7713b1edbc 282 * @brief Sets the TIM Output compare preload.
AnnaBridge 171:3a7713b1edbc 283 * @param __HANDLE__: TIM handle.
AnnaBridge 171:3a7713b1edbc 284 * @param __CHANNEL__: TIM Channels to be configured.
AnnaBridge 171:3a7713b1edbc 285 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 286 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
AnnaBridge 171:3a7713b1edbc 287 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
AnnaBridge 171:3a7713b1edbc 288 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
AnnaBridge 171:3a7713b1edbc 289 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
AnnaBridge 171:3a7713b1edbc 290 * @retval None
AnnaBridge 171:3a7713b1edbc 291 */
AnnaBridge 171:3a7713b1edbc 292 #define __HAL_TIM_ENABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \
AnnaBridge 171:3a7713b1edbc 293 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC1PE) :\
AnnaBridge 171:3a7713b1edbc 294 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= TIM_CCMR1_OC2PE) :\
AnnaBridge 171:3a7713b1edbc 295 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC3PE) :\
AnnaBridge 171:3a7713b1edbc 296 ((__HANDLE__)->Instance->CCMR2 |= TIM_CCMR2_OC4PE))
AnnaBridge 171:3a7713b1edbc 297
AnnaBridge 171:3a7713b1edbc 298 /**
AnnaBridge 171:3a7713b1edbc 299 * @brief Resets the TIM Output compare preload.
AnnaBridge 171:3a7713b1edbc 300 * @param __HANDLE__: TIM handle.
AnnaBridge 171:3a7713b1edbc 301 * @param __CHANNEL__: TIM Channels to be configured.
AnnaBridge 171:3a7713b1edbc 302 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 303 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
AnnaBridge 171:3a7713b1edbc 304 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
AnnaBridge 171:3a7713b1edbc 305 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
AnnaBridge 171:3a7713b1edbc 306 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
AnnaBridge 171:3a7713b1edbc 307 * @retval None
AnnaBridge 171:3a7713b1edbc 308 */
AnnaBridge 171:3a7713b1edbc 309 #define __HAL_TIM_DISABLE_OCxPRELOAD(__HANDLE__, __CHANNEL__) \
AnnaBridge 171:3a7713b1edbc 310 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC1PE) :\
AnnaBridge 171:3a7713b1edbc 311 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_OC2PE) :\
AnnaBridge 171:3a7713b1edbc 312 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC3PE) :\
AnnaBridge 171:3a7713b1edbc 313 ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_OC4PE))
AnnaBridge 171:3a7713b1edbc 314
AnnaBridge 171:3a7713b1edbc 315 /**
AnnaBridge 171:3a7713b1edbc 316 * @}
AnnaBridge 171:3a7713b1edbc 317 */
AnnaBridge 171:3a7713b1edbc 318
AnnaBridge 171:3a7713b1edbc 319 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 320 /** @defgroup TIMEx_Private_Functions TIM Private Functions
AnnaBridge 171:3a7713b1edbc 321 * @{
AnnaBridge 171:3a7713b1edbc 322 */
AnnaBridge 171:3a7713b1edbc 323
AnnaBridge 171:3a7713b1edbc 324 /**
AnnaBridge 171:3a7713b1edbc 325 * @}
AnnaBridge 171:3a7713b1edbc 326 */
AnnaBridge 171:3a7713b1edbc 327
AnnaBridge 171:3a7713b1edbc 328 /**
AnnaBridge 171:3a7713b1edbc 329 * @}
AnnaBridge 171:3a7713b1edbc 330 */
AnnaBridge 171:3a7713b1edbc 331
AnnaBridge 171:3a7713b1edbc 332 /**
AnnaBridge 171:3a7713b1edbc 333 * @}
AnnaBridge 171:3a7713b1edbc 334 */
AnnaBridge 171:3a7713b1edbc 335
AnnaBridge 171:3a7713b1edbc 336 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 337 }
AnnaBridge 171:3a7713b1edbc 338 #endif
AnnaBridge 171:3a7713b1edbc 339
AnnaBridge 171:3a7713b1edbc 340 #endif /* __STM32F2xx_HAL_TIM_EX_H */
AnnaBridge 171:3a7713b1edbc 341
AnnaBridge 171:3a7713b1edbc 342 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/