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TARGET_NUCLEO_F207ZG/TOOLCHAIN_GCC_ARM/stm32f2xx_hal_nor.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f2xx_hal_nor.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @version V1.2.1
AnnaBridge 171:3a7713b1edbc 6 * @date 14-April-2017
AnnaBridge 171:3a7713b1edbc 7 * @brief Header file of NOR HAL module.
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 * @attention
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 12 *
AnnaBridge 171:3a7713b1edbc 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 14 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 19 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 21 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 22 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 23 *
AnnaBridge 171:3a7713b1edbc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 34 *
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 36 */
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 39 #ifndef __STM32F2xx_HAL_NOR_H
AnnaBridge 171:3a7713b1edbc 40 #define __STM32F2xx_HAL_NOR_H
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 #include "stm32f2xx_ll_fsmc.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 /** @addtogroup STM32F2xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 51 * @{
AnnaBridge 171:3a7713b1edbc 52 */
AnnaBridge 171:3a7713b1edbc 53
AnnaBridge 171:3a7713b1edbc 54 /** @addtogroup NOR
AnnaBridge 171:3a7713b1edbc 55 * @{
AnnaBridge 171:3a7713b1edbc 56 */
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /* Exported typedef ----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59 /** @defgroup NOR_Exported_Types NOR Exported Types
AnnaBridge 171:3a7713b1edbc 60 * @{
AnnaBridge 171:3a7713b1edbc 61 */
AnnaBridge 171:3a7713b1edbc 62
AnnaBridge 171:3a7713b1edbc 63 /**
AnnaBridge 171:3a7713b1edbc 64 * @brief HAL SRAM State structures definition
AnnaBridge 171:3a7713b1edbc 65 */
AnnaBridge 171:3a7713b1edbc 66 typedef enum
AnnaBridge 171:3a7713b1edbc 67 {
AnnaBridge 171:3a7713b1edbc 68 HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
AnnaBridge 171:3a7713b1edbc 69 HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 70 HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
AnnaBridge 171:3a7713b1edbc 71 HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
AnnaBridge 171:3a7713b1edbc 72 HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
AnnaBridge 171:3a7713b1edbc 73 }HAL_NOR_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 /**
AnnaBridge 171:3a7713b1edbc 76 * @brief FSMC NOR Status typedef
AnnaBridge 171:3a7713b1edbc 77 */
AnnaBridge 171:3a7713b1edbc 78 typedef enum
AnnaBridge 171:3a7713b1edbc 79 {
AnnaBridge 171:3a7713b1edbc 80 HAL_NOR_STATUS_SUCCESS = 0U,
AnnaBridge 171:3a7713b1edbc 81 HAL_NOR_STATUS_ONGOING,
AnnaBridge 171:3a7713b1edbc 82 HAL_NOR_STATUS_ERROR,
AnnaBridge 171:3a7713b1edbc 83 HAL_NOR_STATUS_TIMEOUT
AnnaBridge 171:3a7713b1edbc 84 }HAL_NOR_StatusTypeDef;
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 /**
AnnaBridge 171:3a7713b1edbc 87 * @brief FSMC NOR ID typedef
AnnaBridge 171:3a7713b1edbc 88 */
AnnaBridge 171:3a7713b1edbc 89 typedef struct
AnnaBridge 171:3a7713b1edbc 90 {
AnnaBridge 171:3a7713b1edbc 91 uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 uint16_t Device_Code1;
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 uint16_t Device_Code2;
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
AnnaBridge 171:3a7713b1edbc 98 These codes can be accessed by performing read operations with specific
AnnaBridge 171:3a7713b1edbc 99 control signals and addresses set.They can also be accessed by issuing
AnnaBridge 171:3a7713b1edbc 100 an Auto Select command */
AnnaBridge 171:3a7713b1edbc 101 }NOR_IDTypeDef;
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 /**
AnnaBridge 171:3a7713b1edbc 104 * @brief FSMC NOR CFI typedef
AnnaBridge 171:3a7713b1edbc 105 */
AnnaBridge 171:3a7713b1edbc 106 typedef struct
AnnaBridge 171:3a7713b1edbc 107 {
AnnaBridge 171:3a7713b1edbc 108 /*!< Defines the information stored in the memory's Common flash interface
AnnaBridge 171:3a7713b1edbc 109 which contains a description of various electrical and timing parameters,
AnnaBridge 171:3a7713b1edbc 110 density information and functions supported by the memory */
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 uint16_t CFI_1;
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 uint16_t CFI_2;
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 uint16_t CFI_3;
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 uint16_t CFI_4;
AnnaBridge 171:3a7713b1edbc 119 }NOR_CFITypeDef;
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 /**
AnnaBridge 171:3a7713b1edbc 122 * @brief NOR handle Structure definition
AnnaBridge 171:3a7713b1edbc 123 */
AnnaBridge 171:3a7713b1edbc 124 typedef struct
AnnaBridge 171:3a7713b1edbc 125 {
AnnaBridge 171:3a7713b1edbc 126 FSMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
AnnaBridge 171:3a7713b1edbc 127
AnnaBridge 171:3a7713b1edbc 128 FSMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
AnnaBridge 171:3a7713b1edbc 129
AnnaBridge 171:3a7713b1edbc 130 FSMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
AnnaBridge 171:3a7713b1edbc 131
AnnaBridge 171:3a7713b1edbc 132 HAL_LockTypeDef Lock; /*!< NOR locking object */
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134 __IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 }NOR_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 137 /**
AnnaBridge 171:3a7713b1edbc 138 * @}
AnnaBridge 171:3a7713b1edbc 139 */
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 142 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 143 /** @defgroup NOR_Exported_Macros NOR Exported Macros
AnnaBridge 171:3a7713b1edbc 144 * @{
AnnaBridge 171:3a7713b1edbc 145 */
AnnaBridge 171:3a7713b1edbc 146 /** @brief Reset NOR handle state
AnnaBridge 171:3a7713b1edbc 147 * @param __HANDLE__: specifies the NOR handle.
AnnaBridge 171:3a7713b1edbc 148 * @retval None
AnnaBridge 171:3a7713b1edbc 149 */
AnnaBridge 171:3a7713b1edbc 150 #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
AnnaBridge 171:3a7713b1edbc 151 /**
AnnaBridge 171:3a7713b1edbc 152 * @}
AnnaBridge 171:3a7713b1edbc 153 */
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 156 /** @addtogroup NOR_Exported_Functions NOR Exported Functions
AnnaBridge 171:3a7713b1edbc 157 * @{
AnnaBridge 171:3a7713b1edbc 158 */
AnnaBridge 171:3a7713b1edbc 159
AnnaBridge 171:3a7713b1edbc 160 /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 161 * @{
AnnaBridge 171:3a7713b1edbc 162 */
AnnaBridge 171:3a7713b1edbc 163
AnnaBridge 171:3a7713b1edbc 164 /* Initialization/de-initialization functions ********************************/
AnnaBridge 171:3a7713b1edbc 165 HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FSMC_NORSRAM_TimingTypeDef *Timing, FSMC_NORSRAM_TimingTypeDef *ExtTiming);
AnnaBridge 171:3a7713b1edbc 166 HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 167 void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 168 void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 169 void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 170 /**
AnnaBridge 171:3a7713b1edbc 171 * @}
AnnaBridge 171:3a7713b1edbc 172 */
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 /** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
AnnaBridge 171:3a7713b1edbc 175 * @{
AnnaBridge 171:3a7713b1edbc 176 */
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /* I/O operation functions ***************************************************/
AnnaBridge 171:3a7713b1edbc 179 HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
AnnaBridge 171:3a7713b1edbc 180 HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 181 HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
AnnaBridge 171:3a7713b1edbc 182 HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
AnnaBridge 171:3a7713b1edbc 185 HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
AnnaBridge 171:3a7713b1edbc 188 HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
AnnaBridge 171:3a7713b1edbc 189 HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
AnnaBridge 171:3a7713b1edbc 190 /**
AnnaBridge 171:3a7713b1edbc 191 * @}
AnnaBridge 171:3a7713b1edbc 192 */
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 /** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
AnnaBridge 171:3a7713b1edbc 195 * @{
AnnaBridge 171:3a7713b1edbc 196 */
AnnaBridge 171:3a7713b1edbc 197
AnnaBridge 171:3a7713b1edbc 198 /* NOR Control functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 199 HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 200 HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 201 /**
AnnaBridge 171:3a7713b1edbc 202 * @}
AnnaBridge 171:3a7713b1edbc 203 */
AnnaBridge 171:3a7713b1edbc 204
AnnaBridge 171:3a7713b1edbc 205 /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
AnnaBridge 171:3a7713b1edbc 206 * @{
AnnaBridge 171:3a7713b1edbc 207 */
AnnaBridge 171:3a7713b1edbc 208
AnnaBridge 171:3a7713b1edbc 209 /* NOR State functions ********************************************************/
AnnaBridge 171:3a7713b1edbc 210 HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
AnnaBridge 171:3a7713b1edbc 211 HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 212 /**
AnnaBridge 171:3a7713b1edbc 213 * @}
AnnaBridge 171:3a7713b1edbc 214 */
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /**
AnnaBridge 171:3a7713b1edbc 217 * @}
AnnaBridge 171:3a7713b1edbc 218 */
AnnaBridge 171:3a7713b1edbc 219
AnnaBridge 171:3a7713b1edbc 220 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 221 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 222 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 223 /** @defgroup NOR_Private_Constants NOR Private Constants
AnnaBridge 171:3a7713b1edbc 224 * @{
AnnaBridge 171:3a7713b1edbc 225 */
AnnaBridge 171:3a7713b1edbc 226 /* NOR device IDs addresses */
AnnaBridge 171:3a7713b1edbc 227 #define MC_ADDRESS ((uint16_t)0x0000)
AnnaBridge 171:3a7713b1edbc 228 #define DEVICE_CODE1_ADDR ((uint16_t)0x0001)
AnnaBridge 171:3a7713b1edbc 229 #define DEVICE_CODE2_ADDR ((uint16_t)0x000E)
AnnaBridge 171:3a7713b1edbc 230 #define DEVICE_CODE3_ADDR ((uint16_t)0x000F)
AnnaBridge 171:3a7713b1edbc 231
AnnaBridge 171:3a7713b1edbc 232 /* NOR CFI IDs addresses */
AnnaBridge 171:3a7713b1edbc 233 #define CFI1_ADDRESS ((uint16_t)0x61)
AnnaBridge 171:3a7713b1edbc 234 #define CFI2_ADDRESS ((uint16_t)0x62)
AnnaBridge 171:3a7713b1edbc 235 #define CFI3_ADDRESS ((uint16_t)0x63)
AnnaBridge 171:3a7713b1edbc 236 #define CFI4_ADDRESS ((uint16_t)0x64)
AnnaBridge 171:3a7713b1edbc 237
AnnaBridge 171:3a7713b1edbc 238 /* NOR operation wait timeout */
AnnaBridge 171:3a7713b1edbc 239 #define NOR_TMEOUT ((uint16_t)0xFFFF)
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241 /* NOR memory data width */
AnnaBridge 171:3a7713b1edbc 242 #define NOR_MEMORY_8B ((uint8_t)0x00)
AnnaBridge 171:3a7713b1edbc 243 #define NOR_MEMORY_16B ((uint8_t)0x01)
AnnaBridge 171:3a7713b1edbc 244
AnnaBridge 171:3a7713b1edbc 245 /* NOR memory device read/write start address */
AnnaBridge 171:3a7713b1edbc 246 #define NOR_MEMORY_ADRESS1 0x60000000U
AnnaBridge 171:3a7713b1edbc 247 #define NOR_MEMORY_ADRESS2 0x64000000U
AnnaBridge 171:3a7713b1edbc 248 #define NOR_MEMORY_ADRESS3 0x68000000U
AnnaBridge 171:3a7713b1edbc 249 #define NOR_MEMORY_ADRESS4 0x6C000000U
AnnaBridge 171:3a7713b1edbc 250 /**
AnnaBridge 171:3a7713b1edbc 251 * @}
AnnaBridge 171:3a7713b1edbc 252 */
AnnaBridge 171:3a7713b1edbc 253
AnnaBridge 171:3a7713b1edbc 254 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 255 /** @defgroup NOR_Private_Macros NOR Private Macros
AnnaBridge 171:3a7713b1edbc 256 * @{
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 /**
AnnaBridge 171:3a7713b1edbc 259 * @brief NOR memory address shifting.
AnnaBridge 171:3a7713b1edbc 260 * @param __NOR_ADDRESS__: NOR base address
AnnaBridge 171:3a7713b1edbc 261 * @param __NOR_MEMORY_WIDTH__: NOR memory width
AnnaBridge 171:3a7713b1edbc 262 * @param __ADDRESS__: NOR memory address
AnnaBridge 171:3a7713b1edbc 263 * @retval NOR shifted address value
AnnaBridge 171:3a7713b1edbc 264 */
AnnaBridge 171:3a7713b1edbc 265 #define NOR_ADDR_SHIFT(__NOR_ADDRESS__, __NOR_MEMORY_WIDTH__, __ADDRESS__) \
AnnaBridge 171:3a7713b1edbc 266 ((uint32_t)(((__NOR_MEMORY_WIDTH__) == NOR_MEMORY_16B)? \
AnnaBridge 171:3a7713b1edbc 267 ((uint32_t)((__NOR_ADDRESS__) + (2U * (__ADDRESS__)))): \
AnnaBridge 171:3a7713b1edbc 268 ((uint32_t)((__NOR_ADDRESS__) + (__ADDRESS__)))))
AnnaBridge 171:3a7713b1edbc 269
AnnaBridge 171:3a7713b1edbc 270 /**
AnnaBridge 171:3a7713b1edbc 271 * @brief NOR memory write data to specified address.
AnnaBridge 171:3a7713b1edbc 272 * @param __ADDRESS__: NOR memory address
AnnaBridge 171:3a7713b1edbc 273 * @param __DATA__: Data to write
AnnaBridge 171:3a7713b1edbc 274 * @retval None
AnnaBridge 171:3a7713b1edbc 275 */
AnnaBridge 171:3a7713b1edbc 276 #define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__))
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 /**
AnnaBridge 171:3a7713b1edbc 279 * @}
AnnaBridge 171:3a7713b1edbc 280 */
AnnaBridge 171:3a7713b1edbc 281
AnnaBridge 171:3a7713b1edbc 282 /**
AnnaBridge 171:3a7713b1edbc 283 * @}
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285
AnnaBridge 171:3a7713b1edbc 286 /**
AnnaBridge 171:3a7713b1edbc 287 * @}
AnnaBridge 171:3a7713b1edbc 288 */
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 291 }
AnnaBridge 171:3a7713b1edbc 292 #endif
AnnaBridge 171:3a7713b1edbc 293
AnnaBridge 171:3a7713b1edbc 294 #endif /* __STM32F2xx_HAL_NOR_H */
AnnaBridge 171:3a7713b1edbc 295
AnnaBridge 171:3a7713b1edbc 296 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/