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TARGET_NUCLEO_F207ZG/TOOLCHAIN_GCC_ARM/stm32f2xx_hal_i2c.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f2xx_hal_i2c.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @version V1.2.1
AnnaBridge 171:3a7713b1edbc 6 * @date 14-April-2017
AnnaBridge 171:3a7713b1edbc 7 * @brief Header file of I2C HAL module.
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 * @attention
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 12 *
AnnaBridge 171:3a7713b1edbc 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 14 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 19 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 21 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 22 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 23 *
AnnaBridge 171:3a7713b1edbc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 34 *
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 36 */
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 39 #ifndef __STM32F2xx_HAL_I2C_H
AnnaBridge 171:3a7713b1edbc 40 #define __STM32F2xx_HAL_I2C_H
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 47 #include "stm32f2xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /** @addtogroup STM32F2xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 50 * @{
AnnaBridge 171:3a7713b1edbc 51 */
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @addtogroup I2C
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /** @defgroup I2C_Exported_Types I2C Exported Types
AnnaBridge 171:3a7713b1edbc 59 * @{
AnnaBridge 171:3a7713b1edbc 60 */
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /**
AnnaBridge 171:3a7713b1edbc 63 * @brief I2C Configuration Structure definition
AnnaBridge 171:3a7713b1edbc 64 */
AnnaBridge 171:3a7713b1edbc 65 typedef struct
AnnaBridge 171:3a7713b1edbc 66 {
AnnaBridge 171:3a7713b1edbc 67 uint32_t ClockSpeed; /*!< Specifies the clock frequency.
AnnaBridge 171:3a7713b1edbc 68 This parameter must be set to a value lower than 400kHz */
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70 uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
AnnaBridge 171:3a7713b1edbc 71 This parameter can be a value of @ref I2C_duty_cycle_in_fast_mode */
AnnaBridge 171:3a7713b1edbc 72
AnnaBridge 171:3a7713b1edbc 73 uint32_t OwnAddress1; /*!< Specifies the first device own address.
AnnaBridge 171:3a7713b1edbc 74 This parameter can be a 7-bit or 10-bit address. */
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected.
AnnaBridge 171:3a7713b1edbc 77 This parameter can be a value of @ref I2C_addressing_mode */
AnnaBridge 171:3a7713b1edbc 78
AnnaBridge 171:3a7713b1edbc 79 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
AnnaBridge 171:3a7713b1edbc 80 This parameter can be a value of @ref I2C_dual_addressing_mode */
AnnaBridge 171:3a7713b1edbc 81
AnnaBridge 171:3a7713b1edbc 82 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
AnnaBridge 171:3a7713b1edbc 83 This parameter can be a 7-bit address. */
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
AnnaBridge 171:3a7713b1edbc 86 This parameter can be a value of @ref I2C_general_call_addressing_mode */
AnnaBridge 171:3a7713b1edbc 87
AnnaBridge 171:3a7713b1edbc 88 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
AnnaBridge 171:3a7713b1edbc 89 This parameter can be a value of @ref I2C_nostretch_mode */
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 }I2C_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 /**
AnnaBridge 171:3a7713b1edbc 94 * @brief HAL State structure definition
AnnaBridge 171:3a7713b1edbc 95 * @note HAL I2C State value coding follow below described bitmap :
AnnaBridge 171:3a7713b1edbc 96 * b7-b6 Error information
AnnaBridge 171:3a7713b1edbc 97 * 00 : No Error
AnnaBridge 171:3a7713b1edbc 98 * 01 : Abort (Abort user request on going)
AnnaBridge 171:3a7713b1edbc 99 * 10 : Timeout
AnnaBridge 171:3a7713b1edbc 100 * 11 : Error
AnnaBridge 171:3a7713b1edbc 101 * b5 IP initilisation status
AnnaBridge 171:3a7713b1edbc 102 * 0 : Reset (IP not initialized)
AnnaBridge 171:3a7713b1edbc 103 * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)
AnnaBridge 171:3a7713b1edbc 104 * b4 (not used)
AnnaBridge 171:3a7713b1edbc 105 * x : Should be set to 0
AnnaBridge 171:3a7713b1edbc 106 * b3
AnnaBridge 171:3a7713b1edbc 107 * 0 : Ready or Busy (No Listen mode ongoing)
AnnaBridge 171:3a7713b1edbc 108 * 1 : Listen (IP in Address Listen Mode)
AnnaBridge 171:3a7713b1edbc 109 * b2 Intrinsic process state
AnnaBridge 171:3a7713b1edbc 110 * 0 : Ready
AnnaBridge 171:3a7713b1edbc 111 * 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge 171:3a7713b1edbc 112 * b1 Rx state
AnnaBridge 171:3a7713b1edbc 113 * 0 : Ready (no Rx operation ongoing)
AnnaBridge 171:3a7713b1edbc 114 * 1 : Busy (Rx operation ongoing)
AnnaBridge 171:3a7713b1edbc 115 * b0 Tx state
AnnaBridge 171:3a7713b1edbc 116 * 0 : Ready (no Tx operation ongoing)
AnnaBridge 171:3a7713b1edbc 117 * 1 : Busy (Tx operation ongoing)
AnnaBridge 171:3a7713b1edbc 118 */
AnnaBridge 171:3a7713b1edbc 119 typedef enum
AnnaBridge 171:3a7713b1edbc 120 {
AnnaBridge 171:3a7713b1edbc 121 HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
AnnaBridge 171:3a7713b1edbc 122 HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 123 HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */
AnnaBridge 171:3a7713b1edbc 124 HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */
AnnaBridge 171:3a7713b1edbc 125 HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
AnnaBridge 171:3a7713b1edbc 126 HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */
AnnaBridge 171:3a7713b1edbc 127 HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission
AnnaBridge 171:3a7713b1edbc 128 process is ongoing */
AnnaBridge 171:3a7713b1edbc 129 HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception
AnnaBridge 171:3a7713b1edbc 130 process is ongoing */
AnnaBridge 171:3a7713b1edbc 131 HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */
AnnaBridge 171:3a7713b1edbc 132 HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */
AnnaBridge 171:3a7713b1edbc 133 HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */
AnnaBridge 171:3a7713b1edbc 134
AnnaBridge 171:3a7713b1edbc 135 }HAL_I2C_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 /**
AnnaBridge 171:3a7713b1edbc 138 * @brief HAL Mode structure definition
AnnaBridge 171:3a7713b1edbc 139 * @note HAL I2C Mode value coding follow below described bitmap :
AnnaBridge 171:3a7713b1edbc 140 * b7 (not used)
AnnaBridge 171:3a7713b1edbc 141 * x : Should be set to 0
AnnaBridge 171:3a7713b1edbc 142 * b6
AnnaBridge 171:3a7713b1edbc 143 * 0 : None
AnnaBridge 171:3a7713b1edbc 144 * 1 : Memory (HAL I2C communication is in Memory Mode)
AnnaBridge 171:3a7713b1edbc 145 * b5
AnnaBridge 171:3a7713b1edbc 146 * 0 : None
AnnaBridge 171:3a7713b1edbc 147 * 1 : Slave (HAL I2C communication is in Slave Mode)
AnnaBridge 171:3a7713b1edbc 148 * b4
AnnaBridge 171:3a7713b1edbc 149 * 0 : None
AnnaBridge 171:3a7713b1edbc 150 * 1 : Master (HAL I2C communication is in Master Mode)
AnnaBridge 171:3a7713b1edbc 151 * b3-b2-b1-b0 (not used)
AnnaBridge 171:3a7713b1edbc 152 * xxxx : Should be set to 0000
AnnaBridge 171:3a7713b1edbc 153 */
AnnaBridge 171:3a7713b1edbc 154 typedef enum
AnnaBridge 171:3a7713b1edbc 155 {
AnnaBridge 171:3a7713b1edbc 156 HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */
AnnaBridge 171:3a7713b1edbc 157 HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */
AnnaBridge 171:3a7713b1edbc 158 HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */
AnnaBridge 171:3a7713b1edbc 159 HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 }HAL_I2C_ModeTypeDef;
AnnaBridge 171:3a7713b1edbc 162
AnnaBridge 171:3a7713b1edbc 163 /**
AnnaBridge 171:3a7713b1edbc 164 * @brief I2C handle Structure definition
AnnaBridge 171:3a7713b1edbc 165 */
AnnaBridge 171:3a7713b1edbc 166 typedef struct
AnnaBridge 171:3a7713b1edbc 167 {
AnnaBridge 171:3a7713b1edbc 168 I2C_TypeDef *Instance; /*!< I2C registers base address */
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170 I2C_InitTypeDef Init; /*!< I2C communication parameters */
AnnaBridge 171:3a7713b1edbc 171
AnnaBridge 171:3a7713b1edbc 172 uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 uint16_t XferSize; /*!< I2C transfer size */
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 __IO uint16_t XferCount; /*!< I2C transfer counter */
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 __IO uint32_t XferOptions; /*!< I2C transfer options */
AnnaBridge 171:3a7713b1edbc 179
AnnaBridge 171:3a7713b1edbc 180 __IO uint32_t PreviousState; /*!< I2C communication Previous state and mode
AnnaBridge 171:3a7713b1edbc 181 context for internal usage */
AnnaBridge 171:3a7713b1edbc 182
AnnaBridge 171:3a7713b1edbc 183 DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 184
AnnaBridge 171:3a7713b1edbc 185 DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 HAL_LockTypeDef Lock; /*!< I2C locking object */
AnnaBridge 171:3a7713b1edbc 188
AnnaBridge 171:3a7713b1edbc 189 __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */
AnnaBridge 171:3a7713b1edbc 190
AnnaBridge 171:3a7713b1edbc 191 __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193 __IO uint32_t ErrorCode; /*!< I2C Error code */
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 __IO uint32_t Devaddress; /*!< I2C Target device address */
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 __IO uint32_t Memaddress; /*!< I2C Target memory address */
AnnaBridge 171:3a7713b1edbc 198
AnnaBridge 171:3a7713b1edbc 199 __IO uint32_t MemaddSize; /*!< I2C Target memory address size */
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201 __IO uint32_t EventCount; /*!< I2C Event counter */
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 }I2C_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 204 /**
AnnaBridge 171:3a7713b1edbc 205 * @}
AnnaBridge 171:3a7713b1edbc 206 */
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 209 /** @defgroup I2C_Exported_Constants I2C Exported Constants
AnnaBridge 171:3a7713b1edbc 210 * @{
AnnaBridge 171:3a7713b1edbc 211 */
AnnaBridge 171:3a7713b1edbc 212
AnnaBridge 171:3a7713b1edbc 213 /** @defgroup I2C_Error_Code I2C Error Code
AnnaBridge 171:3a7713b1edbc 214 * @brief I2C Error Code
AnnaBridge 171:3a7713b1edbc 215 * @{
AnnaBridge 171:3a7713b1edbc 216 */
AnnaBridge 171:3a7713b1edbc 217 #define HAL_I2C_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 171:3a7713b1edbc 218 #define HAL_I2C_ERROR_BERR 0x00000001U /*!< BERR error */
AnnaBridge 171:3a7713b1edbc 219 #define HAL_I2C_ERROR_ARLO 0x00000002U /*!< ARLO error */
AnnaBridge 171:3a7713b1edbc 220 #define HAL_I2C_ERROR_AF 0x00000004U /*!< AF error */
AnnaBridge 171:3a7713b1edbc 221 #define HAL_I2C_ERROR_OVR 0x00000008U /*!< OVR error */
AnnaBridge 171:3a7713b1edbc 222 #define HAL_I2C_ERROR_DMA 0x00000010U /*!< DMA transfer error */
AnnaBridge 171:3a7713b1edbc 223 #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */
AnnaBridge 171:3a7713b1edbc 224 /**
AnnaBridge 171:3a7713b1edbc 225 * @}
AnnaBridge 171:3a7713b1edbc 226 */
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /** @defgroup I2C_duty_cycle_in_fast_mode I2C duty cycle in fast mode
AnnaBridge 171:3a7713b1edbc 229 * @{
AnnaBridge 171:3a7713b1edbc 230 */
AnnaBridge 171:3a7713b1edbc 231 #define I2C_DUTYCYCLE_2 0x00000000U
AnnaBridge 171:3a7713b1edbc 232 #define I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY
AnnaBridge 171:3a7713b1edbc 233 /**
AnnaBridge 171:3a7713b1edbc 234 * @}
AnnaBridge 171:3a7713b1edbc 235 */
AnnaBridge 171:3a7713b1edbc 236
AnnaBridge 171:3a7713b1edbc 237 /** @defgroup I2C_addressing_mode I2C addressing mode
AnnaBridge 171:3a7713b1edbc 238 * @{
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240 #define I2C_ADDRESSINGMODE_7BIT 0x00004000U
AnnaBridge 171:3a7713b1edbc 241 #define I2C_ADDRESSINGMODE_10BIT (I2C_OAR1_ADDMODE | 0x00004000U)
AnnaBridge 171:3a7713b1edbc 242 /**
AnnaBridge 171:3a7713b1edbc 243 * @}
AnnaBridge 171:3a7713b1edbc 244 */
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 /** @defgroup I2C_dual_addressing_mode I2C dual addressing mode
AnnaBridge 171:3a7713b1edbc 247 * @{
AnnaBridge 171:3a7713b1edbc 248 */
AnnaBridge 171:3a7713b1edbc 249 #define I2C_DUALADDRESS_DISABLE 0x00000000U
AnnaBridge 171:3a7713b1edbc 250 #define I2C_DUALADDRESS_ENABLE I2C_OAR2_ENDUAL
AnnaBridge 171:3a7713b1edbc 251 /**
AnnaBridge 171:3a7713b1edbc 252 * @}
AnnaBridge 171:3a7713b1edbc 253 */
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 /** @defgroup I2C_general_call_addressing_mode I2C general call addressing mode
AnnaBridge 171:3a7713b1edbc 256 * @{
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 #define I2C_GENERALCALL_DISABLE 0x00000000U
AnnaBridge 171:3a7713b1edbc 259 #define I2C_GENERALCALL_ENABLE I2C_CR1_ENGC
AnnaBridge 171:3a7713b1edbc 260 /**
AnnaBridge 171:3a7713b1edbc 261 * @}
AnnaBridge 171:3a7713b1edbc 262 */
AnnaBridge 171:3a7713b1edbc 263
AnnaBridge 171:3a7713b1edbc 264 /** @defgroup I2C_nostretch_mode I2C nostretch mode
AnnaBridge 171:3a7713b1edbc 265 * @{
AnnaBridge 171:3a7713b1edbc 266 */
AnnaBridge 171:3a7713b1edbc 267 #define I2C_NOSTRETCH_DISABLE 0x00000000U
AnnaBridge 171:3a7713b1edbc 268 #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
AnnaBridge 171:3a7713b1edbc 269 /**
AnnaBridge 171:3a7713b1edbc 270 * @}
AnnaBridge 171:3a7713b1edbc 271 */
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 /** @defgroup I2C_Memory_Address_Size I2C Memory Address Size
AnnaBridge 171:3a7713b1edbc 274 * @{
AnnaBridge 171:3a7713b1edbc 275 */
AnnaBridge 171:3a7713b1edbc 276 #define I2C_MEMADD_SIZE_8BIT 0x00000001U
AnnaBridge 171:3a7713b1edbc 277 #define I2C_MEMADD_SIZE_16BIT 0x00000010U
AnnaBridge 171:3a7713b1edbc 278 /**
AnnaBridge 171:3a7713b1edbc 279 * @}
AnnaBridge 171:3a7713b1edbc 280 */
AnnaBridge 171:3a7713b1edbc 281
AnnaBridge 171:3a7713b1edbc 282 /** @defgroup I2C_XferDirection_definition I2C XferDirection definition
AnnaBridge 171:3a7713b1edbc 283 * @{
AnnaBridge 171:3a7713b1edbc 284 */
AnnaBridge 171:3a7713b1edbc 285 #define I2C_DIRECTION_RECEIVE 0x00000000U
AnnaBridge 171:3a7713b1edbc 286 #define I2C_DIRECTION_TRANSMIT 0x00000001U
AnnaBridge 171:3a7713b1edbc 287 /**
AnnaBridge 171:3a7713b1edbc 288 * @}
AnnaBridge 171:3a7713b1edbc 289 */
AnnaBridge 171:3a7713b1edbc 290
AnnaBridge 171:3a7713b1edbc 291 /** @defgroup I2C_XferOptions_definition I2C XferOptions definition
AnnaBridge 171:3a7713b1edbc 292 * @{
AnnaBridge 171:3a7713b1edbc 293 */
AnnaBridge 171:3a7713b1edbc 294 #define I2C_FIRST_FRAME 0x00000001U
AnnaBridge 171:3a7713b1edbc 295 #define I2C_NEXT_FRAME 0x00000002U
AnnaBridge 171:3a7713b1edbc 296 #define I2C_FIRST_AND_LAST_FRAME 0x00000004U
AnnaBridge 171:3a7713b1edbc 297 #define I2C_LAST_FRAME 0x00000008U
AnnaBridge 171:3a7713b1edbc 298 /**
AnnaBridge 171:3a7713b1edbc 299 * @}
AnnaBridge 171:3a7713b1edbc 300 */
AnnaBridge 171:3a7713b1edbc 301
AnnaBridge 171:3a7713b1edbc 302
AnnaBridge 171:3a7713b1edbc 303 /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition
AnnaBridge 171:3a7713b1edbc 304 * @{
AnnaBridge 171:3a7713b1edbc 305 */
AnnaBridge 171:3a7713b1edbc 306 #define I2C_IT_BUF I2C_CR2_ITBUFEN
AnnaBridge 171:3a7713b1edbc 307 #define I2C_IT_EVT I2C_CR2_ITEVTEN
AnnaBridge 171:3a7713b1edbc 308 #define I2C_IT_ERR I2C_CR2_ITERREN
AnnaBridge 171:3a7713b1edbc 309 /**
AnnaBridge 171:3a7713b1edbc 310 * @}
AnnaBridge 171:3a7713b1edbc 311 */
AnnaBridge 171:3a7713b1edbc 312
AnnaBridge 171:3a7713b1edbc 313 /** @defgroup I2C_Flag_definition I2C Flag definition
AnnaBridge 171:3a7713b1edbc 314 * @{
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316 #define I2C_FLAG_SMBALERT 0x00018000U
AnnaBridge 171:3a7713b1edbc 317 #define I2C_FLAG_TIMEOUT 0x00014000U
AnnaBridge 171:3a7713b1edbc 318 #define I2C_FLAG_PECERR 0x00011000U
AnnaBridge 171:3a7713b1edbc 319 #define I2C_FLAG_OVR 0x00010800U
AnnaBridge 171:3a7713b1edbc 320 #define I2C_FLAG_AF 0x00010400U
AnnaBridge 171:3a7713b1edbc 321 #define I2C_FLAG_ARLO 0x00010200U
AnnaBridge 171:3a7713b1edbc 322 #define I2C_FLAG_BERR 0x00010100U
AnnaBridge 171:3a7713b1edbc 323 #define I2C_FLAG_TXE 0x00010080U
AnnaBridge 171:3a7713b1edbc 324 #define I2C_FLAG_RXNE 0x00010040U
AnnaBridge 171:3a7713b1edbc 325 #define I2C_FLAG_STOPF 0x00010010U
AnnaBridge 171:3a7713b1edbc 326 #define I2C_FLAG_ADD10 0x00010008U
AnnaBridge 171:3a7713b1edbc 327 #define I2C_FLAG_BTF 0x00010004U
AnnaBridge 171:3a7713b1edbc 328 #define I2C_FLAG_ADDR 0x00010002U
AnnaBridge 171:3a7713b1edbc 329 #define I2C_FLAG_SB 0x00010001U
AnnaBridge 171:3a7713b1edbc 330 #define I2C_FLAG_DUALF 0x00100080U
AnnaBridge 171:3a7713b1edbc 331 #define I2C_FLAG_SMBHOST 0x00100040U
AnnaBridge 171:3a7713b1edbc 332 #define I2C_FLAG_SMBDEFAULT 0x00100020U
AnnaBridge 171:3a7713b1edbc 333 #define I2C_FLAG_GENCALL 0x00100010U
AnnaBridge 171:3a7713b1edbc 334 #define I2C_FLAG_TRA 0x00100004U
AnnaBridge 171:3a7713b1edbc 335 #define I2C_FLAG_BUSY 0x00100002U
AnnaBridge 171:3a7713b1edbc 336 #define I2C_FLAG_MSL 0x00100001U
AnnaBridge 171:3a7713b1edbc 337 /**
AnnaBridge 171:3a7713b1edbc 338 * @}
AnnaBridge 171:3a7713b1edbc 339 */
AnnaBridge 171:3a7713b1edbc 340
AnnaBridge 171:3a7713b1edbc 341 /**
AnnaBridge 171:3a7713b1edbc 342 * @}
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344
AnnaBridge 171:3a7713b1edbc 345 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 346 /** @defgroup I2C_Exported_Macros I2C Exported Macros
AnnaBridge 171:3a7713b1edbc 347 * @{
AnnaBridge 171:3a7713b1edbc 348 */
AnnaBridge 171:3a7713b1edbc 349
AnnaBridge 171:3a7713b1edbc 350 /** @brief Reset I2C handle state
AnnaBridge 171:3a7713b1edbc 351 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 352 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 353 * @retval None
AnnaBridge 171:3a7713b1edbc 354 */
AnnaBridge 171:3a7713b1edbc 355 #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET)
AnnaBridge 171:3a7713b1edbc 356
AnnaBridge 171:3a7713b1edbc 357 /** @brief Enable or disable the specified I2C interrupts.
AnnaBridge 171:3a7713b1edbc 358 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 359 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 360 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
AnnaBridge 171:3a7713b1edbc 361 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 362 * @arg I2C_IT_BUF: Buffer interrupt enable
AnnaBridge 171:3a7713b1edbc 363 * @arg I2C_IT_EVT: Event interrupt enable
AnnaBridge 171:3a7713b1edbc 364 * @arg I2C_IT_ERR: Error interrupt enable
AnnaBridge 171:3a7713b1edbc 365 * @retval None
AnnaBridge 171:3a7713b1edbc 366 */
AnnaBridge 171:3a7713b1edbc 367 #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 368 #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 /** @brief Checks if the specified I2C interrupt source is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 371 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 372 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 373 * @param __INTERRUPT__: specifies the I2C interrupt source to check.
AnnaBridge 171:3a7713b1edbc 374 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 375 * @arg I2C_IT_BUF: Buffer interrupt enable
AnnaBridge 171:3a7713b1edbc 376 * @arg I2C_IT_EVT: Event interrupt enable
AnnaBridge 171:3a7713b1edbc 377 * @arg I2C_IT_ERR: Error interrupt enable
AnnaBridge 171:3a7713b1edbc 378 * @retval The new state of __INTERRUPT__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 379 */
AnnaBridge 171:3a7713b1edbc 380 #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
AnnaBridge 171:3a7713b1edbc 381
AnnaBridge 171:3a7713b1edbc 382 /** @brief Checks whether the specified I2C flag is set or not.
AnnaBridge 171:3a7713b1edbc 383 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 384 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 385 * @param __FLAG__: specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 386 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 387 * @arg I2C_FLAG_SMBALERT: SMBus Alert flag
AnnaBridge 171:3a7713b1edbc 388 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
AnnaBridge 171:3a7713b1edbc 389 * @arg I2C_FLAG_PECERR: PEC error in reception flag
AnnaBridge 171:3a7713b1edbc 390 * @arg I2C_FLAG_OVR: Overrun/Underrun flag
AnnaBridge 171:3a7713b1edbc 391 * @arg I2C_FLAG_AF: Acknowledge failure flag
AnnaBridge 171:3a7713b1edbc 392 * @arg I2C_FLAG_ARLO: Arbitration lost flag
AnnaBridge 171:3a7713b1edbc 393 * @arg I2C_FLAG_BERR: Bus error flag
AnnaBridge 171:3a7713b1edbc 394 * @arg I2C_FLAG_TXE: Data register empty flag
AnnaBridge 171:3a7713b1edbc 395 * @arg I2C_FLAG_RXNE: Data register not empty flag
AnnaBridge 171:3a7713b1edbc 396 * @arg I2C_FLAG_STOPF: Stop detection flag
AnnaBridge 171:3a7713b1edbc 397 * @arg I2C_FLAG_ADD10: 10-bit header sent flag
AnnaBridge 171:3a7713b1edbc 398 * @arg I2C_FLAG_BTF: Byte transfer finished flag
AnnaBridge 171:3a7713b1edbc 399 * @arg I2C_FLAG_ADDR: Address sent flag
AnnaBridge 171:3a7713b1edbc 400 * Address matched flag
AnnaBridge 171:3a7713b1edbc 401 * @arg I2C_FLAG_SB: Start bit flag
AnnaBridge 171:3a7713b1edbc 402 * @arg I2C_FLAG_DUALF: Dual flag
AnnaBridge 171:3a7713b1edbc 403 * @arg I2C_FLAG_SMBHOST: SMBus host header
AnnaBridge 171:3a7713b1edbc 404 * @arg I2C_FLAG_SMBDEFAULT: SMBus default header
AnnaBridge 171:3a7713b1edbc 405 * @arg I2C_FLAG_GENCALL: General call header flag
AnnaBridge 171:3a7713b1edbc 406 * @arg I2C_FLAG_TRA: Transmitter/Receiver flag
AnnaBridge 171:3a7713b1edbc 407 * @arg I2C_FLAG_BUSY: Bus busy flag
AnnaBridge 171:3a7713b1edbc 408 * @arg I2C_FLAG_MSL: Master/Slave flag
AnnaBridge 171:3a7713b1edbc 409 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 410 */
AnnaBridge 171:3a7713b1edbc 411 #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) ((((uint8_t)((__FLAG__) >> 16U)) == 0x01U)?((((__HANDLE__)->Instance->SR1) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)): \
AnnaBridge 171:3a7713b1edbc 412 ((((__HANDLE__)->Instance->SR2) & ((__FLAG__) & I2C_FLAG_MASK)) == ((__FLAG__) & I2C_FLAG_MASK)))
AnnaBridge 171:3a7713b1edbc 413
AnnaBridge 171:3a7713b1edbc 414 /** @brief Clears the I2C pending flags which are cleared by writing 0 in a specific bit.
AnnaBridge 171:3a7713b1edbc 415 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 416 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 417 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 171:3a7713b1edbc 418 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 419 * @arg I2C_FLAG_SMBALERT: SMBus Alert flag
AnnaBridge 171:3a7713b1edbc 420 * @arg I2C_FLAG_TIMEOUT: Timeout or Tlow error flag
AnnaBridge 171:3a7713b1edbc 421 * @arg I2C_FLAG_PECERR: PEC error in reception flag
AnnaBridge 171:3a7713b1edbc 422 * @arg I2C_FLAG_OVR: Overrun/Underrun flag (Slave mode)
AnnaBridge 171:3a7713b1edbc 423 * @arg I2C_FLAG_AF: Acknowledge failure flag
AnnaBridge 171:3a7713b1edbc 424 * @arg I2C_FLAG_ARLO: Arbitration lost flag (Master mode)
AnnaBridge 171:3a7713b1edbc 425 * @arg I2C_FLAG_BERR: Bus error flag
AnnaBridge 171:3a7713b1edbc 426 * @retval None
AnnaBridge 171:3a7713b1edbc 427 */
AnnaBridge 171:3a7713b1edbc 428 #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR1 = ~((__FLAG__) & I2C_FLAG_MASK))
AnnaBridge 171:3a7713b1edbc 429
AnnaBridge 171:3a7713b1edbc 430 /** @brief Clears the I2C ADDR pending flag.
AnnaBridge 171:3a7713b1edbc 431 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 432 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 433 * @retval None
AnnaBridge 171:3a7713b1edbc 434 */
AnnaBridge 171:3a7713b1edbc 435 #define __HAL_I2C_CLEAR_ADDRFLAG(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 436 do{ \
AnnaBridge 171:3a7713b1edbc 437 __IO uint32_t tmpreg_addr = 0x00U; \
AnnaBridge 171:3a7713b1edbc 438 tmpreg_addr = (__HANDLE__)->Instance->SR1; \
AnnaBridge 171:3a7713b1edbc 439 tmpreg_addr = (__HANDLE__)->Instance->SR2; \
AnnaBridge 171:3a7713b1edbc 440 UNUSED(tmpreg_addr); \
AnnaBridge 171:3a7713b1edbc 441 } while(0)
AnnaBridge 171:3a7713b1edbc 442
AnnaBridge 171:3a7713b1edbc 443 /** @brief Clears the I2C STOPF pending flag.
AnnaBridge 171:3a7713b1edbc 444 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 445 * This parameter can be I2C where x: 1, 2, or 3 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 446 * @retval None
AnnaBridge 171:3a7713b1edbc 447 */
AnnaBridge 171:3a7713b1edbc 448 #define __HAL_I2C_CLEAR_STOPFLAG(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 449 do{ \
AnnaBridge 171:3a7713b1edbc 450 __IO uint32_t tmpreg_stop = 0x00U; \
AnnaBridge 171:3a7713b1edbc 451 tmpreg_stop = (__HANDLE__)->Instance->SR1; \
AnnaBridge 171:3a7713b1edbc 452 (__HANDLE__)->Instance->CR1 |= I2C_CR1_PE; \
AnnaBridge 171:3a7713b1edbc 453 UNUSED(tmpreg_stop); \
AnnaBridge 171:3a7713b1edbc 454 } while(0)
AnnaBridge 171:3a7713b1edbc 455
AnnaBridge 171:3a7713b1edbc 456 /** @brief Enable the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 457 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 458 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 459 * @retval None
AnnaBridge 171:3a7713b1edbc 460 */
AnnaBridge 171:3a7713b1edbc 461 #define __HAL_I2C_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= I2C_CR1_PE)
AnnaBridge 171:3a7713b1edbc 462
AnnaBridge 171:3a7713b1edbc 463 /** @brief Disable the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 464 * @param __HANDLE__: specifies the I2C Handle.
AnnaBridge 171:3a7713b1edbc 465 * This parameter can be I2Cx where x: 1 or 2 to select the I2C peripheral.
AnnaBridge 171:3a7713b1edbc 466 * @retval None
AnnaBridge 171:3a7713b1edbc 467 */
AnnaBridge 171:3a7713b1edbc 468 #define __HAL_I2C_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~I2C_CR1_PE)
AnnaBridge 171:3a7713b1edbc 469
AnnaBridge 171:3a7713b1edbc 470 /**
AnnaBridge 171:3a7713b1edbc 471 * @}
AnnaBridge 171:3a7713b1edbc 472 */
AnnaBridge 171:3a7713b1edbc 473
AnnaBridge 171:3a7713b1edbc 474 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 475 /** @addtogroup I2C_Exported_Functions
AnnaBridge 171:3a7713b1edbc 476 * @{
AnnaBridge 171:3a7713b1edbc 477 */
AnnaBridge 171:3a7713b1edbc 478
AnnaBridge 171:3a7713b1edbc 479 /** @addtogroup I2C_Exported_Functions_Group1
AnnaBridge 171:3a7713b1edbc 480 * @{
AnnaBridge 171:3a7713b1edbc 481 */
AnnaBridge 171:3a7713b1edbc 482 /* Initialization/de-initialization functions **********************************/
AnnaBridge 171:3a7713b1edbc 483 HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 484 HAL_StatusTypeDef HAL_I2C_DeInit (I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 485 void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 486 void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 487 /**
AnnaBridge 171:3a7713b1edbc 488 * @}
AnnaBridge 171:3a7713b1edbc 489 */
AnnaBridge 171:3a7713b1edbc 490
AnnaBridge 171:3a7713b1edbc 491 /** @addtogroup I2C_Exported_Functions_Group2
AnnaBridge 171:3a7713b1edbc 492 * @{
AnnaBridge 171:3a7713b1edbc 493 */
AnnaBridge 171:3a7713b1edbc 494 /* I/O operation functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 495 /******* Blocking mode: Polling */
AnnaBridge 171:3a7713b1edbc 496 HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 497 HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 498 HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 499 HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 500 HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 501 HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 502 HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 503
AnnaBridge 171:3a7713b1edbc 504 /******* Non-Blocking mode: Interrupt */
AnnaBridge 171:3a7713b1edbc 505 HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 506 HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 507 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 508 HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 509 HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 510 HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 511
AnnaBridge 171:3a7713b1edbc 512 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
AnnaBridge 171:3a7713b1edbc 513 HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
AnnaBridge 171:3a7713b1edbc 514 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
AnnaBridge 171:3a7713b1edbc 515 HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
AnnaBridge 171:3a7713b1edbc 516 HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress);
AnnaBridge 171:3a7713b1edbc 517 HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 518 HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 519
AnnaBridge 171:3a7713b1edbc 520 /******* Non-Blocking mode: DMA */
AnnaBridge 171:3a7713b1edbc 521 HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 522 HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 523 HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 524 HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 525 HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 526 HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 527
AnnaBridge 171:3a7713b1edbc 528 /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
AnnaBridge 171:3a7713b1edbc 529 void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 530 void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 531 void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 532 void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 533 void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 534 void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 535 void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode);
AnnaBridge 171:3a7713b1edbc 536 void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 537 void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 538 void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 539 void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 540 void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 541 /**
AnnaBridge 171:3a7713b1edbc 542 * @}
AnnaBridge 171:3a7713b1edbc 543 */
AnnaBridge 171:3a7713b1edbc 544
AnnaBridge 171:3a7713b1edbc 545 /** @addtogroup I2C_Exported_Functions_Group3
AnnaBridge 171:3a7713b1edbc 546 * @{
AnnaBridge 171:3a7713b1edbc 547 */
AnnaBridge 171:3a7713b1edbc 548 /* Peripheral State, Mode and Errors functions *********************************/
AnnaBridge 171:3a7713b1edbc 549 HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 550 HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 551 uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c);
AnnaBridge 171:3a7713b1edbc 552
AnnaBridge 171:3a7713b1edbc 553 /**
AnnaBridge 171:3a7713b1edbc 554 * @}
AnnaBridge 171:3a7713b1edbc 555 */
AnnaBridge 171:3a7713b1edbc 556
AnnaBridge 171:3a7713b1edbc 557 /**
AnnaBridge 171:3a7713b1edbc 558 * @}
AnnaBridge 171:3a7713b1edbc 559 */
AnnaBridge 171:3a7713b1edbc 560 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 561 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 562 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 563 /** @defgroup I2C_Private_Constants I2C Private Constants
AnnaBridge 171:3a7713b1edbc 564 * @{
AnnaBridge 171:3a7713b1edbc 565 */
AnnaBridge 171:3a7713b1edbc 566 #define I2C_FLAG_MASK 0x0000FFFFU
AnnaBridge 171:3a7713b1edbc 567 /**
AnnaBridge 171:3a7713b1edbc 568 * @}
AnnaBridge 171:3a7713b1edbc 569 */
AnnaBridge 171:3a7713b1edbc 570
AnnaBridge 171:3a7713b1edbc 571 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 572 /** @defgroup I2C_Private_Macros I2C Private Macros
AnnaBridge 171:3a7713b1edbc 573 * @{
AnnaBridge 171:3a7713b1edbc 574 */
AnnaBridge 171:3a7713b1edbc 575
AnnaBridge 171:3a7713b1edbc 576 #define I2C_FREQRANGE(__PCLK__) ((__PCLK__)/1000000U)
AnnaBridge 171:3a7713b1edbc 577 #define I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (((__SPEED__) <= 100000U) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
AnnaBridge 171:3a7713b1edbc 578 #define I2C_SPEED_STANDARD(__PCLK__, __SPEED__) (((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
AnnaBridge 171:3a7713b1edbc 579 #define I2C_SPEED_FAST(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__DUTYCYCLE__) == I2C_DUTYCYCLE_2)? ((__PCLK__) / ((__SPEED__) * 3U)) : (((__PCLK__) / ((__SPEED__) * 25U)) | I2C_DUTYCYCLE_16_9))
AnnaBridge 171:3a7713b1edbc 580 #define I2C_SPEED(__PCLK__, __SPEED__, __DUTYCYCLE__) (((__SPEED__) <= 100000U)? (I2C_SPEED_STANDARD((__PCLK__), (__SPEED__))) : \
AnnaBridge 171:3a7713b1edbc 581 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__)) & I2C_CCR_CCR) == 0U)? 1U : \
AnnaBridge 171:3a7713b1edbc 582 ((I2C_SPEED_FAST((__PCLK__), (__SPEED__), (__DUTYCYCLE__))) | I2C_CCR_FS))
AnnaBridge 171:3a7713b1edbc 583
AnnaBridge 171:3a7713b1edbc 584 #define I2C_7BIT_ADD_WRITE(__ADDRESS__) ((uint8_t)((__ADDRESS__) & (~I2C_OAR1_ADD0)))
AnnaBridge 171:3a7713b1edbc 585 #define I2C_7BIT_ADD_READ(__ADDRESS__) ((uint8_t)((__ADDRESS__) | I2C_OAR1_ADD0))
AnnaBridge 171:3a7713b1edbc 586
AnnaBridge 171:3a7713b1edbc 587 #define I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
AnnaBridge 171:3a7713b1edbc 588 #define I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7U) | (uint16_t)0xF0)))
AnnaBridge 171:3a7713b1edbc 589 #define I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0x0300)) >> 7U) | (uint16_t)0xF1)))
AnnaBridge 171:3a7713b1edbc 590
AnnaBridge 171:3a7713b1edbc 591 #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)0xFF00)) >> 8U)))
AnnaBridge 171:3a7713b1edbc 592 #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)0x00FF)))
AnnaBridge 171:3a7713b1edbc 593
AnnaBridge 171:3a7713b1edbc 594 /** @defgroup I2C_IS_RTC_Definitions I2C Private macros to check input parameters
AnnaBridge 171:3a7713b1edbc 595 * @{
AnnaBridge 171:3a7713b1edbc 596 */
AnnaBridge 171:3a7713b1edbc 597 #define IS_I2C_DUTY_CYCLE(CYCLE) (((CYCLE) == I2C_DUTYCYCLE_2) || \
AnnaBridge 171:3a7713b1edbc 598 ((CYCLE) == I2C_DUTYCYCLE_16_9))
AnnaBridge 171:3a7713b1edbc 599 #define IS_I2C_ADDRESSING_MODE(ADDRESS) (((ADDRESS) == I2C_ADDRESSINGMODE_7BIT) || \
AnnaBridge 171:3a7713b1edbc 600 ((ADDRESS) == I2C_ADDRESSINGMODE_10BIT))
AnnaBridge 171:3a7713b1edbc 601 #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 602 ((ADDRESS) == I2C_DUALADDRESS_ENABLE))
AnnaBridge 171:3a7713b1edbc 603 #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 604 ((CALL) == I2C_GENERALCALL_ENABLE))
AnnaBridge 171:3a7713b1edbc 605 #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 606 ((STRETCH) == I2C_NOSTRETCH_ENABLE))
AnnaBridge 171:3a7713b1edbc 607 #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \
AnnaBridge 171:3a7713b1edbc 608 ((SIZE) == I2C_MEMADD_SIZE_16BIT))
AnnaBridge 171:3a7713b1edbc 609 #define IS_I2C_CLOCK_SPEED(SPEED) (((SPEED) > 0U) && ((SPEED) <= 400000U))
AnnaBridge 171:3a7713b1edbc 610 #define IS_I2C_OWN_ADDRESS1(ADDRESS1) (((ADDRESS1) & 0xFFFFFC00U) == 0U)
AnnaBridge 171:3a7713b1edbc 611 #define IS_I2C_OWN_ADDRESS2(ADDRESS2) (((ADDRESS2) & 0xFFFFFF01U) == 0U)
AnnaBridge 171:3a7713b1edbc 612 #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \
AnnaBridge 171:3a7713b1edbc 613 ((REQUEST) == I2C_NEXT_FRAME) || \
AnnaBridge 171:3a7713b1edbc 614 ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \
AnnaBridge 171:3a7713b1edbc 615 ((REQUEST) == I2C_LAST_FRAME))
AnnaBridge 171:3a7713b1edbc 616 /**
AnnaBridge 171:3a7713b1edbc 617 * @}
AnnaBridge 171:3a7713b1edbc 618 */
AnnaBridge 171:3a7713b1edbc 619
AnnaBridge 171:3a7713b1edbc 620 /**
AnnaBridge 171:3a7713b1edbc 621 * @}
AnnaBridge 171:3a7713b1edbc 622 */
AnnaBridge 171:3a7713b1edbc 623
AnnaBridge 171:3a7713b1edbc 624 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 625 /** @defgroup I2C_Private_Functions I2C Private Functions
AnnaBridge 171:3a7713b1edbc 626 * @{
AnnaBridge 171:3a7713b1edbc 627 */
AnnaBridge 171:3a7713b1edbc 628
AnnaBridge 171:3a7713b1edbc 629 /**
AnnaBridge 171:3a7713b1edbc 630 * @}
AnnaBridge 171:3a7713b1edbc 631 */
AnnaBridge 171:3a7713b1edbc 632
AnnaBridge 171:3a7713b1edbc 633 /**
AnnaBridge 171:3a7713b1edbc 634 * @}
AnnaBridge 171:3a7713b1edbc 635 */
AnnaBridge 171:3a7713b1edbc 636
AnnaBridge 171:3a7713b1edbc 637 /**
AnnaBridge 171:3a7713b1edbc 638 * @}
AnnaBridge 171:3a7713b1edbc 639 */
AnnaBridge 171:3a7713b1edbc 640
AnnaBridge 171:3a7713b1edbc 641 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 642 }
AnnaBridge 171:3a7713b1edbc 643 #endif
AnnaBridge 171:3a7713b1edbc 644
AnnaBridge 171:3a7713b1edbc 645
AnnaBridge 171:3a7713b1edbc 646 #endif /* __STM32F2xx_HAL_I2C_H */
AnnaBridge 171:3a7713b1edbc 647
AnnaBridge 171:3a7713b1edbc 648 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/