mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_NUCLEO_F207ZG/TOOLCHAIN_GCC_ARM/stm32f2xx_hal_dcmi.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f2xx_hal_dcmi.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @version V1.2.1
AnnaBridge 171:3a7713b1edbc 6 * @date 14-April-2017
AnnaBridge 171:3a7713b1edbc 7 * @brief Header file of DCMI HAL module.
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 * @attention
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 12 *
AnnaBridge 171:3a7713b1edbc 13 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 14 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 15 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 18 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 19 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 21 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 22 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 23 *
AnnaBridge 171:3a7713b1edbc 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 34 *
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 36 */
AnnaBridge 171:3a7713b1edbc 37
AnnaBridge 171:3a7713b1edbc 38 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 39 #ifndef __STM32F2xx_HAL_DCMI_H
AnnaBridge 171:3a7713b1edbc 40 #define __STM32F2xx_HAL_DCMI_H
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 43 extern "C" {
AnnaBridge 171:3a7713b1edbc 44 #endif
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 #if defined(STM32F207xx) || defined(STM32F217xx)
AnnaBridge 171:3a7713b1edbc 47 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 48 #include "stm32f2xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /** @addtogroup STM32F2xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 52 * @{
AnnaBridge 171:3a7713b1edbc 53 */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /** @addtogroup DCMI DCMI
AnnaBridge 171:3a7713b1edbc 56 * @brief DCMI HAL module driver
AnnaBridge 171:3a7713b1edbc 57 * @{
AnnaBridge 171:3a7713b1edbc 58 */
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 61 /** @defgroup DCMI_Exported_Types DCMI Exported Types
AnnaBridge 171:3a7713b1edbc 62 * @{
AnnaBridge 171:3a7713b1edbc 63 */
AnnaBridge 171:3a7713b1edbc 64 /**
AnnaBridge 171:3a7713b1edbc 65 * @brief DCMI Embedded Synchronisation CODE Init structure definition
AnnaBridge 171:3a7713b1edbc 66 */
AnnaBridge 171:3a7713b1edbc 67 typedef struct
AnnaBridge 171:3a7713b1edbc 68 {
AnnaBridge 171:3a7713b1edbc 69 uint8_t FrameStartCode; /*!< Specifies the code of the frame start delimiter. */
AnnaBridge 171:3a7713b1edbc 70 uint8_t LineStartCode; /*!< Specifies the code of the line start delimiter. */
AnnaBridge 171:3a7713b1edbc 71 uint8_t LineEndCode; /*!< Specifies the code of the line end delimiter. */
AnnaBridge 171:3a7713b1edbc 72 uint8_t FrameEndCode; /*!< Specifies the code of the frame end delimiter. */
AnnaBridge 171:3a7713b1edbc 73 }DCMI_CodesInitTypeDef;
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 /**
AnnaBridge 171:3a7713b1edbc 76 * @brief DCMI Init structure definition
AnnaBridge 171:3a7713b1edbc 77 */
AnnaBridge 171:3a7713b1edbc 78 typedef struct
AnnaBridge 171:3a7713b1edbc 79 {
AnnaBridge 171:3a7713b1edbc 80 uint32_t SynchroMode; /*!< Specifies the Synchronization Mode: Hardware or Embedded.
AnnaBridge 171:3a7713b1edbc 81 This parameter can be a value of @ref DCMI_Synchronization_Mode */
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 uint32_t PCKPolarity; /*!< Specifies the Pixel clock polarity: Falling or Rising.
AnnaBridge 171:3a7713b1edbc 84 This parameter can be a value of @ref DCMI_PIXCK_Polarity */
AnnaBridge 171:3a7713b1edbc 85
AnnaBridge 171:3a7713b1edbc 86 uint32_t VSPolarity; /*!< Specifies the Vertical synchronization polarity: High or Low.
AnnaBridge 171:3a7713b1edbc 87 This parameter can be a value of @ref DCMI_VSYNC_Polarity */
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 uint32_t HSPolarity; /*!< Specifies the Horizontal synchronization polarity: High or Low.
AnnaBridge 171:3a7713b1edbc 90 This parameter can be a value of @ref DCMI_HSYNC_Polarity */
AnnaBridge 171:3a7713b1edbc 91
AnnaBridge 171:3a7713b1edbc 92 uint32_t CaptureRate; /*!< Specifies the frequency of frame capture: All, 1/2 or 1/4.
AnnaBridge 171:3a7713b1edbc 93 This parameter can be a value of @ref DCMI_Capture_Rate */
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 uint32_t ExtendedDataMode; /*!< Specifies the data width: 8-bit, 10-bit, 12-bit or 14-bit.
AnnaBridge 171:3a7713b1edbc 96 This parameter can be a value of @ref DCMI_Extended_Data_Mode */
AnnaBridge 171:3a7713b1edbc 97
AnnaBridge 171:3a7713b1edbc 98 DCMI_CodesInitTypeDef SyncroCode; /*!< Specifies the code of the frame start delimiter. */
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 uint32_t JPEGMode; /*!< Enable or Disable the JPEG mode.
AnnaBridge 171:3a7713b1edbc 101 This parameter can be a value of @ref DCMI_MODE_JPEG */
AnnaBridge 171:3a7713b1edbc 102
AnnaBridge 171:3a7713b1edbc 103 }DCMI_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 /**
AnnaBridge 171:3a7713b1edbc 106 * @brief HAL DCMI State structures definition
AnnaBridge 171:3a7713b1edbc 107 */
AnnaBridge 171:3a7713b1edbc 108 typedef enum
AnnaBridge 171:3a7713b1edbc 109 {
AnnaBridge 171:3a7713b1edbc 110 HAL_DCMI_STATE_RESET = 0x00U, /*!< DCMI not yet initialized or disabled */
AnnaBridge 171:3a7713b1edbc 111 HAL_DCMI_STATE_READY = 0x01U, /*!< DCMI initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 112 HAL_DCMI_STATE_BUSY = 0x02U, /*!< DCMI internal processing is ongoing */
AnnaBridge 171:3a7713b1edbc 113 HAL_DCMI_STATE_TIMEOUT = 0x03U, /*!< DCMI timeout state */
AnnaBridge 171:3a7713b1edbc 114 HAL_DCMI_STATE_ERROR = 0x04U, /*!< DCMI error state */
AnnaBridge 171:3a7713b1edbc 115 HAL_DCMI_STATE_SUSPENDED = 0x05U /*!< DCMI suspend state */
AnnaBridge 171:3a7713b1edbc 116 }HAL_DCMI_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 /**
AnnaBridge 171:3a7713b1edbc 119 * @brief DCMI handle Structure definition
AnnaBridge 171:3a7713b1edbc 120 */
AnnaBridge 171:3a7713b1edbc 121 typedef struct
AnnaBridge 171:3a7713b1edbc 122 {
AnnaBridge 171:3a7713b1edbc 123 DCMI_TypeDef *Instance; /*!< DCMI Register base address */
AnnaBridge 171:3a7713b1edbc 124
AnnaBridge 171:3a7713b1edbc 125 DCMI_InitTypeDef Init; /*!< DCMI parameters */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 HAL_LockTypeDef Lock; /*!< DCMI locking object */
AnnaBridge 171:3a7713b1edbc 128
AnnaBridge 171:3a7713b1edbc 129 __IO HAL_DCMI_StateTypeDef State; /*!< DCMI state */
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 __IO uint32_t XferCount; /*!< DMA transfer counter */
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 __IO uint32_t XferSize; /*!< DMA transfer size */
AnnaBridge 171:3a7713b1edbc 134
AnnaBridge 171:3a7713b1edbc 135 uint32_t XferTransferNumber; /*!< DMA transfer number */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 uint32_t pBuffPtr; /*!< Pointer to DMA output buffer */
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 DMA_HandleTypeDef *DMA_Handle; /*!< Pointer to the DMA handler */
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 __IO uint32_t ErrorCode; /*!< DCMI Error code */
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 }DCMI_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 144 /**
AnnaBridge 171:3a7713b1edbc 145 * @}
AnnaBridge 171:3a7713b1edbc 146 */
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 149 /** @defgroup DCMI_Exported_Constants DCMI Exported Constants
AnnaBridge 171:3a7713b1edbc 150 * @{
AnnaBridge 171:3a7713b1edbc 151 */
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /** @defgroup DCMI_Error_Code DCMI Error Code
AnnaBridge 171:3a7713b1edbc 154 * @{
AnnaBridge 171:3a7713b1edbc 155 */
AnnaBridge 171:3a7713b1edbc 156 #define HAL_DCMI_ERROR_NONE 0x00000000U /*!< No error */
AnnaBridge 171:3a7713b1edbc 157 #define HAL_DCMI_ERROR_OVR 0x00000001U /*!< Overrun error */
AnnaBridge 171:3a7713b1edbc 158 #define HAL_DCMI_ERROR_SYNC 0x00000002U /*!< Synchronization error */
AnnaBridge 171:3a7713b1edbc 159 #define HAL_DCMI_ERROR_TIMEOUT 0x00000020U /*!< Timeout error */
AnnaBridge 171:3a7713b1edbc 160 #define HAL_DCMI_ERROR_DMA 0x00000040U /*!< DMA error */
AnnaBridge 171:3a7713b1edbc 161 /**
AnnaBridge 171:3a7713b1edbc 162 * @}
AnnaBridge 171:3a7713b1edbc 163 */
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 /** @defgroup DCMI_Capture_Mode DCMI Capture Mode
AnnaBridge 171:3a7713b1edbc 166 * @{
AnnaBridge 171:3a7713b1edbc 167 */
AnnaBridge 171:3a7713b1edbc 168 #define DCMI_MODE_CONTINUOUS 0x00000000U /*!< The received data are transferred continuously
AnnaBridge 171:3a7713b1edbc 169 into the destination memory through the DMA */
AnnaBridge 171:3a7713b1edbc 170 #define DCMI_MODE_SNAPSHOT ((uint32_t)DCMI_CR_CM) /*!< Once activated, the interface waits for the start of
AnnaBridge 171:3a7713b1edbc 171 frame and then transfers a single frame through the DMA */
AnnaBridge 171:3a7713b1edbc 172 /**
AnnaBridge 171:3a7713b1edbc 173 * @}
AnnaBridge 171:3a7713b1edbc 174 */
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 /** @defgroup DCMI_Synchronization_Mode DCMI Synchronization Mode
AnnaBridge 171:3a7713b1edbc 177 * @{
AnnaBridge 171:3a7713b1edbc 178 */
AnnaBridge 171:3a7713b1edbc 179 #define DCMI_SYNCHRO_HARDWARE 0x00000000U /*!< Hardware synchronization data capture (frame/line start/stop)
AnnaBridge 171:3a7713b1edbc 180 is synchronized with the HSYNC/VSYNC signals */
AnnaBridge 171:3a7713b1edbc 181 #define DCMI_SYNCHRO_EMBEDDED ((uint32_t)DCMI_CR_ESS) /*!< Embedded synchronization data capture is synchronized with
AnnaBridge 171:3a7713b1edbc 182 synchronization codes embedded in the data flow */
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 /**
AnnaBridge 171:3a7713b1edbc 185 * @}
AnnaBridge 171:3a7713b1edbc 186 */
AnnaBridge 171:3a7713b1edbc 187
AnnaBridge 171:3a7713b1edbc 188 /** @defgroup DCMI_PIXCK_Polarity DCMI PIXCK Polarity
AnnaBridge 171:3a7713b1edbc 189 * @{
AnnaBridge 171:3a7713b1edbc 190 */
AnnaBridge 171:3a7713b1edbc 191 #define DCMI_PCKPOLARITY_FALLING 0x00000000U /*!< Pixel clock active on Falling edge */
AnnaBridge 171:3a7713b1edbc 192 #define DCMI_PCKPOLARITY_RISING ((uint32_t)DCMI_CR_PCKPOL) /*!< Pixel clock active on Rising edge */
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 /**
AnnaBridge 171:3a7713b1edbc 195 * @}
AnnaBridge 171:3a7713b1edbc 196 */
AnnaBridge 171:3a7713b1edbc 197
AnnaBridge 171:3a7713b1edbc 198 /** @defgroup DCMI_VSYNC_Polarity DCMI VSYNC Polarity
AnnaBridge 171:3a7713b1edbc 199 * @{
AnnaBridge 171:3a7713b1edbc 200 */
AnnaBridge 171:3a7713b1edbc 201 #define DCMI_VSPOLARITY_LOW 0x00000000U /*!< Vertical synchronization active Low */
AnnaBridge 171:3a7713b1edbc 202 #define DCMI_VSPOLARITY_HIGH ((uint32_t)DCMI_CR_VSPOL) /*!< Vertical synchronization active High */
AnnaBridge 171:3a7713b1edbc 203
AnnaBridge 171:3a7713b1edbc 204 /**
AnnaBridge 171:3a7713b1edbc 205 * @}
AnnaBridge 171:3a7713b1edbc 206 */
AnnaBridge 171:3a7713b1edbc 207
AnnaBridge 171:3a7713b1edbc 208 /** @defgroup DCMI_HSYNC_Polarity DCMI HSYNC Polarity
AnnaBridge 171:3a7713b1edbc 209 * @{
AnnaBridge 171:3a7713b1edbc 210 */
AnnaBridge 171:3a7713b1edbc 211 #define DCMI_HSPOLARITY_LOW 0x00000000U /*!< Horizontal synchronization active Low */
AnnaBridge 171:3a7713b1edbc 212 #define DCMI_HSPOLARITY_HIGH ((uint32_t)DCMI_CR_HSPOL) /*!< Horizontal synchronization active High */
AnnaBridge 171:3a7713b1edbc 213
AnnaBridge 171:3a7713b1edbc 214 /**
AnnaBridge 171:3a7713b1edbc 215 * @}
AnnaBridge 171:3a7713b1edbc 216 */
AnnaBridge 171:3a7713b1edbc 217
AnnaBridge 171:3a7713b1edbc 218 /** @defgroup DCMI_MODE_JPEG DCMI MODE JPEG
AnnaBridge 171:3a7713b1edbc 219 * @{
AnnaBridge 171:3a7713b1edbc 220 */
AnnaBridge 171:3a7713b1edbc 221 #define DCMI_JPEG_DISABLE 0x00000000U /*!< Mode JPEG Disabled */
AnnaBridge 171:3a7713b1edbc 222 #define DCMI_JPEG_ENABLE ((uint32_t)DCMI_CR_JPEG) /*!< Mode JPEG Enabled */
AnnaBridge 171:3a7713b1edbc 223
AnnaBridge 171:3a7713b1edbc 224 /**
AnnaBridge 171:3a7713b1edbc 225 * @}
AnnaBridge 171:3a7713b1edbc 226 */
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /** @defgroup DCMI_Capture_Rate DCMI Capture Rate
AnnaBridge 171:3a7713b1edbc 229 * @{
AnnaBridge 171:3a7713b1edbc 230 */
AnnaBridge 171:3a7713b1edbc 231 #define DCMI_CR_ALL_FRAME 0x00000000U /*!< All frames are captured */
AnnaBridge 171:3a7713b1edbc 232 #define DCMI_CR_ALTERNATE_2_FRAME ((uint32_t)DCMI_CR_FCRC_0) /*!< Every alternate frame captured */
AnnaBridge 171:3a7713b1edbc 233 #define DCMI_CR_ALTERNATE_4_FRAME ((uint32_t)DCMI_CR_FCRC_1) /*!< One frame in 4 frames captured */
AnnaBridge 171:3a7713b1edbc 234
AnnaBridge 171:3a7713b1edbc 235 /**
AnnaBridge 171:3a7713b1edbc 236 * @}
AnnaBridge 171:3a7713b1edbc 237 */
AnnaBridge 171:3a7713b1edbc 238
AnnaBridge 171:3a7713b1edbc 239 /** @defgroup DCMI_Extended_Data_Mode DCMI Extended Data Mode
AnnaBridge 171:3a7713b1edbc 240 * @{
AnnaBridge 171:3a7713b1edbc 241 */
AnnaBridge 171:3a7713b1edbc 242 #define DCMI_EXTEND_DATA_8B 0x00000000U /*!< Interface captures 8-bit data on every pixel clock */
AnnaBridge 171:3a7713b1edbc 243 #define DCMI_EXTEND_DATA_10B ((uint32_t)DCMI_CR_EDM_0) /*!< Interface captures 10-bit data on every pixel clock */
AnnaBridge 171:3a7713b1edbc 244 #define DCMI_EXTEND_DATA_12B ((uint32_t)DCMI_CR_EDM_1) /*!< Interface captures 12-bit data on every pixel clock */
AnnaBridge 171:3a7713b1edbc 245 #define DCMI_EXTEND_DATA_14B ((uint32_t)(DCMI_CR_EDM_0 | DCMI_CR_EDM_1)) /*!< Interface captures 14-bit data on every pixel clock */
AnnaBridge 171:3a7713b1edbc 246
AnnaBridge 171:3a7713b1edbc 247 /**
AnnaBridge 171:3a7713b1edbc 248 * @}
AnnaBridge 171:3a7713b1edbc 249 */
AnnaBridge 171:3a7713b1edbc 250
AnnaBridge 171:3a7713b1edbc 251 /** @defgroup DCMI_Window_Coordinate DCMI Window Coordinate
AnnaBridge 171:3a7713b1edbc 252 * @{
AnnaBridge 171:3a7713b1edbc 253 */
AnnaBridge 171:3a7713b1edbc 254 #define DCMI_WINDOW_COORDINATE 0x3FFFU /*!< Window coordinate */
AnnaBridge 171:3a7713b1edbc 255
AnnaBridge 171:3a7713b1edbc 256 /**
AnnaBridge 171:3a7713b1edbc 257 * @}
AnnaBridge 171:3a7713b1edbc 258 */
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 /** @defgroup DCMI_Window_Height DCMI Window Height
AnnaBridge 171:3a7713b1edbc 261 * @{
AnnaBridge 171:3a7713b1edbc 262 */
AnnaBridge 171:3a7713b1edbc 263 #define DCMI_WINDOW_HEIGHT 0x1FFFU /*!< Window Height */
AnnaBridge 171:3a7713b1edbc 264
AnnaBridge 171:3a7713b1edbc 265 /**
AnnaBridge 171:3a7713b1edbc 266 * @}
AnnaBridge 171:3a7713b1edbc 267 */
AnnaBridge 171:3a7713b1edbc 268
AnnaBridge 171:3a7713b1edbc 269 /** @defgroup DCMI_Window_Vertical_Line DCMI Window Vertical Line
AnnaBridge 171:3a7713b1edbc 270 * @{
AnnaBridge 171:3a7713b1edbc 271 */
AnnaBridge 171:3a7713b1edbc 272 #define DCMI_POSITION_CWSIZE_VLINE (uint32_t)POSITION_VAL(DCMI_CWSIZE_VLINE) /*!< Required left shift to set crop window vertical line count */
AnnaBridge 171:3a7713b1edbc 273 #define DCMI_POSITION_CWSTRT_VST (uint32_t)POSITION_VAL(DCMI_CWSTRT_VST) /*!< Required left shift to set crop window vertical start line count */
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 /**
AnnaBridge 171:3a7713b1edbc 276 * @}
AnnaBridge 171:3a7713b1edbc 277 */
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 /** @defgroup DCMI_interrupt_sources DCMI interrupt sources
AnnaBridge 171:3a7713b1edbc 280 * @{
AnnaBridge 171:3a7713b1edbc 281 */
AnnaBridge 171:3a7713b1edbc 282 #define DCMI_IT_FRAME ((uint32_t)DCMI_IER_FRAME_IE) /*!< Capture complete interrupt */
AnnaBridge 171:3a7713b1edbc 283 #define DCMI_IT_OVR ((uint32_t)DCMI_IER_OVR_IE) /*!< Overrun interrupt */
AnnaBridge 171:3a7713b1edbc 284 #define DCMI_IT_ERR ((uint32_t)DCMI_IER_ERR_IE) /*!< Synchronization error interrupt */
AnnaBridge 171:3a7713b1edbc 285 #define DCMI_IT_VSYNC ((uint32_t)DCMI_IER_VSYNC_IE) /*!< VSYNC interrupt */
AnnaBridge 171:3a7713b1edbc 286 #define DCMI_IT_LINE ((uint32_t)DCMI_IER_LINE_IE) /*!< Line interrupt */
AnnaBridge 171:3a7713b1edbc 287 /**
AnnaBridge 171:3a7713b1edbc 288 * @}
AnnaBridge 171:3a7713b1edbc 289 */
AnnaBridge 171:3a7713b1edbc 290
AnnaBridge 171:3a7713b1edbc 291 /** @defgroup DCMI_Flags DCMI Flags
AnnaBridge 171:3a7713b1edbc 292 * @{
AnnaBridge 171:3a7713b1edbc 293 */
AnnaBridge 171:3a7713b1edbc 294
AnnaBridge 171:3a7713b1edbc 295 /**
AnnaBridge 171:3a7713b1edbc 296 * @brief DCMI SR register
AnnaBridge 171:3a7713b1edbc 297 */
AnnaBridge 171:3a7713b1edbc 298 #define DCMI_FLAG_HSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_HSYNC) /*!< HSYNC pin state (active line / synchronization between lines) */
AnnaBridge 171:3a7713b1edbc 299 #define DCMI_FLAG_VSYNC ((uint32_t)DCMI_SR_INDEX|DCMI_SR_VSYNC) /*!< VSYNC pin state (active frame / synchronization between frames) */
AnnaBridge 171:3a7713b1edbc 300 #define DCMI_FLAG_FNE ((uint32_t)DCMI_SR_INDEX|DCMI_SR_FNE) /*!< FIFO not empty flag */
AnnaBridge 171:3a7713b1edbc 301 /**
AnnaBridge 171:3a7713b1edbc 302 * @brief DCMI RIS register
AnnaBridge 171:3a7713b1edbc 303 */
AnnaBridge 171:3a7713b1edbc 304 #define DCMI_FLAG_FRAMERI ((uint32_t)DCMI_RIS_FRAME_RIS) /*!< Frame capture complete interrupt flag */
AnnaBridge 171:3a7713b1edbc 305 #define DCMI_FLAG_OVRRI ((uint32_t)DCMI_RIS_OVR_RIS) /*!< Overrun interrupt flag */
AnnaBridge 171:3a7713b1edbc 306 #define DCMI_FLAG_ERRRI ((uint32_t)DCMI_RIS_ERR_RIS) /*!< Synchronization error interrupt flag */
AnnaBridge 171:3a7713b1edbc 307 #define DCMI_FLAG_VSYNCRI ((uint32_t)DCMI_RIS_VSYNC_RIS) /*!< VSYNC interrupt flag */
AnnaBridge 171:3a7713b1edbc 308 #define DCMI_FLAG_LINERI ((uint32_t)DCMI_RIS_LINE_RIS) /*!< Line interrupt flag */
AnnaBridge 171:3a7713b1edbc 309 /**
AnnaBridge 171:3a7713b1edbc 310 * @brief DCMI MIS register
AnnaBridge 171:3a7713b1edbc 311 */
AnnaBridge 171:3a7713b1edbc 312 #define DCMI_FLAG_FRAMEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_FRAME_MIS) /*!< DCMI Frame capture complete masked interrupt status */
AnnaBridge 171:3a7713b1edbc 313 #define DCMI_FLAG_OVRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_OVR_MIS ) /*!< DCMI Overrun masked interrupt status */
AnnaBridge 171:3a7713b1edbc 314 #define DCMI_FLAG_ERRMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_ERR_MIS ) /*!< DCMI Synchronization error masked interrupt status */
AnnaBridge 171:3a7713b1edbc 315 #define DCMI_FLAG_VSYNCMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_VSYNC_MIS) /*!< DCMI VSYNC masked interrupt status */
AnnaBridge 171:3a7713b1edbc 316 #define DCMI_FLAG_LINEMI ((uint32_t)DCMI_MIS_INDEX|DCMI_MIS_LINE_MIS ) /*!< DCMI Line masked interrupt status */
AnnaBridge 171:3a7713b1edbc 317 /**
AnnaBridge 171:3a7713b1edbc 318 * @}
AnnaBridge 171:3a7713b1edbc 319 */
AnnaBridge 171:3a7713b1edbc 320
AnnaBridge 171:3a7713b1edbc 321 /**
AnnaBridge 171:3a7713b1edbc 322 * @}
AnnaBridge 171:3a7713b1edbc 323 */
AnnaBridge 171:3a7713b1edbc 324
AnnaBridge 171:3a7713b1edbc 325 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 326 /** @defgroup DCMI_Exported_Macros DCMI Exported Macros
AnnaBridge 171:3a7713b1edbc 327 * @{
AnnaBridge 171:3a7713b1edbc 328 */
AnnaBridge 171:3a7713b1edbc 329
AnnaBridge 171:3a7713b1edbc 330 /** @brief Reset DCMI handle state
AnnaBridge 171:3a7713b1edbc 331 * @param __HANDLE__: specifies the DCMI handle.
AnnaBridge 171:3a7713b1edbc 332 * @retval None
AnnaBridge 171:3a7713b1edbc 333 */
AnnaBridge 171:3a7713b1edbc 334 #define __HAL_DCMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DCMI_STATE_RESET)
AnnaBridge 171:3a7713b1edbc 335
AnnaBridge 171:3a7713b1edbc 336 /**
AnnaBridge 171:3a7713b1edbc 337 * @brief Enable the DCMI.
AnnaBridge 171:3a7713b1edbc 338 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 339 * @retval None
AnnaBridge 171:3a7713b1edbc 340 */
AnnaBridge 171:3a7713b1edbc 341 #define __HAL_DCMI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= DCMI_CR_ENABLE)
AnnaBridge 171:3a7713b1edbc 342
AnnaBridge 171:3a7713b1edbc 343 /**
AnnaBridge 171:3a7713b1edbc 344 * @brief Disable the DCMI.
AnnaBridge 171:3a7713b1edbc 345 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 346 * @retval None
AnnaBridge 171:3a7713b1edbc 347 */
AnnaBridge 171:3a7713b1edbc 348 #define __HAL_DCMI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(DCMI_CR_ENABLE))
AnnaBridge 171:3a7713b1edbc 349
AnnaBridge 171:3a7713b1edbc 350 /* Interrupt & Flag management */
AnnaBridge 171:3a7713b1edbc 351 /**
AnnaBridge 171:3a7713b1edbc 352 * @brief Get the DCMI pending flag.
AnnaBridge 171:3a7713b1edbc 353 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 354 * @param __FLAG__: Get the specified flag.
AnnaBridge 171:3a7713b1edbc 355 * This parameter can be one of the following values (no combination allowed)
AnnaBridge 171:3a7713b1edbc 356 * @arg DCMI_FLAG_HSYNC: HSYNC pin state (active line / synchronization between lines)
AnnaBridge 171:3a7713b1edbc 357 * @arg DCMI_FLAG_VSYNC: VSYNC pin state (active frame / synchronization between frames)
AnnaBridge 171:3a7713b1edbc 358 * @arg DCMI_FLAG_FNE: FIFO empty flag
AnnaBridge 171:3a7713b1edbc 359 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
AnnaBridge 171:3a7713b1edbc 360 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
AnnaBridge 171:3a7713b1edbc 361 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
AnnaBridge 171:3a7713b1edbc 362 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
AnnaBridge 171:3a7713b1edbc 363 * @arg DCMI_FLAG_LINERI: Line flag mask
AnnaBridge 171:3a7713b1edbc 364 * @arg DCMI_FLAG_FRAMEMI: DCMI Capture complete masked interrupt status
AnnaBridge 171:3a7713b1edbc 365 * @arg DCMI_FLAG_OVRMI: DCMI Overrun masked interrupt status
AnnaBridge 171:3a7713b1edbc 366 * @arg DCMI_FLAG_ERRMI: DCMI Synchronization error masked interrupt status
AnnaBridge 171:3a7713b1edbc 367 * @arg DCMI_FLAG_VSYNCMI: DCMI VSYNC masked interrupt status
AnnaBridge 171:3a7713b1edbc 368 * @arg DCMI_FLAG_LINEMI: DCMI Line masked interrupt status
AnnaBridge 171:3a7713b1edbc 369 * @retval The state of FLAG.
AnnaBridge 171:3a7713b1edbc 370 */
AnnaBridge 171:3a7713b1edbc 371 #define __HAL_DCMI_GET_FLAG(__HANDLE__, __FLAG__)\
AnnaBridge 171:3a7713b1edbc 372 ((((__FLAG__) & (DCMI_SR_INDEX|DCMI_MIS_INDEX)) == 0x0U)? ((__HANDLE__)->Instance->RIS & (__FLAG__)) :\
AnnaBridge 171:3a7713b1edbc 373 (((__FLAG__) & DCMI_SR_INDEX) == 0x0U)? ((__HANDLE__)->Instance->MIS & (__FLAG__)) : ((__HANDLE__)->Instance->SR & (__FLAG__)))
AnnaBridge 171:3a7713b1edbc 374
AnnaBridge 171:3a7713b1edbc 375 /**
AnnaBridge 171:3a7713b1edbc 376 * @brief Clear the DCMI pending flags.
AnnaBridge 171:3a7713b1edbc 377 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 378 * @param __FLAG__: specifies the flag to clear.
AnnaBridge 171:3a7713b1edbc 379 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 380 * @arg DCMI_FLAG_FRAMERI: Frame capture complete flag mask
AnnaBridge 171:3a7713b1edbc 381 * @arg DCMI_FLAG_OVRRI: Overrun flag mask
AnnaBridge 171:3a7713b1edbc 382 * @arg DCMI_FLAG_ERRRI: Synchronization error flag mask
AnnaBridge 171:3a7713b1edbc 383 * @arg DCMI_FLAG_VSYNCRI: VSYNC flag mask
AnnaBridge 171:3a7713b1edbc 384 * @arg DCMI_FLAG_LINERI: Line flag mask
AnnaBridge 171:3a7713b1edbc 385 * @retval None
AnnaBridge 171:3a7713b1edbc 386 */
AnnaBridge 171:3a7713b1edbc 387 #define __HAL_DCMI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 171:3a7713b1edbc 388
AnnaBridge 171:3a7713b1edbc 389 /**
AnnaBridge 171:3a7713b1edbc 390 * @brief Enable the specified DCMI interrupts.
AnnaBridge 171:3a7713b1edbc 391 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 392 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
AnnaBridge 171:3a7713b1edbc 393 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 394 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
AnnaBridge 171:3a7713b1edbc 395 * @arg DCMI_IT_OVR: Overrun interrupt mask
AnnaBridge 171:3a7713b1edbc 396 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
AnnaBridge 171:3a7713b1edbc 397 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
AnnaBridge 171:3a7713b1edbc 398 * @arg DCMI_IT_LINE: Line interrupt mask
AnnaBridge 171:3a7713b1edbc 399 * @retval None
AnnaBridge 171:3a7713b1edbc 400 */
AnnaBridge 171:3a7713b1edbc 401 #define __HAL_DCMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 402
AnnaBridge 171:3a7713b1edbc 403 /**
AnnaBridge 171:3a7713b1edbc 404 * @brief Disable the specified DCMI interrupts.
AnnaBridge 171:3a7713b1edbc 405 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 406 * @param __INTERRUPT__: specifies the DCMI interrupt sources to be enabled.
AnnaBridge 171:3a7713b1edbc 407 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 408 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
AnnaBridge 171:3a7713b1edbc 409 * @arg DCMI_IT_OVR: Overrun interrupt mask
AnnaBridge 171:3a7713b1edbc 410 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
AnnaBridge 171:3a7713b1edbc 411 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
AnnaBridge 171:3a7713b1edbc 412 * @arg DCMI_IT_LINE: Line interrupt mask
AnnaBridge 171:3a7713b1edbc 413 * @retval None
AnnaBridge 171:3a7713b1edbc 414 */
AnnaBridge 171:3a7713b1edbc 415 #define __HAL_DCMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 416
AnnaBridge 171:3a7713b1edbc 417 /**
AnnaBridge 171:3a7713b1edbc 418 * @brief Check whether the specified DCMI interrupt has occurred or not.
AnnaBridge 171:3a7713b1edbc 419 * @param __HANDLE__: DCMI handle
AnnaBridge 171:3a7713b1edbc 420 * @param __INTERRUPT__: specifies the DCMI interrupt source to check.
AnnaBridge 171:3a7713b1edbc 421 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 422 * @arg DCMI_IT_FRAME: Frame capture complete interrupt mask
AnnaBridge 171:3a7713b1edbc 423 * @arg DCMI_IT_OVR: Overrun interrupt mask
AnnaBridge 171:3a7713b1edbc 424 * @arg DCMI_IT_ERR: Synchronization error interrupt mask
AnnaBridge 171:3a7713b1edbc 425 * @arg DCMI_IT_VSYNC: VSYNC interrupt mask
AnnaBridge 171:3a7713b1edbc 426 * @arg DCMI_IT_LINE: Line interrupt mask
AnnaBridge 171:3a7713b1edbc 427 * @retval The state of INTERRUPT.
AnnaBridge 171:3a7713b1edbc 428 */
AnnaBridge 171:3a7713b1edbc 429 #define __HAL_DCMI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->MISR & (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 430
AnnaBridge 171:3a7713b1edbc 431 /**
AnnaBridge 171:3a7713b1edbc 432 * @}
AnnaBridge 171:3a7713b1edbc 433 */
AnnaBridge 171:3a7713b1edbc 434
AnnaBridge 171:3a7713b1edbc 435 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 436 /** @addtogroup DCMI_Exported_Functions DCMI Exported Functions
AnnaBridge 171:3a7713b1edbc 437 * @{
AnnaBridge 171:3a7713b1edbc 438 */
AnnaBridge 171:3a7713b1edbc 439
AnnaBridge 171:3a7713b1edbc 440 /** @addtogroup DCMI_Exported_Functions_Group1 Initialization and Configuration functions
AnnaBridge 171:3a7713b1edbc 441 * @{
AnnaBridge 171:3a7713b1edbc 442 */
AnnaBridge 171:3a7713b1edbc 443 /* Initialization and de-initialization functions *****************************/
AnnaBridge 171:3a7713b1edbc 444 HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 445 HAL_StatusTypeDef HAL_DCMI_DeInit(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 446 void HAL_DCMI_MspInit(DCMI_HandleTypeDef* hdcmi);
AnnaBridge 171:3a7713b1edbc 447 void HAL_DCMI_MspDeInit(DCMI_HandleTypeDef* hdcmi);
AnnaBridge 171:3a7713b1edbc 448 /**
AnnaBridge 171:3a7713b1edbc 449 * @}
AnnaBridge 171:3a7713b1edbc 450 */
AnnaBridge 171:3a7713b1edbc 451
AnnaBridge 171:3a7713b1edbc 452 /** @addtogroup DCMI_Exported_Functions_Group2 IO operation functions
AnnaBridge 171:3a7713b1edbc 453 * @{
AnnaBridge 171:3a7713b1edbc 454 */
AnnaBridge 171:3a7713b1edbc 455 /* IO operation functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 456 HAL_StatusTypeDef HAL_DCMI_Start_DMA(DCMI_HandleTypeDef* hdcmi, uint32_t DCMI_Mode, uint32_t pData, uint32_t Length);
AnnaBridge 171:3a7713b1edbc 457 HAL_StatusTypeDef HAL_DCMI_Stop(DCMI_HandleTypeDef* hdcmi);
AnnaBridge 171:3a7713b1edbc 458 HAL_StatusTypeDef HAL_DCMI_Suspend(DCMI_HandleTypeDef* hdcmi);
AnnaBridge 171:3a7713b1edbc 459 HAL_StatusTypeDef HAL_DCMI_Resume(DCMI_HandleTypeDef* hdcmi);
AnnaBridge 171:3a7713b1edbc 460 void HAL_DCMI_ErrorCallback(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 461 void HAL_DCMI_LineEventCallback(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 462 void HAL_DCMI_FrameEventCallback(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 463 void HAL_DCMI_VsyncEventCallback(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 464 void HAL_DCMI_VsyncCallback(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 465 void HAL_DCMI_HsyncCallback(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 466 void HAL_DCMI_IRQHandler(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 467 /**
AnnaBridge 171:3a7713b1edbc 468 * @}
AnnaBridge 171:3a7713b1edbc 469 */
AnnaBridge 171:3a7713b1edbc 470
AnnaBridge 171:3a7713b1edbc 471 /** @addtogroup DCMI_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 472 * @{
AnnaBridge 171:3a7713b1edbc 473 */
AnnaBridge 171:3a7713b1edbc 474 /* Peripheral Control functions ***********************************************/
AnnaBridge 171:3a7713b1edbc 475 HAL_StatusTypeDef HAL_DCMI_ConfigCrop(DCMI_HandleTypeDef *hdcmi, uint32_t X0, uint32_t Y0, uint32_t XSize, uint32_t YSize);
AnnaBridge 171:3a7713b1edbc 476 HAL_StatusTypeDef HAL_DCMI_EnableCrop(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 477 HAL_StatusTypeDef HAL_DCMI_DisableCrop(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 478 /**
AnnaBridge 171:3a7713b1edbc 479 * @}
AnnaBridge 171:3a7713b1edbc 480 */
AnnaBridge 171:3a7713b1edbc 481
AnnaBridge 171:3a7713b1edbc 482 /** @addtogroup DCMI_Exported_Functions_Group4 Peripheral State functions
AnnaBridge 171:3a7713b1edbc 483 * @{
AnnaBridge 171:3a7713b1edbc 484 */
AnnaBridge 171:3a7713b1edbc 485 /* Peripheral State functions *************************************************/
AnnaBridge 171:3a7713b1edbc 486 HAL_DCMI_StateTypeDef HAL_DCMI_GetState(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 487 uint32_t HAL_DCMI_GetError(DCMI_HandleTypeDef *hdcmi);
AnnaBridge 171:3a7713b1edbc 488 /**
AnnaBridge 171:3a7713b1edbc 489 * @}
AnnaBridge 171:3a7713b1edbc 490 */
AnnaBridge 171:3a7713b1edbc 491
AnnaBridge 171:3a7713b1edbc 492 /**
AnnaBridge 171:3a7713b1edbc 493 * @}
AnnaBridge 171:3a7713b1edbc 494 */
AnnaBridge 171:3a7713b1edbc 495
AnnaBridge 171:3a7713b1edbc 496 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 497 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 498 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 499 /** @defgroup DCMI_Private_Constants DCMI Private Constants
AnnaBridge 171:3a7713b1edbc 500 * @{
AnnaBridge 171:3a7713b1edbc 501 */
AnnaBridge 171:3a7713b1edbc 502 #define DCMI_MIS_INDEX 0x1000U /*!< DCMI MIS register index */
AnnaBridge 171:3a7713b1edbc 503 #define DCMI_SR_INDEX 0x2000U /*!< DCMI SR register index */
AnnaBridge 171:3a7713b1edbc 504 /**
AnnaBridge 171:3a7713b1edbc 505 * @}
AnnaBridge 171:3a7713b1edbc 506 */
AnnaBridge 171:3a7713b1edbc 507 /* Private macro -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 508 /** @defgroup DCMI_Private_Macros DCMI Private Macros
AnnaBridge 171:3a7713b1edbc 509 * @{
AnnaBridge 171:3a7713b1edbc 510 */
AnnaBridge 171:3a7713b1edbc 511 #define IS_DCMI_CAPTURE_MODE(MODE)(((MODE) == DCMI_MODE_CONTINUOUS) || \
AnnaBridge 171:3a7713b1edbc 512 ((MODE) == DCMI_MODE_SNAPSHOT))
AnnaBridge 171:3a7713b1edbc 513
AnnaBridge 171:3a7713b1edbc 514 #define IS_DCMI_SYNCHRO(MODE)(((MODE) == DCMI_SYNCHRO_HARDWARE) || \
AnnaBridge 171:3a7713b1edbc 515 ((MODE) == DCMI_SYNCHRO_EMBEDDED))
AnnaBridge 171:3a7713b1edbc 516
AnnaBridge 171:3a7713b1edbc 517 #define IS_DCMI_PCKPOLARITY(POLARITY)(((POLARITY) == DCMI_PCKPOLARITY_FALLING) || \
AnnaBridge 171:3a7713b1edbc 518 ((POLARITY) == DCMI_PCKPOLARITY_RISING))
AnnaBridge 171:3a7713b1edbc 519
AnnaBridge 171:3a7713b1edbc 520 #define IS_DCMI_VSPOLARITY(POLARITY)(((POLARITY) == DCMI_VSPOLARITY_LOW) || \
AnnaBridge 171:3a7713b1edbc 521 ((POLARITY) == DCMI_VSPOLARITY_HIGH))
AnnaBridge 171:3a7713b1edbc 522
AnnaBridge 171:3a7713b1edbc 523 #define IS_DCMI_HSPOLARITY(POLARITY)(((POLARITY) == DCMI_HSPOLARITY_LOW) || \
AnnaBridge 171:3a7713b1edbc 524 ((POLARITY) == DCMI_HSPOLARITY_HIGH))
AnnaBridge 171:3a7713b1edbc 525
AnnaBridge 171:3a7713b1edbc 526 #define IS_DCMI_MODE_JPEG(JPEG_MODE)(((JPEG_MODE) == DCMI_JPEG_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 527 ((JPEG_MODE) == DCMI_JPEG_ENABLE))
AnnaBridge 171:3a7713b1edbc 528
AnnaBridge 171:3a7713b1edbc 529 #define IS_DCMI_CAPTURE_RATE(RATE) (((RATE) == DCMI_CR_ALL_FRAME) || \
AnnaBridge 171:3a7713b1edbc 530 ((RATE) == DCMI_CR_ALTERNATE_2_FRAME) || \
AnnaBridge 171:3a7713b1edbc 531 ((RATE) == DCMI_CR_ALTERNATE_4_FRAME))
AnnaBridge 171:3a7713b1edbc 532
AnnaBridge 171:3a7713b1edbc 533 #define IS_DCMI_EXTENDED_DATA(DATA)(((DATA) == DCMI_EXTEND_DATA_8B) || \
AnnaBridge 171:3a7713b1edbc 534 ((DATA) == DCMI_EXTEND_DATA_10B) || \
AnnaBridge 171:3a7713b1edbc 535 ((DATA) == DCMI_EXTEND_DATA_12B) || \
AnnaBridge 171:3a7713b1edbc 536 ((DATA) == DCMI_EXTEND_DATA_14B))
AnnaBridge 171:3a7713b1edbc 537
AnnaBridge 171:3a7713b1edbc 538 #define IS_DCMI_WINDOW_COORDINATE(COORDINATE) ((COORDINATE) <= DCMI_WINDOW_COORDINATE)
AnnaBridge 171:3a7713b1edbc 539
AnnaBridge 171:3a7713b1edbc 540 #define IS_DCMI_WINDOW_HEIGHT(HEIGHT) ((HEIGHT) <= DCMI_WINDOW_HEIGHT)
AnnaBridge 171:3a7713b1edbc 541
AnnaBridge 171:3a7713b1edbc 542 /**
AnnaBridge 171:3a7713b1edbc 543 * @}
AnnaBridge 171:3a7713b1edbc 544 */
AnnaBridge 171:3a7713b1edbc 545
AnnaBridge 171:3a7713b1edbc 546 /* Private functions ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 547 /** @addtogroup DCMI_Private_Functions DCMI Private Functions
AnnaBridge 171:3a7713b1edbc 548 * @{
AnnaBridge 171:3a7713b1edbc 549 */
AnnaBridge 171:3a7713b1edbc 550
AnnaBridge 171:3a7713b1edbc 551 /**
AnnaBridge 171:3a7713b1edbc 552 * @}
AnnaBridge 171:3a7713b1edbc 553 */
AnnaBridge 171:3a7713b1edbc 554
AnnaBridge 171:3a7713b1edbc 555 #endif /* STM32F207xx || STM32F217xx */
AnnaBridge 171:3a7713b1edbc 556
AnnaBridge 171:3a7713b1edbc 557
AnnaBridge 171:3a7713b1edbc 558 /**
AnnaBridge 171:3a7713b1edbc 559 * @}
AnnaBridge 171:3a7713b1edbc 560 */
AnnaBridge 171:3a7713b1edbc 561
AnnaBridge 171:3a7713b1edbc 562 /**
AnnaBridge 171:3a7713b1edbc 563 * @}
AnnaBridge 171:3a7713b1edbc 564 */
AnnaBridge 171:3a7713b1edbc 565
AnnaBridge 171:3a7713b1edbc 566 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 567 }
AnnaBridge 171:3a7713b1edbc 568 #endif
AnnaBridge 171:3a7713b1edbc 569
AnnaBridge 171:3a7713b1edbc 570 #endif /* __STM32F2xx_HAL_DCMI_H */
AnnaBridge 171:3a7713b1edbc 571
AnnaBridge 171:3a7713b1edbc 572 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/