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TARGET_NUCLEO_F207ZG/TOOLCHAIN_ARM_MICRO/stm32f2xx_ll_i2c.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400
Parent:: 171:3a7713b1edbc

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	145:64910690c574	1	/**
AnnaBridge	145:64910690c574	2	******************************************************************************
AnnaBridge	145:64910690c574	3	* @file stm32f2xx_ll_i2c.h
AnnaBridge	145:64910690c574	4	* @author MCD Application Team
AnnaBridge	145:64910690c574	5	* @version V1.2.1
AnnaBridge	145:64910690c574	6	* @date 14-April-2017
AnnaBridge	145:64910690c574	7	* @brief Header file of I2C LL module.
AnnaBridge	145:64910690c574	8	******************************************************************************
AnnaBridge	145:64910690c574	9	* @attention
AnnaBridge	145:64910690c574	10	*
AnnaBridge	145:64910690c574	11	* <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
AnnaBridge	145:64910690c574	12	*
AnnaBridge	145:64910690c574	13	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	145:64910690c574	14	* are permitted provided that the following conditions are met:
AnnaBridge	145:64910690c574	15	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	145:64910690c574	16	* this list of conditions and the following disclaimer.
AnnaBridge	145:64910690c574	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	145:64910690c574	18	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	145:64910690c574	19	* and/or other materials provided with the distribution.
AnnaBridge	145:64910690c574	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	145:64910690c574	21	* may be used to endorse or promote products derived from this software
AnnaBridge	145:64910690c574	22	* without specific prior written permission.
AnnaBridge	145:64910690c574	23	*
AnnaBridge	145:64910690c574	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	145:64910690c574	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	145:64910690c574	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	145:64910690c574	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	145:64910690c574	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	145:64910690c574	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	145:64910690c574	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	145:64910690c574	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	145:64910690c574	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	145:64910690c574	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	145:64910690c574	34	*
AnnaBridge	145:64910690c574	35	******************************************************************************
AnnaBridge	145:64910690c574	36	*/
AnnaBridge	145:64910690c574	37
AnnaBridge	145:64910690c574	38	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	145:64910690c574	39	#ifndef __STM32F2xx_LL_I2C_H
AnnaBridge	145:64910690c574	40	#define __STM32F2xx_LL_I2C_H
AnnaBridge	145:64910690c574	41
AnnaBridge	145:64910690c574	42	#ifdef __cplusplus
AnnaBridge	145:64910690c574	43	extern "C" {
AnnaBridge	145:64910690c574	44	#endif
AnnaBridge	145:64910690c574	45
AnnaBridge	145:64910690c574	46	/* Includes ------------------------------------------------------------------*/
AnnaBridge	145:64910690c574	47	#include "stm32f2xx.h"
AnnaBridge	145:64910690c574	48
AnnaBridge	145:64910690c574	49	/** @addtogroup STM32F2xx_LL_Driver
AnnaBridge	145:64910690c574	50	* @{
AnnaBridge	145:64910690c574	51	*/
AnnaBridge	145:64910690c574	52
AnnaBridge	145:64910690c574	53	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3)
AnnaBridge	145:64910690c574	54
AnnaBridge	145:64910690c574	55	/** @defgroup I2C_LL I2C
AnnaBridge	145:64910690c574	56	* @{
AnnaBridge	145:64910690c574	57	*/
AnnaBridge	145:64910690c574	58
AnnaBridge	145:64910690c574	59	/* Private types -------------------------------------------------------------*/
AnnaBridge	145:64910690c574	60	/* Private variables ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	61
AnnaBridge	145:64910690c574	62	/* Private constants ---------------------------------------------------------*/
AnnaBridge	145:64910690c574	63	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge	145:64910690c574	64	* @{
AnnaBridge	145:64910690c574	65	*/
AnnaBridge	145:64910690c574	66
AnnaBridge	145:64910690c574	67	/* Defines used to perform compute and check in the macros */
AnnaBridge	145:64910690c574	68	#define LL_I2C_MAX_SPEED_STANDARD 100000U
AnnaBridge	145:64910690c574	69	#define LL_I2C_MAX_SPEED_FAST 400000U
AnnaBridge	145:64910690c574	70	/**
AnnaBridge	145:64910690c574	71	* @}
AnnaBridge	145:64910690c574	72	*/
AnnaBridge	145:64910690c574	73
AnnaBridge	145:64910690c574	74	/* Private macros ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	75	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	76	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge	145:64910690c574	77	* @{
AnnaBridge	145:64910690c574	78	*/
AnnaBridge	145:64910690c574	79	/**
AnnaBridge	145:64910690c574	80	* @}
AnnaBridge	145:64910690c574	81	*/
AnnaBridge	145:64910690c574	82	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	145:64910690c574	83
AnnaBridge	145:64910690c574	84	/* Exported types ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	85	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	86	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge	145:64910690c574	87	* @{
AnnaBridge	145:64910690c574	88	*/
AnnaBridge	145:64910690c574	89	typedef struct
AnnaBridge	145:64910690c574	90	{
AnnaBridge	145:64910690c574	91	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge	145:64910690c574	92	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge	145:64910690c574	93
AnnaBridge	145:64910690c574	94	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge	145:64910690c574	95
AnnaBridge	145:64910690c574	96	uint32_t ClockSpeed; /*!< Specifies the clock frequency.
AnnaBridge	145:64910690c574	97	This parameter must be set to a value lower than 400kHz (in Hz)
AnnaBridge	145:64910690c574	98
AnnaBridge	145:64910690c574	99	This feature can be modified afterwards using unitary function @ref LL_I2C_SetClockPeriod()
AnnaBridge	145:64910690c574	100	or @ref LL_I2C_SetDutyCycle() or @ref LL_I2C_SetClockSpeedMode() or @ref LL_I2C_ConfigSpeed(). */
AnnaBridge	145:64910690c574	101
AnnaBridge	145:64910690c574	102	uint32_t DutyCycle; /*!< Specifies the I2C fast mode duty cycle.
AnnaBridge	145:64910690c574	103	This parameter can be a value of @ref I2C_LL_EC_DUTYCYCLE
AnnaBridge	145:64910690c574	104
AnnaBridge	145:64910690c574	105	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDutyCycle(). */
AnnaBridge	145:64910690c574	106
AnnaBridge	145:64910690c574	107	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge	145:64910690c574	108	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge	145:64910690c574	109
AnnaBridge	145:64910690c574	110	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	145:64910690c574	111
AnnaBridge	145:64910690c574	112	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	145:64910690c574	113	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge	145:64910690c574	114
AnnaBridge	145:64910690c574	115	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge	145:64910690c574	116
AnnaBridge	145:64910690c574	117	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge	145:64910690c574	118	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge	145:64910690c574	119
AnnaBridge	145:64910690c574	120	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	145:64910690c574	121	} LL_I2C_InitTypeDef;
AnnaBridge	145:64910690c574	122	/**
AnnaBridge	145:64910690c574	123	* @}
AnnaBridge	145:64910690c574	124	*/
AnnaBridge	145:64910690c574	125	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	145:64910690c574	126
AnnaBridge	145:64910690c574	127	/* Exported constants --------------------------------------------------------*/
AnnaBridge	145:64910690c574	128	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge	145:64910690c574	129	* @{
AnnaBridge	145:64910690c574	130	*/
AnnaBridge	145:64910690c574	131
AnnaBridge	145:64910690c574	132	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	145:64910690c574	133	* @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge	145:64910690c574	134	* @{
AnnaBridge	145:64910690c574	135	*/
AnnaBridge	145:64910690c574	136	#define LL_I2C_SR1_SB I2C_SR1_SB /!< Start Bit (master mode) /
AnnaBridge	145:64910690c574	137	#define LL_I2C_SR1_ADDR I2C_SR1_ADDR /*!< Address sent (master mode) or
AnnaBridge	145:64910690c574	138	Address matched flag (slave mode) */
AnnaBridge	145:64910690c574	139	#define LL_I2C_SR1_BTF I2C_SR1_BTF /!< Byte Transfer Finished flag /
AnnaBridge	145:64910690c574	140	#define LL_I2C_SR1_ADD10 I2C_SR1_ADD10 /!< 10-bit header sent (master mode) /
AnnaBridge	145:64910690c574	141	#define LL_I2C_SR1_STOPF I2C_SR1_STOPF /!< Stop detection flag (slave mode) /
AnnaBridge	145:64910690c574	142	#define LL_I2C_SR1_RXNE I2C_SR1_RXNE /!< Data register not empty (receivers) /
AnnaBridge	145:64910690c574	143	#define LL_I2C_SR1_TXE I2C_SR1_TXE /!< Data register empty (transmitters) /
AnnaBridge	145:64910690c574	144	#define LL_I2C_SR1_BERR I2C_SR1_BERR /!< Bus error /
AnnaBridge	145:64910690c574	145	#define LL_I2C_SR1_ARLO I2C_SR1_ARLO /!< Arbitration lost /
AnnaBridge	145:64910690c574	146	#define LL_I2C_SR1_AF I2C_SR1_AF /!< Acknowledge failure flag /
AnnaBridge	145:64910690c574	147	#define LL_I2C_SR1_OVR I2C_SR1_OVR /!< Overrun/Underrun /
AnnaBridge	145:64910690c574	148	#define LL_I2C_SR1_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
AnnaBridge	145:64910690c574	149	#define LL_I2C_SR1_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
AnnaBridge	145:64910690c574	150	#define LL_I2C_SR1_SMALERT I2C_ISR_SMALERT /!< SMBus alert (SMBus mode) /
AnnaBridge	145:64910690c574	151	#define LL_I2C_SR2_MSL I2C_SR2_MSL /!< Master/Slave flag /
AnnaBridge	145:64910690c574	152	#define LL_I2C_SR2_BUSY I2C_SR2_BUSY /!< Bus busy flag /
AnnaBridge	145:64910690c574	153	#define LL_I2C_SR2_TRA I2C_SR2_TRA /!< Transmitter/receiver direction /
AnnaBridge	145:64910690c574	154	#define LL_I2C_SR2_GENCALL I2C_SR2_GENCALL /!< General call address (Slave mode) /
AnnaBridge	145:64910690c574	155	#define LL_I2C_SR2_SMBDEFAULT I2C_SR2_SMBDEFAULT /!< SMBus Device default address (Slave mode) /
AnnaBridge	145:64910690c574	156	#define LL_I2C_SR2_SMBHOST I2C_SR2_SMBHOST /!< SMBus Host address (Slave mode) /
AnnaBridge	145:64910690c574	157	#define LL_I2C_SR2_DUALF I2C_SR2_DUALF /!< Dual flag (Slave mode) /
AnnaBridge	145:64910690c574	158	/**
AnnaBridge	145:64910690c574	159	* @}
AnnaBridge	145:64910690c574	160	*/
AnnaBridge	145:64910690c574	161
AnnaBridge	145:64910690c574	162	/** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge	145:64910690c574	163	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge	145:64910690c574	164	* @{
AnnaBridge	145:64910690c574	165	*/
AnnaBridge	145:64910690c574	166	#define LL_I2C_CR2_ITEVTEN I2C_CR2_ITEVTEN /!< Events interrupts enable /
AnnaBridge	145:64910690c574	167	#define LL_I2C_CR2_ITBUFEN I2C_CR2_ITBUFEN /!< Buffer interrupts enable /
AnnaBridge	145:64910690c574	168	#define LL_I2C_CR2_ITERREN I2C_CR2_ITERREN /!< Error interrupts enable /
AnnaBridge	145:64910690c574	169	/**
AnnaBridge	145:64910690c574	170	* @}
AnnaBridge	145:64910690c574	171	*/
AnnaBridge	145:64910690c574	172
AnnaBridge	145:64910690c574	173	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge	145:64910690c574	174	* @{
AnnaBridge	145:64910690c574	175	*/
AnnaBridge	145:64910690c574	176	#define LL_I2C_OWNADDRESS1_7BIT 0x00004000U /!< Own address 1 is a 7-bit address. /
AnnaBridge	145:64910690c574	177	#define LL_I2C_OWNADDRESS1_10BIT (uint32_t)(I2C_OAR1_ADDMODE \| 0x00004000U) /!< Own address 1 is a 10-bit address. /
AnnaBridge	145:64910690c574	178	/**
AnnaBridge	145:64910690c574	179	* @}
AnnaBridge	145:64910690c574	180	*/
AnnaBridge	145:64910690c574	181
AnnaBridge	145:64910690c574	182	/** @defgroup I2C_LL_EC_DUTYCYCLE Fast Mode Duty Cycle
AnnaBridge	145:64910690c574	183	* @{
AnnaBridge	145:64910690c574	184	*/
AnnaBridge	145:64910690c574	185	#define LL_I2C_DUTYCYCLE_2 0x00000000U /!< I2C fast mode Tlow/Thigh = 2 /
AnnaBridge	145:64910690c574	186	#define LL_I2C_DUTYCYCLE_16_9 I2C_CCR_DUTY /!< I2C fast mode Tlow/Thigh = 16/9 /
AnnaBridge	145:64910690c574	187	/**
AnnaBridge	145:64910690c574	188	* @}
AnnaBridge	145:64910690c574	189	*/
AnnaBridge	145:64910690c574	190
AnnaBridge	145:64910690c574	191	/** @defgroup I2C_LL_EC_CLOCK_SPEED_MODE Master Clock Speed Mode
AnnaBridge	145:64910690c574	192	* @{
AnnaBridge	145:64910690c574	193	*/
AnnaBridge	145:64910690c574	194	#define LL_I2C_CLOCK_SPEED_STANDARD_MODE 0x00000000U /!< Master clock speed range is standard mode /
AnnaBridge	145:64910690c574	195	#define LL_I2C_CLOCK_SPEED_FAST_MODE I2C_CCR_FS /!< Master clock speed range is fast mode /
AnnaBridge	145:64910690c574	196	/**
AnnaBridge	145:64910690c574	197	* @}
AnnaBridge	145:64910690c574	198	*/
AnnaBridge	145:64910690c574	199
AnnaBridge	145:64910690c574	200	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge	145:64910690c574	201	* @{
AnnaBridge	145:64910690c574	202	*/
AnnaBridge	145:64910690c574	203	#define LL_I2C_MODE_I2C 0x00000000U /!< I2C Master or Slave mode /
AnnaBridge	145:64910690c574	204	#define LL_I2C_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBUS \| I2C_CR1_SMBTYPE \| I2C_CR1_ENARP) /!< SMBus Host address acknowledge /
AnnaBridge	145:64910690c574	205	#define LL_I2C_MODE_SMBUS_DEVICE I2C_CR1_SMBUS /!< SMBus Device default mode (Default address not acknowledge) /
AnnaBridge	145:64910690c574	206	#define LL_I2C_MODE_SMBUS_DEVICE_ARP (uint32_t)(I2C_CR1_SMBUS \| I2C_CR1_ENARP) /!< SMBus Device Default address acknowledge /
AnnaBridge	145:64910690c574	207	/**
AnnaBridge	145:64910690c574	208	* @}
AnnaBridge	145:64910690c574	209	*/
AnnaBridge	145:64910690c574	210
AnnaBridge	145:64910690c574	211	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge	145:64910690c574	212	* @{
AnnaBridge	145:64910690c574	213	*/
AnnaBridge	145:64910690c574	214	#define LL_I2C_ACK I2C_CR1_ACK /!< ACK is sent after current received byte. /
AnnaBridge	145:64910690c574	215	#define LL_I2C_NACK 0x00000000U /!< NACK is sent after current received byte./
AnnaBridge	145:64910690c574	216	/**
AnnaBridge	145:64910690c574	217	* @}
AnnaBridge	145:64910690c574	218	*/
AnnaBridge	145:64910690c574	219
AnnaBridge	145:64910690c574	220	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge	145:64910690c574	221	* @{
AnnaBridge	145:64910690c574	222	*/
AnnaBridge	145:64910690c574	223	#define LL_I2C_DIRECTION_WRITE I2C_SR2_TRA /!< Bus is in write transfer /
AnnaBridge	145:64910690c574	224	#define LL_I2C_DIRECTION_READ 0x00000000U /!< Bus is in read transfer /
AnnaBridge	145:64910690c574	225	/**
AnnaBridge	145:64910690c574	226	* @}
AnnaBridge	145:64910690c574	227	*/
AnnaBridge	145:64910690c574	228
AnnaBridge	145:64910690c574	229	/**
AnnaBridge	145:64910690c574	230	* @}
AnnaBridge	145:64910690c574	231	*/
AnnaBridge	145:64910690c574	232
AnnaBridge	145:64910690c574	233	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	145:64910690c574	234	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge	145:64910690c574	235	* @{
AnnaBridge	145:64910690c574	236	*/
AnnaBridge	145:64910690c574	237
AnnaBridge	145:64910690c574	238	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	145:64910690c574	239	* @{
AnnaBridge	145:64910690c574	240	*/
AnnaBridge	145:64910690c574	241
AnnaBridge	145:64910690c574	242	/**
AnnaBridge	145:64910690c574	243	* @brief Write a value in I2C register
AnnaBridge	145:64910690c574	244	* @param __INSTANCE__ I2C Instance
AnnaBridge	145:64910690c574	245	* @param __REG__ Register to be written
AnnaBridge	145:64910690c574	246	* @param __VALUE__ Value to be written in the register
AnnaBridge	145:64910690c574	247	* @retval None
AnnaBridge	145:64910690c574	248	*/
AnnaBridge	145:64910690c574	249	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	145:64910690c574	250
AnnaBridge	145:64910690c574	251	/**
AnnaBridge	145:64910690c574	252	* @brief Read a value in I2C register
AnnaBridge	145:64910690c574	253	* @param __INSTANCE__ I2C Instance
AnnaBridge	145:64910690c574	254	* @param __REG__ Register to be read
AnnaBridge	145:64910690c574	255	* @retval Register value
AnnaBridge	145:64910690c574	256	*/
AnnaBridge	145:64910690c574	257	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	145:64910690c574	258	/**
AnnaBridge	145:64910690c574	259	* @}
AnnaBridge	145:64910690c574	260	*/
AnnaBridge	145:64910690c574	261
AnnaBridge	145:64910690c574	262	/** @defgroup I2C_LL_EM_Exported_Macros_Helper Exported_Macros_Helper
AnnaBridge	145:64910690c574	263	* @{
AnnaBridge	145:64910690c574	264	*/
AnnaBridge	145:64910690c574	265
AnnaBridge	145:64910690c574	266	/**
AnnaBridge	145:64910690c574	267	* @brief Convert Peripheral Clock Frequency in Mhz.
AnnaBridge	145:64910690c574	268	* @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
AnnaBridge	145:64910690c574	269	* @retval Value of peripheral clock (in Mhz)
AnnaBridge	145:64910690c574	270	*/
AnnaBridge	145:64910690c574	271	#define __LL_I2C_FREQ_HZ_TO_MHZ(__PCLK__) (uint32_t)((__PCLK__)/1000000U)
AnnaBridge	145:64910690c574	272
AnnaBridge	145:64910690c574	273	/**
AnnaBridge	145:64910690c574	274	* @brief Convert Peripheral Clock Frequency in Hz.
AnnaBridge	145:64910690c574	275	* @param __PCLK__ This parameter must be a value of peripheral clock (in Mhz).
AnnaBridge	145:64910690c574	276	* @retval Value of peripheral clock (in Hz)
AnnaBridge	145:64910690c574	277	*/
AnnaBridge	145:64910690c574	278	#define __LL_I2C_FREQ_MHZ_TO_HZ(__PCLK__) (uint32_t)((__PCLK__)*1000000U)
AnnaBridge	145:64910690c574	279
AnnaBridge	145:64910690c574	280	/**
AnnaBridge	145:64910690c574	281	* @brief Compute I2C Clock rising time.
AnnaBridge	145:64910690c574	282	* @param __FREQRANGE__ This parameter must be a value of peripheral clock (in Mhz).
AnnaBridge	145:64910690c574	283	* @param __SPEED__ This parameter must be a value lower than 400kHz (in Hz).
AnnaBridge	145:64910690c574	284	* @retval Value between Min_Data=0x02 and Max_Data=0x3F
AnnaBridge	145:64910690c574	285	*/
AnnaBridge	145:64910690c574	286	#define __LL_I2C_RISE_TIME(__FREQRANGE__, __SPEED__) (uint32_t)(((__SPEED__) <= LL_I2C_MAX_SPEED_STANDARD) ? ((__FREQRANGE__) + 1U) : ((((__FREQRANGE__) * 300U) / 1000U) + 1U))
AnnaBridge	145:64910690c574	287
AnnaBridge	145:64910690c574	288	/**
AnnaBridge	145:64910690c574	289	* @brief Compute Speed clock range to a Clock Control Register (I2C_CCR_CCR) value.
AnnaBridge	145:64910690c574	290	* @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
AnnaBridge	145:64910690c574	291	* @param __SPEED__ This parameter must be a value lower than 400kHz (in Hz).
AnnaBridge	145:64910690c574	292	* @param __DUTYCYCLE__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	293	* @arg @ref LL_I2C_DUTYCYCLE_2
AnnaBridge	145:64910690c574	294	* @arg @ref LL_I2C_DUTYCYCLE_16_9
AnnaBridge	145:64910690c574	295	* @retval Value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
AnnaBridge	145:64910690c574	296	*/
AnnaBridge	145:64910690c574	297	#define __LL_I2C_SPEED_TO_CCR(__PCLK__, __SPEED__, __DUTYCYCLE__) (uint32_t)(((__SPEED__) <= LL_I2C_MAX_SPEED_STANDARD)? \
AnnaBridge	145:64910690c574	298	(__LL_I2C_SPEED_STANDARD_TO_CCR((__PCLK__), (__SPEED__))) : \
AnnaBridge	145:64910690c574	299	(__LL_I2C_SPEED_FAST_TO_CCR((__PCLK__), (__SPEED__), (__DUTYCYCLE__))))
AnnaBridge	145:64910690c574	300
AnnaBridge	145:64910690c574	301	/**
AnnaBridge	145:64910690c574	302	* @brief Compute Speed Standard clock range to a Clock Control Register (I2C_CCR_CCR) value.
AnnaBridge	145:64910690c574	303	* @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
AnnaBridge	145:64910690c574	304	* @param __SPEED__ This parameter must be a value lower than 100kHz (in Hz).
AnnaBridge	145:64910690c574	305	* @retval Value between Min_Data=0x004 and Max_Data=0xFFF.
AnnaBridge	145:64910690c574	306	*/
AnnaBridge	145:64910690c574	307	#define __LL_I2C_SPEED_STANDARD_TO_CCR(__PCLK__, __SPEED__) (uint32_t)(((((__PCLK__)/((__SPEED__) << 1U)) & I2C_CCR_CCR) < 4U)? 4U:((__PCLK__) / ((__SPEED__) << 1U)))
AnnaBridge	145:64910690c574	308
AnnaBridge	145:64910690c574	309	/**
AnnaBridge	145:64910690c574	310	* @brief Compute Speed Fast clock range to a Clock Control Register (I2C_CCR_CCR) value.
AnnaBridge	145:64910690c574	311	* @param __PCLK__ This parameter must be a value of peripheral clock (in Hz).
AnnaBridge	145:64910690c574	312	* @param __SPEED__ This parameter must be a value between Min_Data=100Khz and Max_Data=400Khz (in Hz).
AnnaBridge	145:64910690c574	313	* @param __DUTYCYCLE__ This parameter can be one of the following values:
AnnaBridge	145:64910690c574	314	* @arg @ref LL_I2C_DUTYCYCLE_2
AnnaBridge	145:64910690c574	315	* @arg @ref LL_I2C_DUTYCYCLE_16_9
AnnaBridge	145:64910690c574	316	* @retval Value between Min_Data=0x001 and Max_Data=0xFFF
AnnaBridge	145:64910690c574	317	*/
AnnaBridge	145:64910690c574	318	#define __LL_I2C_SPEED_FAST_TO_CCR(__PCLK__, __SPEED__, __DUTYCYCLE__) (uint32_t)(((__DUTYCYCLE__) == LL_I2C_DUTYCYCLE_2)? \
AnnaBridge	145:64910690c574	319	(((((__PCLK__) / ((__SPEED__) * 3U)) & I2C_CCR_CCR) == 0U)? 1U:((__PCLK__) / ((__SPEED__) * 3U))) : \
AnnaBridge	145:64910690c574	320	(((((__PCLK__) / ((__SPEED__) * 25U)) & I2C_CCR_CCR) == 0U)? 1U:((__PCLK__) / ((__SPEED__) * 25U))))
AnnaBridge	145:64910690c574	321
AnnaBridge	145:64910690c574	322	/**
AnnaBridge	145:64910690c574	323	* @brief Get the Least significant bits of a 10-Bits address.
AnnaBridge	145:64910690c574	324	* @param __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
AnnaBridge	145:64910690c574	325	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	326	*/
AnnaBridge	145:64910690c574	327	#define __LL_I2C_10BIT_ADDRESS(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FF))))
AnnaBridge	145:64910690c574	328
AnnaBridge	145:64910690c574	329	/**
AnnaBridge	145:64910690c574	330	* @brief Convert a 10-Bits address to a 10-Bits header with Write direction.
AnnaBridge	145:64910690c574	331	* @param __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
AnnaBridge	145:64910690c574	332	* @retval Value between Min_Data=0xF0 and Max_Data=0xF6
AnnaBridge	145:64910690c574	333	*/
AnnaBridge	145:64910690c574	334	#define __LL_I2C_10BIT_HEADER_WRITE(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) \| (uint16_t)(0xF0))))
AnnaBridge	145:64910690c574	335
AnnaBridge	145:64910690c574	336	/**
AnnaBridge	145:64910690c574	337	* @brief Convert a 10-Bits address to a 10-Bits header with Read direction.
AnnaBridge	145:64910690c574	338	* @param __ADDRESS__ This parameter must be a value of a 10-Bits slave address.
AnnaBridge	145:64910690c574	339	* @retval Value between Min_Data=0xF1 and Max_Data=0xF7
AnnaBridge	145:64910690c574	340	*/
AnnaBridge	145:64910690c574	341	#define __LL_I2C_10BIT_HEADER_READ(__ADDRESS__) ((uint8_t)((uint16_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0x0300))) >> 7) \| (uint16_t)(0xF1))))
AnnaBridge	145:64910690c574	342
AnnaBridge	145:64910690c574	343	/**
AnnaBridge	145:64910690c574	344	* @}
AnnaBridge	145:64910690c574	345	*/
AnnaBridge	145:64910690c574	346
AnnaBridge	145:64910690c574	347	/**
AnnaBridge	145:64910690c574	348	* @}
AnnaBridge	145:64910690c574	349	*/
AnnaBridge	145:64910690c574	350
AnnaBridge	145:64910690c574	351	/* Exported functions --------------------------------------------------------*/
AnnaBridge	145:64910690c574	352
AnnaBridge	145:64910690c574	353	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge	145:64910690c574	354	* @{
AnnaBridge	145:64910690c574	355	*/
AnnaBridge	145:64910690c574	356
AnnaBridge	145:64910690c574	357	/** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge	145:64910690c574	358	* @{
AnnaBridge	145:64910690c574	359	*/
AnnaBridge	145:64910690c574	360
AnnaBridge	145:64910690c574	361	/**
AnnaBridge	145:64910690c574	362	* @brief Enable I2C peripheral (PE = 1).
AnnaBridge	145:64910690c574	363	* @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge	145:64910690c574	364	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	365	* @retval None
AnnaBridge	145:64910690c574	366	*/
AnnaBridge	145:64910690c574	367	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	368	{
AnnaBridge	145:64910690c574	369	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	145:64910690c574	370	}
AnnaBridge	145:64910690c574	371
AnnaBridge	145:64910690c574	372	/**
AnnaBridge	145:64910690c574	373	* @brief Disable I2C peripheral (PE = 0).
AnnaBridge	145:64910690c574	374	* @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge	145:64910690c574	375	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	376	* @retval None
AnnaBridge	145:64910690c574	377	*/
AnnaBridge	145:64910690c574	378	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	379	{
AnnaBridge	145:64910690c574	380	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	145:64910690c574	381	}
AnnaBridge	145:64910690c574	382
AnnaBridge	145:64910690c574	383	/**
AnnaBridge	145:64910690c574	384	* @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge	145:64910690c574	385	* @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge	145:64910690c574	386	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	387	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	388	*/
AnnaBridge	145:64910690c574	389	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	390	{
AnnaBridge	145:64910690c574	391	return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
AnnaBridge	145:64910690c574	392	}
AnnaBridge	145:64910690c574	393
AnnaBridge	145:64910690c574	394
AnnaBridge	145:64910690c574	395	/**
AnnaBridge	145:64910690c574	396	* @brief Enable DMA transmission requests.
AnnaBridge	145:64910690c574	397	* @rmtoll CR2 DMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge	145:64910690c574	398	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	399	* @retval None
AnnaBridge	145:64910690c574	400	*/
AnnaBridge	145:64910690c574	401	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	402	{
AnnaBridge	145:64910690c574	403	SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
AnnaBridge	145:64910690c574	404	}
AnnaBridge	145:64910690c574	405
AnnaBridge	145:64910690c574	406	/**
AnnaBridge	145:64910690c574	407	* @brief Disable DMA transmission requests.
AnnaBridge	145:64910690c574	408	* @rmtoll CR2 DMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge	145:64910690c574	409	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	410	* @retval None
AnnaBridge	145:64910690c574	411	*/
AnnaBridge	145:64910690c574	412	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	413	{
AnnaBridge	145:64910690c574	414	CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
AnnaBridge	145:64910690c574	415	}
AnnaBridge	145:64910690c574	416
AnnaBridge	145:64910690c574	417	/**
AnnaBridge	145:64910690c574	418	* @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge	145:64910690c574	419	* @rmtoll CR2 DMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge	145:64910690c574	420	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	421	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	422	*/
AnnaBridge	145:64910690c574	423	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	424	{
AnnaBridge	145:64910690c574	425	return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN));
AnnaBridge	145:64910690c574	426	}
AnnaBridge	145:64910690c574	427
AnnaBridge	145:64910690c574	428	/**
AnnaBridge	145:64910690c574	429	* @brief Enable DMA reception requests.
AnnaBridge	145:64910690c574	430	* @rmtoll CR2 DMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge	145:64910690c574	431	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	432	* @retval None
AnnaBridge	145:64910690c574	433	*/
AnnaBridge	145:64910690c574	434	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	435	{
AnnaBridge	145:64910690c574	436	SET_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
AnnaBridge	145:64910690c574	437	}
AnnaBridge	145:64910690c574	438
AnnaBridge	145:64910690c574	439	/**
AnnaBridge	145:64910690c574	440	* @brief Disable DMA reception requests.
AnnaBridge	145:64910690c574	441	* @rmtoll CR2 DMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge	145:64910690c574	442	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	443	* @retval None
AnnaBridge	145:64910690c574	444	*/
AnnaBridge	145:64910690c574	445	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	446	{
AnnaBridge	145:64910690c574	447	CLEAR_BIT(I2Cx->CR2, I2C_CR2_DMAEN);
AnnaBridge	145:64910690c574	448	}
AnnaBridge	145:64910690c574	449
AnnaBridge	145:64910690c574	450	/**
AnnaBridge	145:64910690c574	451	* @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge	145:64910690c574	452	* @rmtoll CR2 DMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge	145:64910690c574	453	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	454	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	455	*/
AnnaBridge	145:64910690c574	456	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	457	{
AnnaBridge	145:64910690c574	458	return (READ_BIT(I2Cx->CR2, I2C_CR2_DMAEN) == (I2C_CR2_DMAEN));
AnnaBridge	145:64910690c574	459	}
AnnaBridge	145:64910690c574	460
AnnaBridge	145:64910690c574	461	/**
AnnaBridge	145:64910690c574	462	* @brief Get the data register address used for DMA transfer.
AnnaBridge	145:64910690c574	463	* @rmtoll DR DR LL_I2C_DMA_GetRegAddr
AnnaBridge	145:64910690c574	464	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	465	* @retval Address of data register
AnnaBridge	145:64910690c574	466	*/
AnnaBridge	145:64910690c574	467	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	468	{
AnnaBridge	145:64910690c574	469	return (uint32_t) & (I2Cx->DR);
AnnaBridge	145:64910690c574	470	}
AnnaBridge	145:64910690c574	471
AnnaBridge	145:64910690c574	472	/**
AnnaBridge	145:64910690c574	473	* @brief Enable Clock stretching.
AnnaBridge	145:64910690c574	474	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	145:64910690c574	475	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge	145:64910690c574	476	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	477	* @retval None
AnnaBridge	145:64910690c574	478	*/
AnnaBridge	145:64910690c574	479	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	480	{
AnnaBridge	145:64910690c574	481	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	145:64910690c574	482	}
AnnaBridge	145:64910690c574	483
AnnaBridge	145:64910690c574	484	/**
AnnaBridge	145:64910690c574	485	* @brief Disable Clock stretching.
AnnaBridge	145:64910690c574	486	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	145:64910690c574	487	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge	145:64910690c574	488	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	489	* @retval None
AnnaBridge	145:64910690c574	490	*/
AnnaBridge	145:64910690c574	491	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	492	{
AnnaBridge	145:64910690c574	493	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	145:64910690c574	494	}
AnnaBridge	145:64910690c574	495
AnnaBridge	145:64910690c574	496	/**
AnnaBridge	145:64910690c574	497	* @brief Check if Clock stretching is enabled or disabled.
AnnaBridge	145:64910690c574	498	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge	145:64910690c574	499	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	500	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	501	*/
AnnaBridge	145:64910690c574	502	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	503	{
AnnaBridge	145:64910690c574	504	return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
AnnaBridge	145:64910690c574	505	}
AnnaBridge	145:64910690c574	506
AnnaBridge	145:64910690c574	507	/**
AnnaBridge	145:64910690c574	508	* @brief Enable General Call.
AnnaBridge	145:64910690c574	509	* @note When enabled the Address 0x00 is ACKed.
AnnaBridge	145:64910690c574	510	* @rmtoll CR1 ENGC LL_I2C_EnableGeneralCall
AnnaBridge	145:64910690c574	511	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	512	* @retval None
AnnaBridge	145:64910690c574	513	*/
AnnaBridge	145:64910690c574	514	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	515	{
AnnaBridge	145:64910690c574	516	SET_BIT(I2Cx->CR1, I2C_CR1_ENGC);
AnnaBridge	145:64910690c574	517	}
AnnaBridge	145:64910690c574	518
AnnaBridge	145:64910690c574	519	/**
AnnaBridge	145:64910690c574	520	* @brief Disable General Call.
AnnaBridge	145:64910690c574	521	* @note When disabled the Address 0x00 is NACKed.
AnnaBridge	145:64910690c574	522	* @rmtoll CR1 ENGC LL_I2C_DisableGeneralCall
AnnaBridge	145:64910690c574	523	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	524	* @retval None
AnnaBridge	145:64910690c574	525	*/
AnnaBridge	145:64910690c574	526	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	527	{
AnnaBridge	145:64910690c574	528	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENGC);
AnnaBridge	145:64910690c574	529	}
AnnaBridge	145:64910690c574	530
AnnaBridge	145:64910690c574	531	/**
AnnaBridge	145:64910690c574	532	* @brief Check if General Call is enabled or disabled.
AnnaBridge	145:64910690c574	533	* @rmtoll CR1 ENGC LL_I2C_IsEnabledGeneralCall
AnnaBridge	145:64910690c574	534	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	535	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	536	*/
AnnaBridge	145:64910690c574	537	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	538	{
AnnaBridge	145:64910690c574	539	return (READ_BIT(I2Cx->CR1, I2C_CR1_ENGC) == (I2C_CR1_ENGC));
AnnaBridge	145:64910690c574	540	}
AnnaBridge	145:64910690c574	541
AnnaBridge	145:64910690c574	542	/**
AnnaBridge	145:64910690c574	543	* @brief Set the Own Address1.
AnnaBridge	145:64910690c574	544	* @rmtoll OAR1 ADD0 LL_I2C_SetOwnAddress1\n
AnnaBridge	145:64910690c574	545	* OAR1 ADD1_7 LL_I2C_SetOwnAddress1\n
AnnaBridge	145:64910690c574	546	* OAR1 ADD8_9 LL_I2C_SetOwnAddress1\n
AnnaBridge	145:64910690c574	547	* OAR1 ADDMODE LL_I2C_SetOwnAddress1
AnnaBridge	145:64910690c574	548	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	549	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge	145:64910690c574	550	* @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge	145:64910690c574	551	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge	145:64910690c574	552	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge	145:64910690c574	553	* @retval None
AnnaBridge	145:64910690c574	554	*/
AnnaBridge	145:64910690c574	555	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge	145:64910690c574	556	{
AnnaBridge	145:64910690c574	557	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_ADD0 \| I2C_OAR1_ADD1_7 \| I2C_OAR1_ADD8_9 \| I2C_OAR1_ADDMODE, OwnAddress1 \| OwnAddrSize);
AnnaBridge	145:64910690c574	558	}
AnnaBridge	145:64910690c574	559
AnnaBridge	145:64910690c574	560	/**
AnnaBridge	145:64910690c574	561	* @brief Set the 7bits Own Address2.
AnnaBridge	145:64910690c574	562	* @note This action has no effect if own address2 is enabled.
AnnaBridge	145:64910690c574	563	* @rmtoll OAR2 ADD2 LL_I2C_SetOwnAddress2
AnnaBridge	145:64910690c574	564	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	565	* @param OwnAddress2 This parameter must be a value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge	145:64910690c574	566	* @retval None
AnnaBridge	145:64910690c574	567	*/
AnnaBridge	145:64910690c574	568	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2)
AnnaBridge	145:64910690c574	569	{
AnnaBridge	145:64910690c574	570	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_ADD2, OwnAddress2);
AnnaBridge	145:64910690c574	571	}
AnnaBridge	145:64910690c574	572
AnnaBridge	145:64910690c574	573	/**
AnnaBridge	145:64910690c574	574	* @brief Enable acknowledge on Own Address2 match address.
AnnaBridge	145:64910690c574	575	* @rmtoll OAR2 ENDUAL LL_I2C_EnableOwnAddress2
AnnaBridge	145:64910690c574	576	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	577	* @retval None
AnnaBridge	145:64910690c574	578	*/
AnnaBridge	145:64910690c574	579	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	580	{
AnnaBridge	145:64910690c574	581	SET_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL);
AnnaBridge	145:64910690c574	582	}
AnnaBridge	145:64910690c574	583
AnnaBridge	145:64910690c574	584	/**
AnnaBridge	145:64910690c574	585	* @brief Disable acknowledge on Own Address2 match address.
AnnaBridge	145:64910690c574	586	* @rmtoll OAR2 ENDUAL LL_I2C_DisableOwnAddress2
AnnaBridge	145:64910690c574	587	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	588	* @retval None
AnnaBridge	145:64910690c574	589	*/
AnnaBridge	145:64910690c574	590	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	591	{
AnnaBridge	145:64910690c574	592	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL);
AnnaBridge	145:64910690c574	593	}
AnnaBridge	145:64910690c574	594
AnnaBridge	145:64910690c574	595	/**
AnnaBridge	145:64910690c574	596	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	145:64910690c574	597	* @rmtoll OAR2 ENDUAL LL_I2C_IsEnabledOwnAddress2
AnnaBridge	145:64910690c574	598	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	599	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	600	*/
AnnaBridge	145:64910690c574	601	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	602	{
AnnaBridge	145:64910690c574	603	return (READ_BIT(I2Cx->OAR2, I2C_OAR2_ENDUAL) == (I2C_OAR2_ENDUAL));
AnnaBridge	145:64910690c574	604	}
AnnaBridge	145:64910690c574	605
AnnaBridge	145:64910690c574	606	/**
AnnaBridge	145:64910690c574	607	* @brief Configure the Peripheral clock frequency.
AnnaBridge	145:64910690c574	608	* @rmtoll CR2 FREQ LL_I2C_SetPeriphClock
AnnaBridge	145:64910690c574	609	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	610	* @param PeriphClock Peripheral Clock (in Hz)
AnnaBridge	145:64910690c574	611	* @retval None
AnnaBridge	145:64910690c574	612	*/
AnnaBridge	145:64910690c574	613	__STATIC_INLINE void LL_I2C_SetPeriphClock(I2C_TypeDef *I2Cx, uint32_t PeriphClock)
AnnaBridge	145:64910690c574	614	{
AnnaBridge	145:64910690c574	615	MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock));
AnnaBridge	145:64910690c574	616	}
AnnaBridge	145:64910690c574	617
AnnaBridge	145:64910690c574	618	/**
AnnaBridge	145:64910690c574	619	* @brief Get the Peripheral clock frequency.
AnnaBridge	145:64910690c574	620	* @rmtoll CR2 FREQ LL_I2C_GetPeriphClock
AnnaBridge	145:64910690c574	621	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	622	* @retval Value of Peripheral Clock (in Hz)
AnnaBridge	145:64910690c574	623	*/
AnnaBridge	145:64910690c574	624	__STATIC_INLINE uint32_t LL_I2C_GetPeriphClock(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	625	{
AnnaBridge	145:64910690c574	626	return (uint32_t)(__LL_I2C_FREQ_MHZ_TO_HZ(READ_BIT(I2Cx->CR2, I2C_CR2_FREQ)));
AnnaBridge	145:64910690c574	627	}
AnnaBridge	145:64910690c574	628
AnnaBridge	145:64910690c574	629	/**
AnnaBridge	145:64910690c574	630	* @brief Configure the Duty cycle (Fast mode only).
AnnaBridge	145:64910690c574	631	* @rmtoll CCR DUTY LL_I2C_SetDutyCycle
AnnaBridge	145:64910690c574	632	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	633	* @param DutyCycle This parameter can be one of the following values:
AnnaBridge	145:64910690c574	634	* @arg @ref LL_I2C_DUTYCYCLE_2
AnnaBridge	145:64910690c574	635	* @arg @ref LL_I2C_DUTYCYCLE_16_9
AnnaBridge	145:64910690c574	636	* @retval None
AnnaBridge	145:64910690c574	637	*/
AnnaBridge	145:64910690c574	638	__STATIC_INLINE void LL_I2C_SetDutyCycle(I2C_TypeDef *I2Cx, uint32_t DutyCycle)
AnnaBridge	145:64910690c574	639	{
AnnaBridge	145:64910690c574	640	MODIFY_REG(I2Cx->CCR, I2C_CCR_DUTY, DutyCycle);
AnnaBridge	145:64910690c574	641	}
AnnaBridge	145:64910690c574	642
AnnaBridge	145:64910690c574	643	/**
AnnaBridge	145:64910690c574	644	* @brief Get the Duty cycle (Fast mode only).
AnnaBridge	145:64910690c574	645	* @rmtoll CCR DUTY LL_I2C_GetDutyCycle
AnnaBridge	145:64910690c574	646	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	647	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	648	* @arg @ref LL_I2C_DUTYCYCLE_2
AnnaBridge	145:64910690c574	649	* @arg @ref LL_I2C_DUTYCYCLE_16_9
AnnaBridge	145:64910690c574	650	*/
AnnaBridge	145:64910690c574	651	__STATIC_INLINE uint32_t LL_I2C_GetDutyCycle(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	652	{
AnnaBridge	145:64910690c574	653	return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_DUTY));
AnnaBridge	145:64910690c574	654	}
AnnaBridge	145:64910690c574	655
AnnaBridge	145:64910690c574	656	/**
AnnaBridge	145:64910690c574	657	* @brief Configure the I2C master clock speed mode.
AnnaBridge	145:64910690c574	658	* @rmtoll CCR FS LL_I2C_SetClockSpeedMode
AnnaBridge	145:64910690c574	659	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	660	* @param ClockSpeedMode This parameter can be one of the following values:
AnnaBridge	145:64910690c574	661	* @arg @ref LL_I2C_CLOCK_SPEED_STANDARD_MODE
AnnaBridge	145:64910690c574	662	* @arg @ref LL_I2C_CLOCK_SPEED_FAST_MODE
AnnaBridge	145:64910690c574	663	* @retval None
AnnaBridge	145:64910690c574	664	*/
AnnaBridge	145:64910690c574	665	__STATIC_INLINE void LL_I2C_SetClockSpeedMode(I2C_TypeDef *I2Cx, uint32_t ClockSpeedMode)
AnnaBridge	145:64910690c574	666	{
AnnaBridge	145:64910690c574	667	MODIFY_REG(I2Cx->CCR, I2C_CCR_FS, ClockSpeedMode);
AnnaBridge	145:64910690c574	668	}
AnnaBridge	145:64910690c574	669
AnnaBridge	145:64910690c574	670	/**
AnnaBridge	145:64910690c574	671	* @brief Get the the I2C master speed mode.
AnnaBridge	145:64910690c574	672	* @rmtoll CCR FS LL_I2C_GetClockSpeedMode
AnnaBridge	145:64910690c574	673	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	674	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	675	* @arg @ref LL_I2C_CLOCK_SPEED_STANDARD_MODE
AnnaBridge	145:64910690c574	676	* @arg @ref LL_I2C_CLOCK_SPEED_FAST_MODE
AnnaBridge	145:64910690c574	677	*/
AnnaBridge	145:64910690c574	678	__STATIC_INLINE uint32_t LL_I2C_GetClockSpeedMode(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	679	{
AnnaBridge	145:64910690c574	680	return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_FS));
AnnaBridge	145:64910690c574	681	}
AnnaBridge	145:64910690c574	682
AnnaBridge	145:64910690c574	683	/**
AnnaBridge	145:64910690c574	684	* @brief Configure the SCL, SDA rising time.
AnnaBridge	145:64910690c574	685	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	145:64910690c574	686	* @rmtoll TRISE TRISE LL_I2C_SetRiseTime
AnnaBridge	145:64910690c574	687	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	688	* @param RiseTime This parameter must be a value between Min_Data=0x02 and Max_Data=0x3F.
AnnaBridge	145:64910690c574	689	* @retval None
AnnaBridge	145:64910690c574	690	*/
AnnaBridge	145:64910690c574	691	__STATIC_INLINE void LL_I2C_SetRiseTime(I2C_TypeDef *I2Cx, uint32_t RiseTime)
AnnaBridge	145:64910690c574	692	{
AnnaBridge	145:64910690c574	693	MODIFY_REG(I2Cx->TRISE, I2C_TRISE_TRISE, RiseTime);
AnnaBridge	145:64910690c574	694	}
AnnaBridge	145:64910690c574	695
AnnaBridge	145:64910690c574	696	/**
AnnaBridge	145:64910690c574	697	* @brief Get the SCL, SDA rising time.
AnnaBridge	145:64910690c574	698	* @rmtoll TRISE TRISE LL_I2C_GetRiseTime
AnnaBridge	145:64910690c574	699	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	700	* @retval Value between Min_Data=0x02 and Max_Data=0x3F
AnnaBridge	145:64910690c574	701	*/
AnnaBridge	145:64910690c574	702	__STATIC_INLINE uint32_t LL_I2C_GetRiseTime(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	703	{
AnnaBridge	145:64910690c574	704	return (uint32_t)(READ_BIT(I2Cx->TRISE, I2C_TRISE_TRISE));
AnnaBridge	145:64910690c574	705	}
AnnaBridge	145:64910690c574	706
AnnaBridge	145:64910690c574	707	/**
AnnaBridge	145:64910690c574	708	* @brief Configure the SCL high and low period.
AnnaBridge	145:64910690c574	709	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	145:64910690c574	710	* @rmtoll CCR CCR LL_I2C_SetClockPeriod
AnnaBridge	145:64910690c574	711	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	712	* @param ClockPeriod This parameter must be a value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
AnnaBridge	145:64910690c574	713	* @retval None
AnnaBridge	145:64910690c574	714	*/
AnnaBridge	145:64910690c574	715	__STATIC_INLINE void LL_I2C_SetClockPeriod(I2C_TypeDef *I2Cx, uint32_t ClockPeriod)
AnnaBridge	145:64910690c574	716	{
AnnaBridge	145:64910690c574	717	MODIFY_REG(I2Cx->CCR, I2C_CCR_CCR, ClockPeriod);
AnnaBridge	145:64910690c574	718	}
AnnaBridge	145:64910690c574	719
AnnaBridge	145:64910690c574	720	/**
AnnaBridge	145:64910690c574	721	* @brief Get the SCL high and low period.
AnnaBridge	145:64910690c574	722	* @rmtoll CCR CCR LL_I2C_GetClockPeriod
AnnaBridge	145:64910690c574	723	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	724	* @retval Value between Min_Data=0x004 and Max_Data=0xFFF, except in FAST DUTY mode where Min_Data=0x001.
AnnaBridge	145:64910690c574	725	*/
AnnaBridge	145:64910690c574	726	__STATIC_INLINE uint32_t LL_I2C_GetClockPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	727	{
AnnaBridge	145:64910690c574	728	return (uint32_t)(READ_BIT(I2Cx->CCR, I2C_CCR_CCR));
AnnaBridge	145:64910690c574	729	}
AnnaBridge	145:64910690c574	730
AnnaBridge	145:64910690c574	731	/**
AnnaBridge	145:64910690c574	732	* @brief Configure the SCL speed.
AnnaBridge	145:64910690c574	733	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	145:64910690c574	734	* @rmtoll CR2 FREQ LL_I2C_ConfigSpeed\n
AnnaBridge	145:64910690c574	735	* TRISE TRISE LL_I2C_ConfigSpeed\n
AnnaBridge	145:64910690c574	736	* CCR FS LL_I2C_ConfigSpeed\n
AnnaBridge	145:64910690c574	737	* CCR DUTY LL_I2C_ConfigSpeed\n
AnnaBridge	145:64910690c574	738	* CCR CCR LL_I2C_ConfigSpeed
AnnaBridge	145:64910690c574	739	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	740	* @param PeriphClock Peripheral Clock (in Hz)
AnnaBridge	145:64910690c574	741	* @param ClockSpeed This parameter must be a value lower than 400kHz (in Hz).
AnnaBridge	145:64910690c574	742	* @param DutyCycle This parameter can be one of the following values:
AnnaBridge	145:64910690c574	743	* @arg @ref LL_I2C_DUTYCYCLE_2
AnnaBridge	145:64910690c574	744	* @arg @ref LL_I2C_DUTYCYCLE_16_9
AnnaBridge	145:64910690c574	745	* @retval None
AnnaBridge	145:64910690c574	746	*/
AnnaBridge	145:64910690c574	747	__STATIC_INLINE void LL_I2C_ConfigSpeed(I2C_TypeDef *I2Cx, uint32_t PeriphClock, uint32_t ClockSpeed,
AnnaBridge	145:64910690c574	748	uint32_t DutyCycle)
AnnaBridge	145:64910690c574	749	{
AnnaBridge	145:64910690c574	750	register uint32_t freqrange = 0x0U;
AnnaBridge	145:64910690c574	751	register uint32_t clockconfig = 0x0U;
AnnaBridge	145:64910690c574	752
AnnaBridge	145:64910690c574	753	/* Compute frequency range */
AnnaBridge	145:64910690c574	754	freqrange = __LL_I2C_FREQ_HZ_TO_MHZ(PeriphClock);
AnnaBridge	145:64910690c574	755
AnnaBridge	145:64910690c574	756	/* Configure I2Cx: Frequency range register */
AnnaBridge	145:64910690c574	757	MODIFY_REG(I2Cx->CR2, I2C_CR2_FREQ, freqrange);
AnnaBridge	145:64910690c574	758
AnnaBridge	145:64910690c574	759	/* Configure I2Cx: Rise Time register */
AnnaBridge	145:64910690c574	760	MODIFY_REG(I2Cx->TRISE, I2C_TRISE_TRISE, __LL_I2C_RISE_TIME(freqrange, ClockSpeed));
AnnaBridge	145:64910690c574	761
AnnaBridge	145:64910690c574	762	/* Configure Speed mode, Duty Cycle and Clock control register value */
AnnaBridge	145:64910690c574	763	if (ClockSpeed > LL_I2C_MAX_SPEED_STANDARD)
AnnaBridge	145:64910690c574	764	{
AnnaBridge	145:64910690c574	765	/* Set Speed mode at fast and duty cycle for Clock Speed request in fast clock range */
AnnaBridge	145:64910690c574	766	clockconfig = LL_I2C_CLOCK_SPEED_FAST_MODE \| \
AnnaBridge	145:64910690c574	767	__LL_I2C_SPEED_FAST_TO_CCR(PeriphClock, ClockSpeed, DutyCycle) \| \
AnnaBridge	145:64910690c574	768	DutyCycle;
AnnaBridge	145:64910690c574	769	}
AnnaBridge	145:64910690c574	770	else
AnnaBridge	145:64910690c574	771	{
AnnaBridge	145:64910690c574	772	/* Set Speed mode at standard for Clock Speed request in standard clock range */
AnnaBridge	145:64910690c574	773	clockconfig = LL_I2C_CLOCK_SPEED_STANDARD_MODE \| \
AnnaBridge	145:64910690c574	774	__LL_I2C_SPEED_STANDARD_TO_CCR(PeriphClock, ClockSpeed);
AnnaBridge	145:64910690c574	775	}
AnnaBridge	145:64910690c574	776
AnnaBridge	145:64910690c574	777	/* Configure I2Cx: Clock control register */
AnnaBridge	145:64910690c574	778	MODIFY_REG(I2Cx->CCR, (I2C_CCR_FS \| I2C_CCR_DUTY \| I2C_CCR_CCR), clockconfig);
AnnaBridge	145:64910690c574	779	}
AnnaBridge	145:64910690c574	780
AnnaBridge	145:64910690c574	781	/**
AnnaBridge	145:64910690c574	782	* @brief Configure peripheral mode.
AnnaBridge	145:64910690c574	783	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	784	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	785	* @rmtoll CR1 SMBUS LL_I2C_SetMode\n
AnnaBridge	145:64910690c574	786	* CR1 SMBTYPE LL_I2C_SetMode\n
AnnaBridge	145:64910690c574	787	* CR1 ENARP LL_I2C_SetMode
AnnaBridge	145:64910690c574	788	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	789	* @param PeripheralMode This parameter can be one of the following values:
AnnaBridge	145:64910690c574	790	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	145:64910690c574	791	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	145:64910690c574	792	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	145:64910690c574	793	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	145:64910690c574	794	* @retval None
AnnaBridge	145:64910690c574	795	*/
AnnaBridge	145:64910690c574	796	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge	145:64910690c574	797	{
AnnaBridge	145:64910690c574	798	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBUS \| I2C_CR1_SMBTYPE \| I2C_CR1_ENARP, PeripheralMode);
AnnaBridge	145:64910690c574	799	}
AnnaBridge	145:64910690c574	800
AnnaBridge	145:64910690c574	801	/**
AnnaBridge	145:64910690c574	802	* @brief Get peripheral mode.
AnnaBridge	145:64910690c574	803	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	804	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	805	* @rmtoll CR1 SMBUS LL_I2C_GetMode\n
AnnaBridge	145:64910690c574	806	* CR1 SMBTYPE LL_I2C_GetMode\n
AnnaBridge	145:64910690c574	807	* CR1 ENARP LL_I2C_GetMode
AnnaBridge	145:64910690c574	808	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	809	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	810	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	145:64910690c574	811	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	145:64910690c574	812	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	145:64910690c574	813	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	145:64910690c574	814	*/
AnnaBridge	145:64910690c574	815	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	816	{
AnnaBridge	145:64910690c574	817	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBUS \| I2C_CR1_SMBTYPE \| I2C_CR1_ENARP));
AnnaBridge	145:64910690c574	818	}
AnnaBridge	145:64910690c574	819
AnnaBridge	145:64910690c574	820	/**
AnnaBridge	145:64910690c574	821	* @brief Enable SMBus alert (Host or Device mode)
AnnaBridge	145:64910690c574	822	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	823	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	824	* @note SMBus Device mode:
AnnaBridge	145:64910690c574	825	* - SMBus Alert pin is drived low and
AnnaBridge	145:64910690c574	826	* Alert Response Address Header acknowledge is enabled.
AnnaBridge	145:64910690c574	827	* SMBus Host mode:
AnnaBridge	145:64910690c574	828	* - SMBus Alert pin management is supported.
AnnaBridge	145:64910690c574	829	* @rmtoll CR1 ALERT LL_I2C_EnableSMBusAlert
AnnaBridge	145:64910690c574	830	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	831	* @retval None
AnnaBridge	145:64910690c574	832	*/
AnnaBridge	145:64910690c574	833	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	834	{
AnnaBridge	145:64910690c574	835	SET_BIT(I2Cx->CR1, I2C_CR1_ALERT);
AnnaBridge	145:64910690c574	836	}
AnnaBridge	145:64910690c574	837
AnnaBridge	145:64910690c574	838	/**
AnnaBridge	145:64910690c574	839	* @brief Disable SMBus alert (Host or Device mode)
AnnaBridge	145:64910690c574	840	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	841	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	842	* @note SMBus Device mode:
AnnaBridge	145:64910690c574	843	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge	145:64910690c574	844	* Alert Response Address Header acknowledge is disabled.
AnnaBridge	145:64910690c574	845	* SMBus Host mode:
AnnaBridge	145:64910690c574	846	* - SMBus Alert pin management is not supported.
AnnaBridge	145:64910690c574	847	* @rmtoll CR1 ALERT LL_I2C_DisableSMBusAlert
AnnaBridge	145:64910690c574	848	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	849	* @retval None
AnnaBridge	145:64910690c574	850	*/
AnnaBridge	145:64910690c574	851	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	852	{
AnnaBridge	145:64910690c574	853	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERT);
AnnaBridge	145:64910690c574	854	}
AnnaBridge	145:64910690c574	855
AnnaBridge	145:64910690c574	856	/**
AnnaBridge	145:64910690c574	857	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge	145:64910690c574	858	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	859	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	860	* @rmtoll CR1 ALERT LL_I2C_IsEnabledSMBusAlert
AnnaBridge	145:64910690c574	861	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	862	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	863	*/
AnnaBridge	145:64910690c574	864	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	865	{
AnnaBridge	145:64910690c574	866	return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERT) == (I2C_CR1_ALERT));
AnnaBridge	145:64910690c574	867	}
AnnaBridge	145:64910690c574	868
AnnaBridge	145:64910690c574	869	/**
AnnaBridge	145:64910690c574	870	* @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge	145:64910690c574	871	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	872	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	873	* @rmtoll CR1 ENPEC LL_I2C_EnableSMBusPEC
AnnaBridge	145:64910690c574	874	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	875	* @retval None
AnnaBridge	145:64910690c574	876	*/
AnnaBridge	145:64910690c574	877	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	878	{
AnnaBridge	145:64910690c574	879	SET_BIT(I2Cx->CR1, I2C_CR1_ENPEC);
AnnaBridge	145:64910690c574	880	}
AnnaBridge	145:64910690c574	881
AnnaBridge	145:64910690c574	882	/**
AnnaBridge	145:64910690c574	883	* @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge	145:64910690c574	884	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	885	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	886	* @rmtoll CR1 ENPEC LL_I2C_DisableSMBusPEC
AnnaBridge	145:64910690c574	887	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	888	* @retval None
AnnaBridge	145:64910690c574	889	*/
AnnaBridge	145:64910690c574	890	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	891	{
AnnaBridge	145:64910690c574	892	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ENPEC);
AnnaBridge	145:64910690c574	893	}
AnnaBridge	145:64910690c574	894
AnnaBridge	145:64910690c574	895	/**
AnnaBridge	145:64910690c574	896	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge	145:64910690c574	897	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	898	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	899	* @rmtoll CR1 ENPEC LL_I2C_IsEnabledSMBusPEC
AnnaBridge	145:64910690c574	900	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	901	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	902	*/
AnnaBridge	145:64910690c574	903	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	904	{
AnnaBridge	145:64910690c574	905	return (READ_BIT(I2Cx->CR1, I2C_CR1_ENPEC) == (I2C_CR1_ENPEC));
AnnaBridge	145:64910690c574	906	}
AnnaBridge	145:64910690c574	907
AnnaBridge	145:64910690c574	908	/**
AnnaBridge	145:64910690c574	909	* @}
AnnaBridge	145:64910690c574	910	*/
AnnaBridge	145:64910690c574	911
AnnaBridge	145:64910690c574	912	/** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge	145:64910690c574	913	* @{
AnnaBridge	145:64910690c574	914	*/
AnnaBridge	145:64910690c574	915
AnnaBridge	145:64910690c574	916	/**
AnnaBridge	145:64910690c574	917	* @brief Enable TXE interrupt.
AnnaBridge	145:64910690c574	918	* @rmtoll CR2 ITEVTEN LL_I2C_EnableIT_TX\n
AnnaBridge	145:64910690c574	919	* CR2 ITBUFEN LL_I2C_EnableIT_TX
AnnaBridge	145:64910690c574	920	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	921	* @retval None
AnnaBridge	145:64910690c574	922	*/
AnnaBridge	145:64910690c574	923	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	924	{
AnnaBridge	145:64910690c574	925	SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN);
AnnaBridge	145:64910690c574	926	}
AnnaBridge	145:64910690c574	927
AnnaBridge	145:64910690c574	928	/**
AnnaBridge	145:64910690c574	929	* @brief Disable TXE interrupt.
AnnaBridge	145:64910690c574	930	* @rmtoll CR2 ITEVTEN LL_I2C_DisableIT_TX\n
AnnaBridge	145:64910690c574	931	* CR2 ITBUFEN LL_I2C_DisableIT_TX
AnnaBridge	145:64910690c574	932	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	933	* @retval None
AnnaBridge	145:64910690c574	934	*/
AnnaBridge	145:64910690c574	935	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	936	{
AnnaBridge	145:64910690c574	937	CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN);
AnnaBridge	145:64910690c574	938	}
AnnaBridge	145:64910690c574	939
AnnaBridge	145:64910690c574	940	/**
AnnaBridge	145:64910690c574	941	* @brief Check if the TXE Interrupt is enabled or disabled.
AnnaBridge	145:64910690c574	942	* @rmtoll CR2 ITEVTEN LL_I2C_IsEnabledIT_TX\n
AnnaBridge	145:64910690c574	943	* CR2 ITBUFEN LL_I2C_IsEnabledIT_TX
AnnaBridge	145:64910690c574	944	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	945	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	946	*/
AnnaBridge	145:64910690c574	947	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	948	{
AnnaBridge	145:64910690c574	949	return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN) == (I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN));
AnnaBridge	145:64910690c574	950	}
AnnaBridge	145:64910690c574	951
AnnaBridge	145:64910690c574	952	/**
AnnaBridge	145:64910690c574	953	* @brief Enable RXNE interrupt.
AnnaBridge	145:64910690c574	954	* @rmtoll CR2 ITEVTEN LL_I2C_EnableIT_RX\n
AnnaBridge	145:64910690c574	955	* CR2 ITBUFEN LL_I2C_EnableIT_RX
AnnaBridge	145:64910690c574	956	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	957	* @retval None
AnnaBridge	145:64910690c574	958	*/
AnnaBridge	145:64910690c574	959	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	960	{
AnnaBridge	145:64910690c574	961	SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN);
AnnaBridge	145:64910690c574	962	}
AnnaBridge	145:64910690c574	963
AnnaBridge	145:64910690c574	964	/**
AnnaBridge	145:64910690c574	965	* @brief Disable RXNE interrupt.
AnnaBridge	145:64910690c574	966	* @rmtoll CR2 ITEVTEN LL_I2C_DisableIT_RX\n
AnnaBridge	145:64910690c574	967	* CR2 ITBUFEN LL_I2C_DisableIT_RX
AnnaBridge	145:64910690c574	968	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	969	* @retval None
AnnaBridge	145:64910690c574	970	*/
AnnaBridge	145:64910690c574	971	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	972	{
AnnaBridge	145:64910690c574	973	CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN);
AnnaBridge	145:64910690c574	974	}
AnnaBridge	145:64910690c574	975
AnnaBridge	145:64910690c574	976	/**
AnnaBridge	145:64910690c574	977	* @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge	145:64910690c574	978	* @rmtoll CR2 ITEVTEN LL_I2C_IsEnabledIT_RX\n
AnnaBridge	145:64910690c574	979	* CR2 ITBUFEN LL_I2C_IsEnabledIT_RX
AnnaBridge	145:64910690c574	980	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	981	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	982	*/
AnnaBridge	145:64910690c574	983	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	984	{
AnnaBridge	145:64910690c574	985	return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN) == (I2C_CR2_ITEVTEN \| I2C_CR2_ITBUFEN));
AnnaBridge	145:64910690c574	986	}
AnnaBridge	145:64910690c574	987
AnnaBridge	145:64910690c574	988	/**
AnnaBridge	145:64910690c574	989	* @brief Enable Events interrupts.
AnnaBridge	145:64910690c574	990	* @note Any of these events will generate interrupt :
AnnaBridge	145:64910690c574	991	* Start Bit (SB)
AnnaBridge	145:64910690c574	992	* Address sent, Address matched (ADDR)
AnnaBridge	145:64910690c574	993	* 10-bit header sent (ADD10)
AnnaBridge	145:64910690c574	994	* Stop detection (STOPF)
AnnaBridge	145:64910690c574	995	* Byte transfer finished (BTF)
AnnaBridge	145:64910690c574	996	*
AnnaBridge	145:64910690c574	997	* @note Any of these events will generate interrupt if Buffer interrupts are enabled too(using unitary function @ref LL_I2C_EnableIT_BUF()) :
AnnaBridge	145:64910690c574	998	* Receive buffer not empty (RXNE)
AnnaBridge	145:64910690c574	999	* Transmit buffer empty (TXE)
AnnaBridge	145:64910690c574	1000	* @rmtoll CR2 ITEVTEN LL_I2C_EnableIT_EVT
AnnaBridge	145:64910690c574	1001	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1002	* @retval None
AnnaBridge	145:64910690c574	1003	*/
AnnaBridge	145:64910690c574	1004	__STATIC_INLINE void LL_I2C_EnableIT_EVT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1005	{
AnnaBridge	145:64910690c574	1006	SET_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN);
AnnaBridge	145:64910690c574	1007	}
AnnaBridge	145:64910690c574	1008
AnnaBridge	145:64910690c574	1009	/**
AnnaBridge	145:64910690c574	1010	* @brief Disable Events interrupts.
AnnaBridge	145:64910690c574	1011	* @note Any of these events will generate interrupt :
AnnaBridge	145:64910690c574	1012	* Start Bit (SB)
AnnaBridge	145:64910690c574	1013	* Address sent, Address matched (ADDR)
AnnaBridge	145:64910690c574	1014	* 10-bit header sent (ADD10)
AnnaBridge	145:64910690c574	1015	* Stop detection (STOPF)
AnnaBridge	145:64910690c574	1016	* Byte transfer finished (BTF)
AnnaBridge	145:64910690c574	1017	* Receive buffer not empty (RXNE)
AnnaBridge	145:64910690c574	1018	* Transmit buffer empty (TXE)
AnnaBridge	145:64910690c574	1019	* @rmtoll CR2 ITEVTEN LL_I2C_DisableIT_EVT
AnnaBridge	145:64910690c574	1020	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1021	* @retval None
AnnaBridge	145:64910690c574	1022	*/
AnnaBridge	145:64910690c574	1023	__STATIC_INLINE void LL_I2C_DisableIT_EVT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1024	{
AnnaBridge	145:64910690c574	1025	CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN);
AnnaBridge	145:64910690c574	1026	}
AnnaBridge	145:64910690c574	1027
AnnaBridge	145:64910690c574	1028	/**
AnnaBridge	145:64910690c574	1029	* @brief Check if Events interrupts are enabled or disabled.
AnnaBridge	145:64910690c574	1030	* @rmtoll CR2 ITEVTEN LL_I2C_IsEnabledIT_EVT
AnnaBridge	145:64910690c574	1031	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1032	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1033	*/
AnnaBridge	145:64910690c574	1034	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_EVT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1035	{
AnnaBridge	145:64910690c574	1036	return (READ_BIT(I2Cx->CR2, I2C_CR2_ITEVTEN) == (I2C_CR2_ITEVTEN));
AnnaBridge	145:64910690c574	1037	}
AnnaBridge	145:64910690c574	1038
AnnaBridge	145:64910690c574	1039	/**
AnnaBridge	145:64910690c574	1040	* @brief Enable Buffer interrupts.
AnnaBridge	145:64910690c574	1041	* @note Any of these Buffer events will generate interrupt if Events interrupts are enabled too(using unitary function @ref LL_I2C_EnableIT_EVT()) :
AnnaBridge	145:64910690c574	1042	* Receive buffer not empty (RXNE)
AnnaBridge	145:64910690c574	1043	* Transmit buffer empty (TXE)
AnnaBridge	145:64910690c574	1044	* @rmtoll CR2 ITBUFEN LL_I2C_EnableIT_BUF
AnnaBridge	145:64910690c574	1045	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1046	* @retval None
AnnaBridge	145:64910690c574	1047	*/
AnnaBridge	145:64910690c574	1048	__STATIC_INLINE void LL_I2C_EnableIT_BUF(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1049	{
AnnaBridge	145:64910690c574	1050	SET_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN);
AnnaBridge	145:64910690c574	1051	}
AnnaBridge	145:64910690c574	1052
AnnaBridge	145:64910690c574	1053	/**
AnnaBridge	145:64910690c574	1054	* @brief Disable Buffer interrupts.
AnnaBridge	145:64910690c574	1055	* @note Any of these Buffer events will generate interrupt :
AnnaBridge	145:64910690c574	1056	* Receive buffer not empty (RXNE)
AnnaBridge	145:64910690c574	1057	* Transmit buffer empty (TXE)
AnnaBridge	145:64910690c574	1058	* @rmtoll CR2 ITBUFEN LL_I2C_DisableIT_BUF
AnnaBridge	145:64910690c574	1059	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1060	* @retval None
AnnaBridge	145:64910690c574	1061	*/
AnnaBridge	145:64910690c574	1062	__STATIC_INLINE void LL_I2C_DisableIT_BUF(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1063	{
AnnaBridge	145:64910690c574	1064	CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN);
AnnaBridge	145:64910690c574	1065	}
AnnaBridge	145:64910690c574	1066
AnnaBridge	145:64910690c574	1067	/**
AnnaBridge	145:64910690c574	1068	* @brief Check if Buffer interrupts are enabled or disabled.
AnnaBridge	145:64910690c574	1069	* @rmtoll CR2 ITBUFEN LL_I2C_IsEnabledIT_BUF
AnnaBridge	145:64910690c574	1070	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1071	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1072	*/
AnnaBridge	145:64910690c574	1073	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_BUF(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1074	{
AnnaBridge	145:64910690c574	1075	return (READ_BIT(I2Cx->CR2, I2C_CR2_ITBUFEN) == (I2C_CR2_ITBUFEN));
AnnaBridge	145:64910690c574	1076	}
AnnaBridge	145:64910690c574	1077
AnnaBridge	145:64910690c574	1078	/**
AnnaBridge	145:64910690c574	1079	* @brief Enable Error interrupts.
AnnaBridge	145:64910690c574	1080	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1081	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1082	* @note Any of these errors will generate interrupt :
AnnaBridge	145:64910690c574	1083	* Bus Error detection (BERR)
AnnaBridge	145:64910690c574	1084	* Arbitration Loss (ARLO)
AnnaBridge	145:64910690c574	1085	* Acknowledge Failure(AF)
AnnaBridge	145:64910690c574	1086	* Overrun/Underrun (OVR)
AnnaBridge	145:64910690c574	1087	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	145:64910690c574	1088	* SMBus PEC error detection (PECERR)
AnnaBridge	145:64910690c574	1089	* SMBus Alert pin event detection (SMBALERT)
AnnaBridge	145:64910690c574	1090	* @rmtoll CR2 ITERREN LL_I2C_EnableIT_ERR
AnnaBridge	145:64910690c574	1091	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1092	* @retval None
AnnaBridge	145:64910690c574	1093	*/
AnnaBridge	145:64910690c574	1094	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1095	{
AnnaBridge	145:64910690c574	1096	SET_BIT(I2Cx->CR2, I2C_CR2_ITERREN);
AnnaBridge	145:64910690c574	1097	}
AnnaBridge	145:64910690c574	1098
AnnaBridge	145:64910690c574	1099	/**
AnnaBridge	145:64910690c574	1100	* @brief Disable Error interrupts.
AnnaBridge	145:64910690c574	1101	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1102	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1103	* @note Any of these errors will generate interrupt :
AnnaBridge	145:64910690c574	1104	* Bus Error detection (BERR)
AnnaBridge	145:64910690c574	1105	* Arbitration Loss (ARLO)
AnnaBridge	145:64910690c574	1106	* Acknowledge Failure(AF)
AnnaBridge	145:64910690c574	1107	* Overrun/Underrun (OVR)
AnnaBridge	145:64910690c574	1108	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	145:64910690c574	1109	* SMBus PEC error detection (PECERR)
AnnaBridge	145:64910690c574	1110	* SMBus Alert pin event detection (SMBALERT)
AnnaBridge	145:64910690c574	1111	* @rmtoll CR2 ITERREN LL_I2C_DisableIT_ERR
AnnaBridge	145:64910690c574	1112	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1113	* @retval None
AnnaBridge	145:64910690c574	1114	*/
AnnaBridge	145:64910690c574	1115	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1116	{
AnnaBridge	145:64910690c574	1117	CLEAR_BIT(I2Cx->CR2, I2C_CR2_ITERREN);
AnnaBridge	145:64910690c574	1118	}
AnnaBridge	145:64910690c574	1119
AnnaBridge	145:64910690c574	1120	/**
AnnaBridge	145:64910690c574	1121	* @brief Check if Error interrupts are enabled or disabled.
AnnaBridge	145:64910690c574	1122	* @rmtoll CR2 ITERREN LL_I2C_IsEnabledIT_ERR
AnnaBridge	145:64910690c574	1123	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1124	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1125	*/
AnnaBridge	145:64910690c574	1126	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1127	{
AnnaBridge	145:64910690c574	1128	return (READ_BIT(I2Cx->CR2, I2C_CR2_ITERREN) == (I2C_CR2_ITERREN));
AnnaBridge	145:64910690c574	1129	}
AnnaBridge	145:64910690c574	1130
AnnaBridge	145:64910690c574	1131	/**
AnnaBridge	145:64910690c574	1132	* @}
AnnaBridge	145:64910690c574	1133	*/
AnnaBridge	145:64910690c574	1134
AnnaBridge	145:64910690c574	1135	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge	145:64910690c574	1136	* @{
AnnaBridge	145:64910690c574	1137	*/
AnnaBridge	145:64910690c574	1138
AnnaBridge	145:64910690c574	1139	/**
AnnaBridge	145:64910690c574	1140	* @brief Indicate the status of Transmit data register empty flag.
AnnaBridge	145:64910690c574	1141	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	145:64910690c574	1142	* SET: When Transmit data register is empty.
AnnaBridge	145:64910690c574	1143	* @rmtoll SR1 TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge	145:64910690c574	1144	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1145	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1146	*/
AnnaBridge	145:64910690c574	1147	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1148	{
AnnaBridge	145:64910690c574	1149	return (READ_BIT(I2Cx->SR1, I2C_SR1_TXE) == (I2C_SR1_TXE));
AnnaBridge	145:64910690c574	1150	}
AnnaBridge	145:64910690c574	1151
AnnaBridge	145:64910690c574	1152	/**
AnnaBridge	145:64910690c574	1153	* @brief Indicate the status of Byte Transfer Finished flag.
AnnaBridge	145:64910690c574	1154	* RESET: When Data byte transfer not done.
AnnaBridge	145:64910690c574	1155	* SET: When Data byte transfer succeeded.
AnnaBridge	145:64910690c574	1156	* @rmtoll SR1 BTF LL_I2C_IsActiveFlag_BTF
AnnaBridge	145:64910690c574	1157	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1158	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1159	*/
AnnaBridge	145:64910690c574	1160	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BTF(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1161	{
AnnaBridge	145:64910690c574	1162	return (READ_BIT(I2Cx->SR1, I2C_SR1_BTF) == (I2C_SR1_BTF));
AnnaBridge	145:64910690c574	1163	}
AnnaBridge	145:64910690c574	1164
AnnaBridge	145:64910690c574	1165	/**
AnnaBridge	145:64910690c574	1166	* @brief Indicate the status of Receive data register not empty flag.
AnnaBridge	145:64910690c574	1167	* @note RESET: When Receive data register is read.
AnnaBridge	145:64910690c574	1168	* SET: When the received data is copied in Receive data register.
AnnaBridge	145:64910690c574	1169	* @rmtoll SR1 RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge	145:64910690c574	1170	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1171	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1172	*/
AnnaBridge	145:64910690c574	1173	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1174	{
AnnaBridge	145:64910690c574	1175	return (READ_BIT(I2Cx->SR1, I2C_SR1_RXNE) == (I2C_SR1_RXNE));
AnnaBridge	145:64910690c574	1176	}
AnnaBridge	145:64910690c574	1177
AnnaBridge	145:64910690c574	1178	/**
AnnaBridge	145:64910690c574	1179	* @brief Indicate the status of Start Bit (master mode).
AnnaBridge	145:64910690c574	1180	* @note RESET: When No Start condition.
AnnaBridge	145:64910690c574	1181	* SET: When Start condition is generated.
AnnaBridge	145:64910690c574	1182	* @rmtoll SR1 SB LL_I2C_IsActiveFlag_SB
AnnaBridge	145:64910690c574	1183	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1184	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1185	*/
AnnaBridge	145:64910690c574	1186	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_SB(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1187	{
AnnaBridge	145:64910690c574	1188	return (READ_BIT(I2Cx->SR1, I2C_SR1_SB) == (I2C_SR1_SB));
AnnaBridge	145:64910690c574	1189	}
AnnaBridge	145:64910690c574	1190
AnnaBridge	145:64910690c574	1191	/**
AnnaBridge	145:64910690c574	1192	* @brief Indicate the status of Address sent (master mode) or Address matched flag (slave mode).
AnnaBridge	145:64910690c574	1193	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1194	* SET: When the address is fully sent (master mode) or when the received slave address matched with one of the enabled slave address (slave mode).
AnnaBridge	145:64910690c574	1195	* @rmtoll SR1 ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge	145:64910690c574	1196	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1197	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1198	*/
AnnaBridge	145:64910690c574	1199	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1200	{
AnnaBridge	145:64910690c574	1201	return (READ_BIT(I2Cx->SR1, I2C_SR1_ADDR) == (I2C_SR1_ADDR));
AnnaBridge	145:64910690c574	1202	}
AnnaBridge	145:64910690c574	1203
AnnaBridge	145:64910690c574	1204	/**
AnnaBridge	145:64910690c574	1205	* @brief Indicate the status of 10-bit header sent (master mode).
AnnaBridge	145:64910690c574	1206	* @note RESET: When no ADD10 event occured.
AnnaBridge	145:64910690c574	1207	* SET: When the master has sent the first address byte (header).
AnnaBridge	145:64910690c574	1208	* @rmtoll SR1 ADD10 LL_I2C_IsActiveFlag_ADD10
AnnaBridge	145:64910690c574	1209	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1210	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1211	*/
AnnaBridge	145:64910690c574	1212	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADD10(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1213	{
AnnaBridge	145:64910690c574	1214	return (READ_BIT(I2Cx->SR1, I2C_SR1_ADD10) == (I2C_SR1_ADD10));
AnnaBridge	145:64910690c574	1215	}
AnnaBridge	145:64910690c574	1216
AnnaBridge	145:64910690c574	1217	/**
AnnaBridge	145:64910690c574	1218	* @brief Indicate the status of Acknowledge failure flag.
AnnaBridge	145:64910690c574	1219	* @note RESET: No acknowledge failure.
AnnaBridge	145:64910690c574	1220	* SET: When an acknowledge failure is received after a byte transmission.
AnnaBridge	145:64910690c574	1221	* @rmtoll SR1 AF LL_I2C_IsActiveFlag_AF
AnnaBridge	145:64910690c574	1222	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1223	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1224	*/
AnnaBridge	145:64910690c574	1225	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_AF(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1226	{
AnnaBridge	145:64910690c574	1227	return (READ_BIT(I2Cx->SR1, I2C_SR1_AF) == (I2C_SR1_AF));
AnnaBridge	145:64910690c574	1228	}
AnnaBridge	145:64910690c574	1229
AnnaBridge	145:64910690c574	1230	/**
AnnaBridge	145:64910690c574	1231	* @brief Indicate the status of Stop detection flag (slave mode).
AnnaBridge	145:64910690c574	1232	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1233	* SET: When a Stop condition is detected.
AnnaBridge	145:64910690c574	1234	* @rmtoll SR1 STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge	145:64910690c574	1235	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1236	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1237	*/
AnnaBridge	145:64910690c574	1238	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1239	{
AnnaBridge	145:64910690c574	1240	return (READ_BIT(I2Cx->SR1, I2C_SR1_STOPF) == (I2C_SR1_STOPF));
AnnaBridge	145:64910690c574	1241	}
AnnaBridge	145:64910690c574	1242
AnnaBridge	145:64910690c574	1243	/**
AnnaBridge	145:64910690c574	1244	* @brief Indicate the status of Bus error flag.
AnnaBridge	145:64910690c574	1245	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1246	* SET: When a misplaced Start or Stop condition is detected.
AnnaBridge	145:64910690c574	1247	* @rmtoll SR1 BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge	145:64910690c574	1248	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1249	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1250	*/
AnnaBridge	145:64910690c574	1251	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1252	{
AnnaBridge	145:64910690c574	1253	return (READ_BIT(I2Cx->SR1, I2C_SR1_BERR) == (I2C_SR1_BERR));
AnnaBridge	145:64910690c574	1254	}
AnnaBridge	145:64910690c574	1255
AnnaBridge	145:64910690c574	1256	/**
AnnaBridge	145:64910690c574	1257	* @brief Indicate the status of Arbitration lost flag.
AnnaBridge	145:64910690c574	1258	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1259	* SET: When arbitration lost.
AnnaBridge	145:64910690c574	1260	* @rmtoll SR1 ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge	145:64910690c574	1261	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1262	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1263	*/
AnnaBridge	145:64910690c574	1264	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1265	{
AnnaBridge	145:64910690c574	1266	return (READ_BIT(I2Cx->SR1, I2C_SR1_ARLO) == (I2C_SR1_ARLO));
AnnaBridge	145:64910690c574	1267	}
AnnaBridge	145:64910690c574	1268
AnnaBridge	145:64910690c574	1269	/**
AnnaBridge	145:64910690c574	1270	* @brief Indicate the status of Overrun/Underrun flag.
AnnaBridge	145:64910690c574	1271	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1272	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge	145:64910690c574	1273	* @rmtoll SR1 OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge	145:64910690c574	1274	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1275	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1276	*/
AnnaBridge	145:64910690c574	1277	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1278	{
AnnaBridge	145:64910690c574	1279	return (READ_BIT(I2Cx->SR1, I2C_SR1_OVR) == (I2C_SR1_OVR));
AnnaBridge	145:64910690c574	1280	}
AnnaBridge	145:64910690c574	1281
AnnaBridge	145:64910690c574	1282	/**
AnnaBridge	145:64910690c574	1283	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	145:64910690c574	1284	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1285	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1286	* @rmtoll SR1 PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	145:64910690c574	1287	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1288	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1289	*/
AnnaBridge	145:64910690c574	1290	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1291	{
AnnaBridge	145:64910690c574	1292	return (READ_BIT(I2Cx->SR1, I2C_SR1_PECERR) == (I2C_SR1_PECERR));
AnnaBridge	145:64910690c574	1293	}
AnnaBridge	145:64910690c574	1294
AnnaBridge	145:64910690c574	1295	/**
AnnaBridge	145:64910690c574	1296	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	145:64910690c574	1297	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1298	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1299	* @rmtoll SR1 TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	145:64910690c574	1300	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1301	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1302	*/
AnnaBridge	145:64910690c574	1303	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1304	{
AnnaBridge	145:64910690c574	1305	return (READ_BIT(I2Cx->SR1, I2C_SR1_TIMEOUT) == (I2C_SR1_TIMEOUT));
AnnaBridge	145:64910690c574	1306	}
AnnaBridge	145:64910690c574	1307
AnnaBridge	145:64910690c574	1308	/**
AnnaBridge	145:64910690c574	1309	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	145:64910690c574	1310	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1311	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1312	* @rmtoll SR1 SMBALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	145:64910690c574	1313	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1314	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1315	*/
AnnaBridge	145:64910690c574	1316	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1317	{
AnnaBridge	145:64910690c574	1318	return (READ_BIT(I2Cx->SR1, I2C_SR1_SMBALERT) == (I2C_SR1_SMBALERT));
AnnaBridge	145:64910690c574	1319	}
AnnaBridge	145:64910690c574	1320
AnnaBridge	145:64910690c574	1321	/**
AnnaBridge	145:64910690c574	1322	* @brief Indicate the status of Bus Busy flag.
AnnaBridge	145:64910690c574	1323	* @note RESET: Clear default value.
AnnaBridge	145:64910690c574	1324	* SET: When a Start condition is detected.
AnnaBridge	145:64910690c574	1325	* @rmtoll SR2 BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge	145:64910690c574	1326	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1327	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1328	*/
AnnaBridge	145:64910690c574	1329	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1330	{
AnnaBridge	145:64910690c574	1331	return (READ_BIT(I2Cx->SR2, I2C_SR2_BUSY) == (I2C_SR2_BUSY));
AnnaBridge	145:64910690c574	1332	}
AnnaBridge	145:64910690c574	1333
AnnaBridge	145:64910690c574	1334	/**
AnnaBridge	145:64910690c574	1335	* @brief Indicate the status of Dual flag.
AnnaBridge	145:64910690c574	1336	* @note RESET: Received address matched with OAR1.
AnnaBridge	145:64910690c574	1337	* SET: Received address matched with OAR2.
AnnaBridge	145:64910690c574	1338	* @rmtoll SR2 DUALF LL_I2C_IsActiveFlag_DUAL
AnnaBridge	145:64910690c574	1339	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1340	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1341	*/
AnnaBridge	145:64910690c574	1342	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_DUAL(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1343	{
AnnaBridge	145:64910690c574	1344	return (READ_BIT(I2Cx->SR2, I2C_SR2_DUALF) == (I2C_SR2_DUALF));
AnnaBridge	145:64910690c574	1345	}
AnnaBridge	145:64910690c574	1346
AnnaBridge	145:64910690c574	1347	/**
AnnaBridge	145:64910690c574	1348	* @brief Indicate the status of SMBus Host address reception (Slave mode).
AnnaBridge	145:64910690c574	1349	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1350	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1351	* @note RESET: No SMBus Host address
AnnaBridge	145:64910690c574	1352	* SET: SMBus Host address received.
AnnaBridge	145:64910690c574	1353	* @note This status is cleared by hardware after a STOP condition or repeated START condition.
AnnaBridge	145:64910690c574	1354	* @rmtoll SR2 SMBHOST LL_I2C_IsActiveSMBusFlag_SMBHOST
AnnaBridge	145:64910690c574	1355	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1356	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1357	*/
AnnaBridge	145:64910690c574	1358	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBHOST(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1359	{
AnnaBridge	145:64910690c574	1360	return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBHOST) == (I2C_SR2_SMBHOST));
AnnaBridge	145:64910690c574	1361	}
AnnaBridge	145:64910690c574	1362
AnnaBridge	145:64910690c574	1363	/**
AnnaBridge	145:64910690c574	1364	* @brief Indicate the status of SMBus Device default address reception (Slave mode).
AnnaBridge	145:64910690c574	1365	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1366	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1367	* @note RESET: No SMBus Device default address
AnnaBridge	145:64910690c574	1368	* SET: SMBus Device default address received.
AnnaBridge	145:64910690c574	1369	* @note This status is cleared by hardware after a STOP condition or repeated START condition.
AnnaBridge	145:64910690c574	1370	* @rmtoll SR2 SMBDEFAULT LL_I2C_IsActiveSMBusFlag_SMBDEFAULT
AnnaBridge	145:64910690c574	1371	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1372	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1373	*/
AnnaBridge	145:64910690c574	1374	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_SMBDEFAULT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1375	{
AnnaBridge	145:64910690c574	1376	return (READ_BIT(I2Cx->SR2, I2C_SR2_SMBDEFAULT) == (I2C_SR2_SMBDEFAULT));
AnnaBridge	145:64910690c574	1377	}
AnnaBridge	145:64910690c574	1378
AnnaBridge	145:64910690c574	1379	/**
AnnaBridge	145:64910690c574	1380	* @brief Indicate the status of General call address reception (Slave mode).
AnnaBridge	145:64910690c574	1381	* @note RESET: No Generall call address
AnnaBridge	145:64910690c574	1382	* SET: General call address received.
AnnaBridge	145:64910690c574	1383	* @note This status is cleared by hardware after a STOP condition or repeated START condition.
AnnaBridge	145:64910690c574	1384	* @rmtoll SR2 GENCALL LL_I2C_IsActiveFlag_GENCALL
AnnaBridge	145:64910690c574	1385	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1386	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1387	*/
AnnaBridge	145:64910690c574	1388	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_GENCALL(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1389	{
AnnaBridge	145:64910690c574	1390	return (READ_BIT(I2Cx->SR2, I2C_SR2_GENCALL) == (I2C_SR2_GENCALL));
AnnaBridge	145:64910690c574	1391	}
AnnaBridge	145:64910690c574	1392
AnnaBridge	145:64910690c574	1393	/**
AnnaBridge	145:64910690c574	1394	* @brief Indicate the status of Master/Slave flag.
AnnaBridge	145:64910690c574	1395	* @note RESET: Slave Mode.
AnnaBridge	145:64910690c574	1396	* SET: Master Mode.
AnnaBridge	145:64910690c574	1397	* @rmtoll SR2 MSL LL_I2C_IsActiveFlag_MSL
AnnaBridge	145:64910690c574	1398	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1399	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1400	*/
AnnaBridge	145:64910690c574	1401	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_MSL(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1402	{
AnnaBridge	145:64910690c574	1403	return (READ_BIT(I2Cx->SR2, I2C_SR2_MSL) == (I2C_SR2_MSL));
AnnaBridge	145:64910690c574	1404	}
AnnaBridge	145:64910690c574	1405
AnnaBridge	145:64910690c574	1406	/**
AnnaBridge	145:64910690c574	1407	* @brief Clear Address Matched flag.
AnnaBridge	145:64910690c574	1408	* @note Clearing this flag is done by a read access to the I2Cx_SR1
AnnaBridge	145:64910690c574	1409	* register followed by a read access to the I2Cx_SR2 register.
AnnaBridge	145:64910690c574	1410	* @rmtoll SR1 ADDR LL_I2C_ClearFlag_ADDR
AnnaBridge	145:64910690c574	1411	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1412	* @retval None
AnnaBridge	145:64910690c574	1413	*/
AnnaBridge	145:64910690c574	1414	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1415	{
AnnaBridge	145:64910690c574	1416	__IO uint32_t tmpreg;
AnnaBridge	145:64910690c574	1417	tmpreg = I2Cx->SR1;
AnnaBridge	145:64910690c574	1418	(void) tmpreg;
AnnaBridge	145:64910690c574	1419	tmpreg = I2Cx->SR2;
AnnaBridge	145:64910690c574	1420	(void) tmpreg;
AnnaBridge	145:64910690c574	1421	}
AnnaBridge	145:64910690c574	1422
AnnaBridge	145:64910690c574	1423	/**
AnnaBridge	145:64910690c574	1424	* @brief Clear Acknowledge failure flag.
AnnaBridge	145:64910690c574	1425	* @rmtoll SR1 AF LL_I2C_ClearFlag_AF
AnnaBridge	145:64910690c574	1426	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1427	* @retval None
AnnaBridge	145:64910690c574	1428	*/
AnnaBridge	145:64910690c574	1429	__STATIC_INLINE void LL_I2C_ClearFlag_AF(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1430	{
AnnaBridge	145:64910690c574	1431	CLEAR_BIT(I2Cx->SR1, I2C_SR1_AF);
AnnaBridge	145:64910690c574	1432	}
AnnaBridge	145:64910690c574	1433
AnnaBridge	145:64910690c574	1434	/**
AnnaBridge	145:64910690c574	1435	* @brief Clear Stop detection flag.
AnnaBridge	145:64910690c574	1436	* @note Clearing this flag is done by a read access to the I2Cx_SR1
AnnaBridge	145:64910690c574	1437	* register followed by a write access to I2Cx_CR1 register.
AnnaBridge	145:64910690c574	1438	* @rmtoll SR1 STOPF LL_I2C_ClearFlag_STOP\n
AnnaBridge	145:64910690c574	1439	* CR1 PE LL_I2C_ClearFlag_STOP
AnnaBridge	145:64910690c574	1440	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1441	* @retval None
AnnaBridge	145:64910690c574	1442	*/
AnnaBridge	145:64910690c574	1443	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1444	{
AnnaBridge	145:64910690c574	1445	__IO uint32_t tmpreg;
AnnaBridge	145:64910690c574	1446	tmpreg = I2Cx->SR1;
AnnaBridge	145:64910690c574	1447	(void) tmpreg;
AnnaBridge	145:64910690c574	1448	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	145:64910690c574	1449	}
AnnaBridge	145:64910690c574	1450
AnnaBridge	145:64910690c574	1451	/**
AnnaBridge	145:64910690c574	1452	* @brief Clear Bus error flag.
AnnaBridge	145:64910690c574	1453	* @rmtoll SR1 BERR LL_I2C_ClearFlag_BERR
AnnaBridge	145:64910690c574	1454	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1455	* @retval None
AnnaBridge	145:64910690c574	1456	*/
AnnaBridge	145:64910690c574	1457	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1458	{
AnnaBridge	145:64910690c574	1459	CLEAR_BIT(I2Cx->SR1, I2C_SR1_BERR);
AnnaBridge	145:64910690c574	1460	}
AnnaBridge	145:64910690c574	1461
AnnaBridge	145:64910690c574	1462	/**
AnnaBridge	145:64910690c574	1463	* @brief Clear Arbitration lost flag.
AnnaBridge	145:64910690c574	1464	* @rmtoll SR1 ARLO LL_I2C_ClearFlag_ARLO
AnnaBridge	145:64910690c574	1465	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1466	* @retval None
AnnaBridge	145:64910690c574	1467	*/
AnnaBridge	145:64910690c574	1468	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1469	{
AnnaBridge	145:64910690c574	1470	CLEAR_BIT(I2Cx->SR1, I2C_SR1_ARLO);
AnnaBridge	145:64910690c574	1471	}
AnnaBridge	145:64910690c574	1472
AnnaBridge	145:64910690c574	1473	/**
AnnaBridge	145:64910690c574	1474	* @brief Clear Overrun/Underrun flag.
AnnaBridge	145:64910690c574	1475	* @rmtoll SR1 OVR LL_I2C_ClearFlag_OVR
AnnaBridge	145:64910690c574	1476	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1477	* @retval None
AnnaBridge	145:64910690c574	1478	*/
AnnaBridge	145:64910690c574	1479	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1480	{
AnnaBridge	145:64910690c574	1481	CLEAR_BIT(I2Cx->SR1, I2C_SR1_OVR);
AnnaBridge	145:64910690c574	1482	}
AnnaBridge	145:64910690c574	1483
AnnaBridge	145:64910690c574	1484	/**
AnnaBridge	145:64910690c574	1485	* @brief Clear SMBus PEC error flag.
AnnaBridge	145:64910690c574	1486	* @rmtoll SR1 PECERR LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge	145:64910690c574	1487	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1488	* @retval None
AnnaBridge	145:64910690c574	1489	*/
AnnaBridge	145:64910690c574	1490	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1491	{
AnnaBridge	145:64910690c574	1492	CLEAR_BIT(I2Cx->SR1, I2C_SR1_PECERR);
AnnaBridge	145:64910690c574	1493	}
AnnaBridge	145:64910690c574	1494
AnnaBridge	145:64910690c574	1495	/**
AnnaBridge	145:64910690c574	1496	* @brief Clear SMBus Timeout detection flag.
AnnaBridge	145:64910690c574	1497	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1498	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1499	* @rmtoll SR1 TIMEOUT LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge	145:64910690c574	1500	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1501	* @retval None
AnnaBridge	145:64910690c574	1502	*/
AnnaBridge	145:64910690c574	1503	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1504	{
AnnaBridge	145:64910690c574	1505	CLEAR_BIT(I2Cx->SR1, I2C_SR1_TIMEOUT);
AnnaBridge	145:64910690c574	1506	}
AnnaBridge	145:64910690c574	1507
AnnaBridge	145:64910690c574	1508	/**
AnnaBridge	145:64910690c574	1509	* @brief Clear SMBus Alert flag.
AnnaBridge	145:64910690c574	1510	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1511	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1512	* @rmtoll SR1 SMBALERT LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge	145:64910690c574	1513	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1514	* @retval None
AnnaBridge	145:64910690c574	1515	*/
AnnaBridge	145:64910690c574	1516	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1517	{
AnnaBridge	145:64910690c574	1518	CLEAR_BIT(I2Cx->SR1, I2C_SR1_SMBALERT);
AnnaBridge	145:64910690c574	1519	}
AnnaBridge	145:64910690c574	1520
AnnaBridge	145:64910690c574	1521	/**
AnnaBridge	145:64910690c574	1522	* @}
AnnaBridge	145:64910690c574	1523	*/
AnnaBridge	145:64910690c574	1524
AnnaBridge	145:64910690c574	1525	/** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge	145:64910690c574	1526	* @{
AnnaBridge	145:64910690c574	1527	*/
AnnaBridge	145:64910690c574	1528
AnnaBridge	145:64910690c574	1529	/**
AnnaBridge	145:64910690c574	1530	* @brief Enable Reset of I2C peripheral.
AnnaBridge	145:64910690c574	1531	* @rmtoll CR1 SWRST LL_I2C_EnableReset
AnnaBridge	145:64910690c574	1532	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1533	* @retval None
AnnaBridge	145:64910690c574	1534	*/
AnnaBridge	145:64910690c574	1535	__STATIC_INLINE void LL_I2C_EnableReset(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1536	{
AnnaBridge	145:64910690c574	1537	SET_BIT(I2Cx->CR1, I2C_CR1_SWRST);
AnnaBridge	145:64910690c574	1538	}
AnnaBridge	145:64910690c574	1539
AnnaBridge	145:64910690c574	1540	/**
AnnaBridge	145:64910690c574	1541	* @brief Disable Reset of I2C peripheral.
AnnaBridge	145:64910690c574	1542	* @rmtoll CR1 SWRST LL_I2C_DisableReset
AnnaBridge	145:64910690c574	1543	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1544	* @retval None
AnnaBridge	145:64910690c574	1545	*/
AnnaBridge	145:64910690c574	1546	__STATIC_INLINE void LL_I2C_DisableReset(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1547	{
AnnaBridge	145:64910690c574	1548	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SWRST);
AnnaBridge	145:64910690c574	1549	}
AnnaBridge	145:64910690c574	1550
AnnaBridge	145:64910690c574	1551	/**
AnnaBridge	145:64910690c574	1552	* @brief Check if the I2C peripheral is under reset state or not.
AnnaBridge	145:64910690c574	1553	* @rmtoll CR1 SWRST LL_I2C_IsResetEnabled
AnnaBridge	145:64910690c574	1554	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1555	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1556	*/
AnnaBridge	145:64910690c574	1557	__STATIC_INLINE uint32_t LL_I2C_IsResetEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1558	{
AnnaBridge	145:64910690c574	1559	return (READ_BIT(I2Cx->CR1, I2C_CR1_SWRST) == (I2C_CR1_SWRST));
AnnaBridge	145:64910690c574	1560	}
AnnaBridge	145:64910690c574	1561
AnnaBridge	145:64910690c574	1562	/**
AnnaBridge	145:64910690c574	1563	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	145:64910690c574	1564	* @note Usage in Slave or Master mode.
AnnaBridge	145:64910690c574	1565	* @rmtoll CR1 ACK LL_I2C_AcknowledgeNextData
AnnaBridge	145:64910690c574	1566	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1567	* @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge	145:64910690c574	1568	* @arg @ref LL_I2C_ACK
AnnaBridge	145:64910690c574	1569	* @arg @ref LL_I2C_NACK
AnnaBridge	145:64910690c574	1570	* @retval None
AnnaBridge	145:64910690c574	1571	*/
AnnaBridge	145:64910690c574	1572	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge	145:64910690c574	1573	{
AnnaBridge	145:64910690c574	1574	MODIFY_REG(I2Cx->CR1, I2C_CR1_ACK, TypeAcknowledge);
AnnaBridge	145:64910690c574	1575	}
AnnaBridge	145:64910690c574	1576
AnnaBridge	145:64910690c574	1577	/**
AnnaBridge	145:64910690c574	1578	* @brief Generate a START or RESTART condition
AnnaBridge	145:64910690c574	1579	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge	145:64910690c574	1580	* This action has no effect when RELOAD is set.
AnnaBridge	145:64910690c574	1581	* @rmtoll CR1 START LL_I2C_GenerateStartCondition
AnnaBridge	145:64910690c574	1582	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1583	* @retval None
AnnaBridge	145:64910690c574	1584	*/
AnnaBridge	145:64910690c574	1585	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1586	{
AnnaBridge	145:64910690c574	1587	SET_BIT(I2Cx->CR1, I2C_CR1_START);
AnnaBridge	145:64910690c574	1588	}
AnnaBridge	145:64910690c574	1589
AnnaBridge	145:64910690c574	1590	/**
AnnaBridge	145:64910690c574	1591	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	145:64910690c574	1592	* @rmtoll CR1 STOP LL_I2C_GenerateStopCondition
AnnaBridge	145:64910690c574	1593	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1594	* @retval None
AnnaBridge	145:64910690c574	1595	*/
AnnaBridge	145:64910690c574	1596	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1597	{
AnnaBridge	145:64910690c574	1598	SET_BIT(I2Cx->CR1, I2C_CR1_STOP);
AnnaBridge	145:64910690c574	1599	}
AnnaBridge	145:64910690c574	1600
AnnaBridge	145:64910690c574	1601	/**
AnnaBridge	145:64910690c574	1602	* @brief Enable bit POS (master/host mode).
AnnaBridge	145:64910690c574	1603	* @note In that case, the ACK bit controls the (N)ACK of the next byte received or the PEC bit indicates that the next byte in shift register is a PEC.
AnnaBridge	145:64910690c574	1604	* @rmtoll CR1 POS LL_I2C_EnableBitPOS
AnnaBridge	145:64910690c574	1605	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1606	* @retval None
AnnaBridge	145:64910690c574	1607	*/
AnnaBridge	145:64910690c574	1608	__STATIC_INLINE void LL_I2C_EnableBitPOS(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1609	{
AnnaBridge	145:64910690c574	1610	SET_BIT(I2Cx->CR1, I2C_CR1_POS);
AnnaBridge	145:64910690c574	1611	}
AnnaBridge	145:64910690c574	1612
AnnaBridge	145:64910690c574	1613	/**
AnnaBridge	145:64910690c574	1614	* @brief Disable bit POS (master/host mode).
AnnaBridge	145:64910690c574	1615	* @note In that case, the ACK bit controls the (N)ACK of the current byte received or the PEC bit indicates that the current byte in shift register is a PEC.
AnnaBridge	145:64910690c574	1616	* @rmtoll CR1 POS LL_I2C_DisableBitPOS
AnnaBridge	145:64910690c574	1617	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1618	* @retval None
AnnaBridge	145:64910690c574	1619	*/
AnnaBridge	145:64910690c574	1620	__STATIC_INLINE void LL_I2C_DisableBitPOS(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1621	{
AnnaBridge	145:64910690c574	1622	CLEAR_BIT(I2Cx->CR1, I2C_CR1_POS);
AnnaBridge	145:64910690c574	1623	}
AnnaBridge	145:64910690c574	1624
AnnaBridge	145:64910690c574	1625	/**
AnnaBridge	145:64910690c574	1626	* @brief Check if bit POS is enabled or disabled.
AnnaBridge	145:64910690c574	1627	* @rmtoll CR1 POS LL_I2C_IsEnabledBitPOS
AnnaBridge	145:64910690c574	1628	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1629	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1630	*/
AnnaBridge	145:64910690c574	1631	__STATIC_INLINE uint32_t LL_I2C_IsEnabledBitPOS(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1632	{
AnnaBridge	145:64910690c574	1633	return (READ_BIT(I2Cx->CR1, I2C_CR1_POS) == (I2C_CR1_POS));
AnnaBridge	145:64910690c574	1634	}
AnnaBridge	145:64910690c574	1635
AnnaBridge	145:64910690c574	1636	/**
AnnaBridge	145:64910690c574	1637	* @brief Indicate the value of transfer direction.
AnnaBridge	145:64910690c574	1638	* @note RESET: Bus is in read transfer (peripheral point of view).
AnnaBridge	145:64910690c574	1639	* SET: Bus is in write transfer (peripheral point of view).
AnnaBridge	145:64910690c574	1640	* @rmtoll SR2 TRA LL_I2C_GetTransferDirection
AnnaBridge	145:64910690c574	1641	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1642	* @retval Returned value can be one of the following values:
AnnaBridge	145:64910690c574	1643	* @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge	145:64910690c574	1644	* @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge	145:64910690c574	1645	*/
AnnaBridge	145:64910690c574	1646	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1647	{
AnnaBridge	145:64910690c574	1648	return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_TRA));
AnnaBridge	145:64910690c574	1649	}
AnnaBridge	145:64910690c574	1650
AnnaBridge	145:64910690c574	1651	/**
AnnaBridge	145:64910690c574	1652	* @brief Enable DMA last transfer.
AnnaBridge	145:64910690c574	1653	* @note This action mean that next DMA EOT is the last transfer.
AnnaBridge	145:64910690c574	1654	* @rmtoll CR2 LAST LL_I2C_EnableLastDMA
AnnaBridge	145:64910690c574	1655	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1656	* @retval None
AnnaBridge	145:64910690c574	1657	*/
AnnaBridge	145:64910690c574	1658	__STATIC_INLINE void LL_I2C_EnableLastDMA(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1659	{
AnnaBridge	145:64910690c574	1660	SET_BIT(I2Cx->CR2, I2C_CR2_LAST);
AnnaBridge	145:64910690c574	1661	}
AnnaBridge	145:64910690c574	1662
AnnaBridge	145:64910690c574	1663	/**
AnnaBridge	145:64910690c574	1664	* @brief Disable DMA last transfer.
AnnaBridge	145:64910690c574	1665	* @note This action mean that next DMA EOT is not the last transfer.
AnnaBridge	145:64910690c574	1666	* @rmtoll CR2 LAST LL_I2C_DisableLastDMA
AnnaBridge	145:64910690c574	1667	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1668	* @retval None
AnnaBridge	145:64910690c574	1669	*/
AnnaBridge	145:64910690c574	1670	__STATIC_INLINE void LL_I2C_DisableLastDMA(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1671	{
AnnaBridge	145:64910690c574	1672	CLEAR_BIT(I2Cx->CR2, I2C_CR2_LAST);
AnnaBridge	145:64910690c574	1673	}
AnnaBridge	145:64910690c574	1674
AnnaBridge	145:64910690c574	1675	/**
AnnaBridge	145:64910690c574	1676	* @brief Check if DMA last transfer is enabled or disabled.
AnnaBridge	145:64910690c574	1677	* @rmtoll CR2 LAST LL_I2C_IsEnabledLastDMA
AnnaBridge	145:64910690c574	1678	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1679	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1680	*/
AnnaBridge	145:64910690c574	1681	__STATIC_INLINE uint32_t LL_I2C_IsEnabledLastDMA(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1682	{
AnnaBridge	145:64910690c574	1683	return (READ_BIT(I2Cx->CR2, I2C_CR2_LAST) == (I2C_CR2_LAST));
AnnaBridge	145:64910690c574	1684	}
AnnaBridge	145:64910690c574	1685
AnnaBridge	145:64910690c574	1686	/**
AnnaBridge	145:64910690c574	1687	* @brief Enable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	145:64910690c574	1688	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1689	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1690	* @note This feature is cleared by hardware when the PEC byte is transferred or compared,
AnnaBridge	145:64910690c574	1691	* or by a START or STOP condition, it is also cleared by software.
AnnaBridge	145:64910690c574	1692	* @rmtoll CR1 PEC LL_I2C_EnableSMBusPECCompare
AnnaBridge	145:64910690c574	1693	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1694	* @retval None
AnnaBridge	145:64910690c574	1695	*/
AnnaBridge	145:64910690c574	1696	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1697	{
AnnaBridge	145:64910690c574	1698	SET_BIT(I2Cx->CR1, I2C_CR1_PEC);
AnnaBridge	145:64910690c574	1699	}
AnnaBridge	145:64910690c574	1700
AnnaBridge	145:64910690c574	1701	/**
AnnaBridge	145:64910690c574	1702	* @brief Disable transfer or internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	145:64910690c574	1703	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1704	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1705	* @rmtoll CR1 PEC LL_I2C_DisableSMBusPECCompare
AnnaBridge	145:64910690c574	1706	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1707	* @retval None
AnnaBridge	145:64910690c574	1708	*/
AnnaBridge	145:64910690c574	1709	__STATIC_INLINE void LL_I2C_DisableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1710	{
AnnaBridge	145:64910690c574	1711	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PEC);
AnnaBridge	145:64910690c574	1712	}
AnnaBridge	145:64910690c574	1713
AnnaBridge	145:64910690c574	1714	/**
AnnaBridge	145:64910690c574	1715	* @brief Check if the SMBus Packet Error byte transfer or internal comparison is requested or not.
AnnaBridge	145:64910690c574	1716	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1717	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1718	* @rmtoll CR1 PEC LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge	145:64910690c574	1719	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1720	* @retval State of bit (1 or 0).
AnnaBridge	145:64910690c574	1721	*/
AnnaBridge	145:64910690c574	1722	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1723	{
AnnaBridge	145:64910690c574	1724	return (READ_BIT(I2Cx->CR1, I2C_CR1_PEC) == (I2C_CR1_PEC));
AnnaBridge	145:64910690c574	1725	}
AnnaBridge	145:64910690c574	1726
AnnaBridge	145:64910690c574	1727	/**
AnnaBridge	145:64910690c574	1728	* @brief Get the SMBus Packet Error byte calculated.
AnnaBridge	145:64910690c574	1729	* @note Macro @ref IS_SMBUS_ALL_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	145:64910690c574	1730	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	145:64910690c574	1731	* @rmtoll SR2 PEC LL_I2C_GetSMBusPEC
AnnaBridge	145:64910690c574	1732	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1733	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1734	*/
AnnaBridge	145:64910690c574	1735	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1736	{
AnnaBridge	145:64910690c574	1737	return (uint32_t)(READ_BIT(I2Cx->SR2, I2C_SR2_PEC) >> I2C_SR2_PEC_Pos);
AnnaBridge	145:64910690c574	1738	}
AnnaBridge	145:64910690c574	1739
AnnaBridge	145:64910690c574	1740	/**
AnnaBridge	145:64910690c574	1741	* @brief Read Receive Data register.
AnnaBridge	145:64910690c574	1742	* @rmtoll DR DR LL_I2C_ReceiveData8
AnnaBridge	145:64910690c574	1743	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1744	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1745	*/
AnnaBridge	145:64910690c574	1746	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge	145:64910690c574	1747	{
AnnaBridge	145:64910690c574	1748	return (uint8_t)(READ_BIT(I2Cx->DR, I2C_DR_DR));
AnnaBridge	145:64910690c574	1749	}
AnnaBridge	145:64910690c574	1750
AnnaBridge	145:64910690c574	1751	/**
AnnaBridge	145:64910690c574	1752	* @brief Write in Transmit Data Register .
AnnaBridge	145:64910690c574	1753	* @rmtoll DR DR LL_I2C_TransmitData8
AnnaBridge	145:64910690c574	1754	* @param I2Cx I2C Instance.
AnnaBridge	145:64910690c574	1755	* @param Data Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	145:64910690c574	1756	* @retval None
AnnaBridge	145:64910690c574	1757	*/
AnnaBridge	145:64910690c574	1758	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge	145:64910690c574	1759	{
AnnaBridge	145:64910690c574	1760	MODIFY_REG(I2Cx->DR, I2C_DR_DR, Data);
AnnaBridge	145:64910690c574	1761	}
AnnaBridge	145:64910690c574	1762
AnnaBridge	145:64910690c574	1763	/**
AnnaBridge	145:64910690c574	1764	* @}
AnnaBridge	145:64910690c574	1765	*/
AnnaBridge	145:64910690c574	1766
AnnaBridge	145:64910690c574	1767	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	145:64910690c574	1768	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	145:64910690c574	1769	* @{
AnnaBridge	145:64910690c574	1770	*/
AnnaBridge	145:64910690c574	1771
AnnaBridge	145:64910690c574	1772	uint32_t LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
AnnaBridge	145:64910690c574	1773	uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge	145:64910690c574	1774	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge	145:64910690c574	1775
AnnaBridge	145:64910690c574	1776
AnnaBridge	145:64910690c574	1777	/**
AnnaBridge	145:64910690c574	1778	* @}
AnnaBridge	145:64910690c574	1779	*/
AnnaBridge	145:64910690c574	1780	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	145:64910690c574	1781
AnnaBridge	145:64910690c574	1782	/**
AnnaBridge	145:64910690c574	1783	* @}
AnnaBridge	145:64910690c574	1784	*/
AnnaBridge	145:64910690c574	1785
AnnaBridge	145:64910690c574	1786	/**
AnnaBridge	145:64910690c574	1787	* @}
AnnaBridge	145:64910690c574	1788	*/
AnnaBridge	145:64910690c574	1789
AnnaBridge	145:64910690c574	1790	#endif /* I2C1 \|\| I2C2 \|\| I2C3 */
AnnaBridge	145:64910690c574	1791
AnnaBridge	145:64910690c574	1792	/**
AnnaBridge	145:64910690c574	1793	* @}
AnnaBridge	145:64910690c574	1794	*/
AnnaBridge	145:64910690c574	1795
AnnaBridge	145:64910690c574	1796	#ifdef __cplusplus
AnnaBridge	145:64910690c574	1797	}
AnnaBridge	145:64910690c574	1798	#endif
AnnaBridge	145:64910690c574	1799
AnnaBridge	145:64910690c574	1800	#endif /* __STM32F2xx_LL_I2C_H */
AnnaBridge	145:64910690c574	1801
AnnaBridge	145:64910690c574	1802	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/