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TARGET_NUCLEO_F103RB/TOOLCHAIN_IAR/stm32f1xx_hal_adc_ex.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f1xx_hal_adc_ex.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of ADC HAL extension module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F1xx_HAL_ADC_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F1xx_HAL_ADC_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f1xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F1xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 49 | */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | |
| AnnaBridge | 171:3a7713b1edbc | 51 | /** @addtogroup ADCEx |
| AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 53 | */ |
| AnnaBridge | 171:3a7713b1edbc | 54 | |
| AnnaBridge | 171:3a7713b1edbc | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 56 | /** @defgroup ADCEx_Exported_Types ADCEx Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 57 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 58 | */ |
| AnnaBridge | 171:3a7713b1edbc | 59 | |
| AnnaBridge | 171:3a7713b1edbc | 60 | /** |
| AnnaBridge | 171:3a7713b1edbc | 61 | * @brief ADC Configuration injected Channel structure definition |
| AnnaBridge | 171:3a7713b1edbc | 62 | * @note Parameters of this structure are shared within 2 scopes: |
| AnnaBridge | 171:3a7713b1edbc | 63 | * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset |
| AnnaBridge | 171:3a7713b1edbc | 64 | * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, |
| AnnaBridge | 171:3a7713b1edbc | 65 | * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. |
| AnnaBridge | 171:3a7713b1edbc | 66 | * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. |
| AnnaBridge | 171:3a7713b1edbc | 67 | * ADC state can be either: |
| AnnaBridge | 171:3a7713b1edbc | 68 | * - For all parameters: ADC disabled (this is the only possible ADC state to modify parameter 'ExternalTrigInjecConv') |
| AnnaBridge | 171:3a7713b1edbc | 69 | * - For all except parameters 'ExternalTrigInjecConv': ADC enabled without conversion on going on injected group. |
| AnnaBridge | 171:3a7713b1edbc | 70 | */ |
| AnnaBridge | 171:3a7713b1edbc | 71 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 72 | { |
| AnnaBridge | 171:3a7713b1edbc | 73 | uint32_t InjectedChannel; /*!< Selection of ADC channel to configure |
| AnnaBridge | 171:3a7713b1edbc | 74 | This parameter can be a value of @ref ADC_channels |
| AnnaBridge | 171:3a7713b1edbc | 75 | Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. |
| AnnaBridge | 171:3a7713b1edbc | 76 | Note: On STM32F1 devices with several ADC: Only ADC1 can access internal measurement channels (VrefInt/TempSensor) |
| AnnaBridge | 171:3a7713b1edbc | 77 | Note: On STM32F10xx8 and STM32F10xxB devices: A low-amplitude voltage glitch may be generated (on ADC input 0) on the PA0 pin, when the ADC is converting with injection trigger. |
| AnnaBridge | 171:3a7713b1edbc | 78 | It is advised to distribute the analog channels so that Channel 0 is configured as an injected channel. |
| AnnaBridge | 171:3a7713b1edbc | 79 | Refer to errata sheet of these devices for more details. */ |
| AnnaBridge | 171:3a7713b1edbc | 80 | uint32_t InjectedRank; /*!< Rank in the injected group sequencer |
| AnnaBridge | 171:3a7713b1edbc | 81 | This parameter must be a value of @ref ADCEx_injected_rank |
| AnnaBridge | 171:3a7713b1edbc | 82 | Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ |
| AnnaBridge | 171:3a7713b1edbc | 83 | uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. |
| AnnaBridge | 171:3a7713b1edbc | 84 | Unit: ADC clock cycles |
| AnnaBridge | 171:3a7713b1edbc | 85 | Conversion time is the addition of sampling time and processing time (12.5 ADC clock cycles at ADC resolution 12 bits). |
| AnnaBridge | 171:3a7713b1edbc | 86 | This parameter can be a value of @ref ADC_sampling_times |
| AnnaBridge | 171:3a7713b1edbc | 87 | Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. |
| AnnaBridge | 171:3a7713b1edbc | 88 | If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. |
| AnnaBridge | 171:3a7713b1edbc | 89 | Note: In case of usage of internal measurement channels (VrefInt/TempSensor), |
| AnnaBridge | 171:3a7713b1edbc | 90 | sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) |
| AnnaBridge | 171:3a7713b1edbc | 91 | Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 5us to 17.1us min). */ |
| AnnaBridge | 171:3a7713b1edbc | 92 | uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). |
| AnnaBridge | 171:3a7713b1edbc | 93 | Offset value must be a positive number. |
| AnnaBridge | 171:3a7713b1edbc | 94 | Depending of ADC resolution selected (12, 10, 8 or 6 bits), |
| AnnaBridge | 171:3a7713b1edbc | 95 | this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ |
| AnnaBridge | 171:3a7713b1edbc | 96 | uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. |
| AnnaBridge | 171:3a7713b1edbc | 97 | To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. |
| AnnaBridge | 171:3a7713b1edbc | 98 | This parameter must be a number between Min_Data = 1 and Max_Data = 4. |
| AnnaBridge | 171:3a7713b1edbc | 99 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 100 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 101 | uint32_t InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). |
| AnnaBridge | 171:3a7713b1edbc | 102 | Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. |
| AnnaBridge | 171:3a7713b1edbc | 103 | Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. |
| AnnaBridge | 171:3a7713b1edbc | 104 | This parameter can be set to ENABLE or DISABLE. |
| AnnaBridge | 171:3a7713b1edbc | 105 | Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. |
| AnnaBridge | 171:3a7713b1edbc | 106 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 107 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 108 | uint32_t AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one |
| AnnaBridge | 171:3a7713b1edbc | 109 | This parameter can be set to ENABLE or DISABLE. |
| AnnaBridge | 171:3a7713b1edbc | 110 | Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) |
| AnnaBridge | 171:3a7713b1edbc | 111 | Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) |
| AnnaBridge | 171:3a7713b1edbc | 112 | Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. |
| AnnaBridge | 171:3a7713b1edbc | 113 | To maintain JAUTO always enabled, DMA must be configured in circular mode. |
| AnnaBridge | 171:3a7713b1edbc | 114 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 115 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 116 | uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. |
| AnnaBridge | 171:3a7713b1edbc | 117 | If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. |
| AnnaBridge | 171:3a7713b1edbc | 118 | If set to external trigger source, triggering is on event rising edge. |
| AnnaBridge | 171:3a7713b1edbc | 119 | This parameter can be a value of @ref ADCEx_External_trigger_source_Injected |
| AnnaBridge | 171:3a7713b1edbc | 120 | Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). |
| AnnaBridge | 171:3a7713b1edbc | 121 | If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) |
| AnnaBridge | 171:3a7713b1edbc | 122 | Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to |
| AnnaBridge | 171:3a7713b1edbc | 123 | configure a channel on injected group can impact the configuration of other channels previously set. */ |
| AnnaBridge | 171:3a7713b1edbc | 124 | }ADC_InjectionConfTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 125 | |
| AnnaBridge | 171:3a7713b1edbc | 126 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 127 | /** |
| AnnaBridge | 171:3a7713b1edbc | 128 | * @brief Structure definition of ADC multimode |
| AnnaBridge | 171:3a7713b1edbc | 129 | * @note The setting of these parameters with function HAL_ADCEx_MultiModeConfigChannel() is conditioned to ADCs state (both ADCs of the common group). |
| AnnaBridge | 171:3a7713b1edbc | 130 | * State of ADCs of the common group must be: disabled. |
| AnnaBridge | 171:3a7713b1edbc | 131 | */ |
| AnnaBridge | 171:3a7713b1edbc | 132 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 133 | { |
| AnnaBridge | 171:3a7713b1edbc | 134 | uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. |
| AnnaBridge | 171:3a7713b1edbc | 135 | This parameter can be a value of @ref ADCEx_Common_mode |
| AnnaBridge | 171:3a7713b1edbc | 136 | Note: In dual mode, a change of channel configuration generates a restart that can produce a loss of synchronization. It is recommended to disable dual mode before any configuration change. |
| AnnaBridge | 171:3a7713b1edbc | 137 | Note: In case of simultaneous mode used: Exactly the same sampling time should be configured for the 2 channels that will be sampled simultaneously by ACD1 and ADC2. |
| AnnaBridge | 171:3a7713b1edbc | 138 | Note: In case of interleaved mode used: To avoid overlap between conversions, maximum sampling time allowed is 7 ADC clock cycles for fast interleaved mode and 14 ADC clock cycles for slow interleaved mode. |
| AnnaBridge | 171:3a7713b1edbc | 139 | Note: Some multimode parameters are fixed on STM32F1 and can be configured on other STM32 devices with several ADC (multimode configuration structure can have additional parameters). |
| AnnaBridge | 171:3a7713b1edbc | 140 | The equivalences are: |
| AnnaBridge | 171:3a7713b1edbc | 141 | - Parameter 'DMAAccessMode': On STM32F1, this parameter is fixed to 1 DMA channel (one DMA channel for both ADC, DMA of ADC master). On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_DMAACCESSMODE_12_10_BITS'. |
| AnnaBridge | 171:3a7713b1edbc | 142 | - Parameter 'TwoSamplingDelay': On STM32F1, this parameter is fixed to 7 or 14 ADC clock cycles depending on fast or slow interleaved mode selected. On other STM32 devices with several ADC, this is equivalent to parameter 'ADC_TWOSAMPLINGDELAY_7CYCLES' (for fast interleaved mode). */ |
| AnnaBridge | 171:3a7713b1edbc | 143 | |
| AnnaBridge | 171:3a7713b1edbc | 144 | |
| AnnaBridge | 171:3a7713b1edbc | 145 | }ADC_MultiModeTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 146 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 147 | |
| AnnaBridge | 171:3a7713b1edbc | 148 | /** |
| AnnaBridge | 171:3a7713b1edbc | 149 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 150 | */ |
| AnnaBridge | 171:3a7713b1edbc | 151 | |
| AnnaBridge | 171:3a7713b1edbc | 152 | |
| AnnaBridge | 171:3a7713b1edbc | 153 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 154 | |
| AnnaBridge | 171:3a7713b1edbc | 155 | /** @defgroup ADCEx_Exported_Constants ADCEx Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 156 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 157 | */ |
| AnnaBridge | 171:3a7713b1edbc | 158 | |
| AnnaBridge | 171:3a7713b1edbc | 159 | /** @defgroup ADCEx_injected_rank ADCEx rank into injected group |
| AnnaBridge | 171:3a7713b1edbc | 160 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 161 | */ |
| AnnaBridge | 171:3a7713b1edbc | 162 | #define ADC_INJECTED_RANK_1 0x00000001U |
| AnnaBridge | 171:3a7713b1edbc | 163 | #define ADC_INJECTED_RANK_2 0x00000002U |
| AnnaBridge | 171:3a7713b1edbc | 164 | #define ADC_INJECTED_RANK_3 0x00000003U |
| AnnaBridge | 171:3a7713b1edbc | 165 | #define ADC_INJECTED_RANK_4 0x00000004U |
| AnnaBridge | 171:3a7713b1edbc | 166 | /** |
| AnnaBridge | 171:3a7713b1edbc | 167 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 168 | */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | |
| AnnaBridge | 171:3a7713b1edbc | 170 | /** @defgroup ADCEx_External_trigger_edge_Injected ADCEx external trigger enable for injected group |
| AnnaBridge | 171:3a7713b1edbc | 171 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 172 | */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_NONE 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 174 | #define ADC_EXTERNALTRIGINJECCONV_EDGE_RISING ((uint32_t)ADC_CR2_JEXTTRIG) |
| AnnaBridge | 171:3a7713b1edbc | 175 | /** |
| AnnaBridge | 171:3a7713b1edbc | 176 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 177 | */ |
| AnnaBridge | 171:3a7713b1edbc | 178 | |
| AnnaBridge | 171:3a7713b1edbc | 179 | /** @defgroup ADC_External_trigger_source_Regular ADC External trigger selection for regular group |
| AnnaBridge | 171:3a7713b1edbc | 180 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 181 | */ |
| AnnaBridge | 171:3a7713b1edbc | 182 | /*!< List of external triggers with generic trigger name, independently of */ |
| AnnaBridge | 171:3a7713b1edbc | 183 | /* ADC target, sorted by trigger name: */ |
| AnnaBridge | 171:3a7713b1edbc | 184 | |
| AnnaBridge | 171:3a7713b1edbc | 185 | /*!< External triggers of regular group for ADC1&ADC2 only */ |
| AnnaBridge | 171:3a7713b1edbc | 186 | #define ADC_EXTERNALTRIGCONV_T1_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 187 | #define ADC_EXTERNALTRIGCONV_T1_CC2 ADC1_2_EXTERNALTRIG_T1_CC2 |
| AnnaBridge | 171:3a7713b1edbc | 188 | #define ADC_EXTERNALTRIGCONV_T2_CC2 ADC1_2_EXTERNALTRIG_T2_CC2 |
| AnnaBridge | 171:3a7713b1edbc | 189 | #define ADC_EXTERNALTRIGCONV_T3_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 190 | #define ADC_EXTERNALTRIGCONV_T4_CC4 ADC1_2_EXTERNALTRIG_T4_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 191 | #define ADC_EXTERNALTRIGCONV_EXT_IT11 ADC1_2_EXTERNALTRIG_EXT_IT11 |
| AnnaBridge | 171:3a7713b1edbc | 192 | |
| AnnaBridge | 171:3a7713b1edbc | 193 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 194 | /*!< External triggers of regular group for ADC3 only */ |
| AnnaBridge | 171:3a7713b1edbc | 195 | #define ADC_EXTERNALTRIGCONV_T2_CC3 ADC3_EXTERNALTRIG_T2_CC3 |
| AnnaBridge | 171:3a7713b1edbc | 196 | #define ADC_EXTERNALTRIGCONV_T3_CC1 ADC3_EXTERNALTRIG_T3_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 197 | #define ADC_EXTERNALTRIGCONV_T5_CC1 ADC3_EXTERNALTRIG_T5_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 198 | #define ADC_EXTERNALTRIGCONV_T5_CC3 ADC3_EXTERNALTRIG_T5_CC3 |
| AnnaBridge | 171:3a7713b1edbc | 199 | #define ADC_EXTERNALTRIGCONV_T8_CC1 ADC3_EXTERNALTRIG_T8_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 200 | #endif /* STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 201 | |
| AnnaBridge | 171:3a7713b1edbc | 202 | /*!< External triggers of regular group for all ADC instances */ |
| AnnaBridge | 171:3a7713b1edbc | 203 | #define ADC_EXTERNALTRIGCONV_T1_CC3 ADC1_2_3_EXTERNALTRIG_T1_CC3 |
| AnnaBridge | 171:3a7713b1edbc | 204 | |
| AnnaBridge | 171:3a7713b1edbc | 205 | #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
| AnnaBridge | 171:3a7713b1edbc | 206 | /*!< Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ |
| AnnaBridge | 171:3a7713b1edbc | 207 | /* XL-density devices. */ |
| AnnaBridge | 171:3a7713b1edbc | 208 | /* To use it on ADC or ADC2, a remap of trigger must be done from */ |
| AnnaBridge | 171:3a7713b1edbc | 209 | /* EXTI line 11 to TIM8_TRGO with macro: */ |
| AnnaBridge | 171:3a7713b1edbc | 210 | /* __HAL_AFIO_REMAP_ADC1_ETRGREG_ENABLE() */ |
| AnnaBridge | 171:3a7713b1edbc | 211 | /* __HAL_AFIO_REMAP_ADC2_ETRGREG_ENABLE() */ |
| AnnaBridge | 171:3a7713b1edbc | 212 | |
| AnnaBridge | 171:3a7713b1edbc | 213 | /* Note for internal constant value management: If TIM8_TRGO is available, */ |
| AnnaBridge | 171:3a7713b1edbc | 214 | /* its definition is set to value for ADC1&ADC2 by default and changed to */ |
| AnnaBridge | 171:3a7713b1edbc | 215 | /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ |
| AnnaBridge | 171:3a7713b1edbc | 216 | #define ADC_EXTERNALTRIGCONV_T8_TRGO ADC1_2_EXTERNALTRIG_T8_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 217 | #endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
| AnnaBridge | 171:3a7713b1edbc | 218 | |
| AnnaBridge | 171:3a7713b1edbc | 219 | #define ADC_SOFTWARE_START ADC1_2_3_SWSTART |
| AnnaBridge | 171:3a7713b1edbc | 220 | /** |
| AnnaBridge | 171:3a7713b1edbc | 221 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 222 | */ |
| AnnaBridge | 171:3a7713b1edbc | 223 | |
| AnnaBridge | 171:3a7713b1edbc | 224 | /** @defgroup ADCEx_External_trigger_source_Injected ADCEx External trigger selection for injected group |
| AnnaBridge | 171:3a7713b1edbc | 225 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 226 | */ |
| AnnaBridge | 171:3a7713b1edbc | 227 | /*!< List of external triggers with generic trigger name, independently of */ |
| AnnaBridge | 171:3a7713b1edbc | 228 | /* ADC target, sorted by trigger name: */ |
| AnnaBridge | 171:3a7713b1edbc | 229 | |
| AnnaBridge | 171:3a7713b1edbc | 230 | /*!< External triggers of injected group for ADC1&ADC2 only */ |
| AnnaBridge | 171:3a7713b1edbc | 231 | #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ADC1_2_EXTERNALTRIGINJEC_T2_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 232 | #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 233 | #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 234 | #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 235 | #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
| AnnaBridge | 171:3a7713b1edbc | 236 | |
| AnnaBridge | 171:3a7713b1edbc | 237 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 238 | /*!< External triggers of injected group for ADC3 only */ |
| AnnaBridge | 171:3a7713b1edbc | 239 | #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ADC3_EXTERNALTRIGINJEC_T4_CC3 |
| AnnaBridge | 171:3a7713b1edbc | 240 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ADC3_EXTERNALTRIGINJEC_T8_CC2 |
| AnnaBridge | 171:3a7713b1edbc | 241 | #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ADC3_EXTERNALTRIGINJEC_T5_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 242 | #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ADC3_EXTERNALTRIGINJEC_T5_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 243 | #endif /* STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 244 | |
| AnnaBridge | 171:3a7713b1edbc | 245 | /*!< External triggers of injected group for all ADC instances */ |
| AnnaBridge | 171:3a7713b1edbc | 246 | #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 247 | #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 248 | |
| AnnaBridge | 171:3a7713b1edbc | 249 | #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) || defined (STM32F105xC) || defined (STM32F107xC) |
| AnnaBridge | 171:3a7713b1edbc | 250 | /*!< Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ |
| AnnaBridge | 171:3a7713b1edbc | 251 | /* XL-density devices. */ |
| AnnaBridge | 171:3a7713b1edbc | 252 | /* To use it on ADC1 or ADC2, a remap of trigger must be done from */ |
| AnnaBridge | 171:3a7713b1edbc | 253 | /* EXTI line 11 to TIM8_CC4 with macro: */ |
| AnnaBridge | 171:3a7713b1edbc | 254 | /* __HAL_AFIO_REMAP_ADC1_ETRGINJ_ENABLE() */ |
| AnnaBridge | 171:3a7713b1edbc | 255 | /* __HAL_AFIO_REMAP_ADC2_ETRGINJ_ENABLE() */ |
| AnnaBridge | 171:3a7713b1edbc | 256 | |
| AnnaBridge | 171:3a7713b1edbc | 257 | /* Note for internal constant value management: If TIM8_CC4 is available, */ |
| AnnaBridge | 171:3a7713b1edbc | 258 | /* its definition is set to value for ADC1&ADC2 by default and changed to */ |
| AnnaBridge | 171:3a7713b1edbc | 259 | /* value for ADC3 by HAL ADC driver if ADC3 is selected. */ |
| AnnaBridge | 171:3a7713b1edbc | 260 | #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T8_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 261 | #endif /* STM32F101xE || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */ |
| AnnaBridge | 171:3a7713b1edbc | 262 | |
| AnnaBridge | 171:3a7713b1edbc | 263 | #define ADC_INJECTED_SOFTWARE_START ADC1_2_3_JSWSTART |
| AnnaBridge | 171:3a7713b1edbc | 264 | /** |
| AnnaBridge | 171:3a7713b1edbc | 265 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 266 | */ |
| AnnaBridge | 171:3a7713b1edbc | 267 | |
| AnnaBridge | 171:3a7713b1edbc | 268 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 269 | /** @defgroup ADCEx_Common_mode ADC Extended Dual ADC Mode |
| AnnaBridge | 171:3a7713b1edbc | 270 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 271 | */ |
| AnnaBridge | 171:3a7713b1edbc | 272 | #define ADC_MODE_INDEPENDENT 0x00000000U /*!< ADC dual mode disabled (ADC independent mode) */ |
| AnnaBridge | 171:3a7713b1edbc | 273 | #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined regular simultaneous + injected simultaneous mode, on groups regular and injected */ |
| AnnaBridge | 171:3a7713b1edbc | 274 | #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)( ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Combined regular simultaneous + alternate trigger mode, on groups regular and injected */ |
| AnnaBridge | 171:3a7713b1edbc | 275 | #define ADC_DUALMODE_INJECSIMULT_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Combined injected simultaneous + fast interleaved mode, on groups regular and injected (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| AnnaBridge | 171:3a7713b1edbc | 276 | #define ADC_DUALMODE_INJECSIMULT_INTERLSLOW ((uint32_t)( ADC_CR1_DUALMOD_2 )) /*!< ADC dual mode enabled: Combined injected simultaneous + slow Interleaved mode, on groups regular and injected (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| AnnaBridge | 171:3a7713b1edbc | 277 | #define ADC_DUALMODE_INJECSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Injected simultaneous mode, on group injected */ |
| AnnaBridge | 171:3a7713b1edbc | 278 | #define ADC_DUALMODE_REGSIMULT ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 )) /*!< ADC dual mode enabled: Regular simultaneous mode, on group regular */ |
| AnnaBridge | 171:3a7713b1edbc | 279 | #define ADC_DUALMODE_INTERLFAST ((uint32_t)( ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Fast interleaved mode, on group regular (delay between ADC sampling phases: 7 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| AnnaBridge | 171:3a7713b1edbc | 280 | #define ADC_DUALMODE_INTERLSLOW ((uint32_t)(ADC_CR1_DUALMOD_3 )) /*!< ADC dual mode enabled: Slow interleaved mode, on group regular (delay between ADC sampling phases: 14 ADC clock cycles (equivalent to parameter "TwoSamplingDelay" set to "ADC_TWOSAMPLINGDELAY_7CYCLES" on other STM32 devices)) */ |
| AnnaBridge | 171:3a7713b1edbc | 281 | #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CR1_DUALMOD_3 | ADC_CR1_DUALMOD_0)) /*!< ADC dual mode enabled: Alternate trigger mode, on group injected */ |
| AnnaBridge | 171:3a7713b1edbc | 282 | /** |
| AnnaBridge | 171:3a7713b1edbc | 283 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 284 | */ |
| AnnaBridge | 171:3a7713b1edbc | 285 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 286 | |
| AnnaBridge | 171:3a7713b1edbc | 287 | /** |
| AnnaBridge | 171:3a7713b1edbc | 288 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 289 | */ |
| AnnaBridge | 171:3a7713b1edbc | 290 | |
| AnnaBridge | 171:3a7713b1edbc | 291 | |
| AnnaBridge | 171:3a7713b1edbc | 292 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 293 | |
| AnnaBridge | 171:3a7713b1edbc | 294 | /** @addtogroup ADCEx_Private_Constants ADCEx Private Constants |
| AnnaBridge | 171:3a7713b1edbc | 295 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 296 | */ |
| AnnaBridge | 171:3a7713b1edbc | 297 | |
| AnnaBridge | 171:3a7713b1edbc | 298 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Regular ADC Extended Internal HAL driver trigger selection for regular group |
| AnnaBridge | 171:3a7713b1edbc | 299 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 300 | */ |
| AnnaBridge | 171:3a7713b1edbc | 301 | /* List of external triggers of regular group for ADC1, ADC2, ADC3 (if ADC */ |
| AnnaBridge | 171:3a7713b1edbc | 302 | /* instance is available on the selected device). */ |
| AnnaBridge | 171:3a7713b1edbc | 303 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| AnnaBridge | 171:3a7713b1edbc | 304 | |
| AnnaBridge | 171:3a7713b1edbc | 305 | /* External triggers of regular group for ADC1&ADC2 (if ADCx available) */ |
| AnnaBridge | 171:3a7713b1edbc | 306 | #define ADC1_2_EXTERNALTRIG_T1_CC1 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 307 | #define ADC1_2_EXTERNALTRIG_T1_CC2 ((uint32_t)( ADC_CR2_EXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 308 | #define ADC1_2_EXTERNALTRIG_T2_CC2 ((uint32_t)( ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 309 | #define ADC1_2_EXTERNALTRIG_T3_TRGO ((uint32_t)(ADC_CR2_EXTSEL_2 )) |
| AnnaBridge | 171:3a7713b1edbc | 310 | #define ADC1_2_EXTERNALTRIG_T4_CC4 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 311 | #define ADC1_2_EXTERNALTRIG_EXT_IT11 ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 312 | #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 313 | /* Note: TIM8_TRGO is available on ADC1 and ADC2 only in high-density and */ |
| AnnaBridge | 171:3a7713b1edbc | 314 | /* XL-density devices. */ |
| AnnaBridge | 171:3a7713b1edbc | 315 | #define ADC1_2_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_EXT_IT11 |
| AnnaBridge | 171:3a7713b1edbc | 316 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 317 | |
| AnnaBridge | 171:3a7713b1edbc | 318 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 319 | /* External triggers of regular group for ADC3 */ |
| AnnaBridge | 171:3a7713b1edbc | 320 | #define ADC3_EXTERNALTRIG_T3_CC1 ADC1_2_EXTERNALTRIG_T1_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 321 | #define ADC3_EXTERNALTRIG_T2_CC3 ADC1_2_EXTERNALTRIG_T1_CC2 |
| AnnaBridge | 171:3a7713b1edbc | 322 | #define ADC3_EXTERNALTRIG_T8_CC1 ADC1_2_EXTERNALTRIG_T2_CC2 |
| AnnaBridge | 171:3a7713b1edbc | 323 | #define ADC3_EXTERNALTRIG_T8_TRGO ADC1_2_EXTERNALTRIG_T3_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 324 | #define ADC3_EXTERNALTRIG_T5_CC1 ADC1_2_EXTERNALTRIG_T4_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 325 | #define ADC3_EXTERNALTRIG_T5_CC3 ADC1_2_EXTERNALTRIG_EXT_IT11 |
| AnnaBridge | 171:3a7713b1edbc | 326 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 327 | |
| AnnaBridge | 171:3a7713b1edbc | 328 | /* External triggers of regular group for ADC1&ADC2&ADC3 (if ADCx available) */ |
| AnnaBridge | 171:3a7713b1edbc | 329 | #define ADC1_2_3_EXTERNALTRIG_T1_CC3 ((uint32_t)( ADC_CR2_EXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 330 | #define ADC1_2_3_SWSTART ((uint32_t)(ADC_CR2_EXTSEL_2 | ADC_CR2_EXTSEL_1 | ADC_CR2_EXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 331 | /** |
| AnnaBridge | 171:3a7713b1edbc | 332 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 333 | */ |
| AnnaBridge | 171:3a7713b1edbc | 334 | |
| AnnaBridge | 171:3a7713b1edbc | 335 | /** @defgroup ADCEx_Internal_HAL_driver_Ext_trig_src_Injected ADC Extended Internal HAL driver trigger selection for injected group |
| AnnaBridge | 171:3a7713b1edbc | 336 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 337 | */ |
| AnnaBridge | 171:3a7713b1edbc | 338 | /* List of external triggers of injected group for ADC1, ADC2, ADC3 (if ADC */ |
| AnnaBridge | 171:3a7713b1edbc | 339 | /* instance is available on the selected device). */ |
| AnnaBridge | 171:3a7713b1edbc | 340 | /* (used internally by HAL driver. To not use into HAL structure parameters) */ |
| AnnaBridge | 171:3a7713b1edbc | 341 | |
| AnnaBridge | 171:3a7713b1edbc | 342 | /* External triggers of injected group for ADC1&ADC2 (if ADCx available) */ |
| AnnaBridge | 171:3a7713b1edbc | 343 | #define ADC1_2_EXTERNALTRIGINJEC_T2_TRGO ((uint32_t)( ADC_CR2_JEXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 344 | #define ADC1_2_EXTERNALTRIGINJEC_T2_CC1 ((uint32_t)( ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 345 | #define ADC1_2_EXTERNALTRIGINJEC_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 )) |
| AnnaBridge | 171:3a7713b1edbc | 346 | #define ADC1_2_EXTERNALTRIGINJEC_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 347 | #define ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 )) |
| AnnaBridge | 171:3a7713b1edbc | 348 | #if defined (STM32F101xE) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 349 | /* Note: TIM8_CC4 is available on ADC1 and ADC2 only in high-density and */ |
| AnnaBridge | 171:3a7713b1edbc | 350 | /* XL-density devices. */ |
| AnnaBridge | 171:3a7713b1edbc | 351 | #define ADC1_2_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
| AnnaBridge | 171:3a7713b1edbc | 352 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 353 | |
| AnnaBridge | 171:3a7713b1edbc | 354 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 355 | /* External triggers of injected group for ADC3 */ |
| AnnaBridge | 171:3a7713b1edbc | 356 | #define ADC3_EXTERNALTRIGINJEC_T4_CC3 ADC1_2_EXTERNALTRIGINJEC_T2_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 357 | #define ADC3_EXTERNALTRIGINJEC_T8_CC2 ADC1_2_EXTERNALTRIGINJEC_T2_CC1 |
| AnnaBridge | 171:3a7713b1edbc | 358 | #define ADC3_EXTERNALTRIGINJEC_T8_CC4 ADC1_2_EXTERNALTRIGINJEC_T3_CC4 |
| AnnaBridge | 171:3a7713b1edbc | 359 | #define ADC3_EXTERNALTRIGINJEC_T5_TRGO ADC1_2_EXTERNALTRIGINJEC_T4_TRGO |
| AnnaBridge | 171:3a7713b1edbc | 360 | #define ADC3_EXTERNALTRIGINJEC_T5_CC4 ADC1_2_EXTERNALTRIGINJEC_EXT_IT15 |
| AnnaBridge | 171:3a7713b1edbc | 361 | #endif /* STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 362 | |
| AnnaBridge | 171:3a7713b1edbc | 363 | /* External triggers of injected group for ADC1&ADC2&ADC3 (if ADCx available) */ |
| AnnaBridge | 171:3a7713b1edbc | 364 | #define ADC1_2_3_EXTERNALTRIGINJEC_T1_TRGO 0x00000000U |
| AnnaBridge | 171:3a7713b1edbc | 365 | #define ADC1_2_3_EXTERNALTRIGINJEC_T1_CC4 ((uint32_t)( ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 366 | #define ADC1_2_3_JSWSTART ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) |
| AnnaBridge | 171:3a7713b1edbc | 367 | /** |
| AnnaBridge | 171:3a7713b1edbc | 368 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 369 | */ |
| AnnaBridge | 171:3a7713b1edbc | 370 | |
| AnnaBridge | 171:3a7713b1edbc | 371 | /** |
| AnnaBridge | 171:3a7713b1edbc | 372 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 373 | */ |
| AnnaBridge | 171:3a7713b1edbc | 374 | |
| AnnaBridge | 171:3a7713b1edbc | 375 | |
| AnnaBridge | 171:3a7713b1edbc | 376 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 377 | |
| AnnaBridge | 171:3a7713b1edbc | 378 | /* Private macro -------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 379 | |
| AnnaBridge | 171:3a7713b1edbc | 380 | /** @defgroup ADCEx_Private_Macro ADCEx Private Macro |
| AnnaBridge | 171:3a7713b1edbc | 381 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 382 | */ |
| AnnaBridge | 171:3a7713b1edbc | 383 | /* Macro reserved for internal HAL driver usage, not intended to be used in */ |
| AnnaBridge | 171:3a7713b1edbc | 384 | /* code of final user. */ |
| AnnaBridge | 171:3a7713b1edbc | 385 | |
| AnnaBridge | 171:3a7713b1edbc | 386 | |
| AnnaBridge | 171:3a7713b1edbc | 387 | /** |
| AnnaBridge | 171:3a7713b1edbc | 388 | * @brief For devices with 3 ADCs: Defines the external trigger source |
| AnnaBridge | 171:3a7713b1edbc | 389 | * for regular group according to ADC into common group ADC1&ADC2 or |
| AnnaBridge | 171:3a7713b1edbc | 390 | * ADC3 (some triggers with same source have different value to |
| AnnaBridge | 171:3a7713b1edbc | 391 | * be programmed into ADC EXTSEL bits of CR2 register). |
| AnnaBridge | 171:3a7713b1edbc | 392 | * For devices with 2 ADCs or less: this macro makes no change. |
| AnnaBridge | 171:3a7713b1edbc | 393 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 394 | * @param __EXT_TRIG_CONV__: External trigger selected for regular group. |
| AnnaBridge | 171:3a7713b1edbc | 395 | * @retval External trigger to be programmed into EXTSEL bits of CR2 register |
| AnnaBridge | 171:3a7713b1edbc | 396 | */ |
| AnnaBridge | 171:3a7713b1edbc | 397 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 398 | #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 399 | (( (((__HANDLE__)->Instance) == ADC3) \ |
| AnnaBridge | 171:3a7713b1edbc | 400 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 401 | ( ( (__EXT_TRIG_CONV__) == ADC_EXTERNALTRIGCONV_T8_TRGO \ |
| AnnaBridge | 171:3a7713b1edbc | 402 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 403 | (ADC3_EXTERNALTRIG_T8_TRGO) \ |
| AnnaBridge | 171:3a7713b1edbc | 404 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 405 | (__EXT_TRIG_CONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 406 | ) \ |
| AnnaBridge | 171:3a7713b1edbc | 407 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 408 | (__EXT_TRIG_CONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 409 | ) |
| AnnaBridge | 171:3a7713b1edbc | 410 | #else |
| AnnaBridge | 171:3a7713b1edbc | 411 | #define ADC_CFGR_EXTSEL(__HANDLE__, __EXT_TRIG_CONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 412 | (__EXT_TRIG_CONV__) |
| AnnaBridge | 171:3a7713b1edbc | 413 | #endif /* STM32F103xE || STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 414 | |
| AnnaBridge | 171:3a7713b1edbc | 415 | /** |
| AnnaBridge | 171:3a7713b1edbc | 416 | * @brief For devices with 3 ADCs: Defines the external trigger source |
| AnnaBridge | 171:3a7713b1edbc | 417 | * for injected group according to ADC into common group ADC1&ADC2 or |
| AnnaBridge | 171:3a7713b1edbc | 418 | * ADC3 (some triggers with same source have different value to |
| AnnaBridge | 171:3a7713b1edbc | 419 | * be programmed into ADC JEXTSEL bits of CR2 register). |
| AnnaBridge | 171:3a7713b1edbc | 420 | * For devices with 2 ADCs or less: this macro makes no change. |
| AnnaBridge | 171:3a7713b1edbc | 421 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 422 | * @param __EXT_TRIG_INJECTCONV__: External trigger selected for injected group. |
| AnnaBridge | 171:3a7713b1edbc | 423 | * @retval External trigger to be programmed into JEXTSEL bits of CR2 register |
| AnnaBridge | 171:3a7713b1edbc | 424 | */ |
| AnnaBridge | 171:3a7713b1edbc | 425 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 426 | #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 427 | (( (((__HANDLE__)->Instance) == ADC3) \ |
| AnnaBridge | 171:3a7713b1edbc | 428 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 429 | ( ( (__EXT_TRIG_INJECTCONV__) == ADC_EXTERNALTRIGINJECCONV_T8_CC4 \ |
| AnnaBridge | 171:3a7713b1edbc | 430 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 431 | (ADC3_EXTERNALTRIGINJEC_T8_CC4) \ |
| AnnaBridge | 171:3a7713b1edbc | 432 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 433 | (__EXT_TRIG_INJECTCONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 434 | ) \ |
| AnnaBridge | 171:3a7713b1edbc | 435 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 436 | (__EXT_TRIG_INJECTCONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 437 | ) |
| AnnaBridge | 171:3a7713b1edbc | 438 | #else |
| AnnaBridge | 171:3a7713b1edbc | 439 | #define ADC_CFGR_JEXTSEL(__HANDLE__, __EXT_TRIG_INJECTCONV__) \ |
| AnnaBridge | 171:3a7713b1edbc | 440 | (__EXT_TRIG_INJECTCONV__) |
| AnnaBridge | 171:3a7713b1edbc | 441 | #endif /* STM32F103xE || STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 442 | |
| AnnaBridge | 171:3a7713b1edbc | 443 | |
| AnnaBridge | 171:3a7713b1edbc | 444 | /** |
| AnnaBridge | 171:3a7713b1edbc | 445 | * @brief Verification if multimode is enabled for the selected ADC (multimode ADC master or ADC slave) (applicable for devices with several ADCs) |
| AnnaBridge | 171:3a7713b1edbc | 446 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 447 | * @retval Multimode state: RESET if multimode is disabled, other value if multimode is enabled |
| AnnaBridge | 171:3a7713b1edbc | 448 | */ |
| AnnaBridge | 171:3a7713b1edbc | 449 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 450 | #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 451 | (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ |
| AnnaBridge | 171:3a7713b1edbc | 452 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 453 | (ADC1->CR1 & ADC_CR1_DUALMOD) \ |
| AnnaBridge | 171:3a7713b1edbc | 454 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 455 | (RESET) \ |
| AnnaBridge | 171:3a7713b1edbc | 456 | ) |
| AnnaBridge | 171:3a7713b1edbc | 457 | #else |
| AnnaBridge | 171:3a7713b1edbc | 458 | #define ADC_MULTIMODE_IS_ENABLE(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 459 | (RESET) |
| AnnaBridge | 171:3a7713b1edbc | 460 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 461 | |
| AnnaBridge | 171:3a7713b1edbc | 462 | /** |
| AnnaBridge | 171:3a7713b1edbc | 463 | * @brief Verification of condition for ADC start conversion: ADC must be in non-multimode, or multimode with handle of ADC master (applicable for devices with several ADCs) |
| AnnaBridge | 171:3a7713b1edbc | 464 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 465 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 466 | */ |
| AnnaBridge | 171:3a7713b1edbc | 467 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 468 | #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 469 | (( (((__HANDLE__)->Instance) == ADC2) \ |
| AnnaBridge | 171:3a7713b1edbc | 470 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 471 | ((ADC1->CR1 & ADC_CR1_DUALMOD) == RESET) \ |
| AnnaBridge | 171:3a7713b1edbc | 472 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 473 | (!RESET) \ |
| AnnaBridge | 171:3a7713b1edbc | 474 | ) |
| AnnaBridge | 171:3a7713b1edbc | 475 | #else |
| AnnaBridge | 171:3a7713b1edbc | 476 | #define ADC_NONMULTIMODE_OR_MULTIMODEMASTER(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 477 | (!RESET) |
| AnnaBridge | 171:3a7713b1edbc | 478 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 479 | |
| AnnaBridge | 171:3a7713b1edbc | 480 | /** |
| AnnaBridge | 171:3a7713b1edbc | 481 | * @brief Check ADC multimode setting: In case of multimode, check whether ADC master of the selected ADC has feature auto-injection enabled (applicable for devices with several ADCs) |
| AnnaBridge | 171:3a7713b1edbc | 482 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 483 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 484 | */ |
| AnnaBridge | 171:3a7713b1edbc | 485 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 486 | #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 487 | (( (((__HANDLE__)->Instance) == ADC1) || (((__HANDLE__)->Instance) == ADC2) \ |
| AnnaBridge | 171:3a7713b1edbc | 488 | )? \ |
| AnnaBridge | 171:3a7713b1edbc | 489 | (ADC1->CR1 & ADC_CR1_JAUTO) \ |
| AnnaBridge | 171:3a7713b1edbc | 490 | : \ |
| AnnaBridge | 171:3a7713b1edbc | 491 | (RESET) \ |
| AnnaBridge | 171:3a7713b1edbc | 492 | ) |
| AnnaBridge | 171:3a7713b1edbc | 493 | #else |
| AnnaBridge | 171:3a7713b1edbc | 494 | #define ADC_MULTIMODE_AUTO_INJECTED(__HANDLE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 495 | (RESET) |
| AnnaBridge | 171:3a7713b1edbc | 496 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 497 | |
| AnnaBridge | 171:3a7713b1edbc | 498 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 499 | /** |
| AnnaBridge | 171:3a7713b1edbc | 500 | * @brief Set handle of the other ADC sharing the common multimode settings |
| AnnaBridge | 171:3a7713b1edbc | 501 | * @param __HANDLE__: ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 502 | * @param __HANDLE_OTHER_ADC__: other ADC handle |
| AnnaBridge | 171:3a7713b1edbc | 503 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 504 | */ |
| AnnaBridge | 171:3a7713b1edbc | 505 | #define ADC_COMMON_ADC_OTHER(__HANDLE__, __HANDLE_OTHER_ADC__) \ |
| AnnaBridge | 171:3a7713b1edbc | 506 | ((__HANDLE_OTHER_ADC__)->Instance = ADC2) |
| AnnaBridge | 171:3a7713b1edbc | 507 | |
| AnnaBridge | 171:3a7713b1edbc | 508 | /** |
| AnnaBridge | 171:3a7713b1edbc | 509 | * @brief Set handle of the ADC slave associated to the ADC master |
| AnnaBridge | 171:3a7713b1edbc | 510 | * On STM32F1 devices, ADC slave is always ADC2 (this can be different |
| AnnaBridge | 171:3a7713b1edbc | 511 | * on other STM32 devices) |
| AnnaBridge | 171:3a7713b1edbc | 512 | * @param __HANDLE_MASTER__: ADC master handle |
| AnnaBridge | 171:3a7713b1edbc | 513 | * @param __HANDLE_SLAVE__: ADC slave handle |
| AnnaBridge | 171:3a7713b1edbc | 514 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 515 | */ |
| AnnaBridge | 171:3a7713b1edbc | 516 | #define ADC_MULTI_SLAVE(__HANDLE_MASTER__, __HANDLE_SLAVE__) \ |
| AnnaBridge | 171:3a7713b1edbc | 517 | ((__HANDLE_SLAVE__)->Instance = ADC2) |
| AnnaBridge | 171:3a7713b1edbc | 518 | |
| AnnaBridge | 171:3a7713b1edbc | 519 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 520 | |
| AnnaBridge | 171:3a7713b1edbc | 521 | #define IS_ADC_INJECTED_RANK(CHANNEL) (((CHANNEL) == ADC_INJECTED_RANK_1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 522 | ((CHANNEL) == ADC_INJECTED_RANK_2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 523 | ((CHANNEL) == ADC_INJECTED_RANK_3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 524 | ((CHANNEL) == ADC_INJECTED_RANK_4)) |
| AnnaBridge | 171:3a7713b1edbc | 525 | |
| AnnaBridge | 171:3a7713b1edbc | 526 | #define IS_ADC_EXTTRIGINJEC_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 527 | ((EDGE) == ADC_EXTERNALTRIGINJECCONV_EDGE_RISING)) |
| AnnaBridge | 171:3a7713b1edbc | 528 | |
| AnnaBridge | 171:3a7713b1edbc | 529 | /** @defgroup ADCEx_injected_nb_conv_verification ADCEx injected nb conv verification |
| AnnaBridge | 171:3a7713b1edbc | 530 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 531 | */ |
| AnnaBridge | 171:3a7713b1edbc | 532 | #define IS_ADC_INJECTED_NB_CONV(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U)) |
| AnnaBridge | 171:3a7713b1edbc | 533 | /** |
| AnnaBridge | 171:3a7713b1edbc | 534 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 535 | */ |
| AnnaBridge | 171:3a7713b1edbc | 536 | |
| AnnaBridge | 171:3a7713b1edbc | 537 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) |
| AnnaBridge | 171:3a7713b1edbc | 538 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 539 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 540 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 541 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 542 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 543 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| AnnaBridge | 171:3a7713b1edbc | 544 | ((REGTRIG) == ADC_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 545 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 546 | #if defined (STM32F101xE) |
| AnnaBridge | 171:3a7713b1edbc | 547 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 548 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 549 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 550 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 551 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 552 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| AnnaBridge | 171:3a7713b1edbc | 553 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 554 | ((REGTRIG) == ADC_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 555 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 556 | #if defined (STM32F101xG) |
| AnnaBridge | 171:3a7713b1edbc | 557 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 558 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 559 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 560 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 561 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 562 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| AnnaBridge | 171:3a7713b1edbc | 563 | ((REGTRIG) == ADC_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 564 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 565 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 566 | #define IS_ADC_EXTTRIG(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 567 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 568 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 569 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 570 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T4_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 571 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_EXT_IT11) || \ |
| AnnaBridge | 171:3a7713b1edbc | 572 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T3_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 573 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T2_CC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 574 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 575 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 576 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T5_CC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 577 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T1_CC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 578 | ((REGTRIG) == ADC_EXTERNALTRIGCONV_T8_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 579 | ((REGTRIG) == ADC_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 580 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 581 | |
| AnnaBridge | 171:3a7713b1edbc | 582 | #if defined (STM32F100xB) || defined (STM32F100xE) || defined (STM32F101x6) || defined (STM32F101xB) || defined (STM32F102x6) || defined (STM32F102xB) || defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) |
| AnnaBridge | 171:3a7713b1edbc | 583 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 584 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 585 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 586 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 587 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 588 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 589 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 590 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 591 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 592 | #if defined (STM32F101xE) |
| AnnaBridge | 171:3a7713b1edbc | 593 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 594 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 595 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 596 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 597 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 598 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 599 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 600 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 601 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 602 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 603 | #if defined (STM32F101xG) |
| AnnaBridge | 171:3a7713b1edbc | 604 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 605 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 606 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 607 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 608 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 609 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 610 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 611 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 612 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 613 | #if defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 614 | #define IS_ADC_EXTTRIGINJEC(REGTRIG) (((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 615 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ |
| AnnaBridge | 171:3a7713b1edbc | 616 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 617 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 618 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 619 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15) || \ |
| AnnaBridge | 171:3a7713b1edbc | 620 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ |
| AnnaBridge | 171:3a7713b1edbc | 621 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ |
| AnnaBridge | 171:3a7713b1edbc | 622 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 623 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 624 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 625 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ |
| AnnaBridge | 171:3a7713b1edbc | 626 | ((REGTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ |
| AnnaBridge | 171:3a7713b1edbc | 627 | ((REGTRIG) == ADC_INJECTED_SOFTWARE_START)) |
| AnnaBridge | 171:3a7713b1edbc | 628 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 629 | |
| AnnaBridge | 171:3a7713b1edbc | 630 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 631 | #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ |
| AnnaBridge | 171:3a7713b1edbc | 632 | ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ |
| AnnaBridge | 171:3a7713b1edbc | 633 | ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ |
| AnnaBridge | 171:3a7713b1edbc | 634 | ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLFAST) || \ |
| AnnaBridge | 171:3a7713b1edbc | 635 | ((MODE) == ADC_DUALMODE_INJECSIMULT_INTERLSLOW) || \ |
| AnnaBridge | 171:3a7713b1edbc | 636 | ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ |
| AnnaBridge | 171:3a7713b1edbc | 637 | ((MODE) == ADC_DUALMODE_REGSIMULT) || \ |
| AnnaBridge | 171:3a7713b1edbc | 638 | ((MODE) == ADC_DUALMODE_INTERLFAST) || \ |
| AnnaBridge | 171:3a7713b1edbc | 639 | ((MODE) == ADC_DUALMODE_INTERLSLOW) || \ |
| AnnaBridge | 171:3a7713b1edbc | 640 | ((MODE) == ADC_DUALMODE_ALTERTRIG) ) |
| AnnaBridge | 171:3a7713b1edbc | 641 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 642 | |
| AnnaBridge | 171:3a7713b1edbc | 643 | /** |
| AnnaBridge | 171:3a7713b1edbc | 644 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 645 | */ |
| AnnaBridge | 171:3a7713b1edbc | 646 | |
| AnnaBridge | 171:3a7713b1edbc | 647 | |
| AnnaBridge | 171:3a7713b1edbc | 648 | |
| AnnaBridge | 171:3a7713b1edbc | 649 | |
| AnnaBridge | 171:3a7713b1edbc | 650 | |
| AnnaBridge | 171:3a7713b1edbc | 651 | |
| AnnaBridge | 171:3a7713b1edbc | 652 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 653 | /** @addtogroup ADCEx_Exported_Functions |
| AnnaBridge | 171:3a7713b1edbc | 654 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 655 | */ |
| AnnaBridge | 171:3a7713b1edbc | 656 | |
| AnnaBridge | 171:3a7713b1edbc | 657 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 658 | /** @addtogroup ADCEx_Exported_Functions_Group1 |
| AnnaBridge | 171:3a7713b1edbc | 659 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 660 | */ |
| AnnaBridge | 171:3a7713b1edbc | 661 | |
| AnnaBridge | 171:3a7713b1edbc | 662 | /* ADC calibration */ |
| AnnaBridge | 171:3a7713b1edbc | 663 | HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 664 | |
| AnnaBridge | 171:3a7713b1edbc | 665 | /* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 666 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 667 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 668 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 669 | |
| AnnaBridge | 171:3a7713b1edbc | 670 | /* Non-blocking mode: Interruption */ |
| AnnaBridge | 171:3a7713b1edbc | 671 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 672 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 673 | |
| AnnaBridge | 171:3a7713b1edbc | 674 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 675 | /* ADC multimode */ |
| AnnaBridge | 171:3a7713b1edbc | 676 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length); |
| AnnaBridge | 171:3a7713b1edbc | 677 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc); |
| AnnaBridge | 171:3a7713b1edbc | 678 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 679 | |
| AnnaBridge | 171:3a7713b1edbc | 680 | /* ADC retrieve conversion value intended to be used with polling or interruption */ |
| AnnaBridge | 171:3a7713b1edbc | 681 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); |
| AnnaBridge | 171:3a7713b1edbc | 682 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 683 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc); |
| AnnaBridge | 171:3a7713b1edbc | 684 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 685 | |
| AnnaBridge | 171:3a7713b1edbc | 686 | /* ADC IRQHandler and Callbacks used in non-blocking modes (Interruption) */ |
| AnnaBridge | 171:3a7713b1edbc | 687 | void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); |
| AnnaBridge | 171:3a7713b1edbc | 688 | /** |
| AnnaBridge | 171:3a7713b1edbc | 689 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 690 | */ |
| AnnaBridge | 171:3a7713b1edbc | 691 | |
| AnnaBridge | 171:3a7713b1edbc | 692 | |
| AnnaBridge | 171:3a7713b1edbc | 693 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 694 | /** @addtogroup ADCEx_Exported_Functions_Group2 |
| AnnaBridge | 171:3a7713b1edbc | 695 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 696 | */ |
| AnnaBridge | 171:3a7713b1edbc | 697 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); |
| AnnaBridge | 171:3a7713b1edbc | 698 | #if defined (STM32F103x6) || defined (STM32F103xB) || defined (STM32F105xC) || defined (STM32F107xC) || defined (STM32F103xE) || defined (STM32F103xG) |
| AnnaBridge | 171:3a7713b1edbc | 699 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode); |
| AnnaBridge | 171:3a7713b1edbc | 700 | #endif /* defined STM32F103x6 || defined STM32F103xB || defined STM32F105xC || defined STM32F107xC || defined STM32F103xE || defined STM32F103xG */ |
| AnnaBridge | 171:3a7713b1edbc | 701 | /** |
| AnnaBridge | 171:3a7713b1edbc | 702 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 703 | */ |
| AnnaBridge | 171:3a7713b1edbc | 704 | |
| AnnaBridge | 171:3a7713b1edbc | 705 | |
| AnnaBridge | 171:3a7713b1edbc | 706 | /** |
| AnnaBridge | 171:3a7713b1edbc | 707 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 708 | */ |
| AnnaBridge | 171:3a7713b1edbc | 709 | |
| AnnaBridge | 171:3a7713b1edbc | 710 | |
| AnnaBridge | 171:3a7713b1edbc | 711 | /** |
| AnnaBridge | 171:3a7713b1edbc | 712 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 713 | */ |
| AnnaBridge | 171:3a7713b1edbc | 714 | |
| AnnaBridge | 171:3a7713b1edbc | 715 | /** |
| AnnaBridge | 171:3a7713b1edbc | 716 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 717 | */ |
| AnnaBridge | 171:3a7713b1edbc | 718 | |
| AnnaBridge | 171:3a7713b1edbc | 719 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 720 | } |
| AnnaBridge | 171:3a7713b1edbc | 721 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 722 | |
| AnnaBridge | 171:3a7713b1edbc | 723 | #endif /* __STM32F1xx_HAL_ADC_EX_H */ |
| AnnaBridge | 171:3a7713b1edbc | 724 | |
| AnnaBridge | 171:3a7713b1edbc | 725 | |
| AnnaBridge | 171:3a7713b1edbc | 726 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
