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TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f0xx_ll_adc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400
Parent:: 171:3a7713b1edbc

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	171:3a7713b1edbc	1	/**
AnnaBridge	171:3a7713b1edbc	2	******************************************************************************
AnnaBridge	171:3a7713b1edbc	3	* @file stm32f0xx_ll_adc.h
AnnaBridge	171:3a7713b1edbc	4	* @author MCD Application Team
AnnaBridge	171:3a7713b1edbc	5	* @brief Header file of ADC LL module.
AnnaBridge	171:3a7713b1edbc	6	******************************************************************************
AnnaBridge	171:3a7713b1edbc	7	* @attention
AnnaBridge	171:3a7713b1edbc	8	*
AnnaBridge	171:3a7713b1edbc	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	171:3a7713b1edbc	10	*
AnnaBridge	171:3a7713b1edbc	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	171:3a7713b1edbc	12	* are permitted provided that the following conditions are met:
AnnaBridge	171:3a7713b1edbc	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	171:3a7713b1edbc	14	* this list of conditions and the following disclaimer.
AnnaBridge	171:3a7713b1edbc	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	171:3a7713b1edbc	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	171:3a7713b1edbc	17	* and/or other materials provided with the distribution.
AnnaBridge	171:3a7713b1edbc	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	171:3a7713b1edbc	19	* may be used to endorse or promote products derived from this software
AnnaBridge	171:3a7713b1edbc	20	* without specific prior written permission.
AnnaBridge	171:3a7713b1edbc	21	*
AnnaBridge	171:3a7713b1edbc	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	171:3a7713b1edbc	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	171:3a7713b1edbc	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	171:3a7713b1edbc	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	171:3a7713b1edbc	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	171:3a7713b1edbc	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	171:3a7713b1edbc	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	171:3a7713b1edbc	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	171:3a7713b1edbc	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	171:3a7713b1edbc	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	171:3a7713b1edbc	32	*
AnnaBridge	171:3a7713b1edbc	33	******************************************************************************
AnnaBridge	171:3a7713b1edbc	34	*/
AnnaBridge	171:3a7713b1edbc	35
AnnaBridge	171:3a7713b1edbc	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	171:3a7713b1edbc	37	#ifndef __STM32F0xx_LL_ADC_H
AnnaBridge	171:3a7713b1edbc	38	#define __STM32F0xx_LL_ADC_H
AnnaBridge	171:3a7713b1edbc	39
AnnaBridge	171:3a7713b1edbc	40	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	41	extern "C" {
AnnaBridge	171:3a7713b1edbc	42	#endif
AnnaBridge	171:3a7713b1edbc	43
AnnaBridge	171:3a7713b1edbc	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	45	#include "stm32f0xx.h"
AnnaBridge	171:3a7713b1edbc	46
AnnaBridge	171:3a7713b1edbc	47	/** @addtogroup STM32F0xx_LL_Driver
AnnaBridge	171:3a7713b1edbc	48	* @{
AnnaBridge	171:3a7713b1edbc	49	*/
AnnaBridge	171:3a7713b1edbc	50
AnnaBridge	171:3a7713b1edbc	51	#if defined (ADC1)
AnnaBridge	171:3a7713b1edbc	52
AnnaBridge	171:3a7713b1edbc	53	/** @defgroup ADC_LL ADC
AnnaBridge	171:3a7713b1edbc	54	* @{
AnnaBridge	171:3a7713b1edbc	55	*/
AnnaBridge	171:3a7713b1edbc	56
AnnaBridge	171:3a7713b1edbc	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	59
AnnaBridge	171:3a7713b1edbc	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	61	/** @defgroup ADC_LL_Private_Constants ADC Private Constants
AnnaBridge	171:3a7713b1edbc	62	* @{
AnnaBridge	171:3a7713b1edbc	63	*/
AnnaBridge	171:3a7713b1edbc	64
AnnaBridge	171:3a7713b1edbc	65	/* Internal mask for ADC group regular trigger: */
AnnaBridge	171:3a7713b1edbc	66	/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
AnnaBridge	171:3a7713b1edbc	67	/* - regular trigger source */
AnnaBridge	171:3a7713b1edbc	68	/* - regular trigger edge */
AnnaBridge	171:3a7713b1edbc	69	#define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
AnnaBridge	171:3a7713b1edbc	70
AnnaBridge	171:3a7713b1edbc	71	/* Mask containing trigger source masks for each of possible */
AnnaBridge	171:3a7713b1edbc	72	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	171:3a7713b1edbc	73	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	171:3a7713b1edbc	74	#define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTSEL) << (4U * 0U)) \| \
AnnaBridge	171:3a7713b1edbc	75	((ADC_CFGR1_EXTSEL) << (4U * 1U)) \| \
AnnaBridge	171:3a7713b1edbc	76	((ADC_CFGR1_EXTSEL) << (4U * 2U)) \| \
AnnaBridge	171:3a7713b1edbc	77	((ADC_CFGR1_EXTSEL) << (4U * 3U)) )
AnnaBridge	171:3a7713b1edbc	78
AnnaBridge	171:3a7713b1edbc	79	/* Mask containing trigger edge masks for each of possible */
AnnaBridge	171:3a7713b1edbc	80	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	171:3a7713b1edbc	81	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	171:3a7713b1edbc	82	#define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * 0U)) \| \
AnnaBridge	171:3a7713b1edbc	83	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
AnnaBridge	171:3a7713b1edbc	84	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
AnnaBridge	171:3a7713b1edbc	85	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
AnnaBridge	171:3a7713b1edbc	86
AnnaBridge	171:3a7713b1edbc	87	/* Definition of ADC group regular trigger bits information. */
AnnaBridge	171:3a7713b1edbc	88	#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTSEL) */
AnnaBridge	171:3a7713b1edbc	89	#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS (10U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTEN) */
AnnaBridge	171:3a7713b1edbc	90
AnnaBridge	171:3a7713b1edbc	91
AnnaBridge	171:3a7713b1edbc	92
AnnaBridge	171:3a7713b1edbc	93	/* Internal mask for ADC channel: */
AnnaBridge	171:3a7713b1edbc	94	/* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
AnnaBridge	171:3a7713b1edbc	95	/* - channel identifier defined by number */
AnnaBridge	171:3a7713b1edbc	96	/* - channel identifier defined by bitfield */
AnnaBridge	171:3a7713b1edbc	97	/* - channel differentiation between external channels (connected to */
AnnaBridge	171:3a7713b1edbc	98	/* GPIO pins) and internal channels (connected to internal paths) */
AnnaBridge	171:3a7713b1edbc	99	#define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR1_AWDCH)
AnnaBridge	171:3a7713b1edbc	100	#define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
AnnaBridge	171:3a7713b1edbc	101	#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS (26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
AnnaBridge	171:3a7713b1edbc	102	#define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK \| ADC_CHANNEL_ID_BITFIELD_MASK \| ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	171:3a7713b1edbc	103	/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
AnnaBridge	171:3a7713b1edbc	104	#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 (0x0000001FU) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
AnnaBridge	171:3a7713b1edbc	105
AnnaBridge	171:3a7713b1edbc	106	/* Channel differentiation between external and internal channels */
AnnaBridge	171:3a7713b1edbc	107	#define ADC_CHANNEL_ID_INTERNAL_CH (0x80000000U) /* Marker of internal channel */
AnnaBridge	171:3a7713b1edbc	108	#define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH)
AnnaBridge	171:3a7713b1edbc	109
AnnaBridge	171:3a7713b1edbc	110	/* Definition of channels ID number information to be inserted into */
AnnaBridge	171:3a7713b1edbc	111	/* channels literals definition. */
AnnaBridge	171:3a7713b1edbc	112	#define ADC_CHANNEL_0_NUMBER (0x00000000U)
AnnaBridge	171:3a7713b1edbc	113	#define ADC_CHANNEL_1_NUMBER ( ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	114	#define ADC_CHANNEL_2_NUMBER ( ADC_CFGR1_AWDCH_1 )
AnnaBridge	171:3a7713b1edbc	115	#define ADC_CHANNEL_3_NUMBER ( ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	116	#define ADC_CHANNEL_4_NUMBER ( ADC_CFGR1_AWDCH_2 )
AnnaBridge	171:3a7713b1edbc	117	#define ADC_CHANNEL_5_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	118	#define ADC_CHANNEL_6_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	171:3a7713b1edbc	119	#define ADC_CHANNEL_7_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	120	#define ADC_CHANNEL_8_NUMBER ( ADC_CFGR1_AWDCH_3 )
AnnaBridge	171:3a7713b1edbc	121	#define ADC_CHANNEL_9_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	122	#define ADC_CHANNEL_10_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	171:3a7713b1edbc	123	#define ADC_CHANNEL_11_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	124	#define ADC_CHANNEL_12_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 )
AnnaBridge	171:3a7713b1edbc	125	#define ADC_CHANNEL_13_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	126	#define ADC_CHANNEL_14_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	171:3a7713b1edbc	127	#define ADC_CHANNEL_15_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	128	#define ADC_CHANNEL_16_NUMBER (ADC_CFGR1_AWDCH_4 )
AnnaBridge	171:3a7713b1edbc	129	#define ADC_CHANNEL_17_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	171:3a7713b1edbc	130	#define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	171:3a7713b1edbc	131
AnnaBridge	171:3a7713b1edbc	132	/* Definition of channels ID bitfield information to be inserted into */
AnnaBridge	171:3a7713b1edbc	133	/* channels literals definition. */
AnnaBridge	171:3a7713b1edbc	134	#define ADC_CHANNEL_0_BITFIELD (ADC_CHSELR_CHSEL0)
AnnaBridge	171:3a7713b1edbc	135	#define ADC_CHANNEL_1_BITFIELD (ADC_CHSELR_CHSEL1)
AnnaBridge	171:3a7713b1edbc	136	#define ADC_CHANNEL_2_BITFIELD (ADC_CHSELR_CHSEL2)
AnnaBridge	171:3a7713b1edbc	137	#define ADC_CHANNEL_3_BITFIELD (ADC_CHSELR_CHSEL3)
AnnaBridge	171:3a7713b1edbc	138	#define ADC_CHANNEL_4_BITFIELD (ADC_CHSELR_CHSEL4)
AnnaBridge	171:3a7713b1edbc	139	#define ADC_CHANNEL_5_BITFIELD (ADC_CHSELR_CHSEL5)
AnnaBridge	171:3a7713b1edbc	140	#define ADC_CHANNEL_6_BITFIELD (ADC_CHSELR_CHSEL6)
AnnaBridge	171:3a7713b1edbc	141	#define ADC_CHANNEL_7_BITFIELD (ADC_CHSELR_CHSEL7)
AnnaBridge	171:3a7713b1edbc	142	#define ADC_CHANNEL_8_BITFIELD (ADC_CHSELR_CHSEL8)
AnnaBridge	171:3a7713b1edbc	143	#define ADC_CHANNEL_9_BITFIELD (ADC_CHSELR_CHSEL9)
AnnaBridge	171:3a7713b1edbc	144	#define ADC_CHANNEL_10_BITFIELD (ADC_CHSELR_CHSEL10)
AnnaBridge	171:3a7713b1edbc	145	#define ADC_CHANNEL_11_BITFIELD (ADC_CHSELR_CHSEL11)
AnnaBridge	171:3a7713b1edbc	146	#define ADC_CHANNEL_12_BITFIELD (ADC_CHSELR_CHSEL12)
AnnaBridge	171:3a7713b1edbc	147	#define ADC_CHANNEL_13_BITFIELD (ADC_CHSELR_CHSEL13)
AnnaBridge	171:3a7713b1edbc	148	#define ADC_CHANNEL_14_BITFIELD (ADC_CHSELR_CHSEL14)
AnnaBridge	171:3a7713b1edbc	149	#define ADC_CHANNEL_15_BITFIELD (ADC_CHSELR_CHSEL15)
AnnaBridge	171:3a7713b1edbc	150	#define ADC_CHANNEL_16_BITFIELD (ADC_CHSELR_CHSEL16)
AnnaBridge	171:3a7713b1edbc	151	#define ADC_CHANNEL_17_BITFIELD (ADC_CHSELR_CHSEL17)
AnnaBridge	171:3a7713b1edbc	152	#define ADC_CHANNEL_18_BITFIELD (ADC_CHSELR_CHSEL18)
AnnaBridge	171:3a7713b1edbc	153
AnnaBridge	171:3a7713b1edbc	154	/* Internal mask for ADC analog watchdog: */
AnnaBridge	171:3a7713b1edbc	155	/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
AnnaBridge	171:3a7713b1edbc	156	/* (concatenation of multiple bits used in different analog watchdogs, */
AnnaBridge	171:3a7713b1edbc	157	/* (feature of several watchdogs not available on all STM32 families)). */
AnnaBridge	171:3a7713b1edbc	158	/* - analog watchdog 1: monitored channel defined by number, */
AnnaBridge	171:3a7713b1edbc	159	/* selection of ADC group (ADC group regular). */
AnnaBridge	171:3a7713b1edbc	160
AnnaBridge	171:3a7713b1edbc	161	/* Internal register offset for ADC analog watchdog channel configuration */
AnnaBridge	171:3a7713b1edbc	162	#define ADC_AWD_CR1_REGOFFSET (0x00000000U)
AnnaBridge	171:3a7713b1edbc	163
AnnaBridge	171:3a7713b1edbc	164	#define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	171:3a7713b1edbc	165
AnnaBridge	171:3a7713b1edbc	166	#define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	171:3a7713b1edbc	167	#define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK)
AnnaBridge	171:3a7713b1edbc	168
AnnaBridge	171:3a7713b1edbc	169	/* Internal register offset for ADC analog watchdog threshold configuration */
AnnaBridge	171:3a7713b1edbc	170	#define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	171:3a7713b1edbc	171	#define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET)
AnnaBridge	171:3a7713b1edbc	172
AnnaBridge	171:3a7713b1edbc	173
AnnaBridge	171:3a7713b1edbc	174	/* ADC registers bits positions */
AnnaBridge	171:3a7713b1edbc	175	#define ADC_CFGR1_RES_BITOFFSET_POS ( 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_RES) */
AnnaBridge	171:3a7713b1edbc	176	#define ADC_CFGR1_AWDSGL_BITOFFSET_POS (22U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_AWDSGL) */
AnnaBridge	171:3a7713b1edbc	177	#define ADC_TR_HT_BITOFFSET_POS (16U) /* Value equivalent to POSITION_VAL(ADC_TR_HT) */
AnnaBridge	171:3a7713b1edbc	178	#define ADC_CHSELR_CHSEL0_BITOFFSET_POS ( 0U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL0) */
AnnaBridge	171:3a7713b1edbc	179	#define ADC_CHSELR_CHSEL1_BITOFFSET_POS ( 1U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL1) */
AnnaBridge	171:3a7713b1edbc	180	#define ADC_CHSELR_CHSEL2_BITOFFSET_POS ( 2U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL2) */
AnnaBridge	171:3a7713b1edbc	181	#define ADC_CHSELR_CHSEL3_BITOFFSET_POS ( 3U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL3) */
AnnaBridge	171:3a7713b1edbc	182	#define ADC_CHSELR_CHSEL4_BITOFFSET_POS ( 4U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL4) */
AnnaBridge	171:3a7713b1edbc	183	#define ADC_CHSELR_CHSEL5_BITOFFSET_POS ( 5U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL5) */
AnnaBridge	171:3a7713b1edbc	184	#define ADC_CHSELR_CHSEL6_BITOFFSET_POS ( 6U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL6) */
AnnaBridge	171:3a7713b1edbc	185	#define ADC_CHSELR_CHSEL7_BITOFFSET_POS ( 7U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL7) */
AnnaBridge	171:3a7713b1edbc	186	#define ADC_CHSELR_CHSEL8_BITOFFSET_POS ( 8U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL8) */
AnnaBridge	171:3a7713b1edbc	187	#define ADC_CHSELR_CHSEL9_BITOFFSET_POS ( 9U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL9) */
AnnaBridge	171:3a7713b1edbc	188	#define ADC_CHSELR_CHSEL10_BITOFFSET_POS (10U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL10) */
AnnaBridge	171:3a7713b1edbc	189	#define ADC_CHSELR_CHSEL11_BITOFFSET_POS (11U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL11) */
AnnaBridge	171:3a7713b1edbc	190	#define ADC_CHSELR_CHSEL12_BITOFFSET_POS (12U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL12) */
AnnaBridge	171:3a7713b1edbc	191	#define ADC_CHSELR_CHSEL13_BITOFFSET_POS (13U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL13) */
AnnaBridge	171:3a7713b1edbc	192	#define ADC_CHSELR_CHSEL14_BITOFFSET_POS (14U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL14) */
AnnaBridge	171:3a7713b1edbc	193	#define ADC_CHSELR_CHSEL15_BITOFFSET_POS (15U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL15) */
AnnaBridge	171:3a7713b1edbc	194	#define ADC_CHSELR_CHSEL16_BITOFFSET_POS (16U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL16) */
AnnaBridge	171:3a7713b1edbc	195	#define ADC_CHSELR_CHSEL17_BITOFFSET_POS (17U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL17) */
AnnaBridge	171:3a7713b1edbc	196	#define ADC_CHSELR_CHSEL18_BITOFFSET_POS (18U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL18) */
AnnaBridge	171:3a7713b1edbc	197
AnnaBridge	171:3a7713b1edbc	198
AnnaBridge	171:3a7713b1edbc	199	/* ADC registers bits groups */
AnnaBridge	171:3a7713b1edbc	200	#define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL \| ADC_CR_ADSTP \| ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
AnnaBridge	171:3a7713b1edbc	201
AnnaBridge	171:3a7713b1edbc	202
AnnaBridge	171:3a7713b1edbc	203	/* ADC internal channels related definitions */
AnnaBridge	171:3a7713b1edbc	204	/* Internal voltage reference VrefInt */
AnnaBridge	171:3a7713b1edbc	205	#define VREFINT_CAL_ADDR ((uint16_t) (0x1FFFF7BAU)) / Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
AnnaBridge	171:3a7713b1edbc	206	#define VREFINT_CAL_VREF ( 3300U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
AnnaBridge	171:3a7713b1edbc	207	/* Temperature sensor */
AnnaBridge	171:3a7713b1edbc	208	#define TEMPSENSOR_CAL1_ADDR ((uint16_t) (0x1FFFF7B8U)) / Internal temperature sensor, address of parameter TS_CAL1: On STM32F0, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
AnnaBridge	171:3a7713b1edbc	209	#define TEMPSENSOR_CAL2_ADDR ((uint16_t) (0x1FFFF7C2U)) / Internal temperature sensor, address of parameter TS_CAL2: On STM32F0, temperature sensor ADC raw data acquired at temperature 110 DegC (tolerance: +-5 DegC), Vref+ = 3.3 V (tolerance: +-10 mV). */
AnnaBridge	171:3a7713b1edbc	210	#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	171:3a7713b1edbc	211	#define TEMPSENSOR_CAL2_TEMP (( int32_t) 110) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	171:3a7713b1edbc	212	#define TEMPSENSOR_CAL_VREFANALOG ( 3300U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
AnnaBridge	171:3a7713b1edbc	213
AnnaBridge	171:3a7713b1edbc	214
AnnaBridge	171:3a7713b1edbc	215	/**
AnnaBridge	171:3a7713b1edbc	216	* @}
AnnaBridge	171:3a7713b1edbc	217	*/
AnnaBridge	171:3a7713b1edbc	218
AnnaBridge	171:3a7713b1edbc	219
AnnaBridge	171:3a7713b1edbc	220	/* Exported types ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	221	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	171:3a7713b1edbc	222	/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
AnnaBridge	171:3a7713b1edbc	223	* @{
AnnaBridge	171:3a7713b1edbc	224	*/
AnnaBridge	171:3a7713b1edbc	225
AnnaBridge	171:3a7713b1edbc	226	/**
AnnaBridge	171:3a7713b1edbc	227	* @brief Structure definition of some features of ADC instance.
AnnaBridge	171:3a7713b1edbc	228	* @note These parameters have an impact on ADC scope: ADC instance.
AnnaBridge	171:3a7713b1edbc	229	* Refer to corresponding unitary functions into
AnnaBridge	171:3a7713b1edbc	230	* @ref ADC_LL_EF_Configuration_ADC_Instance .
AnnaBridge	171:3a7713b1edbc	231	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	171:3a7713b1edbc	232	* is conditioned to ADC state:
AnnaBridge	171:3a7713b1edbc	233	* ADC instance must be disabled.
AnnaBridge	171:3a7713b1edbc	234	* This condition is applied to all ADC features, for efficiency
AnnaBridge	171:3a7713b1edbc	235	* and compatibility over all STM32 families. However, the different
AnnaBridge	171:3a7713b1edbc	236	* features can be set under different ADC state conditions
AnnaBridge	171:3a7713b1edbc	237	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	171:3a7713b1edbc	238	* ADC enabled with conversion on going, ...)
AnnaBridge	171:3a7713b1edbc	239	* Each feature can be updated afterwards with a unitary function
AnnaBridge	171:3a7713b1edbc	240	* and potentially with ADC in a different state than disabled,
AnnaBridge	171:3a7713b1edbc	241	* refer to description of each function for setting
AnnaBridge	171:3a7713b1edbc	242	* conditioned to ADC state.
AnnaBridge	171:3a7713b1edbc	243	*/
AnnaBridge	171:3a7713b1edbc	244	typedef struct
AnnaBridge	171:3a7713b1edbc	245	{
AnnaBridge	171:3a7713b1edbc	246	uint32_t Clock; /*!< Set ADC instance clock source and prescaler.
AnnaBridge	171:3a7713b1edbc	247	This parameter can be a value of @ref ADC_LL_EC_CLOCK_SOURCE
AnnaBridge	171:3a7713b1edbc	248	@note On this STM32 serie, this parameter has some clock ratio constraints:
AnnaBridge	171:3a7713b1edbc	249	ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clock cycle
AnnaBridge	171:3a7713b1edbc	250	(APB prescaler configured inside the RCC must be bypassed and the system clock must by 50% duty cycle).
AnnaBridge	171:3a7713b1edbc	251
AnnaBridge	171:3a7713b1edbc	252
AnnaBridge	171:3a7713b1edbc	253	This feature can be modified afterwards using unitary function @ref LL_ADC_SetClock().
AnnaBridge	171:3a7713b1edbc	254	For more details, refer to description of this function. */
AnnaBridge	171:3a7713b1edbc	255
AnnaBridge	171:3a7713b1edbc	256	uint32_t Resolution; /*!< Set ADC resolution.
AnnaBridge	171:3a7713b1edbc	257	This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
AnnaBridge	171:3a7713b1edbc	258
AnnaBridge	171:3a7713b1edbc	259	This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
AnnaBridge	171:3a7713b1edbc	260
AnnaBridge	171:3a7713b1edbc	261	uint32_t DataAlignment; /*!< Set ADC conversion data alignment.
AnnaBridge	171:3a7713b1edbc	262	This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
AnnaBridge	171:3a7713b1edbc	263
AnnaBridge	171:3a7713b1edbc	264	This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
AnnaBridge	171:3a7713b1edbc	265
AnnaBridge	171:3a7713b1edbc	266	uint32_t LowPowerMode; /*!< Set ADC low power mode.
AnnaBridge	171:3a7713b1edbc	267	This parameter can be a value of @ref ADC_LL_EC_LP_MODE
AnnaBridge	171:3a7713b1edbc	268
AnnaBridge	171:3a7713b1edbc	269	This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
AnnaBridge	171:3a7713b1edbc	270
AnnaBridge	171:3a7713b1edbc	271	} LL_ADC_InitTypeDef;
AnnaBridge	171:3a7713b1edbc	272
AnnaBridge	171:3a7713b1edbc	273	/**
AnnaBridge	171:3a7713b1edbc	274	* @brief Structure definition of some features of ADC group regular.
AnnaBridge	171:3a7713b1edbc	275	* @note These parameters have an impact on ADC scope: ADC group regular.
AnnaBridge	171:3a7713b1edbc	276	* Refer to corresponding unitary functions into
AnnaBridge	171:3a7713b1edbc	277	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	171:3a7713b1edbc	278	* (functions with prefix "REG").
AnnaBridge	171:3a7713b1edbc	279	* @note The setting of these parameters by function @ref LL_ADC_REG_Init()
AnnaBridge	171:3a7713b1edbc	280	* is conditioned to ADC state:
AnnaBridge	171:3a7713b1edbc	281	* ADC instance must be disabled.
AnnaBridge	171:3a7713b1edbc	282	* This condition is applied to all ADC features, for efficiency
AnnaBridge	171:3a7713b1edbc	283	* and compatibility over all STM32 families. However, the different
AnnaBridge	171:3a7713b1edbc	284	* features can be set under different ADC state conditions
AnnaBridge	171:3a7713b1edbc	285	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	171:3a7713b1edbc	286	* ADC enabled with conversion on going, ...)
AnnaBridge	171:3a7713b1edbc	287	* Each feature can be updated afterwards with a unitary function
AnnaBridge	171:3a7713b1edbc	288	* and potentially with ADC in a different state than disabled,
AnnaBridge	171:3a7713b1edbc	289	* refer to description of each function for setting
AnnaBridge	171:3a7713b1edbc	290	* conditioned to ADC state.
AnnaBridge	171:3a7713b1edbc	291	*/
AnnaBridge	171:3a7713b1edbc	292	typedef struct
AnnaBridge	171:3a7713b1edbc	293	{
AnnaBridge	171:3a7713b1edbc	294	uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	171:3a7713b1edbc	295	This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
AnnaBridge	171:3a7713b1edbc	296	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
AnnaBridge	171:3a7713b1edbc	297	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
AnnaBridge	171:3a7713b1edbc	298	In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	171:3a7713b1edbc	299
AnnaBridge	171:3a7713b1edbc	300	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
AnnaBridge	171:3a7713b1edbc	301
AnnaBridge	171:3a7713b1edbc	302	uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
AnnaBridge	171:3a7713b1edbc	303	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
AnnaBridge	171:3a7713b1edbc	304	@note This parameter has an effect only if group regular sequencer is enabled
AnnaBridge	171:3a7713b1edbc	305	(several ADC channels enabled in group regular sequencer).
AnnaBridge	171:3a7713b1edbc	306
AnnaBridge	171:3a7713b1edbc	307	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
AnnaBridge	171:3a7713b1edbc	308
AnnaBridge	171:3a7713b1edbc	309	uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
AnnaBridge	171:3a7713b1edbc	310	This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
AnnaBridge	171:3a7713b1edbc	311	Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
AnnaBridge	171:3a7713b1edbc	312
AnnaBridge	171:3a7713b1edbc	313	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
AnnaBridge	171:3a7713b1edbc	314
AnnaBridge	171:3a7713b1edbc	315	uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
AnnaBridge	171:3a7713b1edbc	316	This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
AnnaBridge	171:3a7713b1edbc	317
AnnaBridge	171:3a7713b1edbc	318	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
AnnaBridge	171:3a7713b1edbc	319
AnnaBridge	171:3a7713b1edbc	320	uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
AnnaBridge	171:3a7713b1edbc	321	data preserved or overwritten.
AnnaBridge	171:3a7713b1edbc	322	This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
AnnaBridge	171:3a7713b1edbc	323
AnnaBridge	171:3a7713b1edbc	324	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
AnnaBridge	171:3a7713b1edbc	325
AnnaBridge	171:3a7713b1edbc	326	} LL_ADC_REG_InitTypeDef;
AnnaBridge	171:3a7713b1edbc	327
AnnaBridge	171:3a7713b1edbc	328	/**
AnnaBridge	171:3a7713b1edbc	329	* @}
AnnaBridge	171:3a7713b1edbc	330	*/
AnnaBridge	171:3a7713b1edbc	331	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	171:3a7713b1edbc	332
AnnaBridge	171:3a7713b1edbc	333	/* Exported constants --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	334	/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
AnnaBridge	171:3a7713b1edbc	335	* @{
AnnaBridge	171:3a7713b1edbc	336	*/
AnnaBridge	171:3a7713b1edbc	337
AnnaBridge	171:3a7713b1edbc	338	/** @defgroup ADC_LL_EC_FLAG ADC flags
AnnaBridge	171:3a7713b1edbc	339	* @brief Flags defines which can be used with LL_ADC_ReadReg function
AnnaBridge	171:3a7713b1edbc	340	* @{
AnnaBridge	171:3a7713b1edbc	341	*/
AnnaBridge	171:3a7713b1edbc	342	#define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /!< ADC flag ADC instance ready /
AnnaBridge	171:3a7713b1edbc	343	#define LL_ADC_FLAG_EOC ADC_ISR_EOC /!< ADC flag ADC group regular end of unitary conversion /
AnnaBridge	171:3a7713b1edbc	344	#define LL_ADC_FLAG_EOS ADC_ISR_EOS /!< ADC flag ADC group regular end of sequence conversions /
AnnaBridge	171:3a7713b1edbc	345	#define LL_ADC_FLAG_OVR ADC_ISR_OVR /!< ADC flag ADC group regular overrun /
AnnaBridge	171:3a7713b1edbc	346	#define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC flag ADC group regular end of sampling phase /
AnnaBridge	171:3a7713b1edbc	347	#define LL_ADC_FLAG_AWD1 ADC_ISR_AWD /!< ADC flag ADC analog watchdog 1 /
AnnaBridge	171:3a7713b1edbc	348	/**
AnnaBridge	171:3a7713b1edbc	349	* @}
AnnaBridge	171:3a7713b1edbc	350	*/
AnnaBridge	171:3a7713b1edbc	351
AnnaBridge	171:3a7713b1edbc	352	/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
AnnaBridge	171:3a7713b1edbc	353	* @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
AnnaBridge	171:3a7713b1edbc	354	* @{
AnnaBridge	171:3a7713b1edbc	355	*/
AnnaBridge	171:3a7713b1edbc	356	#define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /!< ADC interruption ADC instance ready /
AnnaBridge	171:3a7713b1edbc	357	#define LL_ADC_IT_EOC ADC_IER_EOCIE /!< ADC interruption ADC group regular end of unitary conversion /
AnnaBridge	171:3a7713b1edbc	358	#define LL_ADC_IT_EOS ADC_IER_EOSIE /!< ADC interruption ADC group regular end of sequence conversions /
AnnaBridge	171:3a7713b1edbc	359	#define LL_ADC_IT_OVR ADC_IER_OVRIE /!< ADC interruption ADC group regular overrun /
AnnaBridge	171:3a7713b1edbc	360	#define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /!< ADC interruption ADC group regular end of sampling phase /
AnnaBridge	171:3a7713b1edbc	361	#define LL_ADC_IT_AWD1 ADC_IER_AWDIE /!< ADC interruption ADC analog watchdog 1 /
AnnaBridge	171:3a7713b1edbc	362	/**
AnnaBridge	171:3a7713b1edbc	363	* @}
AnnaBridge	171:3a7713b1edbc	364	*/
AnnaBridge	171:3a7713b1edbc	365
AnnaBridge	171:3a7713b1edbc	366	/** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
AnnaBridge	171:3a7713b1edbc	367	* @{
AnnaBridge	171:3a7713b1edbc	368	*/
AnnaBridge	171:3a7713b1edbc	369	/* List of ADC registers intended to be used (most commonly) with */
AnnaBridge	171:3a7713b1edbc	370	/* DMA transfer. */
AnnaBridge	171:3a7713b1edbc	371	/* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
AnnaBridge	171:3a7713b1edbc	372	#define LL_ADC_DMA_REG_REGULAR_DATA (0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
AnnaBridge	171:3a7713b1edbc	373	/**
AnnaBridge	171:3a7713b1edbc	374	* @}
AnnaBridge	171:3a7713b1edbc	375	*/
AnnaBridge	171:3a7713b1edbc	376
AnnaBridge	171:3a7713b1edbc	377	/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
AnnaBridge	171:3a7713b1edbc	378	* @{
AnnaBridge	171:3a7713b1edbc	379	*/
AnnaBridge	171:3a7713b1edbc	380	/* Note: Other measurement paths to internal channels may be available */
AnnaBridge	171:3a7713b1edbc	381	/* (connections to other peripherals). */
AnnaBridge	171:3a7713b1edbc	382	/* If they are not listed below, they do not require any specific */
AnnaBridge	171:3a7713b1edbc	383	/* path enable. In this case, Access to measurement path is done */
AnnaBridge	171:3a7713b1edbc	384	/* only by selecting the corresponding ADC internal channel. */
AnnaBridge	171:3a7713b1edbc	385	#define LL_ADC_PATH_INTERNAL_NONE (0x00000000U)/!< ADC measurement pathes all disabled /
AnnaBridge	171:3a7713b1edbc	386	#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /!< ADC measurement path to internal channel VrefInt /
AnnaBridge	171:3a7713b1edbc	387	#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /!< ADC measurement path to internal channel temperature sensor /
AnnaBridge	171:3a7713b1edbc	388	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	389	#define LL_ADC_PATH_INTERNAL_VBAT (ADC_CCR_VBATEN) /!< ADC measurement path to internal channel Vbat /
AnnaBridge	171:3a7713b1edbc	390	#endif
AnnaBridge	171:3a7713b1edbc	391	/**
AnnaBridge	171:3a7713b1edbc	392	* @}
AnnaBridge	171:3a7713b1edbc	393	*/
AnnaBridge	171:3a7713b1edbc	394
AnnaBridge	171:3a7713b1edbc	395	/** @defgroup ADC_LL_EC_CLOCK_SOURCE ADC instance - Clock source
AnnaBridge	171:3a7713b1edbc	396	* @{
AnnaBridge	171:3a7713b1edbc	397	*/
AnnaBridge	171:3a7713b1edbc	398	#define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /!< ADC synchronous clock derived from AHB clock divided by 4 /
AnnaBridge	171:3a7713b1edbc	399	#define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock divided by 2 /
AnnaBridge	171:3a7713b1edbc	400	#define LL_ADC_CLOCK_ASYNC (0x00000000U) /!< ADC asynchronous clock. On this STM32 serie, asynchronous clock has no prescaler. /
AnnaBridge	171:3a7713b1edbc	401	/**
AnnaBridge	171:3a7713b1edbc	402	* @}
AnnaBridge	171:3a7713b1edbc	403	*/
AnnaBridge	171:3a7713b1edbc	404
AnnaBridge	171:3a7713b1edbc	405	/** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
AnnaBridge	171:3a7713b1edbc	406	* @{
AnnaBridge	171:3a7713b1edbc	407	*/
AnnaBridge	171:3a7713b1edbc	408	#define LL_ADC_RESOLUTION_12B (0x00000000U) /!< ADC resolution 12 bits /
AnnaBridge	171:3a7713b1edbc	409	#define LL_ADC_RESOLUTION_10B ( ADC_CFGR1_RES_0) /!< ADC resolution 10 bits /
AnnaBridge	171:3a7713b1edbc	410	#define LL_ADC_RESOLUTION_8B (ADC_CFGR1_RES_1 ) /!< ADC resolution 8 bits /
AnnaBridge	171:3a7713b1edbc	411	#define LL_ADC_RESOLUTION_6B (ADC_CFGR1_RES_1 \| ADC_CFGR1_RES_0) /!< ADC resolution 6 bits /
AnnaBridge	171:3a7713b1edbc	412	/**
AnnaBridge	171:3a7713b1edbc	413	* @}
AnnaBridge	171:3a7713b1edbc	414	*/
AnnaBridge	171:3a7713b1edbc	415
AnnaBridge	171:3a7713b1edbc	416	/** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
AnnaBridge	171:3a7713b1edbc	417	* @{
AnnaBridge	171:3a7713b1edbc	418	*/
AnnaBridge	171:3a7713b1edbc	419	#define LL_ADC_DATA_ALIGN_RIGHT (0x00000000U)/!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)/
AnnaBridge	171:3a7713b1edbc	420	#define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR1_ALIGN) /!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)/
AnnaBridge	171:3a7713b1edbc	421	/**
AnnaBridge	171:3a7713b1edbc	422	* @}
AnnaBridge	171:3a7713b1edbc	423	*/
AnnaBridge	171:3a7713b1edbc	424
AnnaBridge	171:3a7713b1edbc	425	/** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
AnnaBridge	171:3a7713b1edbc	426	* @{
AnnaBridge	171:3a7713b1edbc	427	*/
AnnaBridge	171:3a7713b1edbc	428	#define LL_ADC_LP_MODE_NONE (0x00000000U) /!< No ADC low power mode activated /
AnnaBridge	171:3a7713b1edbc	429	#define LL_ADC_LP_AUTOWAIT (ADC_CFGR1_WAIT) /!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	171:3a7713b1edbc	430	#define LL_ADC_LP_AUTOPOWEROFF (ADC_CFGR1_AUTOFF) /!< ADC low power mode auto power-off: the ADC automatically powers-off after a ADC conversion and automatically wakes up when a new ADC conversion is triggered (with startup time between trigger and start of sampling). See description with function @ref LL_ADC_SetLowPowerMode(). Note: On STM32F0, if enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) during auto wait phase. /
AnnaBridge	171:3a7713b1edbc	431	#define LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF) /!< ADC low power modes auto wait and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	171:3a7713b1edbc	432	/**
AnnaBridge	171:3a7713b1edbc	433	* @}
AnnaBridge	171:3a7713b1edbc	434	*/
AnnaBridge	171:3a7713b1edbc	435
AnnaBridge	171:3a7713b1edbc	436	/** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
AnnaBridge	171:3a7713b1edbc	437	* @{
AnnaBridge	171:3a7713b1edbc	438	*/
AnnaBridge	171:3a7713b1edbc	439	#define LL_ADC_GROUP_REGULAR (0x00000001U) /!< ADC group regular (available on all STM32 devices) /
AnnaBridge	171:3a7713b1edbc	440	/**
AnnaBridge	171:3a7713b1edbc	441	* @}
AnnaBridge	171:3a7713b1edbc	442	*/
AnnaBridge	171:3a7713b1edbc	443
AnnaBridge	171:3a7713b1edbc	444	/** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
AnnaBridge	171:3a7713b1edbc	445	* @{
AnnaBridge	171:3a7713b1edbc	446	*/
AnnaBridge	171:3a7713b1edbc	447	#define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER \| ADC_CHANNEL_0_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN0 /
AnnaBridge	171:3a7713b1edbc	448	#define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER \| ADC_CHANNEL_1_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN1 /
AnnaBridge	171:3a7713b1edbc	449	#define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER \| ADC_CHANNEL_2_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN2 /
AnnaBridge	171:3a7713b1edbc	450	#define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER \| ADC_CHANNEL_3_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN3 /
AnnaBridge	171:3a7713b1edbc	451	#define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER \| ADC_CHANNEL_4_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN4 /
AnnaBridge	171:3a7713b1edbc	452	#define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER \| ADC_CHANNEL_5_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN5 /
AnnaBridge	171:3a7713b1edbc	453	#define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER \| ADC_CHANNEL_6_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN6 /
AnnaBridge	171:3a7713b1edbc	454	#define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER \| ADC_CHANNEL_7_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN7 /
AnnaBridge	171:3a7713b1edbc	455	#define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER \| ADC_CHANNEL_8_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN8 /
AnnaBridge	171:3a7713b1edbc	456	#define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER \| ADC_CHANNEL_9_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN9 /
AnnaBridge	171:3a7713b1edbc	457	#define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER \| ADC_CHANNEL_10_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 /
AnnaBridge	171:3a7713b1edbc	458	#define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER \| ADC_CHANNEL_11_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 /
AnnaBridge	171:3a7713b1edbc	459	#define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER \| ADC_CHANNEL_12_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 /
AnnaBridge	171:3a7713b1edbc	460	#define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER \| ADC_CHANNEL_13_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 /
AnnaBridge	171:3a7713b1edbc	461	#define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER \| ADC_CHANNEL_14_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 /
AnnaBridge	171:3a7713b1edbc	462	#define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER \| ADC_CHANNEL_15_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 /
AnnaBridge	171:3a7713b1edbc	463	#define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER \| ADC_CHANNEL_16_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 /
AnnaBridge	171:3a7713b1edbc	464	#define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER \| ADC_CHANNEL_17_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 /
AnnaBridge	171:3a7713b1edbc	465	#define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to VrefInt: Internal voltage reference. /
AnnaBridge	171:3a7713b1edbc	466	#define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_16 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Temperature sensor. /
AnnaBridge	171:3a7713b1edbc	467	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	468	#define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER \| ADC_CHANNEL_18_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 /
AnnaBridge	171:3a7713b1edbc	469	#define LL_ADC_CHANNEL_VBAT (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Vbat/2: Vbat voltage through a divider ladder of factor 1/2 to have Vbat always below Vdda. /
AnnaBridge	171:3a7713b1edbc	470	#endif
AnnaBridge	171:3a7713b1edbc	471	/**
AnnaBridge	171:3a7713b1edbc	472	* @}
AnnaBridge	171:3a7713b1edbc	473	*/
AnnaBridge	171:3a7713b1edbc	474
AnnaBridge	171:3a7713b1edbc	475	/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
AnnaBridge	171:3a7713b1edbc	476	* @{
AnnaBridge	171:3a7713b1edbc	477	*/
AnnaBridge	171:3a7713b1edbc	478	#define LL_ADC_REG_TRIG_SOFTWARE (0x00000000U) /!< ADC group regular conversion trigger internal: SW start. /
AnnaBridge	171:3a7713b1edbc	479	#define LL_ADC_REG_TRIG_EXT_TIM1_TRGO (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	171:3a7713b1edbc	480	#define LL_ADC_REG_TRIG_EXT_TIM1_CH4 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM1 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	171:3a7713b1edbc	481	#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	171:3a7713b1edbc	482	#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	171:3a7713b1edbc	483	#define LL_ADC_REG_TRIG_EXT_TIM15_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM15 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	171:3a7713b1edbc	484	/**
AnnaBridge	171:3a7713b1edbc	485	* @}
AnnaBridge	171:3a7713b1edbc	486	*/
AnnaBridge	171:3a7713b1edbc	487
AnnaBridge	171:3a7713b1edbc	488	/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
AnnaBridge	171:3a7713b1edbc	489	* @{
AnnaBridge	171:3a7713b1edbc	490	*/
AnnaBridge	171:3a7713b1edbc	491	#define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to rising edge /
AnnaBridge	171:3a7713b1edbc	492	#define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR1_EXTEN_1 ) /!< ADC group regular conversion trigger polarity set to falling edge /
AnnaBridge	171:3a7713b1edbc	493	#define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR1_EXTEN_1 \| ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to both rising and falling edges /
AnnaBridge	171:3a7713b1edbc	494	/**
AnnaBridge	171:3a7713b1edbc	495	* @}
AnnaBridge	171:3a7713b1edbc	496	*/
AnnaBridge	171:3a7713b1edbc	497
AnnaBridge	171:3a7713b1edbc	498	/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
AnnaBridge	171:3a7713b1edbc	499	* @{
AnnaBridge	171:3a7713b1edbc	500	*/
AnnaBridge	171:3a7713b1edbc	501	#define LL_ADC_REG_CONV_SINGLE (0x00000000U) /!< ADC conversions are performed in single mode: one conversion per trigger /
AnnaBridge	171:3a7713b1edbc	502	#define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR1_CONT) /!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically /
AnnaBridge	171:3a7713b1edbc	503	/**
AnnaBridge	171:3a7713b1edbc	504	* @}
AnnaBridge	171:3a7713b1edbc	505	*/
AnnaBridge	171:3a7713b1edbc	506
AnnaBridge	171:3a7713b1edbc	507	/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
AnnaBridge	171:3a7713b1edbc	508	* @{
AnnaBridge	171:3a7713b1edbc	509	*/
AnnaBridge	171:3a7713b1edbc	510	#define LL_ADC_REG_DMA_TRANSFER_NONE (0x00000000U) /!< ADC conversions are not transferred by DMA /
AnnaBridge	171:3a7713b1edbc	511	#define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. /
AnnaBridge	171:3a7713b1edbc	512	#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. /
AnnaBridge	171:3a7713b1edbc	513	/**
AnnaBridge	171:3a7713b1edbc	514	* @}
AnnaBridge	171:3a7713b1edbc	515	*/
AnnaBridge	171:3a7713b1edbc	516
AnnaBridge	171:3a7713b1edbc	517	/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion data
AnnaBridge	171:3a7713b1edbc	518	* @{
AnnaBridge	171:3a7713b1edbc	519	*/
AnnaBridge	171:3a7713b1edbc	520	#define LL_ADC_REG_OVR_DATA_PRESERVED (0x00000000U)/!< ADC group regular behavior in case of overrun: data preserved /
AnnaBridge	171:3a7713b1edbc	521	#define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR1_OVRMOD) /!< ADC group regular behavior in case of overrun: data overwritten /
AnnaBridge	171:3a7713b1edbc	522	/**
AnnaBridge	171:3a7713b1edbc	523	* @}
AnnaBridge	171:3a7713b1edbc	524	*/
AnnaBridge	171:3a7713b1edbc	525
AnnaBridge	171:3a7713b1edbc	526	/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_DIRECTION ADC group regular - Sequencer scan direction
AnnaBridge	171:3a7713b1edbc	527	* @{
AnnaBridge	171:3a7713b1edbc	528	*/
AnnaBridge	171:3a7713b1edbc	529	#define LL_ADC_REG_SEQ_SCAN_DIR_FORWARD (0x00000000U)/!< ADC group regular sequencer scan direction forward: from lowest channel number to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer). On some other STM32 families, this setting is not available and the default scan direction is forward. /
AnnaBridge	171:3a7713b1edbc	530	#define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD (ADC_CFGR1_SCANDIR) /!< ADC group regular sequencer scan direction backward: from highest channel number to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer) /
AnnaBridge	171:3a7713b1edbc	531	/**
AnnaBridge	171:3a7713b1edbc	532	* @}
AnnaBridge	171:3a7713b1edbc	533	*/
AnnaBridge	171:3a7713b1edbc	534
AnnaBridge	171:3a7713b1edbc	535	/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
AnnaBridge	171:3a7713b1edbc	536	* @{
AnnaBridge	171:3a7713b1edbc	537	*/
AnnaBridge	171:3a7713b1edbc	538	#define LL_ADC_REG_SEQ_DISCONT_DISABLE (0x00000000U) /!< ADC group regular sequencer discontinuous mode disable /
AnnaBridge	171:3a7713b1edbc	539	#define LL_ADC_REG_SEQ_DISCONT_1RANK (ADC_CFGR1_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank /
AnnaBridge	171:3a7713b1edbc	540	/**
AnnaBridge	171:3a7713b1edbc	541	* @}
AnnaBridge	171:3a7713b1edbc	542	*/
AnnaBridge	171:3a7713b1edbc	543
AnnaBridge	171:3a7713b1edbc	544	/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
AnnaBridge	171:3a7713b1edbc	545	* @{
AnnaBridge	171:3a7713b1edbc	546	*/
AnnaBridge	171:3a7713b1edbc	547	#define LL_ADC_SAMPLINGTIME_1CYCLE_5 (0x00000000U) /!< Sampling time 1.5 ADC clock cycle /
AnnaBridge	171:3a7713b1edbc	548	#define LL_ADC_SAMPLINGTIME_7CYCLES_5 (ADC_SMPR_SMP_0) /!< Sampling time 7.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	549	#define LL_ADC_SAMPLINGTIME_13CYCLES_5 (ADC_SMPR_SMP_1) /!< Sampling time 13.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	550	#define LL_ADC_SAMPLINGTIME_28CYCLES_5 (ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 28.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	551	#define LL_ADC_SAMPLINGTIME_41CYCLES_5 (ADC_SMPR_SMP_2) /!< Sampling time 41.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	552	#define LL_ADC_SAMPLINGTIME_55CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_0) /!< Sampling time 55.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	553	#define LL_ADC_SAMPLINGTIME_71CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1) /!< Sampling time 71.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	554	#define LL_ADC_SAMPLINGTIME_239CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 239.5 ADC clock cycles /
AnnaBridge	171:3a7713b1edbc	555	/**
AnnaBridge	171:3a7713b1edbc	556	* @}
AnnaBridge	171:3a7713b1edbc	557	*/
AnnaBridge	171:3a7713b1edbc	558
AnnaBridge	171:3a7713b1edbc	559	/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
AnnaBridge	171:3a7713b1edbc	560	* @{
AnnaBridge	171:3a7713b1edbc	561	*/
AnnaBridge	171:3a7713b1edbc	562	#define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR1_REGOFFSET) /!< ADC analog watchdog number 1 /
AnnaBridge	171:3a7713b1edbc	563	/**
AnnaBridge	171:3a7713b1edbc	564	* @}
AnnaBridge	171:3a7713b1edbc	565	*/
AnnaBridge	171:3a7713b1edbc	566
AnnaBridge	171:3a7713b1edbc	567	/** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
AnnaBridge	171:3a7713b1edbc	568	* @{
AnnaBridge	171:3a7713b1edbc	569	*/
AnnaBridge	171:3a7713b1edbc	570	#define LL_ADC_AWD_DISABLE (0x00000000U) /!< ADC analog watchdog monitoring disabled /
AnnaBridge	171:3a7713b1edbc	571	#define LL_ADC_AWD_ALL_CHANNELS_REG ( ADC_CFGR1_AWDEN ) /!< ADC analog watchdog monitoring of all channels, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	572	#define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	573	#define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	574	#define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	575	#define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	576	#define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	577	#define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	578	#define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	579	#define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	580	#define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	581	#define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	582	#define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	583	#define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	584	#define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	585	#define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	586	#define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	587	#define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	588	#define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	589	#define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	590	#define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	591	#define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	592	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	593	#define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	594	#define LL_ADC_AWD_CH_VBAT_REG ((LL_ADC_CHANNEL_VBAT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only /
AnnaBridge	171:3a7713b1edbc	595	#endif
AnnaBridge	171:3a7713b1edbc	596	/**
AnnaBridge	171:3a7713b1edbc	597	* @}
AnnaBridge	171:3a7713b1edbc	598	*/
AnnaBridge	171:3a7713b1edbc	599
AnnaBridge	171:3a7713b1edbc	600	/** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
AnnaBridge	171:3a7713b1edbc	601	* @{
AnnaBridge	171:3a7713b1edbc	602	*/
AnnaBridge	171:3a7713b1edbc	603	#define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR_HT ) /!< ADC analog watchdog threshold high /
AnnaBridge	171:3a7713b1edbc	604	#define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR_LT) /!< ADC analog watchdog threshold low /
AnnaBridge	171:3a7713b1edbc	605	#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR_HT \| ADC_TR_LT) /!< ADC analog watchdog both thresholds high and low concatenated into the same data /
AnnaBridge	171:3a7713b1edbc	606	/**
AnnaBridge	171:3a7713b1edbc	607	* @}
AnnaBridge	171:3a7713b1edbc	608	*/
AnnaBridge	171:3a7713b1edbc	609
AnnaBridge	171:3a7713b1edbc	610
AnnaBridge	171:3a7713b1edbc	611	/** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
AnnaBridge	171:3a7713b1edbc	612	* @note Only ADC IP HW delays are defined in ADC LL driver driver,
AnnaBridge	171:3a7713b1edbc	613	* not timeout values.
AnnaBridge	171:3a7713b1edbc	614	* For details on delays values, refer to descriptions in source code
AnnaBridge	171:3a7713b1edbc	615	* above each literal definition.
AnnaBridge	171:3a7713b1edbc	616	* @{
AnnaBridge	171:3a7713b1edbc	617	*/
AnnaBridge	171:3a7713b1edbc	618
AnnaBridge	171:3a7713b1edbc	619	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
AnnaBridge	171:3a7713b1edbc	620	/* not timeout values. */
AnnaBridge	171:3a7713b1edbc	621	/* Timeout values for ADC operations are dependent to device clock */
AnnaBridge	171:3a7713b1edbc	622	/* configuration (system clock versus ADC clock), */
AnnaBridge	171:3a7713b1edbc	623	/* and therefore must be defined in user application. */
AnnaBridge	171:3a7713b1edbc	624	/* Indications for estimation of ADC timeout delays, for this */
AnnaBridge	171:3a7713b1edbc	625	/* STM32 serie: */
AnnaBridge	171:3a7713b1edbc	626	/* - ADC calibration time: maximum delay is 83/fADC. */
AnnaBridge	171:3a7713b1edbc	627	/* (refer to device datasheet, parameter "tCAL") */
AnnaBridge	171:3a7713b1edbc	628	/* - ADC enable time: maximum delay is 1 conversion cycle. */
AnnaBridge	171:3a7713b1edbc	629	/* (refer to device datasheet, parameter "tSTAB") */
AnnaBridge	171:3a7713b1edbc	630	/* - ADC disable time: maximum delay should be a few ADC clock cycles */
AnnaBridge	171:3a7713b1edbc	631	/* - ADC stop conversion time: maximum delay should be a few ADC clock */
AnnaBridge	171:3a7713b1edbc	632	/* cycles */
AnnaBridge	171:3a7713b1edbc	633	/* - ADC conversion time: duration depending on ADC clock and ADC */
AnnaBridge	171:3a7713b1edbc	634	/* configuration. */
AnnaBridge	171:3a7713b1edbc	635	/* (refer to device reference manual, section "Timing") */
AnnaBridge	171:3a7713b1edbc	636
AnnaBridge	171:3a7713b1edbc	637
AnnaBridge	171:3a7713b1edbc	638	/* Delay for internal voltage reference stabilization time. */
AnnaBridge	171:3a7713b1edbc	639	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	171:3a7713b1edbc	640	/* parameter "tSTART"). */
AnnaBridge	171:3a7713b1edbc	641	/* Unit: us */
AnnaBridge	171:3a7713b1edbc	642	#define LL_ADC_DELAY_VREFINT_STAB_US ( 10U) /!< Delay for internal voltage reference stabilization time /
AnnaBridge	171:3a7713b1edbc	643
AnnaBridge	171:3a7713b1edbc	644	/* Delay for temperature sensor stabilization time. */
AnnaBridge	171:3a7713b1edbc	645	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	171:3a7713b1edbc	646	/* parameter "tSTART"). */
AnnaBridge	171:3a7713b1edbc	647	/* Unit: us */
AnnaBridge	171:3a7713b1edbc	648	#define LL_ADC_DELAY_TEMPSENSOR_STAB_US ( 10U) /!< Delay for temperature sensor stabilization time /
AnnaBridge	171:3a7713b1edbc	649
AnnaBridge	171:3a7713b1edbc	650	/* Delay required between ADC end of calibration and ADC enable. */
AnnaBridge	171:3a7713b1edbc	651	/* Note: On this STM32 serie, a minimum number of ADC clock cycles */
AnnaBridge	171:3a7713b1edbc	652	/* are required between ADC end of calibration and ADC enable. */
AnnaBridge	171:3a7713b1edbc	653	/* Wait time can be computed in user application by waiting for the */
AnnaBridge	171:3a7713b1edbc	654	/* equivalent number of CPU cycles, by taking into account */
AnnaBridge	171:3a7713b1edbc	655	/* ratio of CPU clock versus ADC clock prescalers. */
AnnaBridge	171:3a7713b1edbc	656	/* Unit: ADC clock cycles. */
AnnaBridge	171:3a7713b1edbc	657	#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ( 2U) /!< Delay required between ADC end of calibration and ADC enable /
AnnaBridge	171:3a7713b1edbc	658
AnnaBridge	171:3a7713b1edbc	659	/**
AnnaBridge	171:3a7713b1edbc	660	* @}
AnnaBridge	171:3a7713b1edbc	661	*/
AnnaBridge	171:3a7713b1edbc	662
AnnaBridge	171:3a7713b1edbc	663	/**
AnnaBridge	171:3a7713b1edbc	664	* @}
AnnaBridge	171:3a7713b1edbc	665	*/
AnnaBridge	171:3a7713b1edbc	666
AnnaBridge	171:3a7713b1edbc	667
AnnaBridge	171:3a7713b1edbc	668	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	669	/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
AnnaBridge	171:3a7713b1edbc	670	* @{
AnnaBridge	171:3a7713b1edbc	671	*/
AnnaBridge	171:3a7713b1edbc	672
AnnaBridge	171:3a7713b1edbc	673	/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge	171:3a7713b1edbc	674	* @{
AnnaBridge	171:3a7713b1edbc	675	*/
AnnaBridge	171:3a7713b1edbc	676
AnnaBridge	171:3a7713b1edbc	677	/**
AnnaBridge	171:3a7713b1edbc	678	* @brief Write a value in ADC register
AnnaBridge	171:3a7713b1edbc	679	* @param __INSTANCE__ ADC Instance
AnnaBridge	171:3a7713b1edbc	680	* @param __REG__ Register to be written
AnnaBridge	171:3a7713b1edbc	681	* @param __VALUE__ Value to be written in the register
AnnaBridge	171:3a7713b1edbc	682	* @retval None
AnnaBridge	171:3a7713b1edbc	683	*/
AnnaBridge	171:3a7713b1edbc	684	#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	171:3a7713b1edbc	685
AnnaBridge	171:3a7713b1edbc	686	/**
AnnaBridge	171:3a7713b1edbc	687	* @brief Read a value in ADC register
AnnaBridge	171:3a7713b1edbc	688	* @param __INSTANCE__ ADC Instance
AnnaBridge	171:3a7713b1edbc	689	* @param __REG__ Register to be read
AnnaBridge	171:3a7713b1edbc	690	* @retval Register value
AnnaBridge	171:3a7713b1edbc	691	*/
AnnaBridge	171:3a7713b1edbc	692	#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	171:3a7713b1edbc	693	/**
AnnaBridge	171:3a7713b1edbc	694	* @}
AnnaBridge	171:3a7713b1edbc	695	*/
AnnaBridge	171:3a7713b1edbc	696
AnnaBridge	171:3a7713b1edbc	697	/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
AnnaBridge	171:3a7713b1edbc	698	* @{
AnnaBridge	171:3a7713b1edbc	699	*/
AnnaBridge	171:3a7713b1edbc	700
AnnaBridge	171:3a7713b1edbc	701	/**
AnnaBridge	171:3a7713b1edbc	702	* @brief Helper macro to get ADC channel number in decimal format
AnnaBridge	171:3a7713b1edbc	703	* from literals LL_ADC_CHANNEL_x.
AnnaBridge	171:3a7713b1edbc	704	* @note Example:
AnnaBridge	171:3a7713b1edbc	705	* __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
AnnaBridge	171:3a7713b1edbc	706	* will return decimal number "4".
AnnaBridge	171:3a7713b1edbc	707	* @note The input can be a value from functions where a channel
AnnaBridge	171:3a7713b1edbc	708	* number is returned, either defined with number
AnnaBridge	171:3a7713b1edbc	709	* or with bitfield (only one bit must be set).
AnnaBridge	171:3a7713b1edbc	710	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	711	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	712	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	713	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	714	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	715	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	716	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	717	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	718	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	719	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	720	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	721	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	722	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	723	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	724	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	725	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	726	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	727	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	728	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	729	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	730	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	731	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	732	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	733	*
AnnaBridge	171:3a7713b1edbc	734	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	735	* @retval Value between Min_Data=0 and Max_Data=18
AnnaBridge	171:3a7713b1edbc	736	*/
AnnaBridge	171:3a7713b1edbc	737	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	171:3a7713b1edbc	738	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	171:3a7713b1edbc	739	? ( \
AnnaBridge	171:3a7713b1edbc	740	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	171:3a7713b1edbc	741	) \
AnnaBridge	171:3a7713b1edbc	742	: \
AnnaBridge	171:3a7713b1edbc	743	( \
AnnaBridge	171:3a7713b1edbc	744	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	171:3a7713b1edbc	745	( \
AnnaBridge	171:3a7713b1edbc	746	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	171:3a7713b1edbc	747	( \
AnnaBridge	171:3a7713b1edbc	748	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	171:3a7713b1edbc	749	( \
AnnaBridge	171:3a7713b1edbc	750	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	171:3a7713b1edbc	751	( \
AnnaBridge	171:3a7713b1edbc	752	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	171:3a7713b1edbc	753	( \
AnnaBridge	171:3a7713b1edbc	754	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	171:3a7713b1edbc	755	( \
AnnaBridge	171:3a7713b1edbc	756	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	171:3a7713b1edbc	757	( \
AnnaBridge	171:3a7713b1edbc	758	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	171:3a7713b1edbc	759	( \
AnnaBridge	171:3a7713b1edbc	760	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	171:3a7713b1edbc	761	( \
AnnaBridge	171:3a7713b1edbc	762	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	171:3a7713b1edbc	763	( \
AnnaBridge	171:3a7713b1edbc	764	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	171:3a7713b1edbc	765	( \
AnnaBridge	171:3a7713b1edbc	766	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	171:3a7713b1edbc	767	( \
AnnaBridge	171:3a7713b1edbc	768	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	171:3a7713b1edbc	769	( \
AnnaBridge	171:3a7713b1edbc	770	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	171:3a7713b1edbc	771	( \
AnnaBridge	171:3a7713b1edbc	772	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	171:3a7713b1edbc	773	( \
AnnaBridge	171:3a7713b1edbc	774	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	171:3a7713b1edbc	775	( \
AnnaBridge	171:3a7713b1edbc	776	(((__CHANNEL__) & ADC_CHSELR_CHSEL16) == ADC_CHSELR_CHSEL16) ? (16U) : \
AnnaBridge	171:3a7713b1edbc	777	( \
AnnaBridge	171:3a7713b1edbc	778	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	171:3a7713b1edbc	779	( \
AnnaBridge	171:3a7713b1edbc	780	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	171:3a7713b1edbc	781	(0U) \
AnnaBridge	171:3a7713b1edbc	782	) \
AnnaBridge	171:3a7713b1edbc	783	) \
AnnaBridge	171:3a7713b1edbc	784	) \
AnnaBridge	171:3a7713b1edbc	785	) \
AnnaBridge	171:3a7713b1edbc	786	) \
AnnaBridge	171:3a7713b1edbc	787	) \
AnnaBridge	171:3a7713b1edbc	788	) \
AnnaBridge	171:3a7713b1edbc	789	) \
AnnaBridge	171:3a7713b1edbc	790	) \
AnnaBridge	171:3a7713b1edbc	791	) \
AnnaBridge	171:3a7713b1edbc	792	) \
AnnaBridge	171:3a7713b1edbc	793	) \
AnnaBridge	171:3a7713b1edbc	794	) \
AnnaBridge	171:3a7713b1edbc	795	) \
AnnaBridge	171:3a7713b1edbc	796	) \
AnnaBridge	171:3a7713b1edbc	797	) \
AnnaBridge	171:3a7713b1edbc	798	) \
AnnaBridge	171:3a7713b1edbc	799	) \
AnnaBridge	171:3a7713b1edbc	800	) \
AnnaBridge	171:3a7713b1edbc	801	)
AnnaBridge	171:3a7713b1edbc	802
AnnaBridge	171:3a7713b1edbc	803	/**
AnnaBridge	171:3a7713b1edbc	804	* @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
AnnaBridge	171:3a7713b1edbc	805	* from number in decimal format.
AnnaBridge	171:3a7713b1edbc	806	* @note Example:
AnnaBridge	171:3a7713b1edbc	807	* __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
AnnaBridge	171:3a7713b1edbc	808	* will return a data equivalent to "LL_ADC_CHANNEL_4".
AnnaBridge	171:3a7713b1edbc	809	* @param __DECIMAL_NB__ Value between Min_Data=0 and Max_Data=18
AnnaBridge	171:3a7713b1edbc	810	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	811	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	812	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	813	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	814	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	815	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	816	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	817	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	818	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	819	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	820	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	821	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	822	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	823	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	824	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	825	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	826	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	827	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	828	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	829	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	830	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	171:3a7713b1edbc	831	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	171:3a7713b1edbc	832	* @arg @ref LL_ADC_CHANNEL_VBAT (1)(2)
AnnaBridge	171:3a7713b1edbc	833	*
AnnaBridge	171:3a7713b1edbc	834	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.\n
AnnaBridge	171:3a7713b1edbc	835	* (2) For ADC channel read back from ADC register,
AnnaBridge	171:3a7713b1edbc	836	* comparison with internal channel parameter to be done
AnnaBridge	171:3a7713b1edbc	837	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	171:3a7713b1edbc	838	*/
AnnaBridge	171:3a7713b1edbc	839	#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	171:3a7713b1edbc	840	( \
AnnaBridge	171:3a7713b1edbc	841	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
AnnaBridge	171:3a7713b1edbc	842	(ADC_CHSELR_CHSEL0 << (__DECIMAL_NB__)) \
AnnaBridge	171:3a7713b1edbc	843	)
AnnaBridge	171:3a7713b1edbc	844
AnnaBridge	171:3a7713b1edbc	845	/**
AnnaBridge	171:3a7713b1edbc	846	* @brief Helper macro to determine whether the selected channel
AnnaBridge	171:3a7713b1edbc	847	* corresponds to literal definitions of driver.
AnnaBridge	171:3a7713b1edbc	848	* @note The different literal definitions of ADC channels are:
AnnaBridge	171:3a7713b1edbc	849	* - ADC internal channel:
AnnaBridge	171:3a7713b1edbc	850	* LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
AnnaBridge	171:3a7713b1edbc	851	* - ADC external channel (channel connected to a GPIO pin):
AnnaBridge	171:3a7713b1edbc	852	* LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
AnnaBridge	171:3a7713b1edbc	853	* @note The channel parameter must be a value defined from literal
AnnaBridge	171:3a7713b1edbc	854	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	171:3a7713b1edbc	855	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	171:3a7713b1edbc	856	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
AnnaBridge	171:3a7713b1edbc	857	* must not be a value from functions where a channel number is
AnnaBridge	171:3a7713b1edbc	858	* returned from ADC registers,
AnnaBridge	171:3a7713b1edbc	859	* because internal and external channels share the same channel
AnnaBridge	171:3a7713b1edbc	860	* number in ADC registers. The differentiation is made only with
AnnaBridge	171:3a7713b1edbc	861	* parameters definitions of driver.
AnnaBridge	171:3a7713b1edbc	862	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	863	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	864	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	865	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	866	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	867	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	868	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	869	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	870	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	871	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	872	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	873	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	874	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	875	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	876	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	877	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	878	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	879	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	880	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	881	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	882	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	883	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	884	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	885	*
AnnaBridge	171:3a7713b1edbc	886	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	887	* @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin).
AnnaBridge	171:3a7713b1edbc	888	* Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
AnnaBridge	171:3a7713b1edbc	889	*/
AnnaBridge	171:3a7713b1edbc	890	#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
AnnaBridge	171:3a7713b1edbc	891	(((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
AnnaBridge	171:3a7713b1edbc	892
AnnaBridge	171:3a7713b1edbc	893	/**
AnnaBridge	171:3a7713b1edbc	894	* @brief Helper macro to convert a channel defined from parameter
AnnaBridge	171:3a7713b1edbc	895	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	171:3a7713b1edbc	896	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	171:3a7713b1edbc	897	* to its equivalent parameter definition of a ADC external channel
AnnaBridge	171:3a7713b1edbc	898	* (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
AnnaBridge	171:3a7713b1edbc	899	* @note The channel parameter can be, additionally to a value
AnnaBridge	171:3a7713b1edbc	900	* defined from parameter definition of a ADC internal channel
AnnaBridge	171:3a7713b1edbc	901	* (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	171:3a7713b1edbc	902	* a value defined from parameter definition of
AnnaBridge	171:3a7713b1edbc	903	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	171:3a7713b1edbc	904	* or a value from functions where a channel number is returned
AnnaBridge	171:3a7713b1edbc	905	* from ADC registers.
AnnaBridge	171:3a7713b1edbc	906	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	907	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	908	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	909	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	910	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	911	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	912	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	913	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	914	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	915	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	916	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	917	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	918	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	919	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	920	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	921	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	922	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	923	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	924	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	925	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	926	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	927	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	928	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	929	*
AnnaBridge	171:3a7713b1edbc	930	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	931	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	932	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	933	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	934	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	935	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	936	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	937	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	938	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	939	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	940	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	941	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	942	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	943	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	944	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	945	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	946	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	947	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	948	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	949	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	950	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	171:3a7713b1edbc	951	*/
AnnaBridge	171:3a7713b1edbc	952	#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
AnnaBridge	171:3a7713b1edbc	953	((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	171:3a7713b1edbc	954
AnnaBridge	171:3a7713b1edbc	955	/**
AnnaBridge	171:3a7713b1edbc	956	* @brief Helper macro to determine whether the internal channel
AnnaBridge	171:3a7713b1edbc	957	* selected is available on the ADC instance selected.
AnnaBridge	171:3a7713b1edbc	958	* @note The channel parameter must be a value defined from parameter
AnnaBridge	171:3a7713b1edbc	959	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	171:3a7713b1edbc	960	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	171:3a7713b1edbc	961	* must not be a value defined from parameter definition of
AnnaBridge	171:3a7713b1edbc	962	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	171:3a7713b1edbc	963	* or a value from functions where a channel number is
AnnaBridge	171:3a7713b1edbc	964	* returned from ADC registers,
AnnaBridge	171:3a7713b1edbc	965	* because internal and external channels share the same channel
AnnaBridge	171:3a7713b1edbc	966	* number in ADC registers. The differentiation is made only with
AnnaBridge	171:3a7713b1edbc	967	* parameters definitions of driver.
AnnaBridge	171:3a7713b1edbc	968	* @param __ADC_INSTANCE__ ADC instance
AnnaBridge	171:3a7713b1edbc	969	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	970	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	971	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	972	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	973	*
AnnaBridge	171:3a7713b1edbc	974	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	975	* @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
AnnaBridge	171:3a7713b1edbc	976	* Value "1" if the internal channel selected is available on the ADC instance selected.
AnnaBridge	171:3a7713b1edbc	977	*/
AnnaBridge	171:3a7713b1edbc	978	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	979	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	171:3a7713b1edbc	980	( \
AnnaBridge	171:3a7713b1edbc	981	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	171:3a7713b1edbc	982	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	171:3a7713b1edbc	983	((__CHANNEL__) == LL_ADC_CHANNEL_VBAT) \
AnnaBridge	171:3a7713b1edbc	984	)
AnnaBridge	171:3a7713b1edbc	985	#else
AnnaBridge	171:3a7713b1edbc	986	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	171:3a7713b1edbc	987	( \
AnnaBridge	171:3a7713b1edbc	988	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	171:3a7713b1edbc	989	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \
AnnaBridge	171:3a7713b1edbc	990	)
AnnaBridge	171:3a7713b1edbc	991	#endif
AnnaBridge	171:3a7713b1edbc	992
AnnaBridge	171:3a7713b1edbc	993	/**
AnnaBridge	171:3a7713b1edbc	994	* @brief Helper macro to define ADC analog watchdog parameter:
AnnaBridge	171:3a7713b1edbc	995	* define a single channel to monitor with analog watchdog
AnnaBridge	171:3a7713b1edbc	996	* from sequencer channel and groups definition.
AnnaBridge	171:3a7713b1edbc	997	* @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
AnnaBridge	171:3a7713b1edbc	998	* Example:
AnnaBridge	171:3a7713b1edbc	999	* LL_ADC_SetAnalogWDMonitChannels(
AnnaBridge	171:3a7713b1edbc	1000	* ADC1, LL_ADC_AWD1,
AnnaBridge	171:3a7713b1edbc	1001	* __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
AnnaBridge	171:3a7713b1edbc	1002	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1003	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	1004	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	1005	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	1006	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	1007	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	1008	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	1009	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	1010	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	1011	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	1012	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	1013	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	1014	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	1015	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	1016	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	1017	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	1018	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	1019	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	1020	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	1021	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	1022	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	171:3a7713b1edbc	1023	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	171:3a7713b1edbc	1024	* @arg @ref LL_ADC_CHANNEL_VBAT (1)(2)
AnnaBridge	171:3a7713b1edbc	1025	*
AnnaBridge	171:3a7713b1edbc	1026	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.\n
AnnaBridge	171:3a7713b1edbc	1027	* (2) For ADC channel read back from ADC register,
AnnaBridge	171:3a7713b1edbc	1028	* comparison with internal channel parameter to be done
AnnaBridge	171:3a7713b1edbc	1029	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	171:3a7713b1edbc	1030	* @param __GROUP__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1031	* @arg @ref LL_ADC_GROUP_REGULAR
AnnaBridge	171:3a7713b1edbc	1032	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1033	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	171:3a7713b1edbc	1034	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	171:3a7713b1edbc	1035	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	171:3a7713b1edbc	1036	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	171:3a7713b1edbc	1037	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	171:3a7713b1edbc	1038	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	171:3a7713b1edbc	1039	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	171:3a7713b1edbc	1040	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	171:3a7713b1edbc	1041	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	171:3a7713b1edbc	1042	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	171:3a7713b1edbc	1043	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	171:3a7713b1edbc	1044	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	171:3a7713b1edbc	1045	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	171:3a7713b1edbc	1046	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	171:3a7713b1edbc	1047	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	171:3a7713b1edbc	1048	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	171:3a7713b1edbc	1049	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	171:3a7713b1edbc	1050	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	171:3a7713b1edbc	1051	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG
AnnaBridge	171:3a7713b1edbc	1052	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	171:3a7713b1edbc	1053	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (1)
AnnaBridge	171:3a7713b1edbc	1054	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	171:3a7713b1edbc	1055	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	171:3a7713b1edbc	1056	* @arg @ref LL_ADC_AWD_CH_VBAT_REG (1)
AnnaBridge	171:3a7713b1edbc	1057	*
AnnaBridge	171:3a7713b1edbc	1058	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	1059	*/
AnnaBridge	171:3a7713b1edbc	1060	#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) \
AnnaBridge	171:3a7713b1edbc	1061	(((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	171:3a7713b1edbc	1062
AnnaBridge	171:3a7713b1edbc	1063	/**
AnnaBridge	171:3a7713b1edbc	1064	* @brief Helper macro to set the value of ADC analog watchdog threshold high
AnnaBridge	171:3a7713b1edbc	1065	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	171:3a7713b1edbc	1066	* different of 12 bits.
AnnaBridge	171:3a7713b1edbc	1067	* @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
AnnaBridge	171:3a7713b1edbc	1068	* or @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	171:3a7713b1edbc	1069	* Example, with a ADC resolution of 8 bits, to set the value of
AnnaBridge	171:3a7713b1edbc	1070	* analog watchdog threshold high (on 8 bits):
AnnaBridge	171:3a7713b1edbc	1071	* LL_ADC_SetAnalogWDThresholds
AnnaBridge	171:3a7713b1edbc	1072	* (< ADCx param >,
AnnaBridge	171:3a7713b1edbc	1073	* __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8_bits>)
AnnaBridge	171:3a7713b1edbc	1074	* );
AnnaBridge	171:3a7713b1edbc	1075	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1076	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1077	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1078	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1079	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1080	* @param __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	1081	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	1082	*/
AnnaBridge	171:3a7713b1edbc	1083	#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
AnnaBridge	171:3a7713b1edbc	1084	((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	171:3a7713b1edbc	1085
AnnaBridge	171:3a7713b1edbc	1086	/**
AnnaBridge	171:3a7713b1edbc	1087	* @brief Helper macro to get the value of ADC analog watchdog threshold high
AnnaBridge	171:3a7713b1edbc	1088	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	171:3a7713b1edbc	1089	* different of 12 bits.
AnnaBridge	171:3a7713b1edbc	1090	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	171:3a7713b1edbc	1091	* Example, with a ADC resolution of 8 bits, to get the value of
AnnaBridge	171:3a7713b1edbc	1092	* analog watchdog threshold high (on 8 bits):
AnnaBridge	171:3a7713b1edbc	1093	* < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
AnnaBridge	171:3a7713b1edbc	1094	* (LL_ADC_RESOLUTION_8B,
AnnaBridge	171:3a7713b1edbc	1095	* LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
AnnaBridge	171:3a7713b1edbc	1096	* );
AnnaBridge	171:3a7713b1edbc	1097	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1098	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1099	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1100	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1101	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1102	* @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	1103	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	1104	*/
AnnaBridge	171:3a7713b1edbc	1105	#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
AnnaBridge	171:3a7713b1edbc	1106	((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	171:3a7713b1edbc	1107
AnnaBridge	171:3a7713b1edbc	1108	/**
AnnaBridge	171:3a7713b1edbc	1109	* @brief Helper macro to get the ADC analog watchdog threshold high
AnnaBridge	171:3a7713b1edbc	1110	* or low from raw value containing both thresholds concatenated.
AnnaBridge	171:3a7713b1edbc	1111	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	171:3a7713b1edbc	1112	* Example, to get analog watchdog threshold high from the register raw value:
AnnaBridge	171:3a7713b1edbc	1113	* __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both_thresholds>);
AnnaBridge	171:3a7713b1edbc	1114	* @param __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1115	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	171:3a7713b1edbc	1116	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	171:3a7713b1edbc	1117	* @param __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	171:3a7713b1edbc	1118	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	1119	*/
AnnaBridge	171:3a7713b1edbc	1120	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
AnnaBridge	171:3a7713b1edbc	1121	(((__AWD_THRESHOLD_TYPE__) == LL_ADC_AWD_THRESHOLD_LOW) \
AnnaBridge	171:3a7713b1edbc	1122	? ( \
AnnaBridge	171:3a7713b1edbc	1123	(__AWD_THRESHOLDS__) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	171:3a7713b1edbc	1124	) \
AnnaBridge	171:3a7713b1edbc	1125	: \
AnnaBridge	171:3a7713b1edbc	1126	( \
AnnaBridge	171:3a7713b1edbc	1127	((__AWD_THRESHOLDS__) >> ADC_TR_HT_BITOFFSET_POS) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	171:3a7713b1edbc	1128	) \
AnnaBridge	171:3a7713b1edbc	1129	)
AnnaBridge	171:3a7713b1edbc	1130
AnnaBridge	171:3a7713b1edbc	1131	/**
AnnaBridge	171:3a7713b1edbc	1132	* @brief Helper macro to select the ADC common instance
AnnaBridge	171:3a7713b1edbc	1133	* to which is belonging the selected ADC instance.
AnnaBridge	171:3a7713b1edbc	1134	* @note ADC common register instance can be used for:
AnnaBridge	171:3a7713b1edbc	1135	* - Set parameters common to several ADC instances
AnnaBridge	171:3a7713b1edbc	1136	* - Multimode (for devices with several ADC instances)
AnnaBridge	171:3a7713b1edbc	1137	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	171:3a7713b1edbc	1138	* @param __ADCx__ ADC instance
AnnaBridge	171:3a7713b1edbc	1139	* @retval ADC common register instance
AnnaBridge	171:3a7713b1edbc	1140	*/
AnnaBridge	171:3a7713b1edbc	1141	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	171:3a7713b1edbc	1142	(ADC1_COMMON)
AnnaBridge	171:3a7713b1edbc	1143
AnnaBridge	171:3a7713b1edbc	1144	/**
AnnaBridge	171:3a7713b1edbc	1145	* @brief Helper macro to check if all ADC instances sharing the same
AnnaBridge	171:3a7713b1edbc	1146	* ADC common instance are disabled.
AnnaBridge	171:3a7713b1edbc	1147	* @note This check is required by functions with setting conditioned to
AnnaBridge	171:3a7713b1edbc	1148	* ADC state:
AnnaBridge	171:3a7713b1edbc	1149	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	171:3a7713b1edbc	1150	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	171:3a7713b1edbc	1151	* @note On devices with only 1 ADC common instance, parameter of this macro
AnnaBridge	171:3a7713b1edbc	1152	* is useless and can be ignored (parameter kept for compatibility
AnnaBridge	171:3a7713b1edbc	1153	* with devices featuring several ADC common instances).
AnnaBridge	171:3a7713b1edbc	1154	* @param __ADCXY_COMMON__ ADC common instance
AnnaBridge	171:3a7713b1edbc	1155	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	171:3a7713b1edbc	1156	* @retval Value "0" if all ADC instances sharing the same ADC common instance
AnnaBridge	171:3a7713b1edbc	1157	* are disabled.
AnnaBridge	171:3a7713b1edbc	1158	* Value "1" if at least one ADC instance sharing the same ADC common instance
AnnaBridge	171:3a7713b1edbc	1159	* is enabled.
AnnaBridge	171:3a7713b1edbc	1160	*/
AnnaBridge	171:3a7713b1edbc	1161	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	171:3a7713b1edbc	1162	LL_ADC_IsEnabled(ADC1)
AnnaBridge	171:3a7713b1edbc	1163
AnnaBridge	171:3a7713b1edbc	1164	/**
AnnaBridge	171:3a7713b1edbc	1165	* @brief Helper macro to define the ADC conversion data full-scale digital
AnnaBridge	171:3a7713b1edbc	1166	* value corresponding to the selected ADC resolution.
AnnaBridge	171:3a7713b1edbc	1167	* @note ADC conversion data full-scale corresponds to voltage range
AnnaBridge	171:3a7713b1edbc	1168	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	171:3a7713b1edbc	1169	* (refer to reference manual).
AnnaBridge	171:3a7713b1edbc	1170	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1171	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1172	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1173	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1174	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1175	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	171:3a7713b1edbc	1176	*/
AnnaBridge	171:3a7713b1edbc	1177	#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	171:3a7713b1edbc	1178	(0xFFFU >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))
AnnaBridge	171:3a7713b1edbc	1179
AnnaBridge	171:3a7713b1edbc	1180	/**
AnnaBridge	171:3a7713b1edbc	1181	* @brief Helper macro to convert the ADC conversion data from
AnnaBridge	171:3a7713b1edbc	1182	* a resolution to another resolution.
AnnaBridge	171:3a7713b1edbc	1183	* @param __DATA__ ADC conversion data to be converted
AnnaBridge	171:3a7713b1edbc	1184	* @param __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
AnnaBridge	171:3a7713b1edbc	1185	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1186	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1187	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1188	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1189	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1190	* @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
AnnaBridge	171:3a7713b1edbc	1191	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1192	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1193	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1194	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1195	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1196	* @retval ADC conversion data to the requested resolution
AnnaBridge	171:3a7713b1edbc	1197	*/
AnnaBridge	171:3a7713b1edbc	1198	#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__, __ADC_RESOLUTION_CURRENT__, __ADC_RESOLUTION_TARGET__) \
AnnaBridge	171:3a7713b1edbc	1199	(((__DATA__) \
AnnaBridge	171:3a7713b1edbc	1200	<< ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U))) \
AnnaBridge	171:3a7713b1edbc	1201	>> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)) \
AnnaBridge	171:3a7713b1edbc	1202	)
AnnaBridge	171:3a7713b1edbc	1203
AnnaBridge	171:3a7713b1edbc	1204	/**
AnnaBridge	171:3a7713b1edbc	1205	* @brief Helper macro to calculate the voltage (unit: mVolt)
AnnaBridge	171:3a7713b1edbc	1206	* corresponding to a ADC conversion data (unit: digital value).
AnnaBridge	171:3a7713b1edbc	1207	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	171:3a7713b1edbc	1208	* user board environment or can be calculated using ADC measurement
AnnaBridge	171:3a7713b1edbc	1209	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	171:3a7713b1edbc	1210	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	171:3a7713b1edbc	1211	* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	171:3a7713b1edbc	1212	* (unit: digital value).
AnnaBridge	171:3a7713b1edbc	1213	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1214	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1215	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1216	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1217	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1218	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	171:3a7713b1edbc	1219	*/
AnnaBridge	171:3a7713b1edbc	1220	#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	171:3a7713b1edbc	1221	__ADC_DATA__,\
AnnaBridge	171:3a7713b1edbc	1222	__ADC_RESOLUTION__) \
AnnaBridge	171:3a7713b1edbc	1223	((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
AnnaBridge	171:3a7713b1edbc	1224	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	171:3a7713b1edbc	1225	)
AnnaBridge	171:3a7713b1edbc	1226
AnnaBridge	171:3a7713b1edbc	1227	/**
AnnaBridge	171:3a7713b1edbc	1228	* @brief Helper macro to calculate analog reference voltage (Vref+)
AnnaBridge	171:3a7713b1edbc	1229	* (unit: mVolt) from ADC conversion data of internal voltage
AnnaBridge	171:3a7713b1edbc	1230	* reference VrefInt.
AnnaBridge	171:3a7713b1edbc	1231	* @note Computation is using VrefInt calibration value
AnnaBridge	171:3a7713b1edbc	1232	* stored in system memory for each device during production.
AnnaBridge	171:3a7713b1edbc	1233	* @note This voltage depends on user board environment: voltage level
AnnaBridge	171:3a7713b1edbc	1234	* connected to pin Vref+.
AnnaBridge	171:3a7713b1edbc	1235	* On devices with small package, the pin Vref+ is not present
AnnaBridge	171:3a7713b1edbc	1236	* and internally bonded to pin Vdda.
AnnaBridge	171:3a7713b1edbc	1237	* @note On this STM32 serie, calibration data of internal voltage reference
AnnaBridge	171:3a7713b1edbc	1238	* VrefInt corresponds to a resolution of 12 bits,
AnnaBridge	171:3a7713b1edbc	1239	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	171:3a7713b1edbc	1240	* internal voltage reference VrefInt.
AnnaBridge	171:3a7713b1edbc	1241	* Otherwise, this macro performs the processing to scale
AnnaBridge	171:3a7713b1edbc	1242	* ADC conversion data to 12 bits.
AnnaBridge	171:3a7713b1edbc	1243	* @param __VREFINT_ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	171:3a7713b1edbc	1244	* of internal voltage reference VrefInt (unit: digital value).
AnnaBridge	171:3a7713b1edbc	1245	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1246	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1247	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1248	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1249	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1250	* @retval Analog reference voltage (unit: mV)
AnnaBridge	171:3a7713b1edbc	1251	*/
AnnaBridge	171:3a7713b1edbc	1252	#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
AnnaBridge	171:3a7713b1edbc	1253	__ADC_RESOLUTION__) \
AnnaBridge	171:3a7713b1edbc	1254	(((uint32_t)(VREFINT_CAL_ADDR) VREFINT_CAL_VREF) \
AnnaBridge	171:3a7713b1edbc	1255	/ __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
AnnaBridge	171:3a7713b1edbc	1256	(__ADC_RESOLUTION__), \
AnnaBridge	171:3a7713b1edbc	1257	LL_ADC_RESOLUTION_12B) \
AnnaBridge	171:3a7713b1edbc	1258	)
AnnaBridge	171:3a7713b1edbc	1259
AnnaBridge	171:3a7713b1edbc	1260	/**
AnnaBridge	171:3a7713b1edbc	1261	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	171:3a7713b1edbc	1262	* from ADC conversion data of internal temperature sensor.
AnnaBridge	171:3a7713b1edbc	1263	* @note Computation is using temperature sensor calibration values
AnnaBridge	171:3a7713b1edbc	1264	* stored in system memory for each device during production.
AnnaBridge	171:3a7713b1edbc	1265	* @note Calculation formula:
AnnaBridge	171:3a7713b1edbc	1266	* Temperature = ((TS_ADC_DATA - TS_CAL1)
AnnaBridge	171:3a7713b1edbc	1267	* * (TS_CAL2_TEMP - TS_CAL1_TEMP))
AnnaBridge	171:3a7713b1edbc	1268	* / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
AnnaBridge	171:3a7713b1edbc	1269	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	171:3a7713b1edbc	1270	* Avg_Slope = (TS_CAL2 - TS_CAL1)
AnnaBridge	171:3a7713b1edbc	1271	* / (TS_CAL2_TEMP - TS_CAL1_TEMP)
AnnaBridge	171:3a7713b1edbc	1272	* TS_CAL1 = equivalent TS_ADC_DATA at temperature
AnnaBridge	171:3a7713b1edbc	1273	* TEMP_DEGC_CAL1 (calibrated in factory)
AnnaBridge	171:3a7713b1edbc	1274	* TS_CAL2 = equivalent TS_ADC_DATA at temperature
AnnaBridge	171:3a7713b1edbc	1275	* TEMP_DEGC_CAL2 (calibrated in factory)
AnnaBridge	171:3a7713b1edbc	1276	* Caution: Calculation relevancy under reserve that calibration
AnnaBridge	171:3a7713b1edbc	1277	* parameters are correct (address and data).
AnnaBridge	171:3a7713b1edbc	1278	* To calculate temperature using temperature sensor
AnnaBridge	171:3a7713b1edbc	1279	* datasheet typical values (generic values less, therefore
AnnaBridge	171:3a7713b1edbc	1280	* less accurate than calibrated values),
AnnaBridge	171:3a7713b1edbc	1281	* use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
AnnaBridge	171:3a7713b1edbc	1282	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	171:3a7713b1edbc	1283	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	171:3a7713b1edbc	1284	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	171:3a7713b1edbc	1285	* user board environment or can be calculated using ADC measurement
AnnaBridge	171:3a7713b1edbc	1286	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	171:3a7713b1edbc	1287	* @note On this STM32 serie, calibration data of temperature sensor
AnnaBridge	171:3a7713b1edbc	1288	* corresponds to a resolution of 12 bits,
AnnaBridge	171:3a7713b1edbc	1289	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	171:3a7713b1edbc	1290	* temperature sensor.
AnnaBridge	171:3a7713b1edbc	1291	* Otherwise, this macro performs the processing to scale
AnnaBridge	171:3a7713b1edbc	1292	* ADC conversion data to 12 bits.
AnnaBridge	171:3a7713b1edbc	1293	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	171:3a7713b1edbc	1294	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
AnnaBridge	171:3a7713b1edbc	1295	* temperature sensor (unit: digital value).
AnnaBridge	171:3a7713b1edbc	1296	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
AnnaBridge	171:3a7713b1edbc	1297	* sensor voltage has been measured.
AnnaBridge	171:3a7713b1edbc	1298	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1299	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1300	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1301	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1302	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1303	* @retval Temperature (unit: degree Celsius)
AnnaBridge	171:3a7713b1edbc	1304	*/
AnnaBridge	171:3a7713b1edbc	1305	#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	171:3a7713b1edbc	1306	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	171:3a7713b1edbc	1307	__ADC_RESOLUTION__) \
AnnaBridge	171:3a7713b1edbc	1308	(((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
AnnaBridge	171:3a7713b1edbc	1309	(__ADC_RESOLUTION__), \
AnnaBridge	171:3a7713b1edbc	1310	LL_ADC_RESOLUTION_12B) \
AnnaBridge	171:3a7713b1edbc	1311	* (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	171:3a7713b1edbc	1312	/ TEMPSENSOR_CAL_VREFANALOG) \
AnnaBridge	171:3a7713b1edbc	1313	- (int32_t) *TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	171:3a7713b1edbc	1314	) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
AnnaBridge	171:3a7713b1edbc	1315	) / (int32_t)((int32_t)TEMPSENSOR_CAL2_ADDR - (int32_t)TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	171:3a7713b1edbc	1316	) + TEMPSENSOR_CAL1_TEMP \
AnnaBridge	171:3a7713b1edbc	1317	)
AnnaBridge	171:3a7713b1edbc	1318
AnnaBridge	171:3a7713b1edbc	1319	/**
AnnaBridge	171:3a7713b1edbc	1320	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	171:3a7713b1edbc	1321	* from ADC conversion data of internal temperature sensor.
AnnaBridge	171:3a7713b1edbc	1322	* @note Computation is using temperature sensor typical values
AnnaBridge	171:3a7713b1edbc	1323	* (refer to device datasheet).
AnnaBridge	171:3a7713b1edbc	1324	* @note Calculation formula:
AnnaBridge	171:3a7713b1edbc	1325	* Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
AnnaBridge	171:3a7713b1edbc	1326	* / Avg_Slope + CALx_TEMP
AnnaBridge	171:3a7713b1edbc	1327	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	171:3a7713b1edbc	1328	* (unit: digital value)
AnnaBridge	171:3a7713b1edbc	1329	* Avg_Slope = temperature sensor slope
AnnaBridge	171:3a7713b1edbc	1330	* (unit: uV/Degree Celsius)
AnnaBridge	171:3a7713b1edbc	1331	* TS_TYP_CALx_VOLT = temperature sensor digital value at
AnnaBridge	171:3a7713b1edbc	1332	* temperature CALx_TEMP (unit: mV)
AnnaBridge	171:3a7713b1edbc	1333	* Caution: Calculation relevancy under reserve the temperature sensor
AnnaBridge	171:3a7713b1edbc	1334	* of the current device has characteristics in line with
AnnaBridge	171:3a7713b1edbc	1335	* datasheet typical values.
AnnaBridge	171:3a7713b1edbc	1336	* If temperature sensor calibration values are available on
AnnaBridge	171:3a7713b1edbc	1337	* on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
AnnaBridge	171:3a7713b1edbc	1338	* temperature calculation will be more accurate using
AnnaBridge	171:3a7713b1edbc	1339	* helper macro @ref __LL_ADC_CALC_TEMPERATURE().
AnnaBridge	171:3a7713b1edbc	1340	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	171:3a7713b1edbc	1341	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	171:3a7713b1edbc	1342	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	171:3a7713b1edbc	1343	* user board environment or can be calculated using ADC measurement
AnnaBridge	171:3a7713b1edbc	1344	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	171:3a7713b1edbc	1345	* @note ADC measurement data must correspond to a resolution of 12bits
AnnaBridge	171:3a7713b1edbc	1346	* (full scale digital value 4095). If not the case, the data must be
AnnaBridge	171:3a7713b1edbc	1347	* preliminarily rescaled to an equivalent resolution of 12 bits.
AnnaBridge	171:3a7713b1edbc	1348	* @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
AnnaBridge	171:3a7713b1edbc	1349	* On STM32F0, refer to device datasheet parameter "Avg_Slope".
AnnaBridge	171:3a7713b1edbc	1350	* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
AnnaBridge	171:3a7713b1edbc	1351	* On STM32F0, refer to device datasheet parameter "V30" (corresponding to TS_CAL1).
AnnaBridge	171:3a7713b1edbc	1352	* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
AnnaBridge	171:3a7713b1edbc	1353	* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
AnnaBridge	171:3a7713b1edbc	1354	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
AnnaBridge	171:3a7713b1edbc	1355	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
AnnaBridge	171:3a7713b1edbc	1356	* This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1357	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1358	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1359	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1360	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1361	* @retval Temperature (unit: degree Celsius)
AnnaBridge	171:3a7713b1edbc	1362	*/
AnnaBridge	171:3a7713b1edbc	1363	#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
AnnaBridge	171:3a7713b1edbc	1364	__TEMPSENSOR_TYP_CALX_V__,\
AnnaBridge	171:3a7713b1edbc	1365	__TEMPSENSOR_CALX_TEMP__,\
AnnaBridge	171:3a7713b1edbc	1366	__VREFANALOG_VOLTAGE__,\
AnnaBridge	171:3a7713b1edbc	1367	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	171:3a7713b1edbc	1368	__ADC_RESOLUTION__) \
AnnaBridge	171:3a7713b1edbc	1369	((( ( \
AnnaBridge	171:3a7713b1edbc	1370	(int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
AnnaBridge	171:3a7713b1edbc	1371	* 1000) \
AnnaBridge	171:3a7713b1edbc	1372	- \
AnnaBridge	171:3a7713b1edbc	1373	(int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	171:3a7713b1edbc	1374	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
AnnaBridge	171:3a7713b1edbc	1375	* 1000) \
AnnaBridge	171:3a7713b1edbc	1376	) \
AnnaBridge	171:3a7713b1edbc	1377	) / (__TEMPSENSOR_TYP_AVGSLOPE__) \
AnnaBridge	171:3a7713b1edbc	1378	) + (__TEMPSENSOR_CALX_TEMP__) \
AnnaBridge	171:3a7713b1edbc	1379	)
AnnaBridge	171:3a7713b1edbc	1380
AnnaBridge	171:3a7713b1edbc	1381	/**
AnnaBridge	171:3a7713b1edbc	1382	* @}
AnnaBridge	171:3a7713b1edbc	1383	*/
AnnaBridge	171:3a7713b1edbc	1384
AnnaBridge	171:3a7713b1edbc	1385	/**
AnnaBridge	171:3a7713b1edbc	1386	* @}
AnnaBridge	171:3a7713b1edbc	1387	*/
AnnaBridge	171:3a7713b1edbc	1388
AnnaBridge	171:3a7713b1edbc	1389
AnnaBridge	171:3a7713b1edbc	1390	/* Exported functions --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	1391	/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
AnnaBridge	171:3a7713b1edbc	1392	* @{
AnnaBridge	171:3a7713b1edbc	1393	*/
AnnaBridge	171:3a7713b1edbc	1394
AnnaBridge	171:3a7713b1edbc	1395	/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
AnnaBridge	171:3a7713b1edbc	1396	* @{
AnnaBridge	171:3a7713b1edbc	1397	*/
AnnaBridge	171:3a7713b1edbc	1398	/* Note: LL ADC functions to set DMA transfer are located into sections of */
AnnaBridge	171:3a7713b1edbc	1399	/* configuration of ADC instance, groups and multimode (if available): */
AnnaBridge	171:3a7713b1edbc	1400	/* @ref LL_ADC_REG_SetDMATransfer(), ... */
AnnaBridge	171:3a7713b1edbc	1401
AnnaBridge	171:3a7713b1edbc	1402	/**
AnnaBridge	171:3a7713b1edbc	1403	* @brief Function to help to configure DMA transfer from ADC: retrieve the
AnnaBridge	171:3a7713b1edbc	1404	* ADC register address from ADC instance and a list of ADC registers
AnnaBridge	171:3a7713b1edbc	1405	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	171:3a7713b1edbc	1406	* @note These ADC registers are data registers:
AnnaBridge	171:3a7713b1edbc	1407	* when ADC conversion data is available in ADC data registers,
AnnaBridge	171:3a7713b1edbc	1408	* ADC generates a DMA transfer request.
AnnaBridge	171:3a7713b1edbc	1409	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	171:3a7713b1edbc	1410	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	171:3a7713b1edbc	1411	* Example:
AnnaBridge	171:3a7713b1edbc	1412	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	171:3a7713b1edbc	1413	* LL_DMA_CHANNEL_1,
AnnaBridge	171:3a7713b1edbc	1414	* LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
AnnaBridge	171:3a7713b1edbc	1415	* (uint32_t)&< array or variable >,
AnnaBridge	171:3a7713b1edbc	1416	* LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
AnnaBridge	171:3a7713b1edbc	1417	* @note For devices with several ADC: in multimode, some devices
AnnaBridge	171:3a7713b1edbc	1418	* use a different data register outside of ADC instance scope
AnnaBridge	171:3a7713b1edbc	1419	* (common data register). This macro manages this register difference,
AnnaBridge	171:3a7713b1edbc	1420	* only ADC instance has to be set as parameter.
AnnaBridge	171:3a7713b1edbc	1421	* @rmtoll DR DATA LL_ADC_DMA_GetRegAddr
AnnaBridge	171:3a7713b1edbc	1422	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1423	* @param Register This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1424	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
AnnaBridge	171:3a7713b1edbc	1425	* @retval ADC register address
AnnaBridge	171:3a7713b1edbc	1426	*/
AnnaBridge	171:3a7713b1edbc	1427	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
AnnaBridge	171:3a7713b1edbc	1428	{
AnnaBridge	171:3a7713b1edbc	1429	/* Retrieve address of register DR */
AnnaBridge	171:3a7713b1edbc	1430	return (uint32_t)&(ADCx->DR);
AnnaBridge	171:3a7713b1edbc	1431	}
AnnaBridge	171:3a7713b1edbc	1432
AnnaBridge	171:3a7713b1edbc	1433	/**
AnnaBridge	171:3a7713b1edbc	1434	* @}
AnnaBridge	171:3a7713b1edbc	1435	*/
AnnaBridge	171:3a7713b1edbc	1436
AnnaBridge	171:3a7713b1edbc	1437	/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
AnnaBridge	171:3a7713b1edbc	1438	* @{
AnnaBridge	171:3a7713b1edbc	1439	*/
AnnaBridge	171:3a7713b1edbc	1440
AnnaBridge	171:3a7713b1edbc	1441	/**
AnnaBridge	171:3a7713b1edbc	1442	* @brief Set parameter common to several ADC: measurement path to internal
AnnaBridge	171:3a7713b1edbc	1443	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	171:3a7713b1edbc	1444	* @note One or several values can be selected.
AnnaBridge	171:3a7713b1edbc	1445	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	171:3a7713b1edbc	1446	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	171:3a7713b1edbc	1447	* @note Stabilization time of measurement path to internal channel:
AnnaBridge	171:3a7713b1edbc	1448	* After enabling internal paths, before starting ADC conversion,
AnnaBridge	171:3a7713b1edbc	1449	* a delay is required for internal voltage reference and
AnnaBridge	171:3a7713b1edbc	1450	* temperature sensor stabilization time.
AnnaBridge	171:3a7713b1edbc	1451	* Refer to device datasheet.
AnnaBridge	171:3a7713b1edbc	1452	* Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
AnnaBridge	171:3a7713b1edbc	1453	* Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
AnnaBridge	171:3a7713b1edbc	1454	* @note ADC internal channel sampling time constraint:
AnnaBridge	171:3a7713b1edbc	1455	* For ADC conversion of internal channels,
AnnaBridge	171:3a7713b1edbc	1456	* a sampling time minimum value is required.
AnnaBridge	171:3a7713b1edbc	1457	* Refer to device datasheet.
AnnaBridge	171:3a7713b1edbc	1458	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1459	* ADC state:
AnnaBridge	171:3a7713b1edbc	1460	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	171:3a7713b1edbc	1461	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	171:3a7713b1edbc	1462	* ADC instance or by using helper macro helper macro
AnnaBridge	171:3a7713b1edbc	1463	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	171:3a7713b1edbc	1464	* @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	171:3a7713b1edbc	1465	* CCR TSEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	171:3a7713b1edbc	1466	* CCR VBATEN LL_ADC_SetCommonPathInternalCh
AnnaBridge	171:3a7713b1edbc	1467	* @param ADCxy_COMMON ADC common instance
AnnaBridge	171:3a7713b1edbc	1468	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	171:3a7713b1edbc	1469	* @param PathInternal This parameter can be a combination of the following values:
AnnaBridge	171:3a7713b1edbc	1470	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	171:3a7713b1edbc	1471	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	171:3a7713b1edbc	1472	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	1473	* @arg @ref LL_ADC_PATH_INTERNAL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	1474	*
AnnaBridge	171:3a7713b1edbc	1475	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	1476	* @retval None
AnnaBridge	171:3a7713b1edbc	1477	*/
AnnaBridge	171:3a7713b1edbc	1478	__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
AnnaBridge	171:3a7713b1edbc	1479	{
AnnaBridge	171:3a7713b1edbc	1480	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	1481	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VBATEN, PathInternal);
AnnaBridge	171:3a7713b1edbc	1482	#else
AnnaBridge	171:3a7713b1edbc	1483	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN, PathInternal);
AnnaBridge	171:3a7713b1edbc	1484	#endif
AnnaBridge	171:3a7713b1edbc	1485	}
AnnaBridge	171:3a7713b1edbc	1486
AnnaBridge	171:3a7713b1edbc	1487	/**
AnnaBridge	171:3a7713b1edbc	1488	* @brief Get parameter common to several ADC: measurement path to internal
AnnaBridge	171:3a7713b1edbc	1489	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	171:3a7713b1edbc	1490	* @note One or several values can be selected.
AnnaBridge	171:3a7713b1edbc	1491	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	171:3a7713b1edbc	1492	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	171:3a7713b1edbc	1493	* @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	171:3a7713b1edbc	1494	* CCR TSEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	171:3a7713b1edbc	1495	* CCR VBATEN LL_ADC_GetCommonPathInternalCh
AnnaBridge	171:3a7713b1edbc	1496	* @param ADCxy_COMMON ADC common instance
AnnaBridge	171:3a7713b1edbc	1497	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	171:3a7713b1edbc	1498	* @retval Returned value can be a combination of the following values:
AnnaBridge	171:3a7713b1edbc	1499	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	171:3a7713b1edbc	1500	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	171:3a7713b1edbc	1501	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	1502	* @arg @ref LL_ADC_PATH_INTERNAL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	1503	*
AnnaBridge	171:3a7713b1edbc	1504	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	1505	*/
AnnaBridge	171:3a7713b1edbc	1506	__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	171:3a7713b1edbc	1507	{
AnnaBridge	171:3a7713b1edbc	1508	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	1509	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VBATEN));
AnnaBridge	171:3a7713b1edbc	1510	#else
AnnaBridge	171:3a7713b1edbc	1511	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN));
AnnaBridge	171:3a7713b1edbc	1512	#endif
AnnaBridge	171:3a7713b1edbc	1513	}
AnnaBridge	171:3a7713b1edbc	1514
AnnaBridge	171:3a7713b1edbc	1515	/**
AnnaBridge	171:3a7713b1edbc	1516	* @}
AnnaBridge	171:3a7713b1edbc	1517	*/
AnnaBridge	171:3a7713b1edbc	1518
AnnaBridge	171:3a7713b1edbc	1519	/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
AnnaBridge	171:3a7713b1edbc	1520	* @{
AnnaBridge	171:3a7713b1edbc	1521	*/
AnnaBridge	171:3a7713b1edbc	1522
AnnaBridge	171:3a7713b1edbc	1523	/**
AnnaBridge	171:3a7713b1edbc	1524	* @brief Set ADC instance clock source and prescaler.
AnnaBridge	171:3a7713b1edbc	1525	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1526	* ADC state:
AnnaBridge	171:3a7713b1edbc	1527	* ADC must be disabled.
AnnaBridge	171:3a7713b1edbc	1528	* @rmtoll CFGR2 CKMODE LL_ADC_SetClock
AnnaBridge	171:3a7713b1edbc	1529	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1530	* @param ClockSource This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1531	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	171:3a7713b1edbc	1532	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	171:3a7713b1edbc	1533	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	171:3a7713b1edbc	1534	*
AnnaBridge	171:3a7713b1edbc	1535	* (1) On this STM32 serie, synchronous clock has no prescaler.
AnnaBridge	171:3a7713b1edbc	1536	* @retval None
AnnaBridge	171:3a7713b1edbc	1537	*/
AnnaBridge	171:3a7713b1edbc	1538	__STATIC_INLINE void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
AnnaBridge	171:3a7713b1edbc	1539	{
AnnaBridge	171:3a7713b1edbc	1540	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource);
AnnaBridge	171:3a7713b1edbc	1541	}
AnnaBridge	171:3a7713b1edbc	1542
AnnaBridge	171:3a7713b1edbc	1543	/**
AnnaBridge	171:3a7713b1edbc	1544	* @brief Get ADC instance clock source and prescaler.
AnnaBridge	171:3a7713b1edbc	1545	* @rmtoll CFGR2 CKMODE LL_ADC_GetClock
AnnaBridge	171:3a7713b1edbc	1546	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1547	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1548	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	171:3a7713b1edbc	1549	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	171:3a7713b1edbc	1550	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	171:3a7713b1edbc	1551	*
AnnaBridge	171:3a7713b1edbc	1552	* (1) On this STM32 serie, synchronous clock has no prescaler.
AnnaBridge	171:3a7713b1edbc	1553	*/
AnnaBridge	171:3a7713b1edbc	1554	__STATIC_INLINE uint32_t LL_ADC_GetClock(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1555	{
AnnaBridge	171:3a7713b1edbc	1556	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE));
AnnaBridge	171:3a7713b1edbc	1557	}
AnnaBridge	171:3a7713b1edbc	1558
AnnaBridge	171:3a7713b1edbc	1559	/**
AnnaBridge	171:3a7713b1edbc	1560	* @brief Set ADC resolution.
AnnaBridge	171:3a7713b1edbc	1561	* Refer to reference manual for alignments formats
AnnaBridge	171:3a7713b1edbc	1562	* dependencies to ADC resolutions.
AnnaBridge	171:3a7713b1edbc	1563	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1564	* ADC state:
AnnaBridge	171:3a7713b1edbc	1565	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1566	* on group regular.
AnnaBridge	171:3a7713b1edbc	1567	* @rmtoll CFGR1 RES LL_ADC_SetResolution
AnnaBridge	171:3a7713b1edbc	1568	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1569	* @param Resolution This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1570	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1571	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1572	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1573	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1574	* @retval None
AnnaBridge	171:3a7713b1edbc	1575	*/
AnnaBridge	171:3a7713b1edbc	1576	__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
AnnaBridge	171:3a7713b1edbc	1577	{
AnnaBridge	171:3a7713b1edbc	1578	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);
AnnaBridge	171:3a7713b1edbc	1579	}
AnnaBridge	171:3a7713b1edbc	1580
AnnaBridge	171:3a7713b1edbc	1581	/**
AnnaBridge	171:3a7713b1edbc	1582	* @brief Get ADC resolution.
AnnaBridge	171:3a7713b1edbc	1583	* Refer to reference manual for alignments formats
AnnaBridge	171:3a7713b1edbc	1584	* dependencies to ADC resolutions.
AnnaBridge	171:3a7713b1edbc	1585	* @rmtoll CFGR1 RES LL_ADC_GetResolution
AnnaBridge	171:3a7713b1edbc	1586	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1587	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1588	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	171:3a7713b1edbc	1589	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	171:3a7713b1edbc	1590	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	171:3a7713b1edbc	1591	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	171:3a7713b1edbc	1592	*/
AnnaBridge	171:3a7713b1edbc	1593	__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1594	{
AnnaBridge	171:3a7713b1edbc	1595	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));
AnnaBridge	171:3a7713b1edbc	1596	}
AnnaBridge	171:3a7713b1edbc	1597
AnnaBridge	171:3a7713b1edbc	1598	/**
AnnaBridge	171:3a7713b1edbc	1599	* @brief Set ADC conversion data alignment.
AnnaBridge	171:3a7713b1edbc	1600	* @note Refer to reference manual for alignments formats
AnnaBridge	171:3a7713b1edbc	1601	* dependencies to ADC resolutions.
AnnaBridge	171:3a7713b1edbc	1602	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1603	* ADC state:
AnnaBridge	171:3a7713b1edbc	1604	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1605	* on group regular.
AnnaBridge	171:3a7713b1edbc	1606	* @rmtoll CFGR1 ALIGN LL_ADC_SetDataAlignment
AnnaBridge	171:3a7713b1edbc	1607	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1608	* @param DataAlignment This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1609	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	171:3a7713b1edbc	1610	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	171:3a7713b1edbc	1611	* @retval None
AnnaBridge	171:3a7713b1edbc	1612	*/
AnnaBridge	171:3a7713b1edbc	1613	__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
AnnaBridge	171:3a7713b1edbc	1614	{
AnnaBridge	171:3a7713b1edbc	1615	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);
AnnaBridge	171:3a7713b1edbc	1616	}
AnnaBridge	171:3a7713b1edbc	1617
AnnaBridge	171:3a7713b1edbc	1618	/**
AnnaBridge	171:3a7713b1edbc	1619	* @brief Get ADC conversion data alignment.
AnnaBridge	171:3a7713b1edbc	1620	* @note Refer to reference manual for alignments formats
AnnaBridge	171:3a7713b1edbc	1621	* dependencies to ADC resolutions.
AnnaBridge	171:3a7713b1edbc	1622	* @rmtoll CFGR1 ALIGN LL_ADC_GetDataAlignment
AnnaBridge	171:3a7713b1edbc	1623	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1624	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1625	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	171:3a7713b1edbc	1626	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	171:3a7713b1edbc	1627	*/
AnnaBridge	171:3a7713b1edbc	1628	__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1629	{
AnnaBridge	171:3a7713b1edbc	1630	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));
AnnaBridge	171:3a7713b1edbc	1631	}
AnnaBridge	171:3a7713b1edbc	1632
AnnaBridge	171:3a7713b1edbc	1633	/**
AnnaBridge	171:3a7713b1edbc	1634	* @brief Set ADC low power mode.
AnnaBridge	171:3a7713b1edbc	1635	* @note Description of ADC low power modes:
AnnaBridge	171:3a7713b1edbc	1636	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	171:3a7713b1edbc	1637	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	171:3a7713b1edbc	1638	* in order to reduce power consumption.
AnnaBridge	171:3a7713b1edbc	1639	* New ADC conversion starts only when the previous
AnnaBridge	171:3a7713b1edbc	1640	* unitary conversion data (for ADC group regular)
AnnaBridge	171:3a7713b1edbc	1641	* has been retrieved by user software.
AnnaBridge	171:3a7713b1edbc	1642	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	171:3a7713b1edbc	1643	* other conversion.
AnnaBridge	171:3a7713b1edbc	1644	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	171:3a7713b1edbc	1645	* triggers to the speed of the software that reads the data.
AnnaBridge	171:3a7713b1edbc	1646	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	171:3a7713b1edbc	1647	* applications.
AnnaBridge	171:3a7713b1edbc	1648	* How to use this low power mode:
AnnaBridge	171:3a7713b1edbc	1649	* - Do not use with interruption or DMA since these modes
AnnaBridge	171:3a7713b1edbc	1650	* have to clear immediately the EOC flag to free the
AnnaBridge	171:3a7713b1edbc	1651	* IRQ vector sequencer.
AnnaBridge	171:3a7713b1edbc	1652	* - Do use with polling: 1. Start conversion,
AnnaBridge	171:3a7713b1edbc	1653	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	171:3a7713b1edbc	1654	* conversion to ensure that conversion is completed and
AnnaBridge	171:3a7713b1edbc	1655	* retrieve ADC conversion data. This will trig another
AnnaBridge	171:3a7713b1edbc	1656	* ADC conversion start.
AnnaBridge	171:3a7713b1edbc	1657	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	171:3a7713b1edbc	1658	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	171:3a7713b1edbc	1659	* the ADC automatically powers-off after a conversion and
AnnaBridge	171:3a7713b1edbc	1660	* automatically wakes up when a new conversion is triggered
AnnaBridge	171:3a7713b1edbc	1661	* (with startup time between trigger and start of sampling).
AnnaBridge	171:3a7713b1edbc	1662	* This feature can be combined with low power mode "auto wait".
AnnaBridge	171:3a7713b1edbc	1663	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	171:3a7713b1edbc	1664	* is corresponding to previous ADC conversion start, independently
AnnaBridge	171:3a7713b1edbc	1665	* of delay during which ADC was idle.
AnnaBridge	171:3a7713b1edbc	1666	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	171:3a7713b1edbc	1667	* correspond to the current voltage level on the selected
AnnaBridge	171:3a7713b1edbc	1668	* ADC channel.
AnnaBridge	171:3a7713b1edbc	1669	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1670	* ADC state:
AnnaBridge	171:3a7713b1edbc	1671	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1672	* on group regular.
AnnaBridge	171:3a7713b1edbc	1673	* @rmtoll CFGR1 WAIT LL_ADC_SetLowPowerMode\n
AnnaBridge	171:3a7713b1edbc	1674	* CFGR1 AUTOFF LL_ADC_SetLowPowerMode
AnnaBridge	171:3a7713b1edbc	1675	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1676	* @param LowPowerMode This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1677	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	171:3a7713b1edbc	1678	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	171:3a7713b1edbc	1679	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	171:3a7713b1edbc	1680	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	171:3a7713b1edbc	1681	* @retval None
AnnaBridge	171:3a7713b1edbc	1682	*/
AnnaBridge	171:3a7713b1edbc	1683	__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
AnnaBridge	171:3a7713b1edbc	1684	{
AnnaBridge	171:3a7713b1edbc	1685	MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF), LowPowerMode);
AnnaBridge	171:3a7713b1edbc	1686	}
AnnaBridge	171:3a7713b1edbc	1687
AnnaBridge	171:3a7713b1edbc	1688	/**
AnnaBridge	171:3a7713b1edbc	1689	* @brief Get ADC low power mode:
AnnaBridge	171:3a7713b1edbc	1690	* @note Description of ADC low power modes:
AnnaBridge	171:3a7713b1edbc	1691	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	171:3a7713b1edbc	1692	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	171:3a7713b1edbc	1693	* in order to reduce power consumption.
AnnaBridge	171:3a7713b1edbc	1694	* New ADC conversion starts only when the previous
AnnaBridge	171:3a7713b1edbc	1695	* unitary conversion data (for ADC group regular)
AnnaBridge	171:3a7713b1edbc	1696	* has been retrieved by user software.
AnnaBridge	171:3a7713b1edbc	1697	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	171:3a7713b1edbc	1698	* other conversion.
AnnaBridge	171:3a7713b1edbc	1699	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	171:3a7713b1edbc	1700	* triggers to the speed of the software that reads the data.
AnnaBridge	171:3a7713b1edbc	1701	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	171:3a7713b1edbc	1702	* applications.
AnnaBridge	171:3a7713b1edbc	1703	* How to use this low power mode:
AnnaBridge	171:3a7713b1edbc	1704	* - Do not use with interruption or DMA since these modes
AnnaBridge	171:3a7713b1edbc	1705	* have to clear immediately the EOC flag to free the
AnnaBridge	171:3a7713b1edbc	1706	* IRQ vector sequencer.
AnnaBridge	171:3a7713b1edbc	1707	* - Do use with polling: 1. Start conversion,
AnnaBridge	171:3a7713b1edbc	1708	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	171:3a7713b1edbc	1709	* conversion to ensure that conversion is completed and
AnnaBridge	171:3a7713b1edbc	1710	* retrieve ADC conversion data. This will trig another
AnnaBridge	171:3a7713b1edbc	1711	* ADC conversion start.
AnnaBridge	171:3a7713b1edbc	1712	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	171:3a7713b1edbc	1713	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	171:3a7713b1edbc	1714	* the ADC automatically powers-off after a conversion and
AnnaBridge	171:3a7713b1edbc	1715	* automatically wakes up when a new conversion is triggered
AnnaBridge	171:3a7713b1edbc	1716	* (with startup time between trigger and start of sampling).
AnnaBridge	171:3a7713b1edbc	1717	* This feature can be combined with low power mode "auto wait".
AnnaBridge	171:3a7713b1edbc	1718	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	171:3a7713b1edbc	1719	* is corresponding to previous ADC conversion start, independently
AnnaBridge	171:3a7713b1edbc	1720	* of delay during which ADC was idle.
AnnaBridge	171:3a7713b1edbc	1721	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	171:3a7713b1edbc	1722	* correspond to the current voltage level on the selected
AnnaBridge	171:3a7713b1edbc	1723	* ADC channel.
AnnaBridge	171:3a7713b1edbc	1724	* @rmtoll CFGR1 WAIT LL_ADC_GetLowPowerMode\n
AnnaBridge	171:3a7713b1edbc	1725	* CFGR1 AUTOFF LL_ADC_GetLowPowerMode
AnnaBridge	171:3a7713b1edbc	1726	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1727	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1728	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	171:3a7713b1edbc	1729	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	171:3a7713b1edbc	1730	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	171:3a7713b1edbc	1731	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	171:3a7713b1edbc	1732	*/
AnnaBridge	171:3a7713b1edbc	1733	__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1734	{
AnnaBridge	171:3a7713b1edbc	1735	return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF)));
AnnaBridge	171:3a7713b1edbc	1736	}
AnnaBridge	171:3a7713b1edbc	1737
AnnaBridge	171:3a7713b1edbc	1738	/**
AnnaBridge	171:3a7713b1edbc	1739	* @brief Set sampling time common to a group of channels.
AnnaBridge	171:3a7713b1edbc	1740	* @note Unit: ADC clock cycles.
AnnaBridge	171:3a7713b1edbc	1741	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	171:3a7713b1edbc	1742	* Sampling time common to all channels.
AnnaBridge	171:3a7713b1edbc	1743	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	171:3a7713b1edbc	1744	* @note In case of internal channel (VrefInt, TempSensor, ...) to be
AnnaBridge	171:3a7713b1edbc	1745	* converted:
AnnaBridge	171:3a7713b1edbc	1746	* sampling time constraints must be respected (sampling time can be
AnnaBridge	171:3a7713b1edbc	1747	* adjusted in function of ADC clock frequency and sampling time
AnnaBridge	171:3a7713b1edbc	1748	* setting).
AnnaBridge	171:3a7713b1edbc	1749	* Refer to device datasheet for timings values (parameters TS_vrefint,
AnnaBridge	171:3a7713b1edbc	1750	* TS_temp, ...).
AnnaBridge	171:3a7713b1edbc	1751	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	171:3a7713b1edbc	1752	* On this STM32 serie, ADC processing time is:
AnnaBridge	171:3a7713b1edbc	1753	* - 12.5 ADC clock cycles at ADC resolution 12 bits
AnnaBridge	171:3a7713b1edbc	1754	* - 10.5 ADC clock cycles at ADC resolution 10 bits
AnnaBridge	171:3a7713b1edbc	1755	* - 8.5 ADC clock cycles at ADC resolution 8 bits
AnnaBridge	171:3a7713b1edbc	1756	* - 6.5 ADC clock cycles at ADC resolution 6 bits
AnnaBridge	171:3a7713b1edbc	1757	* @note In case of ADC conversion of internal channel (VrefInt,
AnnaBridge	171:3a7713b1edbc	1758	* temperature sensor, ...), a sampling time minimum value
AnnaBridge	171:3a7713b1edbc	1759	* is required.
AnnaBridge	171:3a7713b1edbc	1760	* Refer to device datasheet.
AnnaBridge	171:3a7713b1edbc	1761	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1762	* ADC state:
AnnaBridge	171:3a7713b1edbc	1763	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1764	* on group regular.
AnnaBridge	171:3a7713b1edbc	1765	* @rmtoll SMPR SMP LL_ADC_SetSamplingTimeCommonChannels
AnnaBridge	171:3a7713b1edbc	1766	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1767	* @param SamplingTime This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1768	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	171:3a7713b1edbc	1769	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	171:3a7713b1edbc	1770	* @arg @ref LL_ADC_SAMPLINGTIME_13CYCLES_5
AnnaBridge	171:3a7713b1edbc	1771	* @arg @ref LL_ADC_SAMPLINGTIME_28CYCLES_5
AnnaBridge	171:3a7713b1edbc	1772	* @arg @ref LL_ADC_SAMPLINGTIME_41CYCLES_5
AnnaBridge	171:3a7713b1edbc	1773	* @arg @ref LL_ADC_SAMPLINGTIME_55CYCLES_5
AnnaBridge	171:3a7713b1edbc	1774	* @arg @ref LL_ADC_SAMPLINGTIME_71CYCLES_5
AnnaBridge	171:3a7713b1edbc	1775	* @arg @ref LL_ADC_SAMPLINGTIME_239CYCLES_5
AnnaBridge	171:3a7713b1edbc	1776	* @retval None
AnnaBridge	171:3a7713b1edbc	1777	*/
AnnaBridge	171:3a7713b1edbc	1778	__STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTime)
AnnaBridge	171:3a7713b1edbc	1779	{
AnnaBridge	171:3a7713b1edbc	1780	MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime);
AnnaBridge	171:3a7713b1edbc	1781	}
AnnaBridge	171:3a7713b1edbc	1782
AnnaBridge	171:3a7713b1edbc	1783	/**
AnnaBridge	171:3a7713b1edbc	1784	* @brief Get sampling time common to a group of channels.
AnnaBridge	171:3a7713b1edbc	1785	* @note Unit: ADC clock cycles.
AnnaBridge	171:3a7713b1edbc	1786	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	171:3a7713b1edbc	1787	* Sampling time common to all channels.
AnnaBridge	171:3a7713b1edbc	1788	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	171:3a7713b1edbc	1789	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	171:3a7713b1edbc	1790	* Refer to reference manual for ADC processing time of
AnnaBridge	171:3a7713b1edbc	1791	* this STM32 serie.
AnnaBridge	171:3a7713b1edbc	1792	* @rmtoll SMPR SMP LL_ADC_GetSamplingTimeCommonChannels
AnnaBridge	171:3a7713b1edbc	1793	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1794	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1795	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	171:3a7713b1edbc	1796	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	171:3a7713b1edbc	1797	* @arg @ref LL_ADC_SAMPLINGTIME_13CYCLES_5
AnnaBridge	171:3a7713b1edbc	1798	* @arg @ref LL_ADC_SAMPLINGTIME_28CYCLES_5
AnnaBridge	171:3a7713b1edbc	1799	* @arg @ref LL_ADC_SAMPLINGTIME_41CYCLES_5
AnnaBridge	171:3a7713b1edbc	1800	* @arg @ref LL_ADC_SAMPLINGTIME_55CYCLES_5
AnnaBridge	171:3a7713b1edbc	1801	* @arg @ref LL_ADC_SAMPLINGTIME_71CYCLES_5
AnnaBridge	171:3a7713b1edbc	1802	* @arg @ref LL_ADC_SAMPLINGTIME_239CYCLES_5
AnnaBridge	171:3a7713b1edbc	1803	*/
AnnaBridge	171:3a7713b1edbc	1804	__STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1805	{
AnnaBridge	171:3a7713b1edbc	1806	return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP));
AnnaBridge	171:3a7713b1edbc	1807	}
AnnaBridge	171:3a7713b1edbc	1808
AnnaBridge	171:3a7713b1edbc	1809	/**
AnnaBridge	171:3a7713b1edbc	1810	* @}
AnnaBridge	171:3a7713b1edbc	1811	*/
AnnaBridge	171:3a7713b1edbc	1812
AnnaBridge	171:3a7713b1edbc	1813	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
AnnaBridge	171:3a7713b1edbc	1814	* @{
AnnaBridge	171:3a7713b1edbc	1815	*/
AnnaBridge	171:3a7713b1edbc	1816
AnnaBridge	171:3a7713b1edbc	1817	/**
AnnaBridge	171:3a7713b1edbc	1818	* @brief Set ADC group regular conversion trigger source:
AnnaBridge	171:3a7713b1edbc	1819	* internal (SW start) or from external IP (timer event,
AnnaBridge	171:3a7713b1edbc	1820	* external interrupt line).
AnnaBridge	171:3a7713b1edbc	1821	* @note On this STM32 serie, setting trigger source to external trigger
AnnaBridge	171:3a7713b1edbc	1822	* also set trigger polarity to rising edge
AnnaBridge	171:3a7713b1edbc	1823	* (default setting for compatibility with some ADC on other
AnnaBridge	171:3a7713b1edbc	1824	* STM32 families having this setting set by HW default value).
AnnaBridge	171:3a7713b1edbc	1825	* In case of need to modify trigger edge, use
AnnaBridge	171:3a7713b1edbc	1826	* function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	171:3a7713b1edbc	1827	* @note Availability of parameters of trigger sources from timer
AnnaBridge	171:3a7713b1edbc	1828	* depends on timers availability on the selected device.
AnnaBridge	171:3a7713b1edbc	1829	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1830	* ADC state:
AnnaBridge	171:3a7713b1edbc	1831	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1832	* on group regular.
AnnaBridge	171:3a7713b1edbc	1833	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_SetTriggerSource\n
AnnaBridge	171:3a7713b1edbc	1834	* CFGR1 EXTEN LL_ADC_REG_SetTriggerSource
AnnaBridge	171:3a7713b1edbc	1835	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1836	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1837	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	171:3a7713b1edbc	1838	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
AnnaBridge	171:3a7713b1edbc	1839	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH4
AnnaBridge	171:3a7713b1edbc	1840	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO (1)
AnnaBridge	171:3a7713b1edbc	1841	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	171:3a7713b1edbc	1842	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO (1)
AnnaBridge	171:3a7713b1edbc	1843	*
AnnaBridge	171:3a7713b1edbc	1844	* (1) On STM32F0, parameter not available on all devices
AnnaBridge	171:3a7713b1edbc	1845	* @retval None
AnnaBridge	171:3a7713b1edbc	1846	*/
AnnaBridge	171:3a7713b1edbc	1847	__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	171:3a7713b1edbc	1848	{
AnnaBridge	171:3a7713b1edbc	1849	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN \| ADC_CFGR1_EXTSEL, TriggerSource);
AnnaBridge	171:3a7713b1edbc	1850	}
AnnaBridge	171:3a7713b1edbc	1851
AnnaBridge	171:3a7713b1edbc	1852	/**
AnnaBridge	171:3a7713b1edbc	1853	* @brief Get ADC group regular conversion trigger source:
AnnaBridge	171:3a7713b1edbc	1854	* internal (SW start) or from external IP (timer event,
AnnaBridge	171:3a7713b1edbc	1855	* external interrupt line).
AnnaBridge	171:3a7713b1edbc	1856	* @note To determine whether group regular trigger source is
AnnaBridge	171:3a7713b1edbc	1857	* internal (SW start) or external, without detail
AnnaBridge	171:3a7713b1edbc	1858	* of which peripheral is selected as external trigger,
AnnaBridge	171:3a7713b1edbc	1859	* (equivalent to
AnnaBridge	171:3a7713b1edbc	1860	* "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
AnnaBridge	171:3a7713b1edbc	1861	* use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
AnnaBridge	171:3a7713b1edbc	1862	* @note Availability of parameters of trigger sources from timer
AnnaBridge	171:3a7713b1edbc	1863	* depends on timers availability on the selected device.
AnnaBridge	171:3a7713b1edbc	1864	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_GetTriggerSource\n
AnnaBridge	171:3a7713b1edbc	1865	* CFGR1 EXTEN LL_ADC_REG_GetTriggerSource
AnnaBridge	171:3a7713b1edbc	1866	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1867	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1868	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	171:3a7713b1edbc	1869	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_TRGO
AnnaBridge	171:3a7713b1edbc	1870	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM1_CH4
AnnaBridge	171:3a7713b1edbc	1871	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO (1)
AnnaBridge	171:3a7713b1edbc	1872	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	171:3a7713b1edbc	1873	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM15_TRGO (1)
AnnaBridge	171:3a7713b1edbc	1874	*
AnnaBridge	171:3a7713b1edbc	1875	* (1) On STM32F0, parameter not available on all devices
AnnaBridge	171:3a7713b1edbc	1876	*/
AnnaBridge	171:3a7713b1edbc	1877	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1878	{
AnnaBridge	171:3a7713b1edbc	1879	register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL \| ADC_CFGR1_EXTEN);
AnnaBridge	171:3a7713b1edbc	1880
AnnaBridge	171:3a7713b1edbc	1881	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
AnnaBridge	171:3a7713b1edbc	1882	/* corresponding to ADC_CFGR1_EXTEN {0; 1; 2; 3}. */
AnnaBridge	171:3a7713b1edbc	1883	register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
AnnaBridge	171:3a7713b1edbc	1884
AnnaBridge	171:3a7713b1edbc	1885	/* Set bitfield corresponding to ADC_CFGR1_EXTEN and ADC_CFGR1_EXTSEL */
AnnaBridge	171:3a7713b1edbc	1886	/* to match with triggers literals definition. */
AnnaBridge	171:3a7713b1edbc	1887	return ((TriggerSource
AnnaBridge	171:3a7713b1edbc	1888	& (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR1_EXTSEL)
AnnaBridge	171:3a7713b1edbc	1889	\| ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN)
AnnaBridge	171:3a7713b1edbc	1890	);
AnnaBridge	171:3a7713b1edbc	1891	}
AnnaBridge	171:3a7713b1edbc	1892
AnnaBridge	171:3a7713b1edbc	1893	/**
AnnaBridge	171:3a7713b1edbc	1894	* @brief Get ADC group regular conversion trigger source internal (SW start)
AnnaBridge	171:3a7713b1edbc	1895	or external.
AnnaBridge	171:3a7713b1edbc	1896	* @note In case of group regular trigger source set to external trigger,
AnnaBridge	171:3a7713b1edbc	1897	* to determine which peripheral is selected as external trigger,
AnnaBridge	171:3a7713b1edbc	1898	* use function @ref LL_ADC_REG_GetTriggerSource().
AnnaBridge	171:3a7713b1edbc	1899	* @rmtoll CFGR1 EXTEN LL_ADC_REG_IsTriggerSourceSWStart
AnnaBridge	171:3a7713b1edbc	1900	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1901	* @retval Value "0" if trigger source external trigger
AnnaBridge	171:3a7713b1edbc	1902	* Value "1" if trigger source SW start.
AnnaBridge	171:3a7713b1edbc	1903	*/
AnnaBridge	171:3a7713b1edbc	1904	__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1905	{
AnnaBridge	171:3a7713b1edbc	1906	return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN));
AnnaBridge	171:3a7713b1edbc	1907	}
AnnaBridge	171:3a7713b1edbc	1908
AnnaBridge	171:3a7713b1edbc	1909	/**
AnnaBridge	171:3a7713b1edbc	1910	* @brief Set ADC group regular conversion trigger polarity.
AnnaBridge	171:3a7713b1edbc	1911	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	171:3a7713b1edbc	1912	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1913	* ADC state:
AnnaBridge	171:3a7713b1edbc	1914	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1915	* on group regular.
AnnaBridge	171:3a7713b1edbc	1916	* @rmtoll CFGR1 EXTEN LL_ADC_REG_SetTriggerEdge
AnnaBridge	171:3a7713b1edbc	1917	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1918	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1919	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	171:3a7713b1edbc	1920	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	171:3a7713b1edbc	1921	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	171:3a7713b1edbc	1922	* @retval None
AnnaBridge	171:3a7713b1edbc	1923	*/
AnnaBridge	171:3a7713b1edbc	1924	__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
AnnaBridge	171:3a7713b1edbc	1925	{
AnnaBridge	171:3a7713b1edbc	1926	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);
AnnaBridge	171:3a7713b1edbc	1927	}
AnnaBridge	171:3a7713b1edbc	1928
AnnaBridge	171:3a7713b1edbc	1929	/**
AnnaBridge	171:3a7713b1edbc	1930	* @brief Get ADC group regular conversion trigger polarity.
AnnaBridge	171:3a7713b1edbc	1931	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	171:3a7713b1edbc	1932	* @rmtoll CFGR1 EXTEN LL_ADC_REG_GetTriggerEdge
AnnaBridge	171:3a7713b1edbc	1933	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1934	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1935	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	171:3a7713b1edbc	1936	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	171:3a7713b1edbc	1937	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	171:3a7713b1edbc	1938	*/
AnnaBridge	171:3a7713b1edbc	1939	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1940	{
AnnaBridge	171:3a7713b1edbc	1941	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));
AnnaBridge	171:3a7713b1edbc	1942	}
AnnaBridge	171:3a7713b1edbc	1943
AnnaBridge	171:3a7713b1edbc	1944
AnnaBridge	171:3a7713b1edbc	1945	/**
AnnaBridge	171:3a7713b1edbc	1946	* @brief Set ADC group regular sequencer scan direction.
AnnaBridge	171:3a7713b1edbc	1947	* @note On some other STM32 families, this setting is not available and
AnnaBridge	171:3a7713b1edbc	1948	* the default scan direction is forward.
AnnaBridge	171:3a7713b1edbc	1949	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1950	* ADC state:
AnnaBridge	171:3a7713b1edbc	1951	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1952	* on group regular.
AnnaBridge	171:3a7713b1edbc	1953	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_SetSequencerScanDirection
AnnaBridge	171:3a7713b1edbc	1954	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1955	* @param ScanDirection This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1956	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	171:3a7713b1edbc	1957	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	171:3a7713b1edbc	1958	* @retval None
AnnaBridge	171:3a7713b1edbc	1959	*/
AnnaBridge	171:3a7713b1edbc	1960	__STATIC_INLINE void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection)
AnnaBridge	171:3a7713b1edbc	1961	{
AnnaBridge	171:3a7713b1edbc	1962	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);
AnnaBridge	171:3a7713b1edbc	1963	}
AnnaBridge	171:3a7713b1edbc	1964
AnnaBridge	171:3a7713b1edbc	1965	/**
AnnaBridge	171:3a7713b1edbc	1966	* @brief Get ADC group regular sequencer scan direction.
AnnaBridge	171:3a7713b1edbc	1967	* @note On some other STM32 families, this setting is not available and
AnnaBridge	171:3a7713b1edbc	1968	* the default scan direction is forward.
AnnaBridge	171:3a7713b1edbc	1969	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_GetSequencerScanDirection
AnnaBridge	171:3a7713b1edbc	1970	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1971	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1972	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	171:3a7713b1edbc	1973	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	171:3a7713b1edbc	1974	*/
AnnaBridge	171:3a7713b1edbc	1975	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerScanDirection(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	1976	{
AnnaBridge	171:3a7713b1edbc	1977	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));
AnnaBridge	171:3a7713b1edbc	1978	}
AnnaBridge	171:3a7713b1edbc	1979
AnnaBridge	171:3a7713b1edbc	1980	/**
AnnaBridge	171:3a7713b1edbc	1981	* @brief Set ADC group regular sequencer discontinuous mode:
AnnaBridge	171:3a7713b1edbc	1982	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	171:3a7713b1edbc	1983	* number of ranks.
AnnaBridge	171:3a7713b1edbc	1984	* @note It is not possible to enable both ADC group regular
AnnaBridge	171:3a7713b1edbc	1985	* continuous mode and sequencer discontinuous mode.
AnnaBridge	171:3a7713b1edbc	1986	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	1987	* ADC state:
AnnaBridge	171:3a7713b1edbc	1988	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	1989	* on group regular.
AnnaBridge	171:3a7713b1edbc	1990	* @rmtoll CFGR1 DISCEN LL_ADC_REG_SetSequencerDiscont\n
AnnaBridge	171:3a7713b1edbc	1991	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	1992	* @param SeqDiscont This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	1993	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	171:3a7713b1edbc	1994	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	171:3a7713b1edbc	1995	* @retval None
AnnaBridge	171:3a7713b1edbc	1996	*/
AnnaBridge	171:3a7713b1edbc	1997	__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
AnnaBridge	171:3a7713b1edbc	1998	{
AnnaBridge	171:3a7713b1edbc	1999	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);
AnnaBridge	171:3a7713b1edbc	2000	}
AnnaBridge	171:3a7713b1edbc	2001
AnnaBridge	171:3a7713b1edbc	2002	/**
AnnaBridge	171:3a7713b1edbc	2003	* @brief Get ADC group regular sequencer discontinuous mode:
AnnaBridge	171:3a7713b1edbc	2004	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	171:3a7713b1edbc	2005	* number of ranks.
AnnaBridge	171:3a7713b1edbc	2006	* @rmtoll CFGR1 DISCEN LL_ADC_REG_GetSequencerDiscont\n
AnnaBridge	171:3a7713b1edbc	2007	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2008	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2009	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	171:3a7713b1edbc	2010	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	171:3a7713b1edbc	2011	*/
AnnaBridge	171:3a7713b1edbc	2012	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2013	{
AnnaBridge	171:3a7713b1edbc	2014	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));
AnnaBridge	171:3a7713b1edbc	2015	}
AnnaBridge	171:3a7713b1edbc	2016
AnnaBridge	171:3a7713b1edbc	2017	/**
AnnaBridge	171:3a7713b1edbc	2018	* @brief Set ADC group regular sequence: channel on rank corresponding to
AnnaBridge	171:3a7713b1edbc	2019	* channel number.
AnnaBridge	171:3a7713b1edbc	2020	* @note This function performs:
AnnaBridge	171:3a7713b1edbc	2021	* - Channels ordering into each rank of scan sequence:
AnnaBridge	171:3a7713b1edbc	2022	* rank of each channel is fixed by channel HW number
AnnaBridge	171:3a7713b1edbc	2023	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	171:3a7713b1edbc	2024	* - Set channels selected by overwriting the current sequencer
AnnaBridge	171:3a7713b1edbc	2025	* configuration.
AnnaBridge	171:3a7713b1edbc	2026	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	171:3a7713b1edbc	2027	* not fully configurable: sequencer length and each rank
AnnaBridge	171:3a7713b1edbc	2028	* affectation to a channel are fixed by channel HW number.
AnnaBridge	171:3a7713b1edbc	2029	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	171:3a7713b1edbc	2030	* Refer to device datasheet for channels availability.
AnnaBridge	171:3a7713b1edbc	2031	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	171:3a7713b1edbc	2032	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	171:3a7713b1edbc	2033	* enabled separately.
AnnaBridge	171:3a7713b1edbc	2034	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	171:3a7713b1edbc	2035	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2036	* ADC state:
AnnaBridge	171:3a7713b1edbc	2037	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2038	* on group regular.
AnnaBridge	171:3a7713b1edbc	2039	* @note One or several values can be selected.
AnnaBridge	171:3a7713b1edbc	2040	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	171:3a7713b1edbc	2041	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2042	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2043	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2044	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2045	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2046	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2047	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2048	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2049	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2050	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2051	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2052	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2053	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2054	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2055	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2056	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2057	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2058	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2059	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChannels
AnnaBridge	171:3a7713b1edbc	2060	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2061	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	171:3a7713b1edbc	2062	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	2063	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	2064	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	2065	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	2066	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	2067	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	2068	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	2069	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	2070	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	2071	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	2072	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	2073	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	2074	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	2075	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	2076	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	2077	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	2078	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	2079	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	2080	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	2081	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	2082	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	2083	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	2084	*
AnnaBridge	171:3a7713b1edbc	2085	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	2086	* @retval None
AnnaBridge	171:3a7713b1edbc	2087	*/
AnnaBridge	171:3a7713b1edbc	2088	__STATIC_INLINE void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	171:3a7713b1edbc	2089	{
AnnaBridge	171:3a7713b1edbc	2090	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	171:3a7713b1edbc	2091	/* other bits reserved for other purpose. */
AnnaBridge	171:3a7713b1edbc	2092	WRITE_REG(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	171:3a7713b1edbc	2093	}
AnnaBridge	171:3a7713b1edbc	2094
AnnaBridge	171:3a7713b1edbc	2095	/**
AnnaBridge	171:3a7713b1edbc	2096	* @brief Add channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	171:3a7713b1edbc	2097	* channel number.
AnnaBridge	171:3a7713b1edbc	2098	* @note This function performs:
AnnaBridge	171:3a7713b1edbc	2099	* - Channels ordering into each rank of scan sequence:
AnnaBridge	171:3a7713b1edbc	2100	* rank of each channel is fixed by channel HW number
AnnaBridge	171:3a7713b1edbc	2101	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	171:3a7713b1edbc	2102	* - Set channels selected by adding them to the current sequencer
AnnaBridge	171:3a7713b1edbc	2103	* configuration.
AnnaBridge	171:3a7713b1edbc	2104	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	171:3a7713b1edbc	2105	* not fully configurable: sequencer length and each rank
AnnaBridge	171:3a7713b1edbc	2106	* affectation to a channel are fixed by channel HW number.
AnnaBridge	171:3a7713b1edbc	2107	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	171:3a7713b1edbc	2108	* Refer to device datasheet for channels availability.
AnnaBridge	171:3a7713b1edbc	2109	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	171:3a7713b1edbc	2110	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	171:3a7713b1edbc	2111	* enabled separately.
AnnaBridge	171:3a7713b1edbc	2112	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	171:3a7713b1edbc	2113	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2114	* ADC state:
AnnaBridge	171:3a7713b1edbc	2115	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2116	* on group regular.
AnnaBridge	171:3a7713b1edbc	2117	* @note One or several values can be selected.
AnnaBridge	171:3a7713b1edbc	2118	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	171:3a7713b1edbc	2119	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2120	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2121	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2122	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2123	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2124	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2125	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2126	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2127	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2128	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2129	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2130	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2131	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2132	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2133	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2134	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2135	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2136	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	171:3a7713b1edbc	2137	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChAdd
AnnaBridge	171:3a7713b1edbc	2138	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2139	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	171:3a7713b1edbc	2140	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	2141	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	2142	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	2143	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	2144	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	2145	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	2146	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	2147	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	2148	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	2149	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	2150	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	2151	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	2152	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	2153	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	2154	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	2155	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	2156	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	2157	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	2158	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	2159	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	2160	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	2161	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	2162	*
AnnaBridge	171:3a7713b1edbc	2163	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	2164	* @retval None
AnnaBridge	171:3a7713b1edbc	2165	*/
AnnaBridge	171:3a7713b1edbc	2166	__STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	171:3a7713b1edbc	2167	{
AnnaBridge	171:3a7713b1edbc	2168	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	171:3a7713b1edbc	2169	/* other bits reserved for other purpose. */
AnnaBridge	171:3a7713b1edbc	2170	SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	171:3a7713b1edbc	2171	}
AnnaBridge	171:3a7713b1edbc	2172
AnnaBridge	171:3a7713b1edbc	2173	/**
AnnaBridge	171:3a7713b1edbc	2174	* @brief Remove channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	171:3a7713b1edbc	2175	* channel number.
AnnaBridge	171:3a7713b1edbc	2176	* @note This function performs:
AnnaBridge	171:3a7713b1edbc	2177	* - Channels ordering into each rank of scan sequence:
AnnaBridge	171:3a7713b1edbc	2178	* rank of each channel is fixed by channel HW number
AnnaBridge	171:3a7713b1edbc	2179	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	171:3a7713b1edbc	2180	* - Set channels selected by removing them to the current sequencer
AnnaBridge	171:3a7713b1edbc	2181	* configuration.
AnnaBridge	171:3a7713b1edbc	2182	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	171:3a7713b1edbc	2183	* not fully configurable: sequencer length and each rank
AnnaBridge	171:3a7713b1edbc	2184	* affectation to a channel are fixed by channel HW number.
AnnaBridge	171:3a7713b1edbc	2185	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	171:3a7713b1edbc	2186	* Refer to device datasheet for channels availability.
AnnaBridge	171:3a7713b1edbc	2187	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	171:3a7713b1edbc	2188	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	171:3a7713b1edbc	2189	* enabled separately.
AnnaBridge	171:3a7713b1edbc	2190	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	171:3a7713b1edbc	2191	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2192	* ADC state:
AnnaBridge	171:3a7713b1edbc	2193	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2194	* on group regular.
AnnaBridge	171:3a7713b1edbc	2195	* @note One or several values can be selected.
AnnaBridge	171:3a7713b1edbc	2196	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	171:3a7713b1edbc	2197	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2198	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2199	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2200	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2201	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2202	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2203	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2204	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2205	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2206	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2207	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2208	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2209	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2210	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2211	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2212	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2213	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2214	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	171:3a7713b1edbc	2215	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChRem
AnnaBridge	171:3a7713b1edbc	2216	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2217	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	171:3a7713b1edbc	2218	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	2219	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	2220	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	2221	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	2222	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	2223	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	2224	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	2225	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	2226	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	2227	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	2228	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	2229	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	2230	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	2231	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	2232	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	2233	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	2234	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	2235	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	2236	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	2237	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	2238	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	2239	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	2240	*
AnnaBridge	171:3a7713b1edbc	2241	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	2242	* @retval None
AnnaBridge	171:3a7713b1edbc	2243	*/
AnnaBridge	171:3a7713b1edbc	2244	__STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	171:3a7713b1edbc	2245	{
AnnaBridge	171:3a7713b1edbc	2246	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	171:3a7713b1edbc	2247	/* other bits reserved for other purpose. */
AnnaBridge	171:3a7713b1edbc	2248	CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	171:3a7713b1edbc	2249	}
AnnaBridge	171:3a7713b1edbc	2250
AnnaBridge	171:3a7713b1edbc	2251	/**
AnnaBridge	171:3a7713b1edbc	2252	* @brief Get ADC group regular sequence: channel on rank corresponding to
AnnaBridge	171:3a7713b1edbc	2253	* channel number.
AnnaBridge	171:3a7713b1edbc	2254	* @note This function performs:
AnnaBridge	171:3a7713b1edbc	2255	* - Channels order reading into each rank of scan sequence:
AnnaBridge	171:3a7713b1edbc	2256	* rank of each channel is fixed by channel HW number
AnnaBridge	171:3a7713b1edbc	2257	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	171:3a7713b1edbc	2258	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	171:3a7713b1edbc	2259	* not fully configurable: sequencer length and each rank
AnnaBridge	171:3a7713b1edbc	2260	* affectation to a channel are fixed by channel HW number.
AnnaBridge	171:3a7713b1edbc	2261	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	171:3a7713b1edbc	2262	* Refer to device datasheet for channels availability.
AnnaBridge	171:3a7713b1edbc	2263	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	171:3a7713b1edbc	2264	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	171:3a7713b1edbc	2265	* enabled separately.
AnnaBridge	171:3a7713b1edbc	2266	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	171:3a7713b1edbc	2267	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2268	* ADC state:
AnnaBridge	171:3a7713b1edbc	2269	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2270	* on group regular.
AnnaBridge	171:3a7713b1edbc	2271	* @note One or several values can be retrieved.
AnnaBridge	171:3a7713b1edbc	2272	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	171:3a7713b1edbc	2273	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2274	* CHSELR CHSEL1 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2275	* CHSELR CHSEL2 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2276	* CHSELR CHSEL3 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2277	* CHSELR CHSEL4 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2278	* CHSELR CHSEL5 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2279	* CHSELR CHSEL6 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2280	* CHSELR CHSEL7 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2281	* CHSELR CHSEL8 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2282	* CHSELR CHSEL9 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2283	* CHSELR CHSEL10 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2284	* CHSELR CHSEL11 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2285	* CHSELR CHSEL12 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2286	* CHSELR CHSEL13 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2287	* CHSELR CHSEL14 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2288	* CHSELR CHSEL15 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2289	* CHSELR CHSEL16 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2290	* CHSELR CHSEL17 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	171:3a7713b1edbc	2291	* CHSELR CHSEL18 LL_ADC_REG_GetSequencerChannels
AnnaBridge	171:3a7713b1edbc	2292	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2293	* @retval Returned value can be a combination of the following values:
AnnaBridge	171:3a7713b1edbc	2294	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	171:3a7713b1edbc	2295	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	171:3a7713b1edbc	2296	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	171:3a7713b1edbc	2297	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	171:3a7713b1edbc	2298	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	171:3a7713b1edbc	2299	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	171:3a7713b1edbc	2300	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	171:3a7713b1edbc	2301	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	171:3a7713b1edbc	2302	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	171:3a7713b1edbc	2303	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	171:3a7713b1edbc	2304	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	171:3a7713b1edbc	2305	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	171:3a7713b1edbc	2306	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	171:3a7713b1edbc	2307	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	171:3a7713b1edbc	2308	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	171:3a7713b1edbc	2309	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	171:3a7713b1edbc	2310	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	171:3a7713b1edbc	2311	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	171:3a7713b1edbc	2312	* @arg @ref LL_ADC_CHANNEL_18 (1)
AnnaBridge	171:3a7713b1edbc	2313	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	171:3a7713b1edbc	2314	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	171:3a7713b1edbc	2315	* @arg @ref LL_ADC_CHANNEL_VBAT (1)
AnnaBridge	171:3a7713b1edbc	2316	*
AnnaBridge	171:3a7713b1edbc	2317	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	2318	*/
AnnaBridge	171:3a7713b1edbc	2319	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerChannels(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2320	{
AnnaBridge	171:3a7713b1edbc	2321	register uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL);
AnnaBridge	171:3a7713b1edbc	2322
AnnaBridge	171:3a7713b1edbc	2323	return ( (((ChannelsBitfield & ADC_CHSELR_CHSEL0) >> ADC_CHSELR_CHSEL0_BITOFFSET_POS) * LL_ADC_CHANNEL_0)
AnnaBridge	171:3a7713b1edbc	2324	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL1) >> ADC_CHSELR_CHSEL1_BITOFFSET_POS) * LL_ADC_CHANNEL_1)
AnnaBridge	171:3a7713b1edbc	2325	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL2) >> ADC_CHSELR_CHSEL2_BITOFFSET_POS) * LL_ADC_CHANNEL_2)
AnnaBridge	171:3a7713b1edbc	2326	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL3) >> ADC_CHSELR_CHSEL3_BITOFFSET_POS) * LL_ADC_CHANNEL_3)
AnnaBridge	171:3a7713b1edbc	2327	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL4) >> ADC_CHSELR_CHSEL4_BITOFFSET_POS) * LL_ADC_CHANNEL_4)
AnnaBridge	171:3a7713b1edbc	2328	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_CHANNEL_5)
AnnaBridge	171:3a7713b1edbc	2329	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL6) >> ADC_CHSELR_CHSEL6_BITOFFSET_POS) * LL_ADC_CHANNEL_6)
AnnaBridge	171:3a7713b1edbc	2330	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL7) >> ADC_CHSELR_CHSEL7_BITOFFSET_POS) * LL_ADC_CHANNEL_7)
AnnaBridge	171:3a7713b1edbc	2331	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL8) >> ADC_CHSELR_CHSEL8_BITOFFSET_POS) * LL_ADC_CHANNEL_8)
AnnaBridge	171:3a7713b1edbc	2332	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL9) >> ADC_CHSELR_CHSEL9_BITOFFSET_POS) * LL_ADC_CHANNEL_9)
AnnaBridge	171:3a7713b1edbc	2333	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL10) >> ADC_CHSELR_CHSEL10_BITOFFSET_POS) * LL_ADC_CHANNEL_10)
AnnaBridge	171:3a7713b1edbc	2334	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL11) >> ADC_CHSELR_CHSEL11_BITOFFSET_POS) * LL_ADC_CHANNEL_11)
AnnaBridge	171:3a7713b1edbc	2335	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL12) >> ADC_CHSELR_CHSEL12_BITOFFSET_POS) * LL_ADC_CHANNEL_12)
AnnaBridge	171:3a7713b1edbc	2336	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL13) >> ADC_CHSELR_CHSEL13_BITOFFSET_POS) * LL_ADC_CHANNEL_13)
AnnaBridge	171:3a7713b1edbc	2337	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL14) >> ADC_CHSELR_CHSEL14_BITOFFSET_POS) * LL_ADC_CHANNEL_14)
AnnaBridge	171:3a7713b1edbc	2338	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL15) >> ADC_CHSELR_CHSEL15_BITOFFSET_POS) * LL_ADC_CHANNEL_15)
AnnaBridge	171:3a7713b1edbc	2339	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL16) >> ADC_CHSELR_CHSEL16_BITOFFSET_POS) * LL_ADC_CHANNEL_16)
AnnaBridge	171:3a7713b1edbc	2340	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL17) >> ADC_CHSELR_CHSEL17_BITOFFSET_POS) * LL_ADC_CHANNEL_17)
AnnaBridge	171:3a7713b1edbc	2341	#if defined(ADC_CCR_VBATEN)
AnnaBridge	171:3a7713b1edbc	2342	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL18) >> ADC_CHSELR_CHSEL18_BITOFFSET_POS) * LL_ADC_CHANNEL_18)
AnnaBridge	171:3a7713b1edbc	2343	#endif
AnnaBridge	171:3a7713b1edbc	2344	);
AnnaBridge	171:3a7713b1edbc	2345	}
AnnaBridge	171:3a7713b1edbc	2346	/**
AnnaBridge	171:3a7713b1edbc	2347	* @brief Set ADC continuous conversion mode on ADC group regular.
AnnaBridge	171:3a7713b1edbc	2348	* @note Description of ADC continuous conversion mode:
AnnaBridge	171:3a7713b1edbc	2349	* - single mode: one conversion per trigger
AnnaBridge	171:3a7713b1edbc	2350	* - continuous mode: after the first trigger, following
AnnaBridge	171:3a7713b1edbc	2351	* conversions launched successively automatically.
AnnaBridge	171:3a7713b1edbc	2352	* @note It is not possible to enable both ADC group regular
AnnaBridge	171:3a7713b1edbc	2353	* continuous mode and sequencer discontinuous mode.
AnnaBridge	171:3a7713b1edbc	2354	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2355	* ADC state:
AnnaBridge	171:3a7713b1edbc	2356	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2357	* on group regular.
AnnaBridge	171:3a7713b1edbc	2358	* @rmtoll CFGR1 CONT LL_ADC_REG_SetContinuousMode
AnnaBridge	171:3a7713b1edbc	2359	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2360	* @param Continuous This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2361	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	171:3a7713b1edbc	2362	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	171:3a7713b1edbc	2363	* @retval None
AnnaBridge	171:3a7713b1edbc	2364	*/
AnnaBridge	171:3a7713b1edbc	2365	__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
AnnaBridge	171:3a7713b1edbc	2366	{
AnnaBridge	171:3a7713b1edbc	2367	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);
AnnaBridge	171:3a7713b1edbc	2368	}
AnnaBridge	171:3a7713b1edbc	2369
AnnaBridge	171:3a7713b1edbc	2370	/**
AnnaBridge	171:3a7713b1edbc	2371	* @brief Get ADC continuous conversion mode on ADC group regular.
AnnaBridge	171:3a7713b1edbc	2372	* @note Description of ADC continuous conversion mode:
AnnaBridge	171:3a7713b1edbc	2373	* - single mode: one conversion per trigger
AnnaBridge	171:3a7713b1edbc	2374	* - continuous mode: after the first trigger, following
AnnaBridge	171:3a7713b1edbc	2375	* conversions launched successively automatically.
AnnaBridge	171:3a7713b1edbc	2376	* @rmtoll CFGR1 CONT LL_ADC_REG_GetContinuousMode
AnnaBridge	171:3a7713b1edbc	2377	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2378	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2379	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	171:3a7713b1edbc	2380	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	171:3a7713b1edbc	2381	*/
AnnaBridge	171:3a7713b1edbc	2382	__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2383	{
AnnaBridge	171:3a7713b1edbc	2384	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));
AnnaBridge	171:3a7713b1edbc	2385	}
AnnaBridge	171:3a7713b1edbc	2386
AnnaBridge	171:3a7713b1edbc	2387	/**
AnnaBridge	171:3a7713b1edbc	2388	* @brief Set ADC group regular conversion data transfer: no transfer or
AnnaBridge	171:3a7713b1edbc	2389	* transfer by DMA, and DMA requests mode.
AnnaBridge	171:3a7713b1edbc	2390	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	171:3a7713b1edbc	2391	* mode:
AnnaBridge	171:3a7713b1edbc	2392	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	171:3a7713b1edbc	2393	* when number of DMA data transfers (number of
AnnaBridge	171:3a7713b1edbc	2394	* ADC conversions) is reached.
AnnaBridge	171:3a7713b1edbc	2395	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	171:3a7713b1edbc	2396	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	171:3a7713b1edbc	2397	* whatever number of DMA data transfers (number of
AnnaBridge	171:3a7713b1edbc	2398	* ADC conversions).
AnnaBridge	171:3a7713b1edbc	2399	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	171:3a7713b1edbc	2400	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	171:3a7713b1edbc	2401	* mode non-circular:
AnnaBridge	171:3a7713b1edbc	2402	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	171:3a7713b1edbc	2403	* ADC conversions data ADC will raise an overrun error
AnnaBridge	171:3a7713b1edbc	2404	* (overrun flag and interruption if enabled).
AnnaBridge	171:3a7713b1edbc	2405	* @note To configure DMA source address (peripheral address),
AnnaBridge	171:3a7713b1edbc	2406	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	171:3a7713b1edbc	2407	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2408	* ADC state:
AnnaBridge	171:3a7713b1edbc	2409	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2410	* on group regular.
AnnaBridge	171:3a7713b1edbc	2411	* @rmtoll CFGR1 DMAEN LL_ADC_REG_SetDMATransfer\n
AnnaBridge	171:3a7713b1edbc	2412	* CFGR1 DMACFG LL_ADC_REG_SetDMATransfer
AnnaBridge	171:3a7713b1edbc	2413	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2414	* @param DMATransfer This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2415	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	171:3a7713b1edbc	2416	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	171:3a7713b1edbc	2417	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	171:3a7713b1edbc	2418	* @retval None
AnnaBridge	171:3a7713b1edbc	2419	*/
AnnaBridge	171:3a7713b1edbc	2420	__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
AnnaBridge	171:3a7713b1edbc	2421	{
AnnaBridge	171:3a7713b1edbc	2422	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG, DMATransfer);
AnnaBridge	171:3a7713b1edbc	2423	}
AnnaBridge	171:3a7713b1edbc	2424
AnnaBridge	171:3a7713b1edbc	2425	/**
AnnaBridge	171:3a7713b1edbc	2426	* @brief Get ADC group regular conversion data transfer: no transfer or
AnnaBridge	171:3a7713b1edbc	2427	* transfer by DMA, and DMA requests mode.
AnnaBridge	171:3a7713b1edbc	2428	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	171:3a7713b1edbc	2429	* mode:
AnnaBridge	171:3a7713b1edbc	2430	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	171:3a7713b1edbc	2431	* when number of DMA data transfers (number of
AnnaBridge	171:3a7713b1edbc	2432	* ADC conversions) is reached.
AnnaBridge	171:3a7713b1edbc	2433	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	171:3a7713b1edbc	2434	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	171:3a7713b1edbc	2435	* whatever number of DMA data transfers (number of
AnnaBridge	171:3a7713b1edbc	2436	* ADC conversions).
AnnaBridge	171:3a7713b1edbc	2437	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	171:3a7713b1edbc	2438	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	171:3a7713b1edbc	2439	* mode non-circular:
AnnaBridge	171:3a7713b1edbc	2440	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	171:3a7713b1edbc	2441	* ADC conversions data ADC will raise an overrun error
AnnaBridge	171:3a7713b1edbc	2442	* (overrun flag and interruption if enabled).
AnnaBridge	171:3a7713b1edbc	2443	* @note To configure DMA source address (peripheral address),
AnnaBridge	171:3a7713b1edbc	2444	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	171:3a7713b1edbc	2445	* @rmtoll CFGR1 DMAEN LL_ADC_REG_GetDMATransfer\n
AnnaBridge	171:3a7713b1edbc	2446	* CFGR1 DMACFG LL_ADC_REG_GetDMATransfer
AnnaBridge	171:3a7713b1edbc	2447	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2448	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2449	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	171:3a7713b1edbc	2450	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	171:3a7713b1edbc	2451	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	171:3a7713b1edbc	2452	*/
AnnaBridge	171:3a7713b1edbc	2453	__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2454	{
AnnaBridge	171:3a7713b1edbc	2455	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG));
AnnaBridge	171:3a7713b1edbc	2456	}
AnnaBridge	171:3a7713b1edbc	2457
AnnaBridge	171:3a7713b1edbc	2458	/**
AnnaBridge	171:3a7713b1edbc	2459	* @brief Set ADC group regular behavior in case of overrun:
AnnaBridge	171:3a7713b1edbc	2460	* data preserved or overwritten.
AnnaBridge	171:3a7713b1edbc	2461	* @note Compatibility with devices without feature overrun:
AnnaBridge	171:3a7713b1edbc	2462	* other devices without this feature have a behavior
AnnaBridge	171:3a7713b1edbc	2463	* equivalent to data overwritten.
AnnaBridge	171:3a7713b1edbc	2464	* The default setting of overrun is data preserved.
AnnaBridge	171:3a7713b1edbc	2465	* Therefore, for compatibility with all devices, parameter
AnnaBridge	171:3a7713b1edbc	2466	* overrun should be set to data overwritten.
AnnaBridge	171:3a7713b1edbc	2467	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2468	* ADC state:
AnnaBridge	171:3a7713b1edbc	2469	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2470	* on group regular.
AnnaBridge	171:3a7713b1edbc	2471	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_SetOverrun
AnnaBridge	171:3a7713b1edbc	2472	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2473	* @param Overrun This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2474	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	171:3a7713b1edbc	2475	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	171:3a7713b1edbc	2476	* @retval None
AnnaBridge	171:3a7713b1edbc	2477	*/
AnnaBridge	171:3a7713b1edbc	2478	__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
AnnaBridge	171:3a7713b1edbc	2479	{
AnnaBridge	171:3a7713b1edbc	2480	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);
AnnaBridge	171:3a7713b1edbc	2481	}
AnnaBridge	171:3a7713b1edbc	2482
AnnaBridge	171:3a7713b1edbc	2483	/**
AnnaBridge	171:3a7713b1edbc	2484	* @brief Get ADC group regular behavior in case of overrun:
AnnaBridge	171:3a7713b1edbc	2485	* data preserved or overwritten.
AnnaBridge	171:3a7713b1edbc	2486	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_GetOverrun
AnnaBridge	171:3a7713b1edbc	2487	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2488	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2489	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	171:3a7713b1edbc	2490	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	171:3a7713b1edbc	2491	*/
AnnaBridge	171:3a7713b1edbc	2492	__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2493	{
AnnaBridge	171:3a7713b1edbc	2494	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));
AnnaBridge	171:3a7713b1edbc	2495	}
AnnaBridge	171:3a7713b1edbc	2496
AnnaBridge	171:3a7713b1edbc	2497	/**
AnnaBridge	171:3a7713b1edbc	2498	* @}
AnnaBridge	171:3a7713b1edbc	2499	*/
AnnaBridge	171:3a7713b1edbc	2500
AnnaBridge	171:3a7713b1edbc	2501
AnnaBridge	171:3a7713b1edbc	2502	/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
AnnaBridge	171:3a7713b1edbc	2503	* @{
AnnaBridge	171:3a7713b1edbc	2504	*/
AnnaBridge	171:3a7713b1edbc	2505
AnnaBridge	171:3a7713b1edbc	2506	/**
AnnaBridge	171:3a7713b1edbc	2507	* @brief Set ADC analog watchdog monitored channels:
AnnaBridge	171:3a7713b1edbc	2508	* a single channel or all channels,
AnnaBridge	171:3a7713b1edbc	2509	* on ADC group regular.
AnnaBridge	171:3a7713b1edbc	2510	* @note Once monitored channels are selected, analog watchdog
AnnaBridge	171:3a7713b1edbc	2511	* is enabled.
AnnaBridge	171:3a7713b1edbc	2512	* @note In case of need to define a single channel to monitor
AnnaBridge	171:3a7713b1edbc	2513	* with analog watchdog from sequencer channel definition,
AnnaBridge	171:3a7713b1edbc	2514	* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
AnnaBridge	171:3a7713b1edbc	2515	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	171:3a7713b1edbc	2516	* instance:
AnnaBridge	171:3a7713b1edbc	2517	* - AWD standard (instance AWD1):
AnnaBridge	171:3a7713b1edbc	2518	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	171:3a7713b1edbc	2519	* - groups monitored: ADC group regular.
AnnaBridge	171:3a7713b1edbc	2520	* - resolution: resolution is not limited (corresponds to
AnnaBridge	171:3a7713b1edbc	2521	* ADC resolution configured).
AnnaBridge	171:3a7713b1edbc	2522	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2523	* ADC state:
AnnaBridge	171:3a7713b1edbc	2524	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2525	* on group regular.
AnnaBridge	171:3a7713b1edbc	2526	* @rmtoll CFGR1 AWDCH LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	171:3a7713b1edbc	2527	* CFGR1 AWDSGL LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	171:3a7713b1edbc	2528	* CFGR1 AWDEN LL_ADC_SetAnalogWDMonitChannels
AnnaBridge	171:3a7713b1edbc	2529	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2530	* @param AWDChannelGroup This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2531	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	171:3a7713b1edbc	2532	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	171:3a7713b1edbc	2533	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	171:3a7713b1edbc	2534	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	171:3a7713b1edbc	2535	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	171:3a7713b1edbc	2536	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	171:3a7713b1edbc	2537	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	171:3a7713b1edbc	2538	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	171:3a7713b1edbc	2539	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	171:3a7713b1edbc	2540	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	171:3a7713b1edbc	2541	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	171:3a7713b1edbc	2542	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	171:3a7713b1edbc	2543	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	171:3a7713b1edbc	2544	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	171:3a7713b1edbc	2545	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	171:3a7713b1edbc	2546	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	171:3a7713b1edbc	2547	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	171:3a7713b1edbc	2548	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	171:3a7713b1edbc	2549	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG
AnnaBridge	171:3a7713b1edbc	2550	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	171:3a7713b1edbc	2551	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG (1)
AnnaBridge	171:3a7713b1edbc	2552	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	171:3a7713b1edbc	2553	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	171:3a7713b1edbc	2554	* @arg @ref LL_ADC_AWD_CH_VBAT_REG (1)
AnnaBridge	171:3a7713b1edbc	2555	*
AnnaBridge	171:3a7713b1edbc	2556	* (1) On STM32F0, parameter not available on all devices: all devices except STM32F030x6, STM32F030x8, STM32F030xC, STM32F070x6, STM32F070xB.
AnnaBridge	171:3a7713b1edbc	2557	* @retval None
AnnaBridge	171:3a7713b1edbc	2558	*/
AnnaBridge	171:3a7713b1edbc	2559	__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDChannelGroup)
AnnaBridge	171:3a7713b1edbc	2560	{
AnnaBridge	171:3a7713b1edbc	2561	MODIFY_REG(ADCx->CFGR1,
AnnaBridge	171:3a7713b1edbc	2562	(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN),
AnnaBridge	171:3a7713b1edbc	2563	(AWDChannelGroup & ADC_AWD_CR_ALL_CHANNEL_MASK));
AnnaBridge	171:3a7713b1edbc	2564	}
AnnaBridge	171:3a7713b1edbc	2565
AnnaBridge	171:3a7713b1edbc	2566	/**
AnnaBridge	171:3a7713b1edbc	2567	* @brief Get ADC analog watchdog monitored channel.
AnnaBridge	171:3a7713b1edbc	2568	* @note Usage of the returned channel number:
AnnaBridge	171:3a7713b1edbc	2569	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	171:3a7713b1edbc	2570	* the returned channel number is only partly formatted on definition
AnnaBridge	171:3a7713b1edbc	2571	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	171:3a7713b1edbc	2572	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	171:3a7713b1edbc	2573	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	171:3a7713b1edbc	2574	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	171:3a7713b1edbc	2575	* as parameter for another function.
AnnaBridge	171:3a7713b1edbc	2576	* - To get the channel number in decimal format:
AnnaBridge	171:3a7713b1edbc	2577	* process the returned value with the helper macro
AnnaBridge	171:3a7713b1edbc	2578	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	171:3a7713b1edbc	2579	* Applicable only when the analog watchdog is set to monitor
AnnaBridge	171:3a7713b1edbc	2580	* one channel.
AnnaBridge	171:3a7713b1edbc	2581	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	171:3a7713b1edbc	2582	* instance:
AnnaBridge	171:3a7713b1edbc	2583	* - AWD standard (instance AWD1):
AnnaBridge	171:3a7713b1edbc	2584	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	171:3a7713b1edbc	2585	* - groups monitored: ADC group regular.
AnnaBridge	171:3a7713b1edbc	2586	* - resolution: resolution is not limited (corresponds to
AnnaBridge	171:3a7713b1edbc	2587	* ADC resolution configured).
AnnaBridge	171:3a7713b1edbc	2588	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2589	* ADC state:
AnnaBridge	171:3a7713b1edbc	2590	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2591	* on group regular.
AnnaBridge	171:3a7713b1edbc	2592	* @rmtoll CFGR1 AWDCH LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	171:3a7713b1edbc	2593	* CFGR1 AWDSGL LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	171:3a7713b1edbc	2594	* CFGR1 AWDEN LL_ADC_GetAnalogWDMonitChannels
AnnaBridge	171:3a7713b1edbc	2595	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2596	* @retval Returned value can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2597	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	171:3a7713b1edbc	2598	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	171:3a7713b1edbc	2599	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	171:3a7713b1edbc	2600	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	171:3a7713b1edbc	2601	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	171:3a7713b1edbc	2602	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	171:3a7713b1edbc	2603	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	171:3a7713b1edbc	2604	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	171:3a7713b1edbc	2605	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	171:3a7713b1edbc	2606	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	171:3a7713b1edbc	2607	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	171:3a7713b1edbc	2608	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	171:3a7713b1edbc	2609	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	171:3a7713b1edbc	2610	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	171:3a7713b1edbc	2611	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	171:3a7713b1edbc	2612	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	171:3a7713b1edbc	2613	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	171:3a7713b1edbc	2614	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	171:3a7713b1edbc	2615	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG
AnnaBridge	171:3a7713b1edbc	2616	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	171:3a7713b1edbc	2617	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	171:3a7713b1edbc	2618	*/
AnnaBridge	171:3a7713b1edbc	2619	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2620	{
AnnaBridge	171:3a7713b1edbc	2621	register uint32_t AWDChannelGroup = READ_BIT(ADCx->CFGR1, (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN));
AnnaBridge	171:3a7713b1edbc	2622
AnnaBridge	171:3a7713b1edbc	2623	/* Note: Set variable according to channel definition including channel ID */
AnnaBridge	171:3a7713b1edbc	2624	/* with bitfield. */
AnnaBridge	171:3a7713b1edbc	2625	register uint32_t AWDChannelSingle = ((AWDChannelGroup & ADC_CFGR1_AWDSGL) >> ADC_CFGR1_AWDSGL_BITOFFSET_POS);
AnnaBridge	171:3a7713b1edbc	2626	register uint32_t AWDChannelBitField = (ADC_CHANNEL_0_BITFIELD << ((AWDChannelGroup & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS));
AnnaBridge	171:3a7713b1edbc	2627
AnnaBridge	171:3a7713b1edbc	2628	return (AWDChannelGroup \| (AWDChannelBitField * AWDChannelSingle));
AnnaBridge	171:3a7713b1edbc	2629	}
AnnaBridge	171:3a7713b1edbc	2630
AnnaBridge	171:3a7713b1edbc	2631	/**
AnnaBridge	171:3a7713b1edbc	2632	* @brief Set ADC analog watchdog thresholds value of both thresholds
AnnaBridge	171:3a7713b1edbc	2633	* high and low.
AnnaBridge	171:3a7713b1edbc	2634	* @note If value of only one threshold high or low must be set,
AnnaBridge	171:3a7713b1edbc	2635	* use function @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	171:3a7713b1edbc	2636	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	171:3a7713b1edbc	2637	* analog watchdog thresholds data require a specific shift.
AnnaBridge	171:3a7713b1edbc	2638	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	171:3a7713b1edbc	2639	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	171:3a7713b1edbc	2640	* instance:
AnnaBridge	171:3a7713b1edbc	2641	* - AWD standard (instance AWD1):
AnnaBridge	171:3a7713b1edbc	2642	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	171:3a7713b1edbc	2643	* - groups monitored: ADC group regular.
AnnaBridge	171:3a7713b1edbc	2644	* - resolution: resolution is not limited (corresponds to
AnnaBridge	171:3a7713b1edbc	2645	* ADC resolution configured).
AnnaBridge	171:3a7713b1edbc	2646	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2647	* ADC state:
AnnaBridge	171:3a7713b1edbc	2648	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2649	* on group regular.
AnnaBridge	171:3a7713b1edbc	2650	* @rmtoll TR HT LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2651	* TR LT LL_ADC_ConfigAnalogWDThresholds
AnnaBridge	171:3a7713b1edbc	2652	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2653	* @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	2654	* @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	2655	* @retval None
AnnaBridge	171:3a7713b1edbc	2656	*/
AnnaBridge	171:3a7713b1edbc	2657	__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
AnnaBridge	171:3a7713b1edbc	2658	{
AnnaBridge	171:3a7713b1edbc	2659	MODIFY_REG(ADCx->TR,
AnnaBridge	171:3a7713b1edbc	2660	ADC_TR_HT \| ADC_TR_LT,
AnnaBridge	171:3a7713b1edbc	2661	(AWDThresholdHighValue << ADC_TR_HT_BITOFFSET_POS) \| AWDThresholdLowValue);
AnnaBridge	171:3a7713b1edbc	2662	}
AnnaBridge	171:3a7713b1edbc	2663
AnnaBridge	171:3a7713b1edbc	2664	/**
AnnaBridge	171:3a7713b1edbc	2665	* @brief Set ADC analog watchdog threshold value of threshold
AnnaBridge	171:3a7713b1edbc	2666	* high or low.
AnnaBridge	171:3a7713b1edbc	2667	* @note If values of both thresholds high or low must be set,
AnnaBridge	171:3a7713b1edbc	2668	* use function @ref LL_ADC_ConfigAnalogWDThresholds().
AnnaBridge	171:3a7713b1edbc	2669	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	171:3a7713b1edbc	2670	* analog watchdog thresholds data require a specific shift.
AnnaBridge	171:3a7713b1edbc	2671	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	171:3a7713b1edbc	2672	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	171:3a7713b1edbc	2673	* instance:
AnnaBridge	171:3a7713b1edbc	2674	* - AWD standard (instance AWD1):
AnnaBridge	171:3a7713b1edbc	2675	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	171:3a7713b1edbc	2676	* - groups monitored: ADC group regular.
AnnaBridge	171:3a7713b1edbc	2677	* - resolution: resolution is not limited (corresponds to
AnnaBridge	171:3a7713b1edbc	2678	* ADC resolution configured).
AnnaBridge	171:3a7713b1edbc	2679	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2680	* ADC state:
AnnaBridge	171:3a7713b1edbc	2681	* ADC must be disabled or enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2682	* on group regular.
AnnaBridge	171:3a7713b1edbc	2683	* @rmtoll TR HT LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2684	* TR LT LL_ADC_SetAnalogWDThresholds
AnnaBridge	171:3a7713b1edbc	2685	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2686	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2687	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	171:3a7713b1edbc	2688	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	171:3a7713b1edbc	2689	* @param AWDThresholdValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	2690	* @retval None
AnnaBridge	171:3a7713b1edbc	2691	*/
AnnaBridge	171:3a7713b1edbc	2692	__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
AnnaBridge	171:3a7713b1edbc	2693	{
AnnaBridge	171:3a7713b1edbc	2694	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	171:3a7713b1edbc	2695	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	171:3a7713b1edbc	2696	/* high is selected, then data is shifted to LSB. Else(threshold low), */
AnnaBridge	171:3a7713b1edbc	2697	/* data is not shifted. */
AnnaBridge	171:3a7713b1edbc	2698	MODIFY_REG(ADCx->TR,
AnnaBridge	171:3a7713b1edbc	2699	AWDThresholdsHighLow,
AnnaBridge	171:3a7713b1edbc	2700	AWDThresholdValue << ((AWDThresholdsHighLow >> ADC_TR_HT_BITOFFSET_POS) & 0x00000010U));
AnnaBridge	171:3a7713b1edbc	2701	}
AnnaBridge	171:3a7713b1edbc	2702
AnnaBridge	171:3a7713b1edbc	2703	/**
AnnaBridge	171:3a7713b1edbc	2704	* @brief Get ADC analog watchdog threshold value of threshold high,
AnnaBridge	171:3a7713b1edbc	2705	* threshold low or raw data with ADC thresholds high and low
AnnaBridge	171:3a7713b1edbc	2706	* concatenated.
AnnaBridge	171:3a7713b1edbc	2707	* @note If raw data with ADC thresholds high and low is retrieved,
AnnaBridge	171:3a7713b1edbc	2708	* the data of each threshold high or low can be isolated
AnnaBridge	171:3a7713b1edbc	2709	* using helper macro:
AnnaBridge	171:3a7713b1edbc	2710	* @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
AnnaBridge	171:3a7713b1edbc	2711	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	171:3a7713b1edbc	2712	* analog watchdog thresholds data require a specific shift.
AnnaBridge	171:3a7713b1edbc	2713	* Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
AnnaBridge	171:3a7713b1edbc	2714	* @rmtoll TR1 HT1 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2715	* TR2 HT2 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2716	* TR3 HT3 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2717	* TR1 LT1 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2718	* TR2 LT2 LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	171:3a7713b1edbc	2719	* TR3 LT3 LL_ADC_GetAnalogWDThresholds
AnnaBridge	171:3a7713b1edbc	2720	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2721	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	171:3a7713b1edbc	2722	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	171:3a7713b1edbc	2723	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	171:3a7713b1edbc	2724	* @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
AnnaBridge	171:3a7713b1edbc	2725	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	2726	*/
AnnaBridge	171:3a7713b1edbc	2727	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow)
AnnaBridge	171:3a7713b1edbc	2728	{
AnnaBridge	171:3a7713b1edbc	2729	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	171:3a7713b1edbc	2730	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	171:3a7713b1edbc	2731	/* high is selected, then data is shifted to LSB. Else(threshold low or */
AnnaBridge	171:3a7713b1edbc	2732	/* both thresholds), data is not shifted. */
AnnaBridge	171:3a7713b1edbc	2733	return (uint32_t)(READ_BIT(ADCx->TR,
AnnaBridge	171:3a7713b1edbc	2734	(AWDThresholdsHighLow \| ADC_TR_LT))
AnnaBridge	171:3a7713b1edbc	2735	>> ((~AWDThresholdsHighLow) & 0x00000010U)
AnnaBridge	171:3a7713b1edbc	2736	);
AnnaBridge	171:3a7713b1edbc	2737	}
AnnaBridge	171:3a7713b1edbc	2738
AnnaBridge	171:3a7713b1edbc	2739	/**
AnnaBridge	171:3a7713b1edbc	2740	* @}
AnnaBridge	171:3a7713b1edbc	2741	*/
AnnaBridge	171:3a7713b1edbc	2742
AnnaBridge	171:3a7713b1edbc	2743	/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
AnnaBridge	171:3a7713b1edbc	2744	* @{
AnnaBridge	171:3a7713b1edbc	2745	*/
AnnaBridge	171:3a7713b1edbc	2746
AnnaBridge	171:3a7713b1edbc	2747	/**
AnnaBridge	171:3a7713b1edbc	2748	* @brief Enable the selected ADC instance.
AnnaBridge	171:3a7713b1edbc	2749	* @note On this STM32 serie, after ADC enable, a delay for
AnnaBridge	171:3a7713b1edbc	2750	* ADC internal analog stabilization is required before performing a
AnnaBridge	171:3a7713b1edbc	2751	* ADC conversion start.
AnnaBridge	171:3a7713b1edbc	2752	* Refer to device datasheet, parameter tSTAB.
AnnaBridge	171:3a7713b1edbc	2753	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	171:3a7713b1edbc	2754	* is enabled and when conversion clock is active.
AnnaBridge	171:3a7713b1edbc	2755	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	171:3a7713b1edbc	2756	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2757	* ADC state:
AnnaBridge	171:3a7713b1edbc	2758	* ADC must be ADC disabled and ADC internal voltage regulator enabled.
AnnaBridge	171:3a7713b1edbc	2759	* @rmtoll CR ADEN LL_ADC_Enable
AnnaBridge	171:3a7713b1edbc	2760	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2761	* @retval None
AnnaBridge	171:3a7713b1edbc	2762	*/
AnnaBridge	171:3a7713b1edbc	2763	__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2764	{
AnnaBridge	171:3a7713b1edbc	2765	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	171:3a7713b1edbc	2766	/* instead of modifying only the selected bit for this function, */
AnnaBridge	171:3a7713b1edbc	2767	/* to not interfere with bits with HW property "rs". */
AnnaBridge	171:3a7713b1edbc	2768	MODIFY_REG(ADCx->CR,
AnnaBridge	171:3a7713b1edbc	2769	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	171:3a7713b1edbc	2770	ADC_CR_ADEN);
AnnaBridge	171:3a7713b1edbc	2771	}
AnnaBridge	171:3a7713b1edbc	2772
AnnaBridge	171:3a7713b1edbc	2773	/**
AnnaBridge	171:3a7713b1edbc	2774	* @brief Disable the selected ADC instance.
AnnaBridge	171:3a7713b1edbc	2775	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2776	* ADC state:
AnnaBridge	171:3a7713b1edbc	2777	* ADC must be not disabled. Must be enabled without conversion on going
AnnaBridge	171:3a7713b1edbc	2778	* on group regular.
AnnaBridge	171:3a7713b1edbc	2779	* @rmtoll CR ADDIS LL_ADC_Disable
AnnaBridge	171:3a7713b1edbc	2780	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2781	* @retval None
AnnaBridge	171:3a7713b1edbc	2782	*/
AnnaBridge	171:3a7713b1edbc	2783	__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2784	{
AnnaBridge	171:3a7713b1edbc	2785	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	171:3a7713b1edbc	2786	/* instead of modifying only the selected bit for this function, */
AnnaBridge	171:3a7713b1edbc	2787	/* to not interfere with bits with HW property "rs". */
AnnaBridge	171:3a7713b1edbc	2788	MODIFY_REG(ADCx->CR,
AnnaBridge	171:3a7713b1edbc	2789	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	171:3a7713b1edbc	2790	ADC_CR_ADDIS);
AnnaBridge	171:3a7713b1edbc	2791	}
AnnaBridge	171:3a7713b1edbc	2792
AnnaBridge	171:3a7713b1edbc	2793	/**
AnnaBridge	171:3a7713b1edbc	2794	* @brief Get the selected ADC instance enable state.
AnnaBridge	171:3a7713b1edbc	2795	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	171:3a7713b1edbc	2796	* is enabled and when conversion clock is active.
AnnaBridge	171:3a7713b1edbc	2797	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	171:3a7713b1edbc	2798	* @rmtoll CR ADEN LL_ADC_IsEnabled
AnnaBridge	171:3a7713b1edbc	2799	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2800	* @retval 0: ADC is disabled, 1: ADC is enabled.
AnnaBridge	171:3a7713b1edbc	2801	*/
AnnaBridge	171:3a7713b1edbc	2802	__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2803	{
AnnaBridge	171:3a7713b1edbc	2804	return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
AnnaBridge	171:3a7713b1edbc	2805	}
AnnaBridge	171:3a7713b1edbc	2806
AnnaBridge	171:3a7713b1edbc	2807	/**
AnnaBridge	171:3a7713b1edbc	2808	* @brief Get the selected ADC instance disable state.
AnnaBridge	171:3a7713b1edbc	2809	* @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
AnnaBridge	171:3a7713b1edbc	2810	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2811	* @retval 0: no ADC disable command on going.
AnnaBridge	171:3a7713b1edbc	2812	*/
AnnaBridge	171:3a7713b1edbc	2813	__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2814	{
AnnaBridge	171:3a7713b1edbc	2815	return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
AnnaBridge	171:3a7713b1edbc	2816	}
AnnaBridge	171:3a7713b1edbc	2817
AnnaBridge	171:3a7713b1edbc	2818	/**
AnnaBridge	171:3a7713b1edbc	2819	* @brief Start ADC calibration in the mode single-ended
AnnaBridge	171:3a7713b1edbc	2820	* or differential (for devices with differential mode available).
AnnaBridge	171:3a7713b1edbc	2821	* @note On this STM32 serie, a minimum number of ADC clock cycles
AnnaBridge	171:3a7713b1edbc	2822	* are required between ADC end of calibration and ADC enable.
AnnaBridge	171:3a7713b1edbc	2823	* Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
AnnaBridge	171:3a7713b1edbc	2824	* @note In case of usage of ADC with DMA transfer:
AnnaBridge	171:3a7713b1edbc	2825	* On this STM32 serie, ADC DMA transfer request should be disabled
AnnaBridge	171:3a7713b1edbc	2826	* during calibration:
AnnaBridge	171:3a7713b1edbc	2827	* Calibration factor is available in data register
AnnaBridge	171:3a7713b1edbc	2828	* and also transfered by DMA.
AnnaBridge	171:3a7713b1edbc	2829	* To not insert ADC calibration factor among ADC conversion data
AnnaBridge	171:3a7713b1edbc	2830	* in array variable, DMA transfer must be disabled during
AnnaBridge	171:3a7713b1edbc	2831	* calibration.
AnnaBridge	171:3a7713b1edbc	2832	* (DMA transfer setting backup and disable before calibration,
AnnaBridge	171:3a7713b1edbc	2833	* DMA transfer setting restore after calibration.
AnnaBridge	171:3a7713b1edbc	2834	* Refer to functions @ref LL_ADC_REG_GetDMATransfer(),
AnnaBridge	171:3a7713b1edbc	2835	* @ref LL_ADC_REG_SetDMATransfer() ).
AnnaBridge	171:3a7713b1edbc	2836	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2837	* ADC state:
AnnaBridge	171:3a7713b1edbc	2838	* ADC must be ADC disabled.
AnnaBridge	171:3a7713b1edbc	2839	* @rmtoll CR ADCAL LL_ADC_StartCalibration
AnnaBridge	171:3a7713b1edbc	2840	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2841	* @retval None
AnnaBridge	171:3a7713b1edbc	2842	*/
AnnaBridge	171:3a7713b1edbc	2843	__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2844	{
AnnaBridge	171:3a7713b1edbc	2845	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	171:3a7713b1edbc	2846	/* instead of modifying only the selected bit for this function, */
AnnaBridge	171:3a7713b1edbc	2847	/* to not interfere with bits with HW property "rs". */
AnnaBridge	171:3a7713b1edbc	2848	MODIFY_REG(ADCx->CR,
AnnaBridge	171:3a7713b1edbc	2849	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	171:3a7713b1edbc	2850	ADC_CR_ADCAL);
AnnaBridge	171:3a7713b1edbc	2851	}
AnnaBridge	171:3a7713b1edbc	2852
AnnaBridge	171:3a7713b1edbc	2853	/**
AnnaBridge	171:3a7713b1edbc	2854	* @brief Get ADC calibration state.
AnnaBridge	171:3a7713b1edbc	2855	* @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
AnnaBridge	171:3a7713b1edbc	2856	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2857	* @retval 0: calibration complete, 1: calibration in progress.
AnnaBridge	171:3a7713b1edbc	2858	*/
AnnaBridge	171:3a7713b1edbc	2859	__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2860	{
AnnaBridge	171:3a7713b1edbc	2861	return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
AnnaBridge	171:3a7713b1edbc	2862	}
AnnaBridge	171:3a7713b1edbc	2863
AnnaBridge	171:3a7713b1edbc	2864	/**
AnnaBridge	171:3a7713b1edbc	2865	* @}
AnnaBridge	171:3a7713b1edbc	2866	*/
AnnaBridge	171:3a7713b1edbc	2867
AnnaBridge	171:3a7713b1edbc	2868	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
AnnaBridge	171:3a7713b1edbc	2869	* @{
AnnaBridge	171:3a7713b1edbc	2870	*/
AnnaBridge	171:3a7713b1edbc	2871
AnnaBridge	171:3a7713b1edbc	2872	/**
AnnaBridge	171:3a7713b1edbc	2873	* @brief Start ADC group regular conversion.
AnnaBridge	171:3a7713b1edbc	2874	* @note On this STM32 serie, this function is relevant for both
AnnaBridge	171:3a7713b1edbc	2875	* internal trigger (SW start) and external trigger:
AnnaBridge	171:3a7713b1edbc	2876	* - If ADC trigger has been set to software start, ADC conversion
AnnaBridge	171:3a7713b1edbc	2877	* starts immediately.
AnnaBridge	171:3a7713b1edbc	2878	* - If ADC trigger has been set to external trigger, ADC conversion
AnnaBridge	171:3a7713b1edbc	2879	* will start at next trigger event (on the selected trigger edge)
AnnaBridge	171:3a7713b1edbc	2880	* following the ADC start conversion command.
AnnaBridge	171:3a7713b1edbc	2881	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2882	* ADC state:
AnnaBridge	171:3a7713b1edbc	2883	* ADC must be enabled without conversion on going on group regular,
AnnaBridge	171:3a7713b1edbc	2884	* without conversion stop command on going on group regular,
AnnaBridge	171:3a7713b1edbc	2885	* without ADC disable command on going.
AnnaBridge	171:3a7713b1edbc	2886	* @rmtoll CR ADSTART LL_ADC_REG_StartConversion
AnnaBridge	171:3a7713b1edbc	2887	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2888	* @retval None
AnnaBridge	171:3a7713b1edbc	2889	*/
AnnaBridge	171:3a7713b1edbc	2890	__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2891	{
AnnaBridge	171:3a7713b1edbc	2892	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	171:3a7713b1edbc	2893	/* instead of modifying only the selected bit for this function, */
AnnaBridge	171:3a7713b1edbc	2894	/* to not interfere with bits with HW property "rs". */
AnnaBridge	171:3a7713b1edbc	2895	MODIFY_REG(ADCx->CR,
AnnaBridge	171:3a7713b1edbc	2896	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	171:3a7713b1edbc	2897	ADC_CR_ADSTART);
AnnaBridge	171:3a7713b1edbc	2898	}
AnnaBridge	171:3a7713b1edbc	2899
AnnaBridge	171:3a7713b1edbc	2900	/**
AnnaBridge	171:3a7713b1edbc	2901	* @brief Stop ADC group regular conversion.
AnnaBridge	171:3a7713b1edbc	2902	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	171:3a7713b1edbc	2903	* ADC state:
AnnaBridge	171:3a7713b1edbc	2904	* ADC must be enabled with conversion on going on group regular,
AnnaBridge	171:3a7713b1edbc	2905	* without ADC disable command on going.
AnnaBridge	171:3a7713b1edbc	2906	* @rmtoll CR ADSTP LL_ADC_REG_StopConversion
AnnaBridge	171:3a7713b1edbc	2907	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2908	* @retval None
AnnaBridge	171:3a7713b1edbc	2909	*/
AnnaBridge	171:3a7713b1edbc	2910	__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2911	{
AnnaBridge	171:3a7713b1edbc	2912	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	171:3a7713b1edbc	2913	/* instead of modifying only the selected bit for this function, */
AnnaBridge	171:3a7713b1edbc	2914	/* to not interfere with bits with HW property "rs". */
AnnaBridge	171:3a7713b1edbc	2915	MODIFY_REG(ADCx->CR,
AnnaBridge	171:3a7713b1edbc	2916	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	171:3a7713b1edbc	2917	ADC_CR_ADSTP);
AnnaBridge	171:3a7713b1edbc	2918	}
AnnaBridge	171:3a7713b1edbc	2919
AnnaBridge	171:3a7713b1edbc	2920	/**
AnnaBridge	171:3a7713b1edbc	2921	* @brief Get ADC group regular conversion state.
AnnaBridge	171:3a7713b1edbc	2922	* @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
AnnaBridge	171:3a7713b1edbc	2923	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2924	* @retval 0: no conversion is on going on ADC group regular.
AnnaBridge	171:3a7713b1edbc	2925	*/
AnnaBridge	171:3a7713b1edbc	2926	__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2927	{
AnnaBridge	171:3a7713b1edbc	2928	return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
AnnaBridge	171:3a7713b1edbc	2929	}
AnnaBridge	171:3a7713b1edbc	2930
AnnaBridge	171:3a7713b1edbc	2931	/**
AnnaBridge	171:3a7713b1edbc	2932	* @brief Get ADC group regular command of conversion stop state
AnnaBridge	171:3a7713b1edbc	2933	* @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
AnnaBridge	171:3a7713b1edbc	2934	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2935	* @retval 0: no command of conversion stop is on going on ADC group regular.
AnnaBridge	171:3a7713b1edbc	2936	*/
AnnaBridge	171:3a7713b1edbc	2937	__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2938	{
AnnaBridge	171:3a7713b1edbc	2939	return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
AnnaBridge	171:3a7713b1edbc	2940	}
AnnaBridge	171:3a7713b1edbc	2941
AnnaBridge	171:3a7713b1edbc	2942	/**
AnnaBridge	171:3a7713b1edbc	2943	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	171:3a7713b1edbc	2944	* all ADC configurations: all ADC resolutions and
AnnaBridge	171:3a7713b1edbc	2945	* all oversampling increased data width (for devices
AnnaBridge	171:3a7713b1edbc	2946	* with feature oversampling).
AnnaBridge	171:3a7713b1edbc	2947	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData32
AnnaBridge	171:3a7713b1edbc	2948	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2949	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	171:3a7713b1edbc	2950	*/
AnnaBridge	171:3a7713b1edbc	2951	__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2952	{
AnnaBridge	171:3a7713b1edbc	2953	return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	171:3a7713b1edbc	2954	}
AnnaBridge	171:3a7713b1edbc	2955
AnnaBridge	171:3a7713b1edbc	2956	/**
AnnaBridge	171:3a7713b1edbc	2957	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	171:3a7713b1edbc	2958	* ADC resolution 12 bits.
AnnaBridge	171:3a7713b1edbc	2959	* @note For devices with feature oversampling: Oversampling
AnnaBridge	171:3a7713b1edbc	2960	* can increase data width, function for extended range
AnnaBridge	171:3a7713b1edbc	2961	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	171:3a7713b1edbc	2962	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData12
AnnaBridge	171:3a7713b1edbc	2963	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2964	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	171:3a7713b1edbc	2965	*/
AnnaBridge	171:3a7713b1edbc	2966	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2967	{
AnnaBridge	171:3a7713b1edbc	2968	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	171:3a7713b1edbc	2969	}
AnnaBridge	171:3a7713b1edbc	2970
AnnaBridge	171:3a7713b1edbc	2971	/**
AnnaBridge	171:3a7713b1edbc	2972	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	171:3a7713b1edbc	2973	* ADC resolution 10 bits.
AnnaBridge	171:3a7713b1edbc	2974	* @note For devices with feature oversampling: Oversampling
AnnaBridge	171:3a7713b1edbc	2975	* can increase data width, function for extended range
AnnaBridge	171:3a7713b1edbc	2976	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	171:3a7713b1edbc	2977	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData10
AnnaBridge	171:3a7713b1edbc	2978	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2979	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge	171:3a7713b1edbc	2980	*/
AnnaBridge	171:3a7713b1edbc	2981	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2982	{
AnnaBridge	171:3a7713b1edbc	2983	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	171:3a7713b1edbc	2984	}
AnnaBridge	171:3a7713b1edbc	2985
AnnaBridge	171:3a7713b1edbc	2986	/**
AnnaBridge	171:3a7713b1edbc	2987	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	171:3a7713b1edbc	2988	* ADC resolution 8 bits.
AnnaBridge	171:3a7713b1edbc	2989	* @note For devices with feature oversampling: Oversampling
AnnaBridge	171:3a7713b1edbc	2990	* can increase data width, function for extended range
AnnaBridge	171:3a7713b1edbc	2991	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	171:3a7713b1edbc	2992	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData8
AnnaBridge	171:3a7713b1edbc	2993	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	2994	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	171:3a7713b1edbc	2995	*/
AnnaBridge	171:3a7713b1edbc	2996	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	2997	{
AnnaBridge	171:3a7713b1edbc	2998	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	171:3a7713b1edbc	2999	}
AnnaBridge	171:3a7713b1edbc	3000
AnnaBridge	171:3a7713b1edbc	3001	/**
AnnaBridge	171:3a7713b1edbc	3002	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	171:3a7713b1edbc	3003	* ADC resolution 6 bits.
AnnaBridge	171:3a7713b1edbc	3004	* @note For devices with feature oversampling: Oversampling
AnnaBridge	171:3a7713b1edbc	3005	* can increase data width, function for extended range
AnnaBridge	171:3a7713b1edbc	3006	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	171:3a7713b1edbc	3007	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData6
AnnaBridge	171:3a7713b1edbc	3008	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3009	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	171:3a7713b1edbc	3010	*/
AnnaBridge	171:3a7713b1edbc	3011	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3012	{
AnnaBridge	171:3a7713b1edbc	3013	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	171:3a7713b1edbc	3014	}
AnnaBridge	171:3a7713b1edbc	3015
AnnaBridge	171:3a7713b1edbc	3016	/**
AnnaBridge	171:3a7713b1edbc	3017	* @}
AnnaBridge	171:3a7713b1edbc	3018	*/
AnnaBridge	171:3a7713b1edbc	3019
AnnaBridge	171:3a7713b1edbc	3020	/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
AnnaBridge	171:3a7713b1edbc	3021	* @{
AnnaBridge	171:3a7713b1edbc	3022	*/
AnnaBridge	171:3a7713b1edbc	3023
AnnaBridge	171:3a7713b1edbc	3024	/**
AnnaBridge	171:3a7713b1edbc	3025	* @brief Get flag ADC ready.
AnnaBridge	171:3a7713b1edbc	3026	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	171:3a7713b1edbc	3027	* is enabled and when conversion clock is active.
AnnaBridge	171:3a7713b1edbc	3028	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	171:3a7713b1edbc	3029	* @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY
AnnaBridge	171:3a7713b1edbc	3030	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3031	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3032	*/
AnnaBridge	171:3a7713b1edbc	3033	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3034	{
AnnaBridge	171:3a7713b1edbc	3035	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
AnnaBridge	171:3a7713b1edbc	3036	}
AnnaBridge	171:3a7713b1edbc	3037
AnnaBridge	171:3a7713b1edbc	3038	/**
AnnaBridge	171:3a7713b1edbc	3039	* @brief Get flag ADC group regular end of unitary conversion.
AnnaBridge	171:3a7713b1edbc	3040	* @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC
AnnaBridge	171:3a7713b1edbc	3041	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3042	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3043	*/
AnnaBridge	171:3a7713b1edbc	3044	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3045	{
AnnaBridge	171:3a7713b1edbc	3046	return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
AnnaBridge	171:3a7713b1edbc	3047	}
AnnaBridge	171:3a7713b1edbc	3048
AnnaBridge	171:3a7713b1edbc	3049	/**
AnnaBridge	171:3a7713b1edbc	3050	* @brief Get flag ADC group regular end of sequence conversions.
AnnaBridge	171:3a7713b1edbc	3051	* @rmtoll ISR EOSEQ LL_ADC_IsActiveFlag_EOS
AnnaBridge	171:3a7713b1edbc	3052	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3053	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3054	*/
AnnaBridge	171:3a7713b1edbc	3055	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3056	{
AnnaBridge	171:3a7713b1edbc	3057	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
AnnaBridge	171:3a7713b1edbc	3058	}
AnnaBridge	171:3a7713b1edbc	3059
AnnaBridge	171:3a7713b1edbc	3060	/**
AnnaBridge	171:3a7713b1edbc	3061	* @brief Get flag ADC group regular overrun.
AnnaBridge	171:3a7713b1edbc	3062	* @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR
AnnaBridge	171:3a7713b1edbc	3063	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3064	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3065	*/
AnnaBridge	171:3a7713b1edbc	3066	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3067	{
AnnaBridge	171:3a7713b1edbc	3068	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
AnnaBridge	171:3a7713b1edbc	3069	}
AnnaBridge	171:3a7713b1edbc	3070
AnnaBridge	171:3a7713b1edbc	3071	/**
AnnaBridge	171:3a7713b1edbc	3072	* @brief Get flag ADC group regular end of sampling phase.
AnnaBridge	171:3a7713b1edbc	3073	* @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP
AnnaBridge	171:3a7713b1edbc	3074	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3075	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3076	*/
AnnaBridge	171:3a7713b1edbc	3077	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3078	{
AnnaBridge	171:3a7713b1edbc	3079	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
AnnaBridge	171:3a7713b1edbc	3080	}
AnnaBridge	171:3a7713b1edbc	3081
AnnaBridge	171:3a7713b1edbc	3082	/**
AnnaBridge	171:3a7713b1edbc	3083	* @brief Get flag ADC analog watchdog 1 flag
AnnaBridge	171:3a7713b1edbc	3084	* @rmtoll ISR AWD LL_ADC_IsActiveFlag_AWD1
AnnaBridge	171:3a7713b1edbc	3085	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3086	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3087	*/
AnnaBridge	171:3a7713b1edbc	3088	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3089	{
AnnaBridge	171:3a7713b1edbc	3090	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
AnnaBridge	171:3a7713b1edbc	3091	}
AnnaBridge	171:3a7713b1edbc	3092
AnnaBridge	171:3a7713b1edbc	3093	/**
AnnaBridge	171:3a7713b1edbc	3094	* @brief Clear flag ADC ready.
AnnaBridge	171:3a7713b1edbc	3095	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	171:3a7713b1edbc	3096	* is enabled and when conversion clock is active.
AnnaBridge	171:3a7713b1edbc	3097	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	171:3a7713b1edbc	3098	* @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY
AnnaBridge	171:3a7713b1edbc	3099	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3100	* @retval None
AnnaBridge	171:3a7713b1edbc	3101	*/
AnnaBridge	171:3a7713b1edbc	3102	__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3103	{
AnnaBridge	171:3a7713b1edbc	3104	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
AnnaBridge	171:3a7713b1edbc	3105	}
AnnaBridge	171:3a7713b1edbc	3106
AnnaBridge	171:3a7713b1edbc	3107	/**
AnnaBridge	171:3a7713b1edbc	3108	* @brief Clear flag ADC group regular end of unitary conversion.
AnnaBridge	171:3a7713b1edbc	3109	* @rmtoll ISR EOC LL_ADC_ClearFlag_EOC
AnnaBridge	171:3a7713b1edbc	3110	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3111	* @retval None
AnnaBridge	171:3a7713b1edbc	3112	*/
AnnaBridge	171:3a7713b1edbc	3113	__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3114	{
AnnaBridge	171:3a7713b1edbc	3115	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
AnnaBridge	171:3a7713b1edbc	3116	}
AnnaBridge	171:3a7713b1edbc	3117
AnnaBridge	171:3a7713b1edbc	3118	/**
AnnaBridge	171:3a7713b1edbc	3119	* @brief Clear flag ADC group regular end of sequence conversions.
AnnaBridge	171:3a7713b1edbc	3120	* @rmtoll ISR EOSEQ LL_ADC_ClearFlag_EOS
AnnaBridge	171:3a7713b1edbc	3121	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3122	* @retval None
AnnaBridge	171:3a7713b1edbc	3123	*/
AnnaBridge	171:3a7713b1edbc	3124	__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3125	{
AnnaBridge	171:3a7713b1edbc	3126	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
AnnaBridge	171:3a7713b1edbc	3127	}
AnnaBridge	171:3a7713b1edbc	3128
AnnaBridge	171:3a7713b1edbc	3129	/**
AnnaBridge	171:3a7713b1edbc	3130	* @brief Clear flag ADC group regular overrun.
AnnaBridge	171:3a7713b1edbc	3131	* @rmtoll ISR OVR LL_ADC_ClearFlag_OVR
AnnaBridge	171:3a7713b1edbc	3132	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3133	* @retval None
AnnaBridge	171:3a7713b1edbc	3134	*/
AnnaBridge	171:3a7713b1edbc	3135	__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3136	{
AnnaBridge	171:3a7713b1edbc	3137	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
AnnaBridge	171:3a7713b1edbc	3138	}
AnnaBridge	171:3a7713b1edbc	3139
AnnaBridge	171:3a7713b1edbc	3140	/**
AnnaBridge	171:3a7713b1edbc	3141	* @brief Clear flag ADC group regular end of sampling phase.
AnnaBridge	171:3a7713b1edbc	3142	* @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP
AnnaBridge	171:3a7713b1edbc	3143	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3144	* @retval None
AnnaBridge	171:3a7713b1edbc	3145	*/
AnnaBridge	171:3a7713b1edbc	3146	__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3147	{
AnnaBridge	171:3a7713b1edbc	3148	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
AnnaBridge	171:3a7713b1edbc	3149	}
AnnaBridge	171:3a7713b1edbc	3150
AnnaBridge	171:3a7713b1edbc	3151	/**
AnnaBridge	171:3a7713b1edbc	3152	* @brief Clear flag ADC analog watchdog 1.
AnnaBridge	171:3a7713b1edbc	3153	* @rmtoll ISR AWD LL_ADC_ClearFlag_AWD1
AnnaBridge	171:3a7713b1edbc	3154	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3155	* @retval None
AnnaBridge	171:3a7713b1edbc	3156	*/
AnnaBridge	171:3a7713b1edbc	3157	__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3158	{
AnnaBridge	171:3a7713b1edbc	3159	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
AnnaBridge	171:3a7713b1edbc	3160	}
AnnaBridge	171:3a7713b1edbc	3161
AnnaBridge	171:3a7713b1edbc	3162	/**
AnnaBridge	171:3a7713b1edbc	3163	* @}
AnnaBridge	171:3a7713b1edbc	3164	*/
AnnaBridge	171:3a7713b1edbc	3165
AnnaBridge	171:3a7713b1edbc	3166	/** @defgroup ADC_LL_EF_IT_Management ADC IT management
AnnaBridge	171:3a7713b1edbc	3167	* @{
AnnaBridge	171:3a7713b1edbc	3168	*/
AnnaBridge	171:3a7713b1edbc	3169
AnnaBridge	171:3a7713b1edbc	3170	/**
AnnaBridge	171:3a7713b1edbc	3171	* @brief Enable ADC ready.
AnnaBridge	171:3a7713b1edbc	3172	* @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY
AnnaBridge	171:3a7713b1edbc	3173	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3174	* @retval None
AnnaBridge	171:3a7713b1edbc	3175	*/
AnnaBridge	171:3a7713b1edbc	3176	__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3177	{
AnnaBridge	171:3a7713b1edbc	3178	SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	171:3a7713b1edbc	3179	}
AnnaBridge	171:3a7713b1edbc	3180
AnnaBridge	171:3a7713b1edbc	3181	/**
AnnaBridge	171:3a7713b1edbc	3182	* @brief Enable interruption ADC group regular end of unitary conversion.
AnnaBridge	171:3a7713b1edbc	3183	* @rmtoll IER EOCIE LL_ADC_EnableIT_EOC
AnnaBridge	171:3a7713b1edbc	3184	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3185	* @retval None
AnnaBridge	171:3a7713b1edbc	3186	*/
AnnaBridge	171:3a7713b1edbc	3187	__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3188	{
AnnaBridge	171:3a7713b1edbc	3189	SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	171:3a7713b1edbc	3190	}
AnnaBridge	171:3a7713b1edbc	3191
AnnaBridge	171:3a7713b1edbc	3192	/**
AnnaBridge	171:3a7713b1edbc	3193	* @brief Enable interruption ADC group regular end of sequence conversions.
AnnaBridge	171:3a7713b1edbc	3194	* @rmtoll IER EOSEQIE LL_ADC_EnableIT_EOS
AnnaBridge	171:3a7713b1edbc	3195	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3196	* @retval None
AnnaBridge	171:3a7713b1edbc	3197	*/
AnnaBridge	171:3a7713b1edbc	3198	__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3199	{
AnnaBridge	171:3a7713b1edbc	3200	SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	171:3a7713b1edbc	3201	}
AnnaBridge	171:3a7713b1edbc	3202
AnnaBridge	171:3a7713b1edbc	3203	/**
AnnaBridge	171:3a7713b1edbc	3204	* @brief Enable ADC group regular interruption overrun.
AnnaBridge	171:3a7713b1edbc	3205	* @rmtoll IER OVRIE LL_ADC_EnableIT_OVR
AnnaBridge	171:3a7713b1edbc	3206	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3207	* @retval None
AnnaBridge	171:3a7713b1edbc	3208	*/
AnnaBridge	171:3a7713b1edbc	3209	__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3210	{
AnnaBridge	171:3a7713b1edbc	3211	SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	171:3a7713b1edbc	3212	}
AnnaBridge	171:3a7713b1edbc	3213
AnnaBridge	171:3a7713b1edbc	3214	/**
AnnaBridge	171:3a7713b1edbc	3215	* @brief Enable interruption ADC group regular end of sampling.
AnnaBridge	171:3a7713b1edbc	3216	* @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP
AnnaBridge	171:3a7713b1edbc	3217	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3218	* @retval None
AnnaBridge	171:3a7713b1edbc	3219	*/
AnnaBridge	171:3a7713b1edbc	3220	__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3221	{
AnnaBridge	171:3a7713b1edbc	3222	SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	171:3a7713b1edbc	3223	}
AnnaBridge	171:3a7713b1edbc	3224
AnnaBridge	171:3a7713b1edbc	3225	/**
AnnaBridge	171:3a7713b1edbc	3226	* @brief Enable interruption ADC analog watchdog 1.
AnnaBridge	171:3a7713b1edbc	3227	* @rmtoll IER AWDIE LL_ADC_EnableIT_AWD1
AnnaBridge	171:3a7713b1edbc	3228	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3229	* @retval None
AnnaBridge	171:3a7713b1edbc	3230	*/
AnnaBridge	171:3a7713b1edbc	3231	__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3232	{
AnnaBridge	171:3a7713b1edbc	3233	SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	171:3a7713b1edbc	3234	}
AnnaBridge	171:3a7713b1edbc	3235
AnnaBridge	171:3a7713b1edbc	3236	/**
AnnaBridge	171:3a7713b1edbc	3237	* @brief Disable interruption ADC ready.
AnnaBridge	171:3a7713b1edbc	3238	* @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY
AnnaBridge	171:3a7713b1edbc	3239	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3240	* @retval None
AnnaBridge	171:3a7713b1edbc	3241	*/
AnnaBridge	171:3a7713b1edbc	3242	__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3243	{
AnnaBridge	171:3a7713b1edbc	3244	CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	171:3a7713b1edbc	3245	}
AnnaBridge	171:3a7713b1edbc	3246
AnnaBridge	171:3a7713b1edbc	3247	/**
AnnaBridge	171:3a7713b1edbc	3248	* @brief Disable interruption ADC group regular end of unitary conversion.
AnnaBridge	171:3a7713b1edbc	3249	* @rmtoll IER EOCIE LL_ADC_DisableIT_EOC
AnnaBridge	171:3a7713b1edbc	3250	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3251	* @retval None
AnnaBridge	171:3a7713b1edbc	3252	*/
AnnaBridge	171:3a7713b1edbc	3253	__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3254	{
AnnaBridge	171:3a7713b1edbc	3255	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	171:3a7713b1edbc	3256	}
AnnaBridge	171:3a7713b1edbc	3257
AnnaBridge	171:3a7713b1edbc	3258	/**
AnnaBridge	171:3a7713b1edbc	3259	* @brief Disable interruption ADC group regular end of sequence conversions.
AnnaBridge	171:3a7713b1edbc	3260	* @rmtoll IER EOSEQIE LL_ADC_DisableIT_EOS
AnnaBridge	171:3a7713b1edbc	3261	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3262	* @retval None
AnnaBridge	171:3a7713b1edbc	3263	*/
AnnaBridge	171:3a7713b1edbc	3264	__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3265	{
AnnaBridge	171:3a7713b1edbc	3266	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	171:3a7713b1edbc	3267	}
AnnaBridge	171:3a7713b1edbc	3268
AnnaBridge	171:3a7713b1edbc	3269	/**
AnnaBridge	171:3a7713b1edbc	3270	* @brief Disable interruption ADC group regular overrun.
AnnaBridge	171:3a7713b1edbc	3271	* @rmtoll IER OVRIE LL_ADC_DisableIT_OVR
AnnaBridge	171:3a7713b1edbc	3272	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3273	* @retval None
AnnaBridge	171:3a7713b1edbc	3274	*/
AnnaBridge	171:3a7713b1edbc	3275	__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3276	{
AnnaBridge	171:3a7713b1edbc	3277	CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	171:3a7713b1edbc	3278	}
AnnaBridge	171:3a7713b1edbc	3279
AnnaBridge	171:3a7713b1edbc	3280	/**
AnnaBridge	171:3a7713b1edbc	3281	* @brief Disable interruption ADC group regular end of sampling.
AnnaBridge	171:3a7713b1edbc	3282	* @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP
AnnaBridge	171:3a7713b1edbc	3283	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3284	* @retval None
AnnaBridge	171:3a7713b1edbc	3285	*/
AnnaBridge	171:3a7713b1edbc	3286	__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3287	{
AnnaBridge	171:3a7713b1edbc	3288	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	171:3a7713b1edbc	3289	}
AnnaBridge	171:3a7713b1edbc	3290
AnnaBridge	171:3a7713b1edbc	3291	/**
AnnaBridge	171:3a7713b1edbc	3292	* @brief Disable interruption ADC analog watchdog 1.
AnnaBridge	171:3a7713b1edbc	3293	* @rmtoll IER AWDIE LL_ADC_DisableIT_AWD1
AnnaBridge	171:3a7713b1edbc	3294	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3295	* @retval None
AnnaBridge	171:3a7713b1edbc	3296	*/
AnnaBridge	171:3a7713b1edbc	3297	__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3298	{
AnnaBridge	171:3a7713b1edbc	3299	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	171:3a7713b1edbc	3300	}
AnnaBridge	171:3a7713b1edbc	3301
AnnaBridge	171:3a7713b1edbc	3302	/**
AnnaBridge	171:3a7713b1edbc	3303	* @brief Get state of interruption ADC ready
AnnaBridge	171:3a7713b1edbc	3304	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	171:3a7713b1edbc	3305	* @rmtoll IER ADRDYIE LL_ADC_IsEnabledIT_ADRDY
AnnaBridge	171:3a7713b1edbc	3306	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3307	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3308	*/
AnnaBridge	171:3a7713b1edbc	3309	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3310	{
AnnaBridge	171:3a7713b1edbc	3311	return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
AnnaBridge	171:3a7713b1edbc	3312	}
AnnaBridge	171:3a7713b1edbc	3313
AnnaBridge	171:3a7713b1edbc	3314	/**
AnnaBridge	171:3a7713b1edbc	3315	* @brief Get state of interruption ADC group regular end of unitary conversion
AnnaBridge	171:3a7713b1edbc	3316	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	171:3a7713b1edbc	3317	* @rmtoll IER EOCIE LL_ADC_IsEnabledIT_EOC
AnnaBridge	171:3a7713b1edbc	3318	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3319	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3320	*/
AnnaBridge	171:3a7713b1edbc	3321	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3322	{
AnnaBridge	171:3a7713b1edbc	3323	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
AnnaBridge	171:3a7713b1edbc	3324	}
AnnaBridge	171:3a7713b1edbc	3325
AnnaBridge	171:3a7713b1edbc	3326	/**
AnnaBridge	171:3a7713b1edbc	3327	* @brief Get state of interruption ADC group regular end of sequence conversions
AnnaBridge	171:3a7713b1edbc	3328	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	171:3a7713b1edbc	3329	* @rmtoll IER EOSEQIE LL_ADC_IsEnabledIT_EOS
AnnaBridge	171:3a7713b1edbc	3330	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3331	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3332	*/
AnnaBridge	171:3a7713b1edbc	3333	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3334	{
AnnaBridge	171:3a7713b1edbc	3335	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
AnnaBridge	171:3a7713b1edbc	3336	}
AnnaBridge	171:3a7713b1edbc	3337
AnnaBridge	171:3a7713b1edbc	3338	/**
AnnaBridge	171:3a7713b1edbc	3339	* @brief Get state of interruption ADC group regular overrun
AnnaBridge	171:3a7713b1edbc	3340	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	171:3a7713b1edbc	3341	* @rmtoll IER OVRIE LL_ADC_IsEnabledIT_OVR
AnnaBridge	171:3a7713b1edbc	3342	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3343	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3344	*/
AnnaBridge	171:3a7713b1edbc	3345	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3346	{
AnnaBridge	171:3a7713b1edbc	3347	return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
AnnaBridge	171:3a7713b1edbc	3348	}
AnnaBridge	171:3a7713b1edbc	3349
AnnaBridge	171:3a7713b1edbc	3350	/**
AnnaBridge	171:3a7713b1edbc	3351	* @brief Get state of interruption ADC group regular end of sampling
AnnaBridge	171:3a7713b1edbc	3352	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	171:3a7713b1edbc	3353	* @rmtoll IER EOSMPIE LL_ADC_IsEnabledIT_EOSMP
AnnaBridge	171:3a7713b1edbc	3354	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3355	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3356	*/
AnnaBridge	171:3a7713b1edbc	3357	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3358	{
AnnaBridge	171:3a7713b1edbc	3359	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
AnnaBridge	171:3a7713b1edbc	3360	}
AnnaBridge	171:3a7713b1edbc	3361
AnnaBridge	171:3a7713b1edbc	3362	/**
AnnaBridge	171:3a7713b1edbc	3363	* @brief Get state of interruption ADC analog watchdog 1
AnnaBridge	171:3a7713b1edbc	3364	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	171:3a7713b1edbc	3365	* @rmtoll IER AWDIE LL_ADC_IsEnabledIT_AWD1
AnnaBridge	171:3a7713b1edbc	3366	* @param ADCx ADC instance
AnnaBridge	171:3a7713b1edbc	3367	* @retval State of bit (1 or 0).
AnnaBridge	171:3a7713b1edbc	3368	*/
AnnaBridge	171:3a7713b1edbc	3369	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	171:3a7713b1edbc	3370	{
AnnaBridge	171:3a7713b1edbc	3371	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
AnnaBridge	171:3a7713b1edbc	3372	}
AnnaBridge	171:3a7713b1edbc	3373
AnnaBridge	171:3a7713b1edbc	3374	/**
AnnaBridge	171:3a7713b1edbc	3375	* @}
AnnaBridge	171:3a7713b1edbc	3376	*/
AnnaBridge	171:3a7713b1edbc	3377
AnnaBridge	171:3a7713b1edbc	3378	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	171:3a7713b1edbc	3379	/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	171:3a7713b1edbc	3380	* @{
AnnaBridge	171:3a7713b1edbc	3381	*/
AnnaBridge	171:3a7713b1edbc	3382
AnnaBridge	171:3a7713b1edbc	3383	/* Initialization of some features of ADC common parameters and multimode */
AnnaBridge	171:3a7713b1edbc	3384	/* Note: On this STM32 serie, there is no ADC common initialization */
AnnaBridge	171:3a7713b1edbc	3385	/* function. */
AnnaBridge	171:3a7713b1edbc	3386	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
AnnaBridge	171:3a7713b1edbc	3387
AnnaBridge	171:3a7713b1edbc	3388	/* De-initialization of ADC instance */
AnnaBridge	171:3a7713b1edbc	3389	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
AnnaBridge	171:3a7713b1edbc	3390
AnnaBridge	171:3a7713b1edbc	3391	/* Initialization of some features of ADC instance */
AnnaBridge	171:3a7713b1edbc	3392	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct);
AnnaBridge	171:3a7713b1edbc	3393	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
AnnaBridge	171:3a7713b1edbc	3394
AnnaBridge	171:3a7713b1edbc	3395	/* Initialization of some features of ADC instance and ADC group regular */
AnnaBridge	171:3a7713b1edbc	3396	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct);
AnnaBridge	171:3a7713b1edbc	3397	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
AnnaBridge	171:3a7713b1edbc	3398
AnnaBridge	171:3a7713b1edbc	3399	/**
AnnaBridge	171:3a7713b1edbc	3400	* @}
AnnaBridge	171:3a7713b1edbc	3401	*/
AnnaBridge	171:3a7713b1edbc	3402	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	171:3a7713b1edbc	3403
AnnaBridge	171:3a7713b1edbc	3404	/**
AnnaBridge	171:3a7713b1edbc	3405	* @}
AnnaBridge	171:3a7713b1edbc	3406	*/
AnnaBridge	171:3a7713b1edbc	3407
AnnaBridge	171:3a7713b1edbc	3408	/**
AnnaBridge	171:3a7713b1edbc	3409	* @}
AnnaBridge	171:3a7713b1edbc	3410	*/
AnnaBridge	171:3a7713b1edbc	3411
AnnaBridge	171:3a7713b1edbc	3412	#endif /* ADC1 */
AnnaBridge	171:3a7713b1edbc	3413
AnnaBridge	171:3a7713b1edbc	3414	/**
AnnaBridge	171:3a7713b1edbc	3415	* @}
AnnaBridge	171:3a7713b1edbc	3416	*/
AnnaBridge	171:3a7713b1edbc	3417
AnnaBridge	171:3a7713b1edbc	3418	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	3419	}
AnnaBridge	171:3a7713b1edbc	3420	#endif
AnnaBridge	171:3a7713b1edbc	3421
AnnaBridge	171:3a7713b1edbc	3422	#endif /* __STM32F0xx_LL_ADC_H */
AnnaBridge	171:3a7713b1edbc	3423
AnnaBridge	171:3a7713b1edbc	3424	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/