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TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f0xx_hal_uart_ex.h@172:65be27845400, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 20:53:29 2019 +0000
Revision:: 172:65be27845400
Parent:: 171:3a7713b1edbc

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	171:3a7713b1edbc	1	/**
AnnaBridge	171:3a7713b1edbc	2	******************************************************************************
AnnaBridge	171:3a7713b1edbc	3	* @file stm32f0xx_hal_uart_ex.h
AnnaBridge	171:3a7713b1edbc	4	* @author MCD Application Team
AnnaBridge	171:3a7713b1edbc	5	* @brief Header file of UART HAL Extended module.
AnnaBridge	171:3a7713b1edbc	6	******************************************************************************
AnnaBridge	171:3a7713b1edbc	7	* @attention
AnnaBridge	171:3a7713b1edbc	8	*
AnnaBridge	171:3a7713b1edbc	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	171:3a7713b1edbc	10	*
AnnaBridge	171:3a7713b1edbc	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	171:3a7713b1edbc	12	* are permitted provided that the following conditions are met:
AnnaBridge	171:3a7713b1edbc	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	171:3a7713b1edbc	14	* this list of conditions and the following disclaimer.
AnnaBridge	171:3a7713b1edbc	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	171:3a7713b1edbc	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	171:3a7713b1edbc	17	* and/or other materials provided with the distribution.
AnnaBridge	171:3a7713b1edbc	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	171:3a7713b1edbc	19	* may be used to endorse or promote products derived from this software
AnnaBridge	171:3a7713b1edbc	20	* without specific prior written permission.
AnnaBridge	171:3a7713b1edbc	21	*
AnnaBridge	171:3a7713b1edbc	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	171:3a7713b1edbc	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	171:3a7713b1edbc	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	171:3a7713b1edbc	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	171:3a7713b1edbc	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	171:3a7713b1edbc	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	171:3a7713b1edbc	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	171:3a7713b1edbc	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	171:3a7713b1edbc	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	171:3a7713b1edbc	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	171:3a7713b1edbc	32	*
AnnaBridge	171:3a7713b1edbc	33	******************************************************************************
AnnaBridge	171:3a7713b1edbc	34	*/
AnnaBridge	171:3a7713b1edbc	35
AnnaBridge	171:3a7713b1edbc	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	171:3a7713b1edbc	37	#ifndef __STM32F0xx_HAL_UART_EX_H
AnnaBridge	171:3a7713b1edbc	38	#define __STM32F0xx_HAL_UART_EX_H
AnnaBridge	171:3a7713b1edbc	39
AnnaBridge	171:3a7713b1edbc	40	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	41	extern "C" {
AnnaBridge	171:3a7713b1edbc	42	#endif
AnnaBridge	171:3a7713b1edbc	43
AnnaBridge	171:3a7713b1edbc	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	45	#include "stm32f0xx_hal_def.h"
AnnaBridge	171:3a7713b1edbc	46
AnnaBridge	171:3a7713b1edbc	47	/** @addtogroup STM32F0xx_HAL_Driver
AnnaBridge	171:3a7713b1edbc	48	* @{
AnnaBridge	171:3a7713b1edbc	49	*/
AnnaBridge	171:3a7713b1edbc	50
AnnaBridge	171:3a7713b1edbc	51	/** @addtogroup UARTEx
AnnaBridge	171:3a7713b1edbc	52	* @{
AnnaBridge	171:3a7713b1edbc	53	*/
AnnaBridge	171:3a7713b1edbc	54
AnnaBridge	171:3a7713b1edbc	55	/* Exported types ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	56	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	57	/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
AnnaBridge	171:3a7713b1edbc	58	* @{
AnnaBridge	171:3a7713b1edbc	59	*/
AnnaBridge	171:3a7713b1edbc	60
AnnaBridge	171:3a7713b1edbc	61	/**
AnnaBridge	171:3a7713b1edbc	62	* @brief UART wake up from stop mode parameters
AnnaBridge	171:3a7713b1edbc	63	*/
AnnaBridge	171:3a7713b1edbc	64	typedef struct
AnnaBridge	171:3a7713b1edbc	65	{
AnnaBridge	171:3a7713b1edbc	66	uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
AnnaBridge	171:3a7713b1edbc	67	This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
AnnaBridge	171:3a7713b1edbc	68	If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
AnnaBridge	171:3a7713b1edbc	69	be filled up. */
AnnaBridge	171:3a7713b1edbc	70
AnnaBridge	171:3a7713b1edbc	71	uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
AnnaBridge	171:3a7713b1edbc	72	This parameter can be a value of @ref UART_WakeUp_Address_Length. */
AnnaBridge	171:3a7713b1edbc	73
AnnaBridge	171:3a7713b1edbc	74	uint8_t Address; /!< UART/USART node address (7-bit long max). /
AnnaBridge	171:3a7713b1edbc	75	} UART_WakeUpTypeDef;
AnnaBridge	171:3a7713b1edbc	76
AnnaBridge	171:3a7713b1edbc	77	/**
AnnaBridge	171:3a7713b1edbc	78	* @}
AnnaBridge	171:3a7713b1edbc	79	*/
AnnaBridge	171:3a7713b1edbc	80	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	81
AnnaBridge	171:3a7713b1edbc	82	/* Exported constants --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	83	/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
AnnaBridge	171:3a7713b1edbc	84	* @{
AnnaBridge	171:3a7713b1edbc	85	*/
AnnaBridge	171:3a7713b1edbc	86
AnnaBridge	171:3a7713b1edbc	87	/** @defgroup UARTEx_Word_Length UARTEx Word Length
AnnaBridge	171:3a7713b1edbc	88	* @{
AnnaBridge	171:3a7713b1edbc	89	*/
AnnaBridge	171:3a7713b1edbc	90	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	91	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	92	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
AnnaBridge	171:3a7713b1edbc	93	#define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /!< 7-bit long UART frame /
AnnaBridge	171:3a7713b1edbc	94	#define UART_WORDLENGTH_8B (0x00000000U) /!< 8-bit long UART frame /
AnnaBridge	171:3a7713b1edbc	95	#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /!< 9-bit long UART frame /
AnnaBridge	171:3a7713b1edbc	96	#else
AnnaBridge	171:3a7713b1edbc	97	#define UART_WORDLENGTH_8B (0x00000000U) /!< 8-bit long UART frame /
AnnaBridge	171:3a7713b1edbc	98	#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /!< 9-bit long UART frame /
AnnaBridge	171:3a7713b1edbc	99	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	100	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	101	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	102	/**
AnnaBridge	171:3a7713b1edbc	103	* @}
AnnaBridge	171:3a7713b1edbc	104	*/
AnnaBridge	171:3a7713b1edbc	105
AnnaBridge	171:3a7713b1edbc	106	/** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode
AnnaBridge	171:3a7713b1edbc	107	* @{
AnnaBridge	171:3a7713b1edbc	108	*/
AnnaBridge	171:3a7713b1edbc	109	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	110	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	111	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
AnnaBridge	171:3a7713b1edbc	112	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT (0x00000000U) /!< Auto Baud rate detection on start bit /
AnnaBridge	171:3a7713b1edbc	113	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
AnnaBridge	171:3a7713b1edbc	114	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /!< Auto Baud rate detection on 0x7F frame detection /
AnnaBridge	171:3a7713b1edbc	115	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /!< Auto Baud rate detection on 0x55 frame detection /
AnnaBridge	171:3a7713b1edbc	116	#else
AnnaBridge	171:3a7713b1edbc	117	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT (0x00000000U) /!< Auto Baud rate detection on start bit /
AnnaBridge	171:3a7713b1edbc	118	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
AnnaBridge	171:3a7713b1edbc	119	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	120	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	121	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	122	/**
AnnaBridge	171:3a7713b1edbc	123	* @}
AnnaBridge	171:3a7713b1edbc	124	*/
AnnaBridge	171:3a7713b1edbc	125
AnnaBridge	171:3a7713b1edbc	126	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	127	/** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode
AnnaBridge	171:3a7713b1edbc	128	* @{
AnnaBridge	171:3a7713b1edbc	129	*/
AnnaBridge	171:3a7713b1edbc	130	#define UART_LIN_DISABLE (0x00000000U) /!< Local Interconnect Network disable /
AnnaBridge	171:3a7713b1edbc	131	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /!< Local Interconnect Network enable /
AnnaBridge	171:3a7713b1edbc	132	/**
AnnaBridge	171:3a7713b1edbc	133	* @}
AnnaBridge	171:3a7713b1edbc	134	*/
AnnaBridge	171:3a7713b1edbc	135
AnnaBridge	171:3a7713b1edbc	136	/** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection
AnnaBridge	171:3a7713b1edbc	137	* @{
AnnaBridge	171:3a7713b1edbc	138	*/
AnnaBridge	171:3a7713b1edbc	139	#define UART_LINBREAKDETECTLENGTH_10B (0x00000000U) /!< LIN 10-bit break detection length /
AnnaBridge	171:3a7713b1edbc	140	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /!< LIN 11-bit break detection length /
AnnaBridge	171:3a7713b1edbc	141	/**
AnnaBridge	171:3a7713b1edbc	142	* @}
AnnaBridge	171:3a7713b1edbc	143	*/
AnnaBridge	171:3a7713b1edbc	144	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	145
AnnaBridge	171:3a7713b1edbc	146	/** @defgroup UART_Flags UARTEx Status Flags
AnnaBridge	171:3a7713b1edbc	147	* Elements values convention: 0xXXXX
AnnaBridge	171:3a7713b1edbc	148	* - 0xXXXX : Flag mask in the ISR register
AnnaBridge	171:3a7713b1edbc	149	* @{
AnnaBridge	171:3a7713b1edbc	150	*/
AnnaBridge	171:3a7713b1edbc	151	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	152	#define UART_FLAG_REACK (0x00400000U) /!< UART receive enable acknowledge flag /
AnnaBridge	171:3a7713b1edbc	153	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	154	#define UART_FLAG_TEACK (0x00200000U) /!< UART transmit enable acknowledge flag /
AnnaBridge	171:3a7713b1edbc	155	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	156	#define UART_FLAG_WUF (0x00100000U) /!< UART wake-up from stop mode flag /
AnnaBridge	171:3a7713b1edbc	157	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	158	#define UART_FLAG_RWU (0x00080000U) /!< UART receiver wake-up from mute mode flag /
AnnaBridge	171:3a7713b1edbc	159	#define UART_FLAG_SBKF (0x00040000U) /!< UART send break flag /
AnnaBridge	171:3a7713b1edbc	160	#define UART_FLAG_CMF (0x00020000U) /!< UART character match flag /
AnnaBridge	171:3a7713b1edbc	161	#define UART_FLAG_BUSY (0x00010000U) /!< UART busy flag /
AnnaBridge	171:3a7713b1edbc	162	#define UART_FLAG_ABRF (0x00008000U) /!< UART auto Baud rate flag /
AnnaBridge	171:3a7713b1edbc	163	#define UART_FLAG_ABRE (0x00004000U) /!< UART auto Baud rate error /
AnnaBridge	171:3a7713b1edbc	164	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	165	#define UART_FLAG_EOBF (0x00001000U) /!< UART end of block flag /
AnnaBridge	171:3a7713b1edbc	166	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	167	#define UART_FLAG_RTOF (0x00000800U) /!< UART receiver timeout flag /
AnnaBridge	171:3a7713b1edbc	168	#define UART_FLAG_CTS (0x00000400U) /!< UART clear to send flag /
AnnaBridge	171:3a7713b1edbc	169	#define UART_FLAG_CTSIF (0x00000200U) /!< UART clear to send interrupt flag /
AnnaBridge	171:3a7713b1edbc	170	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	171	#define UART_FLAG_LBDF (0x00000100U) /!< UART LIN break detection flag (not available on F030xx devices)/
AnnaBridge	171:3a7713b1edbc	172	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	173	#define UART_FLAG_TXE (0x00000080U) /!< UART transmit data register empty /
AnnaBridge	171:3a7713b1edbc	174	#define UART_FLAG_TC (0x00000040U) /!< UART transmission complete /
AnnaBridge	171:3a7713b1edbc	175	#define UART_FLAG_RXNE (0x00000020U) /!< UART read data register not empty /
AnnaBridge	171:3a7713b1edbc	176	#define UART_FLAG_IDLE (0x00000010U) /!< UART idle flag /
AnnaBridge	171:3a7713b1edbc	177	#define UART_FLAG_ORE (0x00000008U) /!< UART overrun error /
AnnaBridge	171:3a7713b1edbc	178	#define UART_FLAG_NE (0x00000004U) /!< UART noise error /
AnnaBridge	171:3a7713b1edbc	179	#define UART_FLAG_FE (0x00000002U) /!< UART frame error /
AnnaBridge	171:3a7713b1edbc	180	#define UART_FLAG_PE (0x00000001U) /!< UART parity error /
AnnaBridge	171:3a7713b1edbc	181	/**
AnnaBridge	171:3a7713b1edbc	182	* @}
AnnaBridge	171:3a7713b1edbc	183	*/
AnnaBridge	171:3a7713b1edbc	184
AnnaBridge	171:3a7713b1edbc	185	/** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition
AnnaBridge	171:3a7713b1edbc	186	* Elements values convention: 000ZZZZZ0XXYYYYYb
AnnaBridge	171:3a7713b1edbc	187	* - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge	171:3a7713b1edbc	188	* - XX : Interrupt source register (2bits)
AnnaBridge	171:3a7713b1edbc	189	* - 01: CR1 register
AnnaBridge	171:3a7713b1edbc	190	* - 10: CR2 register
AnnaBridge	171:3a7713b1edbc	191	* - 11: CR3 register
AnnaBridge	171:3a7713b1edbc	192	* - ZZZZZ : Flag position in the ISR register(5bits)
AnnaBridge	171:3a7713b1edbc	193	* @{
AnnaBridge	171:3a7713b1edbc	194	*/
AnnaBridge	171:3a7713b1edbc	195	#define UART_IT_PE (0x0028U) /!< UART parity error interruption /
AnnaBridge	171:3a7713b1edbc	196	#define UART_IT_TXE (0x0727U) /!< UART transmit data register empty interruption /
AnnaBridge	171:3a7713b1edbc	197	#define UART_IT_TC (0x0626U) /!< UART transmission complete interruption /
AnnaBridge	171:3a7713b1edbc	198	#define UART_IT_RXNE (0x0525U) /!< UART read data register not empty interruption /
AnnaBridge	171:3a7713b1edbc	199	#define UART_IT_IDLE (0x0424U) /!< UART idle interruption /
AnnaBridge	171:3a7713b1edbc	200	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	201	#define UART_IT_LBD (0x0846U) /!< UART LIN break detection interruption /
AnnaBridge	171:3a7713b1edbc	202	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	203	#define UART_IT_CTS (0x096AU) /!< UART CTS interruption /
AnnaBridge	171:3a7713b1edbc	204	#define UART_IT_CM (0x112EU) /!< UART character match interruption /
AnnaBridge	171:3a7713b1edbc	205	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	206	#define UART_IT_WUF (0x1476U) /!< UART wake-up from stop mode interruption /
AnnaBridge	171:3a7713b1edbc	207	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	208	/**
AnnaBridge	171:3a7713b1edbc	209	* @}
AnnaBridge	171:3a7713b1edbc	210	*/
AnnaBridge	171:3a7713b1edbc	211
AnnaBridge	171:3a7713b1edbc	212
AnnaBridge	171:3a7713b1edbc	213	/** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags
AnnaBridge	171:3a7713b1edbc	214	* @{
AnnaBridge	171:3a7713b1edbc	215	*/
AnnaBridge	171:3a7713b1edbc	216	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
AnnaBridge	171:3a7713b1edbc	217	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
AnnaBridge	171:3a7713b1edbc	218	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
AnnaBridge	171:3a7713b1edbc	219	#define UART_CLEAR_OREF USART_ICR_ORECF /!< Overrun Error Clear Flag /
AnnaBridge	171:3a7713b1edbc	220	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
AnnaBridge	171:3a7713b1edbc	221	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
AnnaBridge	171:3a7713b1edbc	222	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	223	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag (not available on F030xx devices)/
AnnaBridge	171:3a7713b1edbc	224	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	225	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
AnnaBridge	171:3a7713b1edbc	226	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
AnnaBridge	171:3a7713b1edbc	227	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	228	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
AnnaBridge	171:3a7713b1edbc	229	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	230	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
AnnaBridge	171:3a7713b1edbc	231	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	232	#define UART_CLEAR_WUF USART_ICR_WUCF /!< Wake Up from stop mode Clear Flag /
AnnaBridge	171:3a7713b1edbc	233	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	234	/**
AnnaBridge	171:3a7713b1edbc	235	* @}
AnnaBridge	171:3a7713b1edbc	236	*/
AnnaBridge	171:3a7713b1edbc	237
AnnaBridge	171:3a7713b1edbc	238	/** @defgroup UART_Request_Parameters UARTEx Request Parameters
AnnaBridge	171:3a7713b1edbc	239	* @{
AnnaBridge	171:3a7713b1edbc	240	*/
AnnaBridge	171:3a7713b1edbc	241	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
AnnaBridge	171:3a7713b1edbc	242	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
AnnaBridge	171:3a7713b1edbc	243	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
AnnaBridge	171:3a7713b1edbc	244	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
AnnaBridge	171:3a7713b1edbc	245	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	246	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
AnnaBridge	171:3a7713b1edbc	247	#else
AnnaBridge	171:3a7713b1edbc	248	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	249	/**
AnnaBridge	171:3a7713b1edbc	250	* @}
AnnaBridge	171:3a7713b1edbc	251	*/
AnnaBridge	171:3a7713b1edbc	252
AnnaBridge	171:3a7713b1edbc	253	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	254	/** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable
AnnaBridge	171:3a7713b1edbc	255	* @{
AnnaBridge	171:3a7713b1edbc	256	*/
AnnaBridge	171:3a7713b1edbc	257	#define UART_ADVFEATURE_STOPMODE_DISABLE (0x00000000U) /!< UART stop mode disable /
AnnaBridge	171:3a7713b1edbc	258	#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /!< UART stop mode enable /
AnnaBridge	171:3a7713b1edbc	259	/**
AnnaBridge	171:3a7713b1edbc	260	* @}
AnnaBridge	171:3a7713b1edbc	261	*/
AnnaBridge	171:3a7713b1edbc	262
AnnaBridge	171:3a7713b1edbc	263	/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
AnnaBridge	171:3a7713b1edbc	264	* @{
AnnaBridge	171:3a7713b1edbc	265	*/
AnnaBridge	171:3a7713b1edbc	266	#define UART_WAKEUP_ON_ADDRESS (0x00000000U) /!< UART wake-up on address /
AnnaBridge	171:3a7713b1edbc	267	#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /!< UART wake-up on start bit /
AnnaBridge	171:3a7713b1edbc	268	#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /!< UART wake-up on receive data register not empty /
AnnaBridge	171:3a7713b1edbc	269	/**
AnnaBridge	171:3a7713b1edbc	270	* @}
AnnaBridge	171:3a7713b1edbc	271	*/
AnnaBridge	171:3a7713b1edbc	272	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	273
AnnaBridge	171:3a7713b1edbc	274	/**
AnnaBridge	171:3a7713b1edbc	275	* @}
AnnaBridge	171:3a7713b1edbc	276	*/
AnnaBridge	171:3a7713b1edbc	277
AnnaBridge	171:3a7713b1edbc	278	/* Exported macros ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	279	/** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
AnnaBridge	171:3a7713b1edbc	280	* @{
AnnaBridge	171:3a7713b1edbc	281	*/
AnnaBridge	171:3a7713b1edbc	282
AnnaBridge	171:3a7713b1edbc	283	/** @brief Flush the UART Data registers.
AnnaBridge	171:3a7713b1edbc	284	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	285	* @retval None
AnnaBridge	171:3a7713b1edbc	286	*/
AnnaBridge	171:3a7713b1edbc	287	#if !defined(STM32F030x6) && !defined(STM32F030x8)
AnnaBridge	171:3a7713b1edbc	288	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	289	do{ \
AnnaBridge	171:3a7713b1edbc	290	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
AnnaBridge	171:3a7713b1edbc	291	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
AnnaBridge	171:3a7713b1edbc	292	} while(0)
AnnaBridge	171:3a7713b1edbc	293	#else
AnnaBridge	171:3a7713b1edbc	294	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	295	do{ \
AnnaBridge	171:3a7713b1edbc	296	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
AnnaBridge	171:3a7713b1edbc	297	} while(0)
AnnaBridge	171:3a7713b1edbc	298	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
AnnaBridge	171:3a7713b1edbc	299
AnnaBridge	171:3a7713b1edbc	300	/**
AnnaBridge	171:3a7713b1edbc	301	* @}
AnnaBridge	171:3a7713b1edbc	302	*/
AnnaBridge	171:3a7713b1edbc	303
AnnaBridge	171:3a7713b1edbc	304	/* Private macros ------------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	305	/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
AnnaBridge	171:3a7713b1edbc	306	* @{
AnnaBridge	171:3a7713b1edbc	307	*/
AnnaBridge	171:3a7713b1edbc	308
AnnaBridge	171:3a7713b1edbc	309	/** @brief Report the UART clock source.
AnnaBridge	171:3a7713b1edbc	310	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	311	* @param __CLOCKSOURCE__ output variable.
AnnaBridge	171:3a7713b1edbc	312	* @retval UART clocking source, written in __CLOCKSOURCE__.
AnnaBridge	171:3a7713b1edbc	313	*/
AnnaBridge	171:3a7713b1edbc	314	#if defined(STM32F030x6) \|\| defined(STM32F031x6) \|\| defined(STM32F038xx)
AnnaBridge	171:3a7713b1edbc	315	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
AnnaBridge	171:3a7713b1edbc	316	do { \
AnnaBridge	171:3a7713b1edbc	317	switch(__HAL_RCC_GET_USART1_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	318	{ \
AnnaBridge	171:3a7713b1edbc	319	case RCC_USART1CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	320	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	321	break; \
AnnaBridge	171:3a7713b1edbc	322	case RCC_USART1CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	323	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	324	break; \
AnnaBridge	171:3a7713b1edbc	325	case RCC_USART1CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	326	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	327	break; \
AnnaBridge	171:3a7713b1edbc	328	case RCC_USART1CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	329	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	330	break; \
AnnaBridge	171:3a7713b1edbc	331	default: \
AnnaBridge	171:3a7713b1edbc	332	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	333	break; \
AnnaBridge	171:3a7713b1edbc	334	} \
AnnaBridge	171:3a7713b1edbc	335	} while(0)
AnnaBridge	171:3a7713b1edbc	336	#elif defined (STM32F030x8) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	337	defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| \
AnnaBridge	171:3a7713b1edbc	338	defined (STM32F051x8) \|\| defined (STM32F058xx)
AnnaBridge	171:3a7713b1edbc	339	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
AnnaBridge	171:3a7713b1edbc	340	do { \
AnnaBridge	171:3a7713b1edbc	341	if((__HANDLE__)->Instance == USART1) \
AnnaBridge	171:3a7713b1edbc	342	{ \
AnnaBridge	171:3a7713b1edbc	343	switch(__HAL_RCC_GET_USART1_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	344	{ \
AnnaBridge	171:3a7713b1edbc	345	case RCC_USART1CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	346	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	347	break; \
AnnaBridge	171:3a7713b1edbc	348	case RCC_USART1CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	349	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	350	break; \
AnnaBridge	171:3a7713b1edbc	351	case RCC_USART1CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	352	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	353	break; \
AnnaBridge	171:3a7713b1edbc	354	case RCC_USART1CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	355	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	356	break; \
AnnaBridge	171:3a7713b1edbc	357	default: \
AnnaBridge	171:3a7713b1edbc	358	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	359	break; \
AnnaBridge	171:3a7713b1edbc	360	} \
AnnaBridge	171:3a7713b1edbc	361	} \
AnnaBridge	171:3a7713b1edbc	362	else if((__HANDLE__)->Instance == USART2) \
AnnaBridge	171:3a7713b1edbc	363	{ \
AnnaBridge	171:3a7713b1edbc	364	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	365	} \
AnnaBridge	171:3a7713b1edbc	366	else \
AnnaBridge	171:3a7713b1edbc	367	{ \
AnnaBridge	171:3a7713b1edbc	368	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	369	} \
AnnaBridge	171:3a7713b1edbc	370	} while(0)
AnnaBridge	171:3a7713b1edbc	371	#elif defined(STM32F070xB)
AnnaBridge	171:3a7713b1edbc	372	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
AnnaBridge	171:3a7713b1edbc	373	do { \
AnnaBridge	171:3a7713b1edbc	374	if((__HANDLE__)->Instance == USART1) \
AnnaBridge	171:3a7713b1edbc	375	{ \
AnnaBridge	171:3a7713b1edbc	376	switch(__HAL_RCC_GET_USART1_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	377	{ \
AnnaBridge	171:3a7713b1edbc	378	case RCC_USART1CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	379	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	380	break; \
AnnaBridge	171:3a7713b1edbc	381	case RCC_USART1CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	382	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	383	break; \
AnnaBridge	171:3a7713b1edbc	384	case RCC_USART1CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	385	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	386	break; \
AnnaBridge	171:3a7713b1edbc	387	case RCC_USART1CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	388	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	389	break; \
AnnaBridge	171:3a7713b1edbc	390	default: \
AnnaBridge	171:3a7713b1edbc	391	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	392	break; \
AnnaBridge	171:3a7713b1edbc	393	} \
AnnaBridge	171:3a7713b1edbc	394	} \
AnnaBridge	171:3a7713b1edbc	395	else if((__HANDLE__)->Instance == USART2) \
AnnaBridge	171:3a7713b1edbc	396	{ \
AnnaBridge	171:3a7713b1edbc	397	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	398	} \
AnnaBridge	171:3a7713b1edbc	399	else if((__HANDLE__)->Instance == USART3) \
AnnaBridge	171:3a7713b1edbc	400	{ \
AnnaBridge	171:3a7713b1edbc	401	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	402	} \
AnnaBridge	171:3a7713b1edbc	403	else if((__HANDLE__)->Instance == USART4) \
AnnaBridge	171:3a7713b1edbc	404	{ \
AnnaBridge	171:3a7713b1edbc	405	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	406	} \
AnnaBridge	171:3a7713b1edbc	407	else \
AnnaBridge	171:3a7713b1edbc	408	{ \
AnnaBridge	171:3a7713b1edbc	409	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	410	} \
AnnaBridge	171:3a7713b1edbc	411	} while(0)
AnnaBridge	171:3a7713b1edbc	412	#elif defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
AnnaBridge	171:3a7713b1edbc	413	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
AnnaBridge	171:3a7713b1edbc	414	do { \
AnnaBridge	171:3a7713b1edbc	415	if((__HANDLE__)->Instance == USART1) \
AnnaBridge	171:3a7713b1edbc	416	{ \
AnnaBridge	171:3a7713b1edbc	417	switch(__HAL_RCC_GET_USART1_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	418	{ \
AnnaBridge	171:3a7713b1edbc	419	case RCC_USART1CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	420	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	421	break; \
AnnaBridge	171:3a7713b1edbc	422	case RCC_USART1CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	423	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	424	break; \
AnnaBridge	171:3a7713b1edbc	425	case RCC_USART1CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	426	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	427	break; \
AnnaBridge	171:3a7713b1edbc	428	case RCC_USART1CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	429	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	430	break; \
AnnaBridge	171:3a7713b1edbc	431	default: \
AnnaBridge	171:3a7713b1edbc	432	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	433	break; \
AnnaBridge	171:3a7713b1edbc	434	} \
AnnaBridge	171:3a7713b1edbc	435	} \
AnnaBridge	171:3a7713b1edbc	436	else if((__HANDLE__)->Instance == USART2) \
AnnaBridge	171:3a7713b1edbc	437	{ \
AnnaBridge	171:3a7713b1edbc	438	switch(__HAL_RCC_GET_USART2_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	439	{ \
AnnaBridge	171:3a7713b1edbc	440	case RCC_USART2CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	441	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	442	break; \
AnnaBridge	171:3a7713b1edbc	443	case RCC_USART2CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	444	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	445	break; \
AnnaBridge	171:3a7713b1edbc	446	case RCC_USART2CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	447	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	448	break; \
AnnaBridge	171:3a7713b1edbc	449	case RCC_USART2CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	450	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	451	break; \
AnnaBridge	171:3a7713b1edbc	452	default: \
AnnaBridge	171:3a7713b1edbc	453	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	454	break; \
AnnaBridge	171:3a7713b1edbc	455	} \
AnnaBridge	171:3a7713b1edbc	456	} \
AnnaBridge	171:3a7713b1edbc	457	else if((__HANDLE__)->Instance == USART3) \
AnnaBridge	171:3a7713b1edbc	458	{ \
AnnaBridge	171:3a7713b1edbc	459	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	460	} \
AnnaBridge	171:3a7713b1edbc	461	else if((__HANDLE__)->Instance == USART4) \
AnnaBridge	171:3a7713b1edbc	462	{ \
AnnaBridge	171:3a7713b1edbc	463	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	464	} \
AnnaBridge	171:3a7713b1edbc	465	else \
AnnaBridge	171:3a7713b1edbc	466	{ \
AnnaBridge	171:3a7713b1edbc	467	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	468	} \
AnnaBridge	171:3a7713b1edbc	469	} while(0)
AnnaBridge	171:3a7713b1edbc	470	#elif defined(STM32F091xC) \|\| defined (STM32F098xx)
AnnaBridge	171:3a7713b1edbc	471	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
AnnaBridge	171:3a7713b1edbc	472	do { \
AnnaBridge	171:3a7713b1edbc	473	if((__HANDLE__)->Instance == USART1) \
AnnaBridge	171:3a7713b1edbc	474	{ \
AnnaBridge	171:3a7713b1edbc	475	switch(__HAL_RCC_GET_USART1_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	476	{ \
AnnaBridge	171:3a7713b1edbc	477	case RCC_USART1CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	478	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	479	break; \
AnnaBridge	171:3a7713b1edbc	480	case RCC_USART1CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	481	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	482	break; \
AnnaBridge	171:3a7713b1edbc	483	case RCC_USART1CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	484	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	485	break; \
AnnaBridge	171:3a7713b1edbc	486	case RCC_USART1CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	487	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	488	break; \
AnnaBridge	171:3a7713b1edbc	489	default: \
AnnaBridge	171:3a7713b1edbc	490	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	491	break; \
AnnaBridge	171:3a7713b1edbc	492	} \
AnnaBridge	171:3a7713b1edbc	493	} \
AnnaBridge	171:3a7713b1edbc	494	else if((__HANDLE__)->Instance == USART2) \
AnnaBridge	171:3a7713b1edbc	495	{ \
AnnaBridge	171:3a7713b1edbc	496	switch(__HAL_RCC_GET_USART2_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	497	{ \
AnnaBridge	171:3a7713b1edbc	498	case RCC_USART2CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	499	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	500	break; \
AnnaBridge	171:3a7713b1edbc	501	case RCC_USART2CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	502	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	503	break; \
AnnaBridge	171:3a7713b1edbc	504	case RCC_USART2CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	505	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	506	break; \
AnnaBridge	171:3a7713b1edbc	507	case RCC_USART2CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	508	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	509	break; \
AnnaBridge	171:3a7713b1edbc	510	default: \
AnnaBridge	171:3a7713b1edbc	511	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	512	break; \
AnnaBridge	171:3a7713b1edbc	513	} \
AnnaBridge	171:3a7713b1edbc	514	} \
AnnaBridge	171:3a7713b1edbc	515	else if((__HANDLE__)->Instance == USART3) \
AnnaBridge	171:3a7713b1edbc	516	{ \
AnnaBridge	171:3a7713b1edbc	517	switch(__HAL_RCC_GET_USART3_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	518	{ \
AnnaBridge	171:3a7713b1edbc	519	case RCC_USART3CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	520	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	521	break; \
AnnaBridge	171:3a7713b1edbc	522	case RCC_USART3CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	523	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	524	break; \
AnnaBridge	171:3a7713b1edbc	525	case RCC_USART3CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	526	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	527	break; \
AnnaBridge	171:3a7713b1edbc	528	case RCC_USART3CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	529	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	530	break; \
AnnaBridge	171:3a7713b1edbc	531	default: \
AnnaBridge	171:3a7713b1edbc	532	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	533	break; \
AnnaBridge	171:3a7713b1edbc	534	} \
AnnaBridge	171:3a7713b1edbc	535	} \
AnnaBridge	171:3a7713b1edbc	536	else if((__HANDLE__)->Instance == USART4) \
AnnaBridge	171:3a7713b1edbc	537	{ \
AnnaBridge	171:3a7713b1edbc	538	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	539	} \
AnnaBridge	171:3a7713b1edbc	540	else if((__HANDLE__)->Instance == USART5) \
AnnaBridge	171:3a7713b1edbc	541	{ \
AnnaBridge	171:3a7713b1edbc	542	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	543	} \
AnnaBridge	171:3a7713b1edbc	544	else if((__HANDLE__)->Instance == USART6) \
AnnaBridge	171:3a7713b1edbc	545	{ \
AnnaBridge	171:3a7713b1edbc	546	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	547	} \
AnnaBridge	171:3a7713b1edbc	548	else if((__HANDLE__)->Instance == USART7) \
AnnaBridge	171:3a7713b1edbc	549	{ \
AnnaBridge	171:3a7713b1edbc	550	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	551	} \
AnnaBridge	171:3a7713b1edbc	552	else if((__HANDLE__)->Instance == USART8) \
AnnaBridge	171:3a7713b1edbc	553	{ \
AnnaBridge	171:3a7713b1edbc	554	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	555	} \
AnnaBridge	171:3a7713b1edbc	556	else \
AnnaBridge	171:3a7713b1edbc	557	{ \
AnnaBridge	171:3a7713b1edbc	558	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	559	} \
AnnaBridge	171:3a7713b1edbc	560	} while(0)
AnnaBridge	171:3a7713b1edbc	561	#elif defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	562	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
AnnaBridge	171:3a7713b1edbc	563	do { \
AnnaBridge	171:3a7713b1edbc	564	if((__HANDLE__)->Instance == USART1) \
AnnaBridge	171:3a7713b1edbc	565	{ \
AnnaBridge	171:3a7713b1edbc	566	switch(__HAL_RCC_GET_USART1_SOURCE()) \
AnnaBridge	171:3a7713b1edbc	567	{ \
AnnaBridge	171:3a7713b1edbc	568	case RCC_USART1CLKSOURCE_PCLK1: \
AnnaBridge	171:3a7713b1edbc	569	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	570	break; \
AnnaBridge	171:3a7713b1edbc	571	case RCC_USART1CLKSOURCE_HSI: \
AnnaBridge	171:3a7713b1edbc	572	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
AnnaBridge	171:3a7713b1edbc	573	break; \
AnnaBridge	171:3a7713b1edbc	574	case RCC_USART1CLKSOURCE_SYSCLK: \
AnnaBridge	171:3a7713b1edbc	575	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
AnnaBridge	171:3a7713b1edbc	576	break; \
AnnaBridge	171:3a7713b1edbc	577	case RCC_USART1CLKSOURCE_LSE: \
AnnaBridge	171:3a7713b1edbc	578	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
AnnaBridge	171:3a7713b1edbc	579	break; \
AnnaBridge	171:3a7713b1edbc	580	default: \
AnnaBridge	171:3a7713b1edbc	581	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	582	break; \
AnnaBridge	171:3a7713b1edbc	583	} \
AnnaBridge	171:3a7713b1edbc	584	} \
AnnaBridge	171:3a7713b1edbc	585	else if((__HANDLE__)->Instance == USART2) \
AnnaBridge	171:3a7713b1edbc	586	{ \
AnnaBridge	171:3a7713b1edbc	587	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	588	} \
AnnaBridge	171:3a7713b1edbc	589	else if((__HANDLE__)->Instance == USART3) \
AnnaBridge	171:3a7713b1edbc	590	{ \
AnnaBridge	171:3a7713b1edbc	591	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	592	} \
AnnaBridge	171:3a7713b1edbc	593	else if((__HANDLE__)->Instance == USART4) \
AnnaBridge	171:3a7713b1edbc	594	{ \
AnnaBridge	171:3a7713b1edbc	595	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	596	} \
AnnaBridge	171:3a7713b1edbc	597	else if((__HANDLE__)->Instance == USART5) \
AnnaBridge	171:3a7713b1edbc	598	{ \
AnnaBridge	171:3a7713b1edbc	599	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	600	} \
AnnaBridge	171:3a7713b1edbc	601	else if((__HANDLE__)->Instance == USART6) \
AnnaBridge	171:3a7713b1edbc	602	{ \
AnnaBridge	171:3a7713b1edbc	603	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
AnnaBridge	171:3a7713b1edbc	604	} \
AnnaBridge	171:3a7713b1edbc	605	else \
AnnaBridge	171:3a7713b1edbc	606	{ \
AnnaBridge	171:3a7713b1edbc	607	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
AnnaBridge	171:3a7713b1edbc	608	} \
AnnaBridge	171:3a7713b1edbc	609	} while(0)
AnnaBridge	171:3a7713b1edbc	610
AnnaBridge	171:3a7713b1edbc	611	#endif /* defined(STM32F030x6) \|\| defined(STM32F031x6) \|\| defined(STM32F038xx) */
AnnaBridge	171:3a7713b1edbc	612
AnnaBridge	171:3a7713b1edbc	613
AnnaBridge	171:3a7713b1edbc	614	/** @brief Compute the UART mask to apply to retrieve the received data
AnnaBridge	171:3a7713b1edbc	615	* according to the word length and to the parity bits activation.
AnnaBridge	171:3a7713b1edbc	616	* @note If PCE = 1, the parity bit is not included in the data extracted
AnnaBridge	171:3a7713b1edbc	617	* by the reception API().
AnnaBridge	171:3a7713b1edbc	618	* This masking operation is not carried out in the case of
AnnaBridge	171:3a7713b1edbc	619	* DMA transfers.
AnnaBridge	171:3a7713b1edbc	620	* @param __HANDLE__ specifies the UART Handle.
AnnaBridge	171:3a7713b1edbc	621	* @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
AnnaBridge	171:3a7713b1edbc	622	*/
AnnaBridge	171:3a7713b1edbc	623	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	624	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	625	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
AnnaBridge	171:3a7713b1edbc	626	#define UART_MASK_COMPUTATION(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	627	do { \
AnnaBridge	171:3a7713b1edbc	628	if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
AnnaBridge	171:3a7713b1edbc	629	{ \
AnnaBridge	171:3a7713b1edbc	630	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
AnnaBridge	171:3a7713b1edbc	631	{ \
AnnaBridge	171:3a7713b1edbc	632	(__HANDLE__)->Mask = 0x01FFU; \
AnnaBridge	171:3a7713b1edbc	633	} \
AnnaBridge	171:3a7713b1edbc	634	else \
AnnaBridge	171:3a7713b1edbc	635	{ \
AnnaBridge	171:3a7713b1edbc	636	(__HANDLE__)->Mask = 0x00FFU; \
AnnaBridge	171:3a7713b1edbc	637	} \
AnnaBridge	171:3a7713b1edbc	638	} \
AnnaBridge	171:3a7713b1edbc	639	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
AnnaBridge	171:3a7713b1edbc	640	{ \
AnnaBridge	171:3a7713b1edbc	641	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
AnnaBridge	171:3a7713b1edbc	642	{ \
AnnaBridge	171:3a7713b1edbc	643	(__HANDLE__)->Mask = 0x00FFU; \
AnnaBridge	171:3a7713b1edbc	644	} \
AnnaBridge	171:3a7713b1edbc	645	else \
AnnaBridge	171:3a7713b1edbc	646	{ \
AnnaBridge	171:3a7713b1edbc	647	(__HANDLE__)->Mask = 0x007FU; \
AnnaBridge	171:3a7713b1edbc	648	} \
AnnaBridge	171:3a7713b1edbc	649	} \
AnnaBridge	171:3a7713b1edbc	650	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
AnnaBridge	171:3a7713b1edbc	651	{ \
AnnaBridge	171:3a7713b1edbc	652	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
AnnaBridge	171:3a7713b1edbc	653	{ \
AnnaBridge	171:3a7713b1edbc	654	(__HANDLE__)->Mask = 0x007FU; \
AnnaBridge	171:3a7713b1edbc	655	} \
AnnaBridge	171:3a7713b1edbc	656	else \
AnnaBridge	171:3a7713b1edbc	657	{ \
AnnaBridge	171:3a7713b1edbc	658	(__HANDLE__)->Mask = 0x003FU; \
AnnaBridge	171:3a7713b1edbc	659	} \
AnnaBridge	171:3a7713b1edbc	660	} \
AnnaBridge	171:3a7713b1edbc	661	} while(0)
AnnaBridge	171:3a7713b1edbc	662	#else
AnnaBridge	171:3a7713b1edbc	663	#define UART_MASK_COMPUTATION(__HANDLE__) \
AnnaBridge	171:3a7713b1edbc	664	do { \
AnnaBridge	171:3a7713b1edbc	665	if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
AnnaBridge	171:3a7713b1edbc	666	{ \
AnnaBridge	171:3a7713b1edbc	667	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
AnnaBridge	171:3a7713b1edbc	668	{ \
AnnaBridge	171:3a7713b1edbc	669	(__HANDLE__)->Mask = 0x01FFU; \
AnnaBridge	171:3a7713b1edbc	670	} \
AnnaBridge	171:3a7713b1edbc	671	else \
AnnaBridge	171:3a7713b1edbc	672	{ \
AnnaBridge	171:3a7713b1edbc	673	(__HANDLE__)->Mask = 0x00FFU; \
AnnaBridge	171:3a7713b1edbc	674	} \
AnnaBridge	171:3a7713b1edbc	675	} \
AnnaBridge	171:3a7713b1edbc	676	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
AnnaBridge	171:3a7713b1edbc	677	{ \
AnnaBridge	171:3a7713b1edbc	678	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
AnnaBridge	171:3a7713b1edbc	679	{ \
AnnaBridge	171:3a7713b1edbc	680	(__HANDLE__)->Mask = 0x00FFU; \
AnnaBridge	171:3a7713b1edbc	681	} \
AnnaBridge	171:3a7713b1edbc	682	else \
AnnaBridge	171:3a7713b1edbc	683	{ \
AnnaBridge	171:3a7713b1edbc	684	(__HANDLE__)->Mask = 0x007FU; \
AnnaBridge	171:3a7713b1edbc	685	} \
AnnaBridge	171:3a7713b1edbc	686	} \
AnnaBridge	171:3a7713b1edbc	687	} while(0)
AnnaBridge	171:3a7713b1edbc	688	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	689	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	690	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	691
AnnaBridge	171:3a7713b1edbc	692	/**
AnnaBridge	171:3a7713b1edbc	693	* @brief Ensure that UART frame length is valid.
AnnaBridge	171:3a7713b1edbc	694	* @param __LENGTH__ UART frame length.
AnnaBridge	171:3a7713b1edbc	695	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
AnnaBridge	171:3a7713b1edbc	696	*/
AnnaBridge	171:3a7713b1edbc	697	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	698	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	699	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
AnnaBridge	171:3a7713b1edbc	700	#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) \|\| \
AnnaBridge	171:3a7713b1edbc	701	((__LENGTH__) == UART_WORDLENGTH_8B) \|\| \
AnnaBridge	171:3a7713b1edbc	702	((__LENGTH__) == UART_WORDLENGTH_9B))
AnnaBridge	171:3a7713b1edbc	703	#else
AnnaBridge	171:3a7713b1edbc	704	#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) \|\| \
AnnaBridge	171:3a7713b1edbc	705	((__LENGTH__) == UART_WORDLENGTH_9B))
AnnaBridge	171:3a7713b1edbc	706	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	707	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	708	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	709
AnnaBridge	171:3a7713b1edbc	710	/**
AnnaBridge	171:3a7713b1edbc	711	* @brief Ensure that UART auto Baud rate detection mode is valid.
AnnaBridge	171:3a7713b1edbc	712	* @param __MODE__ UART auto Baud rate detection mode.
AnnaBridge	171:3a7713b1edbc	713	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge	171:3a7713b1edbc	714	*/
AnnaBridge	171:3a7713b1edbc	715	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	716	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	717	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
AnnaBridge	171:3a7713b1edbc	718	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
AnnaBridge	171:3a7713b1edbc	719	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
AnnaBridge	171:3a7713b1edbc	720	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
AnnaBridge	171:3a7713b1edbc	721	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
AnnaBridge	171:3a7713b1edbc	722	#else
AnnaBridge	171:3a7713b1edbc	723	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
AnnaBridge	171:3a7713b1edbc	724	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE))
AnnaBridge	171:3a7713b1edbc	725	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
AnnaBridge	171:3a7713b1edbc	726	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
AnnaBridge	171:3a7713b1edbc	727	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	728
AnnaBridge	171:3a7713b1edbc	729
AnnaBridge	171:3a7713b1edbc	730	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	731	/**
AnnaBridge	171:3a7713b1edbc	732	* @brief Ensure that UART LIN state is valid.
AnnaBridge	171:3a7713b1edbc	733	* @param __LIN__ UART LIN state.
AnnaBridge	171:3a7713b1edbc	734	* @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
AnnaBridge	171:3a7713b1edbc	735	*/
AnnaBridge	171:3a7713b1edbc	736	#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	737	((__LIN__) == UART_LIN_ENABLE))
AnnaBridge	171:3a7713b1edbc	738
AnnaBridge	171:3a7713b1edbc	739	/**
AnnaBridge	171:3a7713b1edbc	740	* @brief Ensure that UART LIN break detection length is valid.
AnnaBridge	171:3a7713b1edbc	741	* @param __LENGTH__ UART LIN break detection length.
AnnaBridge	171:3a7713b1edbc	742	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
AnnaBridge	171:3a7713b1edbc	743	*/
AnnaBridge	171:3a7713b1edbc	744	#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
AnnaBridge	171:3a7713b1edbc	745	((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
AnnaBridge	171:3a7713b1edbc	746	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	747
AnnaBridge	171:3a7713b1edbc	748	/**
AnnaBridge	171:3a7713b1edbc	749	* @brief Ensure that UART request parameter is valid.
AnnaBridge	171:3a7713b1edbc	750	* @param __PARAM__ UART request parameter.
AnnaBridge	171:3a7713b1edbc	751	* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
AnnaBridge	171:3a7713b1edbc	752	*/
AnnaBridge	171:3a7713b1edbc	753	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	754	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	755	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	756	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	757	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	758	((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
AnnaBridge	171:3a7713b1edbc	759	#else
AnnaBridge	171:3a7713b1edbc	760	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	761	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	762	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
AnnaBridge	171:3a7713b1edbc	763	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST))
AnnaBridge	171:3a7713b1edbc	764	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	765
AnnaBridge	171:3a7713b1edbc	766	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	767	/**
AnnaBridge	171:3a7713b1edbc	768	* @brief Ensure that UART stop mode state is valid.
AnnaBridge	171:3a7713b1edbc	769	* @param __STOPMODE__ UART stop mode state.
AnnaBridge	171:3a7713b1edbc	770	* @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
AnnaBridge	171:3a7713b1edbc	771	*/
AnnaBridge	171:3a7713b1edbc	772	#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) \|\| \
AnnaBridge	171:3a7713b1edbc	773	((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
AnnaBridge	171:3a7713b1edbc	774
AnnaBridge	171:3a7713b1edbc	775	/**
AnnaBridge	171:3a7713b1edbc	776	* @brief Ensure that UART wake-up selection is valid.
AnnaBridge	171:3a7713b1edbc	777	* @param __WAKE__ UART wake-up selection.
AnnaBridge	171:3a7713b1edbc	778	* @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
AnnaBridge	171:3a7713b1edbc	779	*/
AnnaBridge	171:3a7713b1edbc	780	#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) \|\| \
AnnaBridge	171:3a7713b1edbc	781	((__WAKE__) == UART_WAKEUP_ON_STARTBIT) \|\| \
AnnaBridge	171:3a7713b1edbc	782	((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
AnnaBridge	171:3a7713b1edbc	783	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	784
AnnaBridge	171:3a7713b1edbc	785	/**
AnnaBridge	171:3a7713b1edbc	786	* @}
AnnaBridge	171:3a7713b1edbc	787	*/
AnnaBridge	171:3a7713b1edbc	788
AnnaBridge	171:3a7713b1edbc	789	/* Exported functions --------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	790	/** @addtogroup UARTEx_Exported_Functions
AnnaBridge	171:3a7713b1edbc	791	* @{
AnnaBridge	171:3a7713b1edbc	792	*/
AnnaBridge	171:3a7713b1edbc	793
AnnaBridge	171:3a7713b1edbc	794	/** @addtogroup UARTEx_Exported_Functions_Group1
AnnaBridge	171:3a7713b1edbc	795	* @brief Extended Initialization and Configuration Functions
AnnaBridge	171:3a7713b1edbc	796	* @{
AnnaBridge	171:3a7713b1edbc	797	*/
AnnaBridge	171:3a7713b1edbc	798	/* Initialization and de-initialization functions ****************************/
AnnaBridge	171:3a7713b1edbc	799	HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t Polarity, uint32_t AssertionTime, uint32_t DeassertionTime);
AnnaBridge	171:3a7713b1edbc	800	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	801	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
AnnaBridge	171:3a7713b1edbc	802	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	803	/**
AnnaBridge	171:3a7713b1edbc	804	* @}
AnnaBridge	171:3a7713b1edbc	805	*/
AnnaBridge	171:3a7713b1edbc	806
AnnaBridge	171:3a7713b1edbc	807	/** @addtogroup UARTEx_Exported_Functions_Group2
AnnaBridge	171:3a7713b1edbc	808	* @brief Extended UART Interrupt handling function
AnnaBridge	171:3a7713b1edbc	809	* @{
AnnaBridge	171:3a7713b1edbc	810	*/
AnnaBridge	171:3a7713b1edbc	811
AnnaBridge	171:3a7713b1edbc	812	/* IO operation functions ***************************************************/
AnnaBridge	171:3a7713b1edbc	813	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	814	void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	815	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	816	/**
AnnaBridge	171:3a7713b1edbc	817	* @}
AnnaBridge	171:3a7713b1edbc	818	*/
AnnaBridge	171:3a7713b1edbc	819
AnnaBridge	171:3a7713b1edbc	820	/** @addtogroup UARTEx_Exported_Functions_Group3
AnnaBridge	171:3a7713b1edbc	821	* @brief Extended Peripheral Control functions
AnnaBridge	171:3a7713b1edbc	822	* @{
AnnaBridge	171:3a7713b1edbc	823	*/
AnnaBridge	171:3a7713b1edbc	824
AnnaBridge	171:3a7713b1edbc	825	/* Peripheral Control functions **********************************************/
AnnaBridge	171:3a7713b1edbc	826	HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
AnnaBridge	171:3a7713b1edbc	827	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6) && !defined(STM32F030xC)
AnnaBridge	171:3a7713b1edbc	828	HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
AnnaBridge	171:3a7713b1edbc	829	HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	830	HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	831	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
AnnaBridge	171:3a7713b1edbc	832	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
AnnaBridge	171:3a7713b1edbc	833	/**
AnnaBridge	171:3a7713b1edbc	834	* @}
AnnaBridge	171:3a7713b1edbc	835	*/
AnnaBridge	171:3a7713b1edbc	836	/* Peripheral State functions ************************************************/
AnnaBridge	171:3a7713b1edbc	837
AnnaBridge	171:3a7713b1edbc	838	/**
AnnaBridge	171:3a7713b1edbc	839	* @}
AnnaBridge	171:3a7713b1edbc	840	*/
AnnaBridge	171:3a7713b1edbc	841
AnnaBridge	171:3a7713b1edbc	842	/* Private functions ---------------------------------------------------------*/
AnnaBridge	171:3a7713b1edbc	843
AnnaBridge	171:3a7713b1edbc	844	/**
AnnaBridge	171:3a7713b1edbc	845	* @}
AnnaBridge	171:3a7713b1edbc	846	*/
AnnaBridge	171:3a7713b1edbc	847
AnnaBridge	171:3a7713b1edbc	848	/**
AnnaBridge	171:3a7713b1edbc	849	* @}
AnnaBridge	171:3a7713b1edbc	850	*/
AnnaBridge	171:3a7713b1edbc	851
AnnaBridge	171:3a7713b1edbc	852	#ifdef __cplusplus
AnnaBridge	171:3a7713b1edbc	853	}
AnnaBridge	171:3a7713b1edbc	854	#endif
AnnaBridge	171:3a7713b1edbc	855
AnnaBridge	171:3a7713b1edbc	856	#endif /* __STM32F0xx_HAL_UART_EX_H */
AnnaBridge	171:3a7713b1edbc	857
AnnaBridge	171:3a7713b1edbc	858	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
AnnaBridge	171:3a7713b1edbc	859