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TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f0xx_hal_uart.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f0xx_hal_uart.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of UART HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F0xx_HAL_UART_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F0xx_HAL_UART_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f0xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F0xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /** @addtogroup UART
AnnaBridge 171:3a7713b1edbc 52 * @{
AnnaBridge 171:3a7713b1edbc 53 */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 56 /** @defgroup UART_Exported_Types UART Exported Types
AnnaBridge 171:3a7713b1edbc 57 * @{
AnnaBridge 171:3a7713b1edbc 58 */
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /**
AnnaBridge 171:3a7713b1edbc 61 * @brief UART Init Structure definition
AnnaBridge 171:3a7713b1edbc 62 */
AnnaBridge 171:3a7713b1edbc 63 typedef struct
AnnaBridge 171:3a7713b1edbc 64 {
AnnaBridge 171:3a7713b1edbc 65 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
AnnaBridge 171:3a7713b1edbc 66 The baud rate register is computed using the following formula:
AnnaBridge 171:3a7713b1edbc 67 - If oversampling is 16 or in LIN mode (LIN mode not available on F030xx devices),
AnnaBridge 171:3a7713b1edbc 68 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate)))
AnnaBridge 171:3a7713b1edbc 69 - If oversampling is 8,
AnnaBridge 171:3a7713b1edbc 70 Baud Rate Register[15:4] = ((2 * PCLKx) / ((huart->Init.BaudRate)))[15:4]
AnnaBridge 171:3a7713b1edbc 71 Baud Rate Register[3] = 0
AnnaBridge 171:3a7713b1edbc 72 Baud Rate Register[2:0] = (((2 * PCLKx) / ((huart->Init.BaudRate)))[3:0]) >> 1U */
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
AnnaBridge 171:3a7713b1edbc 75 This parameter can be a value of @ref UARTEx_Word_Length. */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
AnnaBridge 171:3a7713b1edbc 78 This parameter can be a value of @ref UART_Stop_Bits. */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 uint32_t Parity; /*!< Specifies the parity mode.
AnnaBridge 171:3a7713b1edbc 81 This parameter can be a value of @ref UART_Parity
AnnaBridge 171:3a7713b1edbc 82 @note When parity is enabled, the computed parity is inserted
AnnaBridge 171:3a7713b1edbc 83 at the MSB position of the transmitted data (9th bit when
AnnaBridge 171:3a7713b1edbc 84 the word length is set to 9 data bits; 8th bit when the
AnnaBridge 171:3a7713b1edbc 85 word length is set to 8 data bits). */
AnnaBridge 171:3a7713b1edbc 86
AnnaBridge 171:3a7713b1edbc 87 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 88 This parameter can be a value of @ref UART_Mode. */
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
AnnaBridge 171:3a7713b1edbc 91 or disabled.
AnnaBridge 171:3a7713b1edbc 92 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
AnnaBridge 171:3a7713b1edbc 95 This parameter can be a value of @ref UART_Over_Sampling. */
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
AnnaBridge 171:3a7713b1edbc 98 Selecting the single sample method increases the receiver tolerance to clock
AnnaBridge 171:3a7713b1edbc 99 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
AnnaBridge 171:3a7713b1edbc 100 }UART_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 101
AnnaBridge 171:3a7713b1edbc 102 /**
AnnaBridge 171:3a7713b1edbc 103 * @brief UART Advanced Features initalization structure definition
AnnaBridge 171:3a7713b1edbc 104 */
AnnaBridge 171:3a7713b1edbc 105 typedef struct
AnnaBridge 171:3a7713b1edbc 106 {
AnnaBridge 171:3a7713b1edbc 107 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
AnnaBridge 171:3a7713b1edbc 108 Advanced Features may be initialized at the same time .
AnnaBridge 171:3a7713b1edbc 109 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
AnnaBridge 171:3a7713b1edbc 112 This parameter can be a value of @ref UART_Tx_Inv. */
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
AnnaBridge 171:3a7713b1edbc 115 This parameter can be a value of @ref UART_Rx_Inv. */
AnnaBridge 171:3a7713b1edbc 116
AnnaBridge 171:3a7713b1edbc 117 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
AnnaBridge 171:3a7713b1edbc 118 vs negative/inverted logic).
AnnaBridge 171:3a7713b1edbc 119 This parameter can be a value of @ref UART_Data_Inv. */
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
AnnaBridge 171:3a7713b1edbc 122 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
AnnaBridge 171:3a7713b1edbc 123
AnnaBridge 171:3a7713b1edbc 124 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
AnnaBridge 171:3a7713b1edbc 125 This parameter can be a value of @ref UART_Overrun_Disable. */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
AnnaBridge 171:3a7713b1edbc 128 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
AnnaBridge 171:3a7713b1edbc 129
AnnaBridge 171:3a7713b1edbc 130 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
AnnaBridge 171:3a7713b1edbc 131 This parameter can be a value of @ref UART_AutoBaudRate_Enable */
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
AnnaBridge 171:3a7713b1edbc 134 detection is carried out.
AnnaBridge 171:3a7713b1edbc 135 This parameter can be a value of @ref UARTEx_AutoBaud_Rate_Mode. */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
AnnaBridge 171:3a7713b1edbc 138 This parameter can be a value of @ref UART_MSB_First. */
AnnaBridge 171:3a7713b1edbc 139 } UART_AdvFeatureInitTypeDef;
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142
AnnaBridge 171:3a7713b1edbc 143 /**
AnnaBridge 171:3a7713b1edbc 144 * @brief HAL UART State structures definition
AnnaBridge 171:3a7713b1edbc 145 * @note HAL UART State value is a combination of 2 different substates: gState and RxState.
AnnaBridge 171:3a7713b1edbc 146 * - gState contains UART state information related to global Handle management
AnnaBridge 171:3a7713b1edbc 147 * and also information related to Tx operations.
AnnaBridge 171:3a7713b1edbc 148 * gState value coding follow below described bitmap :
AnnaBridge 171:3a7713b1edbc 149 * b7-b6 Error information
AnnaBridge 171:3a7713b1edbc 150 * 00 : No Error
AnnaBridge 171:3a7713b1edbc 151 * 01 : (Not Used)
AnnaBridge 171:3a7713b1edbc 152 * 10 : Timeout
AnnaBridge 171:3a7713b1edbc 153 * 11 : Error
AnnaBridge 171:3a7713b1edbc 154 * b5 IP initilisation status
AnnaBridge 171:3a7713b1edbc 155 * 0 : Reset (IP not initialized)
AnnaBridge 171:3a7713b1edbc 156 * 1 : Init done (IP not initialized. HAL UART Init function already called)
AnnaBridge 171:3a7713b1edbc 157 * b4-b3 (not used)
AnnaBridge 171:3a7713b1edbc 158 * xx : Should be set to 00
AnnaBridge 171:3a7713b1edbc 159 * b2 Intrinsic process state
AnnaBridge 171:3a7713b1edbc 160 * 0 : Ready
AnnaBridge 171:3a7713b1edbc 161 * 1 : Busy (IP busy with some configuration or internal operations)
AnnaBridge 171:3a7713b1edbc 162 * b1 (not used)
AnnaBridge 171:3a7713b1edbc 163 * x : Should be set to 0
AnnaBridge 171:3a7713b1edbc 164 * b0 Tx state
AnnaBridge 171:3a7713b1edbc 165 * 0 : Ready (no Tx operation ongoing)
AnnaBridge 171:3a7713b1edbc 166 * 1 : Busy (Tx operation ongoing)
AnnaBridge 171:3a7713b1edbc 167 * - RxState contains information related to Rx operations.
AnnaBridge 171:3a7713b1edbc 168 * RxState value coding follow below described bitmap :
AnnaBridge 171:3a7713b1edbc 169 * b7-b6 (not used)
AnnaBridge 171:3a7713b1edbc 170 * xx : Should be set to 00
AnnaBridge 171:3a7713b1edbc 171 * b5 IP initilisation status
AnnaBridge 171:3a7713b1edbc 172 * 0 : Reset (IP not initialized)
AnnaBridge 171:3a7713b1edbc 173 * 1 : Init done (IP not initialized)
AnnaBridge 171:3a7713b1edbc 174 * b4-b2 (not used)
AnnaBridge 171:3a7713b1edbc 175 * xxx : Should be set to 000
AnnaBridge 171:3a7713b1edbc 176 * b1 Rx state
AnnaBridge 171:3a7713b1edbc 177 * 0 : Ready (no Rx operation ongoing)
AnnaBridge 171:3a7713b1edbc 178 * 1 : Busy (Rx operation ongoing)
AnnaBridge 171:3a7713b1edbc 179 * b0 (not used)
AnnaBridge 171:3a7713b1edbc 180 * x : Should be set to 0.
AnnaBridge 171:3a7713b1edbc 181 */
AnnaBridge 171:3a7713b1edbc 182 typedef enum
AnnaBridge 171:3a7713b1edbc 183 {
AnnaBridge 171:3a7713b1edbc 184 HAL_UART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized
AnnaBridge 171:3a7713b1edbc 185 Value is allowed for gState and RxState */
AnnaBridge 171:3a7713b1edbc 186 HAL_UART_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use
AnnaBridge 171:3a7713b1edbc 187 Value is allowed for gState and RxState */
AnnaBridge 171:3a7713b1edbc 188 HAL_UART_STATE_BUSY = 0x24U, /*!< an internal process is ongoing
AnnaBridge 171:3a7713b1edbc 189 Value is allowed for gState only */
AnnaBridge 171:3a7713b1edbc 190 HAL_UART_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing
AnnaBridge 171:3a7713b1edbc 191 Value is allowed for gState only */
AnnaBridge 171:3a7713b1edbc 192 HAL_UART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing
AnnaBridge 171:3a7713b1edbc 193 Value is allowed for RxState only */
AnnaBridge 171:3a7713b1edbc 194 HAL_UART_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing
AnnaBridge 171:3a7713b1edbc 195 Not to be used for neither gState nor RxState.
AnnaBridge 171:3a7713b1edbc 196 Value is result of combination (Or) between gState and RxState values */
AnnaBridge 171:3a7713b1edbc 197 HAL_UART_STATE_TIMEOUT = 0xA0U, /*!< Timeout state
AnnaBridge 171:3a7713b1edbc 198 Value is allowed for gState only */
AnnaBridge 171:3a7713b1edbc 199 HAL_UART_STATE_ERROR = 0xE0U /*!< Error
AnnaBridge 171:3a7713b1edbc 200 Value is allowed for gState only */
AnnaBridge 171:3a7713b1edbc 201 }HAL_UART_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 /**
AnnaBridge 171:3a7713b1edbc 204 * @brief UART clock sources definition
AnnaBridge 171:3a7713b1edbc 205 */
AnnaBridge 171:3a7713b1edbc 206 typedef enum
AnnaBridge 171:3a7713b1edbc 207 {
AnnaBridge 171:3a7713b1edbc 208 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
AnnaBridge 171:3a7713b1edbc 209 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
AnnaBridge 171:3a7713b1edbc 210 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
AnnaBridge 171:3a7713b1edbc 211 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
AnnaBridge 171:3a7713b1edbc 212 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
AnnaBridge 171:3a7713b1edbc 213 }UART_ClockSourceTypeDef;
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 /**
AnnaBridge 171:3a7713b1edbc 216 * @brief UART handle Structure definition
AnnaBridge 171:3a7713b1edbc 217 */
AnnaBridge 171:3a7713b1edbc 218 typedef struct
AnnaBridge 171:3a7713b1edbc 219 {
AnnaBridge 171:3a7713b1edbc 220 USART_TypeDef *Instance; /*!< UART registers base address */
AnnaBridge 171:3a7713b1edbc 221
AnnaBridge 171:3a7713b1edbc 222 UART_InitTypeDef Init; /*!< UART communication parameters */
AnnaBridge 171:3a7713b1edbc 223
AnnaBridge 171:3a7713b1edbc 224 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
AnnaBridge 171:3a7713b1edbc 225
AnnaBridge 171:3a7713b1edbc 226 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 uint16_t TxXferSize; /*!< UART Tx Transfer size */
AnnaBridge 171:3a7713b1edbc 229
AnnaBridge 171:3a7713b1edbc 230 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
AnnaBridge 171:3a7713b1edbc 231
AnnaBridge 171:3a7713b1edbc 232 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
AnnaBridge 171:3a7713b1edbc 233
AnnaBridge 171:3a7713b1edbc 234 uint16_t RxXferSize; /*!< UART Rx Transfer size */
AnnaBridge 171:3a7713b1edbc 235
AnnaBridge 171:3a7713b1edbc 236 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
AnnaBridge 171:3a7713b1edbc 237
AnnaBridge 171:3a7713b1edbc 238 uint16_t Mask; /*!< UART Rx RDR register mask */
AnnaBridge 171:3a7713b1edbc 239
AnnaBridge 171:3a7713b1edbc 240 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
AnnaBridge 171:3a7713b1edbc 243
AnnaBridge 171:3a7713b1edbc 244 HAL_LockTypeDef Lock; /*!< Locking object */
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
AnnaBridge 171:3a7713b1edbc 247 and also related to Tx operations.
AnnaBridge 171:3a7713b1edbc 248 This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge 171:3a7713b1edbc 249
AnnaBridge 171:3a7713b1edbc 250 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
AnnaBridge 171:3a7713b1edbc 251 This parameter can be a value of @ref HAL_UART_StateTypeDef */
AnnaBridge 171:3a7713b1edbc 252
AnnaBridge 171:3a7713b1edbc 253 __IO uint32_t ErrorCode; /*!< UART Error code */
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 }UART_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 256
AnnaBridge 171:3a7713b1edbc 257 /**
AnnaBridge 171:3a7713b1edbc 258 * @}
AnnaBridge 171:3a7713b1edbc 259 */
AnnaBridge 171:3a7713b1edbc 260
AnnaBridge 171:3a7713b1edbc 261 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 262 /** @defgroup UART_Exported_Constants UART Exported Constants
AnnaBridge 171:3a7713b1edbc 263 * @{
AnnaBridge 171:3a7713b1edbc 264 */
AnnaBridge 171:3a7713b1edbc 265
AnnaBridge 171:3a7713b1edbc 266 /** @defgroup UART_Error UART Error
AnnaBridge 171:3a7713b1edbc 267 * @{
AnnaBridge 171:3a7713b1edbc 268 */
AnnaBridge 171:3a7713b1edbc 269 #define HAL_UART_ERROR_NONE (0x00000000U) /*!< No error */
AnnaBridge 171:3a7713b1edbc 270 #define HAL_UART_ERROR_PE (0x00000001U) /*!< Parity error */
AnnaBridge 171:3a7713b1edbc 271 #define HAL_UART_ERROR_NE (0x00000002U) /*!< Noise error */
AnnaBridge 171:3a7713b1edbc 272 #define HAL_UART_ERROR_FE (0x00000004U) /*!< frame error */
AnnaBridge 171:3a7713b1edbc 273 #define HAL_UART_ERROR_ORE (0x00000008U) /*!< Overrun error */
AnnaBridge 171:3a7713b1edbc 274 #define HAL_UART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
AnnaBridge 171:3a7713b1edbc 275 #define HAL_UART_ERROR_BUSY (0x00000020U) /*!< Busy Error */
AnnaBridge 171:3a7713b1edbc 276 /**
AnnaBridge 171:3a7713b1edbc 277 * @}
AnnaBridge 171:3a7713b1edbc 278 */
AnnaBridge 171:3a7713b1edbc 279
AnnaBridge 171:3a7713b1edbc 280 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
AnnaBridge 171:3a7713b1edbc 281 * @{
AnnaBridge 171:3a7713b1edbc 282 */
AnnaBridge 171:3a7713b1edbc 283 #ifdef USART_SMARTCARD_SUPPORT
AnnaBridge 171:3a7713b1edbc 284 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
AnnaBridge 171:3a7713b1edbc 285 #define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
AnnaBridge 171:3a7713b1edbc 286 #define UART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< UART frame with 1.5 stop bits */
AnnaBridge 171:3a7713b1edbc 287 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< UART frame with 2 stop bits */
AnnaBridge 171:3a7713b1edbc 288 #else
AnnaBridge 171:3a7713b1edbc 289 #define UART_STOPBITS_1 (0x00000000U) /*!< UART frame with 1 stop bit */
AnnaBridge 171:3a7713b1edbc 290 #define UART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< UART frame with 2 stop bits */
AnnaBridge 171:3a7713b1edbc 291 #endif
AnnaBridge 171:3a7713b1edbc 292 /**
AnnaBridge 171:3a7713b1edbc 293 * @}
AnnaBridge 171:3a7713b1edbc 294 */
AnnaBridge 171:3a7713b1edbc 295
AnnaBridge 171:3a7713b1edbc 296 /** @defgroup UART_Parity UART Parity
AnnaBridge 171:3a7713b1edbc 297 * @{
AnnaBridge 171:3a7713b1edbc 298 */
AnnaBridge 171:3a7713b1edbc 299 #define UART_PARITY_NONE (0x00000000U) /*!< No parity */
AnnaBridge 171:3a7713b1edbc 300 #define UART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
AnnaBridge 171:3a7713b1edbc 301 #define UART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
AnnaBridge 171:3a7713b1edbc 302 /**
AnnaBridge 171:3a7713b1edbc 303 * @}
AnnaBridge 171:3a7713b1edbc 304 */
AnnaBridge 171:3a7713b1edbc 305
AnnaBridge 171:3a7713b1edbc 306 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
AnnaBridge 171:3a7713b1edbc 307 * @{
AnnaBridge 171:3a7713b1edbc 308 */
AnnaBridge 171:3a7713b1edbc 309 #define UART_HWCONTROL_NONE (0x00000000U) /*!< No hardware control */
AnnaBridge 171:3a7713b1edbc 310 #define UART_HWCONTROL_RTS ((uint32_t)USART_CR3_RTSE) /*!< Request To Send */
AnnaBridge 171:3a7713b1edbc 311 #define UART_HWCONTROL_CTS ((uint32_t)USART_CR3_CTSE) /*!< Clear To Send */
AnnaBridge 171:3a7713b1edbc 312 #define UART_HWCONTROL_RTS_CTS ((uint32_t)(USART_CR3_RTSE | USART_CR3_CTSE)) /*!< Request and Clear To Send */
AnnaBridge 171:3a7713b1edbc 313 /**
AnnaBridge 171:3a7713b1edbc 314 * @}
AnnaBridge 171:3a7713b1edbc 315 */
AnnaBridge 171:3a7713b1edbc 316
AnnaBridge 171:3a7713b1edbc 317 /** @defgroup UART_Mode UART Transfer Mode
AnnaBridge 171:3a7713b1edbc 318 * @{
AnnaBridge 171:3a7713b1edbc 319 */
AnnaBridge 171:3a7713b1edbc 320 #define UART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
AnnaBridge 171:3a7713b1edbc 321 #define UART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
AnnaBridge 171:3a7713b1edbc 322 #define UART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
AnnaBridge 171:3a7713b1edbc 323 /**
AnnaBridge 171:3a7713b1edbc 324 * @}
AnnaBridge 171:3a7713b1edbc 325 */
AnnaBridge 171:3a7713b1edbc 326
AnnaBridge 171:3a7713b1edbc 327 /** @defgroup UART_State UART State
AnnaBridge 171:3a7713b1edbc 328 * @{
AnnaBridge 171:3a7713b1edbc 329 */
AnnaBridge 171:3a7713b1edbc 330 #define UART_STATE_DISABLE (0x00000000U) /*!< UART disabled */
AnnaBridge 171:3a7713b1edbc 331 #define UART_STATE_ENABLE ((uint32_t)USART_CR1_UE) /*!< UART enabled */
AnnaBridge 171:3a7713b1edbc 332 /**
AnnaBridge 171:3a7713b1edbc 333 * @}
AnnaBridge 171:3a7713b1edbc 334 */
AnnaBridge 171:3a7713b1edbc 335
AnnaBridge 171:3a7713b1edbc 336 /** @defgroup UART_Over_Sampling UART Over Sampling
AnnaBridge 171:3a7713b1edbc 337 * @{
AnnaBridge 171:3a7713b1edbc 338 */
AnnaBridge 171:3a7713b1edbc 339 #define UART_OVERSAMPLING_16 (0x00000000U) /*!< Oversampling by 16 */
AnnaBridge 171:3a7713b1edbc 340 #define UART_OVERSAMPLING_8 ((uint32_t)USART_CR1_OVER8) /*!< Oversampling by 8 */
AnnaBridge 171:3a7713b1edbc 341 /**
AnnaBridge 171:3a7713b1edbc 342 * @}
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344
AnnaBridge 171:3a7713b1edbc 345 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
AnnaBridge 171:3a7713b1edbc 346 * @{
AnnaBridge 171:3a7713b1edbc 347 */
AnnaBridge 171:3a7713b1edbc 348 #define UART_ONE_BIT_SAMPLE_DISABLE (0x00000000U) /*!< One-bit sampling disable */
AnnaBridge 171:3a7713b1edbc 349 #define UART_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT) /*!< One-bit sampling enable */
AnnaBridge 171:3a7713b1edbc 350 /**
AnnaBridge 171:3a7713b1edbc 351 * @}
AnnaBridge 171:3a7713b1edbc 352 */
AnnaBridge 171:3a7713b1edbc 353
AnnaBridge 171:3a7713b1edbc 354 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
AnnaBridge 171:3a7713b1edbc 355 * @{
AnnaBridge 171:3a7713b1edbc 356 */
AnnaBridge 171:3a7713b1edbc 357 #define UART_RECEIVER_TIMEOUT_DISABLE (0x00000000U) /*!< UART receiver timeout disable */
AnnaBridge 171:3a7713b1edbc 358 #define UART_RECEIVER_TIMEOUT_ENABLE ((uint32_t)USART_CR2_RTOEN) /*!< UART receiver timeout enable */
AnnaBridge 171:3a7713b1edbc 359 /**
AnnaBridge 171:3a7713b1edbc 360 * @}
AnnaBridge 171:3a7713b1edbc 361 */
AnnaBridge 171:3a7713b1edbc 362
AnnaBridge 171:3a7713b1edbc 363 /** @defgroup UART_DMA_Tx UART DMA Tx
AnnaBridge 171:3a7713b1edbc 364 * @{
AnnaBridge 171:3a7713b1edbc 365 */
AnnaBridge 171:3a7713b1edbc 366 #define UART_DMA_TX_DISABLE (0x00000000U) /*!< UART DMA TX disabled */
AnnaBridge 171:3a7713b1edbc 367 #define UART_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT) /*!< UART DMA TX enabled */
AnnaBridge 171:3a7713b1edbc 368 /**
AnnaBridge 171:3a7713b1edbc 369 * @}
AnnaBridge 171:3a7713b1edbc 370 */
AnnaBridge 171:3a7713b1edbc 371
AnnaBridge 171:3a7713b1edbc 372 /** @defgroup UART_DMA_Rx UART DMA Rx
AnnaBridge 171:3a7713b1edbc 373 * @{
AnnaBridge 171:3a7713b1edbc 374 */
AnnaBridge 171:3a7713b1edbc 375 #define UART_DMA_RX_DISABLE (0x00000000U) /*!< UART DMA RX disabled */
AnnaBridge 171:3a7713b1edbc 376 #define UART_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR) /*!< UART DMA RX enabled */
AnnaBridge 171:3a7713b1edbc 377 /**
AnnaBridge 171:3a7713b1edbc 378 * @}
AnnaBridge 171:3a7713b1edbc 379 */
AnnaBridge 171:3a7713b1edbc 380
AnnaBridge 171:3a7713b1edbc 381 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
AnnaBridge 171:3a7713b1edbc 382 * @{
AnnaBridge 171:3a7713b1edbc 383 */
AnnaBridge 171:3a7713b1edbc 384 #define UART_HALF_DUPLEX_DISABLE (0x00000000U) /*!< UART half-duplex disabled */
AnnaBridge 171:3a7713b1edbc 385 #define UART_HALF_DUPLEX_ENABLE ((uint32_t)USART_CR3_HDSEL) /*!< UART half-duplex enabled */
AnnaBridge 171:3a7713b1edbc 386 /**
AnnaBridge 171:3a7713b1edbc 387 * @}
AnnaBridge 171:3a7713b1edbc 388 */
AnnaBridge 171:3a7713b1edbc 389
AnnaBridge 171:3a7713b1edbc 390 /** @defgroup UART_WakeUp_Address_Length UART WakeUp Address Length
AnnaBridge 171:3a7713b1edbc 391 * @{
AnnaBridge 171:3a7713b1edbc 392 */
AnnaBridge 171:3a7713b1edbc 393 #define UART_ADDRESS_DETECT_4B (0x00000000U) /*!< 4-bit long wake-up address */
AnnaBridge 171:3a7713b1edbc 394 #define UART_ADDRESS_DETECT_7B ((uint32_t)USART_CR2_ADDM7) /*!< 7-bit long wake-up address */
AnnaBridge 171:3a7713b1edbc 395 /**
AnnaBridge 171:3a7713b1edbc 396 * @}
AnnaBridge 171:3a7713b1edbc 397 */
AnnaBridge 171:3a7713b1edbc 398
AnnaBridge 171:3a7713b1edbc 399 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
AnnaBridge 171:3a7713b1edbc 400 * @{
AnnaBridge 171:3a7713b1edbc 401 */
AnnaBridge 171:3a7713b1edbc 402 #define UART_WAKEUPMETHOD_IDLELINE (0x00000000U) /*!< UART wake-up on idle line */
AnnaBridge 171:3a7713b1edbc 403 #define UART_WAKEUPMETHOD_ADDRESSMARK ((uint32_t)USART_CR1_WAKE) /*!< UART wake-up on address mark */
AnnaBridge 171:3a7713b1edbc 404 /**
AnnaBridge 171:3a7713b1edbc 405 * @}
AnnaBridge 171:3a7713b1edbc 406 */
AnnaBridge 171:3a7713b1edbc 407
AnnaBridge 171:3a7713b1edbc 408 /** @defgroup UART_IT UART IT
AnnaBridge 171:3a7713b1edbc 409 * Elements values convention: 0000ZZZZ0XXYYYYYb
AnnaBridge 171:3a7713b1edbc 410 * - YYYYY : Interrupt source position in the XX register (5bits)
AnnaBridge 171:3a7713b1edbc 411 * - XX : Interrupt source register (2bits)
AnnaBridge 171:3a7713b1edbc 412 * - 01: CR1 register
AnnaBridge 171:3a7713b1edbc 413 * - 10: CR2 register
AnnaBridge 171:3a7713b1edbc 414 * - 11: CR3 register
AnnaBridge 171:3a7713b1edbc 415 * - ZZZZ : Flag position in the ISR register(4bits)
AnnaBridge 171:3a7713b1edbc 416 * @{
AnnaBridge 171:3a7713b1edbc 417 */
AnnaBridge 171:3a7713b1edbc 418 #define UART_IT_ERR (0x0060U) /*!< UART error interruption */
AnnaBridge 171:3a7713b1edbc 419 #define UART_IT_ORE (0x0300U) /*!< UART overrun error interruption */
AnnaBridge 171:3a7713b1edbc 420 #define UART_IT_NE (0x0200U) /*!< UART noise error interruption */
AnnaBridge 171:3a7713b1edbc 421 #define UART_IT_FE (0x0100U) /*!< UART frame error interruption */
AnnaBridge 171:3a7713b1edbc 422 /**
AnnaBridge 171:3a7713b1edbc 423 * @}
AnnaBridge 171:3a7713b1edbc 424 */
AnnaBridge 171:3a7713b1edbc 425
AnnaBridge 171:3a7713b1edbc 426 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
AnnaBridge 171:3a7713b1edbc 427 * @{
AnnaBridge 171:3a7713b1edbc 428 */
AnnaBridge 171:3a7713b1edbc 429 #define UART_ADVFEATURE_NO_INIT (0x00000000U) /*!< No advanced feature initialization */
AnnaBridge 171:3a7713b1edbc 430 #define UART_ADVFEATURE_TXINVERT_INIT (0x00000001U) /*!< TX pin active level inversion */
AnnaBridge 171:3a7713b1edbc 431 #define UART_ADVFEATURE_RXINVERT_INIT (0x00000002U) /*!< RX pin active level inversion */
AnnaBridge 171:3a7713b1edbc 432 #define UART_ADVFEATURE_DATAINVERT_INIT (0x00000004U) /*!< Binary data inversion */
AnnaBridge 171:3a7713b1edbc 433 #define UART_ADVFEATURE_SWAP_INIT (0x00000008U) /*!< TX/RX pins swap */
AnnaBridge 171:3a7713b1edbc 434 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT (0x00000010U) /*!< RX overrun disable */
AnnaBridge 171:3a7713b1edbc 435 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT (0x00000020U) /*!< DMA disable on Reception Error */
AnnaBridge 171:3a7713b1edbc 436 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT (0x00000040U) /*!< Auto Baud rate detection initialization */
AnnaBridge 171:3a7713b1edbc 437 #define UART_ADVFEATURE_MSBFIRST_INIT (0x00000080U) /*!< Most significant bit sent/received first */
AnnaBridge 171:3a7713b1edbc 438 /**
AnnaBridge 171:3a7713b1edbc 439 * @}
AnnaBridge 171:3a7713b1edbc 440 */
AnnaBridge 171:3a7713b1edbc 441
AnnaBridge 171:3a7713b1edbc 442 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
AnnaBridge 171:3a7713b1edbc 443 * @{
AnnaBridge 171:3a7713b1edbc 444 */
AnnaBridge 171:3a7713b1edbc 445 #define UART_ADVFEATURE_TXINV_DISABLE (0x00000000U) /*!< TX pin active level inversion disable */
AnnaBridge 171:3a7713b1edbc 446 #define UART_ADVFEATURE_TXINV_ENABLE ((uint32_t)USART_CR2_TXINV) /*!< TX pin active level inversion enable */
AnnaBridge 171:3a7713b1edbc 447 /**
AnnaBridge 171:3a7713b1edbc 448 * @}
AnnaBridge 171:3a7713b1edbc 449 */
AnnaBridge 171:3a7713b1edbc 450
AnnaBridge 171:3a7713b1edbc 451 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
AnnaBridge 171:3a7713b1edbc 452 * @{
AnnaBridge 171:3a7713b1edbc 453 */
AnnaBridge 171:3a7713b1edbc 454 #define UART_ADVFEATURE_RXINV_DISABLE (0x00000000U) /*!< RX pin active level inversion disable */
AnnaBridge 171:3a7713b1edbc 455 #define UART_ADVFEATURE_RXINV_ENABLE ((uint32_t)USART_CR2_RXINV) /*!< RX pin active level inversion enable */
AnnaBridge 171:3a7713b1edbc 456 /**
AnnaBridge 171:3a7713b1edbc 457 * @}
AnnaBridge 171:3a7713b1edbc 458 */
AnnaBridge 171:3a7713b1edbc 459
AnnaBridge 171:3a7713b1edbc 460 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
AnnaBridge 171:3a7713b1edbc 461 * @{
AnnaBridge 171:3a7713b1edbc 462 */
AnnaBridge 171:3a7713b1edbc 463 #define UART_ADVFEATURE_DATAINV_DISABLE (0x00000000U) /*!< Binary data inversion disable */
AnnaBridge 171:3a7713b1edbc 464 #define UART_ADVFEATURE_DATAINV_ENABLE ((uint32_t)USART_CR2_DATAINV) /*!< Binary data inversion enable */
AnnaBridge 171:3a7713b1edbc 465 /**
AnnaBridge 171:3a7713b1edbc 466 * @}
AnnaBridge 171:3a7713b1edbc 467 */
AnnaBridge 171:3a7713b1edbc 468
AnnaBridge 171:3a7713b1edbc 469 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
AnnaBridge 171:3a7713b1edbc 470 * @{
AnnaBridge 171:3a7713b1edbc 471 */
AnnaBridge 171:3a7713b1edbc 472 #define UART_ADVFEATURE_SWAP_DISABLE (0x00000000U) /*!< TX/RX pins swap disable */
AnnaBridge 171:3a7713b1edbc 473 #define UART_ADVFEATURE_SWAP_ENABLE ((uint32_t)USART_CR2_SWAP) /*!< TX/RX pins swap enable */
AnnaBridge 171:3a7713b1edbc 474 /**
AnnaBridge 171:3a7713b1edbc 475 * @}
AnnaBridge 171:3a7713b1edbc 476 */
AnnaBridge 171:3a7713b1edbc 477
AnnaBridge 171:3a7713b1edbc 478 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
AnnaBridge 171:3a7713b1edbc 479 * @{
AnnaBridge 171:3a7713b1edbc 480 */
AnnaBridge 171:3a7713b1edbc 481 #define UART_ADVFEATURE_OVERRUN_ENABLE (0x00000000U) /*!< RX overrun enable */
AnnaBridge 171:3a7713b1edbc 482 #define UART_ADVFEATURE_OVERRUN_DISABLE ((uint32_t)USART_CR3_OVRDIS) /*!< RX overrun disable */
AnnaBridge 171:3a7713b1edbc 483 /**
AnnaBridge 171:3a7713b1edbc 484 * @}
AnnaBridge 171:3a7713b1edbc 485 */
AnnaBridge 171:3a7713b1edbc 486
AnnaBridge 171:3a7713b1edbc 487 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
AnnaBridge 171:3a7713b1edbc 488 * @{
AnnaBridge 171:3a7713b1edbc 489 */
AnnaBridge 171:3a7713b1edbc 490 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE (0x00000000U) /*!< RX Auto Baud rate detection enable */
AnnaBridge 171:3a7713b1edbc 491 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE ((uint32_t)USART_CR2_ABREN) /*!< RX Auto Baud rate detection disable */
AnnaBridge 171:3a7713b1edbc 492 /**
AnnaBridge 171:3a7713b1edbc 493 * @}
AnnaBridge 171:3a7713b1edbc 494 */
AnnaBridge 171:3a7713b1edbc 495
AnnaBridge 171:3a7713b1edbc 496 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
AnnaBridge 171:3a7713b1edbc 497 * @{
AnnaBridge 171:3a7713b1edbc 498 */
AnnaBridge 171:3a7713b1edbc 499 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR (0x00000000U) /*!< DMA enable on Reception Error */
AnnaBridge 171:3a7713b1edbc 500 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR ((uint32_t)USART_CR3_DDRE) /*!< DMA disable on Reception Error */
AnnaBridge 171:3a7713b1edbc 501 /**
AnnaBridge 171:3a7713b1edbc 502 * @}
AnnaBridge 171:3a7713b1edbc 503 */
AnnaBridge 171:3a7713b1edbc 504
AnnaBridge 171:3a7713b1edbc 505 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
AnnaBridge 171:3a7713b1edbc 506 * @{
AnnaBridge 171:3a7713b1edbc 507 */
AnnaBridge 171:3a7713b1edbc 508 #define UART_ADVFEATURE_MSBFIRST_DISABLE (0x00000000U) /*!< Most significant bit sent/received first disable */
AnnaBridge 171:3a7713b1edbc 509 #define UART_ADVFEATURE_MSBFIRST_ENABLE ((uint32_t)USART_CR2_MSBFIRST) /*!< Most significant bit sent/received first enable */
AnnaBridge 171:3a7713b1edbc 510 /**
AnnaBridge 171:3a7713b1edbc 511 * @}
AnnaBridge 171:3a7713b1edbc 512 */
AnnaBridge 171:3a7713b1edbc 513
AnnaBridge 171:3a7713b1edbc 514 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
AnnaBridge 171:3a7713b1edbc 515 * @{
AnnaBridge 171:3a7713b1edbc 516 */
AnnaBridge 171:3a7713b1edbc 517 #define UART_ADVFEATURE_MUTEMODE_DISABLE (0x00000000U) /*!< UART mute mode disable */
AnnaBridge 171:3a7713b1edbc 518 #define UART_ADVFEATURE_MUTEMODE_ENABLE ((uint32_t)USART_CR1_MME) /*!< UART mute mode enable */
AnnaBridge 171:3a7713b1edbc 519 /**
AnnaBridge 171:3a7713b1edbc 520 * @}
AnnaBridge 171:3a7713b1edbc 521 */
AnnaBridge 171:3a7713b1edbc 522
AnnaBridge 171:3a7713b1edbc 523 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
AnnaBridge 171:3a7713b1edbc 524 * @{
AnnaBridge 171:3a7713b1edbc 525 */
AnnaBridge 171:3a7713b1edbc 526 #define UART_CR2_ADDRESS_LSB_POS ( 24U) /*!< UART address-matching LSB position in CR2 register */
AnnaBridge 171:3a7713b1edbc 527 /**
AnnaBridge 171:3a7713b1edbc 528 * @}
AnnaBridge 171:3a7713b1edbc 529 */
AnnaBridge 171:3a7713b1edbc 530
AnnaBridge 171:3a7713b1edbc 531 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
AnnaBridge 171:3a7713b1edbc 532 * @{
AnnaBridge 171:3a7713b1edbc 533 */
AnnaBridge 171:3a7713b1edbc 534 #define UART_DE_POLARITY_HIGH (0x00000000U) /*!< Driver enable signal is active high */
AnnaBridge 171:3a7713b1edbc 535 #define UART_DE_POLARITY_LOW ((uint32_t)USART_CR3_DEP) /*!< Driver enable signal is active low */
AnnaBridge 171:3a7713b1edbc 536 /**
AnnaBridge 171:3a7713b1edbc 537 * @}
AnnaBridge 171:3a7713b1edbc 538 */
AnnaBridge 171:3a7713b1edbc 539
AnnaBridge 171:3a7713b1edbc 540 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
AnnaBridge 171:3a7713b1edbc 541 * @{
AnnaBridge 171:3a7713b1edbc 542 */
AnnaBridge 171:3a7713b1edbc 543 #define UART_CR1_DEAT_ADDRESS_LSB_POS ( 21U) /*!< UART Driver Enable assertion time LSB position in CR1 register */
AnnaBridge 171:3a7713b1edbc 544 /**
AnnaBridge 171:3a7713b1edbc 545 * @}
AnnaBridge 171:3a7713b1edbc 546 */
AnnaBridge 171:3a7713b1edbc 547
AnnaBridge 171:3a7713b1edbc 548 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
AnnaBridge 171:3a7713b1edbc 549 * @{
AnnaBridge 171:3a7713b1edbc 550 */
AnnaBridge 171:3a7713b1edbc 551 #define UART_CR1_DEDT_ADDRESS_LSB_POS ( 16U) /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
AnnaBridge 171:3a7713b1edbc 552 /**
AnnaBridge 171:3a7713b1edbc 553 * @}
AnnaBridge 171:3a7713b1edbc 554 */
AnnaBridge 171:3a7713b1edbc 555
AnnaBridge 171:3a7713b1edbc 556 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
AnnaBridge 171:3a7713b1edbc 557 * @{
AnnaBridge 171:3a7713b1edbc 558 */
AnnaBridge 171:3a7713b1edbc 559 #define UART_IT_MASK (0x001FU) /*!< UART interruptions flags mask */
AnnaBridge 171:3a7713b1edbc 560 /**
AnnaBridge 171:3a7713b1edbc 561 * @}
AnnaBridge 171:3a7713b1edbc 562 */
AnnaBridge 171:3a7713b1edbc 563
AnnaBridge 171:3a7713b1edbc 564 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
AnnaBridge 171:3a7713b1edbc 565 * @{
AnnaBridge 171:3a7713b1edbc 566 */
AnnaBridge 171:3a7713b1edbc 567 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
AnnaBridge 171:3a7713b1edbc 568 /**
AnnaBridge 171:3a7713b1edbc 569 * @}
AnnaBridge 171:3a7713b1edbc 570 */
AnnaBridge 171:3a7713b1edbc 571
AnnaBridge 171:3a7713b1edbc 572
AnnaBridge 171:3a7713b1edbc 573 /**
AnnaBridge 171:3a7713b1edbc 574 * @}
AnnaBridge 171:3a7713b1edbc 575 */
AnnaBridge 171:3a7713b1edbc 576
AnnaBridge 171:3a7713b1edbc 577 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 578 /** @defgroup UART_Exported_Macros UART Exported Macros
AnnaBridge 171:3a7713b1edbc 579 * @{
AnnaBridge 171:3a7713b1edbc 580 */
AnnaBridge 171:3a7713b1edbc 581
AnnaBridge 171:3a7713b1edbc 582 /** @brief Reset UART handle states.
AnnaBridge 171:3a7713b1edbc 583 * @param __HANDLE__ UART handle.
AnnaBridge 171:3a7713b1edbc 584 * @retval None
AnnaBridge 171:3a7713b1edbc 585 */
AnnaBridge 171:3a7713b1edbc 586 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
AnnaBridge 171:3a7713b1edbc 587 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
AnnaBridge 171:3a7713b1edbc 588 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
AnnaBridge 171:3a7713b1edbc 589 } while(0)
AnnaBridge 171:3a7713b1edbc 590
AnnaBridge 171:3a7713b1edbc 591 /** @brief Clear the specified UART pending flag.
AnnaBridge 171:3a7713b1edbc 592 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 593 * @param __FLAG__ specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 594 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 595 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge 171:3a7713b1edbc 596 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge 171:3a7713b1edbc 597 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge 171:3a7713b1edbc 598 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge 171:3a7713b1edbc 599 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge 171:3a7713b1edbc 600 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge 171:3a7713b1edbc 601 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 602 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 603 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 604 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 605 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 606 @else
AnnaBridge 171:3a7713b1edbc 607 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on all devices)
AnnaBridge 171:3a7713b1edbc 608 @endif
AnnaBridge 171:3a7713b1edbc 609 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
AnnaBridge 171:3a7713b1edbc 610 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
AnnaBridge 171:3a7713b1edbc 611 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 612 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 613 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 614 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 615 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 616 @else
AnnaBridge 171:3a7713b1edbc 617 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag (not available on all devices)
AnnaBridge 171:3a7713b1edbc 618 @endif
AnnaBridge 171:3a7713b1edbc 619 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
AnnaBridge 171:3a7713b1edbc 620 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 621 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 622 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 623 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 624 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 625 @else
AnnaBridge 171:3a7713b1edbc 626 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on all devices)
AnnaBridge 171:3a7713b1edbc 627 @endif
AnnaBridge 171:3a7713b1edbc 628 * @retval None
AnnaBridge 171:3a7713b1edbc 629 */
AnnaBridge 171:3a7713b1edbc 630 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 171:3a7713b1edbc 631
AnnaBridge 171:3a7713b1edbc 632 /** @brief Clear the UART PE pending flag.
AnnaBridge 171:3a7713b1edbc 633 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 634 * @retval None
AnnaBridge 171:3a7713b1edbc 635 */
AnnaBridge 171:3a7713b1edbc 636 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
AnnaBridge 171:3a7713b1edbc 637
AnnaBridge 171:3a7713b1edbc 638 /** @brief Clear the UART FE pending flag.
AnnaBridge 171:3a7713b1edbc 639 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 640 * @retval None
AnnaBridge 171:3a7713b1edbc 641 */
AnnaBridge 171:3a7713b1edbc 642 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
AnnaBridge 171:3a7713b1edbc 643
AnnaBridge 171:3a7713b1edbc 644 /** @brief Clear the UART NE pending flag.
AnnaBridge 171:3a7713b1edbc 645 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 646 * @retval None
AnnaBridge 171:3a7713b1edbc 647 */
AnnaBridge 171:3a7713b1edbc 648 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
AnnaBridge 171:3a7713b1edbc 649
AnnaBridge 171:3a7713b1edbc 650 /** @brief Clear the UART ORE pending flag.
AnnaBridge 171:3a7713b1edbc 651 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 652 * @retval None
AnnaBridge 171:3a7713b1edbc 653 */
AnnaBridge 171:3a7713b1edbc 654 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
AnnaBridge 171:3a7713b1edbc 655
AnnaBridge 171:3a7713b1edbc 656 /** @brief Clear the UART IDLE pending flag.
AnnaBridge 171:3a7713b1edbc 657 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 658 * @retval None
AnnaBridge 171:3a7713b1edbc 659 */
AnnaBridge 171:3a7713b1edbc 660 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
AnnaBridge 171:3a7713b1edbc 661
AnnaBridge 171:3a7713b1edbc 662 /** @brief Check whether the specified UART flag is set or not.
AnnaBridge 171:3a7713b1edbc 663 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 664 * @param __FLAG__ specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 665 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 666 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 667 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 668 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 669 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 670 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 671 @else
AnnaBridge 171:3a7713b1edbc 672 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
AnnaBridge 171:3a7713b1edbc 673 @endif
AnnaBridge 171:3a7713b1edbc 674 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
AnnaBridge 171:3a7713b1edbc 675 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 676 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 677 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 678 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 679 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 680 @else
AnnaBridge 171:3a7713b1edbc 681 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 682 @endif
AnnaBridge 171:3a7713b1edbc 683 * @arg @ref UART_FLAG_RWU Receiver wake up flag (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 684 * @arg @ref UART_FLAG_SBKF Send Break flag
AnnaBridge 171:3a7713b1edbc 685 * @arg @ref UART_FLAG_CMF Character match flag
AnnaBridge 171:3a7713b1edbc 686 * @arg @ref UART_FLAG_BUSY Busy flag
AnnaBridge 171:3a7713b1edbc 687 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
AnnaBridge 171:3a7713b1edbc 688 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
AnnaBridge 171:3a7713b1edbc 689 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 690 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 691 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 692 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 693 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 694 @else
AnnaBridge 171:3a7713b1edbc 695 * @arg @ref UART_FLAG_EOBF End of block flag (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 696 @endif
AnnaBridge 171:3a7713b1edbc 697 * @arg @ref UART_FLAG_RTOF Receiver timeout flag
AnnaBridge 171:3a7713b1edbc 698 * @arg @ref UART_FLAG_CTS CTS Change flag
AnnaBridge 171:3a7713b1edbc 699 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 700 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 701 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 702 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 703 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 704 @else
AnnaBridge 171:3a7713b1edbc 705 * @arg @ref UART_FLAG_LBDF LIN Break detection flag (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 706 @endif
AnnaBridge 171:3a7713b1edbc 707 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
AnnaBridge 171:3a7713b1edbc 708 * @arg @ref UART_FLAG_TC Transmission Complete flag
AnnaBridge 171:3a7713b1edbc 709 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
AnnaBridge 171:3a7713b1edbc 710 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
AnnaBridge 171:3a7713b1edbc 711 * @arg @ref UART_FLAG_ORE Overrun Error flag
AnnaBridge 171:3a7713b1edbc 712 * @arg @ref UART_FLAG_NE Noise Error flag
AnnaBridge 171:3a7713b1edbc 713 * @arg @ref UART_FLAG_FE Framing Error flag
AnnaBridge 171:3a7713b1edbc 714 * @arg @ref UART_FLAG_PE Parity Error flag
AnnaBridge 171:3a7713b1edbc 715 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 716 */
AnnaBridge 171:3a7713b1edbc 717 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
AnnaBridge 171:3a7713b1edbc 718
AnnaBridge 171:3a7713b1edbc 719 /** @brief Enable the specified UART interrupt.
AnnaBridge 171:3a7713b1edbc 720 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 721 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
AnnaBridge 171:3a7713b1edbc 722 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 723 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 724 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 725 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 726 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 727 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 728 @else
AnnaBridge 171:3a7713b1edbc 729 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 730 @endif
AnnaBridge 171:3a7713b1edbc 731 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 171:3a7713b1edbc 732 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 171:3a7713b1edbc 733 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 734 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 735 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 736 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 737 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 738 @else
AnnaBridge 171:3a7713b1edbc 739 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 740 @endif
AnnaBridge 171:3a7713b1edbc 741 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 742 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 743 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 744 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 745 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 171:3a7713b1edbc 746 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 171:3a7713b1edbc 747 * @retval None
AnnaBridge 171:3a7713b1edbc 748 */
AnnaBridge 171:3a7713b1edbc 749 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 171:3a7713b1edbc 750 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 171:3a7713b1edbc 751 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge 171:3a7713b1edbc 752
AnnaBridge 171:3a7713b1edbc 753
AnnaBridge 171:3a7713b1edbc 754 /** @brief Disable the specified UART interrupt.
AnnaBridge 171:3a7713b1edbc 755 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 756 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
AnnaBridge 171:3a7713b1edbc 757 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 758 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 759 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 760 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 761 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 762 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 763 @else
AnnaBridge 171:3a7713b1edbc 764 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 765 @endif
AnnaBridge 171:3a7713b1edbc 766 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 171:3a7713b1edbc 767 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 171:3a7713b1edbc 768 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 769 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 770 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 771 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 772 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 773 @else
AnnaBridge 171:3a7713b1edbc 774 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 775 @endif
AnnaBridge 171:3a7713b1edbc 776 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 777 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 778 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 779 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 780 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 171:3a7713b1edbc 781 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 171:3a7713b1edbc 782 * @retval None
AnnaBridge 171:3a7713b1edbc 783 */
AnnaBridge 171:3a7713b1edbc 784 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 171:3a7713b1edbc 785 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
AnnaBridge 171:3a7713b1edbc 786 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
AnnaBridge 171:3a7713b1edbc 787
AnnaBridge 171:3a7713b1edbc 788 /** @brief Check whether the specified UART interrupt has occurred or not.
AnnaBridge 171:3a7713b1edbc 789 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 790 * @param __IT__ specifies the UART interrupt to check.
AnnaBridge 171:3a7713b1edbc 791 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 792 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 793 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 794 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 795 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 796 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 797 @else
AnnaBridge 171:3a7713b1edbc 798 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 799 @endif
AnnaBridge 171:3a7713b1edbc 800 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 171:3a7713b1edbc 801 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 171:3a7713b1edbc 802 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 803 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 804 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 805 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 806 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 807 @else
AnnaBridge 171:3a7713b1edbc 808 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 809 @endif
AnnaBridge 171:3a7713b1edbc 810 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 811 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 812 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 813 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 814 * @arg @ref UART_IT_ORE Overrun Error interrupt
AnnaBridge 171:3a7713b1edbc 815 * @arg @ref UART_IT_NE Noise Error interrupt
AnnaBridge 171:3a7713b1edbc 816 * @arg @ref UART_IT_FE Framing Error interrupt
AnnaBridge 171:3a7713b1edbc 817 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 171:3a7713b1edbc 818 * @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 819 */
AnnaBridge 171:3a7713b1edbc 820 #define __HAL_UART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
AnnaBridge 171:3a7713b1edbc 821
AnnaBridge 171:3a7713b1edbc 822 /** @brief Check whether the specified UART interrupt source is enabled or not.
AnnaBridge 171:3a7713b1edbc 823 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 824 * @param __IT__ specifies the UART interrupt source to check.
AnnaBridge 171:3a7713b1edbc 825 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 826 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 827 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 828 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 829 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 830 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 831 @else
AnnaBridge 171:3a7713b1edbc 832 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 833 @endif
AnnaBridge 171:3a7713b1edbc 834 * @arg @ref UART_IT_CM Character match interrupt
AnnaBridge 171:3a7713b1edbc 835 * @arg @ref UART_IT_CTS CTS change interrupt
AnnaBridge 171:3a7713b1edbc 836 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 837 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 838 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 839 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 840 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 841 @else
AnnaBridge 171:3a7713b1edbc 842 * @arg @ref UART_IT_LBD LIN Break detection interrupt (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 843 @endif
AnnaBridge 171:3a7713b1edbc 844 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
AnnaBridge 171:3a7713b1edbc 845 * @arg @ref UART_IT_TC Transmission complete interrupt
AnnaBridge 171:3a7713b1edbc 846 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
AnnaBridge 171:3a7713b1edbc 847 * @arg @ref UART_IT_IDLE Idle line detection interrupt
AnnaBridge 171:3a7713b1edbc 848 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
AnnaBridge 171:3a7713b1edbc 849 * @arg @ref UART_IT_PE Parity Error interrupt
AnnaBridge 171:3a7713b1edbc 850 * @retval The new state of __IT__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 851 */
AnnaBridge 171:3a7713b1edbc 852 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
AnnaBridge 171:3a7713b1edbc 853 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__IT__)) & UART_IT_MASK)))
AnnaBridge 171:3a7713b1edbc 854
AnnaBridge 171:3a7713b1edbc 855 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
AnnaBridge 171:3a7713b1edbc 856 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 857 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
AnnaBridge 171:3a7713b1edbc 858 * to clear the corresponding interrupt
AnnaBridge 171:3a7713b1edbc 859 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 860 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
AnnaBridge 171:3a7713b1edbc 861 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
AnnaBridge 171:3a7713b1edbc 862 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
AnnaBridge 171:3a7713b1edbc 863 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
AnnaBridge 171:3a7713b1edbc 864 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
AnnaBridge 171:3a7713b1edbc 865 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
AnnaBridge 171:3a7713b1edbc 866 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 867 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 868 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 869 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 870 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 871 @else
AnnaBridge 171:3a7713b1edbc 872 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 873 @endif
AnnaBridge 171:3a7713b1edbc 874 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
AnnaBridge 171:3a7713b1edbc 875 * @arg @ref UART_CLEAR_RTOF Receiver Time Out Clear Flag
AnnaBridge 171:3a7713b1edbc 876 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 877 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 878 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 879 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 880 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 881 @else
AnnaBridge 171:3a7713b1edbc 882 * @arg @ref UART_CLEAR_EOBF End Of Block Clear Flag
AnnaBridge 171:3a7713b1edbc 883 @endif
AnnaBridge 171:3a7713b1edbc 884 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
AnnaBridge 171:3a7713b1edbc 885 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 886 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 887 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 888 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 889 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 890 @else
AnnaBridge 171:3a7713b1edbc 891 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 892 @endif
AnnaBridge 171:3a7713b1edbc 893 * @retval None
AnnaBridge 171:3a7713b1edbc 894 */
AnnaBridge 171:3a7713b1edbc 895 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
AnnaBridge 171:3a7713b1edbc 896
AnnaBridge 171:3a7713b1edbc 897 /** @brief Set a specific UART request flag.
AnnaBridge 171:3a7713b1edbc 898 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 899 * @param __REQ__ specifies the request flag to set
AnnaBridge 171:3a7713b1edbc 900 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 901 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
AnnaBridge 171:3a7713b1edbc 902 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
AnnaBridge 171:3a7713b1edbc 903 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
AnnaBridge 171:3a7713b1edbc 904 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
AnnaBridge 171:3a7713b1edbc 905 @if STM32F030x6
AnnaBridge 171:3a7713b1edbc 906 @elseif STM32F030x8
AnnaBridge 171:3a7713b1edbc 907 @elseif STM32F030xC
AnnaBridge 171:3a7713b1edbc 908 @elseif STM32F070x6
AnnaBridge 171:3a7713b1edbc 909 @elseif STM32F070xB
AnnaBridge 171:3a7713b1edbc 910 @else
AnnaBridge 171:3a7713b1edbc 911 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request (not available on F030xx devices)
AnnaBridge 171:3a7713b1edbc 912 @endif
AnnaBridge 171:3a7713b1edbc 913 * @retval None
AnnaBridge 171:3a7713b1edbc 914 */
AnnaBridge 171:3a7713b1edbc 915 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
AnnaBridge 171:3a7713b1edbc 916
AnnaBridge 171:3a7713b1edbc 917 /** @brief Enable the UART one bit sample method.
AnnaBridge 171:3a7713b1edbc 918 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 919 * @retval None
AnnaBridge 171:3a7713b1edbc 920 */
AnnaBridge 171:3a7713b1edbc 921 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
AnnaBridge 171:3a7713b1edbc 922
AnnaBridge 171:3a7713b1edbc 923 /** @brief Disable the UART one bit sample method.
AnnaBridge 171:3a7713b1edbc 924 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 925 * @retval None
AnnaBridge 171:3a7713b1edbc 926 */
AnnaBridge 171:3a7713b1edbc 927 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
AnnaBridge 171:3a7713b1edbc 928
AnnaBridge 171:3a7713b1edbc 929 /** @brief Enable UART.
AnnaBridge 171:3a7713b1edbc 930 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 931 * @retval None
AnnaBridge 171:3a7713b1edbc 932 */
AnnaBridge 171:3a7713b1edbc 933 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
AnnaBridge 171:3a7713b1edbc 934
AnnaBridge 171:3a7713b1edbc 935 /** @brief Disable UART.
AnnaBridge 171:3a7713b1edbc 936 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 937 * @retval None
AnnaBridge 171:3a7713b1edbc 938 */
AnnaBridge 171:3a7713b1edbc 939 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
AnnaBridge 171:3a7713b1edbc 940
AnnaBridge 171:3a7713b1edbc 941 /** @brief Enable CTS flow control.
AnnaBridge 171:3a7713b1edbc 942 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 943 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 944 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 945 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 946 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 947 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 948 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 949 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 950 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 951 * @retval None
AnnaBridge 171:3a7713b1edbc 952 */
AnnaBridge 171:3a7713b1edbc 953 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 954 do{ \
AnnaBridge 171:3a7713b1edbc 955 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge 171:3a7713b1edbc 956 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
AnnaBridge 171:3a7713b1edbc 957 } while(0)
AnnaBridge 171:3a7713b1edbc 958
AnnaBridge 171:3a7713b1edbc 959 /** @brief Disable CTS flow control.
AnnaBridge 171:3a7713b1edbc 960 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 961 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 962 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 963 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 964 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 965 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 966 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 967 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 968 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 969 * @retval None
AnnaBridge 171:3a7713b1edbc 970 */
AnnaBridge 171:3a7713b1edbc 971 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 972 do{ \
AnnaBridge 171:3a7713b1edbc 973 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
AnnaBridge 171:3a7713b1edbc 974 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
AnnaBridge 171:3a7713b1edbc 975 } while(0)
AnnaBridge 171:3a7713b1edbc 976
AnnaBridge 171:3a7713b1edbc 977 /** @brief Enable RTS flow control.
AnnaBridge 171:3a7713b1edbc 978 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 979 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 980 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 981 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 982 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 983 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 984 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 985 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 986 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 987 * @retval None
AnnaBridge 171:3a7713b1edbc 988 */
AnnaBridge 171:3a7713b1edbc 989 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 990 do{ \
AnnaBridge 171:3a7713b1edbc 991 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
AnnaBridge 171:3a7713b1edbc 992 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
AnnaBridge 171:3a7713b1edbc 993 } while(0)
AnnaBridge 171:3a7713b1edbc 994
AnnaBridge 171:3a7713b1edbc 995 /** @brief Disable RTS flow control.
AnnaBridge 171:3a7713b1edbc 996 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
AnnaBridge 171:3a7713b1edbc 997 * without need to call HAL_UART_Init() function.
AnnaBridge 171:3a7713b1edbc 998 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
AnnaBridge 171:3a7713b1edbc 999 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
AnnaBridge 171:3a7713b1edbc 1000 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
AnnaBridge 171:3a7713b1edbc 1001 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
AnnaBridge 171:3a7713b1edbc 1002 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
AnnaBridge 171:3a7713b1edbc 1003 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
AnnaBridge 171:3a7713b1edbc 1004 * @param __HANDLE__ specifies the UART Handle.
AnnaBridge 171:3a7713b1edbc 1005 * @retval None
AnnaBridge 171:3a7713b1edbc 1006 */
AnnaBridge 171:3a7713b1edbc 1007 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
AnnaBridge 171:3a7713b1edbc 1008 do{ \
AnnaBridge 171:3a7713b1edbc 1009 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
AnnaBridge 171:3a7713b1edbc 1010 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
AnnaBridge 171:3a7713b1edbc 1011 } while(0)
AnnaBridge 171:3a7713b1edbc 1012
AnnaBridge 171:3a7713b1edbc 1013 /**
AnnaBridge 171:3a7713b1edbc 1014 * @}
AnnaBridge 171:3a7713b1edbc 1015 */
AnnaBridge 171:3a7713b1edbc 1016
AnnaBridge 171:3a7713b1edbc 1017 /* Private macros --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 1018 /** @defgroup UART_Private_Macros UART Private Macros
AnnaBridge 171:3a7713b1edbc 1019 * @{
AnnaBridge 171:3a7713b1edbc 1020 */
AnnaBridge 171:3a7713b1edbc 1021
AnnaBridge 171:3a7713b1edbc 1022 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
AnnaBridge 171:3a7713b1edbc 1023 * @param __PCLK__ UART clock.
AnnaBridge 171:3a7713b1edbc 1024 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 171:3a7713b1edbc 1025 * @retval Division result
AnnaBridge 171:3a7713b1edbc 1026 */
AnnaBridge 171:3a7713b1edbc 1027 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__) ((((__PCLK__)*2U) + ((__BAUD__)/2U)) / (__BAUD__))
AnnaBridge 171:3a7713b1edbc 1028
AnnaBridge 171:3a7713b1edbc 1029 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
AnnaBridge 171:3a7713b1edbc 1030 * @param __PCLK__ UART clock.
AnnaBridge 171:3a7713b1edbc 1031 * @param __BAUD__ Baud rate set by the user.
AnnaBridge 171:3a7713b1edbc 1032 * @retval Division result
AnnaBridge 171:3a7713b1edbc 1033 */
AnnaBridge 171:3a7713b1edbc 1034 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__) (((__PCLK__) + ((__BAUD__)/2U)) / (__BAUD__))
AnnaBridge 171:3a7713b1edbc 1035
AnnaBridge 171:3a7713b1edbc 1036 /** @brief Check UART Baud rate.
AnnaBridge 171:3a7713b1edbc 1037 * @param __BAUDRATE__ Baudrate specified by the user.
AnnaBridge 171:3a7713b1edbc 1038 * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz)
AnnaBridge 171:3a7713b1edbc 1039 * divided by the smallest oversampling used on the USART (i.e. 8)
AnnaBridge 171:3a7713b1edbc 1040 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
AnnaBridge 171:3a7713b1edbc 1041 */
AnnaBridge 171:3a7713b1edbc 1042 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U)
AnnaBridge 171:3a7713b1edbc 1043
AnnaBridge 171:3a7713b1edbc 1044 /** @brief Check UART assertion time.
AnnaBridge 171:3a7713b1edbc 1045 * @param __TIME__ 5-bit value assertion time.
AnnaBridge 171:3a7713b1edbc 1046 * @retval Test result (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 1047 */
AnnaBridge 171:3a7713b1edbc 1048 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
AnnaBridge 171:3a7713b1edbc 1049
AnnaBridge 171:3a7713b1edbc 1050 /** @brief Check UART deassertion time.
AnnaBridge 171:3a7713b1edbc 1051 * @param __TIME__ 5-bit value deassertion time.
AnnaBridge 171:3a7713b1edbc 1052 * @retval Test result (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 1053 */
AnnaBridge 171:3a7713b1edbc 1054 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1F)
AnnaBridge 171:3a7713b1edbc 1055
AnnaBridge 171:3a7713b1edbc 1056 /**
AnnaBridge 171:3a7713b1edbc 1057 * @brief Ensure that UART frame number of stop bits is valid.
AnnaBridge 171:3a7713b1edbc 1058 * @param __STOPBITS__ UART frame number of stop bits.
AnnaBridge 171:3a7713b1edbc 1059 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
AnnaBridge 171:3a7713b1edbc 1060 */
AnnaBridge 171:3a7713b1edbc 1061 #ifdef USART_SMARTCARD_SUPPORT
AnnaBridge 171:3a7713b1edbc 1062 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
AnnaBridge 171:3a7713b1edbc 1063 ((__STOPBITS__) == UART_STOPBITS_1) || \
AnnaBridge 171:3a7713b1edbc 1064 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
AnnaBridge 171:3a7713b1edbc 1065 ((__STOPBITS__) == UART_STOPBITS_2))
AnnaBridge 171:3a7713b1edbc 1066 #else
AnnaBridge 171:3a7713b1edbc 1067 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
AnnaBridge 171:3a7713b1edbc 1068 ((__STOPBITS__) == UART_STOPBITS_2))
AnnaBridge 171:3a7713b1edbc 1069 #endif
AnnaBridge 171:3a7713b1edbc 1070
AnnaBridge 171:3a7713b1edbc 1071 /**
AnnaBridge 171:3a7713b1edbc 1072 * @brief Ensure that UART frame parity is valid.
AnnaBridge 171:3a7713b1edbc 1073 * @param __PARITY__ UART frame parity.
AnnaBridge 171:3a7713b1edbc 1074 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
AnnaBridge 171:3a7713b1edbc 1075 */
AnnaBridge 171:3a7713b1edbc 1076 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
AnnaBridge 171:3a7713b1edbc 1077 ((__PARITY__) == UART_PARITY_EVEN) || \
AnnaBridge 171:3a7713b1edbc 1078 ((__PARITY__) == UART_PARITY_ODD))
AnnaBridge 171:3a7713b1edbc 1079
AnnaBridge 171:3a7713b1edbc 1080 /**
AnnaBridge 171:3a7713b1edbc 1081 * @brief Ensure that UART hardware flow control is valid.
AnnaBridge 171:3a7713b1edbc 1082 * @param __CONTROL__ UART hardware flow control.
AnnaBridge 171:3a7713b1edbc 1083 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
AnnaBridge 171:3a7713b1edbc 1084 */
AnnaBridge 171:3a7713b1edbc 1085 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
AnnaBridge 171:3a7713b1edbc 1086 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
AnnaBridge 171:3a7713b1edbc 1087 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
AnnaBridge 171:3a7713b1edbc 1088 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
AnnaBridge 171:3a7713b1edbc 1089 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
AnnaBridge 171:3a7713b1edbc 1090
AnnaBridge 171:3a7713b1edbc 1091 /**
AnnaBridge 171:3a7713b1edbc 1092 * @brief Ensure that UART communication mode is valid.
AnnaBridge 171:3a7713b1edbc 1093 * @param __MODE__ UART communication mode.
AnnaBridge 171:3a7713b1edbc 1094 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
AnnaBridge 171:3a7713b1edbc 1095 */
AnnaBridge 171:3a7713b1edbc 1096 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
AnnaBridge 171:3a7713b1edbc 1097
AnnaBridge 171:3a7713b1edbc 1098 /**
AnnaBridge 171:3a7713b1edbc 1099 * @brief Ensure that UART state is valid.
AnnaBridge 171:3a7713b1edbc 1100 * @param __STATE__ UART state.
AnnaBridge 171:3a7713b1edbc 1101 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
AnnaBridge 171:3a7713b1edbc 1102 */
AnnaBridge 171:3a7713b1edbc 1103 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1104 ((__STATE__) == UART_STATE_ENABLE))
AnnaBridge 171:3a7713b1edbc 1105
AnnaBridge 171:3a7713b1edbc 1106 /**
AnnaBridge 171:3a7713b1edbc 1107 * @brief Ensure that UART oversampling is valid.
AnnaBridge 171:3a7713b1edbc 1108 * @param __SAMPLING__ UART oversampling.
AnnaBridge 171:3a7713b1edbc 1109 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
AnnaBridge 171:3a7713b1edbc 1110 */
AnnaBridge 171:3a7713b1edbc 1111 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
AnnaBridge 171:3a7713b1edbc 1112 ((__SAMPLING__) == UART_OVERSAMPLING_8))
AnnaBridge 171:3a7713b1edbc 1113
AnnaBridge 171:3a7713b1edbc 1114 /**
AnnaBridge 171:3a7713b1edbc 1115 * @brief Ensure that UART frame sampling is valid.
AnnaBridge 171:3a7713b1edbc 1116 * @param __ONEBIT__ UART frame sampling.
AnnaBridge 171:3a7713b1edbc 1117 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
AnnaBridge 171:3a7713b1edbc 1118 */
AnnaBridge 171:3a7713b1edbc 1119 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1120 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
AnnaBridge 171:3a7713b1edbc 1121
AnnaBridge 171:3a7713b1edbc 1122 /**
AnnaBridge 171:3a7713b1edbc 1123 * @brief Ensure that Address Length detection parameter is valid.
AnnaBridge 171:3a7713b1edbc 1124 * @param __ADDRESS__ UART Adress length value.
AnnaBridge 171:3a7713b1edbc 1125 * @retval SET (__ADDRESS__ is valid) or RESET (__ADDRESS__ is invalid)
AnnaBridge 171:3a7713b1edbc 1126 */
AnnaBridge 171:3a7713b1edbc 1127 #define IS_UART_ADDRESSLENGTH_DETECT(__ADDRESS__) (((__ADDRESS__) == UART_ADDRESS_DETECT_4B) || \
AnnaBridge 171:3a7713b1edbc 1128 ((__ADDRESS__) == UART_ADDRESS_DETECT_7B))
AnnaBridge 171:3a7713b1edbc 1129
AnnaBridge 171:3a7713b1edbc 1130 /**
AnnaBridge 171:3a7713b1edbc 1131 * @brief Ensure that UART receiver timeout setting is valid.
AnnaBridge 171:3a7713b1edbc 1132 * @param __TIMEOUT__ UART receiver timeout setting.
AnnaBridge 171:3a7713b1edbc 1133 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
AnnaBridge 171:3a7713b1edbc 1134 */
AnnaBridge 171:3a7713b1edbc 1135 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1136 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
AnnaBridge 171:3a7713b1edbc 1137
AnnaBridge 171:3a7713b1edbc 1138 /**
AnnaBridge 171:3a7713b1edbc 1139 * @brief Ensure that UART DMA TX state is valid.
AnnaBridge 171:3a7713b1edbc 1140 * @param __DMATX__ UART DMA TX state.
AnnaBridge 171:3a7713b1edbc 1141 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
AnnaBridge 171:3a7713b1edbc 1142 */
AnnaBridge 171:3a7713b1edbc 1143 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1144 ((__DMATX__) == UART_DMA_TX_ENABLE))
AnnaBridge 171:3a7713b1edbc 1145
AnnaBridge 171:3a7713b1edbc 1146 /**
AnnaBridge 171:3a7713b1edbc 1147 * @brief Ensure that UART DMA RX state is valid.
AnnaBridge 171:3a7713b1edbc 1148 * @param __DMARX__ UART DMA RX state.
AnnaBridge 171:3a7713b1edbc 1149 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
AnnaBridge 171:3a7713b1edbc 1150 */
AnnaBridge 171:3a7713b1edbc 1151 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1152 ((__DMARX__) == UART_DMA_RX_ENABLE))
AnnaBridge 171:3a7713b1edbc 1153
AnnaBridge 171:3a7713b1edbc 1154 /**
AnnaBridge 171:3a7713b1edbc 1155 * @brief Ensure that UART half-duplex state is valid.
AnnaBridge 171:3a7713b1edbc 1156 * @param __HDSEL__ UART half-duplex state.
AnnaBridge 171:3a7713b1edbc 1157 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
AnnaBridge 171:3a7713b1edbc 1158 */
AnnaBridge 171:3a7713b1edbc 1159 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1160 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
AnnaBridge 171:3a7713b1edbc 1161
AnnaBridge 171:3a7713b1edbc 1162 /**
AnnaBridge 171:3a7713b1edbc 1163 * @brief Ensure that UART wake-up method is valid.
AnnaBridge 171:3a7713b1edbc 1164 * @param __WAKEUP__ UART wake-up method .
AnnaBridge 171:3a7713b1edbc 1165 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
AnnaBridge 171:3a7713b1edbc 1166 */
AnnaBridge 171:3a7713b1edbc 1167 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
AnnaBridge 171:3a7713b1edbc 1168 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
AnnaBridge 171:3a7713b1edbc 1169
AnnaBridge 171:3a7713b1edbc 1170 /**
AnnaBridge 171:3a7713b1edbc 1171 * @brief Ensure that UART advanced features initialization is valid.
AnnaBridge 171:3a7713b1edbc 1172 * @param __INIT__ UART advanced features initialization.
AnnaBridge 171:3a7713b1edbc 1173 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
AnnaBridge 171:3a7713b1edbc 1174 */
AnnaBridge 171:3a7713b1edbc 1175 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
AnnaBridge 171:3a7713b1edbc 1176 UART_ADVFEATURE_TXINVERT_INIT | \
AnnaBridge 171:3a7713b1edbc 1177 UART_ADVFEATURE_RXINVERT_INIT | \
AnnaBridge 171:3a7713b1edbc 1178 UART_ADVFEATURE_DATAINVERT_INIT | \
AnnaBridge 171:3a7713b1edbc 1179 UART_ADVFEATURE_SWAP_INIT | \
AnnaBridge 171:3a7713b1edbc 1180 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
AnnaBridge 171:3a7713b1edbc 1181 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
AnnaBridge 171:3a7713b1edbc 1182 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
AnnaBridge 171:3a7713b1edbc 1183 UART_ADVFEATURE_MSBFIRST_INIT))
AnnaBridge 171:3a7713b1edbc 1184
AnnaBridge 171:3a7713b1edbc 1185 /**
AnnaBridge 171:3a7713b1edbc 1186 * @brief Ensure that UART frame TX inversion setting is valid.
AnnaBridge 171:3a7713b1edbc 1187 * @param __TXINV__ UART frame TX inversion setting.
AnnaBridge 171:3a7713b1edbc 1188 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
AnnaBridge 171:3a7713b1edbc 1189 */
AnnaBridge 171:3a7713b1edbc 1190 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1191 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
AnnaBridge 171:3a7713b1edbc 1192
AnnaBridge 171:3a7713b1edbc 1193 /**
AnnaBridge 171:3a7713b1edbc 1194 * @brief Ensure that UART frame RX inversion setting is valid.
AnnaBridge 171:3a7713b1edbc 1195 * @param __RXINV__ UART frame RX inversion setting.
AnnaBridge 171:3a7713b1edbc 1196 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
AnnaBridge 171:3a7713b1edbc 1197 */
AnnaBridge 171:3a7713b1edbc 1198 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1199 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
AnnaBridge 171:3a7713b1edbc 1200
AnnaBridge 171:3a7713b1edbc 1201 /**
AnnaBridge 171:3a7713b1edbc 1202 * @brief Ensure that UART frame data inversion setting is valid.
AnnaBridge 171:3a7713b1edbc 1203 * @param __DATAINV__ UART frame data inversion setting.
AnnaBridge 171:3a7713b1edbc 1204 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
AnnaBridge 171:3a7713b1edbc 1205 */
AnnaBridge 171:3a7713b1edbc 1206 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1207 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
AnnaBridge 171:3a7713b1edbc 1208
AnnaBridge 171:3a7713b1edbc 1209 /**
AnnaBridge 171:3a7713b1edbc 1210 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
AnnaBridge 171:3a7713b1edbc 1211 * @param __SWAP__ UART frame RX/TX pins swap setting.
AnnaBridge 171:3a7713b1edbc 1212 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
AnnaBridge 171:3a7713b1edbc 1213 */
AnnaBridge 171:3a7713b1edbc 1214 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1215 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
AnnaBridge 171:3a7713b1edbc 1216
AnnaBridge 171:3a7713b1edbc 1217 /**
AnnaBridge 171:3a7713b1edbc 1218 * @brief Ensure that UART frame overrun setting is valid.
AnnaBridge 171:3a7713b1edbc 1219 * @param __OVERRUN__ UART frame overrun setting.
AnnaBridge 171:3a7713b1edbc 1220 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
AnnaBridge 171:3a7713b1edbc 1221 */
AnnaBridge 171:3a7713b1edbc 1222 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
AnnaBridge 171:3a7713b1edbc 1223 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
AnnaBridge 171:3a7713b1edbc 1224
AnnaBridge 171:3a7713b1edbc 1225 /**
AnnaBridge 171:3a7713b1edbc 1226 * @brief Ensure that UART auto Baud rate state is valid.
AnnaBridge 171:3a7713b1edbc 1227 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
AnnaBridge 171:3a7713b1edbc 1228 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
AnnaBridge 171:3a7713b1edbc 1229 */
AnnaBridge 171:3a7713b1edbc 1230 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1231 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
AnnaBridge 171:3a7713b1edbc 1232
AnnaBridge 171:3a7713b1edbc 1233 /**
AnnaBridge 171:3a7713b1edbc 1234 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
AnnaBridge 171:3a7713b1edbc 1235 * @param __DMA__ UART DMA enabling or disabling on error setting.
AnnaBridge 171:3a7713b1edbc 1236 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
AnnaBridge 171:3a7713b1edbc 1237 */
AnnaBridge 171:3a7713b1edbc 1238 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
AnnaBridge 171:3a7713b1edbc 1239 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
AnnaBridge 171:3a7713b1edbc 1240
AnnaBridge 171:3a7713b1edbc 1241 /**
AnnaBridge 171:3a7713b1edbc 1242 * @brief Ensure that UART frame MSB first setting is valid.
AnnaBridge 171:3a7713b1edbc 1243 * @param __MSBFIRST__ UART frame MSB first setting.
AnnaBridge 171:3a7713b1edbc 1244 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
AnnaBridge 171:3a7713b1edbc 1245 */
AnnaBridge 171:3a7713b1edbc 1246 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1247 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
AnnaBridge 171:3a7713b1edbc 1248
AnnaBridge 171:3a7713b1edbc 1249 /**
AnnaBridge 171:3a7713b1edbc 1250 * @brief Ensure that UART mute mode state is valid.
AnnaBridge 171:3a7713b1edbc 1251 * @param __MUTE__ UART mute mode state.
AnnaBridge 171:3a7713b1edbc 1252 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
AnnaBridge 171:3a7713b1edbc 1253 */
AnnaBridge 171:3a7713b1edbc 1254 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
AnnaBridge 171:3a7713b1edbc 1255 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
AnnaBridge 171:3a7713b1edbc 1256
AnnaBridge 171:3a7713b1edbc 1257 /**
AnnaBridge 171:3a7713b1edbc 1258 * @brief Ensure that UART driver enable polarity is valid.
AnnaBridge 171:3a7713b1edbc 1259 * @param __POLARITY__ UART driver enable polarity.
AnnaBridge 171:3a7713b1edbc 1260 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
AnnaBridge 171:3a7713b1edbc 1261 */
AnnaBridge 171:3a7713b1edbc 1262 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
AnnaBridge 171:3a7713b1edbc 1263 ((__POLARITY__) == UART_DE_POLARITY_LOW))
AnnaBridge 171:3a7713b1edbc 1264
AnnaBridge 171:3a7713b1edbc 1265 /**
AnnaBridge 171:3a7713b1edbc 1266 * @}
AnnaBridge 171:3a7713b1edbc 1267 */
AnnaBridge 171:3a7713b1edbc 1268
AnnaBridge 171:3a7713b1edbc 1269 /* Include UART HAL Extended module */
AnnaBridge 171:3a7713b1edbc 1270 #include "stm32f0xx_hal_uart_ex.h"
AnnaBridge 171:3a7713b1edbc 1271
AnnaBridge 171:3a7713b1edbc 1272 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 1273 /** @addtogroup UART_Exported_Functions UART Exported Functions
AnnaBridge 171:3a7713b1edbc 1274 * @{
AnnaBridge 171:3a7713b1edbc 1275 */
AnnaBridge 171:3a7713b1edbc 1276
AnnaBridge 171:3a7713b1edbc 1277 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 1278 * @{
AnnaBridge 171:3a7713b1edbc 1279 */
AnnaBridge 171:3a7713b1edbc 1280
AnnaBridge 171:3a7713b1edbc 1281 /* Initialization and de-initialization functions ****************************/
AnnaBridge 171:3a7713b1edbc 1282 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1283 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1284 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
AnnaBridge 171:3a7713b1edbc 1285 HAL_StatusTypeDef HAL_UART_DeInit (UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1286 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1287 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1288
AnnaBridge 171:3a7713b1edbc 1289 /**
AnnaBridge 171:3a7713b1edbc 1290 * @}
AnnaBridge 171:3a7713b1edbc 1291 */
AnnaBridge 171:3a7713b1edbc 1292
AnnaBridge 171:3a7713b1edbc 1293 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
AnnaBridge 171:3a7713b1edbc 1294 * @{
AnnaBridge 171:3a7713b1edbc 1295 */
AnnaBridge 171:3a7713b1edbc 1296
AnnaBridge 171:3a7713b1edbc 1297 /* IO operation functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 1298 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 1299 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 1300 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 1301 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 1302 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 1303 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
AnnaBridge 171:3a7713b1edbc 1304 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1305 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1306 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1307 /* Transfer Abort functions */
AnnaBridge 171:3a7713b1edbc 1308 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1309 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1310 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1311 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1312 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1313 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1314
AnnaBridge 171:3a7713b1edbc 1315 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1316 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1317 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1318 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1319 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1320 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1321 void HAL_UART_AbortCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1322 void HAL_UART_AbortTransmitCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1323 void HAL_UART_AbortReceiveCpltCallback (UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1324
AnnaBridge 171:3a7713b1edbc 1325 /**
AnnaBridge 171:3a7713b1edbc 1326 * @}
AnnaBridge 171:3a7713b1edbc 1327 */
AnnaBridge 171:3a7713b1edbc 1328
AnnaBridge 171:3a7713b1edbc 1329 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 1330 * @{
AnnaBridge 171:3a7713b1edbc 1331 */
AnnaBridge 171:3a7713b1edbc 1332
AnnaBridge 171:3a7713b1edbc 1333 /* Peripheral Control functions ************************************************/
AnnaBridge 171:3a7713b1edbc 1334 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1335 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1336 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1337 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1338 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1339
AnnaBridge 171:3a7713b1edbc 1340 /**
AnnaBridge 171:3a7713b1edbc 1341 * @}
AnnaBridge 171:3a7713b1edbc 1342 */
AnnaBridge 171:3a7713b1edbc 1343
AnnaBridge 171:3a7713b1edbc 1344 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
AnnaBridge 171:3a7713b1edbc 1345 * @{
AnnaBridge 171:3a7713b1edbc 1346 */
AnnaBridge 171:3a7713b1edbc 1347
AnnaBridge 171:3a7713b1edbc 1348 /* Peripheral State and Errors functions **************************************************/
AnnaBridge 171:3a7713b1edbc 1349 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1350 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1351
AnnaBridge 171:3a7713b1edbc 1352 /**
AnnaBridge 171:3a7713b1edbc 1353 * @}
AnnaBridge 171:3a7713b1edbc 1354 */
AnnaBridge 171:3a7713b1edbc 1355
AnnaBridge 171:3a7713b1edbc 1356 /**
AnnaBridge 171:3a7713b1edbc 1357 * @}
AnnaBridge 171:3a7713b1edbc 1358 */
AnnaBridge 171:3a7713b1edbc 1359
AnnaBridge 171:3a7713b1edbc 1360 /* Private functions -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 1361 /** @addtogroup UART_Private_Functions UART Private Functions
AnnaBridge 171:3a7713b1edbc 1362 * @{
AnnaBridge 171:3a7713b1edbc 1363 */
AnnaBridge 171:3a7713b1edbc 1364 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1365 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1366 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1367 HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1368 HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1369 HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
AnnaBridge 171:3a7713b1edbc 1370 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
AnnaBridge 171:3a7713b1edbc 1371
AnnaBridge 171:3a7713b1edbc 1372 /**
AnnaBridge 171:3a7713b1edbc 1373 * @}
AnnaBridge 171:3a7713b1edbc 1374 */
AnnaBridge 171:3a7713b1edbc 1375
AnnaBridge 171:3a7713b1edbc 1376 /**
AnnaBridge 171:3a7713b1edbc 1377 * @}
AnnaBridge 171:3a7713b1edbc 1378 */
AnnaBridge 171:3a7713b1edbc 1379
AnnaBridge 171:3a7713b1edbc 1380 /**
AnnaBridge 171:3a7713b1edbc 1381 * @}
AnnaBridge 171:3a7713b1edbc 1382 */
AnnaBridge 171:3a7713b1edbc 1383
AnnaBridge 171:3a7713b1edbc 1384 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 1385 }
AnnaBridge 171:3a7713b1edbc 1386 #endif
AnnaBridge 171:3a7713b1edbc 1387
AnnaBridge 171:3a7713b1edbc 1388 #endif /* __STM32F0xx_HAL_UART_H */
AnnaBridge 171:3a7713b1edbc 1389
AnnaBridge 171:3a7713b1edbc 1390 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
AnnaBridge 171:3a7713b1edbc 1391