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TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f0xx_hal_tsc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f0xx_hal_tsc.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief This file contains all the functions prototypes for the TSC firmware
AnnaBridge 171:3a7713b1edbc 6 * library.
AnnaBridge 171:3a7713b1edbc 7 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 8 * @attention
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 11 *
AnnaBridge 171:3a7713b1edbc 12 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 13 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 14 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 15 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 16 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 17 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 18 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 19 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 20 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 21 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 22 *
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 24 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 30 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 32 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 *
AnnaBridge 171:3a7713b1edbc 34 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 35 */
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 38 #ifndef __STM32F0xx_TSC_H
AnnaBridge 171:3a7713b1edbc 39 #define __STM32F0xx_TSC_H
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 42 extern "C" {
AnnaBridge 171:3a7713b1edbc 43 #endif
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 #if defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || \
AnnaBridge 171:3a7713b1edbc 46 defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || \
AnnaBridge 171:3a7713b1edbc 47 defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx)
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 50 #include "stm32f0xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /** @addtogroup STM32F0xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 53 * @{
AnnaBridge 171:3a7713b1edbc 54 */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /** @addtogroup TSC
AnnaBridge 171:3a7713b1edbc 57 * @{
AnnaBridge 171:3a7713b1edbc 58 */
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /** @defgroup TSC_Exported_Types TSC Exported Types
AnnaBridge 171:3a7713b1edbc 63 * @{
AnnaBridge 171:3a7713b1edbc 64 */
AnnaBridge 171:3a7713b1edbc 65 /**
AnnaBridge 171:3a7713b1edbc 66 * @brief TSC state structure definition
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 typedef enum
AnnaBridge 171:3a7713b1edbc 69 {
AnnaBridge 171:3a7713b1edbc 70 HAL_TSC_STATE_RESET = 0x00U, /*!< TSC registers have their reset value */
AnnaBridge 171:3a7713b1edbc 71 HAL_TSC_STATE_READY = 0x01U, /*!< TSC registers are initialized or acquisition is completed with success */
AnnaBridge 171:3a7713b1edbc 72 HAL_TSC_STATE_BUSY = 0x02U, /*!< TSC initialization or acquisition is on-going */
AnnaBridge 171:3a7713b1edbc 73 HAL_TSC_STATE_ERROR = 0x03U /*!< Acquisition is completed with max count error */
AnnaBridge 171:3a7713b1edbc 74 } HAL_TSC_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 /**
AnnaBridge 171:3a7713b1edbc 77 * @brief TSC group status structure definition
AnnaBridge 171:3a7713b1edbc 78 */
AnnaBridge 171:3a7713b1edbc 79 typedef enum
AnnaBridge 171:3a7713b1edbc 80 {
AnnaBridge 171:3a7713b1edbc 81 TSC_GROUP_ONGOING = 0x00U, /*!< Acquisition on group is on-going or not started */
AnnaBridge 171:3a7713b1edbc 82 TSC_GROUP_COMPLETED = 0x01U /*!< Acquisition on group is completed with success (no max count error) */
AnnaBridge 171:3a7713b1edbc 83 } TSC_GroupStatusTypeDef;
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 /**
AnnaBridge 171:3a7713b1edbc 86 * @brief TSC init structure definition
AnnaBridge 171:3a7713b1edbc 87 */
AnnaBridge 171:3a7713b1edbc 88 typedef struct
AnnaBridge 171:3a7713b1edbc 89 {
AnnaBridge 171:3a7713b1edbc 90 uint32_t CTPulseHighLength; /*!< Charge-transfer high pulse length */
AnnaBridge 171:3a7713b1edbc 91 uint32_t CTPulseLowLength; /*!< Charge-transfer low pulse length */
AnnaBridge 171:3a7713b1edbc 92 uint32_t SpreadSpectrum; /*!< Spread spectrum activation */
AnnaBridge 171:3a7713b1edbc 93 uint32_t SpreadSpectrumDeviation; /*!< Spread spectrum deviation */
AnnaBridge 171:3a7713b1edbc 94 uint32_t SpreadSpectrumPrescaler; /*!< Spread spectrum prescaler */
AnnaBridge 171:3a7713b1edbc 95 uint32_t PulseGeneratorPrescaler; /*!< Pulse generator prescaler */
AnnaBridge 171:3a7713b1edbc 96 uint32_t MaxCountValue; /*!< Max count value */
AnnaBridge 171:3a7713b1edbc 97 uint32_t IODefaultMode; /*!< IO default mode */
AnnaBridge 171:3a7713b1edbc 98 uint32_t SynchroPinPolarity; /*!< Synchro pin polarity */
AnnaBridge 171:3a7713b1edbc 99 uint32_t AcquisitionMode; /*!< Acquisition mode */
AnnaBridge 171:3a7713b1edbc 100 uint32_t MaxCountInterrupt; /*!< Max count interrupt activation */
AnnaBridge 171:3a7713b1edbc 101 uint32_t ChannelIOs; /*!< Channel IOs mask */
AnnaBridge 171:3a7713b1edbc 102 uint32_t ShieldIOs; /*!< Shield IOs mask */
AnnaBridge 171:3a7713b1edbc 103 uint32_t SamplingIOs; /*!< Sampling IOs mask */
AnnaBridge 171:3a7713b1edbc 104 } TSC_InitTypeDef;
AnnaBridge 171:3a7713b1edbc 105
AnnaBridge 171:3a7713b1edbc 106 /**
AnnaBridge 171:3a7713b1edbc 107 * @brief TSC IOs configuration structure definition
AnnaBridge 171:3a7713b1edbc 108 */
AnnaBridge 171:3a7713b1edbc 109 typedef struct
AnnaBridge 171:3a7713b1edbc 110 {
AnnaBridge 171:3a7713b1edbc 111 uint32_t ChannelIOs; /*!< Channel IOs mask */
AnnaBridge 171:3a7713b1edbc 112 uint32_t ShieldIOs; /*!< Shield IOs mask */
AnnaBridge 171:3a7713b1edbc 113 uint32_t SamplingIOs; /*!< Sampling IOs mask */
AnnaBridge 171:3a7713b1edbc 114 } TSC_IOConfigTypeDef;
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 /**
AnnaBridge 171:3a7713b1edbc 117 * @brief TSC handle Structure definition
AnnaBridge 171:3a7713b1edbc 118 */
AnnaBridge 171:3a7713b1edbc 119 typedef struct
AnnaBridge 171:3a7713b1edbc 120 {
AnnaBridge 171:3a7713b1edbc 121 TSC_TypeDef *Instance; /*!< Register base address */
AnnaBridge 171:3a7713b1edbc 122 TSC_InitTypeDef Init; /*!< Initialization parameters */
AnnaBridge 171:3a7713b1edbc 123 __IO HAL_TSC_StateTypeDef State; /*!< Peripheral state */
AnnaBridge 171:3a7713b1edbc 124 HAL_LockTypeDef Lock; /*!< Lock feature */
AnnaBridge 171:3a7713b1edbc 125 } TSC_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /**
AnnaBridge 171:3a7713b1edbc 128 * @}
AnnaBridge 171:3a7713b1edbc 129 */
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 132
AnnaBridge 171:3a7713b1edbc 133 /** @defgroup TSC_Exported_Constants TSC Exported Constants
AnnaBridge 171:3a7713b1edbc 134 * @{
AnnaBridge 171:3a7713b1edbc 135 */
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 /** @defgroup TSC_CTPH_Cycles TSC Charge Transfer Pulse High
AnnaBridge 171:3a7713b1edbc 138 * @{
AnnaBridge 171:3a7713b1edbc 139 */
AnnaBridge 171:3a7713b1edbc 140 #define TSC_CTPH_1CYCLE ((uint32_t)( 0U << 28))
AnnaBridge 171:3a7713b1edbc 141 #define TSC_CTPH_2CYCLES ((uint32_t)( 1U << 28))
AnnaBridge 171:3a7713b1edbc 142 #define TSC_CTPH_3CYCLES ((uint32_t)( 2U << 28))
AnnaBridge 171:3a7713b1edbc 143 #define TSC_CTPH_4CYCLES ((uint32_t)( 3U << 28))
AnnaBridge 171:3a7713b1edbc 144 #define TSC_CTPH_5CYCLES ((uint32_t)( 4U << 28))
AnnaBridge 171:3a7713b1edbc 145 #define TSC_CTPH_6CYCLES ((uint32_t)( 5U << 28))
AnnaBridge 171:3a7713b1edbc 146 #define TSC_CTPH_7CYCLES ((uint32_t)( 6U << 28))
AnnaBridge 171:3a7713b1edbc 147 #define TSC_CTPH_8CYCLES ((uint32_t)( 7U << 28))
AnnaBridge 171:3a7713b1edbc 148 #define TSC_CTPH_9CYCLES ((uint32_t)( 8U << 28))
AnnaBridge 171:3a7713b1edbc 149 #define TSC_CTPH_10CYCLES ((uint32_t)( 9U << 28))
AnnaBridge 171:3a7713b1edbc 150 #define TSC_CTPH_11CYCLES ((uint32_t)(10U << 28))
AnnaBridge 171:3a7713b1edbc 151 #define TSC_CTPH_12CYCLES ((uint32_t)(11U << 28))
AnnaBridge 171:3a7713b1edbc 152 #define TSC_CTPH_13CYCLES ((uint32_t)(12U << 28))
AnnaBridge 171:3a7713b1edbc 153 #define TSC_CTPH_14CYCLES ((uint32_t)(13U << 28))
AnnaBridge 171:3a7713b1edbc 154 #define TSC_CTPH_15CYCLES ((uint32_t)(14U << 28))
AnnaBridge 171:3a7713b1edbc 155 #define TSC_CTPH_16CYCLES ((uint32_t)(15U << 28))
AnnaBridge 171:3a7713b1edbc 156 #define IS_TSC_CTPH(VAL) (((VAL) == TSC_CTPH_1CYCLE) || \
AnnaBridge 171:3a7713b1edbc 157 ((VAL) == TSC_CTPH_2CYCLES) || \
AnnaBridge 171:3a7713b1edbc 158 ((VAL) == TSC_CTPH_3CYCLES) || \
AnnaBridge 171:3a7713b1edbc 159 ((VAL) == TSC_CTPH_4CYCLES) || \
AnnaBridge 171:3a7713b1edbc 160 ((VAL) == TSC_CTPH_5CYCLES) || \
AnnaBridge 171:3a7713b1edbc 161 ((VAL) == TSC_CTPH_6CYCLES) || \
AnnaBridge 171:3a7713b1edbc 162 ((VAL) == TSC_CTPH_7CYCLES) || \
AnnaBridge 171:3a7713b1edbc 163 ((VAL) == TSC_CTPH_8CYCLES) || \
AnnaBridge 171:3a7713b1edbc 164 ((VAL) == TSC_CTPH_9CYCLES) || \
AnnaBridge 171:3a7713b1edbc 165 ((VAL) == TSC_CTPH_10CYCLES) || \
AnnaBridge 171:3a7713b1edbc 166 ((VAL) == TSC_CTPH_11CYCLES) || \
AnnaBridge 171:3a7713b1edbc 167 ((VAL) == TSC_CTPH_12CYCLES) || \
AnnaBridge 171:3a7713b1edbc 168 ((VAL) == TSC_CTPH_13CYCLES) || \
AnnaBridge 171:3a7713b1edbc 169 ((VAL) == TSC_CTPH_14CYCLES) || \
AnnaBridge 171:3a7713b1edbc 170 ((VAL) == TSC_CTPH_15CYCLES) || \
AnnaBridge 171:3a7713b1edbc 171 ((VAL) == TSC_CTPH_16CYCLES))
AnnaBridge 171:3a7713b1edbc 172 /**
AnnaBridge 171:3a7713b1edbc 173 * @}
AnnaBridge 171:3a7713b1edbc 174 */
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 /** @defgroup TSC_CTPL_Cycles TSC Charge Transfer Pulse Low
AnnaBridge 171:3a7713b1edbc 177 * @{
AnnaBridge 171:3a7713b1edbc 178 */
AnnaBridge 171:3a7713b1edbc 179 #define TSC_CTPL_1CYCLE ((uint32_t)( 0U << 24))
AnnaBridge 171:3a7713b1edbc 180 #define TSC_CTPL_2CYCLES ((uint32_t)( 1U << 24))
AnnaBridge 171:3a7713b1edbc 181 #define TSC_CTPL_3CYCLES ((uint32_t)( 2U << 24))
AnnaBridge 171:3a7713b1edbc 182 #define TSC_CTPL_4CYCLES ((uint32_t)( 3U << 24))
AnnaBridge 171:3a7713b1edbc 183 #define TSC_CTPL_5CYCLES ((uint32_t)( 4U << 24))
AnnaBridge 171:3a7713b1edbc 184 #define TSC_CTPL_6CYCLES ((uint32_t)( 5U << 24))
AnnaBridge 171:3a7713b1edbc 185 #define TSC_CTPL_7CYCLES ((uint32_t)( 6U << 24))
AnnaBridge 171:3a7713b1edbc 186 #define TSC_CTPL_8CYCLES ((uint32_t)( 7U << 24))
AnnaBridge 171:3a7713b1edbc 187 #define TSC_CTPL_9CYCLES ((uint32_t)( 8U << 24))
AnnaBridge 171:3a7713b1edbc 188 #define TSC_CTPL_10CYCLES ((uint32_t)( 9U << 24))
AnnaBridge 171:3a7713b1edbc 189 #define TSC_CTPL_11CYCLES ((uint32_t)(10U << 24))
AnnaBridge 171:3a7713b1edbc 190 #define TSC_CTPL_12CYCLES ((uint32_t)(11U << 24))
AnnaBridge 171:3a7713b1edbc 191 #define TSC_CTPL_13CYCLES ((uint32_t)(12U << 24))
AnnaBridge 171:3a7713b1edbc 192 #define TSC_CTPL_14CYCLES ((uint32_t)(13U << 24))
AnnaBridge 171:3a7713b1edbc 193 #define TSC_CTPL_15CYCLES ((uint32_t)(14U << 24))
AnnaBridge 171:3a7713b1edbc 194 #define TSC_CTPL_16CYCLES ((uint32_t)(15U << 24))
AnnaBridge 171:3a7713b1edbc 195 #define IS_TSC_CTPL(VAL) (((VAL) == TSC_CTPL_1CYCLE) || \
AnnaBridge 171:3a7713b1edbc 196 ((VAL) == TSC_CTPL_2CYCLES) || \
AnnaBridge 171:3a7713b1edbc 197 ((VAL) == TSC_CTPL_3CYCLES) || \
AnnaBridge 171:3a7713b1edbc 198 ((VAL) == TSC_CTPL_4CYCLES) || \
AnnaBridge 171:3a7713b1edbc 199 ((VAL) == TSC_CTPL_5CYCLES) || \
AnnaBridge 171:3a7713b1edbc 200 ((VAL) == TSC_CTPL_6CYCLES) || \
AnnaBridge 171:3a7713b1edbc 201 ((VAL) == TSC_CTPL_7CYCLES) || \
AnnaBridge 171:3a7713b1edbc 202 ((VAL) == TSC_CTPL_8CYCLES) || \
AnnaBridge 171:3a7713b1edbc 203 ((VAL) == TSC_CTPL_9CYCLES) || \
AnnaBridge 171:3a7713b1edbc 204 ((VAL) == TSC_CTPL_10CYCLES) || \
AnnaBridge 171:3a7713b1edbc 205 ((VAL) == TSC_CTPL_11CYCLES) || \
AnnaBridge 171:3a7713b1edbc 206 ((VAL) == TSC_CTPL_12CYCLES) || \
AnnaBridge 171:3a7713b1edbc 207 ((VAL) == TSC_CTPL_13CYCLES) || \
AnnaBridge 171:3a7713b1edbc 208 ((VAL) == TSC_CTPL_14CYCLES) || \
AnnaBridge 171:3a7713b1edbc 209 ((VAL) == TSC_CTPL_15CYCLES) || \
AnnaBridge 171:3a7713b1edbc 210 ((VAL) == TSC_CTPL_16CYCLES))
AnnaBridge 171:3a7713b1edbc 211 /**
AnnaBridge 171:3a7713b1edbc 212 * @}
AnnaBridge 171:3a7713b1edbc 213 */
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 /** @defgroup TSC_SS_Prescaler_definition TSC Spread spectrum prescaler definition
AnnaBridge 171:3a7713b1edbc 216 * @{
AnnaBridge 171:3a7713b1edbc 217 */
AnnaBridge 171:3a7713b1edbc 218 #define TSC_SS_PRESC_DIV1 (0U)
AnnaBridge 171:3a7713b1edbc 219 #define TSC_SS_PRESC_DIV2 (TSC_CR_SSPSC)
AnnaBridge 171:3a7713b1edbc 220 #define IS_TSC_SS_PRESC(VAL) (((VAL) == TSC_SS_PRESC_DIV1) || ((VAL) == TSC_SS_PRESC_DIV2))
AnnaBridge 171:3a7713b1edbc 221
AnnaBridge 171:3a7713b1edbc 222 /**
AnnaBridge 171:3a7713b1edbc 223 * @}
AnnaBridge 171:3a7713b1edbc 224 */
AnnaBridge 171:3a7713b1edbc 225
AnnaBridge 171:3a7713b1edbc 226 /** @defgroup TSC_PG_Prescaler_definition TSC Pulse Generator prescaler definition
AnnaBridge 171:3a7713b1edbc 227 * @{
AnnaBridge 171:3a7713b1edbc 228 */
AnnaBridge 171:3a7713b1edbc 229 #define TSC_PG_PRESC_DIV1 ((uint32_t)(0 << 12))
AnnaBridge 171:3a7713b1edbc 230 #define TSC_PG_PRESC_DIV2 ((uint32_t)(1 << 12))
AnnaBridge 171:3a7713b1edbc 231 #define TSC_PG_PRESC_DIV4 ((uint32_t)(2 << 12))
AnnaBridge 171:3a7713b1edbc 232 #define TSC_PG_PRESC_DIV8 ((uint32_t)(3 << 12))
AnnaBridge 171:3a7713b1edbc 233 #define TSC_PG_PRESC_DIV16 ((uint32_t)(4 << 12))
AnnaBridge 171:3a7713b1edbc 234 #define TSC_PG_PRESC_DIV32 ((uint32_t)(5 << 12))
AnnaBridge 171:3a7713b1edbc 235 #define TSC_PG_PRESC_DIV64 ((uint32_t)(6 << 12))
AnnaBridge 171:3a7713b1edbc 236 #define TSC_PG_PRESC_DIV128 ((uint32_t)(7 << 12))
AnnaBridge 171:3a7713b1edbc 237 #define IS_TSC_PG_PRESC(VAL) (((VAL) == TSC_PG_PRESC_DIV1) || \
AnnaBridge 171:3a7713b1edbc 238 ((VAL) == TSC_PG_PRESC_DIV2) || \
AnnaBridge 171:3a7713b1edbc 239 ((VAL) == TSC_PG_PRESC_DIV4) || \
AnnaBridge 171:3a7713b1edbc 240 ((VAL) == TSC_PG_PRESC_DIV8) || \
AnnaBridge 171:3a7713b1edbc 241 ((VAL) == TSC_PG_PRESC_DIV16) || \
AnnaBridge 171:3a7713b1edbc 242 ((VAL) == TSC_PG_PRESC_DIV32) || \
AnnaBridge 171:3a7713b1edbc 243 ((VAL) == TSC_PG_PRESC_DIV64) || \
AnnaBridge 171:3a7713b1edbc 244 ((VAL) == TSC_PG_PRESC_DIV128))
AnnaBridge 171:3a7713b1edbc 245 /**
AnnaBridge 171:3a7713b1edbc 246 * @}
AnnaBridge 171:3a7713b1edbc 247 */
AnnaBridge 171:3a7713b1edbc 248
AnnaBridge 171:3a7713b1edbc 249 /** @defgroup TSC_MCV_definition TSC Max Count Value definition
AnnaBridge 171:3a7713b1edbc 250 * @{
AnnaBridge 171:3a7713b1edbc 251 */
AnnaBridge 171:3a7713b1edbc 252 #define TSC_MCV_255 ((uint32_t)(0 << 5))
AnnaBridge 171:3a7713b1edbc 253 #define TSC_MCV_511 ((uint32_t)(1 << 5))
AnnaBridge 171:3a7713b1edbc 254 #define TSC_MCV_1023 ((uint32_t)(2 << 5))
AnnaBridge 171:3a7713b1edbc 255 #define TSC_MCV_2047 ((uint32_t)(3 << 5))
AnnaBridge 171:3a7713b1edbc 256 #define TSC_MCV_4095 ((uint32_t)(4 << 5))
AnnaBridge 171:3a7713b1edbc 257 #define TSC_MCV_8191 ((uint32_t)(5 << 5))
AnnaBridge 171:3a7713b1edbc 258 #define TSC_MCV_16383 ((uint32_t)(6 << 5))
AnnaBridge 171:3a7713b1edbc 259 #define IS_TSC_MCV(VAL) (((VAL) == TSC_MCV_255) || \
AnnaBridge 171:3a7713b1edbc 260 ((VAL) == TSC_MCV_511) || \
AnnaBridge 171:3a7713b1edbc 261 ((VAL) == TSC_MCV_1023) || \
AnnaBridge 171:3a7713b1edbc 262 ((VAL) == TSC_MCV_2047) || \
AnnaBridge 171:3a7713b1edbc 263 ((VAL) == TSC_MCV_4095) || \
AnnaBridge 171:3a7713b1edbc 264 ((VAL) == TSC_MCV_8191) || \
AnnaBridge 171:3a7713b1edbc 265 ((VAL) == TSC_MCV_16383))
AnnaBridge 171:3a7713b1edbc 266 /**
AnnaBridge 171:3a7713b1edbc 267 * @}
AnnaBridge 171:3a7713b1edbc 268 */
AnnaBridge 171:3a7713b1edbc 269
AnnaBridge 171:3a7713b1edbc 270 /** @defgroup TSC_IO_default_mode_definition TSC I/O default mode definition
AnnaBridge 171:3a7713b1edbc 271 * @{
AnnaBridge 171:3a7713b1edbc 272 */
AnnaBridge 171:3a7713b1edbc 273 #define TSC_IODEF_OUT_PP_LOW (0U)
AnnaBridge 171:3a7713b1edbc 274 #define TSC_IODEF_IN_FLOAT (TSC_CR_IODEF)
AnnaBridge 171:3a7713b1edbc 275 #define IS_TSC_IODEF(VAL) (((VAL) == TSC_IODEF_OUT_PP_LOW) || ((VAL) == TSC_IODEF_IN_FLOAT))
AnnaBridge 171:3a7713b1edbc 276 /**
AnnaBridge 171:3a7713b1edbc 277 * @}
AnnaBridge 171:3a7713b1edbc 278 */
AnnaBridge 171:3a7713b1edbc 279
AnnaBridge 171:3a7713b1edbc 280 /** @defgroup TSC_Synchronization_pin_polarity TSC Synchronization pin polarity
AnnaBridge 171:3a7713b1edbc 281 * @{
AnnaBridge 171:3a7713b1edbc 282 */
AnnaBridge 171:3a7713b1edbc 283 #define TSC_SYNC_POLARITY_FALLING (0U)
AnnaBridge 171:3a7713b1edbc 284 #define TSC_SYNC_POLARITY_RISING (TSC_CR_SYNCPOL)
AnnaBridge 171:3a7713b1edbc 285 #define IS_TSC_SYNC_POL(VAL) (((VAL) == TSC_SYNC_POLARITY_FALLING) || ((VAL) == TSC_SYNC_POLARITY_RISING))
AnnaBridge 171:3a7713b1edbc 286 /**
AnnaBridge 171:3a7713b1edbc 287 * @}
AnnaBridge 171:3a7713b1edbc 288 */
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 /** @defgroup TSC_Acquisition_mode TSC Acquisition mode
AnnaBridge 171:3a7713b1edbc 291 * @{
AnnaBridge 171:3a7713b1edbc 292 */
AnnaBridge 171:3a7713b1edbc 293 #define TSC_ACQ_MODE_NORMAL (0U)
AnnaBridge 171:3a7713b1edbc 294 #define TSC_ACQ_MODE_SYNCHRO (TSC_CR_AM)
AnnaBridge 171:3a7713b1edbc 295 #define IS_TSC_ACQ_MODE(VAL) (((VAL) == TSC_ACQ_MODE_NORMAL) || ((VAL) == TSC_ACQ_MODE_SYNCHRO))
AnnaBridge 171:3a7713b1edbc 296 /**
AnnaBridge 171:3a7713b1edbc 297 * @}
AnnaBridge 171:3a7713b1edbc 298 */
AnnaBridge 171:3a7713b1edbc 299
AnnaBridge 171:3a7713b1edbc 300 /** @defgroup TSC_IO_mode_definition TSC I/O mode definition
AnnaBridge 171:3a7713b1edbc 301 * @{
AnnaBridge 171:3a7713b1edbc 302 */
AnnaBridge 171:3a7713b1edbc 303 #define TSC_IOMODE_UNUSED (0U)
AnnaBridge 171:3a7713b1edbc 304 #define TSC_IOMODE_CHANNEL (1U)
AnnaBridge 171:3a7713b1edbc 305 #define TSC_IOMODE_SHIELD (2U)
AnnaBridge 171:3a7713b1edbc 306 #define TSC_IOMODE_SAMPLING (3U)
AnnaBridge 171:3a7713b1edbc 307 #define IS_TSC_IOMODE(VAL) (((VAL) == TSC_IOMODE_UNUSED) || \
AnnaBridge 171:3a7713b1edbc 308 ((VAL) == TSC_IOMODE_CHANNEL) || \
AnnaBridge 171:3a7713b1edbc 309 ((VAL) == TSC_IOMODE_SHIELD) || \
AnnaBridge 171:3a7713b1edbc 310 ((VAL) == TSC_IOMODE_SAMPLING))
AnnaBridge 171:3a7713b1edbc 311 /**
AnnaBridge 171:3a7713b1edbc 312 * @}
AnnaBridge 171:3a7713b1edbc 313 */
AnnaBridge 171:3a7713b1edbc 314
AnnaBridge 171:3a7713b1edbc 315 /** @defgroup TSC_interrupts_definition TSC interrupts definition
AnnaBridge 171:3a7713b1edbc 316 * @{
AnnaBridge 171:3a7713b1edbc 317 */
AnnaBridge 171:3a7713b1edbc 318 #define TSC_IT_EOA ((uint32_t)TSC_IER_EOAIE)
AnnaBridge 171:3a7713b1edbc 319 #define TSC_IT_MCE ((uint32_t)TSC_IER_MCEIE)
AnnaBridge 171:3a7713b1edbc 320 #define IS_TSC_MCE_IT(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
AnnaBridge 171:3a7713b1edbc 321 /**
AnnaBridge 171:3a7713b1edbc 322 * @}
AnnaBridge 171:3a7713b1edbc 323 */
AnnaBridge 171:3a7713b1edbc 324
AnnaBridge 171:3a7713b1edbc 325 /** @defgroup TSC_flags_definition TSC Flags Definition
AnnaBridge 171:3a7713b1edbc 326 * @{
AnnaBridge 171:3a7713b1edbc 327 */
AnnaBridge 171:3a7713b1edbc 328 #define TSC_FLAG_EOA ((uint32_t)TSC_ISR_EOAF)
AnnaBridge 171:3a7713b1edbc 329 #define TSC_FLAG_MCE ((uint32_t)TSC_ISR_MCEF)
AnnaBridge 171:3a7713b1edbc 330 /**
AnnaBridge 171:3a7713b1edbc 331 * @}
AnnaBridge 171:3a7713b1edbc 332 */
AnnaBridge 171:3a7713b1edbc 333
AnnaBridge 171:3a7713b1edbc 334 /** @defgroup TSC_groups_definition TSC groups definition
AnnaBridge 171:3a7713b1edbc 335 * @{
AnnaBridge 171:3a7713b1edbc 336 */
AnnaBridge 171:3a7713b1edbc 337 #define TSC_NB_OF_GROUPS (8)
AnnaBridge 171:3a7713b1edbc 338
AnnaBridge 171:3a7713b1edbc 339 #define TSC_GROUP1 (0x00000001U)
AnnaBridge 171:3a7713b1edbc 340 #define TSC_GROUP2 (0x00000002U)
AnnaBridge 171:3a7713b1edbc 341 #define TSC_GROUP3 (0x00000004U)
AnnaBridge 171:3a7713b1edbc 342 #define TSC_GROUP4 (0x00000008U)
AnnaBridge 171:3a7713b1edbc 343 #define TSC_GROUP5 (0x00000010U)
AnnaBridge 171:3a7713b1edbc 344 #define TSC_GROUP6 (0x00000020U)
AnnaBridge 171:3a7713b1edbc 345 #define TSC_GROUP7 (0x00000040U)
AnnaBridge 171:3a7713b1edbc 346 #define TSC_GROUP8 (0x00000080U)
AnnaBridge 171:3a7713b1edbc 347 #define TSC_ALL_GROUPS (0x000000FFU)
AnnaBridge 171:3a7713b1edbc 348
AnnaBridge 171:3a7713b1edbc 349 #define TSC_GROUP1_IDX (0U)
AnnaBridge 171:3a7713b1edbc 350 #define TSC_GROUP2_IDX (1U)
AnnaBridge 171:3a7713b1edbc 351 #define TSC_GROUP3_IDX (2U)
AnnaBridge 171:3a7713b1edbc 352 #define TSC_GROUP4_IDX (3U)
AnnaBridge 171:3a7713b1edbc 353 #define TSC_GROUP5_IDX (4U)
AnnaBridge 171:3a7713b1edbc 354 #define TSC_GROUP6_IDX (5U)
AnnaBridge 171:3a7713b1edbc 355 #define TSC_GROUP7_IDX (6U)
AnnaBridge 171:3a7713b1edbc 356 #define TSC_GROUP8_IDX (7U)
AnnaBridge 171:3a7713b1edbc 357 #define IS_GROUP_INDEX(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < TSC_NB_OF_GROUPS)))
AnnaBridge 171:3a7713b1edbc 358
AnnaBridge 171:3a7713b1edbc 359 #define TSC_GROUP1_IO1 (0x00000001U)
AnnaBridge 171:3a7713b1edbc 360 #define TSC_GROUP1_IO2 (0x00000002U)
AnnaBridge 171:3a7713b1edbc 361 #define TSC_GROUP1_IO3 (0x00000004U)
AnnaBridge 171:3a7713b1edbc 362 #define TSC_GROUP1_IO4 (0x00000008U)
AnnaBridge 171:3a7713b1edbc 363 #define TSC_GROUP1_ALL_IOS (0x0000000FU)
AnnaBridge 171:3a7713b1edbc 364
AnnaBridge 171:3a7713b1edbc 365 #define TSC_GROUP2_IO1 (0x00000010U)
AnnaBridge 171:3a7713b1edbc 366 #define TSC_GROUP2_IO2 (0x00000020U)
AnnaBridge 171:3a7713b1edbc 367 #define TSC_GROUP2_IO3 (0x00000040U)
AnnaBridge 171:3a7713b1edbc 368 #define TSC_GROUP2_IO4 (0x00000080U)
AnnaBridge 171:3a7713b1edbc 369 #define TSC_GROUP2_ALL_IOS (0x000000F0U)
AnnaBridge 171:3a7713b1edbc 370
AnnaBridge 171:3a7713b1edbc 371 #define TSC_GROUP3_IO1 (0x00000100U)
AnnaBridge 171:3a7713b1edbc 372 #define TSC_GROUP3_IO2 (0x00000200U)
AnnaBridge 171:3a7713b1edbc 373 #define TSC_GROUP3_IO3 (0x00000400U)
AnnaBridge 171:3a7713b1edbc 374 #define TSC_GROUP3_IO4 (0x00000800U)
AnnaBridge 171:3a7713b1edbc 375 #define TSC_GROUP3_ALL_IOS (0x00000F00U)
AnnaBridge 171:3a7713b1edbc 376
AnnaBridge 171:3a7713b1edbc 377 #define TSC_GROUP4_IO1 (0x00001000U)
AnnaBridge 171:3a7713b1edbc 378 #define TSC_GROUP4_IO2 (0x00002000U)
AnnaBridge 171:3a7713b1edbc 379 #define TSC_GROUP4_IO3 (0x00004000U)
AnnaBridge 171:3a7713b1edbc 380 #define TSC_GROUP4_IO4 (0x00008000U)
AnnaBridge 171:3a7713b1edbc 381 #define TSC_GROUP4_ALL_IOS (0x0000F000U)
AnnaBridge 171:3a7713b1edbc 382
AnnaBridge 171:3a7713b1edbc 383 #define TSC_GROUP5_IO1 (0x00010000U)
AnnaBridge 171:3a7713b1edbc 384 #define TSC_GROUP5_IO2 (0x00020000U)
AnnaBridge 171:3a7713b1edbc 385 #define TSC_GROUP5_IO3 (0x00040000U)
AnnaBridge 171:3a7713b1edbc 386 #define TSC_GROUP5_IO4 (0x00080000U)
AnnaBridge 171:3a7713b1edbc 387 #define TSC_GROUP5_ALL_IOS (0x000F0000U)
AnnaBridge 171:3a7713b1edbc 388
AnnaBridge 171:3a7713b1edbc 389 #define TSC_GROUP6_IO1 (0x00100000U)
AnnaBridge 171:3a7713b1edbc 390 #define TSC_GROUP6_IO2 (0x00200000U)
AnnaBridge 171:3a7713b1edbc 391 #define TSC_GROUP6_IO3 (0x00400000U)
AnnaBridge 171:3a7713b1edbc 392 #define TSC_GROUP6_IO4 (0x00800000U)
AnnaBridge 171:3a7713b1edbc 393 #define TSC_GROUP6_ALL_IOS (0x00F00000U)
AnnaBridge 171:3a7713b1edbc 394
AnnaBridge 171:3a7713b1edbc 395 #define TSC_GROUP7_IO1 (0x01000000U)
AnnaBridge 171:3a7713b1edbc 396 #define TSC_GROUP7_IO2 (0x02000000U)
AnnaBridge 171:3a7713b1edbc 397 #define TSC_GROUP7_IO3 (0x04000000U)
AnnaBridge 171:3a7713b1edbc 398 #define TSC_GROUP7_IO4 (0x08000000U)
AnnaBridge 171:3a7713b1edbc 399 #define TSC_GROUP7_ALL_IOS (0x0F000000U)
AnnaBridge 171:3a7713b1edbc 400
AnnaBridge 171:3a7713b1edbc 401 #define TSC_GROUP8_IO1 (0x10000000U)
AnnaBridge 171:3a7713b1edbc 402 #define TSC_GROUP8_IO2 (0x20000000U)
AnnaBridge 171:3a7713b1edbc 403 #define TSC_GROUP8_IO3 (0x40000000U)
AnnaBridge 171:3a7713b1edbc 404 #define TSC_GROUP8_IO4 (0x80000000U)
AnnaBridge 171:3a7713b1edbc 405 #define TSC_GROUP8_ALL_IOS (0xF0000000U)
AnnaBridge 171:3a7713b1edbc 406
AnnaBridge 171:3a7713b1edbc 407 #define TSC_ALL_GROUPS_ALL_IOS (0xFFFFFFFFU)
AnnaBridge 171:3a7713b1edbc 408 /**
AnnaBridge 171:3a7713b1edbc 409 * @}
AnnaBridge 171:3a7713b1edbc 410 */
AnnaBridge 171:3a7713b1edbc 411
AnnaBridge 171:3a7713b1edbc 412 /**
AnnaBridge 171:3a7713b1edbc 413 * @}
AnnaBridge 171:3a7713b1edbc 414 */
AnnaBridge 171:3a7713b1edbc 415
AnnaBridge 171:3a7713b1edbc 416 /* Private macros -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 417 /** @defgroup TSC_Private_Macros TSC Private Macros
AnnaBridge 171:3a7713b1edbc 418 * @{
AnnaBridge 171:3a7713b1edbc 419 */
AnnaBridge 171:3a7713b1edbc 420 /** @defgroup TSC_Spread_Spectrum TSC Spread Spectrum
AnnaBridge 171:3a7713b1edbc 421 * @{
AnnaBridge 171:3a7713b1edbc 422 */
AnnaBridge 171:3a7713b1edbc 423 #define IS_TSC_SS(VAL) (((VAL) == DISABLE) || ((VAL) == ENABLE))
AnnaBridge 171:3a7713b1edbc 424
AnnaBridge 171:3a7713b1edbc 425 #define IS_TSC_SSD(VAL) (((VAL) == 0U) || (((VAL) > 0U) && ((VAL) < 128U)))
AnnaBridge 171:3a7713b1edbc 426 /**
AnnaBridge 171:3a7713b1edbc 427 * @}
AnnaBridge 171:3a7713b1edbc 428 */
AnnaBridge 171:3a7713b1edbc 429
AnnaBridge 171:3a7713b1edbc 430 /**
AnnaBridge 171:3a7713b1edbc 431 * @}
AnnaBridge 171:3a7713b1edbc 432 */
AnnaBridge 171:3a7713b1edbc 433
AnnaBridge 171:3a7713b1edbc 434 /* Exported macros -----------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 435 /** @defgroup TSC_Exported_Macros TSC Exported Macros
AnnaBridge 171:3a7713b1edbc 436 * @{
AnnaBridge 171:3a7713b1edbc 437 */
AnnaBridge 171:3a7713b1edbc 438
AnnaBridge 171:3a7713b1edbc 439 /** @brief Reset TSC handle state
AnnaBridge 171:3a7713b1edbc 440 * @param __HANDLE__ TSC handle.
AnnaBridge 171:3a7713b1edbc 441 * @retval None
AnnaBridge 171:3a7713b1edbc 442 */
AnnaBridge 171:3a7713b1edbc 443 #define __HAL_TSC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TSC_STATE_RESET)
AnnaBridge 171:3a7713b1edbc 444
AnnaBridge 171:3a7713b1edbc 445 /**
AnnaBridge 171:3a7713b1edbc 446 * @brief Enable the TSC peripheral.
AnnaBridge 171:3a7713b1edbc 447 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 448 * @retval None
AnnaBridge 171:3a7713b1edbc 449 */
AnnaBridge 171:3a7713b1edbc 450 #define __HAL_TSC_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_TSCE)
AnnaBridge 171:3a7713b1edbc 451
AnnaBridge 171:3a7713b1edbc 452 /**
AnnaBridge 171:3a7713b1edbc 453 * @brief Disable the TSC peripheral.
AnnaBridge 171:3a7713b1edbc 454 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 455 * @retval None
AnnaBridge 171:3a7713b1edbc 456 */
AnnaBridge 171:3a7713b1edbc 457 #define __HAL_TSC_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_TSCE))
AnnaBridge 171:3a7713b1edbc 458
AnnaBridge 171:3a7713b1edbc 459 /**
AnnaBridge 171:3a7713b1edbc 460 * @brief Start acquisition
AnnaBridge 171:3a7713b1edbc 461 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 462 * @retval None
AnnaBridge 171:3a7713b1edbc 463 */
AnnaBridge 171:3a7713b1edbc 464 #define __HAL_TSC_START_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_START)
AnnaBridge 171:3a7713b1edbc 465
AnnaBridge 171:3a7713b1edbc 466 /**
AnnaBridge 171:3a7713b1edbc 467 * @brief Stop acquisition
AnnaBridge 171:3a7713b1edbc 468 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 469 * @retval None
AnnaBridge 171:3a7713b1edbc 470 */
AnnaBridge 171:3a7713b1edbc 471 #define __HAL_TSC_STOP_ACQ(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_START))
AnnaBridge 171:3a7713b1edbc 472
AnnaBridge 171:3a7713b1edbc 473 /**
AnnaBridge 171:3a7713b1edbc 474 * @brief Set IO default mode to output push-pull low
AnnaBridge 171:3a7713b1edbc 475 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 476 * @retval None
AnnaBridge 171:3a7713b1edbc 477 */
AnnaBridge 171:3a7713b1edbc 478 #define __HAL_TSC_SET_IODEF_OUTPPLOW(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_IODEF))
AnnaBridge 171:3a7713b1edbc 479
AnnaBridge 171:3a7713b1edbc 480 /**
AnnaBridge 171:3a7713b1edbc 481 * @brief Set IO default mode to input floating
AnnaBridge 171:3a7713b1edbc 482 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 483 * @retval None
AnnaBridge 171:3a7713b1edbc 484 */
AnnaBridge 171:3a7713b1edbc 485 #define __HAL_TSC_SET_IODEF_INFLOAT(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_IODEF)
AnnaBridge 171:3a7713b1edbc 486
AnnaBridge 171:3a7713b1edbc 487 /**
AnnaBridge 171:3a7713b1edbc 488 * @brief Set synchronization polarity to falling edge
AnnaBridge 171:3a7713b1edbc 489 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 490 * @retval None
AnnaBridge 171:3a7713b1edbc 491 */
AnnaBridge 171:3a7713b1edbc 492 #define __HAL_TSC_SET_SYNC_POL_FALL(__HANDLE__) ((__HANDLE__)->Instance->CR &= (uint32_t)(~TSC_CR_SYNCPOL))
AnnaBridge 171:3a7713b1edbc 493
AnnaBridge 171:3a7713b1edbc 494 /**
AnnaBridge 171:3a7713b1edbc 495 * @brief Set synchronization polarity to rising edge and high level
AnnaBridge 171:3a7713b1edbc 496 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 497 * @retval None
AnnaBridge 171:3a7713b1edbc 498 */
AnnaBridge 171:3a7713b1edbc 499 #define __HAL_TSC_SET_SYNC_POL_RISE_HIGH(__HANDLE__) ((__HANDLE__)->Instance->CR |= TSC_CR_SYNCPOL)
AnnaBridge 171:3a7713b1edbc 500
AnnaBridge 171:3a7713b1edbc 501 /**
AnnaBridge 171:3a7713b1edbc 502 * @brief Enable TSC interrupt.
AnnaBridge 171:3a7713b1edbc 503 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 504 * @param __INTERRUPT__ TSC interrupt
AnnaBridge 171:3a7713b1edbc 505 * @retval None
AnnaBridge 171:3a7713b1edbc 506 */
AnnaBridge 171:3a7713b1edbc 507 #define __HAL_TSC_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 508
AnnaBridge 171:3a7713b1edbc 509 /**
AnnaBridge 171:3a7713b1edbc 510 * @brief Disable TSC interrupt.
AnnaBridge 171:3a7713b1edbc 511 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 512 * @param __INTERRUPT__ TSC interrupt
AnnaBridge 171:3a7713b1edbc 513 * @retval None
AnnaBridge 171:3a7713b1edbc 514 */
AnnaBridge 171:3a7713b1edbc 515 #define __HAL_TSC_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= (uint32_t)(~(__INTERRUPT__)))
AnnaBridge 171:3a7713b1edbc 516
AnnaBridge 171:3a7713b1edbc 517 /** @brief Check if the specified TSC interrupt source is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 518 * @param __HANDLE__ TSC Handle
AnnaBridge 171:3a7713b1edbc 519 * @param __INTERRUPT__ TSC interrupt
AnnaBridge 171:3a7713b1edbc 520 * @retval SET or RESET
AnnaBridge 171:3a7713b1edbc 521 */
AnnaBridge 171:3a7713b1edbc 522 #define __HAL_TSC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
AnnaBridge 171:3a7713b1edbc 523
AnnaBridge 171:3a7713b1edbc 524 /**
AnnaBridge 171:3a7713b1edbc 525 * @brief Get the selected TSC's flag status.
AnnaBridge 171:3a7713b1edbc 526 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 527 * @param __FLAG__ TSC flag
AnnaBridge 171:3a7713b1edbc 528 * @retval SET or RESET
AnnaBridge 171:3a7713b1edbc 529 */
AnnaBridge 171:3a7713b1edbc 530 #define __HAL_TSC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) ? SET : RESET)
AnnaBridge 171:3a7713b1edbc 531
AnnaBridge 171:3a7713b1edbc 532 /**
AnnaBridge 171:3a7713b1edbc 533 * @brief Clear the TSC's pending flag.
AnnaBridge 171:3a7713b1edbc 534 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 535 * @param __FLAG__ TSC flag
AnnaBridge 171:3a7713b1edbc 536 * @retval None
AnnaBridge 171:3a7713b1edbc 537 */
AnnaBridge 171:3a7713b1edbc 538 #define __HAL_TSC_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
AnnaBridge 171:3a7713b1edbc 539
AnnaBridge 171:3a7713b1edbc 540 /**
AnnaBridge 171:3a7713b1edbc 541 * @brief Enable schmitt trigger hysteresis on a group of IOs
AnnaBridge 171:3a7713b1edbc 542 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 543 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 544 * @retval None
AnnaBridge 171:3a7713b1edbc 545 */
AnnaBridge 171:3a7713b1edbc 546 #define __HAL_TSC_ENABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR |= (__GX_IOY_MASK__))
AnnaBridge 171:3a7713b1edbc 547
AnnaBridge 171:3a7713b1edbc 548 /**
AnnaBridge 171:3a7713b1edbc 549 * @brief Disable schmitt trigger hysteresis on a group of IOs
AnnaBridge 171:3a7713b1edbc 550 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 551 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 552 * @retval None
AnnaBridge 171:3a7713b1edbc 553 */
AnnaBridge 171:3a7713b1edbc 554 #define __HAL_TSC_DISABLE_HYSTERESIS(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOHCR &= (uint32_t)(~(__GX_IOY_MASK__)))
AnnaBridge 171:3a7713b1edbc 555
AnnaBridge 171:3a7713b1edbc 556 /**
AnnaBridge 171:3a7713b1edbc 557 * @brief Open analog switch on a group of IOs
AnnaBridge 171:3a7713b1edbc 558 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 559 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 560 * @retval None
AnnaBridge 171:3a7713b1edbc 561 */
AnnaBridge 171:3a7713b1edbc 562 #define __HAL_TSC_OPEN_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR &= (uint32_t)(~(__GX_IOY_MASK__)))
AnnaBridge 171:3a7713b1edbc 563
AnnaBridge 171:3a7713b1edbc 564 /**
AnnaBridge 171:3a7713b1edbc 565 * @brief Close analog switch on a group of IOs
AnnaBridge 171:3a7713b1edbc 566 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 567 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 568 * @retval None
AnnaBridge 171:3a7713b1edbc 569 */
AnnaBridge 171:3a7713b1edbc 570 #define __HAL_TSC_CLOSE_ANALOG_SWITCH(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOASCR |= (__GX_IOY_MASK__))
AnnaBridge 171:3a7713b1edbc 571
AnnaBridge 171:3a7713b1edbc 572 /**
AnnaBridge 171:3a7713b1edbc 573 * @brief Enable a group of IOs in channel mode
AnnaBridge 171:3a7713b1edbc 574 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 575 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 576 * @retval None
AnnaBridge 171:3a7713b1edbc 577 */
AnnaBridge 171:3a7713b1edbc 578 #define __HAL_TSC_ENABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR |= (__GX_IOY_MASK__))
AnnaBridge 171:3a7713b1edbc 579
AnnaBridge 171:3a7713b1edbc 580 /**
AnnaBridge 171:3a7713b1edbc 581 * @brief Disable a group of channel IOs
AnnaBridge 171:3a7713b1edbc 582 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 583 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 584 * @retval None
AnnaBridge 171:3a7713b1edbc 585 */
AnnaBridge 171:3a7713b1edbc 586 #define __HAL_TSC_DISABLE_CHANNEL(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOCCR &= (uint32_t)(~(__GX_IOY_MASK__)))
AnnaBridge 171:3a7713b1edbc 587
AnnaBridge 171:3a7713b1edbc 588 /**
AnnaBridge 171:3a7713b1edbc 589 * @brief Enable a group of IOs in sampling mode
AnnaBridge 171:3a7713b1edbc 590 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 591 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 592 * @retval None
AnnaBridge 171:3a7713b1edbc 593 */
AnnaBridge 171:3a7713b1edbc 594 #define __HAL_TSC_ENABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR |= (__GX_IOY_MASK__))
AnnaBridge 171:3a7713b1edbc 595
AnnaBridge 171:3a7713b1edbc 596 /**
AnnaBridge 171:3a7713b1edbc 597 * @brief Disable a group of sampling IOs
AnnaBridge 171:3a7713b1edbc 598 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 599 * @param __GX_IOY_MASK__ IOs mask
AnnaBridge 171:3a7713b1edbc 600 * @retval None
AnnaBridge 171:3a7713b1edbc 601 */
AnnaBridge 171:3a7713b1edbc 602 #define __HAL_TSC_DISABLE_SAMPLING(__HANDLE__, __GX_IOY_MASK__) ((__HANDLE__)->Instance->IOSCR &= (uint32_t)(~(__GX_IOY_MASK__)))
AnnaBridge 171:3a7713b1edbc 603
AnnaBridge 171:3a7713b1edbc 604 /**
AnnaBridge 171:3a7713b1edbc 605 * @brief Enable acquisition groups
AnnaBridge 171:3a7713b1edbc 606 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 607 * @param __GX_MASK__ Groups mask
AnnaBridge 171:3a7713b1edbc 608 * @retval None
AnnaBridge 171:3a7713b1edbc 609 */
AnnaBridge 171:3a7713b1edbc 610 #define __HAL_TSC_ENABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR |= (__GX_MASK__))
AnnaBridge 171:3a7713b1edbc 611
AnnaBridge 171:3a7713b1edbc 612 /**
AnnaBridge 171:3a7713b1edbc 613 * @brief Disable acquisition groups
AnnaBridge 171:3a7713b1edbc 614 * @param __HANDLE__ TSC handle
AnnaBridge 171:3a7713b1edbc 615 * @param __GX_MASK__ Groups mask
AnnaBridge 171:3a7713b1edbc 616 * @retval None
AnnaBridge 171:3a7713b1edbc 617 */
AnnaBridge 171:3a7713b1edbc 618 #define __HAL_TSC_DISABLE_GROUP(__HANDLE__, __GX_MASK__) ((__HANDLE__)->Instance->IOGCSR &= (uint32_t)(~(__GX_MASK__)))
AnnaBridge 171:3a7713b1edbc 619
AnnaBridge 171:3a7713b1edbc 620 /** @brief Gets acquisition group status
AnnaBridge 171:3a7713b1edbc 621 * @param __HANDLE__ TSC Handle
AnnaBridge 171:3a7713b1edbc 622 * @param __GX_INDEX__ Group index
AnnaBridge 171:3a7713b1edbc 623 * @retval SET or RESET
AnnaBridge 171:3a7713b1edbc 624 */
AnnaBridge 171:3a7713b1edbc 625 #define __HAL_TSC_GET_GROUP_STATUS(__HANDLE__, __GX_INDEX__) \
AnnaBridge 171:3a7713b1edbc 626 ((((__HANDLE__)->Instance->IOGCSR & (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) == (uint32_t)((uint32_t)1 << ((__GX_INDEX__) + (uint32_t)16))) ? TSC_GROUP_COMPLETED : TSC_GROUP_ONGOING)
AnnaBridge 171:3a7713b1edbc 627
AnnaBridge 171:3a7713b1edbc 628 /**
AnnaBridge 171:3a7713b1edbc 629 * @}
AnnaBridge 171:3a7713b1edbc 630 */
AnnaBridge 171:3a7713b1edbc 631
AnnaBridge 171:3a7713b1edbc 632 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 633 /** @addtogroup TSC_Exported_Functions TSC Exported Functions
AnnaBridge 171:3a7713b1edbc 634 * @{
AnnaBridge 171:3a7713b1edbc 635 */
AnnaBridge 171:3a7713b1edbc 636
AnnaBridge 171:3a7713b1edbc 637 /** @addtogroup TSC_Exported_Functions_Group1 Initialization/de-initialization functions
AnnaBridge 171:3a7713b1edbc 638 * @brief Initialization and Configuration functions
AnnaBridge 171:3a7713b1edbc 639 * @{
AnnaBridge 171:3a7713b1edbc 640 */
AnnaBridge 171:3a7713b1edbc 641 /* Initialization and de-initialization functions *****************************/
AnnaBridge 171:3a7713b1edbc 642 HAL_StatusTypeDef HAL_TSC_Init(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 643 HAL_StatusTypeDef HAL_TSC_DeInit(TSC_HandleTypeDef *htsc);
AnnaBridge 171:3a7713b1edbc 644 void HAL_TSC_MspInit(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 645 void HAL_TSC_MspDeInit(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 646 /**
AnnaBridge 171:3a7713b1edbc 647 * @}
AnnaBridge 171:3a7713b1edbc 648 */
AnnaBridge 171:3a7713b1edbc 649
AnnaBridge 171:3a7713b1edbc 650 /** @addtogroup TSC_Exported_Functions_Group2 IO operation functions
AnnaBridge 171:3a7713b1edbc 651 * @brief IO operation functions * @{
AnnaBridge 171:3a7713b1edbc 652 */
AnnaBridge 171:3a7713b1edbc 653 /* IO operation functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 654 HAL_StatusTypeDef HAL_TSC_Start(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 655 HAL_StatusTypeDef HAL_TSC_Start_IT(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 656 HAL_StatusTypeDef HAL_TSC_Stop(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 657 HAL_StatusTypeDef HAL_TSC_Stop_IT(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 658 TSC_GroupStatusTypeDef HAL_TSC_GroupGetStatus(TSC_HandleTypeDef* htsc, uint32_t gx_index);
AnnaBridge 171:3a7713b1edbc 659 uint32_t HAL_TSC_GroupGetValue(TSC_HandleTypeDef* htsc, uint32_t gx_index);
AnnaBridge 171:3a7713b1edbc 660 /**
AnnaBridge 171:3a7713b1edbc 661 * @}
AnnaBridge 171:3a7713b1edbc 662 */
AnnaBridge 171:3a7713b1edbc 663
AnnaBridge 171:3a7713b1edbc 664 /** @addtogroup TSC_Exported_Functions_Group3 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 665 * @brief Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 666 * @{
AnnaBridge 171:3a7713b1edbc 667 */
AnnaBridge 171:3a7713b1edbc 668 /* Peripheral Control functions ***********************************************/
AnnaBridge 171:3a7713b1edbc 669 HAL_StatusTypeDef HAL_TSC_IOConfig(TSC_HandleTypeDef* htsc, TSC_IOConfigTypeDef* config);
AnnaBridge 171:3a7713b1edbc 670 HAL_StatusTypeDef HAL_TSC_IODischarge(TSC_HandleTypeDef* htsc, uint32_t choice);
AnnaBridge 171:3a7713b1edbc 671 /**
AnnaBridge 171:3a7713b1edbc 672 * @}
AnnaBridge 171:3a7713b1edbc 673 */
AnnaBridge 171:3a7713b1edbc 674
AnnaBridge 171:3a7713b1edbc 675 /** @addtogroup TSC_Exported_Functions_Group4 State functions
AnnaBridge 171:3a7713b1edbc 676 * @brief State functions
AnnaBridge 171:3a7713b1edbc 677 * @{
AnnaBridge 171:3a7713b1edbc 678 */
AnnaBridge 171:3a7713b1edbc 679 /* Peripheral State and Error functions ***************************************/
AnnaBridge 171:3a7713b1edbc 680 HAL_TSC_StateTypeDef HAL_TSC_GetState(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 681 HAL_StatusTypeDef HAL_TSC_PollForAcquisition(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 682 void HAL_TSC_IRQHandler(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 683 /**
AnnaBridge 171:3a7713b1edbc 684 * @}
AnnaBridge 171:3a7713b1edbc 685 */
AnnaBridge 171:3a7713b1edbc 686
AnnaBridge 171:3a7713b1edbc 687 /** @addtogroup TSC_Exported_Functions_Group5 Callback functions
AnnaBridge 171:3a7713b1edbc 688 * @brief Callback functions
AnnaBridge 171:3a7713b1edbc 689 * @{
AnnaBridge 171:3a7713b1edbc 690 */
AnnaBridge 171:3a7713b1edbc 691 /* Callback functions *********************************************************/
AnnaBridge 171:3a7713b1edbc 692 void HAL_TSC_ConvCpltCallback(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 693 void HAL_TSC_ErrorCallback(TSC_HandleTypeDef* htsc);
AnnaBridge 171:3a7713b1edbc 694 /**
AnnaBridge 171:3a7713b1edbc 695 * @}
AnnaBridge 171:3a7713b1edbc 696 */
AnnaBridge 171:3a7713b1edbc 697
AnnaBridge 171:3a7713b1edbc 698 /**
AnnaBridge 171:3a7713b1edbc 699 * @}
AnnaBridge 171:3a7713b1edbc 700 */
AnnaBridge 171:3a7713b1edbc 701
AnnaBridge 171:3a7713b1edbc 702 /**
AnnaBridge 171:3a7713b1edbc 703 * @}
AnnaBridge 171:3a7713b1edbc 704 */
AnnaBridge 171:3a7713b1edbc 705
AnnaBridge 171:3a7713b1edbc 706 /**
AnnaBridge 171:3a7713b1edbc 707 * @}
AnnaBridge 171:3a7713b1edbc 708 */
AnnaBridge 171:3a7713b1edbc 709
AnnaBridge 171:3a7713b1edbc 710 #endif /* defined(STM32F051x8) || defined(STM32F071xB) || defined(STM32F091xC) || */
AnnaBridge 171:3a7713b1edbc 711 /* defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F072xB) || */
AnnaBridge 171:3a7713b1edbc 712 /* defined(STM32F058xx) || defined(STM32F078xx) || defined(STM32F098xx) */
AnnaBridge 171:3a7713b1edbc 713
AnnaBridge 171:3a7713b1edbc 714
AnnaBridge 171:3a7713b1edbc 715 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 716 }
AnnaBridge 171:3a7713b1edbc 717 #endif
AnnaBridge 171:3a7713b1edbc 718
AnnaBridge 171:3a7713b1edbc 719 #endif /*__STM32F0xx_TSC_H */
AnnaBridge 171:3a7713b1edbc 720
AnnaBridge 171:3a7713b1edbc 721 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
AnnaBridge 171:3a7713b1edbc 722