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TARGET_NUCLEO_F030R8/TOOLCHAIN_IAR/stm32f0xx_hal_dac.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f0xx_hal_dac.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of DAC HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F0xx_HAL_DAC_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F0xx_HAL_DAC_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /** @addtogroup STM32F0xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 45 * @{
AnnaBridge 171:3a7713b1edbc 46 */
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 #if defined(STM32F051x8) || defined(STM32F058xx) || \
AnnaBridge 171:3a7713b1edbc 49 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
AnnaBridge 171:3a7713b1edbc 50 defined(STM32F091xC) || defined(STM32F098xx)
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 53 #include "stm32f0xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /** @addtogroup DAC
AnnaBridge 171:3a7713b1edbc 56 * @{
AnnaBridge 171:3a7713b1edbc 57 */
AnnaBridge 171:3a7713b1edbc 58
AnnaBridge 171:3a7713b1edbc 59 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61 /** @defgroup DAC_Exported_Types DAC Exported Types
AnnaBridge 171:3a7713b1edbc 62 * @{
AnnaBridge 171:3a7713b1edbc 63 */
AnnaBridge 171:3a7713b1edbc 64
AnnaBridge 171:3a7713b1edbc 65 /**
AnnaBridge 171:3a7713b1edbc 66 * @brief HAL State structures definition
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 typedef enum
AnnaBridge 171:3a7713b1edbc 69 {
AnnaBridge 171:3a7713b1edbc 70 HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */
AnnaBridge 171:3a7713b1edbc 71 HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */
AnnaBridge 171:3a7713b1edbc 72 HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */
AnnaBridge 171:3a7713b1edbc 73 HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */
AnnaBridge 171:3a7713b1edbc 74 HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 }HAL_DAC_StateTypeDef;
AnnaBridge 171:3a7713b1edbc 77
AnnaBridge 171:3a7713b1edbc 78 /**
AnnaBridge 171:3a7713b1edbc 79 * @brief DAC handle Structure definition
AnnaBridge 171:3a7713b1edbc 80 */
AnnaBridge 171:3a7713b1edbc 81 typedef struct
AnnaBridge 171:3a7713b1edbc 82 {
AnnaBridge 171:3a7713b1edbc 83 DAC_TypeDef *Instance; /*!< Register base address */
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
AnnaBridge 171:3a7713b1edbc 86
AnnaBridge 171:3a7713b1edbc 87 HAL_LockTypeDef Lock; /*!< DAC locking object */
AnnaBridge 171:3a7713b1edbc 88
AnnaBridge 171:3a7713b1edbc 89 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 __IO uint32_t ErrorCode; /*!< DAC Error code */
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 }DAC_HandleTypeDef;
AnnaBridge 171:3a7713b1edbc 96
AnnaBridge 171:3a7713b1edbc 97 /**
AnnaBridge 171:3a7713b1edbc 98 * @brief DAC Configuration regular Channel structure definition
AnnaBridge 171:3a7713b1edbc 99 */
AnnaBridge 171:3a7713b1edbc 100 typedef struct
AnnaBridge 171:3a7713b1edbc 101 {
AnnaBridge 171:3a7713b1edbc 102 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
AnnaBridge 171:3a7713b1edbc 103 This parameter can be a value of @ref DAC_trigger_selection */
AnnaBridge 171:3a7713b1edbc 104
AnnaBridge 171:3a7713b1edbc 105 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
AnnaBridge 171:3a7713b1edbc 106 This parameter can be a value of @ref DAC_output_buffer */
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108 }DAC_ChannelConfTypeDef;
AnnaBridge 171:3a7713b1edbc 109
AnnaBridge 171:3a7713b1edbc 110 /**
AnnaBridge 171:3a7713b1edbc 111 * @}
AnnaBridge 171:3a7713b1edbc 112 */
AnnaBridge 171:3a7713b1edbc 113
AnnaBridge 171:3a7713b1edbc 114 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 115
AnnaBridge 171:3a7713b1edbc 116 /** @defgroup DAC_Exported_Constants DAC Exported Constants
AnnaBridge 171:3a7713b1edbc 117 * @{
AnnaBridge 171:3a7713b1edbc 118 */
AnnaBridge 171:3a7713b1edbc 119
AnnaBridge 171:3a7713b1edbc 120 /** @defgroup DAC_Error_Code DAC Error Code
AnnaBridge 171:3a7713b1edbc 121 * @{
AnnaBridge 171:3a7713b1edbc 122 */
AnnaBridge 171:3a7713b1edbc 123 #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */
AnnaBridge 171:3a7713b1edbc 124 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DMA underrun error */
AnnaBridge 171:3a7713b1edbc 125 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DMA underrun error */
AnnaBridge 171:3a7713b1edbc 126 #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */
AnnaBridge 171:3a7713b1edbc 127 /**
AnnaBridge 171:3a7713b1edbc 128 * @}
AnnaBridge 171:3a7713b1edbc 129 */
AnnaBridge 171:3a7713b1edbc 130
AnnaBridge 171:3a7713b1edbc 131 /** @defgroup DAC_output_buffer DAC output buffer
AnnaBridge 171:3a7713b1edbc 132 * @{
AnnaBridge 171:3a7713b1edbc 133 */
AnnaBridge 171:3a7713b1edbc 134 #define DAC_OUTPUTBUFFER_ENABLE (0x00000000U)
AnnaBridge 171:3a7713b1edbc 135 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 /**
AnnaBridge 171:3a7713b1edbc 138 * @}
AnnaBridge 171:3a7713b1edbc 139 */
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 /** @defgroup DAC_data_alignment DAC data alignment
AnnaBridge 171:3a7713b1edbc 142 * @{
AnnaBridge 171:3a7713b1edbc 143 */
AnnaBridge 171:3a7713b1edbc 144 #define DAC_ALIGN_12B_R (0x00000000U)
AnnaBridge 171:3a7713b1edbc 145 #define DAC_ALIGN_12B_L (0x00000004U)
AnnaBridge 171:3a7713b1edbc 146 #define DAC_ALIGN_8B_R (0x00000008U)
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 /**
AnnaBridge 171:3a7713b1edbc 149 * @}
AnnaBridge 171:3a7713b1edbc 150 */
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 /** @defgroup DAC_flags_definition DAC flags definition
AnnaBridge 171:3a7713b1edbc 153 * @{
AnnaBridge 171:3a7713b1edbc 154 */
AnnaBridge 171:3a7713b1edbc 155 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
AnnaBridge 171:3a7713b1edbc 156 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
AnnaBridge 171:3a7713b1edbc 157 /**
AnnaBridge 171:3a7713b1edbc 158 * @}
AnnaBridge 171:3a7713b1edbc 159 */
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /** @defgroup DAC_IT_definition DAC IT definition
AnnaBridge 171:3a7713b1edbc 162 * @{
AnnaBridge 171:3a7713b1edbc 163 */
AnnaBridge 171:3a7713b1edbc 164 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
AnnaBridge 171:3a7713b1edbc 165 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
AnnaBridge 171:3a7713b1edbc 166 /**
AnnaBridge 171:3a7713b1edbc 167 * @}
AnnaBridge 171:3a7713b1edbc 168 */
AnnaBridge 171:3a7713b1edbc 169
AnnaBridge 171:3a7713b1edbc 170 /**
AnnaBridge 171:3a7713b1edbc 171 * @}
AnnaBridge 171:3a7713b1edbc 172 */
AnnaBridge 171:3a7713b1edbc 173
AnnaBridge 171:3a7713b1edbc 174 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 /** @defgroup DAC_Exported_Macros DAC Exported Macros
AnnaBridge 171:3a7713b1edbc 177 * @{
AnnaBridge 171:3a7713b1edbc 178 */
AnnaBridge 171:3a7713b1edbc 179
AnnaBridge 171:3a7713b1edbc 180 /** @brief Reset DAC handle state
AnnaBridge 171:3a7713b1edbc 181 * @param __HANDLE__ specifies the DAC handle.
AnnaBridge 171:3a7713b1edbc 182 * @retval None
AnnaBridge 171:3a7713b1edbc 183 */
AnnaBridge 171:3a7713b1edbc 184 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
AnnaBridge 171:3a7713b1edbc 185
AnnaBridge 171:3a7713b1edbc 186 /** @brief Enable the DAC channel
AnnaBridge 171:3a7713b1edbc 187 * @param __HANDLE__ specifies the DAC handle.
AnnaBridge 171:3a7713b1edbc 188 * @param __DAC_Channel__ specifies the DAC channel
AnnaBridge 171:3a7713b1edbc 189 * @retval None
AnnaBridge 171:3a7713b1edbc 190 */
AnnaBridge 171:3a7713b1edbc 191 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
AnnaBridge 171:3a7713b1edbc 192 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
AnnaBridge 171:3a7713b1edbc 193
AnnaBridge 171:3a7713b1edbc 194 /** @brief Disable the DAC channel
AnnaBridge 171:3a7713b1edbc 195 * @param __HANDLE__ specifies the DAC handle
AnnaBridge 171:3a7713b1edbc 196 * @param __DAC_Channel__ specifies the DAC channel.
AnnaBridge 171:3a7713b1edbc 197 * @retval None
AnnaBridge 171:3a7713b1edbc 198 */
AnnaBridge 171:3a7713b1edbc 199 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
AnnaBridge 171:3a7713b1edbc 200 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 /** @brief Enable the DAC interrupt
AnnaBridge 171:3a7713b1edbc 203 * @param __HANDLE__ specifies the DAC handle
AnnaBridge 171:3a7713b1edbc 204 * @param __INTERRUPT__ specifies the DAC interrupt.
AnnaBridge 171:3a7713b1edbc 205 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 206 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
AnnaBridge 171:3a7713b1edbc 207 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
AnnaBridge 171:3a7713b1edbc 208 * @retval None
AnnaBridge 171:3a7713b1edbc 209 */
AnnaBridge 171:3a7713b1edbc 210 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 211
AnnaBridge 171:3a7713b1edbc 212 /** @brief Disable the DAC interrupt
AnnaBridge 171:3a7713b1edbc 213 * @param __HANDLE__ specifies the DAC handle
AnnaBridge 171:3a7713b1edbc 214 * @param __INTERRUPT__ specifies the DAC interrupt.
AnnaBridge 171:3a7713b1edbc 215 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 216 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
AnnaBridge 171:3a7713b1edbc 217 * @retval None
AnnaBridge 171:3a7713b1edbc 218 */
AnnaBridge 171:3a7713b1edbc 219 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 /** @brief Check whether the specified DAC interrupt source is enabled or not
AnnaBridge 171:3a7713b1edbc 222 * @param __HANDLE__ DAC handle
AnnaBridge 171:3a7713b1edbc 223 * @param __INTERRUPT__ DAC interrupt source to check
AnnaBridge 171:3a7713b1edbc 224 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 225 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
AnnaBridge 171:3a7713b1edbc 226 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
AnnaBridge 171:3a7713b1edbc 227 * @retval State of interruption (SET or RESET)
AnnaBridge 171:3a7713b1edbc 228 */
AnnaBridge 171:3a7713b1edbc 229 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
AnnaBridge 171:3a7713b1edbc 230
AnnaBridge 171:3a7713b1edbc 231 /** @brief Get the selected DAC's flag status
AnnaBridge 171:3a7713b1edbc 232 * @param __HANDLE__ specifies the DAC handle.
AnnaBridge 171:3a7713b1edbc 233 * @param __FLAG__ specifies the DAC flag to get.
AnnaBridge 171:3a7713b1edbc 234 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 235 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
AnnaBridge 171:3a7713b1edbc 236 * @retval None
AnnaBridge 171:3a7713b1edbc 237 */
AnnaBridge 171:3a7713b1edbc 238 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
AnnaBridge 171:3a7713b1edbc 239
AnnaBridge 171:3a7713b1edbc 240 /** @brief Clear the DAC's flag
AnnaBridge 171:3a7713b1edbc 241 * @param __HANDLE__ specifies the DAC handle.
AnnaBridge 171:3a7713b1edbc 242 * @param __FLAG__ specifies the DAC flag to clear.
AnnaBridge 171:3a7713b1edbc 243 * This parameter can be any combination of the following values:
AnnaBridge 171:3a7713b1edbc 244 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
AnnaBridge 171:3a7713b1edbc 245 * @retval None
AnnaBridge 171:3a7713b1edbc 246 */
AnnaBridge 171:3a7713b1edbc 247 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
AnnaBridge 171:3a7713b1edbc 248
AnnaBridge 171:3a7713b1edbc 249 /**
AnnaBridge 171:3a7713b1edbc 250 * @}
AnnaBridge 171:3a7713b1edbc 251 */
AnnaBridge 171:3a7713b1edbc 252
AnnaBridge 171:3a7713b1edbc 253 /* Private macro -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 /** @addtogroup DAC_Private_Macros
AnnaBridge 171:3a7713b1edbc 256 * @{
AnnaBridge 171:3a7713b1edbc 257 */
AnnaBridge 171:3a7713b1edbc 258 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
AnnaBridge 171:3a7713b1edbc 259 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
AnnaBridge 171:3a7713b1edbc 260
AnnaBridge 171:3a7713b1edbc 261
AnnaBridge 171:3a7713b1edbc 262 #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
AnnaBridge 171:3a7713b1edbc 263 defined(STM32F091xC) || defined(STM32F098xx)
AnnaBridge 171:3a7713b1edbc 264
AnnaBridge 171:3a7713b1edbc 265 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
AnnaBridge 171:3a7713b1edbc 266 ((CHANNEL) == DAC_CHANNEL_2))
AnnaBridge 171:3a7713b1edbc 267
AnnaBridge 171:3a7713b1edbc 268 #endif /* STM32F071xB || STM32F072xB || STM32F078xx || */
AnnaBridge 171:3a7713b1edbc 269 /* STM32F091xC || STM32F098xx */
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 #if defined(STM32F051x8) || defined(STM32F058xx)
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1))
AnnaBridge 171:3a7713b1edbc 274
AnnaBridge 171:3a7713b1edbc 275 #endif /* STM32F051x8 || STM32F058xx */
AnnaBridge 171:3a7713b1edbc 276
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
AnnaBridge 171:3a7713b1edbc 279 ((ALIGN) == DAC_ALIGN_12B_L) || \
AnnaBridge 171:3a7713b1edbc 280 ((ALIGN) == DAC_ALIGN_8B_R))
AnnaBridge 171:3a7713b1edbc 281
AnnaBridge 171:3a7713b1edbc 282 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
AnnaBridge 171:3a7713b1edbc 283
AnnaBridge 171:3a7713b1edbc 284 /** @brief Set DHR12R1 alignment
AnnaBridge 171:3a7713b1edbc 285 * @param __ALIGNMENT__ specifies the DAC alignment
AnnaBridge 171:3a7713b1edbc 286 * @retval None
AnnaBridge 171:3a7713b1edbc 287 */
AnnaBridge 171:3a7713b1edbc 288 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) ((0x00000008U) + (__ALIGNMENT__))
AnnaBridge 171:3a7713b1edbc 289
AnnaBridge 171:3a7713b1edbc 290 /** @brief Set DHR12R2 alignment
AnnaBridge 171:3a7713b1edbc 291 * @param __ALIGNMENT__ specifies the DAC alignment
AnnaBridge 171:3a7713b1edbc 292 * @retval None
AnnaBridge 171:3a7713b1edbc 293 */
AnnaBridge 171:3a7713b1edbc 294 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) ((0x00000014U) + (__ALIGNMENT__))
AnnaBridge 171:3a7713b1edbc 295
AnnaBridge 171:3a7713b1edbc 296 /** @brief Set DHR12RD alignment
AnnaBridge 171:3a7713b1edbc 297 * @param __ALIGNMENT__ specifies the DAC alignment
AnnaBridge 171:3a7713b1edbc 298 * @retval None
AnnaBridge 171:3a7713b1edbc 299 */
AnnaBridge 171:3a7713b1edbc 300 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) ((0x00000020U) + (__ALIGNMENT__))
AnnaBridge 171:3a7713b1edbc 301
AnnaBridge 171:3a7713b1edbc 302 /**
AnnaBridge 171:3a7713b1edbc 303 * @}
AnnaBridge 171:3a7713b1edbc 304 */
AnnaBridge 171:3a7713b1edbc 305
AnnaBridge 171:3a7713b1edbc 306 /* Include DAC HAL Extension module */
AnnaBridge 171:3a7713b1edbc 307 #include "stm32f0xx_hal_dac_ex.h"
AnnaBridge 171:3a7713b1edbc 308
AnnaBridge 171:3a7713b1edbc 309 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 310
AnnaBridge 171:3a7713b1edbc 311 /** @addtogroup DAC_Exported_Functions
AnnaBridge 171:3a7713b1edbc 312 * @{
AnnaBridge 171:3a7713b1edbc 313 */
AnnaBridge 171:3a7713b1edbc 314
AnnaBridge 171:3a7713b1edbc 315 /** @addtogroup DAC_Exported_Functions_Group1
AnnaBridge 171:3a7713b1edbc 316 * @{
AnnaBridge 171:3a7713b1edbc 317 */
AnnaBridge 171:3a7713b1edbc 318 /* Initialization and de-initialization functions *****************************/
AnnaBridge 171:3a7713b1edbc 319 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 320 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 321 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 322 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 323
AnnaBridge 171:3a7713b1edbc 324 /**
AnnaBridge 171:3a7713b1edbc 325 * @}
AnnaBridge 171:3a7713b1edbc 326 */
AnnaBridge 171:3a7713b1edbc 327
AnnaBridge 171:3a7713b1edbc 328 /** @addtogroup DAC_Exported_Functions_Group2
AnnaBridge 171:3a7713b1edbc 329 * @{
AnnaBridge 171:3a7713b1edbc 330 */
AnnaBridge 171:3a7713b1edbc 331 /* IO operation functions *****************************************************/
AnnaBridge 171:3a7713b1edbc 332 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 333 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 334 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
AnnaBridge 171:3a7713b1edbc 335 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 336
AnnaBridge 171:3a7713b1edbc 337 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 338
AnnaBridge 171:3a7713b1edbc 339 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
AnnaBridge 171:3a7713b1edbc 340
AnnaBridge 171:3a7713b1edbc 341 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 342 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 343 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
AnnaBridge 171:3a7713b1edbc 344 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
AnnaBridge 171:3a7713b1edbc 345 /**
AnnaBridge 171:3a7713b1edbc 346 * @}
AnnaBridge 171:3a7713b1edbc 347 */
AnnaBridge 171:3a7713b1edbc 348
AnnaBridge 171:3a7713b1edbc 349 /** @addtogroup DAC_Exported_Functions_Group3
AnnaBridge 171:3a7713b1edbc 350 * @{
AnnaBridge 171:3a7713b1edbc 351 */
AnnaBridge 171:3a7713b1edbc 352 /* Peripheral Control functions ***********************************************/
AnnaBridge 171:3a7713b1edbc 353 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 354
AnnaBridge 171:3a7713b1edbc 355 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
AnnaBridge 171:3a7713b1edbc 356 /**
AnnaBridge 171:3a7713b1edbc 357 * @}
AnnaBridge 171:3a7713b1edbc 358 */
AnnaBridge 171:3a7713b1edbc 359
AnnaBridge 171:3a7713b1edbc 360 /** @addtogroup DAC_Exported_Functions_Group4
AnnaBridge 171:3a7713b1edbc 361 * @{
AnnaBridge 171:3a7713b1edbc 362 */
AnnaBridge 171:3a7713b1edbc 363 /* Peripheral State and Error functions ***************************************/
AnnaBridge 171:3a7713b1edbc 364 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
AnnaBridge 171:3a7713b1edbc 365 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
AnnaBridge 171:3a7713b1edbc 366
AnnaBridge 171:3a7713b1edbc 367 /**
AnnaBridge 171:3a7713b1edbc 368 * @}
AnnaBridge 171:3a7713b1edbc 369 */
AnnaBridge 171:3a7713b1edbc 370
AnnaBridge 171:3a7713b1edbc 371 /**
AnnaBridge 171:3a7713b1edbc 372 * @}
AnnaBridge 171:3a7713b1edbc 373 */
AnnaBridge 171:3a7713b1edbc 374
AnnaBridge 171:3a7713b1edbc 375 /**
AnnaBridge 171:3a7713b1edbc 376 * @}
AnnaBridge 171:3a7713b1edbc 377 */
AnnaBridge 171:3a7713b1edbc 378
AnnaBridge 171:3a7713b1edbc 379 #endif /* STM32F051x8 || STM32F058xx || */
AnnaBridge 171:3a7713b1edbc 380 /* STM32F071xB || STM32F072xB || STM32F078xx || */
AnnaBridge 171:3a7713b1edbc 381 /* STM32F091xC || STM32F098xx */
AnnaBridge 171:3a7713b1edbc 382
AnnaBridge 171:3a7713b1edbc 383 /**
AnnaBridge 171:3a7713b1edbc 384 * @}
AnnaBridge 171:3a7713b1edbc 385 */
AnnaBridge 171:3a7713b1edbc 386
AnnaBridge 171:3a7713b1edbc 387 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 388 }
AnnaBridge 171:3a7713b1edbc 389 #endif
AnnaBridge 171:3a7713b1edbc 390
AnnaBridge 171:3a7713b1edbc 391
AnnaBridge 171:3a7713b1edbc 392 #endif /*__STM32F0xx_HAL_DAC_H */
AnnaBridge 171:3a7713b1edbc 393
AnnaBridge 171:3a7713b1edbc 394 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
AnnaBridge 171:3a7713b1edbc 395