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TARGET_NUCLEO_F030R8/TOOLCHAIN_GCC_ARM/stm32f0xx_ll_wwdg.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f0xx_ll_wwdg.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of WWDG LL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F0xx_LL_WWDG_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F0xx_LL_WWDG_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f0xx.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F0xx_LL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 #if defined (WWDG)
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /** @defgroup WWDG_LL WWDG
AnnaBridge 171:3a7713b1edbc 54 * @{
AnnaBridge 171:3a7713b1edbc 55 */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /* Private constants ---------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /* Private macros ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 63
AnnaBridge 171:3a7713b1edbc 64 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 65 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 66 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
AnnaBridge 171:3a7713b1edbc 67 * @{
AnnaBridge 171:3a7713b1edbc 68 */
AnnaBridge 171:3a7713b1edbc 69
AnnaBridge 171:3a7713b1edbc 70
AnnaBridge 171:3a7713b1edbc 71 /** @defgroup WWDG_LL_EC_IT IT Defines
AnnaBridge 171:3a7713b1edbc 72 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions
AnnaBridge 171:3a7713b1edbc 73 * @{
AnnaBridge 171:3a7713b1edbc 74 */
AnnaBridge 171:3a7713b1edbc 75 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI
AnnaBridge 171:3a7713b1edbc 76 /**
AnnaBridge 171:3a7713b1edbc 77 * @}
AnnaBridge 171:3a7713b1edbc 78 */
AnnaBridge 171:3a7713b1edbc 79
AnnaBridge 171:3a7713b1edbc 80 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER
AnnaBridge 171:3a7713b1edbc 81 * @{
AnnaBridge 171:3a7713b1edbc 82 */
AnnaBridge 171:3a7713b1edbc 83 #define LL_WWDG_PRESCALER_1 0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */
AnnaBridge 171:3a7713b1edbc 84 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
AnnaBridge 171:3a7713b1edbc 85 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
AnnaBridge 171:3a7713b1edbc 86 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
AnnaBridge 171:3a7713b1edbc 87 /**
AnnaBridge 171:3a7713b1edbc 88 * @}
AnnaBridge 171:3a7713b1edbc 89 */
AnnaBridge 171:3a7713b1edbc 90
AnnaBridge 171:3a7713b1edbc 91 /**
AnnaBridge 171:3a7713b1edbc 92 * @}
AnnaBridge 171:3a7713b1edbc 93 */
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 96 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
AnnaBridge 171:3a7713b1edbc 97 * @{
AnnaBridge 171:3a7713b1edbc 98 */
AnnaBridge 171:3a7713b1edbc 99 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
AnnaBridge 171:3a7713b1edbc 100 * @{
AnnaBridge 171:3a7713b1edbc 101 */
AnnaBridge 171:3a7713b1edbc 102 /**
AnnaBridge 171:3a7713b1edbc 103 * @brief Write a value in WWDG register
AnnaBridge 171:3a7713b1edbc 104 * @param __INSTANCE__ WWDG Instance
AnnaBridge 171:3a7713b1edbc 105 * @param __REG__ Register to be written
AnnaBridge 171:3a7713b1edbc 106 * @param __VALUE__ Value to be written in the register
AnnaBridge 171:3a7713b1edbc 107 * @retval None
AnnaBridge 171:3a7713b1edbc 108 */
AnnaBridge 171:3a7713b1edbc 109 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 /**
AnnaBridge 171:3a7713b1edbc 112 * @brief Read a value in WWDG register
AnnaBridge 171:3a7713b1edbc 113 * @param __INSTANCE__ WWDG Instance
AnnaBridge 171:3a7713b1edbc 114 * @param __REG__ Register to be read
AnnaBridge 171:3a7713b1edbc 115 * @retval Register value
AnnaBridge 171:3a7713b1edbc 116 */
AnnaBridge 171:3a7713b1edbc 117 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 171:3a7713b1edbc 118 /**
AnnaBridge 171:3a7713b1edbc 119 * @}
AnnaBridge 171:3a7713b1edbc 120 */
AnnaBridge 171:3a7713b1edbc 121
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 /**
AnnaBridge 171:3a7713b1edbc 124 * @}
AnnaBridge 171:3a7713b1edbc 125 */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 128 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
AnnaBridge 171:3a7713b1edbc 129 * @{
AnnaBridge 171:3a7713b1edbc 130 */
AnnaBridge 171:3a7713b1edbc 131
AnnaBridge 171:3a7713b1edbc 132 /** @defgroup WWDG_LL_EF_Configuration Configuration
AnnaBridge 171:3a7713b1edbc 133 * @{
AnnaBridge 171:3a7713b1edbc 134 */
AnnaBridge 171:3a7713b1edbc 135 /**
AnnaBridge 171:3a7713b1edbc 136 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset.
AnnaBridge 171:3a7713b1edbc 137 * @note It is enabled by setting the WDGA bit in the WWDG_CR register,
AnnaBridge 171:3a7713b1edbc 138 * then it cannot be disabled again except by a reset.
AnnaBridge 171:3a7713b1edbc 139 * This bit is set by software and only cleared by hardware after a reset.
AnnaBridge 171:3a7713b1edbc 140 * When WDGA = 1, the watchdog can generate a reset.
AnnaBridge 171:3a7713b1edbc 141 * @rmtoll CR WDGA LL_WWDG_Enable
AnnaBridge 171:3a7713b1edbc 142 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 143 * @retval None
AnnaBridge 171:3a7713b1edbc 144 */
AnnaBridge 171:3a7713b1edbc 145 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 146 {
AnnaBridge 171:3a7713b1edbc 147 SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
AnnaBridge 171:3a7713b1edbc 148 }
AnnaBridge 171:3a7713b1edbc 149
AnnaBridge 171:3a7713b1edbc 150 /**
AnnaBridge 171:3a7713b1edbc 151 * @brief Checks if Window Watchdog is enabled
AnnaBridge 171:3a7713b1edbc 152 * @rmtoll CR WDGA LL_WWDG_IsEnabled
AnnaBridge 171:3a7713b1edbc 153 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 154 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 155 */
AnnaBridge 171:3a7713b1edbc 156 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 157 {
AnnaBridge 171:3a7713b1edbc 158 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
AnnaBridge 171:3a7713b1edbc 159 }
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 /**
AnnaBridge 171:3a7713b1edbc 162 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0])
AnnaBridge 171:3a7713b1edbc 163 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
AnnaBridge 171:3a7713b1edbc 164 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
AnnaBridge 171:3a7713b1edbc 165 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
AnnaBridge 171:3a7713b1edbc 166 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
AnnaBridge 171:3a7713b1edbc 167 * @rmtoll CR T LL_WWDG_SetCounter
AnnaBridge 171:3a7713b1edbc 168 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 169 * @param Counter 0..0x7F (7 bit counter value)
AnnaBridge 171:3a7713b1edbc 170 * @retval None
AnnaBridge 171:3a7713b1edbc 171 */
AnnaBridge 171:3a7713b1edbc 172 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
AnnaBridge 171:3a7713b1edbc 173 {
AnnaBridge 171:3a7713b1edbc 174 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
AnnaBridge 171:3a7713b1edbc 175 }
AnnaBridge 171:3a7713b1edbc 176
AnnaBridge 171:3a7713b1edbc 177 /**
AnnaBridge 171:3a7713b1edbc 178 * @brief Return current Watchdog Counter Value (7 bits counter value)
AnnaBridge 171:3a7713b1edbc 179 * @rmtoll CR T LL_WWDG_GetCounter
AnnaBridge 171:3a7713b1edbc 180 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 181 * @retval 7 bit Watchdog Counter value
AnnaBridge 171:3a7713b1edbc 182 */
AnnaBridge 171:3a7713b1edbc 183 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 184 {
AnnaBridge 171:3a7713b1edbc 185 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
AnnaBridge 171:3a7713b1edbc 186 }
AnnaBridge 171:3a7713b1edbc 187
AnnaBridge 171:3a7713b1edbc 188 /**
AnnaBridge 171:3a7713b1edbc 189 * @brief Set the time base of the prescaler (WDGTB).
AnnaBridge 171:3a7713b1edbc 190 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
AnnaBridge 171:3a7713b1edbc 191 * is decremented every (4096 x 2expWDGTB) PCLK cycles
AnnaBridge 171:3a7713b1edbc 192 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler
AnnaBridge 171:3a7713b1edbc 193 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 194 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 195 * @arg @ref LL_WWDG_PRESCALER_1
AnnaBridge 171:3a7713b1edbc 196 * @arg @ref LL_WWDG_PRESCALER_2
AnnaBridge 171:3a7713b1edbc 197 * @arg @ref LL_WWDG_PRESCALER_4
AnnaBridge 171:3a7713b1edbc 198 * @arg @ref LL_WWDG_PRESCALER_8
AnnaBridge 171:3a7713b1edbc 199 * @retval None
AnnaBridge 171:3a7713b1edbc 200 */
AnnaBridge 171:3a7713b1edbc 201 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
AnnaBridge 171:3a7713b1edbc 202 {
AnnaBridge 171:3a7713b1edbc 203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
AnnaBridge 171:3a7713b1edbc 204 }
AnnaBridge 171:3a7713b1edbc 205
AnnaBridge 171:3a7713b1edbc 206 /**
AnnaBridge 171:3a7713b1edbc 207 * @brief Return current Watchdog Prescaler Value
AnnaBridge 171:3a7713b1edbc 208 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler
AnnaBridge 171:3a7713b1edbc 209 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 210 * @retval Returned value can be one of the following values:
AnnaBridge 171:3a7713b1edbc 211 * @arg @ref LL_WWDG_PRESCALER_1
AnnaBridge 171:3a7713b1edbc 212 * @arg @ref LL_WWDG_PRESCALER_2
AnnaBridge 171:3a7713b1edbc 213 * @arg @ref LL_WWDG_PRESCALER_4
AnnaBridge 171:3a7713b1edbc 214 * @arg @ref LL_WWDG_PRESCALER_8
AnnaBridge 171:3a7713b1edbc 215 */
AnnaBridge 171:3a7713b1edbc 216 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 217 {
AnnaBridge 171:3a7713b1edbc 218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
AnnaBridge 171:3a7713b1edbc 219 }
AnnaBridge 171:3a7713b1edbc 220
AnnaBridge 171:3a7713b1edbc 221 /**
AnnaBridge 171:3a7713b1edbc 222 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
AnnaBridge 171:3a7713b1edbc 223 * @note This window value defines when write in the WWDG_CR register
AnnaBridge 171:3a7713b1edbc 224 * to program Watchdog counter is allowed.
AnnaBridge 171:3a7713b1edbc 225 * Watchdog counter value update must occur only when the counter value
AnnaBridge 171:3a7713b1edbc 226 * is lower than the Watchdog window register value.
AnnaBridge 171:3a7713b1edbc 227 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
AnnaBridge 171:3a7713b1edbc 228 * (in the control register) is refreshed before the downcounter has reached
AnnaBridge 171:3a7713b1edbc 229 * the watchdog window register value.
AnnaBridge 171:3a7713b1edbc 230 * Physically is possible to set the Window lower then 0x40 but it is not recommended.
AnnaBridge 171:3a7713b1edbc 231 * To generate an immediate reset, it is possible to set the Counter lower than 0x40.
AnnaBridge 171:3a7713b1edbc 232 * @rmtoll CFR W LL_WWDG_SetWindow
AnnaBridge 171:3a7713b1edbc 233 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 234 * @param Window 0x00..0x7F (7 bit Window value)
AnnaBridge 171:3a7713b1edbc 235 * @retval None
AnnaBridge 171:3a7713b1edbc 236 */
AnnaBridge 171:3a7713b1edbc 237 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
AnnaBridge 171:3a7713b1edbc 238 {
AnnaBridge 171:3a7713b1edbc 239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
AnnaBridge 171:3a7713b1edbc 240 }
AnnaBridge 171:3a7713b1edbc 241
AnnaBridge 171:3a7713b1edbc 242 /**
AnnaBridge 171:3a7713b1edbc 243 * @brief Return current Watchdog Window Value (7 bits value)
AnnaBridge 171:3a7713b1edbc 244 * @rmtoll CFR W LL_WWDG_GetWindow
AnnaBridge 171:3a7713b1edbc 245 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 246 * @retval 7 bit Watchdog Window value
AnnaBridge 171:3a7713b1edbc 247 */
AnnaBridge 171:3a7713b1edbc 248 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 249 {
AnnaBridge 171:3a7713b1edbc 250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
AnnaBridge 171:3a7713b1edbc 251 }
AnnaBridge 171:3a7713b1edbc 252
AnnaBridge 171:3a7713b1edbc 253 /**
AnnaBridge 171:3a7713b1edbc 254 * @}
AnnaBridge 171:3a7713b1edbc 255 */
AnnaBridge 171:3a7713b1edbc 256
AnnaBridge 171:3a7713b1edbc 257 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 171:3a7713b1edbc 258 * @{
AnnaBridge 171:3a7713b1edbc 259 */
AnnaBridge 171:3a7713b1edbc 260 /**
AnnaBridge 171:3a7713b1edbc 261 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
AnnaBridge 171:3a7713b1edbc 262 * @note This bit is set by hardware when the counter has reached the value 0x40.
AnnaBridge 171:3a7713b1edbc 263 * It must be cleared by software by writing 0.
AnnaBridge 171:3a7713b1edbc 264 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
AnnaBridge 171:3a7713b1edbc 265 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP
AnnaBridge 171:3a7713b1edbc 266 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 267 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 268 */
AnnaBridge 171:3a7713b1edbc 269 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 270 {
AnnaBridge 171:3a7713b1edbc 271 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
AnnaBridge 171:3a7713b1edbc 272 }
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 /**
AnnaBridge 171:3a7713b1edbc 275 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF)
AnnaBridge 171:3a7713b1edbc 276 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP
AnnaBridge 171:3a7713b1edbc 277 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 278 * @retval None
AnnaBridge 171:3a7713b1edbc 279 */
AnnaBridge 171:3a7713b1edbc 280 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 281 {
AnnaBridge 171:3a7713b1edbc 282 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
AnnaBridge 171:3a7713b1edbc 283 }
AnnaBridge 171:3a7713b1edbc 284
AnnaBridge 171:3a7713b1edbc 285 /**
AnnaBridge 171:3a7713b1edbc 286 * @}
AnnaBridge 171:3a7713b1edbc 287 */
AnnaBridge 171:3a7713b1edbc 288
AnnaBridge 171:3a7713b1edbc 289 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
AnnaBridge 171:3a7713b1edbc 290 * @{
AnnaBridge 171:3a7713b1edbc 291 */
AnnaBridge 171:3a7713b1edbc 292 /**
AnnaBridge 171:3a7713b1edbc 293 * @brief Enable the Early Wakeup Interrupt.
AnnaBridge 171:3a7713b1edbc 294 * @note When set, an interrupt occurs whenever the counter reaches value 0x40.
AnnaBridge 171:3a7713b1edbc 295 * This interrupt is only cleared by hardware after a reset
AnnaBridge 171:3a7713b1edbc 296 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP
AnnaBridge 171:3a7713b1edbc 297 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 298 * @retval None
AnnaBridge 171:3a7713b1edbc 299 */
AnnaBridge 171:3a7713b1edbc 300 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 301 {
AnnaBridge 171:3a7713b1edbc 302 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
AnnaBridge 171:3a7713b1edbc 303 }
AnnaBridge 171:3a7713b1edbc 304
AnnaBridge 171:3a7713b1edbc 305 /**
AnnaBridge 171:3a7713b1edbc 306 * @brief Check if Early Wakeup Interrupt is enabled
AnnaBridge 171:3a7713b1edbc 307 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP
AnnaBridge 171:3a7713b1edbc 308 * @param WWDGx WWDG Instance
AnnaBridge 171:3a7713b1edbc 309 * @retval State of bit (1 or 0).
AnnaBridge 171:3a7713b1edbc 310 */
AnnaBridge 171:3a7713b1edbc 311 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 171:3a7713b1edbc 312 {
AnnaBridge 171:3a7713b1edbc 313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
AnnaBridge 171:3a7713b1edbc 314 }
AnnaBridge 171:3a7713b1edbc 315
AnnaBridge 171:3a7713b1edbc 316 /**
AnnaBridge 171:3a7713b1edbc 317 * @}
AnnaBridge 171:3a7713b1edbc 318 */
AnnaBridge 171:3a7713b1edbc 319
AnnaBridge 171:3a7713b1edbc 320 /**
AnnaBridge 171:3a7713b1edbc 321 * @}
AnnaBridge 171:3a7713b1edbc 322 */
AnnaBridge 171:3a7713b1edbc 323
AnnaBridge 171:3a7713b1edbc 324 /**
AnnaBridge 171:3a7713b1edbc 325 * @}
AnnaBridge 171:3a7713b1edbc 326 */
AnnaBridge 171:3a7713b1edbc 327
AnnaBridge 171:3a7713b1edbc 328 #endif /* WWDG */
AnnaBridge 171:3a7713b1edbc 329
AnnaBridge 171:3a7713b1edbc 330 /**
AnnaBridge 171:3a7713b1edbc 331 * @}
AnnaBridge 171:3a7713b1edbc 332 */
AnnaBridge 171:3a7713b1edbc 333
AnnaBridge 171:3a7713b1edbc 334 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 335 }
AnnaBridge 171:3a7713b1edbc 336 #endif
AnnaBridge 171:3a7713b1edbc 337
AnnaBridge 171:3a7713b1edbc 338 #endif /* __STM32F0xx_LL_WWDG_H */
AnnaBridge 171:3a7713b1edbc 339
AnnaBridge 171:3a7713b1edbc 340 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/