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TARGET_NUCLEO_F030R8/TOOLCHAIN_GCC_ARM/stm32f0xx_hal_pwr.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**
AnnaBridge 171:3a7713b1edbc 2 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 3 * @file stm32f0xx_hal_pwr.h
AnnaBridge 171:3a7713b1edbc 4 * @author MCD Application Team
AnnaBridge 171:3a7713b1edbc 5 * @brief Header file of PWR HAL module.
AnnaBridge 171:3a7713b1edbc 6 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 7 * @attention
AnnaBridge 171:3a7713b1edbc 8 *
AnnaBridge 171:3a7713b1edbc 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 12 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 171:3a7713b1edbc 14 * this list of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 171:3a7713b1edbc 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 171:3a7713b1edbc 17 * and/or other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 171:3a7713b1edbc 19 * may be used to endorse or promote products derived from this software
AnnaBridge 171:3a7713b1edbc 20 * without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 171:3a7713b1edbc 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 171:3a7713b1edbc 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 171:3a7713b1edbc 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 171:3a7713b1edbc 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 171:3a7713b1edbc 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 171:3a7713b1edbc 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 171:3a7713b1edbc 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 171:3a7713b1edbc 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 32 *
AnnaBridge 171:3a7713b1edbc 33 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 34 */
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 171:3a7713b1edbc 37 #ifndef __STM32F0xx_HAL_PWR_H
AnnaBridge 171:3a7713b1edbc 38 #define __STM32F0xx_HAL_PWR_H
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 41 extern "C" {
AnnaBridge 171:3a7713b1edbc 42 #endif
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 45 #include "stm32f0xx_hal_def.h"
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /** @addtogroup STM32F0xx_HAL_Driver
AnnaBridge 171:3a7713b1edbc 48 * @{
AnnaBridge 171:3a7713b1edbc 49 */
AnnaBridge 171:3a7713b1edbc 50
AnnaBridge 171:3a7713b1edbc 51 /** @addtogroup PWR PWR
AnnaBridge 171:3a7713b1edbc 52 * @{
AnnaBridge 171:3a7713b1edbc 53 */
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /* Exported types ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 56 /* Exported constants --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 57
AnnaBridge 171:3a7713b1edbc 58 /** @defgroup PWR_Exported_Constants PWR Exported Constants
AnnaBridge 171:3a7713b1edbc 59 * @{
AnnaBridge 171:3a7713b1edbc 60 */
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in STOP mode
AnnaBridge 171:3a7713b1edbc 63 * @{
AnnaBridge 171:3a7713b1edbc 64 */
AnnaBridge 171:3a7713b1edbc 65 #define PWR_MAINREGULATOR_ON (0x00000000U)
AnnaBridge 171:3a7713b1edbc 66 #define PWR_LOWPOWERREGULATOR_ON PWR_CR_LPDS
AnnaBridge 171:3a7713b1edbc 67
AnnaBridge 171:3a7713b1edbc 68 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
AnnaBridge 171:3a7713b1edbc 69 ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
AnnaBridge 171:3a7713b1edbc 70 /**
AnnaBridge 171:3a7713b1edbc 71 * @}
AnnaBridge 171:3a7713b1edbc 72 */
AnnaBridge 171:3a7713b1edbc 73
AnnaBridge 171:3a7713b1edbc 74 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
AnnaBridge 171:3a7713b1edbc 75 * @{
AnnaBridge 171:3a7713b1edbc 76 */
AnnaBridge 171:3a7713b1edbc 77 #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01U)
AnnaBridge 171:3a7713b1edbc 78 #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02U)
AnnaBridge 171:3a7713b1edbc 79 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
AnnaBridge 171:3a7713b1edbc 80 /**
AnnaBridge 171:3a7713b1edbc 81 * @}
AnnaBridge 171:3a7713b1edbc 82 */
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
AnnaBridge 171:3a7713b1edbc 85 * @{
AnnaBridge 171:3a7713b1edbc 86 */
AnnaBridge 171:3a7713b1edbc 87 #define PWR_STOPENTRY_WFI ((uint8_t)0x01U)
AnnaBridge 171:3a7713b1edbc 88 #define PWR_STOPENTRY_WFE ((uint8_t)0x02U)
AnnaBridge 171:3a7713b1edbc 89 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
AnnaBridge 171:3a7713b1edbc 90 /**
AnnaBridge 171:3a7713b1edbc 91 * @}
AnnaBridge 171:3a7713b1edbc 92 */
AnnaBridge 171:3a7713b1edbc 93
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /**
AnnaBridge 171:3a7713b1edbc 96 * @}
AnnaBridge 171:3a7713b1edbc 97 */
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 100 /** @defgroup PWR_Exported_Macro PWR Exported Macro
AnnaBridge 171:3a7713b1edbc 101 * @{
AnnaBridge 171:3a7713b1edbc 102 */
AnnaBridge 171:3a7713b1edbc 103
AnnaBridge 171:3a7713b1edbc 104 /** @brief Check PWR flag is set or not.
AnnaBridge 171:3a7713b1edbc 105 * @param __FLAG__ specifies the flag to check.
AnnaBridge 171:3a7713b1edbc 106 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 107 * @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
AnnaBridge 171:3a7713b1edbc 108 * was received from the WKUP pin or from the RTC alarm (Alarm A),
AnnaBridge 171:3a7713b1edbc 109 * RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
AnnaBridge 171:3a7713b1edbc 110 * An additional wakeup event is detected if the WKUP pin is enabled
AnnaBridge 171:3a7713b1edbc 111 * (by setting the EWUP bit) when the WKUP pin level is already high.
AnnaBridge 171:3a7713b1edbc 112 * @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
AnnaBridge 171:3a7713b1edbc 113 * resumed from StandBy mode.
AnnaBridge 171:3a7713b1edbc 114 * @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
AnnaBridge 171:3a7713b1edbc 115 * by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
AnnaBridge 171:3a7713b1edbc 116 * For this reason, this bit is equal to 0 after Standby or reset
AnnaBridge 171:3a7713b1edbc 117 * until the PVDE bit is set.
AnnaBridge 171:3a7713b1edbc 118 * Warning: this Flag is not available on STM32F030x8 products
AnnaBridge 171:3a7713b1edbc 119 * @arg PWR_FLAG_VREFINTRDY: This flag indicates that the internal reference
AnnaBridge 171:3a7713b1edbc 120 * voltage VREFINT is ready.
AnnaBridge 171:3a7713b1edbc 121 * Warning: this Flag is not available on STM32F030x8 products
AnnaBridge 171:3a7713b1edbc 122 * @retval The new state of __FLAG__ (TRUE or FALSE).
AnnaBridge 171:3a7713b1edbc 123 */
AnnaBridge 171:3a7713b1edbc 124 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
AnnaBridge 171:3a7713b1edbc 125
AnnaBridge 171:3a7713b1edbc 126 /** @brief Clear the PWR's pending flags.
AnnaBridge 171:3a7713b1edbc 127 * @param __FLAG__ specifies the flag to clear.
AnnaBridge 171:3a7713b1edbc 128 * This parameter can be one of the following values:
AnnaBridge 171:3a7713b1edbc 129 * @arg PWR_FLAG_WU: Wake Up flag
AnnaBridge 171:3a7713b1edbc 130 * @arg PWR_FLAG_SB: StandBy flag
AnnaBridge 171:3a7713b1edbc 131 */
AnnaBridge 171:3a7713b1edbc 132 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |= (__FLAG__) << 2U)
AnnaBridge 171:3a7713b1edbc 133
AnnaBridge 171:3a7713b1edbc 134
AnnaBridge 171:3a7713b1edbc 135 /**
AnnaBridge 171:3a7713b1edbc 136 * @}
AnnaBridge 171:3a7713b1edbc 137 */
AnnaBridge 171:3a7713b1edbc 138
AnnaBridge 171:3a7713b1edbc 139 /* Include PWR HAL Extension module */
AnnaBridge 171:3a7713b1edbc 140 #include "stm32f0xx_hal_pwr_ex.h"
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 /* Exported functions --------------------------------------------------------*/
AnnaBridge 171:3a7713b1edbc 143
AnnaBridge 171:3a7713b1edbc 144 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
AnnaBridge 171:3a7713b1edbc 145 * @{
AnnaBridge 171:3a7713b1edbc 146 */
AnnaBridge 171:3a7713b1edbc 147
AnnaBridge 171:3a7713b1edbc 148 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
AnnaBridge 171:3a7713b1edbc 149 * @{
AnnaBridge 171:3a7713b1edbc 150 */
AnnaBridge 171:3a7713b1edbc 151
AnnaBridge 171:3a7713b1edbc 152 /* Initialization and de-initialization functions *****************************/
AnnaBridge 171:3a7713b1edbc 153 void HAL_PWR_DeInit(void);
AnnaBridge 171:3a7713b1edbc 154
AnnaBridge 171:3a7713b1edbc 155 /**
AnnaBridge 171:3a7713b1edbc 156 * @}
AnnaBridge 171:3a7713b1edbc 157 */
AnnaBridge 171:3a7713b1edbc 158
AnnaBridge 171:3a7713b1edbc 159 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
AnnaBridge 171:3a7713b1edbc 160 * @{
AnnaBridge 171:3a7713b1edbc 161 */
AnnaBridge 171:3a7713b1edbc 162
AnnaBridge 171:3a7713b1edbc 163 /* Peripheral Control functions **********************************************/
AnnaBridge 171:3a7713b1edbc 164 void HAL_PWR_EnableBkUpAccess(void);
AnnaBridge 171:3a7713b1edbc 165 void HAL_PWR_DisableBkUpAccess(void);
AnnaBridge 171:3a7713b1edbc 166
AnnaBridge 171:3a7713b1edbc 167 /* WakeUp pins configuration functions ****************************************/
AnnaBridge 171:3a7713b1edbc 168 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
AnnaBridge 171:3a7713b1edbc 169 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
AnnaBridge 171:3a7713b1edbc 170
AnnaBridge 171:3a7713b1edbc 171 /* Low Power modes configuration functions ************************************/
AnnaBridge 171:3a7713b1edbc 172 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
AnnaBridge 171:3a7713b1edbc 173 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
AnnaBridge 171:3a7713b1edbc 174 void HAL_PWR_EnterSTANDBYMode(void);
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 void HAL_PWR_EnableSleepOnExit(void);
AnnaBridge 171:3a7713b1edbc 177 void HAL_PWR_DisableSleepOnExit(void);
AnnaBridge 171:3a7713b1edbc 178 void HAL_PWR_EnableSEVOnPend(void);
AnnaBridge 171:3a7713b1edbc 179 void HAL_PWR_DisableSEVOnPend(void);
AnnaBridge 171:3a7713b1edbc 180
AnnaBridge 171:3a7713b1edbc 181 /**
AnnaBridge 171:3a7713b1edbc 182 * @}
AnnaBridge 171:3a7713b1edbc 183 */
AnnaBridge 171:3a7713b1edbc 184
AnnaBridge 171:3a7713b1edbc 185 /**
AnnaBridge 171:3a7713b1edbc 186 * @}
AnnaBridge 171:3a7713b1edbc 187 */
AnnaBridge 171:3a7713b1edbc 188
AnnaBridge 171:3a7713b1edbc 189 /**
AnnaBridge 171:3a7713b1edbc 190 * @}
AnnaBridge 171:3a7713b1edbc 191 */
AnnaBridge 171:3a7713b1edbc 192
AnnaBridge 171:3a7713b1edbc 193 /**
AnnaBridge 171:3a7713b1edbc 194 * @}
AnnaBridge 171:3a7713b1edbc 195 */
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 #ifdef __cplusplus
AnnaBridge 171:3a7713b1edbc 198 }
AnnaBridge 171:3a7713b1edbc 199 #endif
AnnaBridge 171:3a7713b1edbc 200
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 #endif /* __STM32F0xx_HAL_PWR_H */
AnnaBridge 171:3a7713b1edbc 203
AnnaBridge 171:3a7713b1edbc 204 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
AnnaBridge 171:3a7713b1edbc 205