mbed official
The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_hal_i2c.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f0xx_hal_i2c.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of I2C HAL module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F0xx_HAL_I2C_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F0xx_HAL_I2C_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f0xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F0xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 49 | */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | |
| AnnaBridge | 171:3a7713b1edbc | 51 | /** @addtogroup I2C |
| AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 53 | */ |
| AnnaBridge | 171:3a7713b1edbc | 54 | |
| AnnaBridge | 171:3a7713b1edbc | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 56 | /** @defgroup I2C_Exported_Types I2C Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 57 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 58 | */ |
| AnnaBridge | 171:3a7713b1edbc | 59 | |
| AnnaBridge | 171:3a7713b1edbc | 60 | /** @defgroup I2C_Configuration_Structure_definition I2C Configuration Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 61 | * @brief I2C Configuration Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 62 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 63 | */ |
| AnnaBridge | 171:3a7713b1edbc | 64 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 65 | { |
| AnnaBridge | 171:3a7713b1edbc | 66 | uint32_t Timing; /*!< Specifies the I2C_TIMINGR_register value. |
| AnnaBridge | 171:3a7713b1edbc | 67 | This parameter calculated by referring to I2C initialization |
| AnnaBridge | 171:3a7713b1edbc | 68 | section in Reference manual */ |
| AnnaBridge | 171:3a7713b1edbc | 69 | |
| AnnaBridge | 171:3a7713b1edbc | 70 | uint32_t OwnAddress1; /*!< Specifies the first device own address. |
| AnnaBridge | 171:3a7713b1edbc | 71 | This parameter can be a 7-bit or 10-bit address. */ |
| AnnaBridge | 171:3a7713b1edbc | 72 | |
| AnnaBridge | 171:3a7713b1edbc | 73 | uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode is selected. |
| AnnaBridge | 171:3a7713b1edbc | 74 | This parameter can be a value of @ref I2C_ADDRESSING_MODE */ |
| AnnaBridge | 171:3a7713b1edbc | 75 | |
| AnnaBridge | 171:3a7713b1edbc | 76 | uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected. |
| AnnaBridge | 171:3a7713b1edbc | 77 | This parameter can be a value of @ref I2C_DUAL_ADDRESSING_MODE */ |
| AnnaBridge | 171:3a7713b1edbc | 78 | |
| AnnaBridge | 171:3a7713b1edbc | 79 | uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected |
| AnnaBridge | 171:3a7713b1edbc | 80 | This parameter can be a 7-bit address. */ |
| AnnaBridge | 171:3a7713b1edbc | 81 | |
| AnnaBridge | 171:3a7713b1edbc | 82 | uint32_t OwnAddress2Masks; /*!< Specifies the acknowledge mask address second device own address if dual addressing mode is selected |
| AnnaBridge | 171:3a7713b1edbc | 83 | This parameter can be a value of @ref I2C_OWN_ADDRESS2_MASKS */ |
| AnnaBridge | 171:3a7713b1edbc | 84 | |
| AnnaBridge | 171:3a7713b1edbc | 85 | uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected. |
| AnnaBridge | 171:3a7713b1edbc | 86 | This parameter can be a value of @ref I2C_GENERAL_CALL_ADDRESSING_MODE */ |
| AnnaBridge | 171:3a7713b1edbc | 87 | |
| AnnaBridge | 171:3a7713b1edbc | 88 | uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected. |
| AnnaBridge | 171:3a7713b1edbc | 89 | This parameter can be a value of @ref I2C_NOSTRETCH_MODE */ |
| AnnaBridge | 171:3a7713b1edbc | 90 | |
| AnnaBridge | 171:3a7713b1edbc | 91 | } I2C_InitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 92 | |
| AnnaBridge | 171:3a7713b1edbc | 93 | /** |
| AnnaBridge | 171:3a7713b1edbc | 94 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 95 | */ |
| AnnaBridge | 171:3a7713b1edbc | 96 | |
| AnnaBridge | 171:3a7713b1edbc | 97 | /** @defgroup HAL_state_structure_definition HAL state structure definition |
| AnnaBridge | 171:3a7713b1edbc | 98 | * @brief HAL State structure definition |
| AnnaBridge | 171:3a7713b1edbc | 99 | * @note HAL I2C State value coding follow below described bitmap :\n |
| AnnaBridge | 171:3a7713b1edbc | 100 | * b7-b6 Error information\n |
| AnnaBridge | 171:3a7713b1edbc | 101 | * 00 : No Error\n |
| AnnaBridge | 171:3a7713b1edbc | 102 | * 01 : Abort (Abort user request on going)\n |
| AnnaBridge | 171:3a7713b1edbc | 103 | * 10 : Timeout\n |
| AnnaBridge | 171:3a7713b1edbc | 104 | * 11 : Error\n |
| AnnaBridge | 171:3a7713b1edbc | 105 | * b5 IP initilisation status\n |
| AnnaBridge | 171:3a7713b1edbc | 106 | * 0 : Reset (IP not initialized)\n |
| AnnaBridge | 171:3a7713b1edbc | 107 | * 1 : Init done (IP initialized and ready to use. HAL I2C Init function called)\n |
| AnnaBridge | 171:3a7713b1edbc | 108 | * b4 (not used)\n |
| AnnaBridge | 171:3a7713b1edbc | 109 | * x : Should be set to 0\n |
| AnnaBridge | 171:3a7713b1edbc | 110 | * b3\n |
| AnnaBridge | 171:3a7713b1edbc | 111 | * 0 : Ready or Busy (No Listen mode ongoing)\n |
| AnnaBridge | 171:3a7713b1edbc | 112 | * 1 : Listen (IP in Address Listen Mode)\n |
| AnnaBridge | 171:3a7713b1edbc | 113 | * b2 Intrinsic process state\n |
| AnnaBridge | 171:3a7713b1edbc | 114 | * 0 : Ready\n |
| AnnaBridge | 171:3a7713b1edbc | 115 | * 1 : Busy (IP busy with some configuration or internal operations)\n |
| AnnaBridge | 171:3a7713b1edbc | 116 | * b1 Rx state\n |
| AnnaBridge | 171:3a7713b1edbc | 117 | * 0 : Ready (no Rx operation ongoing)\n |
| AnnaBridge | 171:3a7713b1edbc | 118 | * 1 : Busy (Rx operation ongoing)\n |
| AnnaBridge | 171:3a7713b1edbc | 119 | * b0 Tx state\n |
| AnnaBridge | 171:3a7713b1edbc | 120 | * 0 : Ready (no Tx operation ongoing)\n |
| AnnaBridge | 171:3a7713b1edbc | 121 | * 1 : Busy (Tx operation ongoing) |
| AnnaBridge | 171:3a7713b1edbc | 122 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 123 | */ |
| AnnaBridge | 171:3a7713b1edbc | 124 | typedef enum |
| AnnaBridge | 171:3a7713b1edbc | 125 | { |
| AnnaBridge | 171:3a7713b1edbc | 126 | HAL_I2C_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | HAL_I2C_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use */ |
| AnnaBridge | 171:3a7713b1edbc | 128 | HAL_I2C_STATE_BUSY = 0x24U, /*!< An internal process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 129 | HAL_I2C_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 130 | HAL_I2C_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 131 | HAL_I2C_STATE_LISTEN = 0x28U, /*!< Address Listen Mode is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 132 | HAL_I2C_STATE_BUSY_TX_LISTEN = 0x29U, /*!< Address Listen Mode and Data Transmission |
| AnnaBridge | 171:3a7713b1edbc | 133 | process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 134 | HAL_I2C_STATE_BUSY_RX_LISTEN = 0x2AU, /*!< Address Listen Mode and Data Reception |
| AnnaBridge | 171:3a7713b1edbc | 135 | process is ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 136 | HAL_I2C_STATE_ABORT = 0x60U, /*!< Abort user request ongoing */ |
| AnnaBridge | 171:3a7713b1edbc | 137 | HAL_I2C_STATE_TIMEOUT = 0xA0U, /*!< Timeout state */ |
| AnnaBridge | 171:3a7713b1edbc | 138 | HAL_I2C_STATE_ERROR = 0xE0U /*!< Error */ |
| AnnaBridge | 171:3a7713b1edbc | 139 | |
| AnnaBridge | 171:3a7713b1edbc | 140 | } HAL_I2C_StateTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 141 | |
| AnnaBridge | 171:3a7713b1edbc | 142 | /** |
| AnnaBridge | 171:3a7713b1edbc | 143 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 144 | */ |
| AnnaBridge | 171:3a7713b1edbc | 145 | |
| AnnaBridge | 171:3a7713b1edbc | 146 | /** @defgroup HAL_mode_structure_definition HAL mode structure definition |
| AnnaBridge | 171:3a7713b1edbc | 147 | * @brief HAL Mode structure definition |
| AnnaBridge | 171:3a7713b1edbc | 148 | * @note HAL I2C Mode value coding follow below described bitmap :\n |
| AnnaBridge | 171:3a7713b1edbc | 149 | * b7 (not used)\n |
| AnnaBridge | 171:3a7713b1edbc | 150 | * x : Should be set to 0\n |
| AnnaBridge | 171:3a7713b1edbc | 151 | * b6\n |
| AnnaBridge | 171:3a7713b1edbc | 152 | * 0 : None\n |
| AnnaBridge | 171:3a7713b1edbc | 153 | * 1 : Memory (HAL I2C communication is in Memory Mode)\n |
| AnnaBridge | 171:3a7713b1edbc | 154 | * b5\n |
| AnnaBridge | 171:3a7713b1edbc | 155 | * 0 : None\n |
| AnnaBridge | 171:3a7713b1edbc | 156 | * 1 : Slave (HAL I2C communication is in Slave Mode)\n |
| AnnaBridge | 171:3a7713b1edbc | 157 | * b4\n |
| AnnaBridge | 171:3a7713b1edbc | 158 | * 0 : None\n |
| AnnaBridge | 171:3a7713b1edbc | 159 | * 1 : Master (HAL I2C communication is in Master Mode)\n |
| AnnaBridge | 171:3a7713b1edbc | 160 | * b3-b2-b1-b0 (not used)\n |
| AnnaBridge | 171:3a7713b1edbc | 161 | * xxxx : Should be set to 0000 |
| AnnaBridge | 171:3a7713b1edbc | 162 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 163 | */ |
| AnnaBridge | 171:3a7713b1edbc | 164 | typedef enum |
| AnnaBridge | 171:3a7713b1edbc | 165 | { |
| AnnaBridge | 171:3a7713b1edbc | 166 | HAL_I2C_MODE_NONE = 0x00U, /*!< No I2C communication on going */ |
| AnnaBridge | 171:3a7713b1edbc | 167 | HAL_I2C_MODE_MASTER = 0x10U, /*!< I2C communication is in Master Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 168 | HAL_I2C_MODE_SLAVE = 0x20U, /*!< I2C communication is in Slave Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 169 | HAL_I2C_MODE_MEM = 0x40U /*!< I2C communication is in Memory Mode */ |
| AnnaBridge | 171:3a7713b1edbc | 170 | |
| AnnaBridge | 171:3a7713b1edbc | 171 | } HAL_I2C_ModeTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 172 | |
| AnnaBridge | 171:3a7713b1edbc | 173 | /** |
| AnnaBridge | 171:3a7713b1edbc | 174 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 175 | */ |
| AnnaBridge | 171:3a7713b1edbc | 176 | |
| AnnaBridge | 171:3a7713b1edbc | 177 | /** @defgroup I2C_Error_Code_definition I2C Error Code definition |
| AnnaBridge | 171:3a7713b1edbc | 178 | * @brief I2C Error Code definition |
| AnnaBridge | 171:3a7713b1edbc | 179 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 180 | */ |
| AnnaBridge | 171:3a7713b1edbc | 181 | #define HAL_I2C_ERROR_NONE (0x00000000U) /*!< No error */ |
| AnnaBridge | 171:3a7713b1edbc | 182 | #define HAL_I2C_ERROR_BERR (0x00000001U) /*!< BERR error */ |
| AnnaBridge | 171:3a7713b1edbc | 183 | #define HAL_I2C_ERROR_ARLO (0x00000002U) /*!< ARLO error */ |
| AnnaBridge | 171:3a7713b1edbc | 184 | #define HAL_I2C_ERROR_AF (0x00000004U) /*!< ACKF error */ |
| AnnaBridge | 171:3a7713b1edbc | 185 | #define HAL_I2C_ERROR_OVR (0x00000008U) /*!< OVR error */ |
| AnnaBridge | 171:3a7713b1edbc | 186 | #define HAL_I2C_ERROR_DMA (0x00000010U) /*!< DMA transfer error */ |
| AnnaBridge | 171:3a7713b1edbc | 187 | #define HAL_I2C_ERROR_TIMEOUT (0x00000020U) /*!< Timeout error */ |
| AnnaBridge | 171:3a7713b1edbc | 188 | #define HAL_I2C_ERROR_SIZE (0x00000040U) /*!< Size Management error */ |
| AnnaBridge | 171:3a7713b1edbc | 189 | /** |
| AnnaBridge | 171:3a7713b1edbc | 190 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 191 | */ |
| AnnaBridge | 171:3a7713b1edbc | 192 | |
| AnnaBridge | 171:3a7713b1edbc | 193 | /** @defgroup I2C_handle_Structure_definition I2C handle Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 194 | * @brief I2C handle Structure definition |
| AnnaBridge | 171:3a7713b1edbc | 195 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 196 | */ |
| AnnaBridge | 171:3a7713b1edbc | 197 | typedef struct __I2C_HandleTypeDef |
| AnnaBridge | 171:3a7713b1edbc | 198 | { |
| AnnaBridge | 171:3a7713b1edbc | 199 | I2C_TypeDef *Instance; /*!< I2C registers base address */ |
| AnnaBridge | 171:3a7713b1edbc | 200 | |
| AnnaBridge | 171:3a7713b1edbc | 201 | I2C_InitTypeDef Init; /*!< I2C communication parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 202 | |
| AnnaBridge | 171:3a7713b1edbc | 203 | uint8_t *pBuffPtr; /*!< Pointer to I2C transfer buffer */ |
| AnnaBridge | 171:3a7713b1edbc | 204 | |
| AnnaBridge | 171:3a7713b1edbc | 205 | uint16_t XferSize; /*!< I2C transfer size */ |
| AnnaBridge | 171:3a7713b1edbc | 206 | |
| AnnaBridge | 171:3a7713b1edbc | 207 | __IO uint16_t XferCount; /*!< I2C transfer counter */ |
| AnnaBridge | 171:3a7713b1edbc | 208 | |
| AnnaBridge | 171:3a7713b1edbc | 209 | __IO uint32_t XferOptions; /*!< I2C sequantial transfer options, this parameter can |
| AnnaBridge | 171:3a7713b1edbc | 210 | be a value of @ref I2C_XFEROPTIONS */ |
| AnnaBridge | 171:3a7713b1edbc | 211 | |
| AnnaBridge | 171:3a7713b1edbc | 212 | __IO uint32_t PreviousState; /*!< I2C communication Previous state */ |
| AnnaBridge | 171:3a7713b1edbc | 213 | |
| AnnaBridge | 171:3a7713b1edbc | 214 | HAL_StatusTypeDef(*XferISR)(struct __I2C_HandleTypeDef *hi2c, uint32_t ITFlags, uint32_t ITSources); /*!< I2C transfer IRQ handler function pointer */ |
| AnnaBridge | 171:3a7713b1edbc | 215 | |
| AnnaBridge | 171:3a7713b1edbc | 216 | DMA_HandleTypeDef *hdmatx; /*!< I2C Tx DMA handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 217 | |
| AnnaBridge | 171:3a7713b1edbc | 218 | DMA_HandleTypeDef *hdmarx; /*!< I2C Rx DMA handle parameters */ |
| AnnaBridge | 171:3a7713b1edbc | 219 | |
| AnnaBridge | 171:3a7713b1edbc | 220 | HAL_LockTypeDef Lock; /*!< I2C locking object */ |
| AnnaBridge | 171:3a7713b1edbc | 221 | |
| AnnaBridge | 171:3a7713b1edbc | 222 | __IO HAL_I2C_StateTypeDef State; /*!< I2C communication state */ |
| AnnaBridge | 171:3a7713b1edbc | 223 | |
| AnnaBridge | 171:3a7713b1edbc | 224 | __IO HAL_I2C_ModeTypeDef Mode; /*!< I2C communication mode */ |
| AnnaBridge | 171:3a7713b1edbc | 225 | |
| AnnaBridge | 171:3a7713b1edbc | 226 | __IO uint32_t ErrorCode; /*!< I2C Error code */ |
| AnnaBridge | 171:3a7713b1edbc | 227 | |
| AnnaBridge | 171:3a7713b1edbc | 228 | __IO uint32_t AddrEventCount; /*!< I2C Address Event counter */ |
| AnnaBridge | 171:3a7713b1edbc | 229 | } I2C_HandleTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 230 | /** |
| AnnaBridge | 171:3a7713b1edbc | 231 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 232 | */ |
| AnnaBridge | 171:3a7713b1edbc | 233 | |
| AnnaBridge | 171:3a7713b1edbc | 234 | /** |
| AnnaBridge | 171:3a7713b1edbc | 235 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 236 | */ |
| AnnaBridge | 171:3a7713b1edbc | 237 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 238 | |
| AnnaBridge | 171:3a7713b1edbc | 239 | /** @defgroup I2C_Exported_Constants I2C Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 240 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 241 | */ |
| AnnaBridge | 171:3a7713b1edbc | 242 | |
| AnnaBridge | 171:3a7713b1edbc | 243 | /** @defgroup I2C_XFEROPTIONS I2C Sequential Transfer Options |
| AnnaBridge | 171:3a7713b1edbc | 244 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 245 | */ |
| AnnaBridge | 171:3a7713b1edbc | 246 | #define I2C_FIRST_FRAME ((uint32_t)I2C_SOFTEND_MODE) |
| AnnaBridge | 171:3a7713b1edbc | 247 | #define I2C_FIRST_AND_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) |
| AnnaBridge | 171:3a7713b1edbc | 248 | #define I2C_NEXT_FRAME ((uint32_t)(I2C_RELOAD_MODE | I2C_SOFTEND_MODE)) |
| AnnaBridge | 171:3a7713b1edbc | 249 | #define I2C_FIRST_AND_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) |
| AnnaBridge | 171:3a7713b1edbc | 250 | #define I2C_LAST_FRAME ((uint32_t)I2C_AUTOEND_MODE) |
| AnnaBridge | 171:3a7713b1edbc | 251 | /** |
| AnnaBridge | 171:3a7713b1edbc | 252 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 253 | */ |
| AnnaBridge | 171:3a7713b1edbc | 254 | |
| AnnaBridge | 171:3a7713b1edbc | 255 | /** @defgroup I2C_ADDRESSING_MODE I2C Addressing Mode |
| AnnaBridge | 171:3a7713b1edbc | 256 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 257 | */ |
| AnnaBridge | 171:3a7713b1edbc | 258 | #define I2C_ADDRESSINGMODE_7BIT (0x00000001U) |
| AnnaBridge | 171:3a7713b1edbc | 259 | #define I2C_ADDRESSINGMODE_10BIT (0x00000002U) |
| AnnaBridge | 171:3a7713b1edbc | 260 | /** |
| AnnaBridge | 171:3a7713b1edbc | 261 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 262 | */ |
| AnnaBridge | 171:3a7713b1edbc | 263 | |
| AnnaBridge | 171:3a7713b1edbc | 264 | /** @defgroup I2C_DUAL_ADDRESSING_MODE I2C Dual Addressing Mode |
| AnnaBridge | 171:3a7713b1edbc | 265 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 266 | */ |
| AnnaBridge | 171:3a7713b1edbc | 267 | #define I2C_DUALADDRESS_DISABLE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 268 | #define I2C_DUALADDRESS_ENABLE I2C_OAR2_OA2EN |
| AnnaBridge | 171:3a7713b1edbc | 269 | /** |
| AnnaBridge | 171:3a7713b1edbc | 270 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 271 | */ |
| AnnaBridge | 171:3a7713b1edbc | 272 | |
| AnnaBridge | 171:3a7713b1edbc | 273 | /** @defgroup I2C_OWN_ADDRESS2_MASKS I2C Own Address2 Masks |
| AnnaBridge | 171:3a7713b1edbc | 274 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 275 | */ |
| AnnaBridge | 171:3a7713b1edbc | 276 | #define I2C_OA2_NOMASK ((uint8_t)0x00U) |
| AnnaBridge | 171:3a7713b1edbc | 277 | #define I2C_OA2_MASK01 ((uint8_t)0x01U) |
| AnnaBridge | 171:3a7713b1edbc | 278 | #define I2C_OA2_MASK02 ((uint8_t)0x02U) |
| AnnaBridge | 171:3a7713b1edbc | 279 | #define I2C_OA2_MASK03 ((uint8_t)0x03U) |
| AnnaBridge | 171:3a7713b1edbc | 280 | #define I2C_OA2_MASK04 ((uint8_t)0x04U) |
| AnnaBridge | 171:3a7713b1edbc | 281 | #define I2C_OA2_MASK05 ((uint8_t)0x05U) |
| AnnaBridge | 171:3a7713b1edbc | 282 | #define I2C_OA2_MASK06 ((uint8_t)0x06U) |
| AnnaBridge | 171:3a7713b1edbc | 283 | #define I2C_OA2_MASK07 ((uint8_t)0x07U) |
| AnnaBridge | 171:3a7713b1edbc | 284 | /** |
| AnnaBridge | 171:3a7713b1edbc | 285 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 286 | */ |
| AnnaBridge | 171:3a7713b1edbc | 287 | |
| AnnaBridge | 171:3a7713b1edbc | 288 | /** @defgroup I2C_GENERAL_CALL_ADDRESSING_MODE I2C General Call Addressing Mode |
| AnnaBridge | 171:3a7713b1edbc | 289 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 290 | */ |
| AnnaBridge | 171:3a7713b1edbc | 291 | #define I2C_GENERALCALL_DISABLE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 292 | #define I2C_GENERALCALL_ENABLE I2C_CR1_GCEN |
| AnnaBridge | 171:3a7713b1edbc | 293 | /** |
| AnnaBridge | 171:3a7713b1edbc | 294 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 295 | */ |
| AnnaBridge | 171:3a7713b1edbc | 296 | |
| AnnaBridge | 171:3a7713b1edbc | 297 | /** @defgroup I2C_NOSTRETCH_MODE I2C No-Stretch Mode |
| AnnaBridge | 171:3a7713b1edbc | 298 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 299 | */ |
| AnnaBridge | 171:3a7713b1edbc | 300 | #define I2C_NOSTRETCH_DISABLE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 301 | #define I2C_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH |
| AnnaBridge | 171:3a7713b1edbc | 302 | /** |
| AnnaBridge | 171:3a7713b1edbc | 303 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 304 | */ |
| AnnaBridge | 171:3a7713b1edbc | 305 | |
| AnnaBridge | 171:3a7713b1edbc | 306 | /** @defgroup I2C_MEMORY_ADDRESS_SIZE I2C Memory Address Size |
| AnnaBridge | 171:3a7713b1edbc | 307 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 308 | */ |
| AnnaBridge | 171:3a7713b1edbc | 309 | #define I2C_MEMADD_SIZE_8BIT (0x00000001U) |
| AnnaBridge | 171:3a7713b1edbc | 310 | #define I2C_MEMADD_SIZE_16BIT (0x00000002U) |
| AnnaBridge | 171:3a7713b1edbc | 311 | /** |
| AnnaBridge | 171:3a7713b1edbc | 312 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 313 | */ |
| AnnaBridge | 171:3a7713b1edbc | 314 | |
| AnnaBridge | 171:3a7713b1edbc | 315 | /** @defgroup I2C_XFERDIRECTION I2C Transfer Direction Master Point of View |
| AnnaBridge | 171:3a7713b1edbc | 316 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 317 | */ |
| AnnaBridge | 171:3a7713b1edbc | 318 | #define I2C_DIRECTION_TRANSMIT (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 319 | #define I2C_DIRECTION_RECEIVE (0x00000001U) |
| AnnaBridge | 171:3a7713b1edbc | 320 | /** |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 322 | */ |
| AnnaBridge | 171:3a7713b1edbc | 323 | |
| AnnaBridge | 171:3a7713b1edbc | 324 | /** @defgroup I2C_RELOAD_END_MODE I2C Reload End Mode |
| AnnaBridge | 171:3a7713b1edbc | 325 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 326 | */ |
| AnnaBridge | 171:3a7713b1edbc | 327 | #define I2C_RELOAD_MODE I2C_CR2_RELOAD |
| AnnaBridge | 171:3a7713b1edbc | 328 | #define I2C_AUTOEND_MODE I2C_CR2_AUTOEND |
| AnnaBridge | 171:3a7713b1edbc | 329 | #define I2C_SOFTEND_MODE (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 330 | /** |
| AnnaBridge | 171:3a7713b1edbc | 331 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 332 | */ |
| AnnaBridge | 171:3a7713b1edbc | 333 | |
| AnnaBridge | 171:3a7713b1edbc | 334 | /** @defgroup I2C_START_STOP_MODE I2C Start or Stop Mode |
| AnnaBridge | 171:3a7713b1edbc | 335 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 336 | */ |
| AnnaBridge | 171:3a7713b1edbc | 337 | #define I2C_NO_STARTSTOP (0x00000000U) |
| AnnaBridge | 171:3a7713b1edbc | 338 | #define I2C_GENERATE_STOP I2C_CR2_STOP |
| AnnaBridge | 171:3a7713b1edbc | 339 | #define I2C_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN) |
| AnnaBridge | 171:3a7713b1edbc | 340 | #define I2C_GENERATE_START_WRITE I2C_CR2_START |
| AnnaBridge | 171:3a7713b1edbc | 341 | /** |
| AnnaBridge | 171:3a7713b1edbc | 342 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 343 | */ |
| AnnaBridge | 171:3a7713b1edbc | 344 | |
| AnnaBridge | 171:3a7713b1edbc | 345 | /** @defgroup I2C_Interrupt_configuration_definition I2C Interrupt configuration definition |
| AnnaBridge | 171:3a7713b1edbc | 346 | * @brief I2C Interrupt definition |
| AnnaBridge | 171:3a7713b1edbc | 347 | * Elements values convention: 0xXXXXXXXX |
| AnnaBridge | 171:3a7713b1edbc | 348 | * - XXXXXXXX : Interrupt control mask |
| AnnaBridge | 171:3a7713b1edbc | 349 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 350 | */ |
| AnnaBridge | 171:3a7713b1edbc | 351 | #define I2C_IT_ERRI I2C_CR1_ERRIE |
| AnnaBridge | 171:3a7713b1edbc | 352 | #define I2C_IT_TCI I2C_CR1_TCIE |
| AnnaBridge | 171:3a7713b1edbc | 353 | #define I2C_IT_STOPI I2C_CR1_STOPIE |
| AnnaBridge | 171:3a7713b1edbc | 354 | #define I2C_IT_NACKI I2C_CR1_NACKIE |
| AnnaBridge | 171:3a7713b1edbc | 355 | #define I2C_IT_ADDRI I2C_CR1_ADDRIE |
| AnnaBridge | 171:3a7713b1edbc | 356 | #define I2C_IT_RXI I2C_CR1_RXIE |
| AnnaBridge | 171:3a7713b1edbc | 357 | #define I2C_IT_TXI I2C_CR1_TXIE |
| AnnaBridge | 171:3a7713b1edbc | 358 | /** |
| AnnaBridge | 171:3a7713b1edbc | 359 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 360 | */ |
| AnnaBridge | 171:3a7713b1edbc | 361 | |
| AnnaBridge | 171:3a7713b1edbc | 362 | /** @defgroup I2C_Flag_definition I2C Flag definition |
| AnnaBridge | 171:3a7713b1edbc | 363 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 364 | */ |
| AnnaBridge | 171:3a7713b1edbc | 365 | #define I2C_FLAG_TXE I2C_ISR_TXE |
| AnnaBridge | 171:3a7713b1edbc | 366 | #define I2C_FLAG_TXIS I2C_ISR_TXIS |
| AnnaBridge | 171:3a7713b1edbc | 367 | #define I2C_FLAG_RXNE I2C_ISR_RXNE |
| AnnaBridge | 171:3a7713b1edbc | 368 | #define I2C_FLAG_ADDR I2C_ISR_ADDR |
| AnnaBridge | 171:3a7713b1edbc | 369 | #define I2C_FLAG_AF I2C_ISR_NACKF |
| AnnaBridge | 171:3a7713b1edbc | 370 | #define I2C_FLAG_STOPF I2C_ISR_STOPF |
| AnnaBridge | 171:3a7713b1edbc | 371 | #define I2C_FLAG_TC I2C_ISR_TC |
| AnnaBridge | 171:3a7713b1edbc | 372 | #define I2C_FLAG_TCR I2C_ISR_TCR |
| AnnaBridge | 171:3a7713b1edbc | 373 | #define I2C_FLAG_BERR I2C_ISR_BERR |
| AnnaBridge | 171:3a7713b1edbc | 374 | #define I2C_FLAG_ARLO I2C_ISR_ARLO |
| AnnaBridge | 171:3a7713b1edbc | 375 | #define I2C_FLAG_OVR I2C_ISR_OVR |
| AnnaBridge | 171:3a7713b1edbc | 376 | #define I2C_FLAG_PECERR I2C_ISR_PECERR |
| AnnaBridge | 171:3a7713b1edbc | 377 | #define I2C_FLAG_TIMEOUT I2C_ISR_TIMEOUT |
| AnnaBridge | 171:3a7713b1edbc | 378 | #define I2C_FLAG_ALERT I2C_ISR_ALERT |
| AnnaBridge | 171:3a7713b1edbc | 379 | #define I2C_FLAG_BUSY I2C_ISR_BUSY |
| AnnaBridge | 171:3a7713b1edbc | 380 | #define I2C_FLAG_DIR I2C_ISR_DIR |
| AnnaBridge | 171:3a7713b1edbc | 381 | /** |
| AnnaBridge | 171:3a7713b1edbc | 382 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 383 | */ |
| AnnaBridge | 171:3a7713b1edbc | 384 | |
| AnnaBridge | 171:3a7713b1edbc | 385 | /** |
| AnnaBridge | 171:3a7713b1edbc | 386 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 387 | */ |
| AnnaBridge | 171:3a7713b1edbc | 388 | |
| AnnaBridge | 171:3a7713b1edbc | 389 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 390 | |
| AnnaBridge | 171:3a7713b1edbc | 391 | /** @defgroup I2C_Exported_Macros I2C Exported Macros |
| AnnaBridge | 171:3a7713b1edbc | 392 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 393 | */ |
| AnnaBridge | 171:3a7713b1edbc | 394 | |
| AnnaBridge | 171:3a7713b1edbc | 395 | /** @brief Reset I2C handle state. |
| AnnaBridge | 171:3a7713b1edbc | 396 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 397 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 398 | */ |
| AnnaBridge | 171:3a7713b1edbc | 399 | #define __HAL_I2C_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2C_STATE_RESET) |
| AnnaBridge | 171:3a7713b1edbc | 400 | |
| AnnaBridge | 171:3a7713b1edbc | 401 | /** @brief Enable the specified I2C interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 402 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 403 | * @param __INTERRUPT__ specifies the interrupt source to enable. |
| AnnaBridge | 171:3a7713b1edbc | 404 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 405 | * @arg @ref I2C_IT_ERRI Errors interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 406 | * @arg @ref I2C_IT_TCI Transfer complete interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 407 | * @arg @ref I2C_IT_STOPI STOP detection interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 408 | * @arg @ref I2C_IT_NACKI NACK received interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 409 | * @arg @ref I2C_IT_ADDRI Address match interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 410 | * @arg @ref I2C_IT_RXI RX interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 411 | * @arg @ref I2C_IT_TXI TX interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 412 | * |
| AnnaBridge | 171:3a7713b1edbc | 413 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 414 | */ |
| AnnaBridge | 171:3a7713b1edbc | 415 | #define __HAL_I2C_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__)) |
| AnnaBridge | 171:3a7713b1edbc | 416 | |
| AnnaBridge | 171:3a7713b1edbc | 417 | /** @brief Disable the specified I2C interrupt. |
| AnnaBridge | 171:3a7713b1edbc | 418 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 419 | * @param __INTERRUPT__ specifies the interrupt source to disable. |
| AnnaBridge | 171:3a7713b1edbc | 420 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 421 | * @arg @ref I2C_IT_ERRI Errors interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 422 | * @arg @ref I2C_IT_TCI Transfer complete interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 423 | * @arg @ref I2C_IT_STOPI STOP detection interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 424 | * @arg @ref I2C_IT_NACKI NACK received interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 425 | * @arg @ref I2C_IT_ADDRI Address match interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 426 | * @arg @ref I2C_IT_RXI RX interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 427 | * @arg @ref I2C_IT_TXI TX interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 428 | * |
| AnnaBridge | 171:3a7713b1edbc | 429 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 430 | */ |
| AnnaBridge | 171:3a7713b1edbc | 431 | #define __HAL_I2C_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__))) |
| AnnaBridge | 171:3a7713b1edbc | 432 | |
| AnnaBridge | 171:3a7713b1edbc | 433 | /** @brief Check whether the specified I2C interrupt source is enabled or not. |
| AnnaBridge | 171:3a7713b1edbc | 434 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 435 | * @param __INTERRUPT__ specifies the I2C interrupt source to check. |
| AnnaBridge | 171:3a7713b1edbc | 436 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 437 | * @arg @ref I2C_IT_ERRI Errors interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 438 | * @arg @ref I2C_IT_TCI Transfer complete interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 439 | * @arg @ref I2C_IT_STOPI STOP detection interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 440 | * @arg @ref I2C_IT_NACKI NACK received interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 441 | * @arg @ref I2C_IT_ADDRI Address match interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 442 | * @arg @ref I2C_IT_RXI RX interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 443 | * @arg @ref I2C_IT_TXI TX interrupt enable |
| AnnaBridge | 171:3a7713b1edbc | 444 | * |
| AnnaBridge | 171:3a7713b1edbc | 445 | * @retval The new state of __INTERRUPT__ (SET or RESET). |
| AnnaBridge | 171:3a7713b1edbc | 446 | */ |
| AnnaBridge | 171:3a7713b1edbc | 447 | #define __HAL_I2C_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET) |
| AnnaBridge | 171:3a7713b1edbc | 448 | |
| AnnaBridge | 171:3a7713b1edbc | 449 | /** @brief Check whether the specified I2C flag is set or not. |
| AnnaBridge | 171:3a7713b1edbc | 450 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 451 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 171:3a7713b1edbc | 452 | * This parameter can be one of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 453 | * @arg @ref I2C_FLAG_TXE Transmit data register empty |
| AnnaBridge | 171:3a7713b1edbc | 454 | * @arg @ref I2C_FLAG_TXIS Transmit interrupt status |
| AnnaBridge | 171:3a7713b1edbc | 455 | * @arg @ref I2C_FLAG_RXNE Receive data register not empty |
| AnnaBridge | 171:3a7713b1edbc | 456 | * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) |
| AnnaBridge | 171:3a7713b1edbc | 457 | * @arg @ref I2C_FLAG_AF Acknowledge failure received flag |
| AnnaBridge | 171:3a7713b1edbc | 458 | * @arg @ref I2C_FLAG_STOPF STOP detection flag |
| AnnaBridge | 171:3a7713b1edbc | 459 | * @arg @ref I2C_FLAG_TC Transfer complete (master mode) |
| AnnaBridge | 171:3a7713b1edbc | 460 | * @arg @ref I2C_FLAG_TCR Transfer complete reload |
| AnnaBridge | 171:3a7713b1edbc | 461 | * @arg @ref I2C_FLAG_BERR Bus error |
| AnnaBridge | 171:3a7713b1edbc | 462 | * @arg @ref I2C_FLAG_ARLO Arbitration lost |
| AnnaBridge | 171:3a7713b1edbc | 463 | * @arg @ref I2C_FLAG_OVR Overrun/Underrun |
| AnnaBridge | 171:3a7713b1edbc | 464 | * @arg @ref I2C_FLAG_PECERR PEC error in reception |
| AnnaBridge | 171:3a7713b1edbc | 465 | * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag |
| AnnaBridge | 171:3a7713b1edbc | 466 | * @arg @ref I2C_FLAG_ALERT SMBus alert |
| AnnaBridge | 171:3a7713b1edbc | 467 | * @arg @ref I2C_FLAG_BUSY Bus busy |
| AnnaBridge | 171:3a7713b1edbc | 468 | * @arg @ref I2C_FLAG_DIR Transfer direction (slave mode) |
| AnnaBridge | 171:3a7713b1edbc | 469 | * |
| AnnaBridge | 171:3a7713b1edbc | 470 | * @retval The new state of __FLAG__ (SET or RESET). |
| AnnaBridge | 171:3a7713b1edbc | 471 | */ |
| AnnaBridge | 171:3a7713b1edbc | 472 | #define __HAL_I2C_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & (__FLAG__)) == (__FLAG__)) ? SET : RESET) |
| AnnaBridge | 171:3a7713b1edbc | 473 | |
| AnnaBridge | 171:3a7713b1edbc | 474 | /** @brief Clear the I2C pending flags which are cleared by writing 1 in a specific bit. |
| AnnaBridge | 171:3a7713b1edbc | 475 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 476 | * @param __FLAG__ specifies the flag to clear. |
| AnnaBridge | 171:3a7713b1edbc | 477 | * This parameter can be any combination of the following values: |
| AnnaBridge | 171:3a7713b1edbc | 478 | * @arg @ref I2C_FLAG_TXE Transmit data register empty |
| AnnaBridge | 171:3a7713b1edbc | 479 | * @arg @ref I2C_FLAG_ADDR Address matched (slave mode) |
| AnnaBridge | 171:3a7713b1edbc | 480 | * @arg @ref I2C_FLAG_AF Acknowledge failure received flag |
| AnnaBridge | 171:3a7713b1edbc | 481 | * @arg @ref I2C_FLAG_STOPF STOP detection flag |
| AnnaBridge | 171:3a7713b1edbc | 482 | * @arg @ref I2C_FLAG_BERR Bus error |
| AnnaBridge | 171:3a7713b1edbc | 483 | * @arg @ref I2C_FLAG_ARLO Arbitration lost |
| AnnaBridge | 171:3a7713b1edbc | 484 | * @arg @ref I2C_FLAG_OVR Overrun/Underrun |
| AnnaBridge | 171:3a7713b1edbc | 485 | * @arg @ref I2C_FLAG_PECERR PEC error in reception |
| AnnaBridge | 171:3a7713b1edbc | 486 | * @arg @ref I2C_FLAG_TIMEOUT Timeout or Tlow detection flag |
| AnnaBridge | 171:3a7713b1edbc | 487 | * @arg @ref I2C_FLAG_ALERT SMBus alert |
| AnnaBridge | 171:3a7713b1edbc | 488 | * |
| AnnaBridge | 171:3a7713b1edbc | 489 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 490 | */ |
| AnnaBridge | 171:3a7713b1edbc | 491 | #define __HAL_I2C_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__FLAG__) == I2C_FLAG_TXE) ? ((__HANDLE__)->Instance->ISR |= (__FLAG__)) \ |
| AnnaBridge | 171:3a7713b1edbc | 492 | : ((__HANDLE__)->Instance->ICR = (__FLAG__))) |
| AnnaBridge | 171:3a7713b1edbc | 493 | |
| AnnaBridge | 171:3a7713b1edbc | 494 | /** @brief Enable the specified I2C peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 495 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 496 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 497 | */ |
| AnnaBridge | 171:3a7713b1edbc | 498 | #define __HAL_I2C_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
| AnnaBridge | 171:3a7713b1edbc | 499 | |
| AnnaBridge | 171:3a7713b1edbc | 500 | /** @brief Disable the specified I2C peripheral. |
| AnnaBridge | 171:3a7713b1edbc | 501 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 502 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 503 | */ |
| AnnaBridge | 171:3a7713b1edbc | 504 | #define __HAL_I2C_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE)) |
| AnnaBridge | 171:3a7713b1edbc | 505 | |
| AnnaBridge | 171:3a7713b1edbc | 506 | /** @brief Generate a Non-Acknowledge I2C peripheral in Slave mode. |
| AnnaBridge | 171:3a7713b1edbc | 507 | * @param __HANDLE__ specifies the I2C Handle. |
| AnnaBridge | 171:3a7713b1edbc | 508 | * @retval None |
| AnnaBridge | 171:3a7713b1edbc | 509 | */ |
| AnnaBridge | 171:3a7713b1edbc | 510 | #define __HAL_I2C_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK)) |
| AnnaBridge | 171:3a7713b1edbc | 511 | /** |
| AnnaBridge | 171:3a7713b1edbc | 512 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 513 | */ |
| AnnaBridge | 171:3a7713b1edbc | 514 | |
| AnnaBridge | 171:3a7713b1edbc | 515 | /* Include I2C HAL Extended module */ |
| AnnaBridge | 171:3a7713b1edbc | 516 | #include "stm32f0xx_hal_i2c_ex.h" |
| AnnaBridge | 171:3a7713b1edbc | 517 | |
| AnnaBridge | 171:3a7713b1edbc | 518 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 519 | /** @addtogroup I2C_Exported_Functions |
| AnnaBridge | 171:3a7713b1edbc | 520 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 521 | */ |
| AnnaBridge | 171:3a7713b1edbc | 522 | |
| AnnaBridge | 171:3a7713b1edbc | 523 | /** @addtogroup I2C_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 171:3a7713b1edbc | 524 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 525 | */ |
| AnnaBridge | 171:3a7713b1edbc | 526 | /* Initialization and de-initialization functions******************************/ |
| AnnaBridge | 171:3a7713b1edbc | 527 | HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 528 | HAL_StatusTypeDef HAL_I2C_DeInit(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 529 | void HAL_I2C_MspInit(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 530 | void HAL_I2C_MspDeInit(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 531 | /** |
| AnnaBridge | 171:3a7713b1edbc | 532 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 533 | */ |
| AnnaBridge | 171:3a7713b1edbc | 534 | |
| AnnaBridge | 171:3a7713b1edbc | 535 | /** @addtogroup I2C_Exported_Functions_Group2 Input and Output operation functions |
| AnnaBridge | 171:3a7713b1edbc | 536 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 537 | */ |
| AnnaBridge | 171:3a7713b1edbc | 538 | /* IO operation functions ****************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 539 | /******* Blocking mode: Polling */ |
| AnnaBridge | 171:3a7713b1edbc | 540 | HAL_StatusTypeDef HAL_I2C_Master_Transmit(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 541 | HAL_StatusTypeDef HAL_I2C_Master_Receive(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 542 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 543 | HAL_StatusTypeDef HAL_I2C_Slave_Receive(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 544 | HAL_StatusTypeDef HAL_I2C_Mem_Write(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 545 | HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 546 | HAL_StatusTypeDef HAL_I2C_IsDeviceReady(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout); |
| AnnaBridge | 171:3a7713b1edbc | 547 | |
| AnnaBridge | 171:3a7713b1edbc | 548 | /******* Non-Blocking mode: Interrupt */ |
| AnnaBridge | 171:3a7713b1edbc | 549 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 550 | HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 551 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 552 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 553 | HAL_StatusTypeDef HAL_I2C_Mem_Write_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 554 | HAL_StatusTypeDef HAL_I2C_Mem_Read_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 555 | |
| AnnaBridge | 171:3a7713b1edbc | 556 | HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 171:3a7713b1edbc | 557 | HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 171:3a7713b1edbc | 558 | HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 171:3a7713b1edbc | 559 | HAL_StatusTypeDef HAL_I2C_Slave_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size, uint32_t XferOptions); |
| AnnaBridge | 171:3a7713b1edbc | 560 | HAL_StatusTypeDef HAL_I2C_EnableListen_IT(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 561 | HAL_StatusTypeDef HAL_I2C_DisableListen_IT(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 562 | HAL_StatusTypeDef HAL_I2C_Master_Abort_IT(I2C_HandleTypeDef *hi2c, uint16_t DevAddress); |
| AnnaBridge | 171:3a7713b1edbc | 563 | |
| AnnaBridge | 171:3a7713b1edbc | 564 | /******* Non-Blocking mode: DMA */ |
| AnnaBridge | 171:3a7713b1edbc | 565 | HAL_StatusTypeDef HAL_I2C_Master_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 566 | HAL_StatusTypeDef HAL_I2C_Master_Receive_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 567 | HAL_StatusTypeDef HAL_I2C_Slave_Transmit_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 568 | HAL_StatusTypeDef HAL_I2C_Slave_Receive_DMA(I2C_HandleTypeDef *hi2c, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 569 | HAL_StatusTypeDef HAL_I2C_Mem_Write_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 570 | HAL_StatusTypeDef HAL_I2C_Mem_Read_DMA(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 171:3a7713b1edbc | 571 | /** |
| AnnaBridge | 171:3a7713b1edbc | 572 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 573 | */ |
| AnnaBridge | 171:3a7713b1edbc | 574 | |
| AnnaBridge | 171:3a7713b1edbc | 575 | /** @addtogroup I2C_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks |
| AnnaBridge | 171:3a7713b1edbc | 576 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 577 | */ |
| AnnaBridge | 171:3a7713b1edbc | 578 | /******* I2C IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */ |
| AnnaBridge | 171:3a7713b1edbc | 579 | void HAL_I2C_EV_IRQHandler(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 580 | void HAL_I2C_ER_IRQHandler(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 581 | void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 582 | void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 583 | void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 584 | void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 585 | void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode); |
| AnnaBridge | 171:3a7713b1edbc | 586 | void HAL_I2C_ListenCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 587 | void HAL_I2C_MemTxCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 588 | void HAL_I2C_MemRxCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 589 | void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 590 | void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 591 | /** |
| AnnaBridge | 171:3a7713b1edbc | 592 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 593 | */ |
| AnnaBridge | 171:3a7713b1edbc | 594 | |
| AnnaBridge | 171:3a7713b1edbc | 595 | /** @addtogroup I2C_Exported_Functions_Group3 Peripheral State, Mode and Error functions |
| AnnaBridge | 171:3a7713b1edbc | 596 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 597 | */ |
| AnnaBridge | 171:3a7713b1edbc | 598 | /* Peripheral State, Mode and Error functions *********************************/ |
| AnnaBridge | 171:3a7713b1edbc | 599 | HAL_I2C_StateTypeDef HAL_I2C_GetState(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 600 | HAL_I2C_ModeTypeDef HAL_I2C_GetMode(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 601 | uint32_t HAL_I2C_GetError(I2C_HandleTypeDef *hi2c); |
| AnnaBridge | 171:3a7713b1edbc | 602 | |
| AnnaBridge | 171:3a7713b1edbc | 603 | /** |
| AnnaBridge | 171:3a7713b1edbc | 604 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 605 | */ |
| AnnaBridge | 171:3a7713b1edbc | 606 | |
| AnnaBridge | 171:3a7713b1edbc | 607 | /** |
| AnnaBridge | 171:3a7713b1edbc | 608 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 609 | */ |
| AnnaBridge | 171:3a7713b1edbc | 610 | |
| AnnaBridge | 171:3a7713b1edbc | 611 | /* Private constants ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 612 | /** @defgroup I2C_Private_Constants I2C Private Constants |
| AnnaBridge | 171:3a7713b1edbc | 613 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 614 | */ |
| AnnaBridge | 171:3a7713b1edbc | 615 | |
| AnnaBridge | 171:3a7713b1edbc | 616 | /** |
| AnnaBridge | 171:3a7713b1edbc | 617 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 618 | */ |
| AnnaBridge | 171:3a7713b1edbc | 619 | |
| AnnaBridge | 171:3a7713b1edbc | 620 | /* Private macros ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 621 | /** @defgroup I2C_Private_Macro I2C Private Macros |
| AnnaBridge | 171:3a7713b1edbc | 622 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 623 | */ |
| AnnaBridge | 171:3a7713b1edbc | 624 | |
| AnnaBridge | 171:3a7713b1edbc | 625 | #define IS_I2C_ADDRESSING_MODE(MODE) (((MODE) == I2C_ADDRESSINGMODE_7BIT) || \ |
| AnnaBridge | 171:3a7713b1edbc | 626 | ((MODE) == I2C_ADDRESSINGMODE_10BIT)) |
| AnnaBridge | 171:3a7713b1edbc | 627 | |
| AnnaBridge | 171:3a7713b1edbc | 628 | #define IS_I2C_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == I2C_DUALADDRESS_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 629 | ((ADDRESS) == I2C_DUALADDRESS_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 630 | |
| AnnaBridge | 171:3a7713b1edbc | 631 | #define IS_I2C_OWN_ADDRESS2_MASK(MASK) (((MASK) == I2C_OA2_NOMASK) || \ |
| AnnaBridge | 171:3a7713b1edbc | 632 | ((MASK) == I2C_OA2_MASK01) || \ |
| AnnaBridge | 171:3a7713b1edbc | 633 | ((MASK) == I2C_OA2_MASK02) || \ |
| AnnaBridge | 171:3a7713b1edbc | 634 | ((MASK) == I2C_OA2_MASK03) || \ |
| AnnaBridge | 171:3a7713b1edbc | 635 | ((MASK) == I2C_OA2_MASK04) || \ |
| AnnaBridge | 171:3a7713b1edbc | 636 | ((MASK) == I2C_OA2_MASK05) || \ |
| AnnaBridge | 171:3a7713b1edbc | 637 | ((MASK) == I2C_OA2_MASK06) || \ |
| AnnaBridge | 171:3a7713b1edbc | 638 | ((MASK) == I2C_OA2_MASK07)) |
| AnnaBridge | 171:3a7713b1edbc | 639 | |
| AnnaBridge | 171:3a7713b1edbc | 640 | #define IS_I2C_GENERAL_CALL(CALL) (((CALL) == I2C_GENERALCALL_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 641 | ((CALL) == I2C_GENERALCALL_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 642 | |
| AnnaBridge | 171:3a7713b1edbc | 643 | #define IS_I2C_NO_STRETCH(STRETCH) (((STRETCH) == I2C_NOSTRETCH_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 644 | ((STRETCH) == I2C_NOSTRETCH_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 645 | |
| AnnaBridge | 171:3a7713b1edbc | 646 | #define IS_I2C_MEMADD_SIZE(SIZE) (((SIZE) == I2C_MEMADD_SIZE_8BIT) || \ |
| AnnaBridge | 171:3a7713b1edbc | 647 | ((SIZE) == I2C_MEMADD_SIZE_16BIT)) |
| AnnaBridge | 171:3a7713b1edbc | 648 | |
| AnnaBridge | 171:3a7713b1edbc | 649 | #define IS_TRANSFER_MODE(MODE) (((MODE) == I2C_RELOAD_MODE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 650 | ((MODE) == I2C_AUTOEND_MODE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 651 | ((MODE) == I2C_SOFTEND_MODE)) |
| AnnaBridge | 171:3a7713b1edbc | 652 | |
| AnnaBridge | 171:3a7713b1edbc | 653 | #define IS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == I2C_GENERATE_STOP) || \ |
| AnnaBridge | 171:3a7713b1edbc | 654 | ((REQUEST) == I2C_GENERATE_START_READ) || \ |
| AnnaBridge | 171:3a7713b1edbc | 655 | ((REQUEST) == I2C_GENERATE_START_WRITE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 656 | ((REQUEST) == I2C_NO_STARTSTOP)) |
| AnnaBridge | 171:3a7713b1edbc | 657 | |
| AnnaBridge | 171:3a7713b1edbc | 658 | #define IS_I2C_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == I2C_FIRST_FRAME) || \ |
| AnnaBridge | 171:3a7713b1edbc | 659 | ((REQUEST) == I2C_FIRST_AND_NEXT_FRAME) || \ |
| AnnaBridge | 171:3a7713b1edbc | 660 | ((REQUEST) == I2C_NEXT_FRAME) || \ |
| AnnaBridge | 171:3a7713b1edbc | 661 | ((REQUEST) == I2C_FIRST_AND_LAST_FRAME) || \ |
| AnnaBridge | 171:3a7713b1edbc | 662 | ((REQUEST) == I2C_LAST_FRAME)) |
| AnnaBridge | 171:3a7713b1edbc | 663 | |
| AnnaBridge | 171:3a7713b1edbc | 664 | #define I2C_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN))) |
| AnnaBridge | 171:3a7713b1edbc | 665 | |
| AnnaBridge | 171:3a7713b1edbc | 666 | #define I2C_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 16U) |
| AnnaBridge | 171:3a7713b1edbc | 667 | #define I2C_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16U) |
| AnnaBridge | 171:3a7713b1edbc | 668 | #define I2C_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND) |
| AnnaBridge | 171:3a7713b1edbc | 669 | #define I2C_GET_OWN_ADDRESS1(__HANDLE__) ((__HANDLE__)->Instance->OAR1 & I2C_OAR1_OA1) |
| AnnaBridge | 171:3a7713b1edbc | 670 | #define I2C_GET_OWN_ADDRESS2(__HANDLE__) ((__HANDLE__)->Instance->OAR2 & I2C_OAR2_OA2) |
| AnnaBridge | 171:3a7713b1edbc | 671 | |
| AnnaBridge | 171:3a7713b1edbc | 672 | #define IS_I2C_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= 0x000003FFU) |
| AnnaBridge | 171:3a7713b1edbc | 673 | #define IS_I2C_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FFU) |
| AnnaBridge | 171:3a7713b1edbc | 674 | |
| AnnaBridge | 171:3a7713b1edbc | 675 | #define I2C_MEM_ADD_MSB(__ADDRESS__) ((uint8_t)((uint16_t)(((uint16_t)((__ADDRESS__) & (uint16_t)(0xFF00U))) >> 8U))) |
| AnnaBridge | 171:3a7713b1edbc | 676 | #define I2C_MEM_ADD_LSB(__ADDRESS__) ((uint8_t)((uint16_t)((__ADDRESS__) & (uint16_t)(0x00FFU)))) |
| AnnaBridge | 171:3a7713b1edbc | 677 | |
| AnnaBridge | 171:3a7713b1edbc | 678 | #define I2C_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == I2C_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \ |
| AnnaBridge | 171:3a7713b1edbc | 679 | (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN))) |
| AnnaBridge | 171:3a7713b1edbc | 680 | /** |
| AnnaBridge | 171:3a7713b1edbc | 681 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 682 | */ |
| AnnaBridge | 171:3a7713b1edbc | 683 | |
| AnnaBridge | 171:3a7713b1edbc | 684 | /* Private Functions ---------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 685 | /** @defgroup I2C_Private_Functions I2C Private Functions |
| AnnaBridge | 171:3a7713b1edbc | 686 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 687 | */ |
| AnnaBridge | 171:3a7713b1edbc | 688 | /* Private functions are defined in stm32f0xx_hal_i2c.c file */ |
| AnnaBridge | 171:3a7713b1edbc | 689 | /** |
| AnnaBridge | 171:3a7713b1edbc | 690 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 691 | */ |
| AnnaBridge | 171:3a7713b1edbc | 692 | |
| AnnaBridge | 171:3a7713b1edbc | 693 | /** |
| AnnaBridge | 171:3a7713b1edbc | 694 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 695 | */ |
| AnnaBridge | 171:3a7713b1edbc | 696 | |
| AnnaBridge | 171:3a7713b1edbc | 697 | /** |
| AnnaBridge | 171:3a7713b1edbc | 698 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 699 | */ |
| AnnaBridge | 171:3a7713b1edbc | 700 | |
| AnnaBridge | 171:3a7713b1edbc | 701 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 702 | } |
| AnnaBridge | 171:3a7713b1edbc | 703 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 704 | |
| AnnaBridge | 171:3a7713b1edbc | 705 | |
| AnnaBridge | 171:3a7713b1edbc | 706 | #endif /* __STM32F0xx_HAL_I2C_H */ |
| AnnaBridge | 171:3a7713b1edbc | 707 | |
| AnnaBridge | 171:3a7713b1edbc | 708 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
