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TARGET_NUCLEO_F030R8/TOOLCHAIN_ARM_MICRO/stm32f0xx_hal_flash_ex.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 171:3a7713b1edbc | 1 | /** |
| AnnaBridge | 171:3a7713b1edbc | 2 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 3 | * @file stm32f0xx_hal_flash_ex.h |
| AnnaBridge | 171:3a7713b1edbc | 4 | * @author MCD Application Team |
| AnnaBridge | 171:3a7713b1edbc | 5 | * @brief Header file of Flash HAL Extended module. |
| AnnaBridge | 171:3a7713b1edbc | 6 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 7 | * @attention |
| AnnaBridge | 171:3a7713b1edbc | 8 | * |
| AnnaBridge | 171:3a7713b1edbc | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 171:3a7713b1edbc | 10 | * |
| AnnaBridge | 171:3a7713b1edbc | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 171:3a7713b1edbc | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 171:3a7713b1edbc | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 171:3a7713b1edbc | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 171:3a7713b1edbc | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 171:3a7713b1edbc | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 171:3a7713b1edbc | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 171:3a7713b1edbc | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 171:3a7713b1edbc | 20 | * without specific prior written permission. |
| AnnaBridge | 171:3a7713b1edbc | 21 | * |
| AnnaBridge | 171:3a7713b1edbc | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 171:3a7713b1edbc | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 171:3a7713b1edbc | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 171:3a7713b1edbc | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 171:3a7713b1edbc | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 171:3a7713b1edbc | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 171:3a7713b1edbc | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 171:3a7713b1edbc | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 171:3a7713b1edbc | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 171:3a7713b1edbc | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 171:3a7713b1edbc | 32 | * |
| AnnaBridge | 171:3a7713b1edbc | 33 | ****************************************************************************** |
| AnnaBridge | 171:3a7713b1edbc | 34 | */ |
| AnnaBridge | 171:3a7713b1edbc | 35 | |
| AnnaBridge | 171:3a7713b1edbc | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 37 | #ifndef __STM32F0xx_HAL_FLASH_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 38 | #define __STM32F0xx_HAL_FLASH_EX_H |
| AnnaBridge | 171:3a7713b1edbc | 39 | |
| AnnaBridge | 171:3a7713b1edbc | 40 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 41 | extern "C" { |
| AnnaBridge | 171:3a7713b1edbc | 42 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 43 | |
| AnnaBridge | 171:3a7713b1edbc | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 45 | #include "stm32f0xx_hal_def.h" |
| AnnaBridge | 171:3a7713b1edbc | 46 | |
| AnnaBridge | 171:3a7713b1edbc | 47 | /** @addtogroup STM32F0xx_HAL_Driver |
| AnnaBridge | 171:3a7713b1edbc | 48 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 49 | */ |
| AnnaBridge | 171:3a7713b1edbc | 50 | |
| AnnaBridge | 171:3a7713b1edbc | 51 | /** @addtogroup FLASHEx |
| AnnaBridge | 171:3a7713b1edbc | 52 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 53 | */ |
| AnnaBridge | 171:3a7713b1edbc | 54 | |
| AnnaBridge | 171:3a7713b1edbc | 55 | /** @addtogroup FLASHEx_Private_Macros |
| AnnaBridge | 171:3a7713b1edbc | 56 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 57 | */ |
| AnnaBridge | 171:3a7713b1edbc | 58 | #define IS_FLASH_TYPEERASE(VALUE) (((VALUE) == FLASH_TYPEERASE_PAGES) || \ |
| AnnaBridge | 171:3a7713b1edbc | 59 | ((VALUE) == FLASH_TYPEERASE_MASSERASE)) |
| AnnaBridge | 171:3a7713b1edbc | 60 | |
| AnnaBridge | 171:3a7713b1edbc | 61 | #define IS_OPTIONBYTE(VALUE) ((VALUE) <= (OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER | OPTIONBYTE_DATA)) |
| AnnaBridge | 171:3a7713b1edbc | 62 | |
| AnnaBridge | 171:3a7713b1edbc | 63 | #define IS_WRPSTATE(VALUE) (((VALUE) == OB_WRPSTATE_DISABLE) || \ |
| AnnaBridge | 171:3a7713b1edbc | 64 | ((VALUE) == OB_WRPSTATE_ENABLE)) |
| AnnaBridge | 171:3a7713b1edbc | 65 | |
| AnnaBridge | 171:3a7713b1edbc | 66 | #define IS_OB_DATA_ADDRESS(ADDRESS) (((ADDRESS) == OB_DATA_ADDRESS_DATA0) || ((ADDRESS) == OB_DATA_ADDRESS_DATA1)) |
| AnnaBridge | 171:3a7713b1edbc | 67 | |
| AnnaBridge | 171:3a7713b1edbc | 68 | #define IS_OB_RDP_LEVEL(LEVEL) (((LEVEL) == OB_RDP_LEVEL_0) ||\ |
| AnnaBridge | 171:3a7713b1edbc | 69 | ((LEVEL) == OB_RDP_LEVEL_1))/*||\ |
| AnnaBridge | 171:3a7713b1edbc | 70 | ((LEVEL) == OB_RDP_LEVEL_2))*/ |
| AnnaBridge | 171:3a7713b1edbc | 71 | |
| AnnaBridge | 171:3a7713b1edbc | 72 | #define IS_OB_IWDG_SOURCE(SOURCE) (((SOURCE) == OB_IWDG_SW) || ((SOURCE) == OB_IWDG_HW)) |
| AnnaBridge | 171:3a7713b1edbc | 73 | |
| AnnaBridge | 171:3a7713b1edbc | 74 | #define IS_OB_STOP_SOURCE(SOURCE) (((SOURCE) == OB_STOP_NO_RST) || ((SOURCE) == OB_STOP_RST)) |
| AnnaBridge | 171:3a7713b1edbc | 75 | |
| AnnaBridge | 171:3a7713b1edbc | 76 | #define IS_OB_STDBY_SOURCE(SOURCE) (((SOURCE) == OB_STDBY_NO_RST) || ((SOURCE) == OB_STDBY_RST)) |
| AnnaBridge | 171:3a7713b1edbc | 77 | |
| AnnaBridge | 171:3a7713b1edbc | 78 | #define IS_OB_BOOT1(BOOT1) (((BOOT1) == OB_BOOT1_RESET) || ((BOOT1) == OB_BOOT1_SET)) |
| AnnaBridge | 171:3a7713b1edbc | 79 | |
| AnnaBridge | 171:3a7713b1edbc | 80 | #define IS_OB_VDDA_ANALOG(ANALOG) (((ANALOG) == OB_VDDA_ANALOG_ON) || ((ANALOG) == OB_VDDA_ANALOG_OFF)) |
| AnnaBridge | 171:3a7713b1edbc | 81 | |
| AnnaBridge | 171:3a7713b1edbc | 82 | #define IS_OB_SRAM_PARITY(PARITY) (((PARITY) == OB_SRAM_PARITY_SET) || ((PARITY) == OB_SRAM_PARITY_RESET)) |
| AnnaBridge | 171:3a7713b1edbc | 83 | |
| AnnaBridge | 171:3a7713b1edbc | 84 | #if defined(FLASH_OBR_BOOT_SEL) |
| AnnaBridge | 171:3a7713b1edbc | 85 | #define IS_OB_BOOT_SEL(BOOT_SEL) (((BOOT_SEL) == OB_BOOT_SEL_RESET) || ((BOOT_SEL) == OB_BOOT_SEL_SET)) |
| AnnaBridge | 171:3a7713b1edbc | 86 | #define IS_OB_BOOT0(BOOT0) (((BOOT0) == OB_BOOT0_RESET) || ((BOOT0) == OB_BOOT0_SET)) |
| AnnaBridge | 171:3a7713b1edbc | 87 | #endif /* FLASH_OBR_BOOT_SEL */ |
| AnnaBridge | 171:3a7713b1edbc | 88 | |
| AnnaBridge | 171:3a7713b1edbc | 89 | |
| AnnaBridge | 171:3a7713b1edbc | 90 | #define IS_OB_WRP(PAGE) (((PAGE) != 0x0000000U)) |
| AnnaBridge | 171:3a7713b1edbc | 91 | |
| AnnaBridge | 171:3a7713b1edbc | 92 | #define IS_FLASH_NB_PAGES(ADDRESS,NBPAGES) ((ADDRESS)+((NBPAGES)*FLASH_PAGE_SIZE)-1 <= FLASH_BANK1_END) |
| AnnaBridge | 171:3a7713b1edbc | 93 | |
| AnnaBridge | 171:3a7713b1edbc | 94 | #define IS_FLASH_PROGRAM_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) <= FLASH_BANK1_END)) |
| AnnaBridge | 171:3a7713b1edbc | 95 | |
| AnnaBridge | 171:3a7713b1edbc | 96 | /** |
| AnnaBridge | 171:3a7713b1edbc | 97 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 98 | */ |
| AnnaBridge | 171:3a7713b1edbc | 99 | |
| AnnaBridge | 171:3a7713b1edbc | 100 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 101 | /** @defgroup FLASHEx_Exported_Types FLASHEx Exported Types |
| AnnaBridge | 171:3a7713b1edbc | 102 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 103 | */ |
| AnnaBridge | 171:3a7713b1edbc | 104 | /** |
| AnnaBridge | 171:3a7713b1edbc | 105 | * @brief FLASH Erase structure definition |
| AnnaBridge | 171:3a7713b1edbc | 106 | */ |
| AnnaBridge | 171:3a7713b1edbc | 107 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 108 | { |
| AnnaBridge | 171:3a7713b1edbc | 109 | uint32_t TypeErase; /*!< TypeErase: Mass erase or page erase. |
| AnnaBridge | 171:3a7713b1edbc | 110 | This parameter can be a value of @ref FLASHEx_Type_Erase */ |
| AnnaBridge | 171:3a7713b1edbc | 111 | |
| AnnaBridge | 171:3a7713b1edbc | 112 | uint32_t PageAddress; /*!< PageAdress: Initial FLASH page address to erase when mass erase is disabled |
| AnnaBridge | 171:3a7713b1edbc | 113 | This parameter must be a number between Min_Data = FLASH_BASE and Max_Data = FLASH_BANK1_END */ |
| AnnaBridge | 171:3a7713b1edbc | 114 | |
| AnnaBridge | 171:3a7713b1edbc | 115 | uint32_t NbPages; /*!< NbPages: Number of pagess to be erased. |
| AnnaBridge | 171:3a7713b1edbc | 116 | This parameter must be a value between Min_Data = 1 and Max_Data = (max number of pages - value of initial page)*/ |
| AnnaBridge | 171:3a7713b1edbc | 117 | |
| AnnaBridge | 171:3a7713b1edbc | 118 | } FLASH_EraseInitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 119 | |
| AnnaBridge | 171:3a7713b1edbc | 120 | /** |
| AnnaBridge | 171:3a7713b1edbc | 121 | * @brief FLASH Options bytes program structure definition |
| AnnaBridge | 171:3a7713b1edbc | 122 | */ |
| AnnaBridge | 171:3a7713b1edbc | 123 | typedef struct |
| AnnaBridge | 171:3a7713b1edbc | 124 | { |
| AnnaBridge | 171:3a7713b1edbc | 125 | uint32_t OptionType; /*!< OptionType: Option byte to be configured. |
| AnnaBridge | 171:3a7713b1edbc | 126 | This parameter can be a value of @ref FLASHEx_OB_Type */ |
| AnnaBridge | 171:3a7713b1edbc | 127 | |
| AnnaBridge | 171:3a7713b1edbc | 128 | uint32_t WRPState; /*!< WRPState: Write protection activation or deactivation. |
| AnnaBridge | 171:3a7713b1edbc | 129 | This parameter can be a value of @ref FLASHEx_OB_WRP_State */ |
| AnnaBridge | 171:3a7713b1edbc | 130 | |
| AnnaBridge | 171:3a7713b1edbc | 131 | uint32_t WRPPage; /*!< WRPPage: specifies the page(s) to be write protected |
| AnnaBridge | 171:3a7713b1edbc | 132 | This parameter can be a value of @ref FLASHEx_OB_Write_Protection */ |
| AnnaBridge | 171:3a7713b1edbc | 133 | |
| AnnaBridge | 171:3a7713b1edbc | 134 | uint8_t RDPLevel; /*!< RDPLevel: Set the read protection level.. |
| AnnaBridge | 171:3a7713b1edbc | 135 | This parameter can be a value of @ref FLASHEx_OB_Read_Protection */ |
| AnnaBridge | 171:3a7713b1edbc | 136 | |
| AnnaBridge | 171:3a7713b1edbc | 137 | uint8_t USERConfig; /*!< USERConfig: Program the FLASH User Option Byte: |
| AnnaBridge | 171:3a7713b1edbc | 138 | IWDG / STOP / STDBY / BOOT1 / VDDA_ANALOG / SRAM_PARITY |
| AnnaBridge | 171:3a7713b1edbc | 139 | This parameter can be a combination of @ref FLASHEx_OB_IWatchdog, @ref FLASHEx_OB_nRST_STOP, |
| AnnaBridge | 171:3a7713b1edbc | 140 | @ref FLASHEx_OB_nRST_STDBY, @ref FLASHEx_OB_BOOT1, @ref FLASHEx_OB_VDDA_Analog_Monitoring and |
| AnnaBridge | 171:3a7713b1edbc | 141 | @ref FLASHEx_OB_RAM_Parity_Check_Enable */ |
| AnnaBridge | 171:3a7713b1edbc | 142 | |
| AnnaBridge | 171:3a7713b1edbc | 143 | uint32_t DATAAddress; /*!< DATAAddress: Address of the option byte DATA to be programmed |
| AnnaBridge | 171:3a7713b1edbc | 144 | This parameter can be a value of @ref FLASHEx_OB_Data_Address */ |
| AnnaBridge | 171:3a7713b1edbc | 145 | |
| AnnaBridge | 171:3a7713b1edbc | 146 | uint8_t DATAData; /*!< DATAData: Data to be stored in the option byte DATA |
| AnnaBridge | 171:3a7713b1edbc | 147 | This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ |
| AnnaBridge | 171:3a7713b1edbc | 148 | } FLASH_OBProgramInitTypeDef; |
| AnnaBridge | 171:3a7713b1edbc | 149 | /** |
| AnnaBridge | 171:3a7713b1edbc | 150 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 151 | */ |
| AnnaBridge | 171:3a7713b1edbc | 152 | |
| AnnaBridge | 171:3a7713b1edbc | 153 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 154 | /** @defgroup FLASHEx_Exported_Constants FLASHEx Exported Constants |
| AnnaBridge | 171:3a7713b1edbc | 155 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 156 | */ |
| AnnaBridge | 171:3a7713b1edbc | 157 | |
| AnnaBridge | 171:3a7713b1edbc | 158 | /** @defgroup FLASHEx_Page_Size FLASHEx Page Size |
| AnnaBridge | 171:3a7713b1edbc | 159 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 160 | */ |
| AnnaBridge | 171:3a7713b1edbc | 161 | #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \ |
| AnnaBridge | 171:3a7713b1edbc | 162 | || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6) |
| AnnaBridge | 171:3a7713b1edbc | 163 | #define FLASH_PAGE_SIZE 0x400U |
| AnnaBridge | 171:3a7713b1edbc | 164 | #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F058xx || STM32F070x6 */ |
| AnnaBridge | 171:3a7713b1edbc | 165 | |
| AnnaBridge | 171:3a7713b1edbc | 166 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \ |
| AnnaBridge | 171:3a7713b1edbc | 167 | || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 171:3a7713b1edbc | 168 | #define FLASH_PAGE_SIZE 0x800U |
| AnnaBridge | 171:3a7713b1edbc | 169 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC */ |
| AnnaBridge | 171:3a7713b1edbc | 170 | /** |
| AnnaBridge | 171:3a7713b1edbc | 171 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 172 | */ |
| AnnaBridge | 171:3a7713b1edbc | 173 | |
| AnnaBridge | 171:3a7713b1edbc | 174 | /** @defgroup FLASHEx_Type_Erase FLASH Type Erase |
| AnnaBridge | 171:3a7713b1edbc | 175 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 176 | */ |
| AnnaBridge | 171:3a7713b1edbc | 177 | #define FLASH_TYPEERASE_PAGES (0x00U) /*!<Pages erase only*/ |
| AnnaBridge | 171:3a7713b1edbc | 178 | #define FLASH_TYPEERASE_MASSERASE (0x01U) /*!<Flash mass erase activation*/ |
| AnnaBridge | 171:3a7713b1edbc | 179 | |
| AnnaBridge | 171:3a7713b1edbc | 180 | /** |
| AnnaBridge | 171:3a7713b1edbc | 181 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 182 | */ |
| AnnaBridge | 171:3a7713b1edbc | 183 | |
| AnnaBridge | 171:3a7713b1edbc | 184 | /** @defgroup FLASHEx_OptionByte_Constants Option Byte Constants |
| AnnaBridge | 171:3a7713b1edbc | 185 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 186 | */ |
| AnnaBridge | 171:3a7713b1edbc | 187 | |
| AnnaBridge | 171:3a7713b1edbc | 188 | /** @defgroup FLASHEx_OB_Type Option Bytes Type |
| AnnaBridge | 171:3a7713b1edbc | 189 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 190 | */ |
| AnnaBridge | 171:3a7713b1edbc | 191 | #define OPTIONBYTE_WRP (0x01U) /*!<WRP option byte configuration*/ |
| AnnaBridge | 171:3a7713b1edbc | 192 | #define OPTIONBYTE_RDP (0x02U) /*!<RDP option byte configuration*/ |
| AnnaBridge | 171:3a7713b1edbc | 193 | #define OPTIONBYTE_USER (0x04U) /*!<USER option byte configuration*/ |
| AnnaBridge | 171:3a7713b1edbc | 194 | #define OPTIONBYTE_DATA (0x08U) /*!<DATA option byte configuration*/ |
| AnnaBridge | 171:3a7713b1edbc | 195 | |
| AnnaBridge | 171:3a7713b1edbc | 196 | /** |
| AnnaBridge | 171:3a7713b1edbc | 197 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 198 | */ |
| AnnaBridge | 171:3a7713b1edbc | 199 | |
| AnnaBridge | 171:3a7713b1edbc | 200 | /** @defgroup FLASHEx_OB_WRP_State Option Byte WRP State |
| AnnaBridge | 171:3a7713b1edbc | 201 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 202 | */ |
| AnnaBridge | 171:3a7713b1edbc | 203 | #define OB_WRPSTATE_DISABLE (0x00U) /*!<Disable the write protection of the desired pages*/ |
| AnnaBridge | 171:3a7713b1edbc | 204 | #define OB_WRPSTATE_ENABLE (0x01U) /*!<Enable the write protection of the desired pagess*/ |
| AnnaBridge | 171:3a7713b1edbc | 205 | |
| AnnaBridge | 171:3a7713b1edbc | 206 | /** |
| AnnaBridge | 171:3a7713b1edbc | 207 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 208 | */ |
| AnnaBridge | 171:3a7713b1edbc | 209 | |
| AnnaBridge | 171:3a7713b1edbc | 210 | /** @defgroup FLASHEx_OB_Write_Protection FLASHEx OB Write Protection |
| AnnaBridge | 171:3a7713b1edbc | 211 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 212 | */ |
| AnnaBridge | 171:3a7713b1edbc | 213 | #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \ |
| AnnaBridge | 171:3a7713b1edbc | 214 | || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6) |
| AnnaBridge | 171:3a7713b1edbc | 215 | #define OB_WRP_PAGES0TO3 (0x00000001U) /* Write protection of page 0 to 3 */ |
| AnnaBridge | 171:3a7713b1edbc | 216 | #define OB_WRP_PAGES4TO7 (0x00000002U) /* Write protection of page 4 to 7 */ |
| AnnaBridge | 171:3a7713b1edbc | 217 | #define OB_WRP_PAGES8TO11 (0x00000004U) /* Write protection of page 8 to 11 */ |
| AnnaBridge | 171:3a7713b1edbc | 218 | #define OB_WRP_PAGES12TO15 (0x00000008U) /* Write protection of page 12 to 15 */ |
| AnnaBridge | 171:3a7713b1edbc | 219 | #define OB_WRP_PAGES16TO19 (0x00000010U) /* Write protection of page 16 to 19 */ |
| AnnaBridge | 171:3a7713b1edbc | 220 | #define OB_WRP_PAGES20TO23 (0x00000020U) /* Write protection of page 20 to 23 */ |
| AnnaBridge | 171:3a7713b1edbc | 221 | #define OB_WRP_PAGES24TO27 (0x00000040U) /* Write protection of page 24 to 27 */ |
| AnnaBridge | 171:3a7713b1edbc | 222 | #define OB_WRP_PAGES28TO31 (0x00000080U) /* Write protection of page 28 to 31 */ |
| AnnaBridge | 171:3a7713b1edbc | 223 | #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) |
| AnnaBridge | 171:3a7713b1edbc | 224 | #define OB_WRP_PAGES32TO35 (0x00000100U) /* Write protection of page 32 to 35 */ |
| AnnaBridge | 171:3a7713b1edbc | 225 | #define OB_WRP_PAGES36TO39 (0x00000200U) /* Write protection of page 36 to 39 */ |
| AnnaBridge | 171:3a7713b1edbc | 226 | #define OB_WRP_PAGES40TO43 (0x00000400U) /* Write protection of page 40 to 43 */ |
| AnnaBridge | 171:3a7713b1edbc | 227 | #define OB_WRP_PAGES44TO47 (0x00000800U) /* Write protection of page 44 to 47 */ |
| AnnaBridge | 171:3a7713b1edbc | 228 | #define OB_WRP_PAGES48TO51 (0x00001000U) /* Write protection of page 48 to 51 */ |
| AnnaBridge | 171:3a7713b1edbc | 229 | #define OB_WRP_PAGES52TO57 (0x00002000U) /* Write protection of page 52 to 57 */ |
| AnnaBridge | 171:3a7713b1edbc | 230 | #define OB_WRP_PAGES56TO59 (0x00004000U) /* Write protection of page 56 to 59 */ |
| AnnaBridge | 171:3a7713b1edbc | 231 | #define OB_WRP_PAGES60TO63 (0x00008000U) /* Write protection of page 60 to 63 */ |
| AnnaBridge | 171:3a7713b1edbc | 232 | #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */ |
| AnnaBridge | 171:3a7713b1edbc | 233 | |
| AnnaBridge | 171:3a7713b1edbc | 234 | #if defined(STM32F030x6) || defined(STM32F030x8) || defined(STM32F031x6) || defined(STM32F038xx) \ |
| AnnaBridge | 171:3a7713b1edbc | 235 | || defined(STM32F051x8) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F070x6) |
| AnnaBridge | 171:3a7713b1edbc | 236 | #define OB_WRP_PAGES0TO31MASK (0x000000FFU) |
| AnnaBridge | 171:3a7713b1edbc | 237 | #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */ |
| AnnaBridge | 171:3a7713b1edbc | 238 | |
| AnnaBridge | 171:3a7713b1edbc | 239 | #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) |
| AnnaBridge | 171:3a7713b1edbc | 240 | #define OB_WRP_PAGES32TO63MASK (0x0000FF00U) |
| AnnaBridge | 171:3a7713b1edbc | 241 | #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */ |
| AnnaBridge | 171:3a7713b1edbc | 242 | |
| AnnaBridge | 171:3a7713b1edbc | 243 | #if defined(STM32F030x6) || defined(STM32F031x6) || defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F038xx)|| defined(STM32F070x6) |
| AnnaBridge | 171:3a7713b1edbc | 244 | #define OB_WRP_ALLPAGES (0x000000FFU) /*!< Write protection of all pages */ |
| AnnaBridge | 171:3a7713b1edbc | 245 | #endif /* STM32F030x6 || STM32F031x6 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F070x6 */ |
| AnnaBridge | 171:3a7713b1edbc | 246 | |
| AnnaBridge | 171:3a7713b1edbc | 247 | #if defined(STM32F030x8) || defined(STM32F051x8) || defined(STM32F058xx) |
| AnnaBridge | 171:3a7713b1edbc | 248 | #define OB_WRP_ALLPAGES (0x0000FFFFU) /*!< Write protection of all pages */ |
| AnnaBridge | 171:3a7713b1edbc | 249 | #endif /* STM32F030x8 || STM32F051x8 || STM32F058xx */ |
| AnnaBridge | 171:3a7713b1edbc | 250 | #endif /* STM32F030x6 || STM32F030x8 || STM32F031x6 || STM32F051x8 || STM32F042x6 || STM32F048xx || STM32F038xx || STM32F058xx || STM32F070x6 */ |
| AnnaBridge | 171:3a7713b1edbc | 251 | |
| AnnaBridge | 171:3a7713b1edbc | 252 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \ |
| AnnaBridge | 171:3a7713b1edbc | 253 | || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 171:3a7713b1edbc | 254 | #define OB_WRP_PAGES0TO1 (0x00000001U) /* Write protection of page 0 to 1 */ |
| AnnaBridge | 171:3a7713b1edbc | 255 | #define OB_WRP_PAGES2TO3 (0x00000002U) /* Write protection of page 2 to 3 */ |
| AnnaBridge | 171:3a7713b1edbc | 256 | #define OB_WRP_PAGES4TO5 (0x00000004U) /* Write protection of page 4 to 5 */ |
| AnnaBridge | 171:3a7713b1edbc | 257 | #define OB_WRP_PAGES6TO7 (0x00000008U) /* Write protection of page 6 to 7 */ |
| AnnaBridge | 171:3a7713b1edbc | 258 | #define OB_WRP_PAGES8TO9 (0x00000010U) /* Write protection of page 8 to 9 */ |
| AnnaBridge | 171:3a7713b1edbc | 259 | #define OB_WRP_PAGES10TO11 (0x00000020U) /* Write protection of page 10 to 11 */ |
| AnnaBridge | 171:3a7713b1edbc | 260 | #define OB_WRP_PAGES12TO13 (0x00000040U) /* Write protection of page 12 to 13 */ |
| AnnaBridge | 171:3a7713b1edbc | 261 | #define OB_WRP_PAGES14TO15 (0x00000080U) /* Write protection of page 14 to 15 */ |
| AnnaBridge | 171:3a7713b1edbc | 262 | #define OB_WRP_PAGES16TO17 (0x00000100U) /* Write protection of page 16 to 17 */ |
| AnnaBridge | 171:3a7713b1edbc | 263 | #define OB_WRP_PAGES18TO19 (0x00000200U) /* Write protection of page 18 to 19 */ |
| AnnaBridge | 171:3a7713b1edbc | 264 | #define OB_WRP_PAGES20TO21 (0x00000400U) /* Write protection of page 20 to 21 */ |
| AnnaBridge | 171:3a7713b1edbc | 265 | #define OB_WRP_PAGES22TO23 (0x00000800U) /* Write protection of page 22 to 23 */ |
| AnnaBridge | 171:3a7713b1edbc | 266 | #define OB_WRP_PAGES24TO25 (0x00001000U) /* Write protection of page 24 to 25 */ |
| AnnaBridge | 171:3a7713b1edbc | 267 | #define OB_WRP_PAGES26TO27 (0x00002000U) /* Write protection of page 26 to 27 */ |
| AnnaBridge | 171:3a7713b1edbc | 268 | #define OB_WRP_PAGES28TO29 (0x00004000U) /* Write protection of page 28 to 29 */ |
| AnnaBridge | 171:3a7713b1edbc | 269 | #define OB_WRP_PAGES30TO31 (0x00008000U) /* Write protection of page 30 to 31 */ |
| AnnaBridge | 171:3a7713b1edbc | 270 | #define OB_WRP_PAGES32TO33 (0x00010000U) /* Write protection of page 32 to 33 */ |
| AnnaBridge | 171:3a7713b1edbc | 271 | #define OB_WRP_PAGES34TO35 (0x00020000U) /* Write protection of page 34 to 35 */ |
| AnnaBridge | 171:3a7713b1edbc | 272 | #define OB_WRP_PAGES36TO37 (0x00040000U) /* Write protection of page 36 to 37 */ |
| AnnaBridge | 171:3a7713b1edbc | 273 | #define OB_WRP_PAGES38TO39 (0x00080000U) /* Write protection of page 38 to 39 */ |
| AnnaBridge | 171:3a7713b1edbc | 274 | #define OB_WRP_PAGES40TO41 (0x00100000U) /* Write protection of page 40 to 41 */ |
| AnnaBridge | 171:3a7713b1edbc | 275 | #define OB_WRP_PAGES42TO43 (0x00200000U) /* Write protection of page 42 to 43 */ |
| AnnaBridge | 171:3a7713b1edbc | 276 | #define OB_WRP_PAGES44TO45 (0x00400000U) /* Write protection of page 44 to 45 */ |
| AnnaBridge | 171:3a7713b1edbc | 277 | #define OB_WRP_PAGES46TO47 (0x00800000U) /* Write protection of page 46 to 47 */ |
| AnnaBridge | 171:3a7713b1edbc | 278 | #define OB_WRP_PAGES48TO49 (0x01000000U) /* Write protection of page 48 to 49 */ |
| AnnaBridge | 171:3a7713b1edbc | 279 | #define OB_WRP_PAGES50TO51 (0x02000000U) /* Write protection of page 50 to 51 */ |
| AnnaBridge | 171:3a7713b1edbc | 280 | #define OB_WRP_PAGES52TO53 (0x04000000U) /* Write protection of page 52 to 53 */ |
| AnnaBridge | 171:3a7713b1edbc | 281 | #define OB_WRP_PAGES54TO55 (0x08000000U) /* Write protection of page 54 to 55 */ |
| AnnaBridge | 171:3a7713b1edbc | 282 | #define OB_WRP_PAGES56TO57 (0x10000000U) /* Write protection of page 56 to 57 */ |
| AnnaBridge | 171:3a7713b1edbc | 283 | #define OB_WRP_PAGES58TO59 (0x20000000U) /* Write protection of page 58 to 59 */ |
| AnnaBridge | 171:3a7713b1edbc | 284 | #define OB_WRP_PAGES60TO61 (0x40000000U) /* Write protection of page 60 to 61 */ |
| AnnaBridge | 171:3a7713b1edbc | 285 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) |
| AnnaBridge | 171:3a7713b1edbc | 286 | #define OB_WRP_PAGES62TO63 (0x80000000U) /* Write protection of page 62 to 63 */ |
| AnnaBridge | 171:3a7713b1edbc | 287 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */ |
| AnnaBridge | 171:3a7713b1edbc | 288 | #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 171:3a7713b1edbc | 289 | #define OB_WRP_PAGES62TO127 (0x80000000U) /* Write protection of page 62 to 127 */ |
| AnnaBridge | 171:3a7713b1edbc | 290 | #endif /* STM32F091xC || STM32F098xx || STM32F030xC */ |
| AnnaBridge | 171:3a7713b1edbc | 291 | |
| AnnaBridge | 171:3a7713b1edbc | 292 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) \ |
| AnnaBridge | 171:3a7713b1edbc | 293 | || defined(STM32F091xC) || defined(STM32F098xx)|| defined(STM32F030xC) |
| AnnaBridge | 171:3a7713b1edbc | 294 | #define OB_WRP_PAGES0TO15MASK (0x000000FFU) |
| AnnaBridge | 171:3a7713b1edbc | 295 | #define OB_WRP_PAGES16TO31MASK (0x0000FF00U) |
| AnnaBridge | 171:3a7713b1edbc | 296 | #define OB_WRP_PAGES32TO47MASK (0x00FF0000U) |
| AnnaBridge | 171:3a7713b1edbc | 297 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F070xB || STM32F030xC */ |
| AnnaBridge | 171:3a7713b1edbc | 298 | |
| AnnaBridge | 171:3a7713b1edbc | 299 | #if defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) |
| AnnaBridge | 171:3a7713b1edbc | 300 | #define OB_WRP_PAGES48TO63MASK (0xFF000000U) |
| AnnaBridge | 171:3a7713b1edbc | 301 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F070xB */ |
| AnnaBridge | 171:3a7713b1edbc | 302 | #if defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC) |
| AnnaBridge | 171:3a7713b1edbc | 303 | #define OB_WRP_PAGES48TO127MASK (0xFF000000U) |
| AnnaBridge | 171:3a7713b1edbc | 304 | #endif /* STM32F091xC || STM32F098xx || STM32F030xC */ |
| AnnaBridge | 171:3a7713b1edbc | 305 | |
| AnnaBridge | 171:3a7713b1edbc | 306 | #define OB_WRP_ALLPAGES (0xFFFFFFFFU) /*!< Write protection of all pages */ |
| AnnaBridge | 171:3a7713b1edbc | 307 | #endif /* STM32F071xB || STM32F072xB || STM32F078xx || STM32F091xC || STM32F098xx || STM32F030xC || STM32F070xB */ |
| AnnaBridge | 171:3a7713b1edbc | 308 | |
| AnnaBridge | 171:3a7713b1edbc | 309 | /** |
| AnnaBridge | 171:3a7713b1edbc | 310 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 311 | */ |
| AnnaBridge | 171:3a7713b1edbc | 312 | |
| AnnaBridge | 171:3a7713b1edbc | 313 | /** @defgroup FLASHEx_OB_Read_Protection Option Byte Read Protection |
| AnnaBridge | 171:3a7713b1edbc | 314 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 315 | */ |
| AnnaBridge | 171:3a7713b1edbc | 316 | #define OB_RDP_LEVEL_0 ((uint8_t)0xAAU) |
| AnnaBridge | 171:3a7713b1edbc | 317 | #define OB_RDP_LEVEL_1 ((uint8_t)0xBBU) |
| AnnaBridge | 171:3a7713b1edbc | 318 | #define OB_RDP_LEVEL_2 ((uint8_t)0xCCU) /*!< Warning: When enabling read protection level 2 |
| AnnaBridge | 171:3a7713b1edbc | 319 | it's no more possible to go back to level 1 or 0 */ |
| AnnaBridge | 171:3a7713b1edbc | 320 | /** |
| AnnaBridge | 171:3a7713b1edbc | 321 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 322 | */ |
| AnnaBridge | 171:3a7713b1edbc | 323 | |
| AnnaBridge | 171:3a7713b1edbc | 324 | /** @defgroup FLASHEx_OB_IWatchdog Option Byte IWatchdog |
| AnnaBridge | 171:3a7713b1edbc | 325 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 326 | */ |
| AnnaBridge | 171:3a7713b1edbc | 327 | #define OB_IWDG_SW ((uint8_t)0x01U) /*!< Software IWDG selected */ |
| AnnaBridge | 171:3a7713b1edbc | 328 | #define OB_IWDG_HW ((uint8_t)0x00U) /*!< Hardware IWDG selected */ |
| AnnaBridge | 171:3a7713b1edbc | 329 | /** |
| AnnaBridge | 171:3a7713b1edbc | 330 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 331 | */ |
| AnnaBridge | 171:3a7713b1edbc | 332 | |
| AnnaBridge | 171:3a7713b1edbc | 333 | /** @defgroup FLASHEx_OB_nRST_STOP Option Byte nRST STOP |
| AnnaBridge | 171:3a7713b1edbc | 334 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 335 | */ |
| AnnaBridge | 171:3a7713b1edbc | 336 | #define OB_STOP_NO_RST ((uint8_t)0x02U) /*!< No reset generated when entering in STOP */ |
| AnnaBridge | 171:3a7713b1edbc | 337 | #define OB_STOP_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STOP */ |
| AnnaBridge | 171:3a7713b1edbc | 338 | /** |
| AnnaBridge | 171:3a7713b1edbc | 339 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 340 | */ |
| AnnaBridge | 171:3a7713b1edbc | 341 | |
| AnnaBridge | 171:3a7713b1edbc | 342 | /** @defgroup FLASHEx_OB_nRST_STDBY Option Byte nRST STDBY |
| AnnaBridge | 171:3a7713b1edbc | 343 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 344 | */ |
| AnnaBridge | 171:3a7713b1edbc | 345 | #define OB_STDBY_NO_RST ((uint8_t)0x04U) /*!< No reset generated when entering in STANDBY */ |
| AnnaBridge | 171:3a7713b1edbc | 346 | #define OB_STDBY_RST ((uint8_t)0x00U) /*!< Reset generated when entering in STANDBY */ |
| AnnaBridge | 171:3a7713b1edbc | 347 | /** |
| AnnaBridge | 171:3a7713b1edbc | 348 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 349 | */ |
| AnnaBridge | 171:3a7713b1edbc | 350 | |
| AnnaBridge | 171:3a7713b1edbc | 351 | /** @defgroup FLASHEx_OB_BOOT1 Option Byte BOOT1 |
| AnnaBridge | 171:3a7713b1edbc | 352 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 353 | */ |
| AnnaBridge | 171:3a7713b1edbc | 354 | #define OB_BOOT1_RESET ((uint8_t)0x00U) /*!< BOOT1 Reset */ |
| AnnaBridge | 171:3a7713b1edbc | 355 | #define OB_BOOT1_SET ((uint8_t)0x10U) /*!< BOOT1 Set */ |
| AnnaBridge | 171:3a7713b1edbc | 356 | /** |
| AnnaBridge | 171:3a7713b1edbc | 357 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 358 | */ |
| AnnaBridge | 171:3a7713b1edbc | 359 | |
| AnnaBridge | 171:3a7713b1edbc | 360 | /** @defgroup FLASHEx_OB_VDDA_Analog_Monitoring Option Byte VDDA Analog Monitoring |
| AnnaBridge | 171:3a7713b1edbc | 361 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 362 | */ |
| AnnaBridge | 171:3a7713b1edbc | 363 | #define OB_VDDA_ANALOG_ON ((uint8_t)0x20U) /*!< Analog monitoring on VDDA Power source ON */ |
| AnnaBridge | 171:3a7713b1edbc | 364 | #define OB_VDDA_ANALOG_OFF ((uint8_t)0x00U) /*!< Analog monitoring on VDDA Power source OFF */ |
| AnnaBridge | 171:3a7713b1edbc | 365 | /** |
| AnnaBridge | 171:3a7713b1edbc | 366 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 367 | */ |
| AnnaBridge | 171:3a7713b1edbc | 368 | |
| AnnaBridge | 171:3a7713b1edbc | 369 | /** @defgroup FLASHEx_OB_RAM_Parity_Check_Enable Option Byte SRAM Parity Check Enable |
| AnnaBridge | 171:3a7713b1edbc | 370 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 371 | */ |
| AnnaBridge | 171:3a7713b1edbc | 372 | #define OB_SRAM_PARITY_SET ((uint8_t)0x00U) /*!< SRAM parity check enable set */ |
| AnnaBridge | 171:3a7713b1edbc | 373 | #define OB_SRAM_PARITY_RESET ((uint8_t)0x40U) /*!< SRAM parity check enable reset */ |
| AnnaBridge | 171:3a7713b1edbc | 374 | /** |
| AnnaBridge | 171:3a7713b1edbc | 375 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 376 | */ |
| AnnaBridge | 171:3a7713b1edbc | 377 | |
| AnnaBridge | 171:3a7713b1edbc | 378 | #if defined(FLASH_OBR_BOOT_SEL) |
| AnnaBridge | 171:3a7713b1edbc | 379 | /** @defgroup FLASHEx_OB_BOOT_SEL FLASHEx Option Byte BOOT SEL |
| AnnaBridge | 171:3a7713b1edbc | 380 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 381 | */ |
| AnnaBridge | 171:3a7713b1edbc | 382 | #define OB_BOOT_SEL_RESET ((uint8_t)0x00U) /*!< BOOT_SEL Reset */ |
| AnnaBridge | 171:3a7713b1edbc | 383 | #define OB_BOOT_SEL_SET ((uint8_t)0x80U) /*!< BOOT_SEL Set */ |
| AnnaBridge | 171:3a7713b1edbc | 384 | /** |
| AnnaBridge | 171:3a7713b1edbc | 385 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 386 | */ |
| AnnaBridge | 171:3a7713b1edbc | 387 | |
| AnnaBridge | 171:3a7713b1edbc | 388 | /** @defgroup FLASHEx_OB_BOOT0 FLASHEx Option Byte BOOT0 |
| AnnaBridge | 171:3a7713b1edbc | 389 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 390 | */ |
| AnnaBridge | 171:3a7713b1edbc | 391 | #define OB_BOOT0_RESET ((uint8_t)0x00U) /*!< BOOT0 Reset */ |
| AnnaBridge | 171:3a7713b1edbc | 392 | #define OB_BOOT0_SET ((uint8_t)0x08U) /*!< BOOT0 Set */ |
| AnnaBridge | 171:3a7713b1edbc | 393 | /** |
| AnnaBridge | 171:3a7713b1edbc | 394 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 395 | */ |
| AnnaBridge | 171:3a7713b1edbc | 396 | #endif /* FLASH_OBR_BOOT_SEL */ |
| AnnaBridge | 171:3a7713b1edbc | 397 | |
| AnnaBridge | 171:3a7713b1edbc | 398 | |
| AnnaBridge | 171:3a7713b1edbc | 399 | /** @defgroup FLASHEx_OB_Data_Address Option Byte Data Address |
| AnnaBridge | 171:3a7713b1edbc | 400 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 401 | */ |
| AnnaBridge | 171:3a7713b1edbc | 402 | #define OB_DATA_ADDRESS_DATA0 (0x1FFFF804U) |
| AnnaBridge | 171:3a7713b1edbc | 403 | #define OB_DATA_ADDRESS_DATA1 (0x1FFFF806U) |
| AnnaBridge | 171:3a7713b1edbc | 404 | /** |
| AnnaBridge | 171:3a7713b1edbc | 405 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 406 | */ |
| AnnaBridge | 171:3a7713b1edbc | 407 | |
| AnnaBridge | 171:3a7713b1edbc | 408 | /** |
| AnnaBridge | 171:3a7713b1edbc | 409 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 410 | */ |
| AnnaBridge | 171:3a7713b1edbc | 411 | |
| AnnaBridge | 171:3a7713b1edbc | 412 | /** |
| AnnaBridge | 171:3a7713b1edbc | 413 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 414 | */ |
| AnnaBridge | 171:3a7713b1edbc | 415 | |
| AnnaBridge | 171:3a7713b1edbc | 416 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 171:3a7713b1edbc | 417 | /** @addtogroup FLASHEx_Exported_Functions |
| AnnaBridge | 171:3a7713b1edbc | 418 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 419 | */ |
| AnnaBridge | 171:3a7713b1edbc | 420 | |
| AnnaBridge | 171:3a7713b1edbc | 421 | /** @addtogroup FLASHEx_Exported_Functions_Group1 |
| AnnaBridge | 171:3a7713b1edbc | 422 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 423 | */ |
| AnnaBridge | 171:3a7713b1edbc | 424 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 425 | HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); |
| AnnaBridge | 171:3a7713b1edbc | 426 | HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); |
| AnnaBridge | 171:3a7713b1edbc | 427 | |
| AnnaBridge | 171:3a7713b1edbc | 428 | /** |
| AnnaBridge | 171:3a7713b1edbc | 429 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 430 | */ |
| AnnaBridge | 171:3a7713b1edbc | 431 | |
| AnnaBridge | 171:3a7713b1edbc | 432 | /** @addtogroup FLASHEx_Exported_Functions_Group2 |
| AnnaBridge | 171:3a7713b1edbc | 433 | * @{ |
| AnnaBridge | 171:3a7713b1edbc | 434 | */ |
| AnnaBridge | 171:3a7713b1edbc | 435 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 171:3a7713b1edbc | 436 | HAL_StatusTypeDef HAL_FLASHEx_OBErase(void); |
| AnnaBridge | 171:3a7713b1edbc | 437 | HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); |
| AnnaBridge | 171:3a7713b1edbc | 438 | void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); |
| AnnaBridge | 171:3a7713b1edbc | 439 | uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress); |
| AnnaBridge | 171:3a7713b1edbc | 440 | |
| AnnaBridge | 171:3a7713b1edbc | 441 | /** |
| AnnaBridge | 171:3a7713b1edbc | 442 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 443 | */ |
| AnnaBridge | 171:3a7713b1edbc | 444 | |
| AnnaBridge | 171:3a7713b1edbc | 445 | /** |
| AnnaBridge | 171:3a7713b1edbc | 446 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 447 | */ |
| AnnaBridge | 171:3a7713b1edbc | 448 | |
| AnnaBridge | 171:3a7713b1edbc | 449 | /** |
| AnnaBridge | 171:3a7713b1edbc | 450 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 451 | */ |
| AnnaBridge | 171:3a7713b1edbc | 452 | |
| AnnaBridge | 171:3a7713b1edbc | 453 | /** |
| AnnaBridge | 171:3a7713b1edbc | 454 | * @} |
| AnnaBridge | 171:3a7713b1edbc | 455 | */ |
| AnnaBridge | 171:3a7713b1edbc | 456 | |
| AnnaBridge | 171:3a7713b1edbc | 457 | #ifdef __cplusplus |
| AnnaBridge | 171:3a7713b1edbc | 458 | } |
| AnnaBridge | 171:3a7713b1edbc | 459 | #endif |
| AnnaBridge | 171:3a7713b1edbc | 460 | |
| AnnaBridge | 171:3a7713b1edbc | 461 | #endif /* __STM32F0xx_HAL_FLASH_EX_H */ |
| AnnaBridge | 171:3a7713b1edbc | 462 | |
| AnnaBridge | 171:3a7713b1edbc | 463 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
| AnnaBridge | 171:3a7713b1edbc | 464 |
