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TARGET_MAX32625NEXPAQ/TOOLCHAIN_ARM_STD/uart_regs.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Anna Bridge |
169:a7c7b631e539 | 1 | /******************************************************************************* |
| Anna Bridge |
169:a7c7b631e539 | 2 | * Copyright (C) 2016 Maxim Integrated Products, Inc., All Rights Reserved. |
| Anna Bridge |
169:a7c7b631e539 | 3 | * |
| Anna Bridge |
169:a7c7b631e539 | 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| Anna Bridge |
169:a7c7b631e539 | 5 | * copy of this software and associated documentation files (the "Software"), |
| Anna Bridge |
169:a7c7b631e539 | 6 | * to deal in the Software without restriction, including without limitation |
| Anna Bridge |
169:a7c7b631e539 | 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| Anna Bridge |
169:a7c7b631e539 | 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| Anna Bridge |
169:a7c7b631e539 | 9 | * Software is furnished to do so, subject to the following conditions: |
| Anna Bridge |
169:a7c7b631e539 | 10 | * |
| Anna Bridge |
169:a7c7b631e539 | 11 | * The above copyright notice and this permission notice shall be included |
| Anna Bridge |
169:a7c7b631e539 | 12 | * in all copies or substantial portions of the Software. |
| Anna Bridge |
169:a7c7b631e539 | 13 | * |
| Anna Bridge |
169:a7c7b631e539 | 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
| Anna Bridge |
169:a7c7b631e539 | 15 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
| Anna Bridge |
169:a7c7b631e539 | 16 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
| Anna Bridge |
169:a7c7b631e539 | 17 | * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES |
| Anna Bridge |
169:a7c7b631e539 | 18 | * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
| Anna Bridge |
169:a7c7b631e539 | 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
| Anna Bridge |
169:a7c7b631e539 | 20 | * OTHER DEALINGS IN THE SOFTWARE. |
| Anna Bridge |
169:a7c7b631e539 | 21 | * |
| Anna Bridge |
169:a7c7b631e539 | 22 | * Except as contained in this notice, the name of Maxim Integrated |
| Anna Bridge |
169:a7c7b631e539 | 23 | * Products, Inc. shall not be used except as stated in the Maxim Integrated |
| Anna Bridge |
169:a7c7b631e539 | 24 | * Products, Inc. Branding Policy. |
| Anna Bridge |
169:a7c7b631e539 | 25 | * |
| Anna Bridge |
169:a7c7b631e539 | 26 | * The mere transfer of this software does not imply any licenses |
| Anna Bridge |
169:a7c7b631e539 | 27 | * of trade secrets, proprietary technology, copyrights, patents, |
| Anna Bridge |
169:a7c7b631e539 | 28 | * trademarks, maskwork rights, or any other form of intellectual |
| Anna Bridge |
169:a7c7b631e539 | 29 | * property whatsoever. Maxim Integrated Products, Inc. retains all |
| Anna Bridge |
169:a7c7b631e539 | 30 | * ownership rights. |
| Anna Bridge |
169:a7c7b631e539 | 31 | ******************************************************************************/ |
| Anna Bridge |
169:a7c7b631e539 | 32 | |
| Anna Bridge |
169:a7c7b631e539 | 33 | #ifndef _MXC_UART_REGS_H_ |
| Anna Bridge |
169:a7c7b631e539 | 34 | #define _MXC_UART_REGS_H_ |
| Anna Bridge |
169:a7c7b631e539 | 35 | |
| Anna Bridge |
169:a7c7b631e539 | 36 | #ifdef __cplusplus |
| Anna Bridge |
169:a7c7b631e539 | 37 | extern "C" { |
| Anna Bridge |
169:a7c7b631e539 | 38 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 39 | |
| Anna Bridge |
169:a7c7b631e539 | 40 | #include <stdint.h> |
| Anna Bridge |
169:a7c7b631e539 | 41 | #include "mxc_device.h" |
| Anna Bridge |
169:a7c7b631e539 | 42 | |
| Anna Bridge |
169:a7c7b631e539 | 43 | /* |
| Anna Bridge |
169:a7c7b631e539 | 44 | If types are not defined elsewhere (CMSIS) define them here |
| Anna Bridge |
169:a7c7b631e539 | 45 | */ |
| Anna Bridge |
169:a7c7b631e539 | 46 | #ifndef __IO |
| Anna Bridge |
169:a7c7b631e539 | 47 | #define __IO volatile |
| Anna Bridge |
169:a7c7b631e539 | 48 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 49 | #ifndef __I |
| Anna Bridge |
169:a7c7b631e539 | 50 | #define __I volatile const |
| Anna Bridge |
169:a7c7b631e539 | 51 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 52 | #ifndef __O |
| Anna Bridge |
169:a7c7b631e539 | 53 | #define __O volatile |
| Anna Bridge |
169:a7c7b631e539 | 54 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 55 | |
| Anna Bridge |
169:a7c7b631e539 | 56 | |
| Anna Bridge |
169:a7c7b631e539 | 57 | /* |
| Anna Bridge |
169:a7c7b631e539 | 58 | Typedefed structure(s) for module registers (per instance or section) with direct 32-bit |
| Anna Bridge |
169:a7c7b631e539 | 59 | access to each register in module. |
| Anna Bridge |
169:a7c7b631e539 | 60 | */ |
| Anna Bridge |
169:a7c7b631e539 | 61 | |
| Anna Bridge |
169:a7c7b631e539 | 62 | /* Offset Register Description |
| Anna Bridge |
169:a7c7b631e539 | 63 | ============= ============================================================================ */ |
| Anna Bridge |
169:a7c7b631e539 | 64 | typedef struct { |
| Anna Bridge |
169:a7c7b631e539 | 65 | __IO uint32_t ctrl; /* 0x0000 UART Control Register */ |
| Anna Bridge |
169:a7c7b631e539 | 66 | __IO uint32_t baud; /* 0x0004 UART Baud Control Register */ |
| Anna Bridge |
169:a7c7b631e539 | 67 | __IO uint32_t tx_fifo_ctrl; /* 0x0008 UART TX FIFO Control Register */ |
| Anna Bridge |
169:a7c7b631e539 | 68 | __IO uint32_t rx_fifo_ctrl; /* 0x000C UART RX FIFO Control Register */ |
| Anna Bridge |
169:a7c7b631e539 | 69 | __IO uint32_t md_ctrl; /* 0x0010 UART Multidrop Control Register */ |
| Anna Bridge |
169:a7c7b631e539 | 70 | __IO uint32_t intfl; /* 0x0014 UART Interrupt Flags */ |
| Anna Bridge |
169:a7c7b631e539 | 71 | __IO uint32_t inten; /* 0x0018 UART Interrupt Enable/Disable Controls */ |
| Anna Bridge |
169:a7c7b631e539 | 72 | #if (MXC_UART_REV > 0) |
| Anna Bridge |
169:a7c7b631e539 | 73 | __I uint32_t idle; /* 0x001C UART Idle Status */ |
| Anna Bridge |
169:a7c7b631e539 | 74 | #endif |
| Anna Bridge |
169:a7c7b631e539 | 75 | } mxc_uart_regs_t; |
| Anna Bridge |
169:a7c7b631e539 | 76 | |
| Anna Bridge |
169:a7c7b631e539 | 77 | |
| Anna Bridge |
169:a7c7b631e539 | 78 | /* Offset Register Description |
| Anna Bridge |
169:a7c7b631e539 | 79 | ============= ============================================================================ */ |
| Anna Bridge |
169:a7c7b631e539 | 80 | typedef struct { |
| Anna Bridge |
169:a7c7b631e539 | 81 | union { /* 0x0000-0x07FC FIFO Write Point for Data to Transmit */ |
| Anna Bridge |
169:a7c7b631e539 | 82 | __IO uint8_t tx; |
| Anna Bridge |
169:a7c7b631e539 | 83 | __IO uint8_t tx_8[2048]; |
| Anna Bridge |
169:a7c7b631e539 | 84 | __IO uint16_t tx_16[1024]; |
| Anna Bridge |
169:a7c7b631e539 | 85 | __IO uint32_t tx_32[512]; |
| Anna Bridge |
169:a7c7b631e539 | 86 | }; |
| Anna Bridge |
169:a7c7b631e539 | 87 | union { /* 0x0800-0x0FFC FIFO Read Point for Received Data */ |
| Anna Bridge |
169:a7c7b631e539 | 88 | __IO uint8_t rx; |
| Anna Bridge |
169:a7c7b631e539 | 89 | __IO uint8_t rx_8[2048]; |
| Anna Bridge |
169:a7c7b631e539 | 90 | __IO uint16_t rx_16[1024]; |
| Anna Bridge |
169:a7c7b631e539 | 91 | __IO uint32_t rx_32[512]; |
| Anna Bridge |
169:a7c7b631e539 | 92 | }; |
| Anna Bridge |
169:a7c7b631e539 | 93 | } mxc_uart_fifo_regs_t; |
| Anna Bridge |
169:a7c7b631e539 | 94 | |
| Anna Bridge |
169:a7c7b631e539 | 95 | |
| Anna Bridge |
169:a7c7b631e539 | 96 | /* |
| Anna Bridge |
169:a7c7b631e539 | 97 | Register offsets for module UART. |
| Anna Bridge |
169:a7c7b631e539 | 98 | */ |
| Anna Bridge |
169:a7c7b631e539 | 99 | |
| Anna Bridge |
169:a7c7b631e539 | 100 | #define MXC_R_UART_OFFS_CTRL ((uint32_t)0x00000000UL) |
| Anna Bridge |
169:a7c7b631e539 | 101 | #define MXC_R_UART_OFFS_BAUD ((uint32_t)0x00000004UL) |
| Anna Bridge |
169:a7c7b631e539 | 102 | #define MXC_R_UART_OFFS_TX_FIFO_CTRL ((uint32_t)0x00000008UL) |
| Anna Bridge |
169:a7c7b631e539 | 103 | #define MXC_R_UART_OFFS_RX_FIFO_CTRL ((uint32_t)0x0000000CUL) |
| Anna Bridge |
169:a7c7b631e539 | 104 | #define MXC_R_UART_OFFS_MD_CTRL ((uint32_t)0x00000010UL) |
| Anna Bridge |
169:a7c7b631e539 | 105 | #define MXC_R_UART_OFFS_INTFL ((uint32_t)0x00000014UL) |
| Anna Bridge |
169:a7c7b631e539 | 106 | #define MXC_R_UART_OFFS_INTEN ((uint32_t)0x00000018UL) |
| Anna Bridge |
169:a7c7b631e539 | 107 | #define MXC_R_UART_FIFO_OFFS_TX ((uint32_t)0x00000000UL) |
| Anna Bridge |
169:a7c7b631e539 | 108 | #define MXC_R_UART_FIFO_OFFS_RX ((uint32_t)0x00000800UL) |
| Anna Bridge |
169:a7c7b631e539 | 109 | |
| Anna Bridge |
169:a7c7b631e539 | 110 | |
| Anna Bridge |
169:a7c7b631e539 | 111 | /* |
| Anna Bridge |
169:a7c7b631e539 | 112 | Field positions and masks for module UART. |
| Anna Bridge |
169:a7c7b631e539 | 113 | */ |
| Anna Bridge |
169:a7c7b631e539 | 114 | |
| Anna Bridge |
169:a7c7b631e539 | 115 | #define MXC_F_UART_CTRL_UART_EN_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 116 | #define MXC_F_UART_CTRL_UART_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_UART_EN_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 117 | #define MXC_F_UART_CTRL_RX_FIFO_EN_POS 1 |
| Anna Bridge |
169:a7c7b631e539 | 118 | #define MXC_F_UART_CTRL_RX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RX_FIFO_EN_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 119 | #define MXC_F_UART_CTRL_TX_FIFO_EN_POS 2 |
| Anna Bridge |
169:a7c7b631e539 | 120 | #define MXC_F_UART_CTRL_TX_FIFO_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_TX_FIFO_EN_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 121 | #define MXC_F_UART_CTRL_DATA_SIZE_POS 4 |
| Anna Bridge |
169:a7c7b631e539 | 122 | #define MXC_F_UART_CTRL_DATA_SIZE ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_DATA_SIZE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 123 | #define MXC_F_UART_CTRL_EXTRA_STOP_POS 8 |
| Anna Bridge |
169:a7c7b631e539 | 124 | #define MXC_F_UART_CTRL_EXTRA_STOP ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_EXTRA_STOP_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 125 | #define MXC_F_UART_CTRL_PARITY_POS 12 |
| Anna Bridge |
169:a7c7b631e539 | 126 | #define MXC_F_UART_CTRL_PARITY ((uint32_t)(0x00000003UL << MXC_F_UART_CTRL_PARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 127 | #define MXC_F_UART_CTRL_CTS_EN_POS 16 |
| Anna Bridge |
169:a7c7b631e539 | 128 | #define MXC_F_UART_CTRL_CTS_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_EN_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 129 | #define MXC_F_UART_CTRL_CTS_POLARITY_POS 17 |
| Anna Bridge |
169:a7c7b631e539 | 130 | #define MXC_F_UART_CTRL_CTS_POLARITY ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_CTS_POLARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 131 | #define MXC_F_UART_CTRL_RTS_EN_POS 18 |
| Anna Bridge |
169:a7c7b631e539 | 132 | #define MXC_F_UART_CTRL_RTS_EN ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_EN_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 133 | #define MXC_F_UART_CTRL_RTS_POLARITY_POS 19 |
| Anna Bridge |
169:a7c7b631e539 | 134 | #define MXC_F_UART_CTRL_RTS_POLARITY ((uint32_t)(0x00000001UL << MXC_F_UART_CTRL_RTS_POLARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 135 | #define MXC_F_UART_CTRL_RTS_LEVEL_POS 20 |
| Anna Bridge |
169:a7c7b631e539 | 136 | #define MXC_F_UART_CTRL_RTS_LEVEL ((uint32_t)(0x0000003FUL << MXC_F_UART_CTRL_RTS_LEVEL_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 137 | |
| Anna Bridge |
169:a7c7b631e539 | 138 | #define MXC_F_UART_BAUD_BAUD_DIVISOR_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 139 | #define MXC_F_UART_BAUD_BAUD_DIVISOR ((uint32_t)(0x000000FFUL << MXC_F_UART_BAUD_BAUD_DIVISOR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 140 | #define MXC_F_UART_BAUD_BAUD_MODE_POS 8 |
| Anna Bridge |
169:a7c7b631e539 | 141 | #define MXC_F_UART_BAUD_BAUD_MODE ((uint32_t)(0x00000003UL << MXC_F_UART_BAUD_BAUD_MODE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 142 | |
| Anna Bridge |
169:a7c7b631e539 | 143 | #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 144 | #define MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY ((uint32_t)(0x0000003FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_ENTRY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 145 | #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS 16 |
| Anna Bridge |
169:a7c7b631e539 | 146 | #define MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL ((uint32_t)(0x0000001FUL << MXC_F_UART_TX_FIFO_CTRL_FIFO_AE_LVL_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 147 | |
| Anna Bridge |
169:a7c7b631e539 | 148 | #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 149 | #define MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY ((uint32_t)(0x0000003FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_ENTRY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 150 | #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS 16 |
| Anna Bridge |
169:a7c7b631e539 | 151 | #define MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL ((uint32_t)(0x0000001FUL << MXC_F_UART_RX_FIFO_CTRL_FIFO_AF_LVL_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 152 | |
| Anna Bridge |
169:a7c7b631e539 | 153 | #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 154 | #define MXC_F_UART_MD_CTRL_SLAVE_ADDR ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 155 | #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS 8 |
| Anna Bridge |
169:a7c7b631e539 | 156 | #define MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK ((uint32_t)(0x000000FFUL << MXC_F_UART_MD_CTRL_SLAVE_ADDR_MSK_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 157 | #define MXC_F_UART_MD_CTRL_MD_MSTR_POS 16 |
| Anna Bridge |
169:a7c7b631e539 | 158 | #define MXC_F_UART_MD_CTRL_MD_MSTR ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_MD_MSTR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 159 | #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS 17 |
| Anna Bridge |
169:a7c7b631e539 | 160 | #define MXC_F_UART_MD_CTRL_TX_ADDR_MARK ((uint32_t)(0x00000001UL << MXC_F_UART_MD_CTRL_TX_ADDR_MARK_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 161 | |
| Anna Bridge |
169:a7c7b631e539 | 162 | #define MXC_F_UART_INTFL_TX_DONE_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 163 | #define MXC_F_UART_INTFL_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_DONE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 164 | #define MXC_F_UART_INTFL_TX_UNSTALLED_POS 1 |
| Anna Bridge |
169:a7c7b631e539 | 165 | #define MXC_F_UART_INTFL_TX_UNSTALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_UNSTALLED_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 166 | #define MXC_F_UART_INTFL_TX_FIFO_AE_POS 2 |
| Anna Bridge |
169:a7c7b631e539 | 167 | #define MXC_F_UART_INTFL_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_TX_FIFO_AE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 168 | #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS 3 |
| Anna Bridge |
169:a7c7b631e539 | 169 | #define MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_NOT_EMPTY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 170 | #define MXC_F_UART_INTFL_RX_STALLED_POS 4 |
| Anna Bridge |
169:a7c7b631e539 | 171 | #define MXC_F_UART_INTFL_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_STALLED_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 172 | #define MXC_F_UART_INTFL_RX_FIFO_AF_POS 5 |
| Anna Bridge |
169:a7c7b631e539 | 173 | #define MXC_F_UART_INTFL_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_AF_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 174 | #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS 6 |
| Anna Bridge |
169:a7c7b631e539 | 175 | #define MXC_F_UART_INTFL_RX_FIFO_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FIFO_OVERFLOW_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 176 | #define MXC_F_UART_INTFL_RX_FRAMING_ERR_POS 7 |
| Anna Bridge |
169:a7c7b631e539 | 177 | #define MXC_F_UART_INTFL_RX_FRAMING_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_FRAMING_ERR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 178 | #define MXC_F_UART_INTFL_RX_PARITY_ERR_POS 8 |
| Anna Bridge |
169:a7c7b631e539 | 179 | #define MXC_F_UART_INTFL_RX_PARITY_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTFL_RX_PARITY_ERR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 180 | |
| Anna Bridge |
169:a7c7b631e539 | 181 | #define MXC_F_UART_INTEN_TX_DONE_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 182 | #define MXC_F_UART_INTEN_TX_DONE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_DONE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 183 | #define MXC_F_UART_INTEN_TX_UNSTALLED_POS 1 |
| Anna Bridge |
169:a7c7b631e539 | 184 | #define MXC_F_UART_INTEN_TX_UNSTALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_UNSTALLED_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 185 | #define MXC_F_UART_INTEN_TX_FIFO_AE_POS 2 |
| Anna Bridge |
169:a7c7b631e539 | 186 | #define MXC_F_UART_INTEN_TX_FIFO_AE ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_TX_FIFO_AE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 187 | #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS 3 |
| Anna Bridge |
169:a7c7b631e539 | 188 | #define MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_NOT_EMPTY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 189 | #define MXC_F_UART_INTEN_RX_STALLED_POS 4 |
| Anna Bridge |
169:a7c7b631e539 | 190 | #define MXC_F_UART_INTEN_RX_STALLED ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_STALLED_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 191 | #define MXC_F_UART_INTEN_RX_FIFO_AF_POS 5 |
| Anna Bridge |
169:a7c7b631e539 | 192 | #define MXC_F_UART_INTEN_RX_FIFO_AF ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_AF_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 193 | #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS 6 |
| Anna Bridge |
169:a7c7b631e539 | 194 | #define MXC_F_UART_INTEN_RX_FIFO_OVERFLOW ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FIFO_OVERFLOW_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 195 | #define MXC_F_UART_INTEN_RX_FRAMING_ERR_POS 7 |
| Anna Bridge |
169:a7c7b631e539 | 196 | #define MXC_F_UART_INTEN_RX_FRAMING_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_FRAMING_ERR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 197 | #define MXC_F_UART_INTEN_RX_PARITY_ERR_POS 8 |
| Anna Bridge |
169:a7c7b631e539 | 198 | #define MXC_F_UART_INTEN_RX_PARITY_ERR ((uint32_t)(0x00000001UL << MXC_F_UART_INTEN_RX_PARITY_ERR_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 199 | |
| Anna Bridge |
169:a7c7b631e539 | 200 | #if (MXC_UART_REV > 0) |
| Anna Bridge |
169:a7c7b631e539 | 201 | #define MXC_F_UART_IDLE_TX_RX_IDLE_POS 0 |
| Anna Bridge |
169:a7c7b631e539 | 202 | #define MXC_F_UART_IDLE_TX_RX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_RX_IDLE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 203 | #define MXC_F_UART_IDLE_TX_IDLE_POS 1 |
| Anna Bridge |
169:a7c7b631e539 | 204 | #define MXC_F_UART_IDLE_TX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_TX_IDLE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 205 | #define MXC_F_UART_IDLE_RX_IDLE_POS 2 |
| Anna Bridge |
169:a7c7b631e539 | 206 | #define MXC_F_UART_IDLE_RX_IDLE ((uint32_t)(0x00000001UL << MXC_F_UART_IDLE_RX_IDLE_POS)) |
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169:a7c7b631e539 | 207 | #endif |
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169:a7c7b631e539 | 208 | |
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169:a7c7b631e539 | 209 | /* |
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169:a7c7b631e539 | 210 | Field values and shifted values for module UART. |
| Anna Bridge |
169:a7c7b631e539 | 211 | */ |
| Anna Bridge |
169:a7c7b631e539 | 212 | |
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169:a7c7b631e539 | 213 | #define MXC_V_UART_CTRL_DATA_SIZE_5_BITS ((uint32_t)(0x00000000UL)) |
| Anna Bridge |
169:a7c7b631e539 | 214 | #define MXC_V_UART_CTRL_DATA_SIZE_6_BITS ((uint32_t)(0x00000001UL)) |
| Anna Bridge |
169:a7c7b631e539 | 215 | #define MXC_V_UART_CTRL_DATA_SIZE_7_BITS ((uint32_t)(0x00000002UL)) |
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169:a7c7b631e539 | 216 | #define MXC_V_UART_CTRL_DATA_SIZE_8_BITS ((uint32_t)(0x00000003UL)) |
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169:a7c7b631e539 | 217 | |
| Anna Bridge |
169:a7c7b631e539 | 218 | #define MXC_S_UART_CTRL_DATA_SIZE_5_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_5_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 219 | #define MXC_S_UART_CTRL_DATA_SIZE_6_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_6_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 220 | #define MXC_S_UART_CTRL_DATA_SIZE_7_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_7_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 221 | #define MXC_S_UART_CTRL_DATA_SIZE_8_BITS ((uint32_t)(MXC_V_UART_CTRL_DATA_SIZE_8_BITS << MXC_F_UART_CTRL_DATA_SIZE_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 222 | |
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169:a7c7b631e539 | 223 | #define MXC_V_UART_CTRL_PARITY_DISABLE ((uint32_t)(0x00000000UL)) |
| Anna Bridge |
169:a7c7b631e539 | 224 | #define MXC_V_UART_CTRL_PARITY_ODD ((uint32_t)(0x00000001UL)) |
| Anna Bridge |
169:a7c7b631e539 | 225 | #define MXC_V_UART_CTRL_PARITY_EVEN ((uint32_t)(0x00000002UL)) |
| Anna Bridge |
169:a7c7b631e539 | 226 | #define MXC_V_UART_CTRL_PARITY_MARK ((uint32_t)(0x00000003UL)) |
| Anna Bridge |
169:a7c7b631e539 | 227 | |
| Anna Bridge |
169:a7c7b631e539 | 228 | #define MXC_S_UART_CTRL_PARITY_DISABLE ((uint32_t)(MXC_V_UART_CTRL_PARITY_DISABLE << MXC_F_UART_CTRL_PARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 229 | #define MXC_S_UART_CTRL_PARITY_ODD ((uint32_t)(MXC_V_UART_CTRL_PARITY_ODD << MXC_F_UART_CTRL_PARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 230 | #define MXC_S_UART_CTRL_PARITY_EVEN ((uint32_t)(MXC_V_UART_CTRL_PARITY_EVEN << MXC_F_UART_CTRL_PARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 231 | #define MXC_S_UART_CTRL_PARITY_MARK ((uint32_t)(MXC_V_UART_CTRL_PARITY_MARK << MXC_F_UART_CTRL_PARITY_POS)) |
| Anna Bridge |
169:a7c7b631e539 | 232 | |
| Anna Bridge |
169:a7c7b631e539 | 233 | |
| Anna Bridge |
169:a7c7b631e539 | 234 | |
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169:a7c7b631e539 | 235 | #ifdef __cplusplus |
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169:a7c7b631e539 | 236 | } |
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169:a7c7b631e539 | 237 | #endif |
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169:a7c7b631e539 | 238 | |
| Anna Bridge |
169:a7c7b631e539 | 239 | #endif /* _MXC_UART_REGS_H_ */ |
| Anna Bridge |
169:a7c7b631e539 | 240 |
