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mbed 2

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TARGET_LPC546XX/TOOLCHAIN_ARM_STD/fsl_emc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * The Clear BSD License
AnnaBridge 171:3a7713b1edbc 3 * Copyright (c) 2016, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 4 * Copyright 2016-2017 NXP
AnnaBridge 171:3a7713b1edbc 5 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 6 *
AnnaBridge 171:3a7713b1edbc 7 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 8 * are permitted (subject to the limitations in the disclaimer below) provided
AnnaBridge 171:3a7713b1edbc 9 * that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 12 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 15 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 16 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 17 *
AnnaBridge 171:3a7713b1edbc 18 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 19 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 20 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 21 *
AnnaBridge 171:3a7713b1edbc 22 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
AnnaBridge 171:3a7713b1edbc 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 26 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 27 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 30 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 33 */
AnnaBridge 171:3a7713b1edbc 34 #ifndef _FSL_EMC_H_
AnnaBridge 171:3a7713b1edbc 35 #define _FSL_EMC_H_
AnnaBridge 171:3a7713b1edbc 36
AnnaBridge 171:3a7713b1edbc 37 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 38
AnnaBridge 171:3a7713b1edbc 39 /*!
AnnaBridge 171:3a7713b1edbc 40 * @addtogroup emc
AnnaBridge 171:3a7713b1edbc 41 * @{
AnnaBridge 171:3a7713b1edbc 42 */
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44
AnnaBridge 171:3a7713b1edbc 45 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 46 * Definitions
AnnaBridge 171:3a7713b1edbc 47 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 50 /*@{*/
AnnaBridge 171:3a7713b1edbc 51 /*! @brief EMC driver version 2.0.0. */
AnnaBridge 171:3a7713b1edbc 52 #define FSL_EMC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
AnnaBridge 171:3a7713b1edbc 53 /*@}*/
AnnaBridge 171:3a7713b1edbc 54
AnnaBridge 171:3a7713b1edbc 55 /*! @brief Define the chip numbers for dynamic and static memory devices. */
AnnaBridge 171:3a7713b1edbc 56 #define EMC_STATIC_MEMDEV_NUM (4U)
AnnaBridge 171:3a7713b1edbc 57 #define EMC_DYNAMIC_MEMDEV_NUM (4U)
AnnaBridge 171:3a7713b1edbc 58 #define EMC_ADDRMAP_SHIFT EMC_DYNAMIC_DYNAMICCONFIG_AM0_SHIFT
AnnaBridge 171:3a7713b1edbc 59 #define EMC_ADDRMAP_MASK (EMC_DYNAMIC_DYNAMICCONFIG_AM0_MASK |EMC_DYNAMIC_DYNAMICCONFIG_AM1_MASK)
AnnaBridge 171:3a7713b1edbc 60 #define EMC_ADDRMAP(x) (((uint32_t)(((uint32_t)(x)) << EMC_ADDRMAP_SHIFT)) & EMC_ADDRMAP_MASK)
AnnaBridge 171:3a7713b1edbc 61 #define EMC_HZ_ONEMHZ (1000000U)
AnnaBridge 171:3a7713b1edbc 62 #define EMC_MILLISECS_ONESEC (1000U)
AnnaBridge 171:3a7713b1edbc 63 #define EMC_SDRAM_MODE_CL_SHIFT (4U)
AnnaBridge 171:3a7713b1edbc 64 #define EMC_SDRAM_MODE_CL_MASK (0x70U)
AnnaBridge 171:3a7713b1edbc 65
AnnaBridge 171:3a7713b1edbc 66 /*!
AnnaBridge 171:3a7713b1edbc 67 * @brief Define EMC memory width for static memory device.
AnnaBridge 171:3a7713b1edbc 68 */
AnnaBridge 171:3a7713b1edbc 69 typedef enum _emc_static_memwidth
AnnaBridge 171:3a7713b1edbc 70 {
AnnaBridge 171:3a7713b1edbc 71 kEMC_8BitWidth = 0x0U, /*!< 8 bit memory width. */
AnnaBridge 171:3a7713b1edbc 72 kEMC_16BitWidth, /*!< 16 bit memory width. */
AnnaBridge 171:3a7713b1edbc 73 kEMC_32BitWidth /*!< 32 bit memory width. */
AnnaBridge 171:3a7713b1edbc 74 } emc_static_memwidth_t;
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 /*!
AnnaBridge 171:3a7713b1edbc 77 * @brief Define EMC static configuration.
AnnaBridge 171:3a7713b1edbc 78 */
AnnaBridge 171:3a7713b1edbc 79 typedef enum _emc_static_special_config
AnnaBridge 171:3a7713b1edbc 80 {
AnnaBridge 171:3a7713b1edbc 81 kEMC_AsynchronosPageEnable = 0x0008U,/*!< Enable the asynchronous page mode. page length four. */
AnnaBridge 171:3a7713b1edbc 82 kEMC_ActiveHighChipSelect = 0x0040U, /*!< Chip select active high. */
AnnaBridge 171:3a7713b1edbc 83 kEMC_ByteLaneStateAllLow = 0x0080U, /*!< Reads/writes the respective valuie bits in BLS3:0 are low. */
AnnaBridge 171:3a7713b1edbc 84 kEMC_ExtWaitEnable = 0x0100U, /*!< Extended wait enable. */
AnnaBridge 171:3a7713b1edbc 85 kEMC_BufferEnable = 0x80000U /*!< Buffer enable. */
AnnaBridge 171:3a7713b1edbc 86 } emc_static_special_config_t;
AnnaBridge 171:3a7713b1edbc 87
AnnaBridge 171:3a7713b1edbc 88 /*! @brief EMC dynamic memory device. */
AnnaBridge 171:3a7713b1edbc 89 typedef enum _emc_dynamic_device
AnnaBridge 171:3a7713b1edbc 90 {
AnnaBridge 171:3a7713b1edbc 91 kEMC_Sdram = 0x0U, /*!< Dynamic memory device: SDRAM. */
AnnaBridge 171:3a7713b1edbc 92 kEMC_Lpsdram, /*!< Dynamic memory device: Low-power SDRAM. */
AnnaBridge 171:3a7713b1edbc 93 } emc_dynamic_device_t;
AnnaBridge 171:3a7713b1edbc 94
AnnaBridge 171:3a7713b1edbc 95 /*! @brief EMC dynamic read strategy. */
AnnaBridge 171:3a7713b1edbc 96 typedef enum _emc_dynamic_read
AnnaBridge 171:3a7713b1edbc 97 {
AnnaBridge 171:3a7713b1edbc 98 kEMC_NoDelay = 0x0U, /*!< No delay. */
AnnaBridge 171:3a7713b1edbc 99 kEMC_Cmddelay, /*!< Command delayed strategy, using EMCCLKDELAY. */
AnnaBridge 171:3a7713b1edbc 100 kEMC_CmdDelayPulseOneclk, /*!< Command delayed strategy pluse one clock cycle using EMCCLKDELAY. */
AnnaBridge 171:3a7713b1edbc 101 kEMC_CmddelayPulsetwoclk, /*!< Command delayed strategy pulse two clock cycle using EMCCLKDELAY. */
AnnaBridge 171:3a7713b1edbc 102 } emc_dynamic_read_t;
AnnaBridge 171:3a7713b1edbc 103
AnnaBridge 171:3a7713b1edbc 104 /*! @brief EMC endian mode. */
AnnaBridge 171:3a7713b1edbc 105 typedef enum _emc_endian_mode
AnnaBridge 171:3a7713b1edbc 106 {
AnnaBridge 171:3a7713b1edbc 107 kEMC_LittleEndian = 0x0U, /*!< Little endian mode. */
AnnaBridge 171:3a7713b1edbc 108 kEMC_BigEndian, /*!< Big endian mode. */
AnnaBridge 171:3a7713b1edbc 109 } emc_endian_mode_t;
AnnaBridge 171:3a7713b1edbc 110
AnnaBridge 171:3a7713b1edbc 111 /*! @brief EMC Feedback clock input source select. */
AnnaBridge 171:3a7713b1edbc 112 typedef enum _emc_fbclk_src
AnnaBridge 171:3a7713b1edbc 113 {
AnnaBridge 171:3a7713b1edbc 114 kEMC_IntloopbackEmcclk = 0U, /*!< Use the internal loop back from EMC_CLK output. */
AnnaBridge 171:3a7713b1edbc 115 kEMC_EMCFbclkInput /*!< Use the external EMC_FBCLK input. */
AnnaBridge 171:3a7713b1edbc 116 } emc_fbclk_src_t;
AnnaBridge 171:3a7713b1edbc 117
AnnaBridge 171:3a7713b1edbc 118 /*! @brief EMC dynamic timing/delay configure structure. */
AnnaBridge 171:3a7713b1edbc 119 typedef struct _emc_dynamic_timing_config
AnnaBridge 171:3a7713b1edbc 120 {
AnnaBridge 171:3a7713b1edbc 121 emc_dynamic_read_t readConfig; /* Dynamic read strategy. */
AnnaBridge 171:3a7713b1edbc 122 uint32_t refreshPeriod_Nanosec; /*!< The refresh period in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 123 uint32_t tRp_Ns; /*!< Precharge command period in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 124 uint32_t tRas_Ns; /*!< Active to precharge command period in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 125 uint32_t tSrex_Ns; /*!< Self-refresh exit time in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 126 uint32_t tApr_Ns; /*!< Last data out to active command time in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 127 uint32_t tDal_Ns; /*!< Data-in to active command in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 128 uint32_t tWr_Ns; /*!< Write recovery time in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 129 uint32_t tRc_Ns; /*!< Active to active command period in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 130 uint32_t tRfc_Ns; /*!< Auto-refresh period and auto-refresh to active command period in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 131 uint32_t tXsr_Ns; /*!< Exit self-refresh to active command time in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 132 uint32_t tRrd_Ns; /*!< Active bank A to active bank B latency in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 133 uint8_t tMrd_Nclk; /*!< Load mode register to active command time in unit of EMCCLK cycles.*/
AnnaBridge 171:3a7713b1edbc 134 } emc_dynamic_timing_config_t;
AnnaBridge 171:3a7713b1edbc 135
AnnaBridge 171:3a7713b1edbc 136 /*!
AnnaBridge 171:3a7713b1edbc 137 * @brief EMC dynamic memory controller independent chip configuration structure.
AnnaBridge 171:3a7713b1edbc 138 * Please take refer to the address mapping table in the RM in EMC chapter when you
AnnaBridge 171:3a7713b1edbc 139 * set the "devAddrMap". Choose the right Bit 14 Bit12 ~ Bit 7 group in the table
AnnaBridge 171:3a7713b1edbc 140 * according to the bus width/banks/row/colum length for you device.
AnnaBridge 171:3a7713b1edbc 141 * Set devAddrMap with the value make up with the seven bits (bit14 bit12 ~ bit 7)
AnnaBridge 171:3a7713b1edbc 142 * and inset the bit 13 with 0.
AnnaBridge 171:3a7713b1edbc 143 * for example, if the bit 14 and bit12 ~ bit7 is 1000001 is choosen according to the
AnnaBridge 171:3a7713b1edbc 144 * 32bit high-performance bus width with 2 banks, 11 row lwngth, 8 column length.
AnnaBridge 171:3a7713b1edbc 145 * Set devAddrMap with 0x81.
AnnaBridge 171:3a7713b1edbc 146 */
AnnaBridge 171:3a7713b1edbc 147 typedef struct _emc_dynamic_chip_config
AnnaBridge 171:3a7713b1edbc 148 {
AnnaBridge 171:3a7713b1edbc 149 uint8_t chipIndex; /*!< Chip Index, range from 0 ~ EMC_DYNAMIC_MEMDEV_NUM - 1. */
AnnaBridge 171:3a7713b1edbc 150 emc_dynamic_device_t dynamicDevice; /*!< All chips shall use the same device setting. mixed use are not supported. */
AnnaBridge 171:3a7713b1edbc 151 uint8_t rAS_Nclk; /*!< Active to read/write delay tRCD. */
AnnaBridge 171:3a7713b1edbc 152 uint16_t sdramModeReg; /*!< Sdram mode register setting. */
AnnaBridge 171:3a7713b1edbc 153 uint16_t sdramExtModeReg; /*!< Used for low-power sdram device. The extended mode register. */
AnnaBridge 171:3a7713b1edbc 154 uint8_t devAddrMap; /*!< dynamic device address mapping, choose the address mapping for your specific device. */
AnnaBridge 171:3a7713b1edbc 155 } emc_dynamic_chip_config_t;
AnnaBridge 171:3a7713b1edbc 156
AnnaBridge 171:3a7713b1edbc 157 /*!
AnnaBridge 171:3a7713b1edbc 158 * @brief EMC static memory controller independent chip configuration structure.
AnnaBridge 171:3a7713b1edbc 159 */
AnnaBridge 171:3a7713b1edbc 160 typedef struct _emc_static_chip_config
AnnaBridge 171:3a7713b1edbc 161 {
AnnaBridge 171:3a7713b1edbc 162 uint8_t chipIndex;
AnnaBridge 171:3a7713b1edbc 163 emc_static_memwidth_t memWidth; /*!< Memory width. */
AnnaBridge 171:3a7713b1edbc 164 uint32_t specailConfig; /*!< Static configuration,a logical OR of "emc_static_special_config_t". */
AnnaBridge 171:3a7713b1edbc 165 uint32_t tWaitWriteEn_Ns;/*!< The delay form chip select to write enable in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 166 uint32_t tWaitOutEn_Ns; /*!< The delay from chip selcet to output enable in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 167 uint32_t tWaitReadNoPage_Ns;/*!< In No-page mode, the delay from chip select to read access in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 168 uint32_t tWaitReadPage_Ns; /*!< In page mode, the read after the first read wait states in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 169 uint32_t tWaitWrite_Ns; /*!< The delay from chip select to write access in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 170 uint32_t tWaitTurn_Ns; /*!< The Bus turn-around time in unit of nanosecond. */
AnnaBridge 171:3a7713b1edbc 171 } emc_static_chip_config_t;
AnnaBridge 171:3a7713b1edbc 172
AnnaBridge 171:3a7713b1edbc 173 /*!
AnnaBridge 171:3a7713b1edbc 174 * @brief EMC module basic configuration structure.
AnnaBridge 171:3a7713b1edbc 175 *
AnnaBridge 171:3a7713b1edbc 176 * Defines the static memory controller configure structure and
AnnaBridge 171:3a7713b1edbc 177 * uses the EMC_Init() function to make necessary initializations.
AnnaBridge 171:3a7713b1edbc 178 *
AnnaBridge 171:3a7713b1edbc 179 */
AnnaBridge 171:3a7713b1edbc 180 typedef struct _emc_basic_config
AnnaBridge 171:3a7713b1edbc 181 {
AnnaBridge 171:3a7713b1edbc 182 emc_endian_mode_t endian; /*!< Endian mode . */
AnnaBridge 171:3a7713b1edbc 183 emc_fbclk_src_t fbClkSrc; /*!< The feedback clock source. */
AnnaBridge 171:3a7713b1edbc 184 uint8_t emcClkDiv; /*!< EMC_CLK = AHB_CLK / (emc_clkDiv + 1). */
AnnaBridge 171:3a7713b1edbc 185 } emc_basic_config_t;
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 188 * API
AnnaBridge 171:3a7713b1edbc 189 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 190
AnnaBridge 171:3a7713b1edbc 191 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 192 extern "C" {
AnnaBridge 171:3a7713b1edbc 193 #endif
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 /*!
AnnaBridge 171:3a7713b1edbc 196 * @name EMC Initialize and de-initialize opeartion
AnnaBridge 171:3a7713b1edbc 197 * @{
AnnaBridge 171:3a7713b1edbc 198 */
AnnaBridge 171:3a7713b1edbc 199 /*!
AnnaBridge 171:3a7713b1edbc 200 * @brief Initializes the basic for EMC.
AnnaBridge 171:3a7713b1edbc 201 * This function ungates the EMC clock, initializes the emc system configure
AnnaBridge 171:3a7713b1edbc 202 * and enable the EMC module. This function must be called in the first step to initialize
AnnaBridge 171:3a7713b1edbc 203 * the external memory.
AnnaBridge 171:3a7713b1edbc 204 *
AnnaBridge 171:3a7713b1edbc 205 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 206 * @param config The EMC basic configuration.
AnnaBridge 171:3a7713b1edbc 207 */
AnnaBridge 171:3a7713b1edbc 208 void EMC_Init(EMC_Type *base, emc_basic_config_t *config);
AnnaBridge 171:3a7713b1edbc 209
AnnaBridge 171:3a7713b1edbc 210 /*!
AnnaBridge 171:3a7713b1edbc 211 * @brief Initializes the dynamic memory controller.
AnnaBridge 171:3a7713b1edbc 212 * This function initializes the dynamic memory controller in external memory controller.
AnnaBridge 171:3a7713b1edbc 213 * This function must be called after EMC_Init and before accessing the external dynamic memory.
AnnaBridge 171:3a7713b1edbc 214 *
AnnaBridge 171:3a7713b1edbc 215 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 216 * @param timing The timing and latency for dynamica memory controller setting. It shall
AnnaBridge 171:3a7713b1edbc 217 * be used for all dynamica memory chips, threfore the worst timing value for all
AnnaBridge 171:3a7713b1edbc 218 * used chips must be given.
AnnaBridge 171:3a7713b1edbc 219 * @param configure The EMC dynamic memory controller chip independent configuration pointer.
AnnaBridge 171:3a7713b1edbc 220 * This configuration pointer is actually pointer to a configration array. the array number
AnnaBridge 171:3a7713b1edbc 221 * depends on the "totalChips".
AnnaBridge 171:3a7713b1edbc 222 * @param totalChips The total dynamic memory chip numbers been used or the length of the
AnnaBridge 171:3a7713b1edbc 223 * "emc_dynamic_chip_config_t" type memory.
AnnaBridge 171:3a7713b1edbc 224 */
AnnaBridge 171:3a7713b1edbc 225 void EMC_DynamicMemInit(EMC_Type *base, emc_dynamic_timing_config_t *timing,
AnnaBridge 171:3a7713b1edbc 226 emc_dynamic_chip_config_t *config, uint32_t totalChips);
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /*!
AnnaBridge 171:3a7713b1edbc 229 * @brief Initializes the static memory controller.
AnnaBridge 171:3a7713b1edbc 230 * This function initializes the static memory controller in external memory controller.
AnnaBridge 171:3a7713b1edbc 231 * This function must be called after EMC_Init and before accessing the external static memory.
AnnaBridge 171:3a7713b1edbc 232 *
AnnaBridge 171:3a7713b1edbc 233 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 234 * @param extWait_Ns The extended wait timeout or the read/write transfer time.
AnnaBridge 171:3a7713b1edbc 235 * This is common for all static memory chips and set with NULL if not required.
AnnaBridge 171:3a7713b1edbc 236 * @param configure The EMC static memory controller chip independent configuration pointer.
AnnaBridge 171:3a7713b1edbc 237 * This configuration pointer is actually pointer to a configration array. the array number
AnnaBridge 171:3a7713b1edbc 238 * depends on the "totalChips".
AnnaBridge 171:3a7713b1edbc 239 * @param totalChips The total static memory chip numbers been used or the length of the
AnnaBridge 171:3a7713b1edbc 240 * "emc_static_chip_config_t" type memory.
AnnaBridge 171:3a7713b1edbc 241 */
AnnaBridge 171:3a7713b1edbc 242 void EMC_StaticMemInit(EMC_Type *base, uint32_t *extWait_Ns, emc_static_chip_config_t *config, uint32_t totalChips);
AnnaBridge 171:3a7713b1edbc 243
AnnaBridge 171:3a7713b1edbc 244 /*!
AnnaBridge 171:3a7713b1edbc 245 * @brief Deinitializes the EMC module and gates the clock.
AnnaBridge 171:3a7713b1edbc 246 * This function gates the EMC controller clock. As a result, the EMC
AnnaBridge 171:3a7713b1edbc 247 * module doesn't work after calling this function.
AnnaBridge 171:3a7713b1edbc 248 *
AnnaBridge 171:3a7713b1edbc 249 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 250 */
AnnaBridge 171:3a7713b1edbc 251 void EMC_Deinit(EMC_Type *base);
AnnaBridge 171:3a7713b1edbc 252
AnnaBridge 171:3a7713b1edbc 253 /* @} */
AnnaBridge 171:3a7713b1edbc 254
AnnaBridge 171:3a7713b1edbc 255 /*!
AnnaBridge 171:3a7713b1edbc 256 * @name EMC Basic Operation
AnnaBridge 171:3a7713b1edbc 257 * @{
AnnaBridge 171:3a7713b1edbc 258 */
AnnaBridge 171:3a7713b1edbc 259
AnnaBridge 171:3a7713b1edbc 260 /*!
AnnaBridge 171:3a7713b1edbc 261 * @brief Enables/disables the EMC module.
AnnaBridge 171:3a7713b1edbc 262 *
AnnaBridge 171:3a7713b1edbc 263 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 264 * @param enable True enable EMC module, false disable.
AnnaBridge 171:3a7713b1edbc 265 */
AnnaBridge 171:3a7713b1edbc 266 static inline void EMC_Enable(EMC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 267 {
AnnaBridge 171:3a7713b1edbc 268 if (enable)
AnnaBridge 171:3a7713b1edbc 269 {
AnnaBridge 171:3a7713b1edbc 270 base->CONTROL |= EMC_CONTROL_E_MASK;
AnnaBridge 171:3a7713b1edbc 271 }
AnnaBridge 171:3a7713b1edbc 272 else
AnnaBridge 171:3a7713b1edbc 273 {
AnnaBridge 171:3a7713b1edbc 274 base->CONTROL &= ~EMC_CONTROL_E_MASK;
AnnaBridge 171:3a7713b1edbc 275 }
AnnaBridge 171:3a7713b1edbc 276 }
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 /*!
AnnaBridge 171:3a7713b1edbc 279 * @brief Enables/disables the EMC Dynaimc memory controller.
AnnaBridge 171:3a7713b1edbc 280 *
AnnaBridge 171:3a7713b1edbc 281 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 282 * @param enable True enable EMC dynamic memory controller, false disable.
AnnaBridge 171:3a7713b1edbc 283 */
AnnaBridge 171:3a7713b1edbc 284 static inline void EMC_EnableDynamicMemControl(EMC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 285 {
AnnaBridge 171:3a7713b1edbc 286 if (enable)
AnnaBridge 171:3a7713b1edbc 287 {
AnnaBridge 171:3a7713b1edbc 288 base->DYNAMICCONTROL |= (EMC_DYNAMICCONTROL_CE_MASK | EMC_DYNAMICCONTROL_CS_MASK);
AnnaBridge 171:3a7713b1edbc 289 }
AnnaBridge 171:3a7713b1edbc 290 else
AnnaBridge 171:3a7713b1edbc 291 {
AnnaBridge 171:3a7713b1edbc 292 base->DYNAMICCONTROL &= ~(EMC_DYNAMICCONTROL_CE_MASK | EMC_DYNAMICCONTROL_CS_MASK);
AnnaBridge 171:3a7713b1edbc 293 }
AnnaBridge 171:3a7713b1edbc 294 }
AnnaBridge 171:3a7713b1edbc 295
AnnaBridge 171:3a7713b1edbc 296 /*!
AnnaBridge 171:3a7713b1edbc 297 * @brief Enables/disables the EMC address mirror.
AnnaBridge 171:3a7713b1edbc 298 * Enable the address mirror the EMC_CS1is mirrored to both EMC_CS0
AnnaBridge 171:3a7713b1edbc 299 * and EMC_DYCS0 memory areas. Disable the address mirror enables
AnnaBridge 171:3a7713b1edbc 300 * EMC_cS0 and EMC_DYCS0 memory to be accessed.
AnnaBridge 171:3a7713b1edbc 301 *
AnnaBridge 171:3a7713b1edbc 302 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 303 * @param enable True enable the address mirror, false disable the address mirror.
AnnaBridge 171:3a7713b1edbc 304 */
AnnaBridge 171:3a7713b1edbc 305 static inline void EMC_MirrorChipAddr(EMC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 306 {
AnnaBridge 171:3a7713b1edbc 307 if (enable)
AnnaBridge 171:3a7713b1edbc 308 {
AnnaBridge 171:3a7713b1edbc 309 base->CONTROL |= EMC_CONTROL_M_MASK;
AnnaBridge 171:3a7713b1edbc 310 }
AnnaBridge 171:3a7713b1edbc 311 else
AnnaBridge 171:3a7713b1edbc 312 {
AnnaBridge 171:3a7713b1edbc 313 base->CONTROL &= ~EMC_CONTROL_M_MASK;
AnnaBridge 171:3a7713b1edbc 314 }
AnnaBridge 171:3a7713b1edbc 315 }
AnnaBridge 171:3a7713b1edbc 316
AnnaBridge 171:3a7713b1edbc 317 /*!
AnnaBridge 171:3a7713b1edbc 318 * @brief Enter the self-refresh mode for dynamic memory controller.
AnnaBridge 171:3a7713b1edbc 319 * This function provided self-refresh mode enter or exit for application.
AnnaBridge 171:3a7713b1edbc 320 *
AnnaBridge 171:3a7713b1edbc 321 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 322 * @param enable True enter the self-refresh mode, false to exit self-refresh
AnnaBridge 171:3a7713b1edbc 323 * and enter the normal mode.
AnnaBridge 171:3a7713b1edbc 324 */
AnnaBridge 171:3a7713b1edbc 325 static inline void EMC_EnterSelfRefreshCommand(EMC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 326 {
AnnaBridge 171:3a7713b1edbc 327 if (enable)
AnnaBridge 171:3a7713b1edbc 328 {
AnnaBridge 171:3a7713b1edbc 329 base->DYNAMICCONTROL |= EMC_DYNAMICCONTROL_SR_MASK;
AnnaBridge 171:3a7713b1edbc 330 }
AnnaBridge 171:3a7713b1edbc 331 else
AnnaBridge 171:3a7713b1edbc 332 {
AnnaBridge 171:3a7713b1edbc 333 base->DYNAMICCONTROL &= ~EMC_DYNAMICCONTROL_SR_MASK;
AnnaBridge 171:3a7713b1edbc 334 }
AnnaBridge 171:3a7713b1edbc 335 }
AnnaBridge 171:3a7713b1edbc 336
AnnaBridge 171:3a7713b1edbc 337 /*!
AnnaBridge 171:3a7713b1edbc 338 * @brief Get the operating mode of the EMC.
AnnaBridge 171:3a7713b1edbc 339 * This function can be used to get the operating mode of the EMC.
AnnaBridge 171:3a7713b1edbc 340 *
AnnaBridge 171:3a7713b1edbc 341 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 342 * @return The EMC in self-refresh mode if true, else in normal mode.
AnnaBridge 171:3a7713b1edbc 343 */
AnnaBridge 171:3a7713b1edbc 344 static inline bool EMC_IsInSelfrefreshMode(EMC_Type *base)
AnnaBridge 171:3a7713b1edbc 345 {
AnnaBridge 171:3a7713b1edbc 346 return ((base->STATUS & EMC_STATUS_SA_MASK) ? true : false);
AnnaBridge 171:3a7713b1edbc 347 }
AnnaBridge 171:3a7713b1edbc 348
AnnaBridge 171:3a7713b1edbc 349 /*!
AnnaBridge 171:3a7713b1edbc 350 * @brief Enter/exit the low-power mode.
AnnaBridge 171:3a7713b1edbc 351 *
AnnaBridge 171:3a7713b1edbc 352 * @param base EMC peripheral base address.
AnnaBridge 171:3a7713b1edbc 353 * @param enable True Enter the low-power mode, false exit low-power mode
AnnaBridge 171:3a7713b1edbc 354 * and return to normal mode.
AnnaBridge 171:3a7713b1edbc 355 */
AnnaBridge 171:3a7713b1edbc 356 static inline void EMC_EnterLowPowerMode(EMC_Type *base, bool enable)
AnnaBridge 171:3a7713b1edbc 357 {
AnnaBridge 171:3a7713b1edbc 358 if (enable)
AnnaBridge 171:3a7713b1edbc 359 {
AnnaBridge 171:3a7713b1edbc 360 base->CONTROL |= EMC_CONTROL_L_MASK;
AnnaBridge 171:3a7713b1edbc 361 }
AnnaBridge 171:3a7713b1edbc 362 else
AnnaBridge 171:3a7713b1edbc 363 {
AnnaBridge 171:3a7713b1edbc 364 base->CONTROL &= ~ EMC_CONTROL_L_MASK;
AnnaBridge 171:3a7713b1edbc 365 }
AnnaBridge 171:3a7713b1edbc 366 }
AnnaBridge 171:3a7713b1edbc 367
AnnaBridge 171:3a7713b1edbc 368 /* @} */
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 371 }
AnnaBridge 171:3a7713b1edbc 372 #endif
AnnaBridge 171:3a7713b1edbc 373
AnnaBridge 171:3a7713b1edbc 374 /*! @}*/
AnnaBridge 171:3a7713b1edbc 375
AnnaBridge 171:3a7713b1edbc 376 #endif /* _FSL_EMC_H_*/