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TARGET_LPC54114/TOOLCHAIN_GCC_ARM/fsl_reset.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Kojto 148:fd96258d940d 1 /*
Kojto 148:fd96258d940d 2 * Copyright (c) 2016, Freescale Semiconductor, Inc.
Kojto 148:fd96258d940d 3 * All rights reserved.
Kojto 148:fd96258d940d 4 *
Kojto 148:fd96258d940d 5 * Redistribution and use in source and binary forms, with or without modification,
Kojto 148:fd96258d940d 6 * are permitted provided that the following conditions are met:
Kojto 148:fd96258d940d 7 *
Kojto 148:fd96258d940d 8 * o Redistributions of source code must retain the above copyright notice, this list
Kojto 148:fd96258d940d 9 * of conditions and the following disclaimer.
Kojto 148:fd96258d940d 10 *
Kojto 148:fd96258d940d 11 * o Redistributions in binary form must reproduce the above copyright notice, this
Kojto 148:fd96258d940d 12 * list of conditions and the following disclaimer in the documentation and/or
Kojto 148:fd96258d940d 13 * other materials provided with the distribution.
Kojto 148:fd96258d940d 14 *
Kojto 148:fd96258d940d 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Kojto 148:fd96258d940d 16 * contributors may be used to endorse or promote products derived from this
Kojto 148:fd96258d940d 17 * software without specific prior written permission.
Kojto 148:fd96258d940d 18 *
Kojto 148:fd96258d940d 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Kojto 148:fd96258d940d 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Kojto 148:fd96258d940d 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto 148:fd96258d940d 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Kojto 148:fd96258d940d 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Kojto 148:fd96258d940d 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Kojto 148:fd96258d940d 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Kojto 148:fd96258d940d 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Kojto 148:fd96258d940d 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Kojto 148:fd96258d940d 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto 148:fd96258d940d 29 */
Kojto 148:fd96258d940d 30
Kojto 148:fd96258d940d 31 #ifndef _FSL_RESET_H_
Kojto 148:fd96258d940d 32 #define _FSL_RESET_H_
Kojto 148:fd96258d940d 33
Kojto 148:fd96258d940d 34 #include <assert.h>
Kojto 148:fd96258d940d 35 #include <stdbool.h>
Kojto 148:fd96258d940d 36 #include <stdint.h>
Kojto 148:fd96258d940d 37 #include <string.h>
Kojto 148:fd96258d940d 38 #include "fsl_device_registers.h"
Kojto 148:fd96258d940d 39
Kojto 148:fd96258d940d 40 /*!
Kojto 148:fd96258d940d 41 * @addtogroup ksdk_common
Kojto 148:fd96258d940d 42 * @{
Kojto 148:fd96258d940d 43 */
Kojto 148:fd96258d940d 44
Kojto 148:fd96258d940d 45 /*******************************************************************************
Kojto 148:fd96258d940d 46 * Definitions
Kojto 148:fd96258d940d 47 ******************************************************************************/
Kojto 148:fd96258d940d 48
Kojto 148:fd96258d940d 49 /*!
Kojto 148:fd96258d940d 50 * @brief Enumeration for peripheral reset control bits
Kojto 148:fd96258d940d 51 *
Kojto 148:fd96258d940d 52 * Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers
Kojto 148:fd96258d940d 53 */
Kojto 148:fd96258d940d 54 typedef enum _SYSCON_RSTn
Kojto 148:fd96258d940d 55 {
Kojto 148:fd96258d940d 56 kFLASH_RST_SHIFT_RSTn = 0 | 7U, /**< Flash controller reset control */
Kojto 148:fd96258d940d 57 kFMC_RST_SHIFT_RSTn = 0 | 8U, /**< Flash accelerator reset control */
Kojto 148:fd96258d940d 58 kMUX_RST_SHIFT_RSTn = 0 | 11U, /**< Input mux reset control */
Kojto 148:fd96258d940d 59 kIOCON_RST_SHIFT_RSTn = 0 | 13U, /**< IOCON reset control */
Kojto 148:fd96258d940d 60 kGPIO0_RST_SHIFT_RSTn = 0 | 14U, /**< GPIO0 reset control */
Kojto 148:fd96258d940d 61 kGPIO1_RST_SHIFT_RSTn = 0 | 15U, /**< GPIO1 reset control */
Kojto 148:fd96258d940d 62 kPINT_RST_SHIFT_RSTn = 0 | 18U, /**< Pin interrupt (PINT) reset control */
Kojto 148:fd96258d940d 63 kGINT_RST_SHIFT_RSTn = 0 | 19U, /**< Grouped interrupt (PINT) reset control. */
Kojto 148:fd96258d940d 64 kDMA_RST_SHIFT_RSTn = 0 | 20U, /**< DMA reset control */
Kojto 148:fd96258d940d 65 kCRC_RST_SHIFT_RSTn = 0 | 21U, /**< CRC reset control */
Kojto 148:fd96258d940d 66 kWWDT_RST_SHIFT_RSTn = 0 | 22U, /**< Watchdog timer reset control */
Kojto 148:fd96258d940d 67 kADC0_RST_SHIFT_RSTn = 0 | 27U, /**< ADC0 reset control */
Kojto 148:fd96258d940d 68 kMRT_RST_SHIFT_RSTn = 65536 | 0U, /**< Multi-rate timer (MRT) reset control */
Kojto 148:fd96258d940d 69 kSCT0_RST_SHIFT_RSTn = 65536 | 2U, /**< SCTimer/PWM 0 (SCT0) reset control */
Kojto 148:fd96258d940d 70 kUTICK_RST_SHIFT_RSTn = 65536 | 10U, /**< Micro-tick timer reset control */
Kojto 148:fd96258d940d 71 kFC0_RST_SHIFT_RSTn = 65536 | 11U, /**< Flexcomm Interface 0 reset control */
Kojto 148:fd96258d940d 72 kFC1_RST_SHIFT_RSTn = 65536 | 12U, /**< Flexcomm Interface 1 reset control */
Kojto 148:fd96258d940d 73 kFC2_RST_SHIFT_RSTn = 65536 | 13U, /**< Flexcomm Interface 2 reset control */
Kojto 148:fd96258d940d 74 kFC3_RST_SHIFT_RSTn = 65536 | 14U, /**< Flexcomm Interface 3 reset control */
Kojto 148:fd96258d940d 75 kFC4_RST_SHIFT_RSTn = 65536 | 15U, /**< Flexcomm Interface 4 reset control */
Kojto 148:fd96258d940d 76 kFC5_RST_SHIFT_RSTn = 65536 | 16U, /**< Flexcomm Interface 5 reset control */
Kojto 148:fd96258d940d 77 kFC6_RST_SHIFT_RSTn = 65536 | 17U, /**< Flexcomm Interface 6 reset control */
Kojto 148:fd96258d940d 78 kFC7_RST_SHIFT_RSTn = 65536 | 18U, /**< Flexcomm Interface 7 reset control */
Kojto 148:fd96258d940d 79 kDMIC_RST_SHIFT_RSTn = 65536 | 19U, /**< Digital microphone interface reset control */
Kojto 148:fd96258d940d 80 kCT32B2_RST_SHIFT_RSTn = 65536 | 22U, /**< CT32B2 reset control */
Kojto 148:fd96258d940d 81 kUSB_RST_SHIFT_RSTn = 65536 | 25U, /**< USB reset control */
Kojto 148:fd96258d940d 82 kCT32B0_RST_SHIFT_RSTn = 65536 | 26U, /**< CT32B0 reset control */
Kojto 148:fd96258d940d 83 kCT32B1_RST_SHIFT_RSTn = 65536 | 27U, /**< CT32B1 reset control */
Kojto 148:fd96258d940d 84 kCT32B3_RST_SHIFT_RSTn = 67108864 | 13U, /**< CT32B3 reset control */
Kojto 148:fd96258d940d 85 kCT32B4_RST_SHIFT_RSTn = 67108864 | 14U, /**< CT32B4 reset control */
Kojto 148:fd96258d940d 86 } SYSCON_RSTn_t;
Kojto 148:fd96258d940d 87
Kojto 148:fd96258d940d 88 /** Array initializers with peripheral reset bits **/
Kojto 148:fd96258d940d 89 #define ADC_RSTS \
Kojto 148:fd96258d940d 90 { \
Kojto 148:fd96258d940d 91 kADC0_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 92 } /* Reset bits for ADC peripheral */
Kojto 148:fd96258d940d 93 #define CRC_RSTS \
Kojto 148:fd96258d940d 94 { \
Kojto 148:fd96258d940d 95 kCRC_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 96 } /* Reset bits for CRC peripheral */
Kojto 148:fd96258d940d 97 #define DMA_RSTS \
Kojto 148:fd96258d940d 98 { \
Kojto 148:fd96258d940d 99 kDMA_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 100 } /* Reset bits for DMA peripheral */
Kojto 148:fd96258d940d 101 #define DMIC_RSTS \
Kojto 148:fd96258d940d 102 { \
Kojto 148:fd96258d940d 103 kDMIC_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 104 } /* Reset bits for ADC peripheral */
Kojto 148:fd96258d940d 105 #define FLEXCOMM_RSTS \
Kojto 148:fd96258d940d 106 { \
Kojto 148:fd96258d940d 107 kFC0_RST_SHIFT_RSTn, kFC1_RST_SHIFT_RSTn, kFC2_RST_SHIFT_RSTn, kFC3_RST_SHIFT_RSTn, kFC4_RST_SHIFT_RSTn, \
Kojto 148:fd96258d940d 108 kFC5_RST_SHIFT_RSTn, kFC6_RST_SHIFT_RSTn, kFC7_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 109 } /* Reset bits for FLEXCOMM peripheral */
Kojto 148:fd96258d940d 110 #define GINT_RSTS \
Kojto 148:fd96258d940d 111 { \
Kojto 148:fd96258d940d 112 kGINT_RST_SHIFT_RSTn, kGINT_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 113 } /* Reset bits for GINT peripheral. GINT0 & GINT1 share same slot */
Kojto 148:fd96258d940d 114 #define GPIO_RSTS \
Kojto 148:fd96258d940d 115 { \
Kojto 148:fd96258d940d 116 kGPIO0_RST_SHIFT_RSTn, kGPIO1_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 117 } /* Reset bits for GPIO peripheral */
Kojto 148:fd96258d940d 118 #define INPUTMUX_RSTS \
Kojto 148:fd96258d940d 119 { \
Kojto 148:fd96258d940d 120 kMUX_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 121 } /* Reset bits for INPUTMUX peripheral */
Kojto 148:fd96258d940d 122 #define IOCON_RSTS \
Kojto 148:fd96258d940d 123 { \
Kojto 148:fd96258d940d 124 kIOCON_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 125 } /* Reset bits for IOCON peripheral */
Kojto 148:fd96258d940d 126 #define FLASH_RSTS \
Kojto 148:fd96258d940d 127 { \
Kojto 148:fd96258d940d 128 kFLASH_RST_SHIFT_RSTn, kFMC_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 129 } /* Reset bits for Flash peripheral */
Kojto 148:fd96258d940d 130 #define MRT_RSTS \
Kojto 148:fd96258d940d 131 { \
Kojto 148:fd96258d940d 132 kMRT_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 133 } /* Reset bits for MRT peripheral */
Kojto 148:fd96258d940d 134 #define PINT_RSTS \
Kojto 148:fd96258d940d 135 { \
Kojto 148:fd96258d940d 136 kPINT_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 137 } /* Reset bits for PINT peripheral */
Kojto 148:fd96258d940d 138 #define SCT_RSTS \
Kojto 148:fd96258d940d 139 { \
Kojto 148:fd96258d940d 140 kSCT0_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 141 } /* Reset bits for SCT peripheral */
Kojto 148:fd96258d940d 142 #define CTIMER_RSTS \
Kojto 148:fd96258d940d 143 { \
Kojto 148:fd96258d940d 144 kCT32B0_RST_SHIFT_RSTn, kCT32B1_RST_SHIFT_RSTn, kCT32B2_RST_SHIFT_RSTn, kCT32B3_RST_SHIFT_RSTn, \
Kojto 148:fd96258d940d 145 kCT32B4_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 146 } /* Reset bits for TIMER peripheral */
Kojto 148:fd96258d940d 147 #define USB_RSTS \
Kojto 148:fd96258d940d 148 { \
Kojto 148:fd96258d940d 149 kUSB_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 150 } /* Reset bits for USB peripheral */
Kojto 148:fd96258d940d 151 #define UTICK_RSTS \
Kojto 148:fd96258d940d 152 { \
Kojto 148:fd96258d940d 153 kUTICK_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 154 } /* Reset bits for UTICK peripheral */
Kojto 148:fd96258d940d 155 #define WWDT_RSTS \
Kojto 148:fd96258d940d 156 { \
Kojto 148:fd96258d940d 157 kWWDT_RST_SHIFT_RSTn \
Kojto 148:fd96258d940d 158 } /* Reset bits for WWDT peripheral */
Kojto 148:fd96258d940d 159
Kojto 148:fd96258d940d 160 typedef SYSCON_RSTn_t reset_ip_name_t;
Kojto 148:fd96258d940d 161
Kojto 148:fd96258d940d 162 /*******************************************************************************
Kojto 148:fd96258d940d 163 * API
Kojto 148:fd96258d940d 164 ******************************************************************************/
Kojto 148:fd96258d940d 165 #if defined(__cplusplus)
Kojto 148:fd96258d940d 166 extern "C" {
Kojto 148:fd96258d940d 167 #endif
Kojto 148:fd96258d940d 168
Kojto 148:fd96258d940d 169 /*!
Kojto 148:fd96258d940d 170 * @brief Assert reset to peripheral.
Kojto 148:fd96258d940d 171 *
Kojto 148:fd96258d940d 172 * Asserts reset signal to specified peripheral module.
Kojto 148:fd96258d940d 173 *
Kojto 148:fd96258d940d 174 * @param peripheral Assert reset to this peripheral. The enum argument contains encoding of reset register
Kojto 148:fd96258d940d 175 * and reset bit position in the reset register.
Kojto 148:fd96258d940d 176 */
Kojto 148:fd96258d940d 177 void RESET_SetPeripheralReset(reset_ip_name_t peripheral);
Kojto 148:fd96258d940d 178
Kojto 148:fd96258d940d 179 /*!
Kojto 148:fd96258d940d 180 * @brief Clear reset to peripheral.
Kojto 148:fd96258d940d 181 *
Kojto 148:fd96258d940d 182 * Clears reset signal to specified peripheral module, allows it to operate.
Kojto 148:fd96258d940d 183 *
Kojto 148:fd96258d940d 184 * @param peripheral Clear reset to this peripheral. The enum argument contains encoding of reset register
Kojto 148:fd96258d940d 185 * and reset bit position in the reset register.
Kojto 148:fd96258d940d 186 */
Kojto 148:fd96258d940d 187 void RESET_ClearPeripheralReset(reset_ip_name_t peripheral);
Kojto 148:fd96258d940d 188
Kojto 148:fd96258d940d 189 /*!
Kojto 148:fd96258d940d 190 * @brief Reset peripheral module.
Kojto 148:fd96258d940d 191 *
Kojto 148:fd96258d940d 192 * Reset peripheral module.
Kojto 148:fd96258d940d 193 *
Kojto 148:fd96258d940d 194 * @param peripheral Peripheral to reset. The enum argument contains encoding of reset register
Kojto 148:fd96258d940d 195 * and reset bit position in the reset register.
Kojto 148:fd96258d940d 196 */
Kojto 148:fd96258d940d 197 void RESET_PeripheralReset(reset_ip_name_t peripheral);
Kojto 148:fd96258d940d 198
Kojto 148:fd96258d940d 199 #if defined(__cplusplus)
Kojto 148:fd96258d940d 200 }
Kojto 148:fd96258d940d 201 #endif
Kojto 148:fd96258d940d 202
Kojto 148:fd96258d940d 203 /*! @} */
Kojto 148:fd96258d940d 204
Kojto 148:fd96258d940d 205 #endif /* _FSL_RESET_H_ */