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TARGET_KW24D/TOOLCHAIN_GCC_ARM/fsl_lptmr.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 145:64910690c574 1 /*
AnnaBridge 145:64910690c574 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 145:64910690c574 3 * All rights reserved.
AnnaBridge 145:64910690c574 4 *
AnnaBridge 145:64910690c574 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 145:64910690c574 6 * are permitted provided that the following conditions are met:
AnnaBridge 145:64910690c574 7 *
AnnaBridge 145:64910690c574 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 145:64910690c574 9 * of conditions and the following disclaimer.
AnnaBridge 145:64910690c574 10 *
AnnaBridge 145:64910690c574 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 145:64910690c574 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 145:64910690c574 13 * other materials provided with the distribution.
AnnaBridge 145:64910690c574 14 *
AnnaBridge 145:64910690c574 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 145:64910690c574 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 145:64910690c574 17 * software without specific prior written permission.
AnnaBridge 145:64910690c574 18 *
AnnaBridge 145:64910690c574 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 145:64910690c574 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 145:64910690c574 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 145:64910690c574 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 145:64910690c574 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 145:64910690c574 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 145:64910690c574 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 145:64910690c574 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 145:64910690c574 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 145:64910690c574 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 145:64910690c574 29 */
AnnaBridge 145:64910690c574 30 #ifndef _FSL_LPTMR_H_
AnnaBridge 145:64910690c574 31 #define _FSL_LPTMR_H_
AnnaBridge 145:64910690c574 32
AnnaBridge 145:64910690c574 33 #include "fsl_common.h"
AnnaBridge 145:64910690c574 34
AnnaBridge 145:64910690c574 35 /*!
AnnaBridge 145:64910690c574 36 * @addtogroup lptmr
AnnaBridge 145:64910690c574 37 * @{
AnnaBridge 145:64910690c574 38 */
AnnaBridge 145:64910690c574 39
AnnaBridge 145:64910690c574 40
AnnaBridge 145:64910690c574 41 /*******************************************************************************
AnnaBridge 145:64910690c574 42 * Definitions
AnnaBridge 145:64910690c574 43 ******************************************************************************/
AnnaBridge 145:64910690c574 44
AnnaBridge 145:64910690c574 45 /*! @name Driver version */
AnnaBridge 145:64910690c574 46 /*@{*/
AnnaBridge 145:64910690c574 47 #define FSL_LPTMR_DRIVER_VERSION (MAKE_VERSION(2, 0, 0)) /*!< Version 2.0.0 */
AnnaBridge 145:64910690c574 48 /*@}*/
AnnaBridge 145:64910690c574 49
AnnaBridge 145:64910690c574 50 /*! @brief LPTMR pin selection, used in pulse counter mode.*/
AnnaBridge 145:64910690c574 51 typedef enum _lptmr_pin_select
AnnaBridge 145:64910690c574 52 {
AnnaBridge 145:64910690c574 53 kLPTMR_PinSelectInput_0 = 0x0U, /*!< Pulse counter input 0 is selected */
AnnaBridge 145:64910690c574 54 kLPTMR_PinSelectInput_1 = 0x1U, /*!< Pulse counter input 1 is selected */
AnnaBridge 145:64910690c574 55 kLPTMR_PinSelectInput_2 = 0x2U, /*!< Pulse counter input 2 is selected */
AnnaBridge 145:64910690c574 56 kLPTMR_PinSelectInput_3 = 0x3U /*!< Pulse counter input 3 is selected */
AnnaBridge 145:64910690c574 57 } lptmr_pin_select_t;
AnnaBridge 145:64910690c574 58
AnnaBridge 145:64910690c574 59 /*! @brief LPTMR pin polarity, used in pulse counter mode.*/
AnnaBridge 145:64910690c574 60 typedef enum _lptmr_pin_polarity
AnnaBridge 145:64910690c574 61 {
AnnaBridge 145:64910690c574 62 kLPTMR_PinPolarityActiveHigh = 0x0U, /*!< Pulse Counter input source is active-high */
AnnaBridge 145:64910690c574 63 kLPTMR_PinPolarityActiveLow = 0x1U /*!< Pulse Counter input source is active-low */
AnnaBridge 145:64910690c574 64 } lptmr_pin_polarity_t;
AnnaBridge 145:64910690c574 65
AnnaBridge 145:64910690c574 66 /*! @brief LPTMR timer mode selection.*/
AnnaBridge 145:64910690c574 67 typedef enum _lptmr_timer_mode
AnnaBridge 145:64910690c574 68 {
AnnaBridge 145:64910690c574 69 kLPTMR_TimerModeTimeCounter = 0x0U, /*!< Time Counter mode */
AnnaBridge 145:64910690c574 70 kLPTMR_TimerModePulseCounter = 0x1U /*!< Pulse Counter mode */
AnnaBridge 145:64910690c574 71 } lptmr_timer_mode_t;
AnnaBridge 145:64910690c574 72
AnnaBridge 145:64910690c574 73 /*! @brief LPTMR prescaler/glitch filter values*/
AnnaBridge 145:64910690c574 74 typedef enum _lptmr_prescaler_glitch_value
AnnaBridge 145:64910690c574 75 {
AnnaBridge 145:64910690c574 76 kLPTMR_Prescale_Glitch_0 = 0x0U, /*!< Prescaler divide 2, glitch filter does not support this setting */
AnnaBridge 145:64910690c574 77 kLPTMR_Prescale_Glitch_1 = 0x1U, /*!< Prescaler divide 4, glitch filter 2 */
AnnaBridge 145:64910690c574 78 kLPTMR_Prescale_Glitch_2 = 0x2U, /*!< Prescaler divide 8, glitch filter 4 */
AnnaBridge 145:64910690c574 79 kLPTMR_Prescale_Glitch_3 = 0x3U, /*!< Prescaler divide 16, glitch filter 8 */
AnnaBridge 145:64910690c574 80 kLPTMR_Prescale_Glitch_4 = 0x4U, /*!< Prescaler divide 32, glitch filter 16 */
AnnaBridge 145:64910690c574 81 kLPTMR_Prescale_Glitch_5 = 0x5U, /*!< Prescaler divide 64, glitch filter 32 */
AnnaBridge 145:64910690c574 82 kLPTMR_Prescale_Glitch_6 = 0x6U, /*!< Prescaler divide 128, glitch filter 64 */
AnnaBridge 145:64910690c574 83 kLPTMR_Prescale_Glitch_7 = 0x7U, /*!< Prescaler divide 256, glitch filter 128 */
AnnaBridge 145:64910690c574 84 kLPTMR_Prescale_Glitch_8 = 0x8U, /*!< Prescaler divide 512, glitch filter 256 */
AnnaBridge 145:64910690c574 85 kLPTMR_Prescale_Glitch_9 = 0x9U, /*!< Prescaler divide 1024, glitch filter 512*/
AnnaBridge 145:64910690c574 86 kLPTMR_Prescale_Glitch_10 = 0xAU, /*!< Prescaler divide 2048 glitch filter 1024 */
AnnaBridge 145:64910690c574 87 kLPTMR_Prescale_Glitch_11 = 0xBU, /*!< Prescaler divide 4096, glitch filter 2048 */
AnnaBridge 145:64910690c574 88 kLPTMR_Prescale_Glitch_12 = 0xCU, /*!< Prescaler divide 8192, glitch filter 4096 */
AnnaBridge 145:64910690c574 89 kLPTMR_Prescale_Glitch_13 = 0xDU, /*!< Prescaler divide 16384, glitch filter 8192 */
AnnaBridge 145:64910690c574 90 kLPTMR_Prescale_Glitch_14 = 0xEU, /*!< Prescaler divide 32768, glitch filter 16384 */
AnnaBridge 145:64910690c574 91 kLPTMR_Prescale_Glitch_15 = 0xFU /*!< Prescaler divide 65536, glitch filter 32768 */
AnnaBridge 145:64910690c574 92 } lptmr_prescaler_glitch_value_t;
AnnaBridge 145:64910690c574 93
AnnaBridge 145:64910690c574 94 /*!
AnnaBridge 145:64910690c574 95 * @brief LPTMR prescaler/glitch filter clock select.
AnnaBridge 145:64910690c574 96 * @note Clock connections are SoC-specific
AnnaBridge 145:64910690c574 97 */
AnnaBridge 145:64910690c574 98 typedef enum _lptmr_prescaler_clock_select
AnnaBridge 145:64910690c574 99 {
AnnaBridge 145:64910690c574 100 kLPTMR_PrescalerClock_0 = 0x0U, /*!< Prescaler/glitch filter clock 0 selected. */
AnnaBridge 145:64910690c574 101 kLPTMR_PrescalerClock_1 = 0x1U, /*!< Prescaler/glitch filter clock 1 selected. */
AnnaBridge 145:64910690c574 102 kLPTMR_PrescalerClock_2 = 0x2U, /*!< Prescaler/glitch filter clock 2 selected. */
AnnaBridge 145:64910690c574 103 kLPTMR_PrescalerClock_3 = 0x3U, /*!< Prescaler/glitch filter clock 3 selected. */
AnnaBridge 145:64910690c574 104 } lptmr_prescaler_clock_select_t;
AnnaBridge 145:64910690c574 105
AnnaBridge 145:64910690c574 106 /*! @brief List of LPTMR interrupts */
AnnaBridge 145:64910690c574 107 typedef enum _lptmr_interrupt_enable
AnnaBridge 145:64910690c574 108 {
AnnaBridge 145:64910690c574 109 kLPTMR_TimerInterruptEnable = LPTMR_CSR_TIE_MASK, /*!< Timer interrupt enable */
AnnaBridge 145:64910690c574 110 } lptmr_interrupt_enable_t;
AnnaBridge 145:64910690c574 111
AnnaBridge 145:64910690c574 112 /*! @brief List of LPTMR status flags */
AnnaBridge 145:64910690c574 113 typedef enum _lptmr_status_flags
AnnaBridge 145:64910690c574 114 {
AnnaBridge 145:64910690c574 115 kLPTMR_TimerCompareFlag = LPTMR_CSR_TCF_MASK, /*!< Timer compare flag */
AnnaBridge 145:64910690c574 116 } lptmr_status_flags_t;
AnnaBridge 145:64910690c574 117
AnnaBridge 145:64910690c574 118 /*!
AnnaBridge 145:64910690c574 119 * @brief LPTMR config structure
AnnaBridge 145:64910690c574 120 *
AnnaBridge 145:64910690c574 121 * This structure holds the configuration settings for the LPTMR peripheral. To initialize this
AnnaBridge 145:64910690c574 122 * structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a
AnnaBridge 145:64910690c574 123 * pointer to your config structure instance.
AnnaBridge 145:64910690c574 124 *
AnnaBridge 145:64910690c574 125 * The config struct can be made const so it resides in flash
AnnaBridge 145:64910690c574 126 */
AnnaBridge 145:64910690c574 127 typedef struct _lptmr_config
AnnaBridge 145:64910690c574 128 {
AnnaBridge 145:64910690c574 129 lptmr_timer_mode_t timerMode; /*!< Time counter mode or pulse counter mode */
AnnaBridge 145:64910690c574 130 lptmr_pin_select_t pinSelect; /*!< LPTMR pulse input pin select; used only in pulse counter mode */
AnnaBridge 145:64910690c574 131 lptmr_pin_polarity_t pinPolarity; /*!< LPTMR pulse input pin polarity; used only in pulse counter mode */
AnnaBridge 145:64910690c574 132 bool enableFreeRunning; /*!< true: enable free running, counter is reset on overflow
AnnaBridge 145:64910690c574 133 false: counter is reset when the compare flag is set */
AnnaBridge 145:64910690c574 134 bool bypassPrescaler; /*!< true: bypass prescaler; false: use clock from prescaler */
AnnaBridge 145:64910690c574 135 lptmr_prescaler_clock_select_t prescalerClockSource; /*!< LPTMR clock source */
AnnaBridge 145:64910690c574 136 lptmr_prescaler_glitch_value_t value; /*!< Prescaler or glitch filter value */
AnnaBridge 145:64910690c574 137 } lptmr_config_t;
AnnaBridge 145:64910690c574 138
AnnaBridge 145:64910690c574 139 /*******************************************************************************
AnnaBridge 145:64910690c574 140 * API
AnnaBridge 145:64910690c574 141 ******************************************************************************/
AnnaBridge 145:64910690c574 142
AnnaBridge 145:64910690c574 143 #if defined(__cplusplus)
AnnaBridge 145:64910690c574 144 extern "C" {
AnnaBridge 145:64910690c574 145 #endif
AnnaBridge 145:64910690c574 146
AnnaBridge 145:64910690c574 147 /*!
AnnaBridge 145:64910690c574 148 * @name Initialization and deinitialization
AnnaBridge 145:64910690c574 149 * @{
AnnaBridge 145:64910690c574 150 */
AnnaBridge 145:64910690c574 151
AnnaBridge 145:64910690c574 152 /*!
AnnaBridge 145:64910690c574 153 * @brief Ungate the LPTMR clock and configures the peripheral for basic operation.
AnnaBridge 145:64910690c574 154 *
AnnaBridge 145:64910690c574 155 * @note This API should be called at the beginning of the application using the LPTMR driver.
AnnaBridge 145:64910690c574 156 *
AnnaBridge 145:64910690c574 157 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 158 * @param config Pointer to user's LPTMR config structure.
AnnaBridge 145:64910690c574 159 */
AnnaBridge 145:64910690c574 160 void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config);
AnnaBridge 145:64910690c574 161
AnnaBridge 145:64910690c574 162 /*!
AnnaBridge 145:64910690c574 163 * @brief Gate the LPTMR clock
AnnaBridge 145:64910690c574 164 *
AnnaBridge 145:64910690c574 165 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 166 */
AnnaBridge 145:64910690c574 167 void LPTMR_Deinit(LPTMR_Type *base);
AnnaBridge 145:64910690c574 168
AnnaBridge 145:64910690c574 169 /*!
AnnaBridge 145:64910690c574 170 * @brief Fill in the LPTMR config struct with the default settings
AnnaBridge 145:64910690c574 171 *
AnnaBridge 145:64910690c574 172 * The default values are:
AnnaBridge 145:64910690c574 173 * @code
AnnaBridge 145:64910690c574 174 * config->timerMode = kLPTMR_TimerModeTimeCounter;
AnnaBridge 145:64910690c574 175 * config->pinSelect = kLPTMR_PinSelectInput_0;
AnnaBridge 145:64910690c574 176 * config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
AnnaBridge 145:64910690c574 177 * config->enableFreeRunning = false;
AnnaBridge 145:64910690c574 178 * config->bypassPrescaler = true;
AnnaBridge 145:64910690c574 179 * config->prescalerClockSource = kLPTMR_PrescalerClock_1;
AnnaBridge 145:64910690c574 180 * config->value = kLPTMR_Prescale_Glitch_0;
AnnaBridge 145:64910690c574 181 * @endcode
AnnaBridge 145:64910690c574 182 * @param config Pointer to user's LPTMR config structure.
AnnaBridge 145:64910690c574 183 */
AnnaBridge 145:64910690c574 184 void LPTMR_GetDefaultConfig(lptmr_config_t *config);
AnnaBridge 145:64910690c574 185
AnnaBridge 145:64910690c574 186 /*! @}*/
AnnaBridge 145:64910690c574 187
AnnaBridge 145:64910690c574 188 /*!
AnnaBridge 145:64910690c574 189 * @name Interrupt Interface
AnnaBridge 145:64910690c574 190 * @{
AnnaBridge 145:64910690c574 191 */
AnnaBridge 145:64910690c574 192
AnnaBridge 145:64910690c574 193 /*!
AnnaBridge 145:64910690c574 194 * @brief Enables the selected LPTMR interrupts.
AnnaBridge 145:64910690c574 195 *
AnnaBridge 145:64910690c574 196 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 197 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 145:64910690c574 198 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 145:64910690c574 199 */
AnnaBridge 145:64910690c574 200 static inline void LPTMR_EnableInterrupts(LPTMR_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 201 {
AnnaBridge 145:64910690c574 202 uint32_t reg = base->CSR;
AnnaBridge 145:64910690c574 203
AnnaBridge 145:64910690c574 204 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 145:64910690c574 205 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 145:64910690c574 206 reg |= mask;
AnnaBridge 145:64910690c574 207 base->CSR = reg;
AnnaBridge 145:64910690c574 208 }
AnnaBridge 145:64910690c574 209
AnnaBridge 145:64910690c574 210 /*!
AnnaBridge 145:64910690c574 211 * @brief Disables the selected LPTMR interrupts.
AnnaBridge 145:64910690c574 212 *
AnnaBridge 145:64910690c574 213 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 214 * @param mask The interrupts to disable. This is a logical OR of members of the
AnnaBridge 145:64910690c574 215 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 145:64910690c574 216 */
AnnaBridge 145:64910690c574 217 static inline void LPTMR_DisableInterrupts(LPTMR_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 218 {
AnnaBridge 145:64910690c574 219 uint32_t reg = base->CSR;
AnnaBridge 145:64910690c574 220
AnnaBridge 145:64910690c574 221 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 145:64910690c574 222 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 145:64910690c574 223 reg &= ~mask;
AnnaBridge 145:64910690c574 224 base->CSR = reg;
AnnaBridge 145:64910690c574 225 }
AnnaBridge 145:64910690c574 226
AnnaBridge 145:64910690c574 227 /*!
AnnaBridge 145:64910690c574 228 * @brief Gets the enabled LPTMR interrupts.
AnnaBridge 145:64910690c574 229 *
AnnaBridge 145:64910690c574 230 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 231 *
AnnaBridge 145:64910690c574 232 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 145:64910690c574 233 * enumeration ::lptmr_interrupt_enable_t
AnnaBridge 145:64910690c574 234 */
AnnaBridge 145:64910690c574 235 static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type *base)
AnnaBridge 145:64910690c574 236 {
AnnaBridge 145:64910690c574 237 return (base->CSR & LPTMR_CSR_TIE_MASK);
AnnaBridge 145:64910690c574 238 }
AnnaBridge 145:64910690c574 239
AnnaBridge 145:64910690c574 240 /*! @}*/
AnnaBridge 145:64910690c574 241
AnnaBridge 145:64910690c574 242 /*!
AnnaBridge 145:64910690c574 243 * @name Status Interface
AnnaBridge 145:64910690c574 244 * @{
AnnaBridge 145:64910690c574 245 */
AnnaBridge 145:64910690c574 246
AnnaBridge 145:64910690c574 247 /*!
AnnaBridge 145:64910690c574 248 * @brief Gets the LPTMR status flags
AnnaBridge 145:64910690c574 249 *
AnnaBridge 145:64910690c574 250 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 251 *
AnnaBridge 145:64910690c574 252 * @return The status flags. This is the logical OR of members of the
AnnaBridge 145:64910690c574 253 * enumeration ::lptmr_status_flags_t
AnnaBridge 145:64910690c574 254 */
AnnaBridge 145:64910690c574 255 static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type *base)
AnnaBridge 145:64910690c574 256 {
AnnaBridge 145:64910690c574 257 return (base->CSR & LPTMR_CSR_TCF_MASK);
AnnaBridge 145:64910690c574 258 }
AnnaBridge 145:64910690c574 259
AnnaBridge 145:64910690c574 260 /*!
AnnaBridge 145:64910690c574 261 * @brief Clears the LPTMR status flags
AnnaBridge 145:64910690c574 262 *
AnnaBridge 145:64910690c574 263 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 264 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 145:64910690c574 265 * enumeration ::lptmr_status_flags_t
AnnaBridge 145:64910690c574 266 */
AnnaBridge 145:64910690c574 267 static inline void LPTMR_ClearStatusFlags(LPTMR_Type *base, uint32_t mask)
AnnaBridge 145:64910690c574 268 {
AnnaBridge 145:64910690c574 269 base->CSR |= mask;
AnnaBridge 145:64910690c574 270 }
AnnaBridge 145:64910690c574 271
AnnaBridge 145:64910690c574 272 /*! @}*/
AnnaBridge 145:64910690c574 273
AnnaBridge 145:64910690c574 274 /*!
AnnaBridge 145:64910690c574 275 * @name Read and Write the timer period
AnnaBridge 145:64910690c574 276 * @{
AnnaBridge 145:64910690c574 277 */
AnnaBridge 145:64910690c574 278
AnnaBridge 145:64910690c574 279 /*!
AnnaBridge 145:64910690c574 280 * @brief Sets the timer period in units of count.
AnnaBridge 145:64910690c574 281 *
AnnaBridge 145:64910690c574 282 * Timers counts from 0 till it equals the count value set here. The count value is written to
AnnaBridge 145:64910690c574 283 * the CMR register.
AnnaBridge 145:64910690c574 284 *
AnnaBridge 145:64910690c574 285 * @note
AnnaBridge 145:64910690c574 286 * 1. The TCF flag is set with the CNR equals the count provided here and then increments.
AnnaBridge 145:64910690c574 287 * 2. User can call the utility macros provided in fsl_common.h to convert to ticks
AnnaBridge 145:64910690c574 288 *
AnnaBridge 145:64910690c574 289 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 290 * @param ticks Timer period in units of ticks
AnnaBridge 145:64910690c574 291 */
AnnaBridge 145:64910690c574 292 static inline void LPTMR_SetTimerPeriod(LPTMR_Type *base, uint16_t ticks)
AnnaBridge 145:64910690c574 293 {
AnnaBridge 145:64910690c574 294 base->CMR = ticks;
AnnaBridge 145:64910690c574 295 }
AnnaBridge 145:64910690c574 296
AnnaBridge 145:64910690c574 297 /*!
AnnaBridge 145:64910690c574 298 * @brief Reads the current timer counting value.
AnnaBridge 145:64910690c574 299 *
AnnaBridge 145:64910690c574 300 * This function returns the real-time timer counting value, in a range from 0 to a
AnnaBridge 145:64910690c574 301 * timer period.
AnnaBridge 145:64910690c574 302 *
AnnaBridge 145:64910690c574 303 * @note User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec
AnnaBridge 145:64910690c574 304 *
AnnaBridge 145:64910690c574 305 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 306 *
AnnaBridge 145:64910690c574 307 * @return Current counter value in ticks
AnnaBridge 145:64910690c574 308 */
AnnaBridge 145:64910690c574 309 static inline uint16_t LPTMR_GetCurrentTimerCount(LPTMR_Type *base)
AnnaBridge 145:64910690c574 310 {
AnnaBridge 145:64910690c574 311 /* Must first write any value to the CNR. This synchronizes and registers the current value
AnnaBridge 145:64910690c574 312 * of the CNR into a temporary register which can then be read
AnnaBridge 145:64910690c574 313 */
AnnaBridge 145:64910690c574 314 base->CNR = 0U;
AnnaBridge 145:64910690c574 315 return (uint16_t)base->CNR;
AnnaBridge 145:64910690c574 316 }
AnnaBridge 145:64910690c574 317
AnnaBridge 145:64910690c574 318 /*! @}*/
AnnaBridge 145:64910690c574 319
AnnaBridge 145:64910690c574 320 /*!
AnnaBridge 145:64910690c574 321 * @name Timer Start and Stop
AnnaBridge 145:64910690c574 322 * @{
AnnaBridge 145:64910690c574 323 */
AnnaBridge 145:64910690c574 324
AnnaBridge 145:64910690c574 325 /*!
AnnaBridge 145:64910690c574 326 * @brief Starts the timer counting.
AnnaBridge 145:64910690c574 327 *
AnnaBridge 145:64910690c574 328 * After calling this function, the timer counts up to the CMR register value.
AnnaBridge 145:64910690c574 329 * Each time the timer reaches CMR value and then increments, it generates a
AnnaBridge 145:64910690c574 330 * trigger pulse and sets the timeout interrupt flag. An interrupt is also
AnnaBridge 145:64910690c574 331 * triggered if the timer interrupt is enabled.
AnnaBridge 145:64910690c574 332 *
AnnaBridge 145:64910690c574 333 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 334 */
AnnaBridge 145:64910690c574 335 static inline void LPTMR_StartTimer(LPTMR_Type *base)
AnnaBridge 145:64910690c574 336 {
AnnaBridge 145:64910690c574 337 uint32_t reg = base->CSR;
AnnaBridge 145:64910690c574 338
AnnaBridge 145:64910690c574 339 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 145:64910690c574 340 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 145:64910690c574 341 reg |= LPTMR_CSR_TEN_MASK;
AnnaBridge 145:64910690c574 342 base->CSR = reg;
AnnaBridge 145:64910690c574 343 }
AnnaBridge 145:64910690c574 344
AnnaBridge 145:64910690c574 345 /*!
AnnaBridge 145:64910690c574 346 * @brief Stops the timer counting.
AnnaBridge 145:64910690c574 347 *
AnnaBridge 145:64910690c574 348 * This function stops the timer counting and resets the timer's counter register
AnnaBridge 145:64910690c574 349 *
AnnaBridge 145:64910690c574 350 * @param base LPTMR peripheral base address
AnnaBridge 145:64910690c574 351 */
AnnaBridge 145:64910690c574 352 static inline void LPTMR_StopTimer(LPTMR_Type *base)
AnnaBridge 145:64910690c574 353 {
AnnaBridge 145:64910690c574 354 uint32_t reg = base->CSR;
AnnaBridge 145:64910690c574 355
AnnaBridge 145:64910690c574 356 /* Clear the TCF bit so that we don't clear this w1c bit when writing back */
AnnaBridge 145:64910690c574 357 reg &= ~(LPTMR_CSR_TCF_MASK);
AnnaBridge 145:64910690c574 358 reg &= ~LPTMR_CSR_TEN_MASK;
AnnaBridge 145:64910690c574 359 base->CSR = reg;
AnnaBridge 145:64910690c574 360 }
AnnaBridge 145:64910690c574 361
AnnaBridge 145:64910690c574 362 /*! @}*/
AnnaBridge 145:64910690c574 363
AnnaBridge 145:64910690c574 364 #if defined(__cplusplus)
AnnaBridge 145:64910690c574 365 }
AnnaBridge 145:64910690c574 366 #endif
AnnaBridge 145:64910690c574 367
AnnaBridge 145:64910690c574 368 /*! @}*/
AnnaBridge 145:64910690c574 369
AnnaBridge 145:64910690c574 370 #endif /* _FSL_LPTMR_H_ */