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TARGET_KL43Z/TOOLCHAIN_IAR/fsl_port.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SDRVL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_PORT_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_PORT_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup port_driver
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*! @file */
AnnaBridge 171:3a7713b1edbc 41
AnnaBridge 171:3a7713b1edbc 42 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 43 * Definitions
AnnaBridge 171:3a7713b1edbc 44 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 47 /*@{*/
AnnaBridge 171:3a7713b1edbc 48 /*! Version 2.0.1. */
AnnaBridge 171:3a7713b1edbc 49 #define FSL_PORT_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
AnnaBridge 171:3a7713b1edbc 50 /*@}*/
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 /*! @brief Internal resistor pull feature selection */
AnnaBridge 171:3a7713b1edbc 53 enum _port_pull
AnnaBridge 171:3a7713b1edbc 54 {
AnnaBridge 171:3a7713b1edbc 55 kPORT_PullDisable = 0U, /*!< internal pull-up/down resistor is disabled. */
AnnaBridge 171:3a7713b1edbc 56 kPORT_PullDown = 2U, /*!< internal pull-down resistor is enabled. */
AnnaBridge 171:3a7713b1edbc 57 kPORT_PullUp = 3U, /*!< internal pull-up resistor is enabled. */
AnnaBridge 171:3a7713b1edbc 58 };
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /*! @brief Slew rate selection */
AnnaBridge 171:3a7713b1edbc 61 enum _port_slew_rate
AnnaBridge 171:3a7713b1edbc 62 {
AnnaBridge 171:3a7713b1edbc 63 kPORT_FastSlewRate = 0U, /*!< fast slew rate is configured. */
AnnaBridge 171:3a7713b1edbc 64 kPORT_SlowSlewRate = 1U, /*!< slow slew rate is configured. */
AnnaBridge 171:3a7713b1edbc 65 };
AnnaBridge 171:3a7713b1edbc 66
AnnaBridge 171:3a7713b1edbc 67 #if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
AnnaBridge 171:3a7713b1edbc 68 /*! @brief Internal resistor pull feature enable/disable */
AnnaBridge 171:3a7713b1edbc 69 enum _port_open_drain_enable
AnnaBridge 171:3a7713b1edbc 70 {
AnnaBridge 171:3a7713b1edbc 71 kPORT_OpenDrainDisable = 0U, /*!< internal pull-down resistor is disabled. */
AnnaBridge 171:3a7713b1edbc 72 kPORT_OpenDrainEnable = 1U, /*!< internal pull-up resistor is enabled. */
AnnaBridge 171:3a7713b1edbc 73 };
AnnaBridge 171:3a7713b1edbc 74 #endif /* FSL_FEATURE_PORT_HAS_OPEN_DRAIN */
AnnaBridge 171:3a7713b1edbc 75
AnnaBridge 171:3a7713b1edbc 76 /*! @brief Passive filter feature enable/disable */
AnnaBridge 171:3a7713b1edbc 77 enum _port_passive_filter_enable
AnnaBridge 171:3a7713b1edbc 78 {
AnnaBridge 171:3a7713b1edbc 79 kPORT_PassiveFilterDisable = 0U, /*!< fast slew rate is configured. */
AnnaBridge 171:3a7713b1edbc 80 kPORT_PassiveFilterEnable = 1U, /*!< slow slew rate is configured. */
AnnaBridge 171:3a7713b1edbc 81 };
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 /*! @brief Configures the drive strength. */
AnnaBridge 171:3a7713b1edbc 84 enum _port_drive_strength
AnnaBridge 171:3a7713b1edbc 85 {
AnnaBridge 171:3a7713b1edbc 86 kPORT_LowDriveStrength = 0U, /*!< low drive strength is configured. */
AnnaBridge 171:3a7713b1edbc 87 kPORT_HighDriveStrength = 1U, /*!< high drive strength is configured. */
AnnaBridge 171:3a7713b1edbc 88 };
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 #if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
AnnaBridge 171:3a7713b1edbc 91 /*! @brief Unlock/lock the pin control register field[15:0] */
AnnaBridge 171:3a7713b1edbc 92 enum _port_lock_register
AnnaBridge 171:3a7713b1edbc 93 {
AnnaBridge 171:3a7713b1edbc 94 kPORT_UnlockRegister = 0U, /*!< Pin Control Register fields [15:0] are not locked. */
AnnaBridge 171:3a7713b1edbc 95 kPORT_LockRegister = 1U, /*!< Pin Control Register fields [15:0] are locked. */
AnnaBridge 171:3a7713b1edbc 96 };
AnnaBridge 171:3a7713b1edbc 97 #endif /* FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK */
AnnaBridge 171:3a7713b1edbc 98
AnnaBridge 171:3a7713b1edbc 99 /*! @brief Pin mux selection */
AnnaBridge 171:3a7713b1edbc 100 typedef enum _port_mux
AnnaBridge 171:3a7713b1edbc 101 {
AnnaBridge 171:3a7713b1edbc 102 kPORT_PinDisabledOrAnalog = 0U, /*!< corresponding pin is disabled, but is used as an analog pin. */
AnnaBridge 171:3a7713b1edbc 103 kPORT_MuxAsGpio = 1U, /*!< corresponding pin is configured as GPIO. */
AnnaBridge 171:3a7713b1edbc 104 kPORT_MuxAlt2 = 2U, /*!< chip-specific */
AnnaBridge 171:3a7713b1edbc 105 kPORT_MuxAlt3 = 3U, /*!< chip-specific */
AnnaBridge 171:3a7713b1edbc 106 kPORT_MuxAlt4 = 4U, /*!< chip-specific */
AnnaBridge 171:3a7713b1edbc 107 kPORT_MuxAlt5 = 5U, /*!< chip-specific */
AnnaBridge 171:3a7713b1edbc 108 kPORT_MuxAlt6 = 6U, /*!< chip-specific */
AnnaBridge 171:3a7713b1edbc 109 kPORT_MuxAlt7 = 7U, /*!< chip-specific */
AnnaBridge 171:3a7713b1edbc 110 } port_mux_t;
AnnaBridge 171:3a7713b1edbc 111
AnnaBridge 171:3a7713b1edbc 112 /*! @brief Configures the interrupt generation condition. */
AnnaBridge 171:3a7713b1edbc 113 typedef enum _port_interrupt
AnnaBridge 171:3a7713b1edbc 114 {
AnnaBridge 171:3a7713b1edbc 115 kPORT_InterruptOrDMADisabled = 0x0U, /*!< Interrupt/DMA request is disabled. */
AnnaBridge 171:3a7713b1edbc 116 #if defined(FSL_FEATURE_PORT_HAS_DMA_REQUEST) && FSL_FEATURE_PORT_HAS_DMA_REQUEST
AnnaBridge 171:3a7713b1edbc 117 kPORT_DMARisingEdge = 0x1U, /*!< DMA request on rising edge. */
AnnaBridge 171:3a7713b1edbc 118 kPORT_DMAFallingEdge = 0x2U, /*!< DMA request on falling edge. */
AnnaBridge 171:3a7713b1edbc 119 kPORT_DMAEitherEdge = 0x3U, /*!< DMA request on either edge. */
AnnaBridge 171:3a7713b1edbc 120 #endif
AnnaBridge 171:3a7713b1edbc 121 #if defined(FSL_FEATURE_PORT_HAS_IRQC_FLAG) && FSL_FEATURE_PORT_HAS_IRQC_FLAG
AnnaBridge 171:3a7713b1edbc 122 kPORT_FlagRisingEdge = 0x05U, /*!< Flag sets on rising edge. */
AnnaBridge 171:3a7713b1edbc 123 kPORT_FlagFallingEdge = 0x06U, /*!< Flag sets on falling edge. */
AnnaBridge 171:3a7713b1edbc 124 kPORT_FlagEitherEdge = 0x07U, /*!< Flag sets on either edge. */
AnnaBridge 171:3a7713b1edbc 125 #endif
AnnaBridge 171:3a7713b1edbc 126 kPORT_InterruptLogicZero = 0x8U, /*!< Interrupt when logic zero. */
AnnaBridge 171:3a7713b1edbc 127 kPORT_InterruptRisingEdge = 0x9U, /*!< Interrupt on rising edge. */
AnnaBridge 171:3a7713b1edbc 128 kPORT_InterruptFallingEdge = 0xAU, /*!< Interrupt on falling edge. */
AnnaBridge 171:3a7713b1edbc 129 kPORT_InterruptEitherEdge = 0xBU, /*!< Interrupt on either edge. */
AnnaBridge 171:3a7713b1edbc 130 kPORT_InterruptLogicOne = 0xCU, /*!< Interrupt when logic one. */
AnnaBridge 171:3a7713b1edbc 131 #if defined(FSL_FEATURE_PORT_HAS_IRQC_TRIGGER) && FSL_FEATURE_PORT_HAS_IRQC_TRIGGER
AnnaBridge 171:3a7713b1edbc 132 kPORT_ActiveHighTriggerOutputEnable = 0xDU, /*!< Enable active high trigger output. */
AnnaBridge 171:3a7713b1edbc 133 kPORT_ActiveLowTriggerOutputEnable = 0xEU, /*!< Enable active low trigger output. */
AnnaBridge 171:3a7713b1edbc 134 #endif
AnnaBridge 171:3a7713b1edbc 135 } port_interrupt_t;
AnnaBridge 171:3a7713b1edbc 136
AnnaBridge 171:3a7713b1edbc 137 #if defined(FSL_FEATURE_PORT_HAS_DIGITAL_FILTER) && FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
AnnaBridge 171:3a7713b1edbc 138 /*! @brief Digital filter clock source selection */
AnnaBridge 171:3a7713b1edbc 139 typedef enum _port_digital_filter_clock_source
AnnaBridge 171:3a7713b1edbc 140 {
AnnaBridge 171:3a7713b1edbc 141 kPORT_BusClock = 0U, /*!< Digital filters are clocked by the bus clock. */
AnnaBridge 171:3a7713b1edbc 142 kPORT_LpoClock = 1U, /*!< Digital filters are clocked by the 1 kHz LPO clock. */
AnnaBridge 171:3a7713b1edbc 143 } port_digital_filter_clock_source_t;
AnnaBridge 171:3a7713b1edbc 144
AnnaBridge 171:3a7713b1edbc 145 /*! @brief PORT digital filter feature configuration definition */
AnnaBridge 171:3a7713b1edbc 146 typedef struct _port_digital_filter_config
AnnaBridge 171:3a7713b1edbc 147 {
AnnaBridge 171:3a7713b1edbc 148 uint32_t digitalFilterWidth; /*!< Set digital filter width */
AnnaBridge 171:3a7713b1edbc 149 port_digital_filter_clock_source_t clockSource; /*!< Set digital filter clockSource */
AnnaBridge 171:3a7713b1edbc 150 } port_digital_filter_config_t;
AnnaBridge 171:3a7713b1edbc 151 #endif /* FSL_FEATURE_PORT_HAS_DIGITAL_FILTER */
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /*! @brief PORT pin config structure */
AnnaBridge 171:3a7713b1edbc 154 typedef struct _port_pin_config
AnnaBridge 171:3a7713b1edbc 155 {
AnnaBridge 171:3a7713b1edbc 156 uint16_t pullSelect : 2; /*!< no-pull/pull-down/pull-up select */
AnnaBridge 171:3a7713b1edbc 157 uint16_t slewRate : 1; /*!< fast/slow slew rate Configure */
AnnaBridge 171:3a7713b1edbc 158 uint16_t : 1;
AnnaBridge 171:3a7713b1edbc 159 uint16_t passiveFilterEnable : 1; /*!< passive filter enable/disable */
AnnaBridge 171:3a7713b1edbc 160 #if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
AnnaBridge 171:3a7713b1edbc 161 uint16_t openDrainEnable : 1; /*!< open drain enable/disable */
AnnaBridge 171:3a7713b1edbc 162 #else
AnnaBridge 171:3a7713b1edbc 163 uint16_t : 1;
AnnaBridge 171:3a7713b1edbc 164 #endif /* FSL_FEATURE_PORT_HAS_OPEN_DRAIN */
AnnaBridge 171:3a7713b1edbc 165 uint16_t driveStrength : 1; /*!< fast/slow drive strength configure */
AnnaBridge 171:3a7713b1edbc 166 uint16_t : 1;
AnnaBridge 171:3a7713b1edbc 167 uint16_t mux : 3; /*!< pin mux Configure */
AnnaBridge 171:3a7713b1edbc 168 uint16_t : 4;
AnnaBridge 171:3a7713b1edbc 169 #if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
AnnaBridge 171:3a7713b1edbc 170 uint16_t lockRegister : 1; /*!< lock/unlock the pcr field[15:0] */
AnnaBridge 171:3a7713b1edbc 171 #else
AnnaBridge 171:3a7713b1edbc 172 uint16_t : 1;
AnnaBridge 171:3a7713b1edbc 173 #endif /* FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK */
AnnaBridge 171:3a7713b1edbc 174 } port_pin_config_t;
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 177 * API
AnnaBridge 171:3a7713b1edbc 178 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 179
AnnaBridge 171:3a7713b1edbc 180 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 181 extern "C" {
AnnaBridge 171:3a7713b1edbc 182 #endif
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 /*! @name Configuration */
AnnaBridge 171:3a7713b1edbc 185 /*@{*/
AnnaBridge 171:3a7713b1edbc 186
AnnaBridge 171:3a7713b1edbc 187 /*!
AnnaBridge 171:3a7713b1edbc 188 * @brief Sets the port PCR register.
AnnaBridge 171:3a7713b1edbc 189 *
AnnaBridge 171:3a7713b1edbc 190 * This is an example to define an input pin or output pin PCR configuration:
AnnaBridge 171:3a7713b1edbc 191 * @code
AnnaBridge 171:3a7713b1edbc 192 * // Define a digital input pin PCR configuration
AnnaBridge 171:3a7713b1edbc 193 * port_pin_config_t config = {
AnnaBridge 171:3a7713b1edbc 194 * kPORT_PullUp,
AnnaBridge 171:3a7713b1edbc 195 * kPORT_FastSlewRate,
AnnaBridge 171:3a7713b1edbc 196 * kPORT_PassiveFilterDisable,
AnnaBridge 171:3a7713b1edbc 197 * kPORT_OpenDrainDisable,
AnnaBridge 171:3a7713b1edbc 198 * kPORT_LowDriveStrength,
AnnaBridge 171:3a7713b1edbc 199 * kPORT_MuxAsGpio,
AnnaBridge 171:3a7713b1edbc 200 * kPORT_UnLockRegister,
AnnaBridge 171:3a7713b1edbc 201 * };
AnnaBridge 171:3a7713b1edbc 202 * @endcode
AnnaBridge 171:3a7713b1edbc 203 *
AnnaBridge 171:3a7713b1edbc 204 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 205 * @param pin PORT pin number.
AnnaBridge 171:3a7713b1edbc 206 * @param config PORT PCR register configure structure.
AnnaBridge 171:3a7713b1edbc 207 */
AnnaBridge 171:3a7713b1edbc 208 static inline void PORT_SetPinConfig(PORT_Type *base, uint32_t pin, const port_pin_config_t *config)
AnnaBridge 171:3a7713b1edbc 209 {
AnnaBridge 171:3a7713b1edbc 210 assert(config);
AnnaBridge 171:3a7713b1edbc 211 uint32_t addr = (uint32_t)&base->PCR[pin];
AnnaBridge 171:3a7713b1edbc 212 *(volatile uint16_t *)(addr) = *((const uint16_t *)config);
AnnaBridge 171:3a7713b1edbc 213 }
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 /*!
AnnaBridge 171:3a7713b1edbc 216 * @brief Sets the port PCR register for multiple pins.
AnnaBridge 171:3a7713b1edbc 217 *
AnnaBridge 171:3a7713b1edbc 218 * This is an example to define input pins or output pins PCR configuration:
AnnaBridge 171:3a7713b1edbc 219 * @code
AnnaBridge 171:3a7713b1edbc 220 * // Define a digital input pin PCR configuration
AnnaBridge 171:3a7713b1edbc 221 * port_pin_config_t config = {
AnnaBridge 171:3a7713b1edbc 222 * kPORT_PullUp ,
AnnaBridge 171:3a7713b1edbc 223 * kPORT_PullEnable,
AnnaBridge 171:3a7713b1edbc 224 * kPORT_FastSlewRate,
AnnaBridge 171:3a7713b1edbc 225 * kPORT_PassiveFilterDisable,
AnnaBridge 171:3a7713b1edbc 226 * kPORT_OpenDrainDisable,
AnnaBridge 171:3a7713b1edbc 227 * kPORT_LowDriveStrength,
AnnaBridge 171:3a7713b1edbc 228 * kPORT_MuxAsGpio,
AnnaBridge 171:3a7713b1edbc 229 * kPORT_UnlockRegister,
AnnaBridge 171:3a7713b1edbc 230 * };
AnnaBridge 171:3a7713b1edbc 231 * @endcode
AnnaBridge 171:3a7713b1edbc 232 *
AnnaBridge 171:3a7713b1edbc 233 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 234 * @param mask PORT pins' numbers macro.
AnnaBridge 171:3a7713b1edbc 235 * @param config PORT PCR register configure structure.
AnnaBridge 171:3a7713b1edbc 236 */
AnnaBridge 171:3a7713b1edbc 237 static inline void PORT_SetMultiplePinsConfig(PORT_Type *base, uint32_t mask, const port_pin_config_t *config)
AnnaBridge 171:3a7713b1edbc 238 {
AnnaBridge 171:3a7713b1edbc 239 assert(config);
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241 uint16_t pcrl = *((const uint16_t *)config);
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 if (mask & 0xffffU)
AnnaBridge 171:3a7713b1edbc 244 {
AnnaBridge 171:3a7713b1edbc 245 base->GPCLR = ((mask & 0xffffU) << 16) | pcrl;
AnnaBridge 171:3a7713b1edbc 246 }
AnnaBridge 171:3a7713b1edbc 247 if (mask >> 16)
AnnaBridge 171:3a7713b1edbc 248 {
AnnaBridge 171:3a7713b1edbc 249 base->GPCHR = (mask & 0xffff0000U) | pcrl;
AnnaBridge 171:3a7713b1edbc 250 }
AnnaBridge 171:3a7713b1edbc 251 }
AnnaBridge 171:3a7713b1edbc 252
AnnaBridge 171:3a7713b1edbc 253 /*!
AnnaBridge 171:3a7713b1edbc 254 * @brief Configures the pin muxing.
AnnaBridge 171:3a7713b1edbc 255 *
AnnaBridge 171:3a7713b1edbc 256 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 257 * @param pin PORT pin number.
AnnaBridge 171:3a7713b1edbc 258 * @param mux pin muxing slot selection.
AnnaBridge 171:3a7713b1edbc 259 * - #kPORT_PinDisabledOrAnalog: Pin disabled or work in analog function.
AnnaBridge 171:3a7713b1edbc 260 * - #kPORT_MuxAsGpio : Set as GPIO.
AnnaBridge 171:3a7713b1edbc 261 * - #kPORT_MuxAlt2 : chip-specific.
AnnaBridge 171:3a7713b1edbc 262 * - #kPORT_MuxAlt3 : chip-specific.
AnnaBridge 171:3a7713b1edbc 263 * - #kPORT_MuxAlt4 : chip-specific.
AnnaBridge 171:3a7713b1edbc 264 * - #kPORT_MuxAlt5 : chip-specific.
AnnaBridge 171:3a7713b1edbc 265 * - #kPORT_MuxAlt6 : chip-specific.
AnnaBridge 171:3a7713b1edbc 266 * - #kPORT_MuxAlt7 : chip-specific.
AnnaBridge 171:3a7713b1edbc 267 * @Note : This function is NOT recommended to use together with the PORT_SetPinsConfig, because
AnnaBridge 171:3a7713b1edbc 268 * the PORT_SetPinsConfig need to configure the pin mux anyway (Otherwise the pin mux will
AnnaBridge 171:3a7713b1edbc 269 * be reset to zero : kPORT_PinDisabledOrAnalog).
AnnaBridge 171:3a7713b1edbc 270 * This function is recommended to use in the case you just need to reset the pin mux
AnnaBridge 171:3a7713b1edbc 271 *
AnnaBridge 171:3a7713b1edbc 272 */
AnnaBridge 171:3a7713b1edbc 273 static inline void PORT_SetPinMux(PORT_Type *base, uint32_t pin, port_mux_t mux)
AnnaBridge 171:3a7713b1edbc 274 {
AnnaBridge 171:3a7713b1edbc 275 base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_MUX_MASK) | PORT_PCR_MUX(mux);
AnnaBridge 171:3a7713b1edbc 276 }
AnnaBridge 171:3a7713b1edbc 277
AnnaBridge 171:3a7713b1edbc 278 #if defined(FSL_FEATURE_PORT_HAS_DIGITAL_FILTER) && FSL_FEATURE_PORT_HAS_DIGITAL_FILTER
AnnaBridge 171:3a7713b1edbc 279
AnnaBridge 171:3a7713b1edbc 280 /*!
AnnaBridge 171:3a7713b1edbc 281 * @brief Enables the digital filter in one port, each bit of the 32-bit register represents one pin.
AnnaBridge 171:3a7713b1edbc 282 *
AnnaBridge 171:3a7713b1edbc 283 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 284 * @param mask PORT pins' numbers macro.
AnnaBridge 171:3a7713b1edbc 285 */
AnnaBridge 171:3a7713b1edbc 286 static inline void PORT_EnablePinsDigitalFilter(PORT_Type *base, uint32_t mask, bool enable)
AnnaBridge 171:3a7713b1edbc 287 {
AnnaBridge 171:3a7713b1edbc 288 if (enable == true)
AnnaBridge 171:3a7713b1edbc 289 {
AnnaBridge 171:3a7713b1edbc 290 base->DFER |= mask;
AnnaBridge 171:3a7713b1edbc 291 }
AnnaBridge 171:3a7713b1edbc 292 else
AnnaBridge 171:3a7713b1edbc 293 {
AnnaBridge 171:3a7713b1edbc 294 base->DFER &= ~mask;
AnnaBridge 171:3a7713b1edbc 295 }
AnnaBridge 171:3a7713b1edbc 296 }
AnnaBridge 171:3a7713b1edbc 297
AnnaBridge 171:3a7713b1edbc 298 /*!
AnnaBridge 171:3a7713b1edbc 299 * @brief Sets the digital filter in one port, each bit of the 32-bit register represents one pin.
AnnaBridge 171:3a7713b1edbc 300 *
AnnaBridge 171:3a7713b1edbc 301 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 302 * @param config PORT digital filter configuration structure.
AnnaBridge 171:3a7713b1edbc 303 */
AnnaBridge 171:3a7713b1edbc 304 static inline void PORT_SetDigitalFilterConfig(PORT_Type *base, const port_digital_filter_config_t *config)
AnnaBridge 171:3a7713b1edbc 305 {
AnnaBridge 171:3a7713b1edbc 306 assert(config);
AnnaBridge 171:3a7713b1edbc 307
AnnaBridge 171:3a7713b1edbc 308 base->DFCR = PORT_DFCR_CS(config->clockSource);
AnnaBridge 171:3a7713b1edbc 309 base->DFWR = PORT_DFWR_FILT(config->digitalFilterWidth);
AnnaBridge 171:3a7713b1edbc 310 }
AnnaBridge 171:3a7713b1edbc 311
AnnaBridge 171:3a7713b1edbc 312 #endif /* FSL_FEATURE_PORT_HAS_DIGITAL_FILTER */
AnnaBridge 171:3a7713b1edbc 313
AnnaBridge 171:3a7713b1edbc 314 /*@}*/
AnnaBridge 171:3a7713b1edbc 315
AnnaBridge 171:3a7713b1edbc 316 /*! @name Interrupt */
AnnaBridge 171:3a7713b1edbc 317 /*@{*/
AnnaBridge 171:3a7713b1edbc 318
AnnaBridge 171:3a7713b1edbc 319 /*!
AnnaBridge 171:3a7713b1edbc 320 * @brief Configures the port pin interrupt/DMA request.
AnnaBridge 171:3a7713b1edbc 321 *
AnnaBridge 171:3a7713b1edbc 322 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 323 * @param pin PORT pin number.
AnnaBridge 171:3a7713b1edbc 324 * @param config PORT pin interrupt configuration.
AnnaBridge 171:3a7713b1edbc 325 * - #kPORT_InterruptOrDMADisabled: Interrupt/DMA request disabled.
AnnaBridge 171:3a7713b1edbc 326 * - #kPORT_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
AnnaBridge 171:3a7713b1edbc 327 * - #kPORT_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
AnnaBridge 171:3a7713b1edbc 328 * - #kPORT_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
AnnaBridge 171:3a7713b1edbc 329 * - #kPORT_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
AnnaBridge 171:3a7713b1edbc 330 * - #kPORT_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
AnnaBridge 171:3a7713b1edbc 331 * - #kPORT_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
AnnaBridge 171:3a7713b1edbc 332 * - #kPORT_InterruptLogicZero : Interrupt when logic zero.
AnnaBridge 171:3a7713b1edbc 333 * - #kPORT_InterruptRisingEdge : Interrupt on rising edge.
AnnaBridge 171:3a7713b1edbc 334 * - #kPORT_InterruptFallingEdge: Interrupt on falling edge.
AnnaBridge 171:3a7713b1edbc 335 * - #kPORT_InterruptEitherEdge : Interrupt on either edge.
AnnaBridge 171:3a7713b1edbc 336 * - #kPORT_InterruptLogicOne : Interrupt when logic one.
AnnaBridge 171:3a7713b1edbc 337 * - #kPORT_ActiveHighTriggerOutputEnable : Enable active high trigger output(if the trigger states exit).
AnnaBridge 171:3a7713b1edbc 338 * - #kPORT_ActiveLowTriggerOutputEnable : Enable active low trigger output(if the trigger states exit).
AnnaBridge 171:3a7713b1edbc 339 */
AnnaBridge 171:3a7713b1edbc 340 static inline void PORT_SetPinInterruptConfig(PORT_Type *base, uint32_t pin, port_interrupt_t config)
AnnaBridge 171:3a7713b1edbc 341 {
AnnaBridge 171:3a7713b1edbc 342 base->PCR[pin] = (base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | PORT_PCR_IRQC(config);
AnnaBridge 171:3a7713b1edbc 343 }
AnnaBridge 171:3a7713b1edbc 344
AnnaBridge 171:3a7713b1edbc 345 /*!
AnnaBridge 171:3a7713b1edbc 346 * @brief Reads the whole port status flag.
AnnaBridge 171:3a7713b1edbc 347 *
AnnaBridge 171:3a7713b1edbc 348 * If a pin is configured to generate the DMA request, the corresponding flag
AnnaBridge 171:3a7713b1edbc 349 * is cleared automatically at the completion of the requested DMA transfer.
AnnaBridge 171:3a7713b1edbc 350 * Otherwise, the flag remains set until a logic one is written to that flag.
AnnaBridge 171:3a7713b1edbc 351 * If configured for a level sensitive interrupt that remains asserted, the flag
AnnaBridge 171:3a7713b1edbc 352 * is set again immediately.
AnnaBridge 171:3a7713b1edbc 353 *
AnnaBridge 171:3a7713b1edbc 354 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 355 * @return Current port interrupt status flags, for example, 0x00010001 means the
AnnaBridge 171:3a7713b1edbc 356 * pin 0 and 17 have the interrupt.
AnnaBridge 171:3a7713b1edbc 357 */
AnnaBridge 171:3a7713b1edbc 358 static inline uint32_t PORT_GetPinsInterruptFlags(PORT_Type *base)
AnnaBridge 171:3a7713b1edbc 359 {
AnnaBridge 171:3a7713b1edbc 360 return base->ISFR;
AnnaBridge 171:3a7713b1edbc 361 }
AnnaBridge 171:3a7713b1edbc 362
AnnaBridge 171:3a7713b1edbc 363 /*!
AnnaBridge 171:3a7713b1edbc 364 * @brief Clears the multiple pins' interrupt status flag.
AnnaBridge 171:3a7713b1edbc 365 *
AnnaBridge 171:3a7713b1edbc 366 * @param base PORT peripheral base pointer.
AnnaBridge 171:3a7713b1edbc 367 * @param mask PORT pins' numbers macro.
AnnaBridge 171:3a7713b1edbc 368 */
AnnaBridge 171:3a7713b1edbc 369 static inline void PORT_ClearPinsInterruptFlags(PORT_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 370 {
AnnaBridge 171:3a7713b1edbc 371 base->ISFR = mask;
AnnaBridge 171:3a7713b1edbc 372 }
AnnaBridge 171:3a7713b1edbc 373
AnnaBridge 171:3a7713b1edbc 374 /*@}*/
AnnaBridge 171:3a7713b1edbc 375
AnnaBridge 171:3a7713b1edbc 376 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 377 }
AnnaBridge 171:3a7713b1edbc 378 #endif
AnnaBridge 171:3a7713b1edbc 379
AnnaBridge 171:3a7713b1edbc 380 /*! @}*/
AnnaBridge 171:3a7713b1edbc 381
AnnaBridge 171:3a7713b1edbc 382 #endif /* _FSL_PORT_H_ */