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TARGET_K66F/TOOLCHAIN_GCC_ARM/fsl_tpm.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * Copyright 2016-2017 NXP
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of the copyright holder nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30 #ifndef _FSL_TPM_H_
AnnaBridge 171:3a7713b1edbc 31 #define _FSL_TPM_H_
AnnaBridge 171:3a7713b1edbc 32
AnnaBridge 171:3a7713b1edbc 33 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 34
AnnaBridge 171:3a7713b1edbc 35 /*!
AnnaBridge 171:3a7713b1edbc 36 * @addtogroup tpm
AnnaBridge 171:3a7713b1edbc 37 * @{
AnnaBridge 171:3a7713b1edbc 38 */
AnnaBridge 171:3a7713b1edbc 39
AnnaBridge 171:3a7713b1edbc 40 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 41 * Definitions
AnnaBridge 171:3a7713b1edbc 42 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 43
AnnaBridge 171:3a7713b1edbc 44 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 45 /*@{*/
AnnaBridge 171:3a7713b1edbc 46 #define FSL_TPM_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) /*!< Version 2.0.2 */
AnnaBridge 171:3a7713b1edbc 47 /*@}*/
AnnaBridge 171:3a7713b1edbc 48
AnnaBridge 171:3a7713b1edbc 49 /*!
AnnaBridge 171:3a7713b1edbc 50 * @brief List of TPM channels.
AnnaBridge 171:3a7713b1edbc 51 * @note Actual number of available channels is SoC dependent
AnnaBridge 171:3a7713b1edbc 52 */
AnnaBridge 171:3a7713b1edbc 53 typedef enum _tpm_chnl
AnnaBridge 171:3a7713b1edbc 54 {
AnnaBridge 171:3a7713b1edbc 55 kTPM_Chnl_0 = 0U, /*!< TPM channel number 0*/
AnnaBridge 171:3a7713b1edbc 56 kTPM_Chnl_1, /*!< TPM channel number 1 */
AnnaBridge 171:3a7713b1edbc 57 kTPM_Chnl_2, /*!< TPM channel number 2 */
AnnaBridge 171:3a7713b1edbc 58 kTPM_Chnl_3, /*!< TPM channel number 3 */
AnnaBridge 171:3a7713b1edbc 59 kTPM_Chnl_4, /*!< TPM channel number 4 */
AnnaBridge 171:3a7713b1edbc 60 kTPM_Chnl_5, /*!< TPM channel number 5 */
AnnaBridge 171:3a7713b1edbc 61 kTPM_Chnl_6, /*!< TPM channel number 6 */
AnnaBridge 171:3a7713b1edbc 62 kTPM_Chnl_7 /*!< TPM channel number 7 */
AnnaBridge 171:3a7713b1edbc 63 } tpm_chnl_t;
AnnaBridge 171:3a7713b1edbc 64
AnnaBridge 171:3a7713b1edbc 65 /*! @brief TPM PWM operation modes */
AnnaBridge 171:3a7713b1edbc 66 typedef enum _tpm_pwm_mode
AnnaBridge 171:3a7713b1edbc 67 {
AnnaBridge 171:3a7713b1edbc 68 kTPM_EdgeAlignedPwm = 0U, /*!< Edge aligned PWM */
AnnaBridge 171:3a7713b1edbc 69 kTPM_CenterAlignedPwm, /*!< Center aligned PWM */
AnnaBridge 171:3a7713b1edbc 70 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 171:3a7713b1edbc 71 kTPM_CombinedPwm /*!< Combined PWM */
AnnaBridge 171:3a7713b1edbc 72 #endif
AnnaBridge 171:3a7713b1edbc 73 } tpm_pwm_mode_t;
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 /*! @brief TPM PWM output pulse mode: high-true, low-true or no output */
AnnaBridge 171:3a7713b1edbc 76 typedef enum _tpm_pwm_level_select
AnnaBridge 171:3a7713b1edbc 77 {
AnnaBridge 171:3a7713b1edbc 78 kTPM_NoPwmSignal = 0U, /*!< No PWM output on pin */
AnnaBridge 171:3a7713b1edbc 79 kTPM_LowTrue, /*!< Low true pulses */
AnnaBridge 171:3a7713b1edbc 80 kTPM_HighTrue /*!< High true pulses */
AnnaBridge 171:3a7713b1edbc 81 } tpm_pwm_level_select_t;
AnnaBridge 171:3a7713b1edbc 82
AnnaBridge 171:3a7713b1edbc 83 /*! @brief Options to configure a TPM channel's PWM signal */
AnnaBridge 171:3a7713b1edbc 84 typedef struct _tpm_chnl_pwm_signal_param
AnnaBridge 171:3a7713b1edbc 85 {
AnnaBridge 171:3a7713b1edbc 86 tpm_chnl_t chnlNumber; /*!< TPM channel to configure.
AnnaBridge 171:3a7713b1edbc 87 In combined mode (available in some SoC's, this represents the
AnnaBridge 171:3a7713b1edbc 88 channel pair number */
AnnaBridge 171:3a7713b1edbc 89 tpm_pwm_level_select_t level; /*!< PWM output active level select */
AnnaBridge 171:3a7713b1edbc 90 uint8_t dutyCyclePercent; /*!< PWM pulse width, value should be between 0 to 100
AnnaBridge 171:3a7713b1edbc 91 0=inactive signal(0% duty cycle)...
AnnaBridge 171:3a7713b1edbc 92 100=always active signal (100% duty cycle)*/
AnnaBridge 171:3a7713b1edbc 93 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 171:3a7713b1edbc 94 uint8_t firstEdgeDelayPercent; /*!< Used only in combined PWM mode to generate asymmetrical PWM.
AnnaBridge 171:3a7713b1edbc 95 Specifies the delay to the first edge in a PWM period.
AnnaBridge 171:3a7713b1edbc 96 If unsure, leave as 0; Should be specified as
AnnaBridge 171:3a7713b1edbc 97 percentage of the PWM period */
AnnaBridge 171:3a7713b1edbc 98 #endif
AnnaBridge 171:3a7713b1edbc 99 } tpm_chnl_pwm_signal_param_t;
AnnaBridge 171:3a7713b1edbc 100
AnnaBridge 171:3a7713b1edbc 101 /*!
AnnaBridge 171:3a7713b1edbc 102 * @brief Trigger options available.
AnnaBridge 171:3a7713b1edbc 103 *
AnnaBridge 171:3a7713b1edbc 104 * This is used for both internal & external trigger sources (external option available in certain SoC's)
AnnaBridge 171:3a7713b1edbc 105 *
AnnaBridge 171:3a7713b1edbc 106 * @note The actual trigger options available is SoC-specific.
AnnaBridge 171:3a7713b1edbc 107 */
AnnaBridge 171:3a7713b1edbc 108 typedef enum _tpm_trigger_select
AnnaBridge 171:3a7713b1edbc 109 {
AnnaBridge 171:3a7713b1edbc 110 kTPM_Trigger_Select_0 = 0U,
AnnaBridge 171:3a7713b1edbc 111 kTPM_Trigger_Select_1,
AnnaBridge 171:3a7713b1edbc 112 kTPM_Trigger_Select_2,
AnnaBridge 171:3a7713b1edbc 113 kTPM_Trigger_Select_3,
AnnaBridge 171:3a7713b1edbc 114 kTPM_Trigger_Select_4,
AnnaBridge 171:3a7713b1edbc 115 kTPM_Trigger_Select_5,
AnnaBridge 171:3a7713b1edbc 116 kTPM_Trigger_Select_6,
AnnaBridge 171:3a7713b1edbc 117 kTPM_Trigger_Select_7,
AnnaBridge 171:3a7713b1edbc 118 kTPM_Trigger_Select_8,
AnnaBridge 171:3a7713b1edbc 119 kTPM_Trigger_Select_9,
AnnaBridge 171:3a7713b1edbc 120 kTPM_Trigger_Select_10,
AnnaBridge 171:3a7713b1edbc 121 kTPM_Trigger_Select_11,
AnnaBridge 171:3a7713b1edbc 122 kTPM_Trigger_Select_12,
AnnaBridge 171:3a7713b1edbc 123 kTPM_Trigger_Select_13,
AnnaBridge 171:3a7713b1edbc 124 kTPM_Trigger_Select_14,
AnnaBridge 171:3a7713b1edbc 125 kTPM_Trigger_Select_15
AnnaBridge 171:3a7713b1edbc 126 } tpm_trigger_select_t;
AnnaBridge 171:3a7713b1edbc 127
AnnaBridge 171:3a7713b1edbc 128 #if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
AnnaBridge 171:3a7713b1edbc 129 /*!
AnnaBridge 171:3a7713b1edbc 130 * @brief Trigger source options available
AnnaBridge 171:3a7713b1edbc 131 *
AnnaBridge 171:3a7713b1edbc 132 * @note This selection is available only on some SoC's. For SoC's without this selection, the only
AnnaBridge 171:3a7713b1edbc 133 * trigger source available is internal triger.
AnnaBridge 171:3a7713b1edbc 134 */
AnnaBridge 171:3a7713b1edbc 135 typedef enum _tpm_trigger_source
AnnaBridge 171:3a7713b1edbc 136 {
AnnaBridge 171:3a7713b1edbc 137 kTPM_TriggerSource_External = 0U, /*!< Use external trigger input */
AnnaBridge 171:3a7713b1edbc 138 kTPM_TriggerSource_Internal /*!< Use internal trigger */
AnnaBridge 171:3a7713b1edbc 139 } tpm_trigger_source_t;
AnnaBridge 171:3a7713b1edbc 140 #endif
AnnaBridge 171:3a7713b1edbc 141
AnnaBridge 171:3a7713b1edbc 142 /*! @brief TPM output compare modes */
AnnaBridge 171:3a7713b1edbc 143 typedef enum _tpm_output_compare_mode
AnnaBridge 171:3a7713b1edbc 144 {
AnnaBridge 171:3a7713b1edbc 145 kTPM_NoOutputSignal = (1U << TPM_CnSC_MSA_SHIFT), /*!< No channel output when counter reaches CnV */
AnnaBridge 171:3a7713b1edbc 146 kTPM_ToggleOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Toggle output */
AnnaBridge 171:3a7713b1edbc 147 kTPM_ClearOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)), /*!< Clear output */
AnnaBridge 171:3a7713b1edbc 148 kTPM_SetOnMatch = ((1U << TPM_CnSC_MSA_SHIFT) | (3U << TPM_CnSC_ELSA_SHIFT)), /*!< Set output */
AnnaBridge 171:3a7713b1edbc 149 kTPM_HighPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (1U << TPM_CnSC_ELSA_SHIFT)), /*!< Pulse output high */
AnnaBridge 171:3a7713b1edbc 150 kTPM_LowPulseOutput = ((3U << TPM_CnSC_MSA_SHIFT) | (2U << TPM_CnSC_ELSA_SHIFT)) /*!< Pulse output low */
AnnaBridge 171:3a7713b1edbc 151 } tpm_output_compare_mode_t;
AnnaBridge 171:3a7713b1edbc 152
AnnaBridge 171:3a7713b1edbc 153 /*! @brief TPM input capture edge */
AnnaBridge 171:3a7713b1edbc 154 typedef enum _tpm_input_capture_edge
AnnaBridge 171:3a7713b1edbc 155 {
AnnaBridge 171:3a7713b1edbc 156 kTPM_RisingEdge = (1U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on rising edge only */
AnnaBridge 171:3a7713b1edbc 157 kTPM_FallingEdge = (2U << TPM_CnSC_ELSA_SHIFT), /*!< Capture on falling edge only */
AnnaBridge 171:3a7713b1edbc 158 kTPM_RiseAndFallEdge = (3U << TPM_CnSC_ELSA_SHIFT) /*!< Capture on rising or falling edge */
AnnaBridge 171:3a7713b1edbc 159 } tpm_input_capture_edge_t;
AnnaBridge 171:3a7713b1edbc 160
AnnaBridge 171:3a7713b1edbc 161 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 171:3a7713b1edbc 162 /*!
AnnaBridge 171:3a7713b1edbc 163 * @brief TPM dual edge capture parameters
AnnaBridge 171:3a7713b1edbc 164 *
AnnaBridge 171:3a7713b1edbc 165 * @note This mode is available only on some SoC's.
AnnaBridge 171:3a7713b1edbc 166 */
AnnaBridge 171:3a7713b1edbc 167 typedef struct _tpm_dual_edge_capture_param
AnnaBridge 171:3a7713b1edbc 168 {
AnnaBridge 171:3a7713b1edbc 169 bool enableSwap; /*!< true: Use channel n+1 input, channel n input is ignored;
AnnaBridge 171:3a7713b1edbc 170 false: Use channel n input, channel n+1 input is ignored */
AnnaBridge 171:3a7713b1edbc 171 tpm_input_capture_edge_t currChanEdgeMode; /*!< Input capture edge select for channel n */
AnnaBridge 171:3a7713b1edbc 172 tpm_input_capture_edge_t nextChanEdgeMode; /*!< Input capture edge select for channel n+1 */
AnnaBridge 171:3a7713b1edbc 173 } tpm_dual_edge_capture_param_t;
AnnaBridge 171:3a7713b1edbc 174 #endif
AnnaBridge 171:3a7713b1edbc 175
AnnaBridge 171:3a7713b1edbc 176 #if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
AnnaBridge 171:3a7713b1edbc 177 /*!
AnnaBridge 171:3a7713b1edbc 178 * @brief TPM quadrature decode modes
AnnaBridge 171:3a7713b1edbc 179 *
AnnaBridge 171:3a7713b1edbc 180 * @note This mode is available only on some SoC's.
AnnaBridge 171:3a7713b1edbc 181 */
AnnaBridge 171:3a7713b1edbc 182 typedef enum _tpm_quad_decode_mode
AnnaBridge 171:3a7713b1edbc 183 {
AnnaBridge 171:3a7713b1edbc 184 kTPM_QuadPhaseEncode = 0U, /*!< Phase A and Phase B encoding mode */
AnnaBridge 171:3a7713b1edbc 185 kTPM_QuadCountAndDir /*!< Count and direction encoding mode */
AnnaBridge 171:3a7713b1edbc 186 } tpm_quad_decode_mode_t;
AnnaBridge 171:3a7713b1edbc 187
AnnaBridge 171:3a7713b1edbc 188 /*! @brief TPM quadrature phase polarities */
AnnaBridge 171:3a7713b1edbc 189 typedef enum _tpm_phase_polarity
AnnaBridge 171:3a7713b1edbc 190 {
AnnaBridge 171:3a7713b1edbc 191 kTPM_QuadPhaseNormal = 0U, /*!< Phase input signal is not inverted */
AnnaBridge 171:3a7713b1edbc 192 kTPM_QuadPhaseInvert /*!< Phase input signal is inverted */
AnnaBridge 171:3a7713b1edbc 193 } tpm_phase_polarity_t;
AnnaBridge 171:3a7713b1edbc 194
AnnaBridge 171:3a7713b1edbc 195 /*! @brief TPM quadrature decode phase parameters */
AnnaBridge 171:3a7713b1edbc 196 typedef struct _tpm_phase_param
AnnaBridge 171:3a7713b1edbc 197 {
AnnaBridge 171:3a7713b1edbc 198 uint32_t phaseFilterVal; /*!< Filter value, filter is disabled when the value is zero */
AnnaBridge 171:3a7713b1edbc 199 tpm_phase_polarity_t phasePolarity; /*!< Phase polarity */
AnnaBridge 171:3a7713b1edbc 200 } tpm_phase_params_t;
AnnaBridge 171:3a7713b1edbc 201 #endif
AnnaBridge 171:3a7713b1edbc 202
AnnaBridge 171:3a7713b1edbc 203 /*! @brief TPM clock source selection*/
AnnaBridge 171:3a7713b1edbc 204 typedef enum _tpm_clock_source
AnnaBridge 171:3a7713b1edbc 205 {
AnnaBridge 171:3a7713b1edbc 206 kTPM_SystemClock = 1U, /*!< System clock */
AnnaBridge 171:3a7713b1edbc 207 kTPM_ExternalClock /*!< External clock */
AnnaBridge 171:3a7713b1edbc 208 } tpm_clock_source_t;
AnnaBridge 171:3a7713b1edbc 209
AnnaBridge 171:3a7713b1edbc 210 /*! @brief TPM prescale value selection for the clock source*/
AnnaBridge 171:3a7713b1edbc 211 typedef enum _tpm_clock_prescale
AnnaBridge 171:3a7713b1edbc 212 {
AnnaBridge 171:3a7713b1edbc 213 kTPM_Prescale_Divide_1 = 0U, /*!< Divide by 1 */
AnnaBridge 171:3a7713b1edbc 214 kTPM_Prescale_Divide_2, /*!< Divide by 2 */
AnnaBridge 171:3a7713b1edbc 215 kTPM_Prescale_Divide_4, /*!< Divide by 4 */
AnnaBridge 171:3a7713b1edbc 216 kTPM_Prescale_Divide_8, /*!< Divide by 8 */
AnnaBridge 171:3a7713b1edbc 217 kTPM_Prescale_Divide_16, /*!< Divide by 16 */
AnnaBridge 171:3a7713b1edbc 218 kTPM_Prescale_Divide_32, /*!< Divide by 32 */
AnnaBridge 171:3a7713b1edbc 219 kTPM_Prescale_Divide_64, /*!< Divide by 64 */
AnnaBridge 171:3a7713b1edbc 220 kTPM_Prescale_Divide_128 /*!< Divide by 128 */
AnnaBridge 171:3a7713b1edbc 221 } tpm_clock_prescale_t;
AnnaBridge 171:3a7713b1edbc 222
AnnaBridge 171:3a7713b1edbc 223 /*!
AnnaBridge 171:3a7713b1edbc 224 * @brief TPM config structure
AnnaBridge 171:3a7713b1edbc 225 *
AnnaBridge 171:3a7713b1edbc 226 * This structure holds the configuration settings for the TPM peripheral. To initialize this
AnnaBridge 171:3a7713b1edbc 227 * structure to reasonable defaults, call the TPM_GetDefaultConfig() function and pass a
AnnaBridge 171:3a7713b1edbc 228 * pointer to your config structure instance.
AnnaBridge 171:3a7713b1edbc 229 *
AnnaBridge 171:3a7713b1edbc 230 * The config struct can be made const so it resides in flash
AnnaBridge 171:3a7713b1edbc 231 */
AnnaBridge 171:3a7713b1edbc 232 typedef struct _tpm_config
AnnaBridge 171:3a7713b1edbc 233 {
AnnaBridge 171:3a7713b1edbc 234 tpm_clock_prescale_t prescale; /*!< Select TPM clock prescale value */
AnnaBridge 171:3a7713b1edbc 235 bool useGlobalTimeBase; /*!< true: Use of an external global time base is enabled;
AnnaBridge 171:3a7713b1edbc 236 false: disabled */
AnnaBridge 171:3a7713b1edbc 237 tpm_trigger_select_t triggerSelect; /*!< Input trigger to use for controlling the counter operation */
AnnaBridge 171:3a7713b1edbc 238 #if defined(FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION) && FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
AnnaBridge 171:3a7713b1edbc 239 tpm_trigger_source_t triggerSource; /*!< Decides if we use external or internal trigger. */
AnnaBridge 171:3a7713b1edbc 240 #endif
AnnaBridge 171:3a7713b1edbc 241 bool enableDoze; /*!< true: TPM counter is paused in doze mode;
AnnaBridge 171:3a7713b1edbc 242 false: TPM counter continues in doze mode */
AnnaBridge 171:3a7713b1edbc 243 bool enableDebugMode; /*!< true: TPM counter continues in debug mode;
AnnaBridge 171:3a7713b1edbc 244 false: TPM counter is paused in debug mode */
AnnaBridge 171:3a7713b1edbc 245 bool enableReloadOnTrigger; /*!< true: TPM counter is reloaded on trigger;
AnnaBridge 171:3a7713b1edbc 246 false: TPM counter not reloaded */
AnnaBridge 171:3a7713b1edbc 247 bool enableStopOnOverflow; /*!< true: TPM counter stops after overflow;
AnnaBridge 171:3a7713b1edbc 248 false: TPM counter continues running after overflow */
AnnaBridge 171:3a7713b1edbc 249 bool enableStartOnTrigger; /*!< true: TPM counter only starts when a trigger is detected;
AnnaBridge 171:3a7713b1edbc 250 false: TPM counter starts immediately */
AnnaBridge 171:3a7713b1edbc 251 #if defined(FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER) && FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
AnnaBridge 171:3a7713b1edbc 252 bool enablePauseOnTrigger; /*!< true: TPM counter will pause while trigger remains asserted;
AnnaBridge 171:3a7713b1edbc 253 false: TPM counter continues running */
AnnaBridge 171:3a7713b1edbc 254 #endif
AnnaBridge 171:3a7713b1edbc 255 } tpm_config_t;
AnnaBridge 171:3a7713b1edbc 256
AnnaBridge 171:3a7713b1edbc 257 /*! @brief List of TPM interrupts */
AnnaBridge 171:3a7713b1edbc 258 typedef enum _tpm_interrupt_enable
AnnaBridge 171:3a7713b1edbc 259 {
AnnaBridge 171:3a7713b1edbc 260 kTPM_Chnl0InterruptEnable = (1U << 0), /*!< Channel 0 interrupt.*/
AnnaBridge 171:3a7713b1edbc 261 kTPM_Chnl1InterruptEnable = (1U << 1), /*!< Channel 1 interrupt.*/
AnnaBridge 171:3a7713b1edbc 262 kTPM_Chnl2InterruptEnable = (1U << 2), /*!< Channel 2 interrupt.*/
AnnaBridge 171:3a7713b1edbc 263 kTPM_Chnl3InterruptEnable = (1U << 3), /*!< Channel 3 interrupt.*/
AnnaBridge 171:3a7713b1edbc 264 kTPM_Chnl4InterruptEnable = (1U << 4), /*!< Channel 4 interrupt.*/
AnnaBridge 171:3a7713b1edbc 265 kTPM_Chnl5InterruptEnable = (1U << 5), /*!< Channel 5 interrupt.*/
AnnaBridge 171:3a7713b1edbc 266 kTPM_Chnl6InterruptEnable = (1U << 6), /*!< Channel 6 interrupt.*/
AnnaBridge 171:3a7713b1edbc 267 kTPM_Chnl7InterruptEnable = (1U << 7), /*!< Channel 7 interrupt.*/
AnnaBridge 171:3a7713b1edbc 268 kTPM_TimeOverflowInterruptEnable = (1U << 8) /*!< Time overflow interrupt.*/
AnnaBridge 171:3a7713b1edbc 269 } tpm_interrupt_enable_t;
AnnaBridge 171:3a7713b1edbc 270
AnnaBridge 171:3a7713b1edbc 271 /*! @brief List of TPM flags */
AnnaBridge 171:3a7713b1edbc 272 typedef enum _tpm_status_flags
AnnaBridge 171:3a7713b1edbc 273 {
AnnaBridge 171:3a7713b1edbc 274 kTPM_Chnl0Flag = (1U << 0), /*!< Channel 0 flag */
AnnaBridge 171:3a7713b1edbc 275 kTPM_Chnl1Flag = (1U << 1), /*!< Channel 1 flag */
AnnaBridge 171:3a7713b1edbc 276 kTPM_Chnl2Flag = (1U << 2), /*!< Channel 2 flag */
AnnaBridge 171:3a7713b1edbc 277 kTPM_Chnl3Flag = (1U << 3), /*!< Channel 3 flag */
AnnaBridge 171:3a7713b1edbc 278 kTPM_Chnl4Flag = (1U << 4), /*!< Channel 4 flag */
AnnaBridge 171:3a7713b1edbc 279 kTPM_Chnl5Flag = (1U << 5), /*!< Channel 5 flag */
AnnaBridge 171:3a7713b1edbc 280 kTPM_Chnl6Flag = (1U << 6), /*!< Channel 6 flag */
AnnaBridge 171:3a7713b1edbc 281 kTPM_Chnl7Flag = (1U << 7), /*!< Channel 7 flag */
AnnaBridge 171:3a7713b1edbc 282 kTPM_TimeOverflowFlag = (1U << 8) /*!< Time overflow flag */
AnnaBridge 171:3a7713b1edbc 283 } tpm_status_flags_t;
AnnaBridge 171:3a7713b1edbc 284
AnnaBridge 171:3a7713b1edbc 285 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 286 * API
AnnaBridge 171:3a7713b1edbc 287 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 288
AnnaBridge 171:3a7713b1edbc 289 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 290 extern "C" {
AnnaBridge 171:3a7713b1edbc 291 #endif
AnnaBridge 171:3a7713b1edbc 292
AnnaBridge 171:3a7713b1edbc 293 /*!
AnnaBridge 171:3a7713b1edbc 294 * @name Initialization and deinitialization
AnnaBridge 171:3a7713b1edbc 295 * @{
AnnaBridge 171:3a7713b1edbc 296 */
AnnaBridge 171:3a7713b1edbc 297
AnnaBridge 171:3a7713b1edbc 298 /*!
AnnaBridge 171:3a7713b1edbc 299 * @brief Ungates the TPM clock and configures the peripheral for basic operation.
AnnaBridge 171:3a7713b1edbc 300 *
AnnaBridge 171:3a7713b1edbc 301 * @note This API should be called at the beginning of the application using the TPM driver.
AnnaBridge 171:3a7713b1edbc 302 *
AnnaBridge 171:3a7713b1edbc 303 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 304 * @param config Pointer to user's TPM config structure.
AnnaBridge 171:3a7713b1edbc 305 */
AnnaBridge 171:3a7713b1edbc 306 void TPM_Init(TPM_Type *base, const tpm_config_t *config);
AnnaBridge 171:3a7713b1edbc 307
AnnaBridge 171:3a7713b1edbc 308 /*!
AnnaBridge 171:3a7713b1edbc 309 * @brief Stops the counter and gates the TPM clock
AnnaBridge 171:3a7713b1edbc 310 *
AnnaBridge 171:3a7713b1edbc 311 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 312 */
AnnaBridge 171:3a7713b1edbc 313 void TPM_Deinit(TPM_Type *base);
AnnaBridge 171:3a7713b1edbc 314
AnnaBridge 171:3a7713b1edbc 315 /*!
AnnaBridge 171:3a7713b1edbc 316 * @brief Fill in the TPM config struct with the default settings
AnnaBridge 171:3a7713b1edbc 317 *
AnnaBridge 171:3a7713b1edbc 318 * The default values are:
AnnaBridge 171:3a7713b1edbc 319 * @code
AnnaBridge 171:3a7713b1edbc 320 * config->prescale = kTPM_Prescale_Divide_1;
AnnaBridge 171:3a7713b1edbc 321 * config->useGlobalTimeBase = false;
AnnaBridge 171:3a7713b1edbc 322 * config->dozeEnable = false;
AnnaBridge 171:3a7713b1edbc 323 * config->dbgMode = false;
AnnaBridge 171:3a7713b1edbc 324 * config->enableReloadOnTrigger = false;
AnnaBridge 171:3a7713b1edbc 325 * config->enableStopOnOverflow = false;
AnnaBridge 171:3a7713b1edbc 326 * config->enableStartOnTrigger = false;
AnnaBridge 171:3a7713b1edbc 327 *#if FSL_FEATURE_TPM_HAS_PAUSE_COUNTER_ON_TRIGGER
AnnaBridge 171:3a7713b1edbc 328 * config->enablePauseOnTrigger = false;
AnnaBridge 171:3a7713b1edbc 329 *#endif
AnnaBridge 171:3a7713b1edbc 330 * config->triggerSelect = kTPM_Trigger_Select_0;
AnnaBridge 171:3a7713b1edbc 331 *#if FSL_FEATURE_TPM_HAS_EXTERNAL_TRIGGER_SELECTION
AnnaBridge 171:3a7713b1edbc 332 * config->triggerSource = kTPM_TriggerSource_External;
AnnaBridge 171:3a7713b1edbc 333 *#endif
AnnaBridge 171:3a7713b1edbc 334 * @endcode
AnnaBridge 171:3a7713b1edbc 335 * @param config Pointer to user's TPM config structure.
AnnaBridge 171:3a7713b1edbc 336 */
AnnaBridge 171:3a7713b1edbc 337 void TPM_GetDefaultConfig(tpm_config_t *config);
AnnaBridge 171:3a7713b1edbc 338
AnnaBridge 171:3a7713b1edbc 339 /*! @}*/
AnnaBridge 171:3a7713b1edbc 340
AnnaBridge 171:3a7713b1edbc 341 /*!
AnnaBridge 171:3a7713b1edbc 342 * @name Channel mode operations
AnnaBridge 171:3a7713b1edbc 343 * @{
AnnaBridge 171:3a7713b1edbc 344 */
AnnaBridge 171:3a7713b1edbc 345
AnnaBridge 171:3a7713b1edbc 346 /*!
AnnaBridge 171:3a7713b1edbc 347 * @brief Configures the PWM signal parameters
AnnaBridge 171:3a7713b1edbc 348 *
AnnaBridge 171:3a7713b1edbc 349 * User calls this function to configure the PWM signals period, mode, dutycycle and edge. Use this
AnnaBridge 171:3a7713b1edbc 350 * function to configure all the TPM channels that will be used to output a PWM signal
AnnaBridge 171:3a7713b1edbc 351 *
AnnaBridge 171:3a7713b1edbc 352 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 353 * @param chnlParams Array of PWM channel parameters to configure the channel(s)
AnnaBridge 171:3a7713b1edbc 354 * @param numOfChnls Number of channels to configure, this should be the size of the array passed in
AnnaBridge 171:3a7713b1edbc 355 * @param mode PWM operation mode, options available in enumeration ::tpm_pwm_mode_t
AnnaBridge 171:3a7713b1edbc 356 * @param pwmFreq_Hz PWM signal frequency in Hz
AnnaBridge 171:3a7713b1edbc 357 * @param srcClock_Hz TPM counter clock in Hz
AnnaBridge 171:3a7713b1edbc 358 *
AnnaBridge 171:3a7713b1edbc 359 * @return kStatus_Success if the PWM setup was successful,
AnnaBridge 171:3a7713b1edbc 360 * kStatus_Error on failure
AnnaBridge 171:3a7713b1edbc 361 */
AnnaBridge 171:3a7713b1edbc 362 status_t TPM_SetupPwm(TPM_Type *base,
AnnaBridge 171:3a7713b1edbc 363 const tpm_chnl_pwm_signal_param_t *chnlParams,
AnnaBridge 171:3a7713b1edbc 364 uint8_t numOfChnls,
AnnaBridge 171:3a7713b1edbc 365 tpm_pwm_mode_t mode,
AnnaBridge 171:3a7713b1edbc 366 uint32_t pwmFreq_Hz,
AnnaBridge 171:3a7713b1edbc 367 uint32_t srcClock_Hz);
AnnaBridge 171:3a7713b1edbc 368
AnnaBridge 171:3a7713b1edbc 369 /*!
AnnaBridge 171:3a7713b1edbc 370 * @brief Update the duty cycle of an active PWM signal
AnnaBridge 171:3a7713b1edbc 371 *
AnnaBridge 171:3a7713b1edbc 372 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 373 * @param chnlNumber The channel number. In combined mode, this represents
AnnaBridge 171:3a7713b1edbc 374 * the channel pair number
AnnaBridge 171:3a7713b1edbc 375 * @param currentPwmMode The current PWM mode set during PWM setup
AnnaBridge 171:3a7713b1edbc 376 * @param dutyCyclePercent New PWM pulse width, value should be between 0 to 100
AnnaBridge 171:3a7713b1edbc 377 * 0=inactive signal(0% duty cycle)...
AnnaBridge 171:3a7713b1edbc 378 * 100=active signal (100% duty cycle)
AnnaBridge 171:3a7713b1edbc 379 */
AnnaBridge 171:3a7713b1edbc 380 void TPM_UpdatePwmDutycycle(TPM_Type *base,
AnnaBridge 171:3a7713b1edbc 381 tpm_chnl_t chnlNumber,
AnnaBridge 171:3a7713b1edbc 382 tpm_pwm_mode_t currentPwmMode,
AnnaBridge 171:3a7713b1edbc 383 uint8_t dutyCyclePercent);
AnnaBridge 171:3a7713b1edbc 384
AnnaBridge 171:3a7713b1edbc 385 /*!
AnnaBridge 171:3a7713b1edbc 386 * @brief Update the edge level selection for a channel
AnnaBridge 171:3a7713b1edbc 387 *
AnnaBridge 171:3a7713b1edbc 388 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 389 * @param chnlNumber The channel number
AnnaBridge 171:3a7713b1edbc 390 * @param level The level to be set to the ELSnB:ELSnA field; valid values are 00, 01, 10, 11.
AnnaBridge 171:3a7713b1edbc 391 * See the appropriate SoC reference manual for details about this field.
AnnaBridge 171:3a7713b1edbc 392 */
AnnaBridge 171:3a7713b1edbc 393 void TPM_UpdateChnlEdgeLevelSelect(TPM_Type *base, tpm_chnl_t chnlNumber, uint8_t level);
AnnaBridge 171:3a7713b1edbc 394
AnnaBridge 171:3a7713b1edbc 395 /*!
AnnaBridge 171:3a7713b1edbc 396 * @brief Enables capturing an input signal on the channel using the function parameters.
AnnaBridge 171:3a7713b1edbc 397 *
AnnaBridge 171:3a7713b1edbc 398 * When the edge specified in the captureMode argument occurs on the channel, the TPM counter is captured into
AnnaBridge 171:3a7713b1edbc 399 * the CnV register. The user has to read the CnV register separately to get this value.
AnnaBridge 171:3a7713b1edbc 400 *
AnnaBridge 171:3a7713b1edbc 401 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 402 * @param chnlNumber The channel number
AnnaBridge 171:3a7713b1edbc 403 * @param captureMode Specifies which edge to capture
AnnaBridge 171:3a7713b1edbc 404 */
AnnaBridge 171:3a7713b1edbc 405 void TPM_SetupInputCapture(TPM_Type *base, tpm_chnl_t chnlNumber, tpm_input_capture_edge_t captureMode);
AnnaBridge 171:3a7713b1edbc 406
AnnaBridge 171:3a7713b1edbc 407 /*!
AnnaBridge 171:3a7713b1edbc 408 * @brief Configures the TPM to generate timed pulses.
AnnaBridge 171:3a7713b1edbc 409 *
AnnaBridge 171:3a7713b1edbc 410 * When the TPM counter matches the value of compareVal argument (this is written into CnV reg), the channel
AnnaBridge 171:3a7713b1edbc 411 * output is changed based on what is specified in the compareMode argument.
AnnaBridge 171:3a7713b1edbc 412 *
AnnaBridge 171:3a7713b1edbc 413 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 414 * @param chnlNumber The channel number
AnnaBridge 171:3a7713b1edbc 415 * @param compareMode Action to take on the channel output when the compare condition is met
AnnaBridge 171:3a7713b1edbc 416 * @param compareValue Value to be programmed in the CnV register.
AnnaBridge 171:3a7713b1edbc 417 */
AnnaBridge 171:3a7713b1edbc 418 void TPM_SetupOutputCompare(TPM_Type *base,
AnnaBridge 171:3a7713b1edbc 419 tpm_chnl_t chnlNumber,
AnnaBridge 171:3a7713b1edbc 420 tpm_output_compare_mode_t compareMode,
AnnaBridge 171:3a7713b1edbc 421 uint32_t compareValue);
AnnaBridge 171:3a7713b1edbc 422
AnnaBridge 171:3a7713b1edbc 423 #if defined(FSL_FEATURE_TPM_HAS_COMBINE) && FSL_FEATURE_TPM_HAS_COMBINE
AnnaBridge 171:3a7713b1edbc 424 /*!
AnnaBridge 171:3a7713b1edbc 425 * @brief Configures the dual edge capture mode of the TPM.
AnnaBridge 171:3a7713b1edbc 426 *
AnnaBridge 171:3a7713b1edbc 427 * This function allows to measure a pulse width of the signal on the input of channel of a
AnnaBridge 171:3a7713b1edbc 428 * channel pair. The filter function is disabled if the filterVal argument passed is zero.
AnnaBridge 171:3a7713b1edbc 429 *
AnnaBridge 171:3a7713b1edbc 430 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 431 * @param chnlPairNumber The TPM channel pair number; options are 0, 1, 2, 3
AnnaBridge 171:3a7713b1edbc 432 * @param edgeParam Sets up the dual edge capture function
AnnaBridge 171:3a7713b1edbc 433 * @param filterValue Filter value, specify 0 to disable filter.
AnnaBridge 171:3a7713b1edbc 434 */
AnnaBridge 171:3a7713b1edbc 435 void TPM_SetupDualEdgeCapture(TPM_Type *base,
AnnaBridge 171:3a7713b1edbc 436 tpm_chnl_t chnlPairNumber,
AnnaBridge 171:3a7713b1edbc 437 const tpm_dual_edge_capture_param_t *edgeParam,
AnnaBridge 171:3a7713b1edbc 438 uint32_t filterValue);
AnnaBridge 171:3a7713b1edbc 439 #endif
AnnaBridge 171:3a7713b1edbc 440
AnnaBridge 171:3a7713b1edbc 441 #if defined(FSL_FEATURE_TPM_HAS_QDCTRL) && FSL_FEATURE_TPM_HAS_QDCTRL
AnnaBridge 171:3a7713b1edbc 442 /*!
AnnaBridge 171:3a7713b1edbc 443 * @brief Configures the parameters and activates the quadrature decode mode.
AnnaBridge 171:3a7713b1edbc 444 *
AnnaBridge 171:3a7713b1edbc 445 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 446 * @param phaseAParams Phase A configuration parameters
AnnaBridge 171:3a7713b1edbc 447 * @param phaseBParams Phase B configuration parameters
AnnaBridge 171:3a7713b1edbc 448 * @param quadMode Selects encoding mode used in quadrature decoder mode
AnnaBridge 171:3a7713b1edbc 449 */
AnnaBridge 171:3a7713b1edbc 450 void TPM_SetupQuadDecode(TPM_Type *base,
AnnaBridge 171:3a7713b1edbc 451 const tpm_phase_params_t *phaseAParams,
AnnaBridge 171:3a7713b1edbc 452 const tpm_phase_params_t *phaseBParams,
AnnaBridge 171:3a7713b1edbc 453 tpm_quad_decode_mode_t quadMode);
AnnaBridge 171:3a7713b1edbc 454 #endif
AnnaBridge 171:3a7713b1edbc 455
AnnaBridge 171:3a7713b1edbc 456 /*! @}*/
AnnaBridge 171:3a7713b1edbc 457
AnnaBridge 171:3a7713b1edbc 458 /*!
AnnaBridge 171:3a7713b1edbc 459 * @name Interrupt Interface
AnnaBridge 171:3a7713b1edbc 460 * @{
AnnaBridge 171:3a7713b1edbc 461 */
AnnaBridge 171:3a7713b1edbc 462
AnnaBridge 171:3a7713b1edbc 463 /*!
AnnaBridge 171:3a7713b1edbc 464 * @brief Enables the selected TPM interrupts.
AnnaBridge 171:3a7713b1edbc 465 *
AnnaBridge 171:3a7713b1edbc 466 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 467 * @param mask The interrupts to enable. This is a logical OR of members of the
AnnaBridge 171:3a7713b1edbc 468 * enumeration ::tpm_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 469 */
AnnaBridge 171:3a7713b1edbc 470 void TPM_EnableInterrupts(TPM_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 471
AnnaBridge 171:3a7713b1edbc 472 /*!
AnnaBridge 171:3a7713b1edbc 473 * @brief Disables the selected TPM interrupts.
AnnaBridge 171:3a7713b1edbc 474 *
AnnaBridge 171:3a7713b1edbc 475 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 476 * @param mask The interrupts to disable. This is a logical OR of members of the
AnnaBridge 171:3a7713b1edbc 477 * enumeration ::tpm_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 478 */
AnnaBridge 171:3a7713b1edbc 479 void TPM_DisableInterrupts(TPM_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 480
AnnaBridge 171:3a7713b1edbc 481 /*!
AnnaBridge 171:3a7713b1edbc 482 * @brief Gets the enabled TPM interrupts.
AnnaBridge 171:3a7713b1edbc 483 *
AnnaBridge 171:3a7713b1edbc 484 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 485 *
AnnaBridge 171:3a7713b1edbc 486 * @return The enabled interrupts. This is the logical OR of members of the
AnnaBridge 171:3a7713b1edbc 487 * enumeration ::tpm_interrupt_enable_t
AnnaBridge 171:3a7713b1edbc 488 */
AnnaBridge 171:3a7713b1edbc 489 uint32_t TPM_GetEnabledInterrupts(TPM_Type *base);
AnnaBridge 171:3a7713b1edbc 490
AnnaBridge 171:3a7713b1edbc 491 /*! @}*/
AnnaBridge 171:3a7713b1edbc 492
AnnaBridge 171:3a7713b1edbc 493 /*!
AnnaBridge 171:3a7713b1edbc 494 * @name Status Interface
AnnaBridge 171:3a7713b1edbc 495 * @{
AnnaBridge 171:3a7713b1edbc 496 */
AnnaBridge 171:3a7713b1edbc 497
AnnaBridge 171:3a7713b1edbc 498 /*!
AnnaBridge 171:3a7713b1edbc 499 * @brief Gets the TPM status flags
AnnaBridge 171:3a7713b1edbc 500 *
AnnaBridge 171:3a7713b1edbc 501 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 502 *
AnnaBridge 171:3a7713b1edbc 503 * @return The status flags. This is the logical OR of members of the
AnnaBridge 171:3a7713b1edbc 504 * enumeration ::tpm_status_flags_t
AnnaBridge 171:3a7713b1edbc 505 */
AnnaBridge 171:3a7713b1edbc 506 static inline uint32_t TPM_GetStatusFlags(TPM_Type *base)
AnnaBridge 171:3a7713b1edbc 507 {
AnnaBridge 171:3a7713b1edbc 508 return base->STATUS;
AnnaBridge 171:3a7713b1edbc 509 }
AnnaBridge 171:3a7713b1edbc 510
AnnaBridge 171:3a7713b1edbc 511 /*!
AnnaBridge 171:3a7713b1edbc 512 * @brief Clears the TPM status flags
AnnaBridge 171:3a7713b1edbc 513 *
AnnaBridge 171:3a7713b1edbc 514 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 515 * @param mask The status flags to clear. This is a logical OR of members of the
AnnaBridge 171:3a7713b1edbc 516 * enumeration ::tpm_status_flags_t
AnnaBridge 171:3a7713b1edbc 517 */
AnnaBridge 171:3a7713b1edbc 518 static inline void TPM_ClearStatusFlags(TPM_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 519 {
AnnaBridge 171:3a7713b1edbc 520 /* Clear the status flags */
AnnaBridge 171:3a7713b1edbc 521 base->STATUS = mask;
AnnaBridge 171:3a7713b1edbc 522 }
AnnaBridge 171:3a7713b1edbc 523
AnnaBridge 171:3a7713b1edbc 524 /*! @}*/
AnnaBridge 171:3a7713b1edbc 525
AnnaBridge 171:3a7713b1edbc 526 /*!
AnnaBridge 171:3a7713b1edbc 527 * @name Read and write the timer period
AnnaBridge 171:3a7713b1edbc 528 * @{
AnnaBridge 171:3a7713b1edbc 529 */
AnnaBridge 171:3a7713b1edbc 530
AnnaBridge 171:3a7713b1edbc 531 /*!
AnnaBridge 171:3a7713b1edbc 532 * @brief Sets the timer period in units of ticks.
AnnaBridge 171:3a7713b1edbc 533 *
AnnaBridge 171:3a7713b1edbc 534 * Timers counts from 0 until it equals the count value set here. The count value is written to
AnnaBridge 171:3a7713b1edbc 535 * the MOD register.
AnnaBridge 171:3a7713b1edbc 536 *
AnnaBridge 171:3a7713b1edbc 537 * @note
AnnaBridge 171:3a7713b1edbc 538 * 1. This API allows the user to use the TPM module as a timer. Do not mix usage
AnnaBridge 171:3a7713b1edbc 539 * of this API with TPM's PWM setup API's.
AnnaBridge 171:3a7713b1edbc 540 * 2. Call the utility macros provided in the fsl_common.h to convert usec or msec to ticks.
AnnaBridge 171:3a7713b1edbc 541 *
AnnaBridge 171:3a7713b1edbc 542 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 543 * @param ticks A timer period in units of ticks, which should be equal or greater than 1.
AnnaBridge 171:3a7713b1edbc 544 */
AnnaBridge 171:3a7713b1edbc 545 static inline void TPM_SetTimerPeriod(TPM_Type *base, uint32_t ticks)
AnnaBridge 171:3a7713b1edbc 546 {
AnnaBridge 171:3a7713b1edbc 547 base->MOD = ticks;
AnnaBridge 171:3a7713b1edbc 548 }
AnnaBridge 171:3a7713b1edbc 549
AnnaBridge 171:3a7713b1edbc 550 /*!
AnnaBridge 171:3a7713b1edbc 551 * @brief Reads the current timer counting value.
AnnaBridge 171:3a7713b1edbc 552 *
AnnaBridge 171:3a7713b1edbc 553 * This function returns the real-time timer counting value in a range from 0 to a
AnnaBridge 171:3a7713b1edbc 554 * timer period.
AnnaBridge 171:3a7713b1edbc 555 *
AnnaBridge 171:3a7713b1edbc 556 * @note Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.
AnnaBridge 171:3a7713b1edbc 557 *
AnnaBridge 171:3a7713b1edbc 558 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 559 *
AnnaBridge 171:3a7713b1edbc 560 * @return The current counter value in ticks
AnnaBridge 171:3a7713b1edbc 561 */
AnnaBridge 171:3a7713b1edbc 562 static inline uint32_t TPM_GetCurrentTimerCount(TPM_Type *base)
AnnaBridge 171:3a7713b1edbc 563 {
AnnaBridge 171:3a7713b1edbc 564 return (uint32_t)((base->CNT & TPM_CNT_COUNT_MASK) >> TPM_CNT_COUNT_SHIFT);
AnnaBridge 171:3a7713b1edbc 565 }
AnnaBridge 171:3a7713b1edbc 566
AnnaBridge 171:3a7713b1edbc 567 /*!
AnnaBridge 171:3a7713b1edbc 568 * @name Timer Start and Stop
AnnaBridge 171:3a7713b1edbc 569 * @{
AnnaBridge 171:3a7713b1edbc 570 */
AnnaBridge 171:3a7713b1edbc 571
AnnaBridge 171:3a7713b1edbc 572 /*!
AnnaBridge 171:3a7713b1edbc 573 * @brief Starts the TPM counter.
AnnaBridge 171:3a7713b1edbc 574 *
AnnaBridge 171:3a7713b1edbc 575 *
AnnaBridge 171:3a7713b1edbc 576 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 577 * @param clockSource TPM clock source; once clock source is set the counter will start running
AnnaBridge 171:3a7713b1edbc 578 */
AnnaBridge 171:3a7713b1edbc 579 static inline void TPM_StartTimer(TPM_Type *base, tpm_clock_source_t clockSource)
AnnaBridge 171:3a7713b1edbc 580 {
AnnaBridge 171:3a7713b1edbc 581 uint32_t reg = base->SC;
AnnaBridge 171:3a7713b1edbc 582
AnnaBridge 171:3a7713b1edbc 583 reg &= ~(TPM_SC_CMOD_MASK);
AnnaBridge 171:3a7713b1edbc 584 reg |= TPM_SC_CMOD(clockSource);
AnnaBridge 171:3a7713b1edbc 585 base->SC = reg;
AnnaBridge 171:3a7713b1edbc 586 }
AnnaBridge 171:3a7713b1edbc 587
AnnaBridge 171:3a7713b1edbc 588 /*!
AnnaBridge 171:3a7713b1edbc 589 * @brief Stops the TPM counter.
AnnaBridge 171:3a7713b1edbc 590 *
AnnaBridge 171:3a7713b1edbc 591 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 592 */
AnnaBridge 171:3a7713b1edbc 593 static inline void TPM_StopTimer(TPM_Type *base)
AnnaBridge 171:3a7713b1edbc 594 {
AnnaBridge 171:3a7713b1edbc 595 /* Set clock source to none to disable counter */
AnnaBridge 171:3a7713b1edbc 596 base->SC &= ~(TPM_SC_CMOD_MASK);
AnnaBridge 171:3a7713b1edbc 597
AnnaBridge 171:3a7713b1edbc 598 /* Wait till this reads as zero acknowledging the counter is disabled */
AnnaBridge 171:3a7713b1edbc 599 while (base->SC & TPM_SC_CMOD_MASK)
AnnaBridge 171:3a7713b1edbc 600 {
AnnaBridge 171:3a7713b1edbc 601 }
AnnaBridge 171:3a7713b1edbc 602 }
AnnaBridge 171:3a7713b1edbc 603
AnnaBridge 171:3a7713b1edbc 604 /*! @}*/
AnnaBridge 171:3a7713b1edbc 605
AnnaBridge 171:3a7713b1edbc 606 #if defined(FSL_FEATURE_TPM_HAS_GLOBAL) && FSL_FEATURE_TPM_HAS_GLOBAL
AnnaBridge 171:3a7713b1edbc 607 /*!
AnnaBridge 171:3a7713b1edbc 608 * @brief Performs a software reset on the TPM module.
AnnaBridge 171:3a7713b1edbc 609 *
AnnaBridge 171:3a7713b1edbc 610 * Reset all internal logic and registers, except the Global Register. Remains set until cleared by software..
AnnaBridge 171:3a7713b1edbc 611 *
AnnaBridge 171:3a7713b1edbc 612 * @note TPM software reset is available on certain SoC's only
AnnaBridge 171:3a7713b1edbc 613 *
AnnaBridge 171:3a7713b1edbc 614 * @param base TPM peripheral base address
AnnaBridge 171:3a7713b1edbc 615 */
AnnaBridge 171:3a7713b1edbc 616 static inline void TPM_Reset(TPM_Type *base)
AnnaBridge 171:3a7713b1edbc 617 {
AnnaBridge 171:3a7713b1edbc 618 base->GLOBAL |= TPM_GLOBAL_RST_MASK;
AnnaBridge 171:3a7713b1edbc 619 base->GLOBAL &= ~TPM_GLOBAL_RST_MASK;
AnnaBridge 171:3a7713b1edbc 620 }
AnnaBridge 171:3a7713b1edbc 621 #endif
AnnaBridge 171:3a7713b1edbc 622
AnnaBridge 171:3a7713b1edbc 623 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 624 }
AnnaBridge 171:3a7713b1edbc 625 #endif
AnnaBridge 171:3a7713b1edbc 626
AnnaBridge 171:3a7713b1edbc 627 /*! @}*/
AnnaBridge 171:3a7713b1edbc 628
AnnaBridge 171:3a7713b1edbc 629 #endif /* _FSL_TPM_H_ */