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TARGET_K22F/TOOLCHAIN_IAR/fsl_gpio.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /*
AnnaBridge 171:3a7713b1edbc 2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
AnnaBridge 171:3a7713b1edbc 3 * All rights reserved.
AnnaBridge 171:3a7713b1edbc 4 *
AnnaBridge 171:3a7713b1edbc 5 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 171:3a7713b1edbc 6 * are permitted provided that the following conditions are met:
AnnaBridge 171:3a7713b1edbc 7 *
AnnaBridge 171:3a7713b1edbc 8 * o Redistributions of source code must retain the above copyright notice, this list
AnnaBridge 171:3a7713b1edbc 9 * of conditions and the following disclaimer.
AnnaBridge 171:3a7713b1edbc 10 *
AnnaBridge 171:3a7713b1edbc 11 * o Redistributions in binary form must reproduce the above copyright notice, this
AnnaBridge 171:3a7713b1edbc 12 * list of conditions and the following disclaimer in the documentation and/or
AnnaBridge 171:3a7713b1edbc 13 * other materials provided with the distribution.
AnnaBridge 171:3a7713b1edbc 14 *
AnnaBridge 171:3a7713b1edbc 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
AnnaBridge 171:3a7713b1edbc 16 * contributors may be used to endorse or promote products derived from this
AnnaBridge 171:3a7713b1edbc 17 * software without specific prior written permission.
AnnaBridge 171:3a7713b1edbc 18 *
AnnaBridge 171:3a7713b1edbc 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
AnnaBridge 171:3a7713b1edbc 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
AnnaBridge 171:3a7713b1edbc 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 171:3a7713b1edbc 22 * DISCLAIMED. IN NO EVENT SDRVL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
AnnaBridge 171:3a7713b1edbc 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
AnnaBridge 171:3a7713b1edbc 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
AnnaBridge 171:3a7713b1edbc 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
AnnaBridge 171:3a7713b1edbc 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
AnnaBridge 171:3a7713b1edbc 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
AnnaBridge 171:3a7713b1edbc 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 171:3a7713b1edbc 29 */
AnnaBridge 171:3a7713b1edbc 30
AnnaBridge 171:3a7713b1edbc 31 #ifndef _FSL_GPIO_H_
AnnaBridge 171:3a7713b1edbc 32 #define _FSL_GPIO_H_
AnnaBridge 171:3a7713b1edbc 33
AnnaBridge 171:3a7713b1edbc 34 #include "fsl_common.h"
AnnaBridge 171:3a7713b1edbc 35
AnnaBridge 171:3a7713b1edbc 36 /*!
AnnaBridge 171:3a7713b1edbc 37 * @addtogroup gpio
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 */
AnnaBridge 171:3a7713b1edbc 40
AnnaBridge 171:3a7713b1edbc 41 /*! @file */
AnnaBridge 171:3a7713b1edbc 42
AnnaBridge 171:3a7713b1edbc 43 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 44 * Definitions
AnnaBridge 171:3a7713b1edbc 45 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 46
AnnaBridge 171:3a7713b1edbc 47 /*! @name Driver version */
AnnaBridge 171:3a7713b1edbc 48 /*@{*/
AnnaBridge 171:3a7713b1edbc 49 /*! @brief GPIO driver version 2.1.0. */
AnnaBridge 171:3a7713b1edbc 50 #define FSL_GPIO_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
AnnaBridge 171:3a7713b1edbc 51 /*@}*/
AnnaBridge 171:3a7713b1edbc 52
AnnaBridge 171:3a7713b1edbc 53 /*! @brief GPIO direction definition*/
AnnaBridge 171:3a7713b1edbc 54 typedef enum _gpio_pin_direction
AnnaBridge 171:3a7713b1edbc 55 {
AnnaBridge 171:3a7713b1edbc 56 kGPIO_DigitalInput = 0U, /*!< Set current pin as digital input*/
AnnaBridge 171:3a7713b1edbc 57 kGPIO_DigitalOutput = 1U, /*!< Set current pin as digital output*/
AnnaBridge 171:3a7713b1edbc 58 } gpio_pin_direction_t;
AnnaBridge 171:3a7713b1edbc 59
AnnaBridge 171:3a7713b1edbc 60 /*!
AnnaBridge 171:3a7713b1edbc 61 * @brief The GPIO pin configuration structure.
AnnaBridge 171:3a7713b1edbc 62 *
AnnaBridge 171:3a7713b1edbc 63 * Every pin can only be configured as either output pin or input pin at a time.
AnnaBridge 171:3a7713b1edbc 64 * If configured as a input pin, then leave the outputConfig unused
AnnaBridge 171:3a7713b1edbc 65 * Note : In some cases, the corresponding port property should be configured in advance
AnnaBridge 171:3a7713b1edbc 66 * with the PORT_SetPinConfig()
AnnaBridge 171:3a7713b1edbc 67 */
AnnaBridge 171:3a7713b1edbc 68 typedef struct _gpio_pin_config
AnnaBridge 171:3a7713b1edbc 69 {
AnnaBridge 171:3a7713b1edbc 70 gpio_pin_direction_t pinDirection; /*!< gpio direction, input or output */
AnnaBridge 171:3a7713b1edbc 71 /* Output configurations, please ignore if configured as a input one */
AnnaBridge 171:3a7713b1edbc 72 uint8_t outputLogic; /*!< Set default output logic, no use in input */
AnnaBridge 171:3a7713b1edbc 73 } gpio_pin_config_t;
AnnaBridge 171:3a7713b1edbc 74
AnnaBridge 171:3a7713b1edbc 75 /*! @} */
AnnaBridge 171:3a7713b1edbc 76
AnnaBridge 171:3a7713b1edbc 77 /*******************************************************************************
AnnaBridge 171:3a7713b1edbc 78 * API
AnnaBridge 171:3a7713b1edbc 79 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 80
AnnaBridge 171:3a7713b1edbc 81 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 82 extern "C" {
AnnaBridge 171:3a7713b1edbc 83 #endif
AnnaBridge 171:3a7713b1edbc 84
AnnaBridge 171:3a7713b1edbc 85 /*!
AnnaBridge 171:3a7713b1edbc 86 * @addtogroup gpio_driver
AnnaBridge 171:3a7713b1edbc 87 * @{
AnnaBridge 171:3a7713b1edbc 88 */
AnnaBridge 171:3a7713b1edbc 89
AnnaBridge 171:3a7713b1edbc 90 /*! @name GPIO Configuration */
AnnaBridge 171:3a7713b1edbc 91 /*@{*/
AnnaBridge 171:3a7713b1edbc 92
AnnaBridge 171:3a7713b1edbc 93 /*!
AnnaBridge 171:3a7713b1edbc 94 * @brief Initializes a GPIO pin used by the board.
AnnaBridge 171:3a7713b1edbc 95 *
AnnaBridge 171:3a7713b1edbc 96 * To initialize the GPIO, define a pin configuration, either input or output, in the user file.
AnnaBridge 171:3a7713b1edbc 97 * Then, call the GPIO_PinInit() function.
AnnaBridge 171:3a7713b1edbc 98 *
AnnaBridge 171:3a7713b1edbc 99 * This is an example to define an input pin or output pin configuration:
AnnaBridge 171:3a7713b1edbc 100 * @code
AnnaBridge 171:3a7713b1edbc 101 * // Define a digital input pin configuration,
AnnaBridge 171:3a7713b1edbc 102 * gpio_pin_config_t config =
AnnaBridge 171:3a7713b1edbc 103 * {
AnnaBridge 171:3a7713b1edbc 104 * kGPIO_DigitalInput,
AnnaBridge 171:3a7713b1edbc 105 * 0,
AnnaBridge 171:3a7713b1edbc 106 * }
AnnaBridge 171:3a7713b1edbc 107 * //Define a digital output pin configuration,
AnnaBridge 171:3a7713b1edbc 108 * gpio_pin_config_t config =
AnnaBridge 171:3a7713b1edbc 109 * {
AnnaBridge 171:3a7713b1edbc 110 * kGPIO_DigitalOutput,
AnnaBridge 171:3a7713b1edbc 111 * 0,
AnnaBridge 171:3a7713b1edbc 112 * }
AnnaBridge 171:3a7713b1edbc 113 * @endcode
AnnaBridge 171:3a7713b1edbc 114 *
AnnaBridge 171:3a7713b1edbc 115 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 116 * @param pin GPIO port pin number
AnnaBridge 171:3a7713b1edbc 117 * @param config GPIO pin configuration pointer
AnnaBridge 171:3a7713b1edbc 118 */
AnnaBridge 171:3a7713b1edbc 119 void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
AnnaBridge 171:3a7713b1edbc 120
AnnaBridge 171:3a7713b1edbc 121 /*@}*/
AnnaBridge 171:3a7713b1edbc 122
AnnaBridge 171:3a7713b1edbc 123 /*! @name GPIO Output Operations */
AnnaBridge 171:3a7713b1edbc 124 /*@{*/
AnnaBridge 171:3a7713b1edbc 125
AnnaBridge 171:3a7713b1edbc 126 /*!
AnnaBridge 171:3a7713b1edbc 127 * @brief Sets the output level of the multiple GPIO pins to the logic 1 or 0.
AnnaBridge 171:3a7713b1edbc 128 *
AnnaBridge 171:3a7713b1edbc 129 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 130 * @param pin GPIO pin's number
AnnaBridge 171:3a7713b1edbc 131 * @param output GPIO pin output logic level.
AnnaBridge 171:3a7713b1edbc 132 * - 0: corresponding pin output low logic level.
AnnaBridge 171:3a7713b1edbc 133 * - 1: corresponding pin output high logic level.
AnnaBridge 171:3a7713b1edbc 134 */
AnnaBridge 171:3a7713b1edbc 135 static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)
AnnaBridge 171:3a7713b1edbc 136 {
AnnaBridge 171:3a7713b1edbc 137 if (output == 0U)
AnnaBridge 171:3a7713b1edbc 138 {
AnnaBridge 171:3a7713b1edbc 139 base->PCOR = 1 << pin;
AnnaBridge 171:3a7713b1edbc 140 }
AnnaBridge 171:3a7713b1edbc 141 else
AnnaBridge 171:3a7713b1edbc 142 {
AnnaBridge 171:3a7713b1edbc 143 base->PSOR = 1 << pin;
AnnaBridge 171:3a7713b1edbc 144 }
AnnaBridge 171:3a7713b1edbc 145 }
AnnaBridge 171:3a7713b1edbc 146
AnnaBridge 171:3a7713b1edbc 147 /*!
AnnaBridge 171:3a7713b1edbc 148 * @brief Sets the output level of the multiple GPIO pins to the logic 1.
AnnaBridge 171:3a7713b1edbc 149 *
AnnaBridge 171:3a7713b1edbc 150 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 151 * @param mask GPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 152 */
AnnaBridge 171:3a7713b1edbc 153 static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 154 {
AnnaBridge 171:3a7713b1edbc 155 base->PSOR = mask;
AnnaBridge 171:3a7713b1edbc 156 }
AnnaBridge 171:3a7713b1edbc 157
AnnaBridge 171:3a7713b1edbc 158 /*!
AnnaBridge 171:3a7713b1edbc 159 * @brief Sets the output level of the multiple GPIO pins to the logic 0.
AnnaBridge 171:3a7713b1edbc 160 *
AnnaBridge 171:3a7713b1edbc 161 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 162 * @param mask GPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 163 */
AnnaBridge 171:3a7713b1edbc 164 static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 165 {
AnnaBridge 171:3a7713b1edbc 166 base->PCOR = mask;
AnnaBridge 171:3a7713b1edbc 167 }
AnnaBridge 171:3a7713b1edbc 168
AnnaBridge 171:3a7713b1edbc 169 /*!
AnnaBridge 171:3a7713b1edbc 170 * @brief Reverses current output logic of the multiple GPIO pins.
AnnaBridge 171:3a7713b1edbc 171 *
AnnaBridge 171:3a7713b1edbc 172 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 173 * @param mask GPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 174 */
AnnaBridge 171:3a7713b1edbc 175 static inline void GPIO_TogglePinsOutput(GPIO_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 176 {
AnnaBridge 171:3a7713b1edbc 177 base->PTOR = mask;
AnnaBridge 171:3a7713b1edbc 178 }
AnnaBridge 171:3a7713b1edbc 179 /*@}*/
AnnaBridge 171:3a7713b1edbc 180
AnnaBridge 171:3a7713b1edbc 181 /*! @name GPIO Input Operations */
AnnaBridge 171:3a7713b1edbc 182 /*@{*/
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 /*!
AnnaBridge 171:3a7713b1edbc 185 * @brief Reads the current input value of the whole GPIO port.
AnnaBridge 171:3a7713b1edbc 186 *
AnnaBridge 171:3a7713b1edbc 187 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 188 * @param pin GPIO pin's number
AnnaBridge 171:3a7713b1edbc 189 * @retval GPIO port input value
AnnaBridge 171:3a7713b1edbc 190 * - 0: corresponding pin input low logic level.
AnnaBridge 171:3a7713b1edbc 191 * - 1: corresponding pin input high logic level.
AnnaBridge 171:3a7713b1edbc 192 */
AnnaBridge 171:3a7713b1edbc 193 static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)
AnnaBridge 171:3a7713b1edbc 194 {
AnnaBridge 171:3a7713b1edbc 195 return (((base->PDIR) >> pin) & 0x01U);
AnnaBridge 171:3a7713b1edbc 196 }
AnnaBridge 171:3a7713b1edbc 197 /*@}*/
AnnaBridge 171:3a7713b1edbc 198
AnnaBridge 171:3a7713b1edbc 199 /*! @name GPIO Interrupt */
AnnaBridge 171:3a7713b1edbc 200 /*@{*/
AnnaBridge 171:3a7713b1edbc 201
AnnaBridge 171:3a7713b1edbc 202 /*!
AnnaBridge 171:3a7713b1edbc 203 * @brief Reads whole GPIO port interrupt status flag.
AnnaBridge 171:3a7713b1edbc 204 *
AnnaBridge 171:3a7713b1edbc 205 * If a pin is configured to generate the DMA request, the corresponding flag
AnnaBridge 171:3a7713b1edbc 206 * is cleared automatically at the completion of the requested DMA transfer.
AnnaBridge 171:3a7713b1edbc 207 * Otherwise, the flag remains set until a logic one is written to that flag.
AnnaBridge 171:3a7713b1edbc 208 * If configured for a level sensitive interrupt that remains asserted, the flag
AnnaBridge 171:3a7713b1edbc 209 * is set again immediately.
AnnaBridge 171:3a7713b1edbc 210 *
AnnaBridge 171:3a7713b1edbc 211 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 212 * @retval Current GPIO port interrupt status flag, for example, 0x00010001 means the
AnnaBridge 171:3a7713b1edbc 213 * pin 0 and 17 have the interrupt.
AnnaBridge 171:3a7713b1edbc 214 */
AnnaBridge 171:3a7713b1edbc 215 uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base);
AnnaBridge 171:3a7713b1edbc 216
AnnaBridge 171:3a7713b1edbc 217 /*!
AnnaBridge 171:3a7713b1edbc 218 * @brief Clears multiple GPIO pins' interrupt status flag.
AnnaBridge 171:3a7713b1edbc 219 *
AnnaBridge 171:3a7713b1edbc 220 * @param base GPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 221 * @param mask GPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 222 */
AnnaBridge 171:3a7713b1edbc 223 void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 224
AnnaBridge 171:3a7713b1edbc 225 /*@}*/
AnnaBridge 171:3a7713b1edbc 226 /*! @} */
AnnaBridge 171:3a7713b1edbc 227
AnnaBridge 171:3a7713b1edbc 228 /*!
AnnaBridge 171:3a7713b1edbc 229 * @addtogroup fgpio_driver
AnnaBridge 171:3a7713b1edbc 230 * @{
AnnaBridge 171:3a7713b1edbc 231 */
AnnaBridge 171:3a7713b1edbc 232
AnnaBridge 171:3a7713b1edbc 233 /*
AnnaBridge 171:3a7713b1edbc 234 * Introduce the FGPIO feature.
AnnaBridge 171:3a7713b1edbc 235 *
AnnaBridge 171:3a7713b1edbc 236 * The FGPIO features are only support on some of Kinetis chips. The FGPIO registers are aliased to the IOPORT
AnnaBridge 171:3a7713b1edbc 237 * interface. Accesses via the IOPORT interface occur in parallel with any instruction fetches and will therefore
AnnaBridge 171:3a7713b1edbc 238 * complete in a single cycle. This aliased Fast GPIO memory map is called FGPIO.
AnnaBridge 171:3a7713b1edbc 239 */
AnnaBridge 171:3a7713b1edbc 240
AnnaBridge 171:3a7713b1edbc 241 #if defined(FSL_FEATURE_SOC_FGPIO_COUNT) && FSL_FEATURE_SOC_FGPIO_COUNT
AnnaBridge 171:3a7713b1edbc 242
AnnaBridge 171:3a7713b1edbc 243 /*! @name FGPIO Configuration */
AnnaBridge 171:3a7713b1edbc 244 /*@{*/
AnnaBridge 171:3a7713b1edbc 245
AnnaBridge 171:3a7713b1edbc 246 /*!
AnnaBridge 171:3a7713b1edbc 247 * @brief Initializes a FGPIO pin used by the board.
AnnaBridge 171:3a7713b1edbc 248 *
AnnaBridge 171:3a7713b1edbc 249 * To initialize the FGPIO driver, define a pin configuration, either input or output, in the user file.
AnnaBridge 171:3a7713b1edbc 250 * Then, call the FGPIO_PinInit() function.
AnnaBridge 171:3a7713b1edbc 251 *
AnnaBridge 171:3a7713b1edbc 252 * This is an example to define an input pin or output pin configuration:
AnnaBridge 171:3a7713b1edbc 253 * @code
AnnaBridge 171:3a7713b1edbc 254 * // Define a digital input pin configuration,
AnnaBridge 171:3a7713b1edbc 255 * gpio_pin_config_t config =
AnnaBridge 171:3a7713b1edbc 256 * {
AnnaBridge 171:3a7713b1edbc 257 * kGPIO_DigitalInput,
AnnaBridge 171:3a7713b1edbc 258 * 0,
AnnaBridge 171:3a7713b1edbc 259 * }
AnnaBridge 171:3a7713b1edbc 260 * //Define a digital output pin configuration,
AnnaBridge 171:3a7713b1edbc 261 * gpio_pin_config_t config =
AnnaBridge 171:3a7713b1edbc 262 * {
AnnaBridge 171:3a7713b1edbc 263 * kGPIO_DigitalOutput,
AnnaBridge 171:3a7713b1edbc 264 * 0,
AnnaBridge 171:3a7713b1edbc 265 * }
AnnaBridge 171:3a7713b1edbc 266 * @endcode
AnnaBridge 171:3a7713b1edbc 267 *
AnnaBridge 171:3a7713b1edbc 268 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 269 * @param pin FGPIO port pin number
AnnaBridge 171:3a7713b1edbc 270 * @param config FGPIO pin configuration pointer
AnnaBridge 171:3a7713b1edbc 271 */
AnnaBridge 171:3a7713b1edbc 272 void FGPIO_PinInit(FGPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config);
AnnaBridge 171:3a7713b1edbc 273
AnnaBridge 171:3a7713b1edbc 274 /*@}*/
AnnaBridge 171:3a7713b1edbc 275
AnnaBridge 171:3a7713b1edbc 276 /*! @name FGPIO Output Operations */
AnnaBridge 171:3a7713b1edbc 277 /*@{*/
AnnaBridge 171:3a7713b1edbc 278
AnnaBridge 171:3a7713b1edbc 279 /*!
AnnaBridge 171:3a7713b1edbc 280 * @brief Sets the output level of the multiple FGPIO pins to the logic 1 or 0.
AnnaBridge 171:3a7713b1edbc 281 *
AnnaBridge 171:3a7713b1edbc 282 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 283 * @param pin FGPIO pin's number
AnnaBridge 171:3a7713b1edbc 284 * @param output FGPIOpin output logic level.
AnnaBridge 171:3a7713b1edbc 285 * - 0: corresponding pin output low logic level.
AnnaBridge 171:3a7713b1edbc 286 * - 1: corresponding pin output high logic level.
AnnaBridge 171:3a7713b1edbc 287 */
AnnaBridge 171:3a7713b1edbc 288 static inline void FGPIO_WritePinOutput(FGPIO_Type *base, uint32_t pin, uint8_t output)
AnnaBridge 171:3a7713b1edbc 289 {
AnnaBridge 171:3a7713b1edbc 290 if (output == 0U)
AnnaBridge 171:3a7713b1edbc 291 {
AnnaBridge 171:3a7713b1edbc 292 base->PCOR = 1 << pin;
AnnaBridge 171:3a7713b1edbc 293 }
AnnaBridge 171:3a7713b1edbc 294 else
AnnaBridge 171:3a7713b1edbc 295 {
AnnaBridge 171:3a7713b1edbc 296 base->PSOR = 1 << pin;
AnnaBridge 171:3a7713b1edbc 297 }
AnnaBridge 171:3a7713b1edbc 298 }
AnnaBridge 171:3a7713b1edbc 299
AnnaBridge 171:3a7713b1edbc 300 /*!
AnnaBridge 171:3a7713b1edbc 301 * @brief Sets the output level of the multiple FGPIO pins to the logic 1.
AnnaBridge 171:3a7713b1edbc 302 *
AnnaBridge 171:3a7713b1edbc 303 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 304 * @param mask FGPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 305 */
AnnaBridge 171:3a7713b1edbc 306 static inline void FGPIO_SetPinsOutput(FGPIO_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 307 {
AnnaBridge 171:3a7713b1edbc 308 base->PSOR = mask;
AnnaBridge 171:3a7713b1edbc 309 }
AnnaBridge 171:3a7713b1edbc 310
AnnaBridge 171:3a7713b1edbc 311 /*!
AnnaBridge 171:3a7713b1edbc 312 * @brief Sets the output level of the multiple FGPIO pins to the logic 0.
AnnaBridge 171:3a7713b1edbc 313 *
AnnaBridge 171:3a7713b1edbc 314 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 315 * @param mask FGPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 316 */
AnnaBridge 171:3a7713b1edbc 317 static inline void FGPIO_ClearPinsOutput(FGPIO_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 318 {
AnnaBridge 171:3a7713b1edbc 319 base->PCOR = mask;
AnnaBridge 171:3a7713b1edbc 320 }
AnnaBridge 171:3a7713b1edbc 321
AnnaBridge 171:3a7713b1edbc 322 /*!
AnnaBridge 171:3a7713b1edbc 323 * @brief Reverses current output logic of the multiple FGPIO pins.
AnnaBridge 171:3a7713b1edbc 324 *
AnnaBridge 171:3a7713b1edbc 325 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 326 * @param mask FGPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 327 */
AnnaBridge 171:3a7713b1edbc 328 static inline void FGPIO_TogglePinsOutput(FGPIO_Type *base, uint32_t mask)
AnnaBridge 171:3a7713b1edbc 329 {
AnnaBridge 171:3a7713b1edbc 330 base->PTOR = mask;
AnnaBridge 171:3a7713b1edbc 331 }
AnnaBridge 171:3a7713b1edbc 332 /*@}*/
AnnaBridge 171:3a7713b1edbc 333
AnnaBridge 171:3a7713b1edbc 334 /*! @name FGPIO Input Operations */
AnnaBridge 171:3a7713b1edbc 335 /*@{*/
AnnaBridge 171:3a7713b1edbc 336
AnnaBridge 171:3a7713b1edbc 337 /*!
AnnaBridge 171:3a7713b1edbc 338 * @brief Reads the current input value of the whole FGPIO port.
AnnaBridge 171:3a7713b1edbc 339 *
AnnaBridge 171:3a7713b1edbc 340 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 341 * @param pin FGPIO pin's number
AnnaBridge 171:3a7713b1edbc 342 * @retval FGPIO port input value
AnnaBridge 171:3a7713b1edbc 343 * - 0: corresponding pin input low logic level.
AnnaBridge 171:3a7713b1edbc 344 * - 1: corresponding pin input high logic level.
AnnaBridge 171:3a7713b1edbc 345 */
AnnaBridge 171:3a7713b1edbc 346 static inline uint32_t FGPIO_ReadPinInput(FGPIO_Type *base, uint32_t pin)
AnnaBridge 171:3a7713b1edbc 347 {
AnnaBridge 171:3a7713b1edbc 348 return (((base->PDIR) >> pin) & 0x01U);
AnnaBridge 171:3a7713b1edbc 349 }
AnnaBridge 171:3a7713b1edbc 350 /*@}*/
AnnaBridge 171:3a7713b1edbc 351
AnnaBridge 171:3a7713b1edbc 352 /*! @name FGPIO Interrupt */
AnnaBridge 171:3a7713b1edbc 353 /*@{*/
AnnaBridge 171:3a7713b1edbc 354
AnnaBridge 171:3a7713b1edbc 355 /*!
AnnaBridge 171:3a7713b1edbc 356 * @brief Reads the whole FGPIO port interrupt status flag.
AnnaBridge 171:3a7713b1edbc 357 *
AnnaBridge 171:3a7713b1edbc 358 * If a pin is configured to generate the DMA request, the corresponding flag
AnnaBridge 171:3a7713b1edbc 359 * is cleared automatically at the completion of the requested DMA transfer.
AnnaBridge 171:3a7713b1edbc 360 * Otherwise, the flag remains set until a logic one is written to that flag.
AnnaBridge 171:3a7713b1edbc 361 * If configured for a level sensitive interrupt that remains asserted, the flag
AnnaBridge 171:3a7713b1edbc 362 * is set again immediately.
AnnaBridge 171:3a7713b1edbc 363 *
AnnaBridge 171:3a7713b1edbc 364 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 365 * @retval Current FGPIO port interrupt status flags, for example, 0x00010001 means the
AnnaBridge 171:3a7713b1edbc 366 * pin 0 and 17 have the interrupt.
AnnaBridge 171:3a7713b1edbc 367 */
AnnaBridge 171:3a7713b1edbc 368 uint32_t FGPIO_GetPinsInterruptFlags(FGPIO_Type *base);
AnnaBridge 171:3a7713b1edbc 369
AnnaBridge 171:3a7713b1edbc 370 /*!
AnnaBridge 171:3a7713b1edbc 371 * @brief Clears the multiple FGPIO pins' interrupt status flag.
AnnaBridge 171:3a7713b1edbc 372 *
AnnaBridge 171:3a7713b1edbc 373 * @param base FGPIO peripheral base pointer(GPIOA, GPIOB, GPIOC, and so on.)
AnnaBridge 171:3a7713b1edbc 374 * @param mask FGPIO pins' numbers macro
AnnaBridge 171:3a7713b1edbc 375 */
AnnaBridge 171:3a7713b1edbc 376 void FGPIO_ClearPinsInterruptFlags(FGPIO_Type *base, uint32_t mask);
AnnaBridge 171:3a7713b1edbc 377
AnnaBridge 171:3a7713b1edbc 378 /*@}*/
AnnaBridge 171:3a7713b1edbc 379
AnnaBridge 171:3a7713b1edbc 380 #endif /* FSL_FEATURE_SOC_FGPIO_COUNT */
AnnaBridge 171:3a7713b1edbc 381
AnnaBridge 171:3a7713b1edbc 382 #if defined(__cplusplus)
AnnaBridge 171:3a7713b1edbc 383 }
AnnaBridge 171:3a7713b1edbc 384 #endif
AnnaBridge 171:3a7713b1edbc 385
AnnaBridge 171:3a7713b1edbc 386 /*!
AnnaBridge 171:3a7713b1edbc 387 * @}
AnnaBridge 171:3a7713b1edbc 388 */
AnnaBridge 171:3a7713b1edbc 389
AnnaBridge 171:3a7713b1edbc 390 #endif /* _FSL_GPIO_H_*/