The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.
Dependents: hello SerialTestv11 SerialTestv12 Sierpinski ... more
mbed 2
This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.
TARGET_EFM32ZG_STK3200/TOOLCHAIN_ARM_MICRO/efm32zg_vcmp.h@172:65be27845400, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 20:53:29 2019 +0000
- Revision:
- 172:65be27845400
- Parent:
- 171:3a7713b1edbc
mbed library release version 165
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 171:3a7713b1edbc | 1 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 2 | * @file efm32zg_vcmp.h |
AnnaBridge | 171:3a7713b1edbc | 3 | * @brief EFM32ZG_VCMP register and bit field definitions |
AnnaBridge | 171:3a7713b1edbc | 4 | * @version 5.1.2 |
AnnaBridge | 171:3a7713b1edbc | 5 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 6 | * @section License |
AnnaBridge | 171:3a7713b1edbc | 7 | * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b> |
AnnaBridge | 171:3a7713b1edbc | 8 | ****************************************************************************** |
AnnaBridge | 171:3a7713b1edbc | 9 | * |
AnnaBridge | 171:3a7713b1edbc | 10 | * Permission is granted to anyone to use this software for any purpose, |
AnnaBridge | 171:3a7713b1edbc | 11 | * including commercial applications, and to alter it and redistribute it |
AnnaBridge | 171:3a7713b1edbc | 12 | * freely, subject to the following restrictions: |
AnnaBridge | 171:3a7713b1edbc | 13 | * |
AnnaBridge | 171:3a7713b1edbc | 14 | * 1. The origin of this software must not be misrepresented; you must not |
AnnaBridge | 171:3a7713b1edbc | 15 | * claim that you wrote the original software.@n |
AnnaBridge | 171:3a7713b1edbc | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
AnnaBridge | 171:3a7713b1edbc | 17 | * misrepresented as being the original software.@n |
AnnaBridge | 171:3a7713b1edbc | 18 | * 3. This notice may not be removed or altered from any source distribution. |
AnnaBridge | 171:3a7713b1edbc | 19 | * |
AnnaBridge | 171:3a7713b1edbc | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc. |
AnnaBridge | 171:3a7713b1edbc | 21 | * has no obligation to support this Software. Silicon Laboratories, Inc. is |
AnnaBridge | 171:3a7713b1edbc | 22 | * providing the Software "AS IS", with no express or implied warranties of any |
AnnaBridge | 171:3a7713b1edbc | 23 | * kind, including, but not limited to, any implied warranties of |
AnnaBridge | 171:3a7713b1edbc | 24 | * merchantability or fitness for any particular purpose or warranties against |
AnnaBridge | 171:3a7713b1edbc | 25 | * infringement of any proprietary rights of a third party. |
AnnaBridge | 171:3a7713b1edbc | 26 | * |
AnnaBridge | 171:3a7713b1edbc | 27 | * Silicon Laboratories, Inc. will not be liable for any consequential, |
AnnaBridge | 171:3a7713b1edbc | 28 | * incidental, or special damages, or any other relief, or for any claim by |
AnnaBridge | 171:3a7713b1edbc | 29 | * any third party, arising from your use of this Software. |
AnnaBridge | 171:3a7713b1edbc | 30 | * |
AnnaBridge | 171:3a7713b1edbc | 31 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 32 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 33 | * @addtogroup Parts |
AnnaBridge | 171:3a7713b1edbc | 34 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 35 | ******************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 36 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 37 | * @defgroup EFM32ZG_VCMP |
AnnaBridge | 171:3a7713b1edbc | 38 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 39 | * @brief EFM32ZG_VCMP Register Declaration |
AnnaBridge | 171:3a7713b1edbc | 40 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 41 | typedef struct |
AnnaBridge | 171:3a7713b1edbc | 42 | { |
AnnaBridge | 171:3a7713b1edbc | 43 | __IOM uint32_t CTRL; /**< Control Register */ |
AnnaBridge | 171:3a7713b1edbc | 44 | __IOM uint32_t INPUTSEL; /**< Input Selection Register */ |
AnnaBridge | 171:3a7713b1edbc | 45 | __IM uint32_t STATUS; /**< Status Register */ |
AnnaBridge | 171:3a7713b1edbc | 46 | __IOM uint32_t IEN; /**< Interrupt Enable Register */ |
AnnaBridge | 171:3a7713b1edbc | 47 | __IM uint32_t IF; /**< Interrupt Flag Register */ |
AnnaBridge | 171:3a7713b1edbc | 48 | __IOM uint32_t IFS; /**< Interrupt Flag Set Register */ |
AnnaBridge | 171:3a7713b1edbc | 49 | __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */ |
AnnaBridge | 171:3a7713b1edbc | 50 | } VCMP_TypeDef; /** @} */ |
AnnaBridge | 171:3a7713b1edbc | 51 | |
AnnaBridge | 171:3a7713b1edbc | 52 | /**************************************************************************//** |
AnnaBridge | 171:3a7713b1edbc | 53 | * @defgroup EFM32ZG_VCMP_BitFields |
AnnaBridge | 171:3a7713b1edbc | 54 | * @{ |
AnnaBridge | 171:3a7713b1edbc | 55 | *****************************************************************************/ |
AnnaBridge | 171:3a7713b1edbc | 56 | |
AnnaBridge | 171:3a7713b1edbc | 57 | /* Bit fields for VCMP CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 58 | #define _VCMP_CTRL_RESETVALUE 0x47000000UL /**< Default value for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 59 | #define _VCMP_CTRL_MASK 0x4F030715UL /**< Mask for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 60 | #define VCMP_CTRL_EN (0x1UL << 0) /**< Voltage Supply Comparator Enable */ |
AnnaBridge | 171:3a7713b1edbc | 61 | #define _VCMP_CTRL_EN_SHIFT 0 /**< Shift value for VCMP_EN */ |
AnnaBridge | 171:3a7713b1edbc | 62 | #define _VCMP_CTRL_EN_MASK 0x1UL /**< Bit mask for VCMP_EN */ |
AnnaBridge | 171:3a7713b1edbc | 63 | #define _VCMP_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 64 | #define VCMP_CTRL_EN_DEFAULT (_VCMP_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 65 | #define VCMP_CTRL_INACTVAL (0x1UL << 2) /**< Inactive Value */ |
AnnaBridge | 171:3a7713b1edbc | 66 | #define _VCMP_CTRL_INACTVAL_SHIFT 2 /**< Shift value for VCMP_INACTVAL */ |
AnnaBridge | 171:3a7713b1edbc | 67 | #define _VCMP_CTRL_INACTVAL_MASK 0x4UL /**< Bit mask for VCMP_INACTVAL */ |
AnnaBridge | 171:3a7713b1edbc | 68 | #define _VCMP_CTRL_INACTVAL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 69 | #define VCMP_CTRL_INACTVAL_DEFAULT (_VCMP_CTRL_INACTVAL_DEFAULT << 2) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 70 | #define VCMP_CTRL_HYSTEN (0x1UL << 4) /**< Hysteresis Enable */ |
AnnaBridge | 171:3a7713b1edbc | 71 | #define _VCMP_CTRL_HYSTEN_SHIFT 4 /**< Shift value for VCMP_HYSTEN */ |
AnnaBridge | 171:3a7713b1edbc | 72 | #define _VCMP_CTRL_HYSTEN_MASK 0x10UL /**< Bit mask for VCMP_HYSTEN */ |
AnnaBridge | 171:3a7713b1edbc | 73 | #define _VCMP_CTRL_HYSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 74 | #define VCMP_CTRL_HYSTEN_DEFAULT (_VCMP_CTRL_HYSTEN_DEFAULT << 4) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 75 | #define _VCMP_CTRL_WARMTIME_SHIFT 8 /**< Shift value for VCMP_WARMTIME */ |
AnnaBridge | 171:3a7713b1edbc | 76 | #define _VCMP_CTRL_WARMTIME_MASK 0x700UL /**< Bit mask for VCMP_WARMTIME */ |
AnnaBridge | 171:3a7713b1edbc | 77 | #define _VCMP_CTRL_WARMTIME_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 78 | #define _VCMP_CTRL_WARMTIME_4CYCLES 0x00000000UL /**< Mode 4CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 79 | #define _VCMP_CTRL_WARMTIME_8CYCLES 0x00000001UL /**< Mode 8CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 80 | #define _VCMP_CTRL_WARMTIME_16CYCLES 0x00000002UL /**< Mode 16CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 81 | #define _VCMP_CTRL_WARMTIME_32CYCLES 0x00000003UL /**< Mode 32CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 82 | #define _VCMP_CTRL_WARMTIME_64CYCLES 0x00000004UL /**< Mode 64CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 83 | #define _VCMP_CTRL_WARMTIME_128CYCLES 0x00000005UL /**< Mode 128CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 84 | #define _VCMP_CTRL_WARMTIME_256CYCLES 0x00000006UL /**< Mode 256CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 85 | #define _VCMP_CTRL_WARMTIME_512CYCLES 0x00000007UL /**< Mode 512CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 86 | #define VCMP_CTRL_WARMTIME_DEFAULT (_VCMP_CTRL_WARMTIME_DEFAULT << 8) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 87 | #define VCMP_CTRL_WARMTIME_4CYCLES (_VCMP_CTRL_WARMTIME_4CYCLES << 8) /**< Shifted mode 4CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 88 | #define VCMP_CTRL_WARMTIME_8CYCLES (_VCMP_CTRL_WARMTIME_8CYCLES << 8) /**< Shifted mode 8CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 89 | #define VCMP_CTRL_WARMTIME_16CYCLES (_VCMP_CTRL_WARMTIME_16CYCLES << 8) /**< Shifted mode 16CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 90 | #define VCMP_CTRL_WARMTIME_32CYCLES (_VCMP_CTRL_WARMTIME_32CYCLES << 8) /**< Shifted mode 32CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 91 | #define VCMP_CTRL_WARMTIME_64CYCLES (_VCMP_CTRL_WARMTIME_64CYCLES << 8) /**< Shifted mode 64CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 92 | #define VCMP_CTRL_WARMTIME_128CYCLES (_VCMP_CTRL_WARMTIME_128CYCLES << 8) /**< Shifted mode 128CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 93 | #define VCMP_CTRL_WARMTIME_256CYCLES (_VCMP_CTRL_WARMTIME_256CYCLES << 8) /**< Shifted mode 256CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 94 | #define VCMP_CTRL_WARMTIME_512CYCLES (_VCMP_CTRL_WARMTIME_512CYCLES << 8) /**< Shifted mode 512CYCLES for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 95 | #define VCMP_CTRL_IRISE (0x1UL << 16) /**< Rising Edge Interrupt Sense */ |
AnnaBridge | 171:3a7713b1edbc | 96 | #define _VCMP_CTRL_IRISE_SHIFT 16 /**< Shift value for VCMP_IRISE */ |
AnnaBridge | 171:3a7713b1edbc | 97 | #define _VCMP_CTRL_IRISE_MASK 0x10000UL /**< Bit mask for VCMP_IRISE */ |
AnnaBridge | 171:3a7713b1edbc | 98 | #define _VCMP_CTRL_IRISE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 99 | #define VCMP_CTRL_IRISE_DEFAULT (_VCMP_CTRL_IRISE_DEFAULT << 16) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 100 | #define VCMP_CTRL_IFALL (0x1UL << 17) /**< Falling Edge Interrupt Sense */ |
AnnaBridge | 171:3a7713b1edbc | 101 | #define _VCMP_CTRL_IFALL_SHIFT 17 /**< Shift value for VCMP_IFALL */ |
AnnaBridge | 171:3a7713b1edbc | 102 | #define _VCMP_CTRL_IFALL_MASK 0x20000UL /**< Bit mask for VCMP_IFALL */ |
AnnaBridge | 171:3a7713b1edbc | 103 | #define _VCMP_CTRL_IFALL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 104 | #define VCMP_CTRL_IFALL_DEFAULT (_VCMP_CTRL_IFALL_DEFAULT << 17) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 105 | #define _VCMP_CTRL_BIASPROG_SHIFT 24 /**< Shift value for VCMP_BIASPROG */ |
AnnaBridge | 171:3a7713b1edbc | 106 | #define _VCMP_CTRL_BIASPROG_MASK 0xF000000UL /**< Bit mask for VCMP_BIASPROG */ |
AnnaBridge | 171:3a7713b1edbc | 107 | #define _VCMP_CTRL_BIASPROG_DEFAULT 0x00000007UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 108 | #define VCMP_CTRL_BIASPROG_DEFAULT (_VCMP_CTRL_BIASPROG_DEFAULT << 24) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 109 | #define VCMP_CTRL_HALFBIAS (0x1UL << 30) /**< Half Bias Current */ |
AnnaBridge | 171:3a7713b1edbc | 110 | #define _VCMP_CTRL_HALFBIAS_SHIFT 30 /**< Shift value for VCMP_HALFBIAS */ |
AnnaBridge | 171:3a7713b1edbc | 111 | #define _VCMP_CTRL_HALFBIAS_MASK 0x40000000UL /**< Bit mask for VCMP_HALFBIAS */ |
AnnaBridge | 171:3a7713b1edbc | 112 | #define _VCMP_CTRL_HALFBIAS_DEFAULT 0x00000001UL /**< Mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 113 | #define VCMP_CTRL_HALFBIAS_DEFAULT (_VCMP_CTRL_HALFBIAS_DEFAULT << 30) /**< Shifted mode DEFAULT for VCMP_CTRL */ |
AnnaBridge | 171:3a7713b1edbc | 114 | |
AnnaBridge | 171:3a7713b1edbc | 115 | /* Bit fields for VCMP INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 116 | #define _VCMP_INPUTSEL_RESETVALUE 0x00000000UL /**< Default value for VCMP_INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 117 | #define _VCMP_INPUTSEL_MASK 0x0000013FUL /**< Mask for VCMP_INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 118 | #define _VCMP_INPUTSEL_TRIGLEVEL_SHIFT 0 /**< Shift value for VCMP_TRIGLEVEL */ |
AnnaBridge | 171:3a7713b1edbc | 119 | #define _VCMP_INPUTSEL_TRIGLEVEL_MASK 0x3FUL /**< Bit mask for VCMP_TRIGLEVEL */ |
AnnaBridge | 171:3a7713b1edbc | 120 | #define _VCMP_INPUTSEL_TRIGLEVEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 121 | #define VCMP_INPUTSEL_TRIGLEVEL_DEFAULT (_VCMP_INPUTSEL_TRIGLEVEL_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 122 | #define VCMP_INPUTSEL_LPREF (0x1UL << 8) /**< Low Power Reference */ |
AnnaBridge | 171:3a7713b1edbc | 123 | #define _VCMP_INPUTSEL_LPREF_SHIFT 8 /**< Shift value for VCMP_LPREF */ |
AnnaBridge | 171:3a7713b1edbc | 124 | #define _VCMP_INPUTSEL_LPREF_MASK 0x100UL /**< Bit mask for VCMP_LPREF */ |
AnnaBridge | 171:3a7713b1edbc | 125 | #define _VCMP_INPUTSEL_LPREF_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 126 | #define VCMP_INPUTSEL_LPREF_DEFAULT (_VCMP_INPUTSEL_LPREF_DEFAULT << 8) /**< Shifted mode DEFAULT for VCMP_INPUTSEL */ |
AnnaBridge | 171:3a7713b1edbc | 127 | |
AnnaBridge | 171:3a7713b1edbc | 128 | /* Bit fields for VCMP STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 129 | #define _VCMP_STATUS_RESETVALUE 0x00000000UL /**< Default value for VCMP_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 130 | #define _VCMP_STATUS_MASK 0x00000003UL /**< Mask for VCMP_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 131 | #define VCMP_STATUS_VCMPACT (0x1UL << 0) /**< Voltage Supply Comparator Active */ |
AnnaBridge | 171:3a7713b1edbc | 132 | #define _VCMP_STATUS_VCMPACT_SHIFT 0 /**< Shift value for VCMP_VCMPACT */ |
AnnaBridge | 171:3a7713b1edbc | 133 | #define _VCMP_STATUS_VCMPACT_MASK 0x1UL /**< Bit mask for VCMP_VCMPACT */ |
AnnaBridge | 171:3a7713b1edbc | 134 | #define _VCMP_STATUS_VCMPACT_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 135 | #define VCMP_STATUS_VCMPACT_DEFAULT (_VCMP_STATUS_VCMPACT_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 136 | #define VCMP_STATUS_VCMPOUT (0x1UL << 1) /**< Voltage Supply Comparator Output */ |
AnnaBridge | 171:3a7713b1edbc | 137 | #define _VCMP_STATUS_VCMPOUT_SHIFT 1 /**< Shift value for VCMP_VCMPOUT */ |
AnnaBridge | 171:3a7713b1edbc | 138 | #define _VCMP_STATUS_VCMPOUT_MASK 0x2UL /**< Bit mask for VCMP_VCMPOUT */ |
AnnaBridge | 171:3a7713b1edbc | 139 | #define _VCMP_STATUS_VCMPOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 140 | #define VCMP_STATUS_VCMPOUT_DEFAULT (_VCMP_STATUS_VCMPOUT_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_STATUS */ |
AnnaBridge | 171:3a7713b1edbc | 141 | |
AnnaBridge | 171:3a7713b1edbc | 142 | /* Bit fields for VCMP IEN */ |
AnnaBridge | 171:3a7713b1edbc | 143 | #define _VCMP_IEN_RESETVALUE 0x00000000UL /**< Default value for VCMP_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 144 | #define _VCMP_IEN_MASK 0x00000003UL /**< Mask for VCMP_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 145 | #define VCMP_IEN_EDGE (0x1UL << 0) /**< Edge Trigger Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 146 | #define _VCMP_IEN_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 147 | #define _VCMP_IEN_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 148 | #define _VCMP_IEN_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 149 | #define VCMP_IEN_EDGE_DEFAULT (_VCMP_IEN_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 150 | #define VCMP_IEN_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Enable */ |
AnnaBridge | 171:3a7713b1edbc | 151 | #define _VCMP_IEN_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 152 | #define _VCMP_IEN_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 153 | #define _VCMP_IEN_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 154 | #define VCMP_IEN_WARMUP_DEFAULT (_VCMP_IEN_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IEN */ |
AnnaBridge | 171:3a7713b1edbc | 155 | |
AnnaBridge | 171:3a7713b1edbc | 156 | /* Bit fields for VCMP IF */ |
AnnaBridge | 171:3a7713b1edbc | 157 | #define _VCMP_IF_RESETVALUE 0x00000000UL /**< Default value for VCMP_IF */ |
AnnaBridge | 171:3a7713b1edbc | 158 | #define _VCMP_IF_MASK 0x00000003UL /**< Mask for VCMP_IF */ |
AnnaBridge | 171:3a7713b1edbc | 159 | #define VCMP_IF_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 160 | #define _VCMP_IF_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 161 | #define _VCMP_IF_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 162 | #define _VCMP_IF_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IF */ |
AnnaBridge | 171:3a7713b1edbc | 163 | #define VCMP_IF_EDGE_DEFAULT (_VCMP_IF_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IF */ |
AnnaBridge | 171:3a7713b1edbc | 164 | #define VCMP_IF_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag */ |
AnnaBridge | 171:3a7713b1edbc | 165 | #define _VCMP_IF_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 166 | #define _VCMP_IF_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 167 | #define _VCMP_IF_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IF */ |
AnnaBridge | 171:3a7713b1edbc | 168 | #define VCMP_IF_WARMUP_DEFAULT (_VCMP_IF_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IF */ |
AnnaBridge | 171:3a7713b1edbc | 169 | |
AnnaBridge | 171:3a7713b1edbc | 170 | /* Bit fields for VCMP IFS */ |
AnnaBridge | 171:3a7713b1edbc | 171 | #define _VCMP_IFS_RESETVALUE 0x00000000UL /**< Default value for VCMP_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 172 | #define _VCMP_IFS_MASK 0x00000003UL /**< Mask for VCMP_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 173 | #define VCMP_IFS_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag Set */ |
AnnaBridge | 171:3a7713b1edbc | 174 | #define _VCMP_IFS_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 175 | #define _VCMP_IFS_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 176 | #define _VCMP_IFS_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 177 | #define VCMP_IFS_EDGE_DEFAULT (_VCMP_IFS_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 178 | #define VCMP_IFS_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag Set */ |
AnnaBridge | 171:3a7713b1edbc | 179 | #define _VCMP_IFS_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 180 | #define _VCMP_IFS_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 181 | #define _VCMP_IFS_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 182 | #define VCMP_IFS_WARMUP_DEFAULT (_VCMP_IFS_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IFS */ |
AnnaBridge | 171:3a7713b1edbc | 183 | |
AnnaBridge | 171:3a7713b1edbc | 184 | /* Bit fields for VCMP IFC */ |
AnnaBridge | 171:3a7713b1edbc | 185 | #define _VCMP_IFC_RESETVALUE 0x00000000UL /**< Default value for VCMP_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 186 | #define _VCMP_IFC_MASK 0x00000003UL /**< Mask for VCMP_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 187 | #define VCMP_IFC_EDGE (0x1UL << 0) /**< Edge Triggered Interrupt Flag Clear */ |
AnnaBridge | 171:3a7713b1edbc | 188 | #define _VCMP_IFC_EDGE_SHIFT 0 /**< Shift value for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 189 | #define _VCMP_IFC_EDGE_MASK 0x1UL /**< Bit mask for VCMP_EDGE */ |
AnnaBridge | 171:3a7713b1edbc | 190 | #define _VCMP_IFC_EDGE_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 191 | #define VCMP_IFC_EDGE_DEFAULT (_VCMP_IFC_EDGE_DEFAULT << 0) /**< Shifted mode DEFAULT for VCMP_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 192 | #define VCMP_IFC_WARMUP (0x1UL << 1) /**< Warm-up Interrupt Flag Clear */ |
AnnaBridge | 171:3a7713b1edbc | 193 | #define _VCMP_IFC_WARMUP_SHIFT 1 /**< Shift value for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 194 | #define _VCMP_IFC_WARMUP_MASK 0x2UL /**< Bit mask for VCMP_WARMUP */ |
AnnaBridge | 171:3a7713b1edbc | 195 | #define _VCMP_IFC_WARMUP_DEFAULT 0x00000000UL /**< Mode DEFAULT for VCMP_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 196 | #define VCMP_IFC_WARMUP_DEFAULT (_VCMP_IFC_WARMUP_DEFAULT << 1) /**< Shifted mode DEFAULT for VCMP_IFC */ |
AnnaBridge | 171:3a7713b1edbc | 197 | |
AnnaBridge | 171:3a7713b1edbc | 198 | /** @} End of group EFM32ZG_VCMP */ |
AnnaBridge | 171:3a7713b1edbc | 199 | /** @} End of group Parts */ |
AnnaBridge | 171:3a7713b1edbc | 200 |