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TARGET_EFM32WG_STK3800/TOOLCHAIN_IAR/efm32wg_rtc.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file efm32wg_rtc.h
AnnaBridge 171:3a7713b1edbc 3 * @brief EFM32WG_RTC register and bit field definitions
AnnaBridge 171:3a7713b1edbc 4 * @version 5.1.2
AnnaBridge 171:3a7713b1edbc 5 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 6 * @section License
AnnaBridge 171:3a7713b1edbc 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 171:3a7713b1edbc 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 171:3a7713b1edbc 12 * freely, subject to the following restrictions:
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 171:3a7713b1edbc 15 * claim that you wrote the original software.@n
AnnaBridge 171:3a7713b1edbc 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 171:3a7713b1edbc 17 * misrepresented as being the original software.@n
AnnaBridge 171:3a7713b1edbc 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 171:3a7713b1edbc 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 171:3a7713b1edbc 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 171:3a7713b1edbc 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 171:3a7713b1edbc 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 171:3a7713b1edbc 25 * infringement of any proprietary rights of a third party.
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 171:3a7713b1edbc 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 171:3a7713b1edbc 29 * any third party, arising from your use of this Software.
AnnaBridge 171:3a7713b1edbc 30 *
AnnaBridge 171:3a7713b1edbc 31 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 32 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 33 * @addtogroup Parts
AnnaBridge 171:3a7713b1edbc 34 * @{
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 36 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 37 * @defgroup EFM32WG_RTC
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 * @brief EFM32WG_RTC Register Declaration
AnnaBridge 171:3a7713b1edbc 40 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 41 typedef struct
AnnaBridge 171:3a7713b1edbc 42 {
AnnaBridge 171:3a7713b1edbc 43 __IOM uint32_t CTRL; /**< Control Register */
AnnaBridge 171:3a7713b1edbc 44 __IOM uint32_t CNT; /**< Counter Value Register */
AnnaBridge 171:3a7713b1edbc 45 __IOM uint32_t COMP0; /**< Compare Value Register 0 */
AnnaBridge 171:3a7713b1edbc 46 __IOM uint32_t COMP1; /**< Compare Value Register 1 */
AnnaBridge 171:3a7713b1edbc 47 __IM uint32_t IF; /**< Interrupt Flag Register */
AnnaBridge 171:3a7713b1edbc 48 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
AnnaBridge 171:3a7713b1edbc 49 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
AnnaBridge 171:3a7713b1edbc 50 __IOM uint32_t IEN; /**< Interrupt Enable Register */
AnnaBridge 171:3a7713b1edbc 51
AnnaBridge 171:3a7713b1edbc 52 __IOM uint32_t FREEZE; /**< Freeze Register */
AnnaBridge 171:3a7713b1edbc 53 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
AnnaBridge 171:3a7713b1edbc 54 } RTC_TypeDef; /** @} */
AnnaBridge 171:3a7713b1edbc 55
AnnaBridge 171:3a7713b1edbc 56 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 57 * @defgroup EFM32WG_RTC_BitFields
AnnaBridge 171:3a7713b1edbc 58 * @{
AnnaBridge 171:3a7713b1edbc 59 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 60
AnnaBridge 171:3a7713b1edbc 61 /* Bit fields for RTC CTRL */
AnnaBridge 171:3a7713b1edbc 62 #define _RTC_CTRL_RESETVALUE 0x00000000UL /**< Default value for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 63 #define _RTC_CTRL_MASK 0x00000007UL /**< Mask for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 64 #define RTC_CTRL_EN (0x1UL << 0) /**< RTC Enable */
AnnaBridge 171:3a7713b1edbc 65 #define _RTC_CTRL_EN_SHIFT 0 /**< Shift value for RTC_EN */
AnnaBridge 171:3a7713b1edbc 66 #define _RTC_CTRL_EN_MASK 0x1UL /**< Bit mask for RTC_EN */
AnnaBridge 171:3a7713b1edbc 67 #define _RTC_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 68 #define RTC_CTRL_EN_DEFAULT (_RTC_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 69 #define RTC_CTRL_DEBUGRUN (0x1UL << 1) /**< Debug Mode Run Enable */
AnnaBridge 171:3a7713b1edbc 70 #define _RTC_CTRL_DEBUGRUN_SHIFT 1 /**< Shift value for RTC_DEBUGRUN */
AnnaBridge 171:3a7713b1edbc 71 #define _RTC_CTRL_DEBUGRUN_MASK 0x2UL /**< Bit mask for RTC_DEBUGRUN */
AnnaBridge 171:3a7713b1edbc 72 #define _RTC_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 73 #define RTC_CTRL_DEBUGRUN_DEFAULT (_RTC_CTRL_DEBUGRUN_DEFAULT << 1) /**< Shifted mode DEFAULT for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 74 #define RTC_CTRL_COMP0TOP (0x1UL << 2) /**< Compare Channel 0 is Top Value */
AnnaBridge 171:3a7713b1edbc 75 #define _RTC_CTRL_COMP0TOP_SHIFT 2 /**< Shift value for RTC_COMP0TOP */
AnnaBridge 171:3a7713b1edbc 76 #define _RTC_CTRL_COMP0TOP_MASK 0x4UL /**< Bit mask for RTC_COMP0TOP */
AnnaBridge 171:3a7713b1edbc 77 #define _RTC_CTRL_COMP0TOP_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 78 #define _RTC_CTRL_COMP0TOP_DISABLE 0x00000000UL /**< Mode DISABLE for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 79 #define _RTC_CTRL_COMP0TOP_ENABLE 0x00000001UL /**< Mode ENABLE for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 80 #define RTC_CTRL_COMP0TOP_DEFAULT (_RTC_CTRL_COMP0TOP_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 81 #define RTC_CTRL_COMP0TOP_DISABLE (_RTC_CTRL_COMP0TOP_DISABLE << 2) /**< Shifted mode DISABLE for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 82 #define RTC_CTRL_COMP0TOP_ENABLE (_RTC_CTRL_COMP0TOP_ENABLE << 2) /**< Shifted mode ENABLE for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 83
AnnaBridge 171:3a7713b1edbc 84 /* Bit fields for RTC CNT */
AnnaBridge 171:3a7713b1edbc 85 #define _RTC_CNT_RESETVALUE 0x00000000UL /**< Default value for RTC_CNT */
AnnaBridge 171:3a7713b1edbc 86 #define _RTC_CNT_MASK 0x00FFFFFFUL /**< Mask for RTC_CNT */
AnnaBridge 171:3a7713b1edbc 87 #define _RTC_CNT_CNT_SHIFT 0 /**< Shift value for RTC_CNT */
AnnaBridge 171:3a7713b1edbc 88 #define _RTC_CNT_CNT_MASK 0xFFFFFFUL /**< Bit mask for RTC_CNT */
AnnaBridge 171:3a7713b1edbc 89 #define _RTC_CNT_CNT_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_CNT */
AnnaBridge 171:3a7713b1edbc 90 #define RTC_CNT_CNT_DEFAULT (_RTC_CNT_CNT_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_CNT */
AnnaBridge 171:3a7713b1edbc 91
AnnaBridge 171:3a7713b1edbc 92 /* Bit fields for RTC COMP0 */
AnnaBridge 171:3a7713b1edbc 93 #define _RTC_COMP0_RESETVALUE 0x00000000UL /**< Default value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 94 #define _RTC_COMP0_MASK 0x00FFFFFFUL /**< Mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 95 #define _RTC_COMP0_COMP0_SHIFT 0 /**< Shift value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 96 #define _RTC_COMP0_COMP0_MASK 0xFFFFFFUL /**< Bit mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 97 #define _RTC_COMP0_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 98 #define RTC_COMP0_COMP0_DEFAULT (_RTC_COMP0_COMP0_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 99
AnnaBridge 171:3a7713b1edbc 100 /* Bit fields for RTC COMP1 */
AnnaBridge 171:3a7713b1edbc 101 #define _RTC_COMP1_RESETVALUE 0x00000000UL /**< Default value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 102 #define _RTC_COMP1_MASK 0x00FFFFFFUL /**< Mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 103 #define _RTC_COMP1_COMP1_SHIFT 0 /**< Shift value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 104 #define _RTC_COMP1_COMP1_MASK 0xFFFFFFUL /**< Bit mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 105 #define _RTC_COMP1_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 106 #define RTC_COMP1_COMP1_DEFAULT (_RTC_COMP1_COMP1_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 107
AnnaBridge 171:3a7713b1edbc 108 /* Bit fields for RTC IF */
AnnaBridge 171:3a7713b1edbc 109 #define _RTC_IF_RESETVALUE 0x00000000UL /**< Default value for RTC_IF */
AnnaBridge 171:3a7713b1edbc 110 #define _RTC_IF_MASK 0x00000007UL /**< Mask for RTC_IF */
AnnaBridge 171:3a7713b1edbc 111 #define RTC_IF_OF (0x1UL << 0) /**< Overflow Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 112 #define _RTC_IF_OF_SHIFT 0 /**< Shift value for RTC_OF */
AnnaBridge 171:3a7713b1edbc 113 #define _RTC_IF_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
AnnaBridge 171:3a7713b1edbc 114 #define _RTC_IF_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IF */
AnnaBridge 171:3a7713b1edbc 115 #define RTC_IF_OF_DEFAULT (_RTC_IF_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_IF */
AnnaBridge 171:3a7713b1edbc 116 #define RTC_IF_COMP0 (0x1UL << 1) /**< Compare Match 0 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 117 #define _RTC_IF_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 118 #define _RTC_IF_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 119 #define _RTC_IF_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IF */
AnnaBridge 171:3a7713b1edbc 120 #define RTC_IF_COMP0_DEFAULT (_RTC_IF_COMP0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTC_IF */
AnnaBridge 171:3a7713b1edbc 121 #define RTC_IF_COMP1 (0x1UL << 2) /**< Compare Match 1 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 122 #define _RTC_IF_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 123 #define _RTC_IF_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 124 #define _RTC_IF_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IF */
AnnaBridge 171:3a7713b1edbc 125 #define RTC_IF_COMP1_DEFAULT (_RTC_IF_COMP1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_IF */
AnnaBridge 171:3a7713b1edbc 126
AnnaBridge 171:3a7713b1edbc 127 /* Bit fields for RTC IFS */
AnnaBridge 171:3a7713b1edbc 128 #define _RTC_IFS_RESETVALUE 0x00000000UL /**< Default value for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 129 #define _RTC_IFS_MASK 0x00000007UL /**< Mask for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 130 #define RTC_IFS_OF (0x1UL << 0) /**< Set Overflow Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 131 #define _RTC_IFS_OF_SHIFT 0 /**< Shift value for RTC_OF */
AnnaBridge 171:3a7713b1edbc 132 #define _RTC_IFS_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
AnnaBridge 171:3a7713b1edbc 133 #define _RTC_IFS_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 134 #define RTC_IFS_OF_DEFAULT (_RTC_IFS_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 135 #define RTC_IFS_COMP0 (0x1UL << 1) /**< Set Compare match 0 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 136 #define _RTC_IFS_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 137 #define _RTC_IFS_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 138 #define _RTC_IFS_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 139 #define RTC_IFS_COMP0_DEFAULT (_RTC_IFS_COMP0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 140 #define RTC_IFS_COMP1 (0x1UL << 2) /**< Set Compare match 1 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 141 #define _RTC_IFS_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 142 #define _RTC_IFS_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 143 #define _RTC_IFS_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 144 #define RTC_IFS_COMP1_DEFAULT (_RTC_IFS_COMP1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_IFS */
AnnaBridge 171:3a7713b1edbc 145
AnnaBridge 171:3a7713b1edbc 146 /* Bit fields for RTC IFC */
AnnaBridge 171:3a7713b1edbc 147 #define _RTC_IFC_RESETVALUE 0x00000000UL /**< Default value for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 148 #define _RTC_IFC_MASK 0x00000007UL /**< Mask for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 149 #define RTC_IFC_OF (0x1UL << 0) /**< Clear Overflow Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 150 #define _RTC_IFC_OF_SHIFT 0 /**< Shift value for RTC_OF */
AnnaBridge 171:3a7713b1edbc 151 #define _RTC_IFC_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
AnnaBridge 171:3a7713b1edbc 152 #define _RTC_IFC_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 153 #define RTC_IFC_OF_DEFAULT (_RTC_IFC_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 154 #define RTC_IFC_COMP0 (0x1UL << 1) /**< Clear Compare match 0 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 155 #define _RTC_IFC_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 156 #define _RTC_IFC_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 157 #define _RTC_IFC_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 158 #define RTC_IFC_COMP0_DEFAULT (_RTC_IFC_COMP0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 159 #define RTC_IFC_COMP1 (0x1UL << 2) /**< Clear Compare match 1 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 160 #define _RTC_IFC_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 161 #define _RTC_IFC_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 162 #define _RTC_IFC_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 163 #define RTC_IFC_COMP1_DEFAULT (_RTC_IFC_COMP1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_IFC */
AnnaBridge 171:3a7713b1edbc 164
AnnaBridge 171:3a7713b1edbc 165 /* Bit fields for RTC IEN */
AnnaBridge 171:3a7713b1edbc 166 #define _RTC_IEN_RESETVALUE 0x00000000UL /**< Default value for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 167 #define _RTC_IEN_MASK 0x00000007UL /**< Mask for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 168 #define RTC_IEN_OF (0x1UL << 0) /**< Overflow Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 169 #define _RTC_IEN_OF_SHIFT 0 /**< Shift value for RTC_OF */
AnnaBridge 171:3a7713b1edbc 170 #define _RTC_IEN_OF_MASK 0x1UL /**< Bit mask for RTC_OF */
AnnaBridge 171:3a7713b1edbc 171 #define _RTC_IEN_OF_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 172 #define RTC_IEN_OF_DEFAULT (_RTC_IEN_OF_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 173 #define RTC_IEN_COMP0 (0x1UL << 1) /**< Compare Match 0 Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 174 #define _RTC_IEN_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 175 #define _RTC_IEN_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 176 #define _RTC_IEN_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 177 #define RTC_IEN_COMP0_DEFAULT (_RTC_IEN_COMP0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 178 #define RTC_IEN_COMP1 (0x1UL << 2) /**< Compare Match 1 Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 179 #define _RTC_IEN_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 180 #define _RTC_IEN_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 181 #define _RTC_IEN_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 182 #define RTC_IEN_COMP1_DEFAULT (_RTC_IEN_COMP1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_IEN */
AnnaBridge 171:3a7713b1edbc 183
AnnaBridge 171:3a7713b1edbc 184 /* Bit fields for RTC FREEZE */
AnnaBridge 171:3a7713b1edbc 185 #define _RTC_FREEZE_RESETVALUE 0x00000000UL /**< Default value for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 186 #define _RTC_FREEZE_MASK 0x00000001UL /**< Mask for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 187 #define RTC_FREEZE_REGFREEZE (0x1UL << 0) /**< Register Update Freeze */
AnnaBridge 171:3a7713b1edbc 188 #define _RTC_FREEZE_REGFREEZE_SHIFT 0 /**< Shift value for RTC_REGFREEZE */
AnnaBridge 171:3a7713b1edbc 189 #define _RTC_FREEZE_REGFREEZE_MASK 0x1UL /**< Bit mask for RTC_REGFREEZE */
AnnaBridge 171:3a7713b1edbc 190 #define _RTC_FREEZE_REGFREEZE_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 191 #define _RTC_FREEZE_REGFREEZE_UPDATE 0x00000000UL /**< Mode UPDATE for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 192 #define _RTC_FREEZE_REGFREEZE_FREEZE 0x00000001UL /**< Mode FREEZE for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 193 #define RTC_FREEZE_REGFREEZE_DEFAULT (_RTC_FREEZE_REGFREEZE_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 194 #define RTC_FREEZE_REGFREEZE_UPDATE (_RTC_FREEZE_REGFREEZE_UPDATE << 0) /**< Shifted mode UPDATE for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 195 #define RTC_FREEZE_REGFREEZE_FREEZE (_RTC_FREEZE_REGFREEZE_FREEZE << 0) /**< Shifted mode FREEZE for RTC_FREEZE */
AnnaBridge 171:3a7713b1edbc 196
AnnaBridge 171:3a7713b1edbc 197 /* Bit fields for RTC SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 198 #define _RTC_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 199 #define _RTC_SYNCBUSY_MASK 0x00000007UL /**< Mask for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 200 #define RTC_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
AnnaBridge 171:3a7713b1edbc 201 #define _RTC_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 202 #define _RTC_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for RTC_CTRL */
AnnaBridge 171:3a7713b1edbc 203 #define _RTC_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 204 #define RTC_SYNCBUSY_CTRL_DEFAULT (_RTC_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 205 #define RTC_SYNCBUSY_COMP0 (0x1UL << 1) /**< COMP0 Register Busy */
AnnaBridge 171:3a7713b1edbc 206 #define _RTC_SYNCBUSY_COMP0_SHIFT 1 /**< Shift value for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 207 #define _RTC_SYNCBUSY_COMP0_MASK 0x2UL /**< Bit mask for RTC_COMP0 */
AnnaBridge 171:3a7713b1edbc 208 #define _RTC_SYNCBUSY_COMP0_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 209 #define RTC_SYNCBUSY_COMP0_DEFAULT (_RTC_SYNCBUSY_COMP0_DEFAULT << 1) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 210 #define RTC_SYNCBUSY_COMP1 (0x1UL << 2) /**< COMP1 Register Busy */
AnnaBridge 171:3a7713b1edbc 211 #define _RTC_SYNCBUSY_COMP1_SHIFT 2 /**< Shift value for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 212 #define _RTC_SYNCBUSY_COMP1_MASK 0x4UL /**< Bit mask for RTC_COMP1 */
AnnaBridge 171:3a7713b1edbc 213 #define _RTC_SYNCBUSY_COMP1_DEFAULT 0x00000000UL /**< Mode DEFAULT for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 214 #define RTC_SYNCBUSY_COMP1_DEFAULT (_RTC_SYNCBUSY_COMP1_DEFAULT << 2) /**< Shifted mode DEFAULT for RTC_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 215
AnnaBridge 171:3a7713b1edbc 216 /** @} End of group EFM32WG_RTC */
AnnaBridge 171:3a7713b1edbc 217 /** @} End of group Parts */
AnnaBridge 171:3a7713b1edbc 218