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TARGET_EFM32WG_STK3800/TOOLCHAIN_ARM_MICRO/em_emu.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 156:ff21514d8981 1 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 2 * @file em_emu.h
AnnaBridge 156:ff21514d8981 3 * @brief Energy management unit (EMU) peripheral API
Anna Bridge 160:5571c4ff569f 4 * @version 5.3.3
AnnaBridge 156:ff21514d8981 5 *******************************************************************************
Anna Bridge 160:5571c4ff569f 6 * # License
AnnaBridge 156:ff21514d8981 7 * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 156:ff21514d8981 8 *******************************************************************************
AnnaBridge 156:ff21514d8981 9 *
AnnaBridge 156:ff21514d8981 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 156:ff21514d8981 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 156:ff21514d8981 12 * freely, subject to the following restrictions:
AnnaBridge 156:ff21514d8981 13 *
AnnaBridge 156:ff21514d8981 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 156:ff21514d8981 15 * claim that you wrote the original software.
AnnaBridge 156:ff21514d8981 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 156:ff21514d8981 17 * misrepresented as being the original software.
AnnaBridge 156:ff21514d8981 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 156:ff21514d8981 19 *
AnnaBridge 156:ff21514d8981 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no
AnnaBridge 156:ff21514d8981 21 * obligation to support this Software. Silicon Labs is providing the
AnnaBridge 156:ff21514d8981 22 * Software "AS IS", with no express or implied warranties of any kind,
AnnaBridge 156:ff21514d8981 23 * including, but not limited to, any implied warranties of merchantability
AnnaBridge 156:ff21514d8981 24 * or fitness for any particular purpose or warranties against infringement
AnnaBridge 156:ff21514d8981 25 * of any proprietary rights of a third party.
AnnaBridge 156:ff21514d8981 26 *
AnnaBridge 156:ff21514d8981 27 * Silicon Labs will not be liable for any consequential, incidental, or
AnnaBridge 156:ff21514d8981 28 * special damages, or any other relief, or for any claim by any third party,
AnnaBridge 156:ff21514d8981 29 * arising from your use of this Software.
AnnaBridge 156:ff21514d8981 30 *
AnnaBridge 156:ff21514d8981 31 ******************************************************************************/
AnnaBridge 156:ff21514d8981 32
AnnaBridge 156:ff21514d8981 33 #ifndef EM_EMU_H
AnnaBridge 156:ff21514d8981 34 #define EM_EMU_H
AnnaBridge 156:ff21514d8981 35
AnnaBridge 156:ff21514d8981 36 #include "em_device.h"
Anna Bridge 160:5571c4ff569f 37 #if defined(EMU_PRESENT)
AnnaBridge 156:ff21514d8981 38
AnnaBridge 156:ff21514d8981 39 #include <stdbool.h>
AnnaBridge 156:ff21514d8981 40 #include "em_bus.h"
AnnaBridge 156:ff21514d8981 41
AnnaBridge 156:ff21514d8981 42 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 43 extern "C" {
AnnaBridge 156:ff21514d8981 44 #endif
AnnaBridge 156:ff21514d8981 45
AnnaBridge 156:ff21514d8981 46 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 47 * @addtogroup emlib
AnnaBridge 156:ff21514d8981 48 * @{
AnnaBridge 156:ff21514d8981 49 ******************************************************************************/
AnnaBridge 156:ff21514d8981 50
AnnaBridge 156:ff21514d8981 51 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 52 * @addtogroup EMU
AnnaBridge 156:ff21514d8981 53 * @{
AnnaBridge 156:ff21514d8981 54 ******************************************************************************/
AnnaBridge 156:ff21514d8981 55
AnnaBridge 156:ff21514d8981 56 /*******************************************************************************
AnnaBridge 156:ff21514d8981 57 ******************************** ENUMS ************************************
AnnaBridge 156:ff21514d8981 58 ******************************************************************************/
AnnaBridge 156:ff21514d8981 59
Anna Bridge 160:5571c4ff569f 60 #if defined(_EMU_EM4CONF_OSC_MASK)
AnnaBridge 156:ff21514d8981 61 /** EM4 duty oscillator */
Anna Bridge 160:5571c4ff569f 62 typedef enum {
AnnaBridge 156:ff21514d8981 63 /** Select ULFRCO as duty oscillator in EM4 */
AnnaBridge 156:ff21514d8981 64 emuEM4Osc_ULFRCO = EMU_EM4CONF_OSC_ULFRCO,
AnnaBridge 156:ff21514d8981 65 /** Select LFXO as duty oscillator in EM4 */
AnnaBridge 156:ff21514d8981 66 emuEM4Osc_LFXO = EMU_EM4CONF_OSC_LFXO,
AnnaBridge 156:ff21514d8981 67 /** Select LFRCO as duty oscillator in EM4 */
AnnaBridge 156:ff21514d8981 68 emuEM4Osc_LFRCO = EMU_EM4CONF_OSC_LFRCO
AnnaBridge 156:ff21514d8981 69 } EMU_EM4Osc_TypeDef;
AnnaBridge 156:ff21514d8981 70 #endif
AnnaBridge 156:ff21514d8981 71
Anna Bridge 160:5571c4ff569f 72 #if defined(_EMU_BUCTRL_PROBE_MASK)
AnnaBridge 156:ff21514d8981 73 /** Backup Power Voltage Probe types */
Anna Bridge 160:5571c4ff569f 74 typedef enum {
AnnaBridge 156:ff21514d8981 75 /** Disable voltage probe */
AnnaBridge 156:ff21514d8981 76 emuProbe_Disable = EMU_BUCTRL_PROBE_DISABLE,
AnnaBridge 156:ff21514d8981 77 /** Connect probe to VDD_DREG */
AnnaBridge 156:ff21514d8981 78 emuProbe_VDDDReg = EMU_BUCTRL_PROBE_VDDDREG,
AnnaBridge 156:ff21514d8981 79 /** Connect probe to BU_IN */
AnnaBridge 156:ff21514d8981 80 emuProbe_BUIN = EMU_BUCTRL_PROBE_BUIN,
AnnaBridge 156:ff21514d8981 81 /** Connect probe to BU_OUT */
AnnaBridge 156:ff21514d8981 82 emuProbe_BUOUT = EMU_BUCTRL_PROBE_BUOUT
AnnaBridge 156:ff21514d8981 83 } EMU_Probe_TypeDef;
AnnaBridge 156:ff21514d8981 84 #endif
AnnaBridge 156:ff21514d8981 85
Anna Bridge 160:5571c4ff569f 86 #if defined(_EMU_PWRCONF_PWRRES_MASK)
AnnaBridge 156:ff21514d8981 87 /** Backup Power Domain resistor selection */
Anna Bridge 160:5571c4ff569f 88 typedef enum {
AnnaBridge 156:ff21514d8981 89 /** Main power and backup power connected with RES0 series resistance */
AnnaBridge 156:ff21514d8981 90 emuRes_Res0 = EMU_PWRCONF_PWRRES_RES0,
AnnaBridge 156:ff21514d8981 91 /** Main power and backup power connected with RES1 series resistance */
AnnaBridge 156:ff21514d8981 92 emuRes_Res1 = EMU_PWRCONF_PWRRES_RES1,
AnnaBridge 156:ff21514d8981 93 /** Main power and backup power connected with RES2 series resistance */
AnnaBridge 156:ff21514d8981 94 emuRes_Res2 = EMU_PWRCONF_PWRRES_RES2,
AnnaBridge 156:ff21514d8981 95 /** Main power and backup power connected with RES3 series resistance */
AnnaBridge 156:ff21514d8981 96 emuRes_Res3 = EMU_PWRCONF_PWRRES_RES3,
AnnaBridge 156:ff21514d8981 97 } EMU_Resistor_TypeDef;
AnnaBridge 156:ff21514d8981 98 #endif
AnnaBridge 156:ff21514d8981 99
Anna Bridge 160:5571c4ff569f 100 #if defined(BU_PRESENT) && defined(_SILICON_LABS_32B_SERIES_0)
AnnaBridge 156:ff21514d8981 101 /** Backup Power Domain power connection */
Anna Bridge 160:5571c4ff569f 102 typedef enum {
AnnaBridge 156:ff21514d8981 103 /** No connection between main and backup power */
AnnaBridge 156:ff21514d8981 104 emuPower_None = EMU_BUINACT_PWRCON_NONE,
AnnaBridge 156:ff21514d8981 105 /** Main power and backup power connected through diode,
AnnaBridge 156:ff21514d8981 106 allowing current from backup to main only */
AnnaBridge 156:ff21514d8981 107 emuPower_BUMain = EMU_BUINACT_PWRCON_BUMAIN,
AnnaBridge 156:ff21514d8981 108 /** Main power and backup power connected through diode,
AnnaBridge 156:ff21514d8981 109 allowing current from main to backup only */
AnnaBridge 156:ff21514d8981 110 emuPower_MainBU = EMU_BUINACT_PWRCON_MAINBU,
AnnaBridge 156:ff21514d8981 111 /** Main power and backup power connected without diode */
AnnaBridge 156:ff21514d8981 112 emuPower_NoDiode = EMU_BUINACT_PWRCON_NODIODE,
AnnaBridge 156:ff21514d8981 113 } EMU_Power_TypeDef;
AnnaBridge 156:ff21514d8981 114 #endif
AnnaBridge 156:ff21514d8981 115
AnnaBridge 156:ff21514d8981 116 /** BOD threshold setting selector, active or inactive mode */
Anna Bridge 160:5571c4ff569f 117 typedef enum {
AnnaBridge 156:ff21514d8981 118 /** Configure BOD threshold for active mode */
AnnaBridge 156:ff21514d8981 119 emuBODMode_Active,
AnnaBridge 156:ff21514d8981 120 /** Configure BOD threshold for inactive mode */
AnnaBridge 156:ff21514d8981 121 emuBODMode_Inactive,
AnnaBridge 156:ff21514d8981 122 } EMU_BODMode_TypeDef;
AnnaBridge 156:ff21514d8981 123
Anna Bridge 160:5571c4ff569f 124 #if defined(_EMU_EM4CTRL_EM4STATE_MASK)
AnnaBridge 156:ff21514d8981 125 /** EM4 modes */
Anna Bridge 160:5571c4ff569f 126 typedef enum {
AnnaBridge 156:ff21514d8981 127 /** EM4 Hibernate */
AnnaBridge 156:ff21514d8981 128 emuEM4Hibernate = EMU_EM4CTRL_EM4STATE_EM4H,
AnnaBridge 156:ff21514d8981 129 /** EM4 Shutoff */
AnnaBridge 156:ff21514d8981 130 emuEM4Shutoff = EMU_EM4CTRL_EM4STATE_EM4S,
AnnaBridge 156:ff21514d8981 131 } EMU_EM4State_TypeDef;
AnnaBridge 156:ff21514d8981 132 #endif
AnnaBridge 156:ff21514d8981 133
Anna Bridge 160:5571c4ff569f 134 #if defined(_EMU_EM4CTRL_EM4IORETMODE_MASK)
Anna Bridge 160:5571c4ff569f 135 typedef enum {
AnnaBridge 156:ff21514d8981 136 /** No Retention: Pads enter reset state when entering EM4 */
AnnaBridge 156:ff21514d8981 137 emuPinRetentionDisable = EMU_EM4CTRL_EM4IORETMODE_DISABLE,
AnnaBridge 156:ff21514d8981 138 /** Retention through EM4: Pads enter reset state when exiting EM4 */
AnnaBridge 156:ff21514d8981 139 emuPinRetentionEm4Exit = EMU_EM4CTRL_EM4IORETMODE_EM4EXIT,
Anna Bridge 160:5571c4ff569f 140 /** Retention through EM4 and wakeup: call @ref EMU_UnlatchPinRetention() to
AnnaBridge 156:ff21514d8981 141 release pins from retention after EM4 wakeup */
AnnaBridge 156:ff21514d8981 142 emuPinRetentionLatch = EMU_EM4CTRL_EM4IORETMODE_SWUNLATCH,
AnnaBridge 156:ff21514d8981 143 } EMU_EM4PinRetention_TypeDef;
AnnaBridge 156:ff21514d8981 144 #endif
AnnaBridge 156:ff21514d8981 145
AnnaBridge 156:ff21514d8981 146 /** Power configurations. DCDC-to-DVDD is currently the only supported mode. */
Anna Bridge 160:5571c4ff569f 147 typedef enum {
AnnaBridge 156:ff21514d8981 148 /** DCDC is connected to DVDD */
AnnaBridge 156:ff21514d8981 149 emuPowerConfig_DcdcToDvdd,
AnnaBridge 156:ff21514d8981 150 } EMU_PowerConfig_TypeDef;
AnnaBridge 156:ff21514d8981 151
Anna Bridge 160:5571c4ff569f 152 #if defined(_EMU_DCDCCTRL_MASK)
AnnaBridge 156:ff21514d8981 153 /** DCDC operating modes */
Anna Bridge 160:5571c4ff569f 154 typedef enum {
AnnaBridge 156:ff21514d8981 155 /** DCDC regulator bypass */
AnnaBridge 156:ff21514d8981 156 emuDcdcMode_Bypass = EMU_DCDCCTRL_DCDCMODE_BYPASS,
AnnaBridge 156:ff21514d8981 157 /** DCDC low-noise mode */
AnnaBridge 156:ff21514d8981 158 emuDcdcMode_LowNoise = EMU_DCDCCTRL_DCDCMODE_LOWNOISE,
AnnaBridge 156:ff21514d8981 159 #if defined(_EMU_DCDCLPEM01CFG_MASK)
AnnaBridge 156:ff21514d8981 160 /** DCDC low-power mode */
AnnaBridge 156:ff21514d8981 161 emuDcdcMode_LowPower = EMU_DCDCCTRL_DCDCMODE_LOWPOWER,
AnnaBridge 156:ff21514d8981 162 #endif
AnnaBridge 156:ff21514d8981 163 } EMU_DcdcMode_TypeDef;
AnnaBridge 156:ff21514d8981 164 #endif
AnnaBridge 156:ff21514d8981 165
Anna Bridge 160:5571c4ff569f 166 #if defined(_EMU_DCDCCTRL_MASK)
AnnaBridge 156:ff21514d8981 167 /** DCDC conduction modes */
Anna Bridge 160:5571c4ff569f 168 typedef enum {
AnnaBridge 156:ff21514d8981 169 /** DCDC Low-Noise Continuous Conduction Mode (CCM). EFR32 interference minimization
AnnaBridge 156:ff21514d8981 170 features are available in this mode. */
AnnaBridge 156:ff21514d8981 171 emuDcdcConductionMode_ContinuousLN,
AnnaBridge 156:ff21514d8981 172 /** DCDC Low-Noise Discontinuous Conduction Mode (DCM). This mode should be used for EFM32 or
AnnaBridge 156:ff21514d8981 173 when the EFR32 radio is not enabled. */
AnnaBridge 156:ff21514d8981 174 emuDcdcConductionMode_DiscontinuousLN,
AnnaBridge 156:ff21514d8981 175 } EMU_DcdcConductionMode_TypeDef;
AnnaBridge 156:ff21514d8981 176 #endif
AnnaBridge 156:ff21514d8981 177
Anna Bridge 160:5571c4ff569f 178 #if defined(_EMU_PWRCTRL_MASK)
AnnaBridge 156:ff21514d8981 179 /** DCDC to DVDD mode analog peripheral power supply select */
Anna Bridge 160:5571c4ff569f 180 typedef enum {
AnnaBridge 156:ff21514d8981 181 /** Select AVDD as analog power supply. Typically lower noise, but less energy efficient. */
AnnaBridge 156:ff21514d8981 182 emuDcdcAnaPeripheralPower_AVDD = EMU_PWRCTRL_ANASW_AVDD,
AnnaBridge 156:ff21514d8981 183 /** Select DCDC (DVDD) as analog power supply. Typically more energy efficient, but more noise. */
AnnaBridge 156:ff21514d8981 184 emuDcdcAnaPeripheralPower_DCDC = EMU_PWRCTRL_ANASW_DVDD
AnnaBridge 156:ff21514d8981 185 } EMU_DcdcAnaPeripheralPower_TypeDef;
AnnaBridge 156:ff21514d8981 186 #endif
AnnaBridge 156:ff21514d8981 187
Anna Bridge 160:5571c4ff569f 188 #if defined(_EMU_DCDCMISCCTRL_MASK)
AnnaBridge 156:ff21514d8981 189 /** DCDC Forced CCM and reverse current limiter control. Positive values have unit mA. */
AnnaBridge 156:ff21514d8981 190 typedef int16_t EMU_DcdcLnReverseCurrentControl_TypeDef;
AnnaBridge 156:ff21514d8981 191
AnnaBridge 156:ff21514d8981 192 /** High efficiency mode. EMU_DCDCZDETCTRL_ZDETILIMSEL is "don't care". */
AnnaBridge 156:ff21514d8981 193 #define emuDcdcLnHighEfficiency -1
AnnaBridge 156:ff21514d8981 194
AnnaBridge 156:ff21514d8981 195 /** Default reverse current for fast transient response mode (low noise). */
AnnaBridge 156:ff21514d8981 196 #define emuDcdcLnFastTransient 160
AnnaBridge 156:ff21514d8981 197 #endif
AnnaBridge 156:ff21514d8981 198
Anna Bridge 160:5571c4ff569f 199 #if defined(_EMU_DCDCCTRL_MASK)
AnnaBridge 156:ff21514d8981 200 /** DCDC Low-noise RCO band select */
Anna Bridge 160:5571c4ff569f 201 typedef enum {
AnnaBridge 156:ff21514d8981 202 /** Set RCO to 3MHz */
AnnaBridge 156:ff21514d8981 203 emuDcdcLnRcoBand_3MHz = 0,
AnnaBridge 156:ff21514d8981 204 /** Set RCO to 4MHz */
AnnaBridge 156:ff21514d8981 205 emuDcdcLnRcoBand_4MHz = 1,
AnnaBridge 156:ff21514d8981 206 /** Set RCO to 5MHz */
AnnaBridge 156:ff21514d8981 207 emuDcdcLnRcoBand_5MHz = 2,
AnnaBridge 156:ff21514d8981 208 /** Set RCO to 6MHz */
AnnaBridge 156:ff21514d8981 209 emuDcdcLnRcoBand_6MHz = 3,
AnnaBridge 156:ff21514d8981 210 /** Set RCO to 7MHz */
AnnaBridge 156:ff21514d8981 211 emuDcdcLnRcoBand_7MHz = 4,
AnnaBridge 156:ff21514d8981 212 /** Set RCO to 8MHz */
AnnaBridge 156:ff21514d8981 213 emuDcdcLnRcoBand_8MHz = 5,
AnnaBridge 156:ff21514d8981 214 /** Set RCO to 9MHz */
AnnaBridge 156:ff21514d8981 215 emuDcdcLnRcoBand_9MHz = 6,
AnnaBridge 156:ff21514d8981 216 /** Set RCO to 10MHz */
AnnaBridge 156:ff21514d8981 217 emuDcdcLnRcoBand_10MHz = 7,
AnnaBridge 156:ff21514d8981 218 } EMU_DcdcLnRcoBand_TypeDef;
AnnaBridge 156:ff21514d8981 219
AnnaBridge 156:ff21514d8981 220 /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */
AnnaBridge 156:ff21514d8981 221 /* Deprecated. */
AnnaBridge 156:ff21514d8981 222 #define EMU_DcdcLnRcoBand_3MHz emuDcdcLnRcoBand_3MHz
AnnaBridge 156:ff21514d8981 223 #define EMU_DcdcLnRcoBand_4MHz emuDcdcLnRcoBand_4MHz
AnnaBridge 156:ff21514d8981 224 #define EMU_DcdcLnRcoBand_5MHz emuDcdcLnRcoBand_5MHz
AnnaBridge 156:ff21514d8981 225 #define EMU_DcdcLnRcoBand_6MHz emuDcdcLnRcoBand_6MHz
AnnaBridge 156:ff21514d8981 226 #define EMU_DcdcLnRcoBand_7MHz emuDcdcLnRcoBand_7MHz
AnnaBridge 156:ff21514d8981 227 #define EMU_DcdcLnRcoBand_8MHz emuDcdcLnRcoBand_8MHz
AnnaBridge 156:ff21514d8981 228 #define EMU_DcdcLnRcoBand_9MHz emuDcdcLnRcoBand_9MHz
AnnaBridge 156:ff21514d8981 229 #define EMU_DcdcLnRcoBand_10MHz emuDcdcLnRcoBand_10MHz
AnnaBridge 156:ff21514d8981 230 /** @endcond */
AnnaBridge 156:ff21514d8981 231 #endif
AnnaBridge 156:ff21514d8981 232
Anna Bridge 160:5571c4ff569f 233 #if defined(_EMU_DCDCCTRL_MASK)
AnnaBridge 156:ff21514d8981 234 /** DCDC Low Noise Compensator Control register. */
Anna Bridge 160:5571c4ff569f 235 typedef enum {
AnnaBridge 156:ff21514d8981 236 /** DCDC capacitor is 1uF. */
AnnaBridge 156:ff21514d8981 237 emuDcdcLnCompCtrl_1u0F,
AnnaBridge 156:ff21514d8981 238 /** DCDC capacitor is 4.7uF. */
AnnaBridge 156:ff21514d8981 239 emuDcdcLnCompCtrl_4u7F,
AnnaBridge 156:ff21514d8981 240 } EMU_DcdcLnCompCtrl_TypeDef;
AnnaBridge 156:ff21514d8981 241 #endif
AnnaBridge 156:ff21514d8981 242
Anna Bridge 160:5571c4ff569f 243 #if defined(EMU_STATUS_VMONRDY)
AnnaBridge 156:ff21514d8981 244 /** VMON channels */
Anna Bridge 160:5571c4ff569f 245 typedef enum {
AnnaBridge 156:ff21514d8981 246 emuVmonChannel_AVDD,
AnnaBridge 156:ff21514d8981 247 emuVmonChannel_ALTAVDD,
AnnaBridge 156:ff21514d8981 248 emuVmonChannel_DVDD,
Anna Bridge 160:5571c4ff569f 249 emuVmonChannel_IOVDD0,
Anna Bridge 160:5571c4ff569f 250 #if defined(_EMU_VMONIO1CTRL_EN_MASK)
Anna Bridge 160:5571c4ff569f 251 emuVmonChannel_IOVDD1,
Anna Bridge 160:5571c4ff569f 252 #endif
Anna Bridge 160:5571c4ff569f 253 #if defined(_EMU_VMONBUVDDCTRL_EN_MASK)
Anna Bridge 160:5571c4ff569f 254 emuVmonChannel_BUVDD,
Anna Bridge 160:5571c4ff569f 255 #endif
AnnaBridge 156:ff21514d8981 256 } EMU_VmonChannel_TypeDef;
AnnaBridge 156:ff21514d8981 257 #endif /* EMU_STATUS_VMONRDY */
AnnaBridge 156:ff21514d8981 258
Anna Bridge 160:5571c4ff569f 259 #if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
AnnaBridge 156:ff21514d8981 260 /** Bias mode configurations */
Anna Bridge 160:5571c4ff569f 261 typedef enum {
AnnaBridge 156:ff21514d8981 262 emuBiasMode_1KHz,
AnnaBridge 156:ff21514d8981 263 emuBiasMode_4KHz,
AnnaBridge 156:ff21514d8981 264 emuBiasMode_Continuous
AnnaBridge 156:ff21514d8981 265 } EMU_BiasMode_TypeDef;
AnnaBridge 156:ff21514d8981 266 #endif
AnnaBridge 156:ff21514d8981 267
Anna Bridge 160:5571c4ff569f 268 #if defined(_EMU_CMD_EM01VSCALE0_MASK)
AnnaBridge 156:ff21514d8981 269 /** Supported EM0/1 Voltage Scaling Levels */
Anna Bridge 160:5571c4ff569f 270 typedef enum {
AnnaBridge 156:ff21514d8981 271 /** High-performance voltage level. HF clock can be set to any frequency. */
AnnaBridge 156:ff21514d8981 272 emuVScaleEM01_HighPerformance = _EMU_STATUS_VSCALE_VSCALE2,
AnnaBridge 156:ff21514d8981 273 /** Low-power optimized voltage level. The HF clock must be limited
AnnaBridge 156:ff21514d8981 274 to @ref CMU_VSCALEEM01_LOWPOWER_VOLTAGE_CLOCK_MAX Hz at this voltage.
AnnaBridge 156:ff21514d8981 275 EM0/1 voltage scaling is applied when the core clock frequency is
AnnaBridge 156:ff21514d8981 276 changed from @ref CMU or when calling @ref EMU_EM01Init() when the HF
AnnaBridge 156:ff21514d8981 277 clock is already below the limit. */
AnnaBridge 156:ff21514d8981 278 emuVScaleEM01_LowPower = _EMU_STATUS_VSCALE_VSCALE0,
AnnaBridge 156:ff21514d8981 279 } EMU_VScaleEM01_TypeDef;
AnnaBridge 156:ff21514d8981 280 #endif
AnnaBridge 156:ff21514d8981 281
Anna Bridge 160:5571c4ff569f 282 #if defined(_EMU_CTRL_EM23VSCALE_MASK)
AnnaBridge 156:ff21514d8981 283 /** Supported EM2/3 Voltage Scaling Levels */
Anna Bridge 160:5571c4ff569f 284 typedef enum {
AnnaBridge 156:ff21514d8981 285 /** Fast-wakeup voltage level. */
AnnaBridge 156:ff21514d8981 286 emuVScaleEM23_FastWakeup = _EMU_CTRL_EM23VSCALE_VSCALE2,
AnnaBridge 156:ff21514d8981 287 /** Low-power optimized voltage level. Using this voltage level in EM2 and 3
Anna Bridge 160:5571c4ff569f 288 adds approximately 30us to wakeup time if the EM0 and 1 voltage must be scaled
AnnaBridge 156:ff21514d8981 289 up to @ref emuVScaleEM01_HighPerformance on EM2 or 3 exit. */
AnnaBridge 156:ff21514d8981 290 emuVScaleEM23_LowPower = _EMU_CTRL_EM23VSCALE_VSCALE0,
AnnaBridge 156:ff21514d8981 291 } EMU_VScaleEM23_TypeDef;
AnnaBridge 156:ff21514d8981 292 #endif
AnnaBridge 156:ff21514d8981 293
Anna Bridge 160:5571c4ff569f 294 #if defined(_EMU_CTRL_EM4HVSCALE_MASK)
AnnaBridge 156:ff21514d8981 295 /** Supported EM4H Voltage Scaling Levels */
Anna Bridge 160:5571c4ff569f 296 typedef enum {
AnnaBridge 156:ff21514d8981 297 /** Fast-wakeup voltage level. */
AnnaBridge 156:ff21514d8981 298 emuVScaleEM4H_FastWakeup = _EMU_CTRL_EM4HVSCALE_VSCALE2,
AnnaBridge 156:ff21514d8981 299 /** Low-power optimized voltage level. Using this voltage level in EM4H
Anna Bridge 160:5571c4ff569f 300 adds approximately 30us to wakeup time if the EM0 and 1 voltage must be scaled
AnnaBridge 156:ff21514d8981 301 up to @ref emuVScaleEM01_HighPerformance on EM4H exit. */
AnnaBridge 156:ff21514d8981 302 emuVScaleEM4H_LowPower = _EMU_CTRL_EM4HVSCALE_VSCALE0,
AnnaBridge 156:ff21514d8981 303 } EMU_VScaleEM4H_TypeDef;
AnnaBridge 156:ff21514d8981 304 #endif
AnnaBridge 156:ff21514d8981 305
AnnaBridge 156:ff21514d8981 306 #if defined(_EMU_EM23PERNORETAINCTRL_MASK)
AnnaBridge 156:ff21514d8981 307 /** Peripheral EM2 and 3 retention control */
Anna Bridge 160:5571c4ff569f 308 typedef enum {
Anna Bridge 160:5571c4ff569f 309 #if defined(_EMU_EM23PERNORETAINCTRL_USBDIS_MASK)
Anna Bridge 160:5571c4ff569f 310 emuPeripheralRetention_USB = _EMU_EM23PERNORETAINCTRL_USBDIS_MASK, /* Select USB retention control */
Anna Bridge 160:5571c4ff569f 311 #endif
Anna Bridge 160:5571c4ff569f 312 #if defined(_EMU_EM23PERNORETAINCTRL_RTCDIS_MASK)
Anna Bridge 160:5571c4ff569f 313 emuPeripheralRetention_RTC = _EMU_EM23PERNORETAINCTRL_RTCDIS_MASK, /* Select RTC retention control */
Anna Bridge 160:5571c4ff569f 314 #endif
Anna Bridge 160:5571c4ff569f 315 #if defined(_EMU_EM23PERNORETAINCTRL_ACMP3DIS_MASK)
Anna Bridge 160:5571c4ff569f 316 emuPeripheralRetention_ACMP3 = _EMU_EM23PERNORETAINCTRL_ACMP3DIS_MASK, /* Select ACMP3 retention control */
Anna Bridge 160:5571c4ff569f 317 #endif
Anna Bridge 160:5571c4ff569f 318 #if defined(_EMU_EM23PERNORETAINCTRL_ACMP2DIS_MASK)
Anna Bridge 160:5571c4ff569f 319 emuPeripheralRetention_ACMP2 = _EMU_EM23PERNORETAINCTRL_ACMP2DIS_MASK, /* Select ACMP2 retention control */
Anna Bridge 160:5571c4ff569f 320 #endif
Anna Bridge 160:5571c4ff569f 321 #if defined(_EMU_EM23PERNORETAINCTRL_ADC1DIS_MASK)
Anna Bridge 160:5571c4ff569f 322 emuPeripheralRetention_ADC1 = _EMU_EM23PERNORETAINCTRL_ADC1DIS_MASK, /* Select ADC1 retention control */
Anna Bridge 160:5571c4ff569f 323 #endif
Anna Bridge 160:5571c4ff569f 324 #if defined(_EMU_EM23PERNORETAINCTRL_I2C2DIS_MASK)
Anna Bridge 160:5571c4ff569f 325 emuPeripheralRetention_I2C2 = _EMU_EM23PERNORETAINCTRL_I2C2DIS_MASK, /* Select I2C2 retention control */
Anna Bridge 160:5571c4ff569f 326 #endif
Anna Bridge 160:5571c4ff569f 327 #if defined(_EMU_EM23PERNORETAINCTRL_LETIMER1DIS_MASK)
Anna Bridge 160:5571c4ff569f 328 emuPeripheralRetention_LETIMER1 = _EMU_EM23PERNORETAINCTRL_LETIMER1DIS_MASK, /* Select LETIMER1 retention control */
Anna Bridge 160:5571c4ff569f 329 #endif
Anna Bridge 160:5571c4ff569f 330 #if defined(_EMU_EM23PERNORETAINCTRL_LCDDIS_MASK)
Anna Bridge 160:5571c4ff569f 331 emuPeripheralRetention_LCD = _EMU_EM23PERNORETAINCTRL_LCDDIS_MASK, /* Select LCD retention control */
AnnaBridge 156:ff21514d8981 332 #endif
Anna Bridge 160:5571c4ff569f 333 #if defined(_EMU_EM23PERNORETAINCTRL_LEUART1DIS_MASK)
Anna Bridge 160:5571c4ff569f 334 emuPeripheralRetention_LEUART1 = _EMU_EM23PERNORETAINCTRL_LEUART1DIS_MASK, /* Select LEUART1 retention control */
Anna Bridge 160:5571c4ff569f 335 #endif
Anna Bridge 160:5571c4ff569f 336 emuPeripheralRetention_LEUART0 = _EMU_EM23PERNORETAINCTRL_LEUART0DIS_MASK, /* Select LEUART0 retention control */
Anna Bridge 160:5571c4ff569f 337 #if defined(_EMU_EM23PERNORETAINCTRL_CSENDIS_MASK)
Anna Bridge 160:5571c4ff569f 338 emuPeripheralRetention_CSEN = _EMU_EM23PERNORETAINCTRL_CSENDIS_MASK, /* Select CSEN retention control */
Anna Bridge 160:5571c4ff569f 339 #endif
Anna Bridge 160:5571c4ff569f 340 emuPeripheralRetention_LESENSE0 = _EMU_EM23PERNORETAINCTRL_LESENSE0DIS_MASK, /* Select LESENSE0 retention control */
Anna Bridge 160:5571c4ff569f 341 #if defined(_EMU_EM23PERNORETAINCTRL_WDOG1DIS_MASK)
Anna Bridge 160:5571c4ff569f 342 emuPeripheralRetention_WDOG1 = _EMU_EM23PERNORETAINCTRL_WDOG1DIS_MASK, /* Select WDOG1 retention control */
Anna Bridge 160:5571c4ff569f 343 #endif
Anna Bridge 160:5571c4ff569f 344 emuPeripheralRetention_WDOG0 = _EMU_EM23PERNORETAINCTRL_WDOG0DIS_MASK, /* Select WDOG0 retention control */
Anna Bridge 160:5571c4ff569f 345 emuPeripheralRetention_LETIMER0 = _EMU_EM23PERNORETAINCTRL_LETIMER0DIS_MASK, /* Select LETIMER0 retention control */
Anna Bridge 160:5571c4ff569f 346 emuPeripheralRetention_ADC0 = _EMU_EM23PERNORETAINCTRL_ADC0DIS_MASK, /* Select ADC0 retention control */
Anna Bridge 160:5571c4ff569f 347 #if defined(_EMU_EM23PERNORETAINCTRL_IDAC0DIS_MASK)
Anna Bridge 160:5571c4ff569f 348 emuPeripheralRetention_IDAC0 = _EMU_EM23PERNORETAINCTRL_IDAC0DIS_MASK, /* Select IDAC0 retention control */
Anna Bridge 160:5571c4ff569f 349 #endif
Anna Bridge 160:5571c4ff569f 350 emuPeripheralRetention_VDAC0 = _EMU_EM23PERNORETAINCTRL_DAC0DIS_MASK, /* Select DAC0 retention control */
Anna Bridge 160:5571c4ff569f 351 #if defined(_EMU_EM23PERNORETAINCTRL_I2C1DIS_MASK)
Anna Bridge 160:5571c4ff569f 352 emuPeripheralRetention_I2C1 = _EMU_EM23PERNORETAINCTRL_I2C1DIS_MASK, /* Select I2C1 retention control */
Anna Bridge 160:5571c4ff569f 353 #endif
Anna Bridge 160:5571c4ff569f 354 emuPeripheralRetention_I2C0 = _EMU_EM23PERNORETAINCTRL_I2C0DIS_MASK, /* Select I2C0 retention control */
Anna Bridge 160:5571c4ff569f 355 emuPeripheralRetention_ACMP1 = _EMU_EM23PERNORETAINCTRL_ACMP1DIS_MASK, /* Select ACMP1 retention control */
Anna Bridge 160:5571c4ff569f 356 emuPeripheralRetention_ACMP0 = _EMU_EM23PERNORETAINCTRL_ACMP0DIS_MASK, /* Select ACMP0 retention control */
Anna Bridge 160:5571c4ff569f 357 #if defined(_EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK)
Anna Bridge 160:5571c4ff569f 358 emuPeripheralRetention_PCNT2 = _EMU_EM23PERNORETAINCTRL_PCNT2DIS_MASK, /* Select PCNT2 retention control */
Anna Bridge 160:5571c4ff569f 359 emuPeripheralRetention_PCNT1 = _EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK, /* Select PCNT1 retention control */
Anna Bridge 160:5571c4ff569f 360 #endif
Anna Bridge 160:5571c4ff569f 361 emuPeripheralRetention_PCNT0 = _EMU_EM23PERNORETAINCTRL_PCNT0DIS_MASK, /* Select PCNT0 retention control */
AnnaBridge 156:ff21514d8981 362
AnnaBridge 156:ff21514d8981 363 emuPeripheralRetention_D1 = _EMU_EM23PERNORETAINCTRL_LETIMER0DIS_MASK
Anna Bridge 160:5571c4ff569f 364 | _EMU_EM23PERNORETAINCTRL_PCNT0DIS_MASK
Anna Bridge 160:5571c4ff569f 365 | _EMU_EM23PERNORETAINCTRL_ADC0DIS_MASK
Anna Bridge 160:5571c4ff569f 366 | _EMU_EM23PERNORETAINCTRL_ACMP0DIS_MASK
Anna Bridge 160:5571c4ff569f 367 | _EMU_EM23PERNORETAINCTRL_LESENSE0DIS_MASK,/* Select all peripherals in domain 1 */
AnnaBridge 156:ff21514d8981 368 emuPeripheralRetention_D2 = _EMU_EM23PERNORETAINCTRL_ACMP1DIS_MASK
Anna Bridge 160:5571c4ff569f 369 #if defined(_EMU_EM23PERNORETAINCTRL_IDAC0DIS_MASK)
Anna Bridge 160:5571c4ff569f 370 | _EMU_EM23PERNORETAINCTRL_IDAC0DIS_MASK
Anna Bridge 160:5571c4ff569f 371 #endif
Anna Bridge 160:5571c4ff569f 372 | _EMU_EM23PERNORETAINCTRL_DAC0DIS_MASK
Anna Bridge 160:5571c4ff569f 373 #if defined(_EMU_EM23PERNORETAINCTRL_CSENDIS_MASK)
Anna Bridge 160:5571c4ff569f 374 | _EMU_EM23PERNORETAINCTRL_CSENDIS_MASK
Anna Bridge 160:5571c4ff569f 375 #endif
Anna Bridge 160:5571c4ff569f 376 | _EMU_EM23PERNORETAINCTRL_LEUART0DIS_MASK
Anna Bridge 160:5571c4ff569f 377 #if defined(_EMU_EM23PERNORETAINCTRL_USBDIS_MASK)
Anna Bridge 160:5571c4ff569f 378 | _EMU_EM23PERNORETAINCTRL_USBDIS_MASK
Anna Bridge 160:5571c4ff569f 379 #endif
Anna Bridge 160:5571c4ff569f 380 #if defined(_EMU_EM23PERNORETAINCTRL_RTCDIS_MASK)
Anna Bridge 160:5571c4ff569f 381 | _EMU_EM23PERNORETAINCTRL_RTCDIS_MASK
Anna Bridge 160:5571c4ff569f 382 #endif
Anna Bridge 160:5571c4ff569f 383 #if defined(_EMU_EM23PERNORETAINCTRL_ACMP3DIS_MASK)
Anna Bridge 160:5571c4ff569f 384 | _EMU_EM23PERNORETAINCTRL_ACMP3DIS_MASK
Anna Bridge 160:5571c4ff569f 385 #endif
Anna Bridge 160:5571c4ff569f 386 #if defined(_EMU_EM23PERNORETAINCTRL_ACMP2DIS_MASK)
Anna Bridge 160:5571c4ff569f 387 | _EMU_EM23PERNORETAINCTRL_ACMP2DIS_MASK
Anna Bridge 160:5571c4ff569f 388 #endif
Anna Bridge 160:5571c4ff569f 389 #if defined(_EMU_EM23PERNORETAINCTRL_ADC1DIS_MASK)
Anna Bridge 160:5571c4ff569f 390 | _EMU_EM23PERNORETAINCTRL_ADC1DIS_MASK
AnnaBridge 156:ff21514d8981 391 #endif
Anna Bridge 160:5571c4ff569f 392 #if defined(_EMU_EM23PERNORETAINCTRL_I2C2DIS_MASK)
Anna Bridge 160:5571c4ff569f 393 | _EMU_EM23PERNORETAINCTRL_I2C2DIS_MASK
Anna Bridge 160:5571c4ff569f 394 #endif
Anna Bridge 160:5571c4ff569f 395 #if defined(_EMU_EM23PERNORETAINCTRL_LETIMER1DIS_MASK)
Anna Bridge 160:5571c4ff569f 396 | _EMU_EM23PERNORETAINCTRL_LETIMER1DIS_MASK
Anna Bridge 160:5571c4ff569f 397 #endif
Anna Bridge 160:5571c4ff569f 398 #if defined(_EMU_EM23PERNORETAINCTRL_LCDDIS_MASK)
Anna Bridge 160:5571c4ff569f 399 | _EMU_EM23PERNORETAINCTRL_LCDDIS_MASK
Anna Bridge 160:5571c4ff569f 400 #endif
Anna Bridge 160:5571c4ff569f 401 #if defined(_EMU_EM23PERNORETAINCTRL_LEUART1DIS_MASK)
Anna Bridge 160:5571c4ff569f 402 | _EMU_EM23PERNORETAINCTRL_LEUART1DIS_MASK
Anna Bridge 160:5571c4ff569f 403 #endif
Anna Bridge 160:5571c4ff569f 404 #if defined(_EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK)
Anna Bridge 160:5571c4ff569f 405 | _EMU_EM23PERNORETAINCTRL_PCNT1DIS_MASK
Anna Bridge 160:5571c4ff569f 406 | _EMU_EM23PERNORETAINCTRL_PCNT2DIS_MASK
Anna Bridge 160:5571c4ff569f 407 #endif
Anna Bridge 160:5571c4ff569f 408 #if defined(_EMU_EM23PERNORETAINCTRL_I2C1DIS_MASK)
Anna Bridge 160:5571c4ff569f 409 | _EMU_EM23PERNORETAINCTRL_I2C1DIS_MASK /* Select all peripherals in domain 2 */
Anna Bridge 160:5571c4ff569f 410 #endif
Anna Bridge 160:5571c4ff569f 411 | _EMU_EM23PERNORETAINCTRL_I2C0DIS_MASK,
Anna Bridge 160:5571c4ff569f 412 emuPeripheralRetention_ALL = emuPeripheralRetention_D1
Anna Bridge 160:5571c4ff569f 413 | emuPeripheralRetention_D2
Anna Bridge 160:5571c4ff569f 414 #if defined(_EMU_EM23PERNORETAINCTRL_WDOG1DIS_MASK)
Anna Bridge 160:5571c4ff569f 415 | emuPeripheralRetention_WDOG1
Anna Bridge 160:5571c4ff569f 416 #endif
Anna Bridge 160:5571c4ff569f 417 | emuPeripheralRetention_WDOG0, /* Select all peripherals with retention control */
AnnaBridge 156:ff21514d8981 418 } EMU_PeripheralRetention_TypeDef;
AnnaBridge 156:ff21514d8981 419 #endif
AnnaBridge 156:ff21514d8981 420
AnnaBridge 156:ff21514d8981 421 /*******************************************************************************
AnnaBridge 156:ff21514d8981 422 ******************************* STRUCTS ***********************************
AnnaBridge 156:ff21514d8981 423 ******************************************************************************/
AnnaBridge 156:ff21514d8981 424
Anna Bridge 160:5571c4ff569f 425 #if defined(_EMU_CMD_EM01VSCALE0_MASK)
AnnaBridge 156:ff21514d8981 426 /** EM0 and 1 initialization structure. Voltage scaling is applied when
AnnaBridge 156:ff21514d8981 427 the core clock frequency is changed from @ref CMU. EM0 an 1 emuVScaleEM01_HighPerformance
AnnaBridge 156:ff21514d8981 428 is always enabled. */
Anna Bridge 160:5571c4ff569f 429 typedef struct {
AnnaBridge 156:ff21514d8981 430 bool vScaleEM01LowPowerVoltageEnable; /**< EM0/1 low power voltage status */
AnnaBridge 156:ff21514d8981 431 } EMU_EM01Init_TypeDef;
AnnaBridge 156:ff21514d8981 432 #endif
AnnaBridge 156:ff21514d8981 433
Anna Bridge 160:5571c4ff569f 434 #if defined(_EMU_CMD_EM01VSCALE0_MASK)
AnnaBridge 156:ff21514d8981 435 /** Default initialization of EM0 and 1 configuration */
Anna Bridge 160:5571c4ff569f 436 #define EMU_EM01INIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 437 { \
Anna Bridge 160:5571c4ff569f 438 false /** Do not scale down in EM0/1 */ \
Anna Bridge 160:5571c4ff569f 439 }
AnnaBridge 156:ff21514d8981 440 #endif
AnnaBridge 156:ff21514d8981 441
AnnaBridge 156:ff21514d8981 442 /** EM2 and 3 initialization structure */
Anna Bridge 160:5571c4ff569f 443 typedef struct {
AnnaBridge 156:ff21514d8981 444 bool em23VregFullEn; /**< Enable full VREG drive strength in EM2/3 */
Anna Bridge 160:5571c4ff569f 445 #if defined(_EMU_CTRL_EM23VSCALE_MASK)
AnnaBridge 156:ff21514d8981 446 EMU_VScaleEM23_TypeDef vScaleEM23Voltage; /**< EM2/3 voltage scaling level */
AnnaBridge 156:ff21514d8981 447 #endif
AnnaBridge 156:ff21514d8981 448 } EMU_EM23Init_TypeDef;
AnnaBridge 156:ff21514d8981 449
AnnaBridge 156:ff21514d8981 450 /** Default initialization of EM2 and 3 configuration */
Anna Bridge 160:5571c4ff569f 451 #if defined(_EMU_CTRL_EM4HVSCALE_MASK)
AnnaBridge 156:ff21514d8981 452 #define EMU_EM23INIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 453 { \
Anna Bridge 160:5571c4ff569f 454 false, /* Reduced voltage regulator drive strength in EM2/3 */ \
Anna Bridge 160:5571c4ff569f 455 emuVScaleEM23_FastWakeup, /* Do not scale down in EM2/3 */ \
Anna Bridge 160:5571c4ff569f 456 }
AnnaBridge 156:ff21514d8981 457 #else
AnnaBridge 156:ff21514d8981 458 #define EMU_EM23INIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 459 { \
Anna Bridge 160:5571c4ff569f 460 false, /* Reduced voltage regulator drive strength in EM2/3 */ \
Anna Bridge 160:5571c4ff569f 461 }
AnnaBridge 156:ff21514d8981 462 #endif
AnnaBridge 156:ff21514d8981 463
Anna Bridge 160:5571c4ff569f 464 #if defined(_EMU_EM4CONF_MASK) || defined(_EMU_EM4CTRL_MASK)
AnnaBridge 156:ff21514d8981 465 /** EM4 initialization structure */
Anna Bridge 160:5571c4ff569f 466 typedef struct {
Anna Bridge 160:5571c4ff569f 467 #if defined(_EMU_EM4CONF_MASK)
AnnaBridge 156:ff21514d8981 468 /* Init parameters for platforms with EMU->EM4CONF register (Series 0) */
AnnaBridge 156:ff21514d8981 469 bool lockConfig; /**< Lock configuration of regulator, BOD and oscillator */
AnnaBridge 156:ff21514d8981 470 bool buBodRstDis; /**< When set, no reset will be asserted due to Brownout when in EM4 */
AnnaBridge 156:ff21514d8981 471 EMU_EM4Osc_TypeDef osc; /**< EM4 duty oscillator */
AnnaBridge 156:ff21514d8981 472 bool buRtcWakeup; /**< Wake up on EM4 BURTC interrupt */
AnnaBridge 156:ff21514d8981 473 bool vreg; /**< Enable EM4 voltage regulator */
Anna Bridge 160:5571c4ff569f 474 #elif defined(_EMU_EM4CTRL_MASK)
AnnaBridge 156:ff21514d8981 475 /* Init parameters for platforms with EMU->EM4CTRL register (Series 1) */
AnnaBridge 156:ff21514d8981 476 bool retainLfxo; /**< Disable the LFXO upon EM4 entry */
AnnaBridge 156:ff21514d8981 477 bool retainLfrco; /**< Disable the LFRCO upon EM4 entry */
AnnaBridge 156:ff21514d8981 478 bool retainUlfrco; /**< Disable the ULFRCO upon EM4 entry */
AnnaBridge 156:ff21514d8981 479 EMU_EM4State_TypeDef em4State; /**< Hibernate or shutoff EM4 state */
AnnaBridge 156:ff21514d8981 480 EMU_EM4PinRetention_TypeDef pinRetentionMode; /**< EM4 pin retention mode */
AnnaBridge 156:ff21514d8981 481 #endif
Anna Bridge 160:5571c4ff569f 482 #if defined(_EMU_CTRL_EM4HVSCALE_MASK)
AnnaBridge 156:ff21514d8981 483 EMU_VScaleEM4H_TypeDef vScaleEM4HVoltage;/**< EM4H voltage scaling level */
AnnaBridge 156:ff21514d8981 484 #endif
AnnaBridge 156:ff21514d8981 485 } EMU_EM4Init_TypeDef;
AnnaBridge 156:ff21514d8981 486 #endif
AnnaBridge 156:ff21514d8981 487
Anna Bridge 160:5571c4ff569f 488 #if defined(_EMU_EM4CONF_MASK)
AnnaBridge 156:ff21514d8981 489 /** Default initialization of EM4 configuration (Series 0) */
Anna Bridge 160:5571c4ff569f 490 #define EMU_EM4INIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 491 { \
Anna Bridge 160:5571c4ff569f 492 false, /* Dont't lock configuration after it's been set */ \
Anna Bridge 160:5571c4ff569f 493 false, /* No reset will be asserted due to BOD in EM4 */ \
Anna Bridge 160:5571c4ff569f 494 emuEM4Osc_ULFRCO, /* Use default ULFRCO oscillator */ \
Anna Bridge 160:5571c4ff569f 495 true, /* Wake up on EM4 BURTC interrupt */ \
Anna Bridge 160:5571c4ff569f 496 true, /* Enable VREG */ \
Anna Bridge 160:5571c4ff569f 497 }
AnnaBridge 156:ff21514d8981 498
Anna Bridge 160:5571c4ff569f 499 #elif defined(_EMU_CTRL_EM4HVSCALE_MASK)
AnnaBridge 156:ff21514d8981 500 /** Default initialization of EM4 configuration (Series 1 with VSCALE) */
Anna Bridge 160:5571c4ff569f 501 #define EMU_EM4INIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 502 { \
Anna Bridge 160:5571c4ff569f 503 false, /* Retain LFXO configuration upon EM4 entry */ \
Anna Bridge 160:5571c4ff569f 504 false, /* Retain LFRCO configuration upon EM4 entry */ \
Anna Bridge 160:5571c4ff569f 505 false, /* Retain ULFRCO configuration upon EM4 entry */ \
Anna Bridge 160:5571c4ff569f 506 emuEM4Shutoff, /* Use EM4 shutoff state */ \
Anna Bridge 160:5571c4ff569f 507 emuPinRetentionDisable, /* Do not retain pins in EM4 */ \
Anna Bridge 160:5571c4ff569f 508 emuVScaleEM4H_FastWakeup, /* Do not scale down in EM4H */ \
Anna Bridge 160:5571c4ff569f 509 }
AnnaBridge 156:ff21514d8981 510
Anna Bridge 160:5571c4ff569f 511 #elif defined(_EMU_EM4CTRL_MASK)
AnnaBridge 156:ff21514d8981 512 /** Default initialization of EM4 configuration (Series 1 without VSCALE) */
Anna Bridge 160:5571c4ff569f 513 #define EMU_EM4INIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 514 { \
Anna Bridge 160:5571c4ff569f 515 false, /* Retain LFXO configuration upon EM4 entry */ \
Anna Bridge 160:5571c4ff569f 516 false, /* Retain LFRCO configuration upon EM4 entry */ \
Anna Bridge 160:5571c4ff569f 517 false, /* Retain ULFRCO configuration upon EM4 entry */ \
Anna Bridge 160:5571c4ff569f 518 emuEM4Shutoff, /* Use EM4 shutoff state */ \
Anna Bridge 160:5571c4ff569f 519 emuPinRetentionDisable, /* Do not retain pins in EM4 */ \
Anna Bridge 160:5571c4ff569f 520 }
AnnaBridge 156:ff21514d8981 521 #endif
AnnaBridge 156:ff21514d8981 522
Anna Bridge 160:5571c4ff569f 523 #if defined(BU_PRESENT) && defined(_SILICON_LABS_32B_SERIES_0)
AnnaBridge 156:ff21514d8981 524 /** Backup Power Domain Initialization structure */
Anna Bridge 160:5571c4ff569f 525 typedef struct {
AnnaBridge 156:ff21514d8981 526 /* Backup Power Domain power configuration */
AnnaBridge 156:ff21514d8981 527
AnnaBridge 156:ff21514d8981 528 /** Voltage probe select, selects ADC voltage */
AnnaBridge 156:ff21514d8981 529 EMU_Probe_TypeDef probe;
AnnaBridge 156:ff21514d8981 530 /** Enable BOD calibration mode */
AnnaBridge 156:ff21514d8981 531 bool bodCal;
AnnaBridge 156:ff21514d8981 532 /** Enable BU_STAT status pin for active BU mode */
AnnaBridge 156:ff21514d8981 533 bool statusPinEnable;
AnnaBridge 156:ff21514d8981 534
AnnaBridge 156:ff21514d8981 535 /* Backup Power Domain connection configuration */
AnnaBridge 156:ff21514d8981 536 /** Power domain resistor */
AnnaBridge 156:ff21514d8981 537 EMU_Resistor_TypeDef resistor;
AnnaBridge 156:ff21514d8981 538 /** BU_VOUT strong enable */
AnnaBridge 156:ff21514d8981 539 bool voutStrong;
AnnaBridge 156:ff21514d8981 540 /** BU_VOUT medium enable */
AnnaBridge 156:ff21514d8981 541 bool voutMed;
AnnaBridge 156:ff21514d8981 542 /** BU_VOUT weak enable */
AnnaBridge 156:ff21514d8981 543 bool voutWeak;
AnnaBridge 156:ff21514d8981 544 /** Power connection, when not in Backup Mode */
AnnaBridge 156:ff21514d8981 545 EMU_Power_TypeDef inactivePower;
AnnaBridge 156:ff21514d8981 546 /** Power connection, when in Backup Mode */
AnnaBridge 156:ff21514d8981 547 EMU_Power_TypeDef activePower;
AnnaBridge 156:ff21514d8981 548 /** Enable backup power domain, and release reset, enable BU_VIN pin */
AnnaBridge 156:ff21514d8981 549 bool enable;
AnnaBridge 156:ff21514d8981 550 } EMU_BUPDInit_TypeDef;
AnnaBridge 156:ff21514d8981 551
AnnaBridge 156:ff21514d8981 552 /** Default Backup Power Domain configuration */
Anna Bridge 160:5571c4ff569f 553 #define EMU_BUPDINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 554 { \
Anna Bridge 160:5571c4ff569f 555 emuProbe_Disable, /* Do not enable voltage probe */ \
Anna Bridge 160:5571c4ff569f 556 false, /* Disable BOD calibration mode */ \
Anna Bridge 160:5571c4ff569f 557 false, /* Disable BU_STAT pin for backup mode indication */ \
Anna Bridge 160:5571c4ff569f 558 \
Anna Bridge 160:5571c4ff569f 559 emuRes_Res0, /* RES0 series resistance between main and backup power */ \
Anna Bridge 160:5571c4ff569f 560 false, /* Don't enable strong switch */ \
Anna Bridge 160:5571c4ff569f 561 false, /* Don't enable medium switch */ \
Anna Bridge 160:5571c4ff569f 562 false, /* Don't enable weak switch */ \
Anna Bridge 160:5571c4ff569f 563 \
Anna Bridge 160:5571c4ff569f 564 emuPower_None, /* No connection between main and backup power (inactive mode) */ \
Anna Bridge 160:5571c4ff569f 565 emuPower_None, /* No connection between main and backup power (active mode) */ \
Anna Bridge 160:5571c4ff569f 566 true /* Enable BUPD enter on BOD, enable BU_VIN pin, release BU reset */ \
Anna Bridge 160:5571c4ff569f 567 }
AnnaBridge 156:ff21514d8981 568 #endif
AnnaBridge 156:ff21514d8981 569
Anna Bridge 160:5571c4ff569f 570 #if defined(_EMU_DCDCCTRL_MASK)
AnnaBridge 156:ff21514d8981 571 /** DCDC initialization structure */
Anna Bridge 160:5571c4ff569f 572 typedef struct {
AnnaBridge 156:ff21514d8981 573 EMU_PowerConfig_TypeDef powerConfig; /**< Device external power configuration.
AnnaBridge 156:ff21514d8981 574 @ref emuPowerConfig_DcdcToDvdd is currently the only supported mode. */
AnnaBridge 156:ff21514d8981 575 EMU_DcdcMode_TypeDef dcdcMode; /**< DCDC regulator operating mode in EM0/1 */
AnnaBridge 156:ff21514d8981 576 uint16_t mVout; /**< Target output voltage (mV) */
AnnaBridge 156:ff21514d8981 577 uint16_t em01LoadCurrent_mA; /**< Estimated average load current in EM0/1 (mA).
AnnaBridge 156:ff21514d8981 578 This estimate is also used for EM1 optimization,
AnnaBridge 156:ff21514d8981 579 so if EM1 current is expected to be higher than EM0,
AnnaBridge 156:ff21514d8981 580 then this parameter should hold the higher EM1 current. */
AnnaBridge 156:ff21514d8981 581 uint16_t em234LoadCurrent_uA; /**< Estimated average load current in EM2 (uA).
AnnaBridge 156:ff21514d8981 582 This estimate is also used for EM3 and 4 optimization,
AnnaBridge 156:ff21514d8981 583 so if EM3 or 4 current is expected to be higher than EM2,
AnnaBridge 156:ff21514d8981 584 then this parameter should hold the higher EM3 or 4 current. */
AnnaBridge 156:ff21514d8981 585 uint16_t maxCurrent_mA; /**< Maximum average DCDC output current (mA).
AnnaBridge 156:ff21514d8981 586 This can be set to the maximum for the power source,
AnnaBridge 156:ff21514d8981 587 for example the maximum for a battery. */
AnnaBridge 156:ff21514d8981 588 EMU_DcdcAnaPeripheralPower_TypeDef
AnnaBridge 156:ff21514d8981 589 anaPeripheralPower; /**< Select analog peripheral power in DCDC-to-DVDD mode */
AnnaBridge 156:ff21514d8981 590 EMU_DcdcLnReverseCurrentControl_TypeDef
AnnaBridge 156:ff21514d8981 591 reverseCurrentControl; /**< Low-noise reverse current control.
AnnaBridge 156:ff21514d8981 592 NOTE: this parameter uses special encoding:
AnnaBridge 156:ff21514d8981 593 >= 0 is forced CCM mode where the parameter is used as the
AnnaBridge 156:ff21514d8981 594 reverse current threshold in mA.
AnnaBridge 156:ff21514d8981 595 -1 is encoded as emuDcdcLnHighEfficiencyMode (EFM32 only) */
AnnaBridge 156:ff21514d8981 596 EMU_DcdcLnCompCtrl_TypeDef dcdcLnCompCtrl; /**< DCDC Low-noise mode compensator control. */
AnnaBridge 156:ff21514d8981 597 } EMU_DCDCInit_TypeDef;
AnnaBridge 156:ff21514d8981 598
AnnaBridge 156:ff21514d8981 599 /** Default DCDC initialization */
Anna Bridge 160:5571c4ff569f 600 #if defined(_EFM_DEVICE)
AnnaBridge 156:ff21514d8981 601 #if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
Anna Bridge 160:5571c4ff569f 602 #define EMU_DCDCINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 603 { \
Anna Bridge 160:5571c4ff569f 604 emuPowerConfig_DcdcToDvdd, /* DCDC to DVDD */ \
Anna Bridge 160:5571c4ff569f 605 emuDcdcMode_LowNoise, /* Low-niose mode in EM0 */ \
Anna Bridge 160:5571c4ff569f 606 1800, /* Nominal output voltage for DVDD mode, 1.8V */ \
Anna Bridge 160:5571c4ff569f 607 5, /* Nominal EM0/1 load current of less than 5mA */ \
Anna Bridge 160:5571c4ff569f 608 10, /* Nominal EM2/3/4 load current less than 10uA */ \
Anna Bridge 160:5571c4ff569f 609 200, /* Maximum average current of 200mA
Anna Bridge 160:5571c4ff569f 610 (assume strong battery or other power source) */ \
Anna Bridge 160:5571c4ff569f 611 emuDcdcAnaPeripheralPower_DCDC,/* Select DCDC as analog power supply (lower power) */ \
Anna Bridge 160:5571c4ff569f 612 emuDcdcLnHighEfficiency, /* Use high-efficiency mode */ \
Anna Bridge 160:5571c4ff569f 613 emuDcdcLnCompCtrl_1u0F, /* 1uF DCDC capacitor */ \
Anna Bridge 160:5571c4ff569f 614 }
AnnaBridge 156:ff21514d8981 615 #else
Anna Bridge 160:5571c4ff569f 616 #define EMU_DCDCINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 617 { \
Anna Bridge 160:5571c4ff569f 618 emuPowerConfig_DcdcToDvdd, /* DCDC to DVDD */ \
Anna Bridge 160:5571c4ff569f 619 emuDcdcMode_LowPower, /* Low-power mode in EM0 */ \
Anna Bridge 160:5571c4ff569f 620 1800, /* Nominal output voltage for DVDD mode, 1.8V */ \
Anna Bridge 160:5571c4ff569f 621 5, /* Nominal EM0/1 load current of less than 5mA */ \
Anna Bridge 160:5571c4ff569f 622 10, /* Nominal EM2/3/4 load current less than 10uA */ \
Anna Bridge 160:5571c4ff569f 623 200, /* Maximum average current of 200mA
Anna Bridge 160:5571c4ff569f 624 (assume strong battery or other power source) */ \
Anna Bridge 160:5571c4ff569f 625 emuDcdcAnaPeripheralPower_AVDD,/* Select AVDD as analog power supply) */ \
Anna Bridge 160:5571c4ff569f 626 emuDcdcLnHighEfficiency, /* Use high-efficiency mode */ \
Anna Bridge 160:5571c4ff569f 627 emuDcdcLnCompCtrl_4u7F, /* 4.7uF DCDC capacitor */ \
Anna Bridge 160:5571c4ff569f 628 }
AnnaBridge 156:ff21514d8981 629 #endif
AnnaBridge 156:ff21514d8981 630
AnnaBridge 156:ff21514d8981 631 #else /* EFR32 device */
AnnaBridge 156:ff21514d8981 632 #if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
Anna Bridge 160:5571c4ff569f 633 #define EMU_DCDCINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 634 { \
Anna Bridge 160:5571c4ff569f 635 emuPowerConfig_DcdcToDvdd, /* DCDC to DVDD */ \
Anna Bridge 160:5571c4ff569f 636 emuDcdcMode_LowNoise, /* Low-niose mode in EM0 */ \
Anna Bridge 160:5571c4ff569f 637 1800, /* Nominal output voltage for DVDD mode, 1.8V */ \
Anna Bridge 160:5571c4ff569f 638 15, /* Nominal EM0/1 load current of less than 15mA */ \
Anna Bridge 160:5571c4ff569f 639 10, /* Nominal EM2/3/4 load current less than 10uA */ \
Anna Bridge 160:5571c4ff569f 640 200, /* Maximum average current of 200mA
Anna Bridge 160:5571c4ff569f 641 (assume strong battery or other power source) */ \
Anna Bridge 160:5571c4ff569f 642 emuDcdcAnaPeripheralPower_DCDC,/* Select DCDC as analog power supply (lower power) */ \
Anna Bridge 160:5571c4ff569f 643 160, /* Maximum reverse current of 160mA */ \
Anna Bridge 160:5571c4ff569f 644 emuDcdcLnCompCtrl_1u0F, /* 1uF DCDC capacitor */ \
Anna Bridge 160:5571c4ff569f 645 }
AnnaBridge 156:ff21514d8981 646 #else
Anna Bridge 160:5571c4ff569f 647 #define EMU_DCDCINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 648 { \
Anna Bridge 160:5571c4ff569f 649 emuPowerConfig_DcdcToDvdd, /* DCDC to DVDD */ \
Anna Bridge 160:5571c4ff569f 650 emuDcdcMode_LowNoise, /* Low-niose mode in EM0 */ \
Anna Bridge 160:5571c4ff569f 651 1800, /* Nominal output voltage for DVDD mode, 1.8V */ \
Anna Bridge 160:5571c4ff569f 652 15, /* Nominal EM0/1 load current of less than 15mA */ \
Anna Bridge 160:5571c4ff569f 653 10, /* Nominal EM2/3/4 load current less than 10uA */ \
Anna Bridge 160:5571c4ff569f 654 200, /* Maximum average current of 200mA
Anna Bridge 160:5571c4ff569f 655 (assume strong battery or other power source) */ \
Anna Bridge 160:5571c4ff569f 656 emuDcdcAnaPeripheralPower_DCDC,/* Select DCDC as analog power supply (lower power) */ \
Anna Bridge 160:5571c4ff569f 657 160, /* Maximum reverse current of 160mA */ \
Anna Bridge 160:5571c4ff569f 658 emuDcdcLnCompCtrl_4u7F, /* 4.7uF DCDC capacitor */ \
Anna Bridge 160:5571c4ff569f 659 }
AnnaBridge 156:ff21514d8981 660 #endif
AnnaBridge 156:ff21514d8981 661 #endif
AnnaBridge 156:ff21514d8981 662 #endif
AnnaBridge 156:ff21514d8981 663
Anna Bridge 160:5571c4ff569f 664 #if defined(EMU_STATUS_VMONRDY)
AnnaBridge 156:ff21514d8981 665 /** VMON initialization structure */
Anna Bridge 160:5571c4ff569f 666 typedef struct {
AnnaBridge 156:ff21514d8981 667 EMU_VmonChannel_TypeDef channel; /**< VMON channel to configure */
Anna Bridge 160:5571c4ff569f 668 int threshold; /**< Trigger threshold (mV). Supported range is 1620 mV to 3400 mV */
AnnaBridge 156:ff21514d8981 669 bool riseWakeup; /**< Wake up from EM4H on rising edge */
AnnaBridge 156:ff21514d8981 670 bool fallWakeup; /**< Wake up from EM4H on falling edge */
AnnaBridge 156:ff21514d8981 671 bool enable; /**< Enable VMON channel */
AnnaBridge 156:ff21514d8981 672 bool retDisable; /**< Disable IO0 retention when voltage drops below threshold (IOVDD only) */
AnnaBridge 156:ff21514d8981 673 } EMU_VmonInit_TypeDef;
AnnaBridge 156:ff21514d8981 674
AnnaBridge 156:ff21514d8981 675 /** Default VMON initialization structure */
AnnaBridge 156:ff21514d8981 676 #define EMU_VMONINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 677 { \
Anna Bridge 160:5571c4ff569f 678 emuVmonChannel_AVDD, /* AVDD VMON channel */ \
Anna Bridge 160:5571c4ff569f 679 3200, /* 3.2 V threshold */ \
Anna Bridge 160:5571c4ff569f 680 false, /* Don't wake from EM4H on rising edge */ \
Anna Bridge 160:5571c4ff569f 681 false, /* Don't wake from EM4H on falling edge */ \
Anna Bridge 160:5571c4ff569f 682 true, /* Enable VMON channel */ \
Anna Bridge 160:5571c4ff569f 683 false /* Don't disable IO0 retention */ \
Anna Bridge 160:5571c4ff569f 684 }
AnnaBridge 156:ff21514d8981 685
AnnaBridge 156:ff21514d8981 686 /** VMON Hysteresis initialization structure */
Anna Bridge 160:5571c4ff569f 687 typedef struct {
AnnaBridge 156:ff21514d8981 688 EMU_VmonChannel_TypeDef channel; /**< VMON channel to configure */
AnnaBridge 156:ff21514d8981 689 int riseThreshold; /**< Rising threshold (mV) */
AnnaBridge 156:ff21514d8981 690 int fallThreshold; /**< Falling threshold (mV) */
AnnaBridge 156:ff21514d8981 691 bool riseWakeup; /**< Wake up from EM4H on rising edge */
AnnaBridge 156:ff21514d8981 692 bool fallWakeup; /**< Wake up from EM4H on falling edge */
AnnaBridge 156:ff21514d8981 693 bool enable; /**< Enable VMON channel */
AnnaBridge 156:ff21514d8981 694 } EMU_VmonHystInit_TypeDef;
AnnaBridge 156:ff21514d8981 695
AnnaBridge 156:ff21514d8981 696 /** Default VMON Hysteresis initialization structure */
AnnaBridge 156:ff21514d8981 697 #define EMU_VMONHYSTINIT_DEFAULT \
Anna Bridge 160:5571c4ff569f 698 { \
Anna Bridge 160:5571c4ff569f 699 emuVmonChannel_AVDD, /* AVDD VMON channel */ \
Anna Bridge 160:5571c4ff569f 700 3200, /* 3.2 V rise threshold */ \
Anna Bridge 160:5571c4ff569f 701 3200, /* 3.2 V fall threshold */ \
Anna Bridge 160:5571c4ff569f 702 false, /* Don't wake from EM4H on rising edge */ \
Anna Bridge 160:5571c4ff569f 703 false, /* Don't wake from EM4H on falling edge */ \
Anna Bridge 160:5571c4ff569f 704 true /* Enable VMON channel */ \
Anna Bridge 160:5571c4ff569f 705 }
AnnaBridge 156:ff21514d8981 706 #endif /* EMU_STATUS_VMONRDY */
AnnaBridge 156:ff21514d8981 707
AnnaBridge 156:ff21514d8981 708 /*******************************************************************************
AnnaBridge 156:ff21514d8981 709 ***************************** PROTOTYPES **********************************
AnnaBridge 156:ff21514d8981 710 ******************************************************************************/
AnnaBridge 156:ff21514d8981 711
Anna Bridge 160:5571c4ff569f 712 #if defined(_EMU_CMD_EM01VSCALE0_MASK)
AnnaBridge 156:ff21514d8981 713 void EMU_EM01Init(const EMU_EM01Init_TypeDef *em01Init);
AnnaBridge 156:ff21514d8981 714 #endif
AnnaBridge 156:ff21514d8981 715 void EMU_EM23Init(const EMU_EM23Init_TypeDef *em23Init);
Anna Bridge 160:5571c4ff569f 716 #if defined(_EMU_EM4CONF_MASK) || defined(_EMU_EM4CTRL_MASK)
AnnaBridge 156:ff21514d8981 717 void EMU_EM4Init(const EMU_EM4Init_TypeDef *em4Init);
AnnaBridge 156:ff21514d8981 718 #endif
AnnaBridge 156:ff21514d8981 719 void EMU_EnterEM2(bool restore);
AnnaBridge 156:ff21514d8981 720 void EMU_EnterEM3(bool restore);
Anna Bridge 160:5571c4ff569f 721 void EMU_Save(void);
AnnaBridge 156:ff21514d8981 722 void EMU_Restore(void);
AnnaBridge 156:ff21514d8981 723 void EMU_EnterEM4(void);
Anna Bridge 160:5571c4ff569f 724 #if defined(_EMU_EM4CTRL_MASK)
AnnaBridge 156:ff21514d8981 725 void EMU_EnterEM4H(void);
AnnaBridge 156:ff21514d8981 726 void EMU_EnterEM4S(void);
AnnaBridge 156:ff21514d8981 727 #endif
AnnaBridge 156:ff21514d8981 728 void EMU_MemPwrDown(uint32_t blocks);
AnnaBridge 156:ff21514d8981 729 void EMU_RamPowerDown(uint32_t start, uint32_t end);
AnnaBridge 156:ff21514d8981 730 #if defined(_EMU_EM23PERNORETAINCTRL_MASK)
AnnaBridge 156:ff21514d8981 731 void EMU_PeripheralRetention(EMU_PeripheralRetention_TypeDef periMask, bool enable);
AnnaBridge 156:ff21514d8981 732 #endif
AnnaBridge 156:ff21514d8981 733 void EMU_UpdateOscConfig(void);
Anna Bridge 160:5571c4ff569f 734 #if defined(_EMU_CMD_EM01VSCALE0_MASK)
AnnaBridge 156:ff21514d8981 735 void EMU_VScaleEM01ByClock(uint32_t clockFrequency, bool wait);
AnnaBridge 156:ff21514d8981 736 void EMU_VScaleEM01(EMU_VScaleEM01_TypeDef voltage, bool wait);
AnnaBridge 156:ff21514d8981 737 #endif
Anna Bridge 160:5571c4ff569f 738 #if defined(BU_PRESENT) && defined(_SILICON_LABS_32B_SERIES_0)
AnnaBridge 156:ff21514d8981 739 void EMU_BUPDInit(const EMU_BUPDInit_TypeDef *bupdInit);
AnnaBridge 156:ff21514d8981 740 void EMU_BUThresholdSet(EMU_BODMode_TypeDef mode, uint32_t value);
AnnaBridge 156:ff21514d8981 741 void EMU_BUThresRangeSet(EMU_BODMode_TypeDef mode, uint32_t value);
AnnaBridge 156:ff21514d8981 742 #endif
Anna Bridge 160:5571c4ff569f 743 #if defined(_EMU_DCDCCTRL_MASK)
AnnaBridge 156:ff21514d8981 744 bool EMU_DCDCInit(const EMU_DCDCInit_TypeDef *dcdcInit);
AnnaBridge 156:ff21514d8981 745 void EMU_DCDCModeSet(EMU_DcdcMode_TypeDef dcdcMode);
AnnaBridge 156:ff21514d8981 746 void EMU_DCDCConductionModeSet(EMU_DcdcConductionMode_TypeDef conductionMode, bool rcoDefaultSet);
AnnaBridge 156:ff21514d8981 747 bool EMU_DCDCOutputVoltageSet(uint32_t mV, bool setLpVoltage, bool setLnVoltage);
AnnaBridge 156:ff21514d8981 748 void EMU_DCDCOptimizeSlice(uint32_t mALoadCurrent);
AnnaBridge 156:ff21514d8981 749 void EMU_DCDCLnRcoBandSet(EMU_DcdcLnRcoBand_TypeDef band);
AnnaBridge 156:ff21514d8981 750 bool EMU_DCDCPowerOff(void);
AnnaBridge 156:ff21514d8981 751 #endif
Anna Bridge 160:5571c4ff569f 752 #if defined(EMU_STATUS_VMONRDY)
AnnaBridge 156:ff21514d8981 753 void EMU_VmonInit(const EMU_VmonInit_TypeDef *vmonInit);
AnnaBridge 156:ff21514d8981 754 void EMU_VmonHystInit(const EMU_VmonHystInit_TypeDef *vmonInit);
AnnaBridge 156:ff21514d8981 755 void EMU_VmonEnable(EMU_VmonChannel_TypeDef channel, bool enable);
AnnaBridge 156:ff21514d8981 756 bool EMU_VmonChannelStatusGet(EMU_VmonChannel_TypeDef channel);
AnnaBridge 156:ff21514d8981 757 #endif
AnnaBridge 156:ff21514d8981 758
AnnaBridge 156:ff21514d8981 759 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 760 * @brief
AnnaBridge 156:ff21514d8981 761 * Enter energy mode 1 (EM1).
AnnaBridge 156:ff21514d8981 762 ******************************************************************************/
AnnaBridge 156:ff21514d8981 763 __STATIC_INLINE void EMU_EnterEM1(void)
AnnaBridge 156:ff21514d8981 764 {
AnnaBridge 156:ff21514d8981 765 /* Enter sleep mode */
AnnaBridge 156:ff21514d8981 766 SCB->SCR &= ~SCB_SCR_SLEEPDEEP_Msk;
AnnaBridge 156:ff21514d8981 767 __WFI();
AnnaBridge 156:ff21514d8981 768 }
AnnaBridge 156:ff21514d8981 769
Anna Bridge 160:5571c4ff569f 770 #if defined(_EMU_STATUS_VSCALE_MASK)
AnnaBridge 156:ff21514d8981 771 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 772 * @brief
AnnaBridge 156:ff21514d8981 773 * Wait for voltage scaling to complete
AnnaBridge 156:ff21514d8981 774 ******************************************************************************/
AnnaBridge 156:ff21514d8981 775 __STATIC_INLINE void EMU_VScaleWait(void)
AnnaBridge 156:ff21514d8981 776 {
Anna Bridge 160:5571c4ff569f 777 while (BUS_RegBitRead(&EMU->STATUS, _EMU_STATUS_VSCALEBUSY_SHIFT)) ;
AnnaBridge 156:ff21514d8981 778 }
AnnaBridge 156:ff21514d8981 779 #endif
AnnaBridge 156:ff21514d8981 780
Anna Bridge 160:5571c4ff569f 781 #if defined(_EMU_STATUS_VSCALE_MASK)
AnnaBridge 156:ff21514d8981 782 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 783 * @brief
AnnaBridge 156:ff21514d8981 784 * Get current voltage scaling level
AnnaBridge 156:ff21514d8981 785 *
AnnaBridge 156:ff21514d8981 786 * @return
AnnaBridge 156:ff21514d8981 787 * Current voltage scaling level
AnnaBridge 156:ff21514d8981 788 ******************************************************************************/
AnnaBridge 156:ff21514d8981 789 __STATIC_INLINE EMU_VScaleEM01_TypeDef EMU_VScaleGet(void)
AnnaBridge 156:ff21514d8981 790 {
AnnaBridge 156:ff21514d8981 791 EMU_VScaleWait();
AnnaBridge 156:ff21514d8981 792 return (EMU_VScaleEM01_TypeDef)((EMU->STATUS & _EMU_STATUS_VSCALE_MASK)
AnnaBridge 156:ff21514d8981 793 >> _EMU_STATUS_VSCALE_SHIFT);
AnnaBridge 156:ff21514d8981 794 }
AnnaBridge 156:ff21514d8981 795 #endif
AnnaBridge 156:ff21514d8981 796
Anna Bridge 160:5571c4ff569f 797 #if defined(_EMU_STATUS_VMONRDY_MASK)
AnnaBridge 156:ff21514d8981 798 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 799 * @brief
AnnaBridge 156:ff21514d8981 800 * Get the status of the voltage monitor (VMON).
AnnaBridge 156:ff21514d8981 801 *
AnnaBridge 156:ff21514d8981 802 * @return
AnnaBridge 156:ff21514d8981 803 * Status of the VMON. True if all the enabled channels are ready, false if
AnnaBridge 156:ff21514d8981 804 * one or more of the enabled channels are not ready.
AnnaBridge 156:ff21514d8981 805 ******************************************************************************/
AnnaBridge 156:ff21514d8981 806 __STATIC_INLINE bool EMU_VmonStatusGet(void)
AnnaBridge 156:ff21514d8981 807 {
AnnaBridge 156:ff21514d8981 808 return BUS_RegBitRead(&EMU->STATUS, _EMU_STATUS_VMONRDY_SHIFT);
AnnaBridge 156:ff21514d8981 809 }
AnnaBridge 156:ff21514d8981 810 #endif /* _EMU_STATUS_VMONRDY_MASK */
AnnaBridge 156:ff21514d8981 811
Anna Bridge 160:5571c4ff569f 812 #if defined(_EMU_IF_MASK)
AnnaBridge 156:ff21514d8981 813 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 814 * @brief
AnnaBridge 156:ff21514d8981 815 * Clear one or more pending EMU interrupts.
AnnaBridge 156:ff21514d8981 816 *
AnnaBridge 156:ff21514d8981 817 * @param[in] flags
AnnaBridge 156:ff21514d8981 818 * Pending EMU interrupt sources to clear. Use one or more valid
AnnaBridge 156:ff21514d8981 819 * interrupt flags for the EMU module (EMU_IFC_nnn).
AnnaBridge 156:ff21514d8981 820 ******************************************************************************/
AnnaBridge 156:ff21514d8981 821 __STATIC_INLINE void EMU_IntClear(uint32_t flags)
AnnaBridge 156:ff21514d8981 822 {
AnnaBridge 156:ff21514d8981 823 EMU->IFC = flags;
AnnaBridge 156:ff21514d8981 824 }
AnnaBridge 156:ff21514d8981 825
AnnaBridge 156:ff21514d8981 826 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 827 * @brief
AnnaBridge 156:ff21514d8981 828 * Disable one or more EMU interrupts.
AnnaBridge 156:ff21514d8981 829 *
AnnaBridge 156:ff21514d8981 830 * @param[in] flags
AnnaBridge 156:ff21514d8981 831 * EMU interrupt sources to disable. Use one or more valid
AnnaBridge 156:ff21514d8981 832 * interrupt flags for the EMU module (EMU_IEN_nnn).
AnnaBridge 156:ff21514d8981 833 ******************************************************************************/
AnnaBridge 156:ff21514d8981 834 __STATIC_INLINE void EMU_IntDisable(uint32_t flags)
AnnaBridge 156:ff21514d8981 835 {
AnnaBridge 156:ff21514d8981 836 EMU->IEN &= ~flags;
AnnaBridge 156:ff21514d8981 837 }
AnnaBridge 156:ff21514d8981 838
AnnaBridge 156:ff21514d8981 839 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 840 * @brief
AnnaBridge 156:ff21514d8981 841 * Enable one or more EMU interrupts.
AnnaBridge 156:ff21514d8981 842 *
AnnaBridge 156:ff21514d8981 843 * @note
AnnaBridge 156:ff21514d8981 844 * Depending on the use, a pending interrupt may already be set prior to
Anna Bridge 160:5571c4ff569f 845 * enabling the interrupt. Consider using @ref EMU_IntClear() prior to enabling
AnnaBridge 156:ff21514d8981 846 * if such a pending interrupt should be ignored.
AnnaBridge 156:ff21514d8981 847 *
AnnaBridge 156:ff21514d8981 848 * @param[in] flags
AnnaBridge 156:ff21514d8981 849 * EMU interrupt sources to enable. Use one or more valid
AnnaBridge 156:ff21514d8981 850 * interrupt flags for the EMU module (EMU_IEN_nnn).
AnnaBridge 156:ff21514d8981 851 ******************************************************************************/
AnnaBridge 156:ff21514d8981 852 __STATIC_INLINE void EMU_IntEnable(uint32_t flags)
AnnaBridge 156:ff21514d8981 853 {
AnnaBridge 156:ff21514d8981 854 EMU->IEN |= flags;
AnnaBridge 156:ff21514d8981 855 }
AnnaBridge 156:ff21514d8981 856
AnnaBridge 156:ff21514d8981 857 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 858 * @brief
AnnaBridge 156:ff21514d8981 859 * Get pending EMU interrupt flags.
AnnaBridge 156:ff21514d8981 860 *
AnnaBridge 156:ff21514d8981 861 * @note
AnnaBridge 156:ff21514d8981 862 * The event bits are not cleared by the use of this function.
AnnaBridge 156:ff21514d8981 863 *
AnnaBridge 156:ff21514d8981 864 * @return
AnnaBridge 156:ff21514d8981 865 * EMU interrupt sources pending. Returns one or more valid
AnnaBridge 156:ff21514d8981 866 * interrupt flags for the EMU module (EMU_IF_nnn).
AnnaBridge 156:ff21514d8981 867 ******************************************************************************/
AnnaBridge 156:ff21514d8981 868 __STATIC_INLINE uint32_t EMU_IntGet(void)
AnnaBridge 156:ff21514d8981 869 {
AnnaBridge 156:ff21514d8981 870 return EMU->IF;
AnnaBridge 156:ff21514d8981 871 }
AnnaBridge 156:ff21514d8981 872
AnnaBridge 156:ff21514d8981 873 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 874 * @brief
AnnaBridge 156:ff21514d8981 875 * Get enabled and pending EMU interrupt flags.
AnnaBridge 156:ff21514d8981 876 * Useful for handling more interrupt sources in the same interrupt handler.
AnnaBridge 156:ff21514d8981 877 *
AnnaBridge 156:ff21514d8981 878 * @note
AnnaBridge 156:ff21514d8981 879 * Interrupt flags are not cleared by the use of this function.
AnnaBridge 156:ff21514d8981 880 *
AnnaBridge 156:ff21514d8981 881 * @return
AnnaBridge 156:ff21514d8981 882 * Pending and enabled EMU interrupt sources
AnnaBridge 156:ff21514d8981 883 * The return value is the bitwise AND of
AnnaBridge 156:ff21514d8981 884 * - the enabled interrupt sources in EMU_IEN and
AnnaBridge 156:ff21514d8981 885 * - the pending interrupt flags EMU_IF
AnnaBridge 156:ff21514d8981 886 ******************************************************************************/
AnnaBridge 156:ff21514d8981 887 __STATIC_INLINE uint32_t EMU_IntGetEnabled(void)
AnnaBridge 156:ff21514d8981 888 {
AnnaBridge 156:ff21514d8981 889 uint32_t ien;
AnnaBridge 156:ff21514d8981 890
AnnaBridge 156:ff21514d8981 891 ien = EMU->IEN;
AnnaBridge 156:ff21514d8981 892 return EMU->IF & ien;
AnnaBridge 156:ff21514d8981 893 }
AnnaBridge 156:ff21514d8981 894
AnnaBridge 156:ff21514d8981 895 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 896 * @brief
AnnaBridge 156:ff21514d8981 897 * Set one or more pending EMU interrupts
AnnaBridge 156:ff21514d8981 898 *
AnnaBridge 156:ff21514d8981 899 * @param[in] flags
AnnaBridge 156:ff21514d8981 900 * EMU interrupt sources to set to pending. Use one or more valid
AnnaBridge 156:ff21514d8981 901 * interrupt flags for the EMU module (EMU_IFS_nnn).
AnnaBridge 156:ff21514d8981 902 ******************************************************************************/
AnnaBridge 156:ff21514d8981 903 __STATIC_INLINE void EMU_IntSet(uint32_t flags)
AnnaBridge 156:ff21514d8981 904 {
AnnaBridge 156:ff21514d8981 905 EMU->IFS = flags;
AnnaBridge 156:ff21514d8981 906 }
AnnaBridge 156:ff21514d8981 907 #endif /* _EMU_IF_MASK */
AnnaBridge 156:ff21514d8981 908
Anna Bridge 160:5571c4ff569f 909 #if defined(_EMU_EM4CONF_LOCKCONF_MASK)
AnnaBridge 156:ff21514d8981 910 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 911 * @brief
AnnaBridge 156:ff21514d8981 912 * Enable or disable EM4 lock configuration
AnnaBridge 156:ff21514d8981 913 * @param[in] enable
AnnaBridge 156:ff21514d8981 914 * If true, locks down EM4 configuration
AnnaBridge 156:ff21514d8981 915 ******************************************************************************/
AnnaBridge 156:ff21514d8981 916 __STATIC_INLINE void EMU_EM4Lock(bool enable)
AnnaBridge 156:ff21514d8981 917 {
AnnaBridge 156:ff21514d8981 918 BUS_RegBitWrite(&(EMU->EM4CONF), _EMU_EM4CONF_LOCKCONF_SHIFT, enable);
AnnaBridge 156:ff21514d8981 919 }
AnnaBridge 156:ff21514d8981 920 #endif
AnnaBridge 156:ff21514d8981 921
Anna Bridge 160:5571c4ff569f 922 #if defined(_EMU_STATUS_BURDY_MASK)
AnnaBridge 156:ff21514d8981 923 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 924 * @brief
AnnaBridge 156:ff21514d8981 925 * Halts until backup power functionality is ready
AnnaBridge 156:ff21514d8981 926 ******************************************************************************/
AnnaBridge 156:ff21514d8981 927 __STATIC_INLINE void EMU_BUReady(void)
AnnaBridge 156:ff21514d8981 928 {
Anna Bridge 160:5571c4ff569f 929 while (!(EMU->STATUS & EMU_STATUS_BURDY))
AnnaBridge 156:ff21514d8981 930 ;
AnnaBridge 156:ff21514d8981 931 }
AnnaBridge 156:ff21514d8981 932 #endif
AnnaBridge 156:ff21514d8981 933
Anna Bridge 160:5571c4ff569f 934 #if defined(_EMU_ROUTE_BUVINPEN_MASK)
AnnaBridge 156:ff21514d8981 935 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 936 * @brief
AnnaBridge 156:ff21514d8981 937 * Disable BU_VIN support
AnnaBridge 156:ff21514d8981 938 * @param[in] enable
AnnaBridge 156:ff21514d8981 939 * If true, enables BU_VIN input pin support, if false disables it
AnnaBridge 156:ff21514d8981 940 ******************************************************************************/
AnnaBridge 156:ff21514d8981 941 __STATIC_INLINE void EMU_BUPinEnable(bool enable)
AnnaBridge 156:ff21514d8981 942 {
AnnaBridge 156:ff21514d8981 943 BUS_RegBitWrite(&(EMU->ROUTE), _EMU_ROUTE_BUVINPEN_SHIFT, enable);
AnnaBridge 156:ff21514d8981 944 }
AnnaBridge 156:ff21514d8981 945 #endif
AnnaBridge 156:ff21514d8981 946
AnnaBridge 156:ff21514d8981 947 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 948 * @brief
AnnaBridge 156:ff21514d8981 949 * Lock the EMU in order to protect its registers against unintended
AnnaBridge 156:ff21514d8981 950 * modification.
AnnaBridge 156:ff21514d8981 951 *
AnnaBridge 156:ff21514d8981 952 * @note
AnnaBridge 156:ff21514d8981 953 * If locking the EMU registers, they must be unlocked prior to using any
AnnaBridge 156:ff21514d8981 954 * EMU API functions modifying EMU registers, excluding interrupt control
AnnaBridge 156:ff21514d8981 955 * and regulator control if the architecture has a EMU_PWRCTRL register.
AnnaBridge 156:ff21514d8981 956 * An exception to this is the energy mode entering API (EMU_EnterEMn()),
AnnaBridge 156:ff21514d8981 957 * which can be used when the EMU registers are locked.
AnnaBridge 156:ff21514d8981 958 ******************************************************************************/
AnnaBridge 156:ff21514d8981 959 __STATIC_INLINE void EMU_Lock(void)
AnnaBridge 156:ff21514d8981 960 {
AnnaBridge 156:ff21514d8981 961 EMU->LOCK = EMU_LOCK_LOCKKEY_LOCK;
AnnaBridge 156:ff21514d8981 962 }
AnnaBridge 156:ff21514d8981 963
AnnaBridge 156:ff21514d8981 964 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 965 * @brief
AnnaBridge 156:ff21514d8981 966 * Unlock the EMU so that writing to locked registers again is possible.
AnnaBridge 156:ff21514d8981 967 ******************************************************************************/
AnnaBridge 156:ff21514d8981 968 __STATIC_INLINE void EMU_Unlock(void)
AnnaBridge 156:ff21514d8981 969 {
AnnaBridge 156:ff21514d8981 970 EMU->LOCK = EMU_LOCK_LOCKKEY_UNLOCK;
AnnaBridge 156:ff21514d8981 971 }
AnnaBridge 156:ff21514d8981 972
Anna Bridge 160:5571c4ff569f 973 #if defined(_EMU_PWRLOCK_MASK)
AnnaBridge 156:ff21514d8981 974 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 975 * @brief
AnnaBridge 156:ff21514d8981 976 * Lock the EMU regulator control registers in order to protect against
AnnaBridge 156:ff21514d8981 977 * unintended modification.
AnnaBridge 156:ff21514d8981 978 ******************************************************************************/
AnnaBridge 156:ff21514d8981 979 __STATIC_INLINE void EMU_PowerLock(void)
AnnaBridge 156:ff21514d8981 980 {
AnnaBridge 156:ff21514d8981 981 EMU->PWRLOCK = EMU_PWRLOCK_LOCKKEY_LOCK;
AnnaBridge 156:ff21514d8981 982 }
AnnaBridge 156:ff21514d8981 983
AnnaBridge 156:ff21514d8981 984 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 985 * @brief
AnnaBridge 156:ff21514d8981 986 * Unlock the EMU power control registers so that writing to
AnnaBridge 156:ff21514d8981 987 * locked registers again is possible.
AnnaBridge 156:ff21514d8981 988 ******************************************************************************/
AnnaBridge 156:ff21514d8981 989 __STATIC_INLINE void EMU_PowerUnlock(void)
AnnaBridge 156:ff21514d8981 990 {
AnnaBridge 156:ff21514d8981 991 EMU->PWRLOCK = EMU_PWRLOCK_LOCKKEY_UNLOCK;
AnnaBridge 156:ff21514d8981 992 }
AnnaBridge 156:ff21514d8981 993 #endif
AnnaBridge 156:ff21514d8981 994
AnnaBridge 156:ff21514d8981 995 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 996 * @brief
AnnaBridge 156:ff21514d8981 997 * Block entering EM2 or higher number energy modes.
AnnaBridge 156:ff21514d8981 998 ******************************************************************************/
AnnaBridge 156:ff21514d8981 999 __STATIC_INLINE void EMU_EM2Block(void)
AnnaBridge 156:ff21514d8981 1000 {
AnnaBridge 156:ff21514d8981 1001 BUS_RegBitWrite(&(EMU->CTRL), _EMU_CTRL_EM2BLOCK_SHIFT, 1U);
AnnaBridge 156:ff21514d8981 1002 }
AnnaBridge 156:ff21514d8981 1003
AnnaBridge 156:ff21514d8981 1004 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1005 * @brief
AnnaBridge 156:ff21514d8981 1006 * Unblock entering EM2 or higher number energy modes.
AnnaBridge 156:ff21514d8981 1007 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1008 __STATIC_INLINE void EMU_EM2UnBlock(void)
AnnaBridge 156:ff21514d8981 1009 {
AnnaBridge 156:ff21514d8981 1010 BUS_RegBitWrite(&(EMU->CTRL), _EMU_CTRL_EM2BLOCK_SHIFT, 0U);
AnnaBridge 156:ff21514d8981 1011 }
AnnaBridge 156:ff21514d8981 1012
Anna Bridge 160:5571c4ff569f 1013 #if defined(_EMU_EM4CTRL_EM4IORETMODE_MASK)
AnnaBridge 156:ff21514d8981 1014 /***************************************************************************//**
AnnaBridge 156:ff21514d8981 1015 * @brief
AnnaBridge 156:ff21514d8981 1016 * When EM4 pin retention is set to emuPinRetentionLatch, then pins are retained
AnnaBridge 156:ff21514d8981 1017 * through EM4 entry and wakeup. The pin state is released by calling this function.
AnnaBridge 156:ff21514d8981 1018 * The feature allows peripherals or GPIO to be re-initialized after EM4 exit (reset),
AnnaBridge 156:ff21514d8981 1019 * and when the initialization is done, this function can release pins and return control
AnnaBridge 156:ff21514d8981 1020 * to the peripherals or GPIO.
AnnaBridge 156:ff21514d8981 1021 ******************************************************************************/
AnnaBridge 156:ff21514d8981 1022 __STATIC_INLINE void EMU_UnlatchPinRetention(void)
AnnaBridge 156:ff21514d8981 1023 {
AnnaBridge 156:ff21514d8981 1024 EMU->CMD = EMU_CMD_EM4UNLATCH;
AnnaBridge 156:ff21514d8981 1025 }
AnnaBridge 156:ff21514d8981 1026 #endif
AnnaBridge 156:ff21514d8981 1027
Anna Bridge 160:5571c4ff569f 1028 #if defined(_SILICON_LABS_GECKO_INTERNAL_SDID_80)
AnnaBridge 156:ff21514d8981 1029 void EMU_SetBiasMode(EMU_BiasMode_TypeDef mode);
AnnaBridge 156:ff21514d8981 1030 #endif
AnnaBridge 156:ff21514d8981 1031
AnnaBridge 156:ff21514d8981 1032 /** @} (end addtogroup EMU) */
AnnaBridge 156:ff21514d8981 1033 /** @} (end addtogroup emlib) */
AnnaBridge 156:ff21514d8981 1034
AnnaBridge 156:ff21514d8981 1035 #ifdef __cplusplus
AnnaBridge 156:ff21514d8981 1036 }
AnnaBridge 156:ff21514d8981 1037 #endif
AnnaBridge 156:ff21514d8981 1038
AnnaBridge 156:ff21514d8981 1039 #endif /* defined( EMU_PRESENT ) */
AnnaBridge 156:ff21514d8981 1040 #endif /* EM_EMU_H */