mbed official / mbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Dependents:   hello SerialTestv11 SerialTestv12 Sierpinski ... more

mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

TARGET_EFM32PG_STK3401/TOOLCHAIN_ARM_MICRO/efm32pg1b_wdog.h@172:65be27845400, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 20:53:29 2019 +0000
Revision:
172:65be27845400
Parent:
171:3a7713b1edbc 
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 171:3a7713b1edbc 1 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 2 * @file efm32pg1b_wdog.h
AnnaBridge 171:3a7713b1edbc 3 * @brief EFM32PG1B_WDOG register and bit field definitions
AnnaBridge 171:3a7713b1edbc 4 * @version 5.1.2
AnnaBridge 171:3a7713b1edbc 5 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 6 * @section License
AnnaBridge 171:3a7713b1edbc 7 * <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
AnnaBridge 171:3a7713b1edbc 8 ******************************************************************************
AnnaBridge 171:3a7713b1edbc 9 *
AnnaBridge 171:3a7713b1edbc 10 * Permission is granted to anyone to use this software for any purpose,
AnnaBridge 171:3a7713b1edbc 11 * including commercial applications, and to alter it and redistribute it
AnnaBridge 171:3a7713b1edbc 12 * freely, subject to the following restrictions:
AnnaBridge 171:3a7713b1edbc 13 *
AnnaBridge 171:3a7713b1edbc 14 * 1. The origin of this software must not be misrepresented; you must not
AnnaBridge 171:3a7713b1edbc 15 * claim that you wrote the original software.@n
AnnaBridge 171:3a7713b1edbc 16 * 2. Altered source versions must be plainly marked as such, and must not be
AnnaBridge 171:3a7713b1edbc 17 * misrepresented as being the original software.@n
AnnaBridge 171:3a7713b1edbc 18 * 3. This notice may not be removed or altered from any source distribution.
AnnaBridge 171:3a7713b1edbc 19 *
AnnaBridge 171:3a7713b1edbc 20 * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
AnnaBridge 171:3a7713b1edbc 21 * has no obligation to support this Software. Silicon Laboratories, Inc. is
AnnaBridge 171:3a7713b1edbc 22 * providing the Software "AS IS", with no express or implied warranties of any
AnnaBridge 171:3a7713b1edbc 23 * kind, including, but not limited to, any implied warranties of
AnnaBridge 171:3a7713b1edbc 24 * merchantability or fitness for any particular purpose or warranties against
AnnaBridge 171:3a7713b1edbc 25 * infringement of any proprietary rights of a third party.
AnnaBridge 171:3a7713b1edbc 26 *
AnnaBridge 171:3a7713b1edbc 27 * Silicon Laboratories, Inc. will not be liable for any consequential,
AnnaBridge 171:3a7713b1edbc 28 * incidental, or special damages, or any other relief, or for any claim by
AnnaBridge 171:3a7713b1edbc 29 * any third party, arising from your use of this Software.
AnnaBridge 171:3a7713b1edbc 30 *
AnnaBridge 171:3a7713b1edbc 31 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 32 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 33 * @addtogroup Parts
AnnaBridge 171:3a7713b1edbc 34 * @{
AnnaBridge 171:3a7713b1edbc 35 ******************************************************************************/
AnnaBridge 171:3a7713b1edbc 36 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 37 * @defgroup EFM32PG1B_WDOG
AnnaBridge 171:3a7713b1edbc 38 * @{
AnnaBridge 171:3a7713b1edbc 39 * @brief EFM32PG1B_WDOG Register Declaration
AnnaBridge 171:3a7713b1edbc 40 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 41 typedef struct
AnnaBridge 171:3a7713b1edbc 42 {
AnnaBridge 171:3a7713b1edbc 43 __IOM uint32_t CTRL; /**< Control Register */
AnnaBridge 171:3a7713b1edbc 44 __IOM uint32_t CMD; /**< Command Register */
AnnaBridge 171:3a7713b1edbc 45
AnnaBridge 171:3a7713b1edbc 46 __IM uint32_t SYNCBUSY; /**< Synchronization Busy Register */
AnnaBridge 171:3a7713b1edbc 47
AnnaBridge 171:3a7713b1edbc 48 WDOG_PCH_TypeDef PCH[2]; /**< PCH */
AnnaBridge 171:3a7713b1edbc 49
AnnaBridge 171:3a7713b1edbc 50 uint32_t RESERVED0[2]; /**< Reserved for future use **/
AnnaBridge 171:3a7713b1edbc 51 __IM uint32_t IF; /**< Watchdog Interrupt Flags */
AnnaBridge 171:3a7713b1edbc 52 __IOM uint32_t IFS; /**< Interrupt Flag Set Register */
AnnaBridge 171:3a7713b1edbc 53 __IOM uint32_t IFC; /**< Interrupt Flag Clear Register */
AnnaBridge 171:3a7713b1edbc 54 __IOM uint32_t IEN; /**< Interrupt Enable Register */
AnnaBridge 171:3a7713b1edbc 55 } WDOG_TypeDef; /** @} */
AnnaBridge 171:3a7713b1edbc 56
AnnaBridge 171:3a7713b1edbc 57 /**************************************************************************//**
AnnaBridge 171:3a7713b1edbc 58 * @defgroup EFM32PG1B_WDOG_BitFields
AnnaBridge 171:3a7713b1edbc 59 * @{
AnnaBridge 171:3a7713b1edbc 60 *****************************************************************************/
AnnaBridge 171:3a7713b1edbc 61
AnnaBridge 171:3a7713b1edbc 62 /* Bit fields for WDOG CTRL */
AnnaBridge 171:3a7713b1edbc 63 #define _WDOG_CTRL_RESETVALUE 0x00000F00UL /**< Default value for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 64 #define _WDOG_CTRL_MASK 0xC7033F7FUL /**< Mask for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 65 #define WDOG_CTRL_EN (0x1UL << 0) /**< Watchdog Timer Enable */
AnnaBridge 171:3a7713b1edbc 66 #define _WDOG_CTRL_EN_SHIFT 0 /**< Shift value for WDOG_EN */
AnnaBridge 171:3a7713b1edbc 67 #define _WDOG_CTRL_EN_MASK 0x1UL /**< Bit mask for WDOG_EN */
AnnaBridge 171:3a7713b1edbc 68 #define _WDOG_CTRL_EN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 69 #define WDOG_CTRL_EN_DEFAULT (_WDOG_CTRL_EN_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 70 #define WDOG_CTRL_DEBUGRUN (0x1UL << 1) /**< Debug Mode Run Enable */
AnnaBridge 171:3a7713b1edbc 71 #define _WDOG_CTRL_DEBUGRUN_SHIFT 1 /**< Shift value for WDOG_DEBUGRUN */
AnnaBridge 171:3a7713b1edbc 72 #define _WDOG_CTRL_DEBUGRUN_MASK 0x2UL /**< Bit mask for WDOG_DEBUGRUN */
AnnaBridge 171:3a7713b1edbc 73 #define _WDOG_CTRL_DEBUGRUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 74 #define WDOG_CTRL_DEBUGRUN_DEFAULT (_WDOG_CTRL_DEBUGRUN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 75 #define WDOG_CTRL_EM2RUN (0x1UL << 2) /**< Energy Mode 2 Run Enable */
AnnaBridge 171:3a7713b1edbc 76 #define _WDOG_CTRL_EM2RUN_SHIFT 2 /**< Shift value for WDOG_EM2RUN */
AnnaBridge 171:3a7713b1edbc 77 #define _WDOG_CTRL_EM2RUN_MASK 0x4UL /**< Bit mask for WDOG_EM2RUN */
AnnaBridge 171:3a7713b1edbc 78 #define _WDOG_CTRL_EM2RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 79 #define WDOG_CTRL_EM2RUN_DEFAULT (_WDOG_CTRL_EM2RUN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 80 #define WDOG_CTRL_EM3RUN (0x1UL << 3) /**< Energy Mode 3 Run Enable */
AnnaBridge 171:3a7713b1edbc 81 #define _WDOG_CTRL_EM3RUN_SHIFT 3 /**< Shift value for WDOG_EM3RUN */
AnnaBridge 171:3a7713b1edbc 82 #define _WDOG_CTRL_EM3RUN_MASK 0x8UL /**< Bit mask for WDOG_EM3RUN */
AnnaBridge 171:3a7713b1edbc 83 #define _WDOG_CTRL_EM3RUN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 84 #define WDOG_CTRL_EM3RUN_DEFAULT (_WDOG_CTRL_EM3RUN_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 85 #define WDOG_CTRL_LOCK (0x1UL << 4) /**< Configuration lock */
AnnaBridge 171:3a7713b1edbc 86 #define _WDOG_CTRL_LOCK_SHIFT 4 /**< Shift value for WDOG_LOCK */
AnnaBridge 171:3a7713b1edbc 87 #define _WDOG_CTRL_LOCK_MASK 0x10UL /**< Bit mask for WDOG_LOCK */
AnnaBridge 171:3a7713b1edbc 88 #define _WDOG_CTRL_LOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 89 #define WDOG_CTRL_LOCK_DEFAULT (_WDOG_CTRL_LOCK_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 90 #define WDOG_CTRL_EM4BLOCK (0x1UL << 5) /**< Energy Mode 4 Block */
AnnaBridge 171:3a7713b1edbc 91 #define _WDOG_CTRL_EM4BLOCK_SHIFT 5 /**< Shift value for WDOG_EM4BLOCK */
AnnaBridge 171:3a7713b1edbc 92 #define _WDOG_CTRL_EM4BLOCK_MASK 0x20UL /**< Bit mask for WDOG_EM4BLOCK */
AnnaBridge 171:3a7713b1edbc 93 #define _WDOG_CTRL_EM4BLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 94 #define WDOG_CTRL_EM4BLOCK_DEFAULT (_WDOG_CTRL_EM4BLOCK_DEFAULT << 5) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 95 #define WDOG_CTRL_SWOSCBLOCK (0x1UL << 6) /**< Software Oscillator Disable Block */
AnnaBridge 171:3a7713b1edbc 96 #define _WDOG_CTRL_SWOSCBLOCK_SHIFT 6 /**< Shift value for WDOG_SWOSCBLOCK */
AnnaBridge 171:3a7713b1edbc 97 #define _WDOG_CTRL_SWOSCBLOCK_MASK 0x40UL /**< Bit mask for WDOG_SWOSCBLOCK */
AnnaBridge 171:3a7713b1edbc 98 #define _WDOG_CTRL_SWOSCBLOCK_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 99 #define WDOG_CTRL_SWOSCBLOCK_DEFAULT (_WDOG_CTRL_SWOSCBLOCK_DEFAULT << 6) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 100 #define _WDOG_CTRL_PERSEL_SHIFT 8 /**< Shift value for WDOG_PERSEL */
AnnaBridge 171:3a7713b1edbc 101 #define _WDOG_CTRL_PERSEL_MASK 0xF00UL /**< Bit mask for WDOG_PERSEL */
AnnaBridge 171:3a7713b1edbc 102 #define _WDOG_CTRL_PERSEL_DEFAULT 0x0000000FUL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 103 #define WDOG_CTRL_PERSEL_DEFAULT (_WDOG_CTRL_PERSEL_DEFAULT << 8) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 104 #define _WDOG_CTRL_CLKSEL_SHIFT 12 /**< Shift value for WDOG_CLKSEL */
AnnaBridge 171:3a7713b1edbc 105 #define _WDOG_CTRL_CLKSEL_MASK 0x3000UL /**< Bit mask for WDOG_CLKSEL */
AnnaBridge 171:3a7713b1edbc 106 #define _WDOG_CTRL_CLKSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 107 #define _WDOG_CTRL_CLKSEL_ULFRCO 0x00000000UL /**< Mode ULFRCO for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 108 #define _WDOG_CTRL_CLKSEL_LFRCO 0x00000001UL /**< Mode LFRCO for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 109 #define _WDOG_CTRL_CLKSEL_LFXO 0x00000002UL /**< Mode LFXO for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 110 #define WDOG_CTRL_CLKSEL_DEFAULT (_WDOG_CTRL_CLKSEL_DEFAULT << 12) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 111 #define WDOG_CTRL_CLKSEL_ULFRCO (_WDOG_CTRL_CLKSEL_ULFRCO << 12) /**< Shifted mode ULFRCO for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 112 #define WDOG_CTRL_CLKSEL_LFRCO (_WDOG_CTRL_CLKSEL_LFRCO << 12) /**< Shifted mode LFRCO for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 113 #define WDOG_CTRL_CLKSEL_LFXO (_WDOG_CTRL_CLKSEL_LFXO << 12) /**< Shifted mode LFXO for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 114 #define _WDOG_CTRL_WARNSEL_SHIFT 16 /**< Shift value for WDOG_WARNSEL */
AnnaBridge 171:3a7713b1edbc 115 #define _WDOG_CTRL_WARNSEL_MASK 0x30000UL /**< Bit mask for WDOG_WARNSEL */
AnnaBridge 171:3a7713b1edbc 116 #define _WDOG_CTRL_WARNSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 117 #define WDOG_CTRL_WARNSEL_DEFAULT (_WDOG_CTRL_WARNSEL_DEFAULT << 16) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 118 #define _WDOG_CTRL_WINSEL_SHIFT 24 /**< Shift value for WDOG_WINSEL */
AnnaBridge 171:3a7713b1edbc 119 #define _WDOG_CTRL_WINSEL_MASK 0x7000000UL /**< Bit mask for WDOG_WINSEL */
AnnaBridge 171:3a7713b1edbc 120 #define _WDOG_CTRL_WINSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 121 #define WDOG_CTRL_WINSEL_DEFAULT (_WDOG_CTRL_WINSEL_DEFAULT << 24) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 122 #define WDOG_CTRL_CLRSRC (0x1UL << 30) /**< Watchdog Clear Source */
AnnaBridge 171:3a7713b1edbc 123 #define _WDOG_CTRL_CLRSRC_SHIFT 30 /**< Shift value for WDOG_CLRSRC */
AnnaBridge 171:3a7713b1edbc 124 #define _WDOG_CTRL_CLRSRC_MASK 0x40000000UL /**< Bit mask for WDOG_CLRSRC */
AnnaBridge 171:3a7713b1edbc 125 #define _WDOG_CTRL_CLRSRC_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 126 #define _WDOG_CTRL_CLRSRC_SW 0x00000000UL /**< Mode SW for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 127 #define _WDOG_CTRL_CLRSRC_PCH0 0x00000001UL /**< Mode PCH0 for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 128 #define WDOG_CTRL_CLRSRC_DEFAULT (_WDOG_CTRL_CLRSRC_DEFAULT << 30) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 129 #define WDOG_CTRL_CLRSRC_SW (_WDOG_CTRL_CLRSRC_SW << 30) /**< Shifted mode SW for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 130 #define WDOG_CTRL_CLRSRC_PCH0 (_WDOG_CTRL_CLRSRC_PCH0 << 30) /**< Shifted mode PCH0 for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 131 #define WDOG_CTRL_WDOGRSTDIS (0x1UL << 31) /**< Watchdog Reset Disable */
AnnaBridge 171:3a7713b1edbc 132 #define _WDOG_CTRL_WDOGRSTDIS_SHIFT 31 /**< Shift value for WDOG_WDOGRSTDIS */
AnnaBridge 171:3a7713b1edbc 133 #define _WDOG_CTRL_WDOGRSTDIS_MASK 0x80000000UL /**< Bit mask for WDOG_WDOGRSTDIS */
AnnaBridge 171:3a7713b1edbc 134 #define _WDOG_CTRL_WDOGRSTDIS_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 135 #define _WDOG_CTRL_WDOGRSTDIS_EN 0x00000000UL /**< Mode EN for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 136 #define _WDOG_CTRL_WDOGRSTDIS_DIS 0x00000001UL /**< Mode DIS for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 137 #define WDOG_CTRL_WDOGRSTDIS_DEFAULT (_WDOG_CTRL_WDOGRSTDIS_DEFAULT << 31) /**< Shifted mode DEFAULT for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 138 #define WDOG_CTRL_WDOGRSTDIS_EN (_WDOG_CTRL_WDOGRSTDIS_EN << 31) /**< Shifted mode EN for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 139 #define WDOG_CTRL_WDOGRSTDIS_DIS (_WDOG_CTRL_WDOGRSTDIS_DIS << 31) /**< Shifted mode DIS for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 140
AnnaBridge 171:3a7713b1edbc 141 /* Bit fields for WDOG CMD */
AnnaBridge 171:3a7713b1edbc 142 #define _WDOG_CMD_RESETVALUE 0x00000000UL /**< Default value for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 143 #define _WDOG_CMD_MASK 0x00000001UL /**< Mask for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 144 #define WDOG_CMD_CLEAR (0x1UL << 0) /**< Watchdog Timer Clear */
AnnaBridge 171:3a7713b1edbc 145 #define _WDOG_CMD_CLEAR_SHIFT 0 /**< Shift value for WDOG_CLEAR */
AnnaBridge 171:3a7713b1edbc 146 #define _WDOG_CMD_CLEAR_MASK 0x1UL /**< Bit mask for WDOG_CLEAR */
AnnaBridge 171:3a7713b1edbc 147 #define _WDOG_CMD_CLEAR_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 148 #define _WDOG_CMD_CLEAR_UNCHANGED 0x00000000UL /**< Mode UNCHANGED for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 149 #define _WDOG_CMD_CLEAR_CLEARED 0x00000001UL /**< Mode CLEARED for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 150 #define WDOG_CMD_CLEAR_DEFAULT (_WDOG_CMD_CLEAR_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 151 #define WDOG_CMD_CLEAR_UNCHANGED (_WDOG_CMD_CLEAR_UNCHANGED << 0) /**< Shifted mode UNCHANGED for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 152 #define WDOG_CMD_CLEAR_CLEARED (_WDOG_CMD_CLEAR_CLEARED << 0) /**< Shifted mode CLEARED for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 153
AnnaBridge 171:3a7713b1edbc 154 /* Bit fields for WDOG SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 155 #define _WDOG_SYNCBUSY_RESETVALUE 0x00000000UL /**< Default value for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 156 #define _WDOG_SYNCBUSY_MASK 0x0000000FUL /**< Mask for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 157 #define WDOG_SYNCBUSY_CTRL (0x1UL << 0) /**< CTRL Register Busy */
AnnaBridge 171:3a7713b1edbc 158 #define _WDOG_SYNCBUSY_CTRL_SHIFT 0 /**< Shift value for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 159 #define _WDOG_SYNCBUSY_CTRL_MASK 0x1UL /**< Bit mask for WDOG_CTRL */
AnnaBridge 171:3a7713b1edbc 160 #define _WDOG_SYNCBUSY_CTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 161 #define WDOG_SYNCBUSY_CTRL_DEFAULT (_WDOG_SYNCBUSY_CTRL_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 162 #define WDOG_SYNCBUSY_CMD (0x1UL << 1) /**< CMD Register Busy */
AnnaBridge 171:3a7713b1edbc 163 #define _WDOG_SYNCBUSY_CMD_SHIFT 1 /**< Shift value for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 164 #define _WDOG_SYNCBUSY_CMD_MASK 0x2UL /**< Bit mask for WDOG_CMD */
AnnaBridge 171:3a7713b1edbc 165 #define _WDOG_SYNCBUSY_CMD_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 166 #define WDOG_SYNCBUSY_CMD_DEFAULT (_WDOG_SYNCBUSY_CMD_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 167 #define WDOG_SYNCBUSY_PCH0_PRSCTRL (0x1UL << 2) /**< PCH0_PRSCTRL Register Busy */
AnnaBridge 171:3a7713b1edbc 168 #define _WDOG_SYNCBUSY_PCH0_PRSCTRL_SHIFT 2 /**< Shift value for WDOG_PCH0_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 169 #define _WDOG_SYNCBUSY_PCH0_PRSCTRL_MASK 0x4UL /**< Bit mask for WDOG_PCH0_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 170 #define _WDOG_SYNCBUSY_PCH0_PRSCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 171 #define WDOG_SYNCBUSY_PCH0_PRSCTRL_DEFAULT (_WDOG_SYNCBUSY_PCH0_PRSCTRL_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 172 #define WDOG_SYNCBUSY_PCH1_PRSCTRL (0x1UL << 3) /**< PCH1_PRSCTRL Register Busy */
AnnaBridge 171:3a7713b1edbc 173 #define _WDOG_SYNCBUSY_PCH1_PRSCTRL_SHIFT 3 /**< Shift value for WDOG_PCH1_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 174 #define _WDOG_SYNCBUSY_PCH1_PRSCTRL_MASK 0x8UL /**< Bit mask for WDOG_PCH1_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 175 #define _WDOG_SYNCBUSY_PCH1_PRSCTRL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 176 #define WDOG_SYNCBUSY_PCH1_PRSCTRL_DEFAULT (_WDOG_SYNCBUSY_PCH1_PRSCTRL_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_SYNCBUSY */
AnnaBridge 171:3a7713b1edbc 177
AnnaBridge 171:3a7713b1edbc 178 /* Bit fields for WDOG PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 179 #define _WDOG_PCH_PRSCTRL_RESETVALUE 0x00000000UL /**< Default value for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 180 #define _WDOG_PCH_PRSCTRL_MASK 0x0000010FUL /**< Mask for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 181 #define _WDOG_PCH_PRSCTRL_PRSSEL_SHIFT 0 /**< Shift value for WDOG_PRSSEL */
AnnaBridge 171:3a7713b1edbc 182 #define _WDOG_PCH_PRSCTRL_PRSSEL_MASK 0xFUL /**< Bit mask for WDOG_PRSSEL */
AnnaBridge 171:3a7713b1edbc 183 #define _WDOG_PCH_PRSCTRL_PRSSEL_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 184 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH0 0x00000000UL /**< Mode PRSCH0 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 185 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH1 0x00000001UL /**< Mode PRSCH1 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 186 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH2 0x00000002UL /**< Mode PRSCH2 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 187 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH3 0x00000003UL /**< Mode PRSCH3 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 188 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH4 0x00000004UL /**< Mode PRSCH4 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 189 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH5 0x00000005UL /**< Mode PRSCH5 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 190 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH6 0x00000006UL /**< Mode PRSCH6 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 191 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH7 0x00000007UL /**< Mode PRSCH7 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 192 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH8 0x00000008UL /**< Mode PRSCH8 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 193 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH9 0x00000009UL /**< Mode PRSCH9 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 194 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH10 0x0000000AUL /**< Mode PRSCH10 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 195 #define _WDOG_PCH_PRSCTRL_PRSSEL_PRSCH11 0x0000000BUL /**< Mode PRSCH11 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 196 #define WDOG_PCH_PRSCTRL_PRSSEL_DEFAULT (_WDOG_PCH_PRSCTRL_PRSSEL_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 197 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH0 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH0 << 0) /**< Shifted mode PRSCH0 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 198 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH1 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH1 << 0) /**< Shifted mode PRSCH1 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 199 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH2 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH2 << 0) /**< Shifted mode PRSCH2 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 200 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH3 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH3 << 0) /**< Shifted mode PRSCH3 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 201 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH4 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH4 << 0) /**< Shifted mode PRSCH4 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 202 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH5 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH5 << 0) /**< Shifted mode PRSCH5 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 203 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH6 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH6 << 0) /**< Shifted mode PRSCH6 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 204 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH7 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH7 << 0) /**< Shifted mode PRSCH7 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 205 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH8 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH8 << 0) /**< Shifted mode PRSCH8 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 206 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH9 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH9 << 0) /**< Shifted mode PRSCH9 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 207 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH10 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH10 << 0) /**< Shifted mode PRSCH10 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 208 #define WDOG_PCH_PRSCTRL_PRSSEL_PRSCH11 (_WDOG_PCH_PRSCTRL_PRSSEL_PRSCH11 << 0) /**< Shifted mode PRSCH11 for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 209 #define WDOG_PCH_PRSCTRL_PRSMISSRSTEN (0x1UL << 8) /**< PRS missing event will trigger a watchdog reset */
AnnaBridge 171:3a7713b1edbc 210 #define _WDOG_PCH_PRSCTRL_PRSMISSRSTEN_SHIFT 8 /**< Shift value for WDOG_PRSMISSRSTEN */
AnnaBridge 171:3a7713b1edbc 211 #define _WDOG_PCH_PRSCTRL_PRSMISSRSTEN_MASK 0x100UL /**< Bit mask for WDOG_PRSMISSRSTEN */
AnnaBridge 171:3a7713b1edbc 212 #define _WDOG_PCH_PRSCTRL_PRSMISSRSTEN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 213 #define WDOG_PCH_PRSCTRL_PRSMISSRSTEN_DEFAULT (_WDOG_PCH_PRSCTRL_PRSMISSRSTEN_DEFAULT << 8) /**< Shifted mode DEFAULT for WDOG_PCH_PRSCTRL */
AnnaBridge 171:3a7713b1edbc 214
AnnaBridge 171:3a7713b1edbc 215 /* Bit fields for WDOG IF */
AnnaBridge 171:3a7713b1edbc 216 #define _WDOG_IF_RESETVALUE 0x00000000UL /**< Default value for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 217 #define _WDOG_IF_MASK 0x0000001FUL /**< Mask for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 218 #define WDOG_IF_TOUT (0x1UL << 0) /**< WDOG Timeout Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 219 #define _WDOG_IF_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 220 #define _WDOG_IF_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 221 #define _WDOG_IF_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 222 #define WDOG_IF_TOUT_DEFAULT (_WDOG_IF_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 223 #define WDOG_IF_WARN (0x1UL << 1) /**< WDOG Warning Timeout Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 224 #define _WDOG_IF_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 225 #define _WDOG_IF_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 226 #define _WDOG_IF_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 227 #define WDOG_IF_WARN_DEFAULT (_WDOG_IF_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 228 #define WDOG_IF_WIN (0x1UL << 2) /**< WDOG Window Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 229 #define _WDOG_IF_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 230 #define _WDOG_IF_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 231 #define _WDOG_IF_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 232 #define WDOG_IF_WIN_DEFAULT (_WDOG_IF_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 233 #define WDOG_IF_PEM0 (0x1UL << 3) /**< PRS Channel Zero Event Missing Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 234 #define _WDOG_IF_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 235 #define _WDOG_IF_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 236 #define _WDOG_IF_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 237 #define WDOG_IF_PEM0_DEFAULT (_WDOG_IF_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 238 #define WDOG_IF_PEM1 (0x1UL << 4) /**< PRS Channel One Event Missing Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 239 #define _WDOG_IF_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 240 #define _WDOG_IF_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 241 #define _WDOG_IF_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 242 #define WDOG_IF_PEM1_DEFAULT (_WDOG_IF_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IF */
AnnaBridge 171:3a7713b1edbc 243
AnnaBridge 171:3a7713b1edbc 244 /* Bit fields for WDOG IFS */
AnnaBridge 171:3a7713b1edbc 245 #define _WDOG_IFS_RESETVALUE 0x00000000UL /**< Default value for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 246 #define _WDOG_IFS_MASK 0x0000001FUL /**< Mask for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 247 #define WDOG_IFS_TOUT (0x1UL << 0) /**< Set TOUT Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 248 #define _WDOG_IFS_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 249 #define _WDOG_IFS_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 250 #define _WDOG_IFS_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 251 #define WDOG_IFS_TOUT_DEFAULT (_WDOG_IFS_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 252 #define WDOG_IFS_WARN (0x1UL << 1) /**< Set WARN Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 253 #define _WDOG_IFS_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 254 #define _WDOG_IFS_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 255 #define _WDOG_IFS_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 256 #define WDOG_IFS_WARN_DEFAULT (_WDOG_IFS_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 257 #define WDOG_IFS_WIN (0x1UL << 2) /**< Set WIN Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 258 #define _WDOG_IFS_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 259 #define _WDOG_IFS_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 260 #define _WDOG_IFS_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 261 #define WDOG_IFS_WIN_DEFAULT (_WDOG_IFS_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 262 #define WDOG_IFS_PEM0 (0x1UL << 3) /**< Set PEM0 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 263 #define _WDOG_IFS_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 264 #define _WDOG_IFS_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 265 #define _WDOG_IFS_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 266 #define WDOG_IFS_PEM0_DEFAULT (_WDOG_IFS_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 267 #define WDOG_IFS_PEM1 (0x1UL << 4) /**< Set PEM1 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 268 #define _WDOG_IFS_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 269 #define _WDOG_IFS_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 270 #define _WDOG_IFS_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 271 #define WDOG_IFS_PEM1_DEFAULT (_WDOG_IFS_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IFS */
AnnaBridge 171:3a7713b1edbc 272
AnnaBridge 171:3a7713b1edbc 273 /* Bit fields for WDOG IFC */
AnnaBridge 171:3a7713b1edbc 274 #define _WDOG_IFC_RESETVALUE 0x00000000UL /**< Default value for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 275 #define _WDOG_IFC_MASK 0x0000001FUL /**< Mask for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 276 #define WDOG_IFC_TOUT (0x1UL << 0) /**< Clear TOUT Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 277 #define _WDOG_IFC_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 278 #define _WDOG_IFC_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 279 #define _WDOG_IFC_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 280 #define WDOG_IFC_TOUT_DEFAULT (_WDOG_IFC_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 281 #define WDOG_IFC_WARN (0x1UL << 1) /**< Clear WARN Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 282 #define _WDOG_IFC_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 283 #define _WDOG_IFC_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 284 #define _WDOG_IFC_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 285 #define WDOG_IFC_WARN_DEFAULT (_WDOG_IFC_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 286 #define WDOG_IFC_WIN (0x1UL << 2) /**< Clear WIN Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 287 #define _WDOG_IFC_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 288 #define _WDOG_IFC_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 289 #define _WDOG_IFC_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 290 #define WDOG_IFC_WIN_DEFAULT (_WDOG_IFC_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 291 #define WDOG_IFC_PEM0 (0x1UL << 3) /**< Clear PEM0 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 292 #define _WDOG_IFC_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 293 #define _WDOG_IFC_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 294 #define _WDOG_IFC_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 295 #define WDOG_IFC_PEM0_DEFAULT (_WDOG_IFC_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 296 #define WDOG_IFC_PEM1 (0x1UL << 4) /**< Clear PEM1 Interrupt Flag */
AnnaBridge 171:3a7713b1edbc 297 #define _WDOG_IFC_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 298 #define _WDOG_IFC_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 299 #define _WDOG_IFC_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 300 #define WDOG_IFC_PEM1_DEFAULT (_WDOG_IFC_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IFC */
AnnaBridge 171:3a7713b1edbc 301
AnnaBridge 171:3a7713b1edbc 302 /* Bit fields for WDOG IEN */
AnnaBridge 171:3a7713b1edbc 303 #define _WDOG_IEN_RESETVALUE 0x00000000UL /**< Default value for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 304 #define _WDOG_IEN_MASK 0x0000001FUL /**< Mask for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 305 #define WDOG_IEN_TOUT (0x1UL << 0) /**< TOUT Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 306 #define _WDOG_IEN_TOUT_SHIFT 0 /**< Shift value for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 307 #define _WDOG_IEN_TOUT_MASK 0x1UL /**< Bit mask for WDOG_TOUT */
AnnaBridge 171:3a7713b1edbc 308 #define _WDOG_IEN_TOUT_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 309 #define WDOG_IEN_TOUT_DEFAULT (_WDOG_IEN_TOUT_DEFAULT << 0) /**< Shifted mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 310 #define WDOG_IEN_WARN (0x1UL << 1) /**< WARN Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 311 #define _WDOG_IEN_WARN_SHIFT 1 /**< Shift value for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 312 #define _WDOG_IEN_WARN_MASK 0x2UL /**< Bit mask for WDOG_WARN */
AnnaBridge 171:3a7713b1edbc 313 #define _WDOG_IEN_WARN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 314 #define WDOG_IEN_WARN_DEFAULT (_WDOG_IEN_WARN_DEFAULT << 1) /**< Shifted mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 315 #define WDOG_IEN_WIN (0x1UL << 2) /**< WIN Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 316 #define _WDOG_IEN_WIN_SHIFT 2 /**< Shift value for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 317 #define _WDOG_IEN_WIN_MASK 0x4UL /**< Bit mask for WDOG_WIN */
AnnaBridge 171:3a7713b1edbc 318 #define _WDOG_IEN_WIN_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 319 #define WDOG_IEN_WIN_DEFAULT (_WDOG_IEN_WIN_DEFAULT << 2) /**< Shifted mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 320 #define WDOG_IEN_PEM0 (0x1UL << 3) /**< PEM0 Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 321 #define _WDOG_IEN_PEM0_SHIFT 3 /**< Shift value for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 322 #define _WDOG_IEN_PEM0_MASK 0x8UL /**< Bit mask for WDOG_PEM0 */
AnnaBridge 171:3a7713b1edbc 323 #define _WDOG_IEN_PEM0_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 324 #define WDOG_IEN_PEM0_DEFAULT (_WDOG_IEN_PEM0_DEFAULT << 3) /**< Shifted mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 325 #define WDOG_IEN_PEM1 (0x1UL << 4) /**< PEM1 Interrupt Enable */
AnnaBridge 171:3a7713b1edbc 326 #define _WDOG_IEN_PEM1_SHIFT 4 /**< Shift value for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 327 #define _WDOG_IEN_PEM1_MASK 0x10UL /**< Bit mask for WDOG_PEM1 */
AnnaBridge 171:3a7713b1edbc 328 #define _WDOG_IEN_PEM1_DEFAULT 0x00000000UL /**< Mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 329 #define WDOG_IEN_PEM1_DEFAULT (_WDOG_IEN_PEM1_DEFAULT << 4) /**< Shifted mode DEFAULT for WDOG_IEN */
AnnaBridge 171:3a7713b1edbc 330
AnnaBridge 171:3a7713b1edbc 331 /** @} End of group EFM32PG1B_WDOG */
AnnaBridge 171:3a7713b1edbc 332 /** @} End of group Parts */
AnnaBridge 171:3a7713b1edbc 333